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6c0bbdcc NI |
1 | /* |
2 | * Configuation settings for the Hitachi Solution Engine 7722 | |
3 | * | |
4 | * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | |
5 | * | |
6 | * See file CREDITS for list of people who contributed to this | |
7 | * project. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License as | |
11 | * published by the Free Software Foundation; either version 2 of | |
12 | * the License, or (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
22 | * MA 02111-1307 USA | |
23 | */ | |
24 | ||
25 | #ifndef __MS7722SE_H | |
26 | #define __MS7722SE_H | |
27 | ||
6c0bbdcc NI |
28 | #define CONFIG_SH 1 |
29 | #define CONFIG_SH4 1 | |
30 | #define CONFIG_CPU_SH7722 1 | |
31 | #define CONFIG_MS7722SE 1 | |
32 | ||
33 | #define CONFIG_CMD_FLASH | |
5783758f | 34 | #define CONFIG_CMD_JFFS2 |
6c0bbdcc | 35 | #define CONFIG_CMD_NET |
5783758f | 36 | #define CONFIG_CMD_NFS |
6c0bbdcc | 37 | #define CONFIG_CMD_PING |
6c0bbdcc | 38 | #define CONFIG_CMD_SDRAM |
5783758f | 39 | #define CONFIG_CMD_MEMORY |
bdab39d3 | 40 | #define CONFIG_CMD_SAVEENV |
6c0bbdcc NI |
41 | |
42 | #define CONFIG_BAUDRATE 115200 | |
43 | #define CONFIG_BOOTDELAY 3 | |
53677ef1 | 44 | #define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01" |
6c0bbdcc NI |
45 | |
46 | #define CONFIG_VERSION_VARIABLE | |
47 | #undef CONFIG_SHOW_BOOT_PROGRESS | |
48 | ||
49 | /* SMC9111 */ | |
7194ab80 | 50 | #define CONFIG_SMC91111 |
6c0bbdcc NI |
51 | #define CONFIG_SMC91111_BASE (0xB8000000) |
52 | ||
53 | /* MEMORY */ | |
54 | #define MS7722SE_SDRAM_BASE (0x8C000000) | |
55 | #define MS7722SE_FLASH_BASE_1 (0xA0000000) | |
6c0bbdcc NI |
56 | #define MS7722SE_FLASH_BANK_SIZE (8*1024 * 1024) |
57 | ||
5c1877d6 | 58 | #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 |
6d0f6bcf JCPV |
59 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
60 | #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ | |
61 | #define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ | |
62 | #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ | |
63 | #define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ | |
64 | #define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments passed to kernel */ | |
65 | #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ | |
6c0bbdcc NI |
66 | |
67 | /* SCIF */ | |
6c58a030 | 68 | #define CONFIG_SCIF_CONSOLE 1 |
6c0bbdcc | 69 | #define CONFIG_CONS_SCIF0 1 |
6d0f6bcf JCPV |
70 | #undef CONFIG_SYS_CONSOLE_INFO_QUIET /* Suppress display of console information at boot */ |
71 | #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE | |
72 | #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE | |
6c0bbdcc | 73 | |
6d0f6bcf JCPV |
74 | #define CONFIG_SYS_MEMTEST_START (MS7722SE_SDRAM_BASE) |
75 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) | |
6c0bbdcc | 76 | |
6d0f6bcf JCPV |
77 | #undef CONFIG_SYS_ALT_MEMTEST /* Enable alternate, more extensive, memory test */ |
78 | #undef CONFIG_SYS_MEMTEST_SCRATCH /* Scratch address used by the alternate memory test */ | |
6c0bbdcc | 79 | |
6d0f6bcf | 80 | #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* Enable temporary baudrate change while serial download */ |
6c0bbdcc | 81 | |
6d0f6bcf JCPV |
82 | #define CONFIG_SYS_SDRAM_BASE (MS7722SE_SDRAM_BASE) |
83 | #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* maybe more, but if so u-boot doesn't know about it... */ | |
6c0bbdcc | 84 | |
6d0f6bcf | 85 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) /* default load address for scripts ?!? */ |
6c0bbdcc | 86 | |
6d0f6bcf | 87 | #define CONFIG_SYS_MONITOR_BASE (MS7722SE_FLASH_BASE_1) /* Address of u-boot image |
53677ef1 | 88 | in Flash (NOT run time address in SDRAM) ?!? */ |
6d0f6bcf JCPV |
89 | #define CONFIG_SYS_MONITOR_LEN (128 * 1024) /* */ |
90 | #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */ | |
6d0f6bcf | 91 | #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) |
6c0bbdcc NI |
92 | |
93 | /* FLASH */ | |
6d0f6bcf | 94 | #define CONFIG_SYS_FLASH_CFI |
00b1883a | 95 | #define CONFIG_FLASH_CFI_DRIVER |
6d0f6bcf JCPV |
96 | #undef CONFIG_SYS_FLASH_QUIET_TEST |
97 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ | |
6c0bbdcc | 98 | |
6d0f6bcf | 99 | #define CONFIG_SYS_FLASH_BASE (MS7722SE_FLASH_BASE_1) /* Physical start address of Flash memory */ |
6c0bbdcc | 100 | |
6d0f6bcf | 101 | #define CONFIG_SYS_MAX_FLASH_SECT 150 /* Max number of sectors on each |
53677ef1 | 102 | Flash chip */ |
6c0bbdcc NI |
103 | |
104 | /* if you use all NOR Flash , you change dip-switch. Please see MS7722SE01 Manual. */ | |
6d0f6bcf JCPV |
105 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 |
106 | #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MS7722SE_FLASH_BANK_SIZE), \ | |
107 | CONFIG_SYS_FLASH_BASE + (1 * MS7722SE_FLASH_BANK_SIZE), \ | |
6c0bbdcc NI |
108 | } |
109 | ||
6d0f6bcf JCPV |
110 | #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) /* Timeout for Flash erase operations (in ms) */ |
111 | #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) /* Timeout for Flash write operations (in ms) */ | |
112 | #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) /* Timeout for Flash set sector lock bit operations (in ms) */ | |
113 | #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) /* Timeout for Flash clear lock bit operations (in ms) */ | |
6c0bbdcc | 114 | |
6d0f6bcf | 115 | #undef CONFIG_SYS_FLASH_PROTECTION /* Use hardware flash sectors protection instead of U-Boot software protection */ |
6c0bbdcc | 116 | |
6d0f6bcf | 117 | #undef CONFIG_SYS_DIRECT_FLASH_TFTP |
6c0bbdcc | 118 | |
5a1aceb0 | 119 | #define CONFIG_ENV_IS_IN_FLASH |
6c0bbdcc | 120 | #define CONFIG_ENV_OVERWRITE 1 |
0e8d1586 JCPV |
121 | #define CONFIG_ENV_SECT_SIZE (8 * 1024) |
122 | #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) | |
6d0f6bcf JCPV |
123 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE)) |
124 | #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ | |
0e8d1586 | 125 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) |
6d0f6bcf | 126 | #define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) |
6c0bbdcc NI |
127 | |
128 | /* Board Clock */ | |
129 | #define CONFIG_SYS_CLK_FREQ 33333333 | |
be45c632 | 130 | #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ |
8dd29c87 | 131 | #define CONFIG_SYS_HZ 1000 |
6c0bbdcc NI |
132 | |
133 | #endif /* __MS7722SE_H */ |