[people/ms/u-boot.git] / include / configs / omap3_igep00x0.h

/*
 * Common configuration settings for IGEP technology based boards
 *
 * (C) Copyright 2012
 * ISEE 2007 SL, <www.iseebcn.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __IGEP00X0_H
#define __IGEP00X0_H

#define CONFIG_NR_DRAM_BANKS            2

#include <configs/ti_omap3_common.h>

/*
 * We are only ever GP parts and will utilize all of the "downloaded image"
 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
 */
#undef CONFIG_SPL_TEXT_BASE
#define CONFIG_SPL_TEXT_BASE		0x40200000

#define CONFIG_MISC_INIT_R

#define CONFIG_REVISION_TAG		1

/* GPIO banks */
#define CONFIG_OMAP3_GPIO_2		/* GPIO32..63   is in GPIO bank 2 */
#define CONFIG_OMAP3_GPIO_4		/* GPIO96..127  is in GPIO bank 4 */

/* TPS65950 */
#define PBIASLITEVMODE1			(1 << 8)

/* LED */
#define IGEP0020_GPIO_LED		27
#define IGEP0030_GPIO_LED		16

/* Board and revision detection GPIOs */
#define IGEP0030_USB_TRANSCEIVER_RESET		54
#define GPIO_IGEP00X0_BOARD_DETECTION		28
#define GPIO_IGEP00X0_REVISION_DETECTION	129

/* USB device configuration */
#define CONFIG_USB_DEVICE		1
#define CONFIG_USB_TTY			1

/* Change these to suit your needs */
#define CONFIG_USBD_VENDORID		0x0451
#define CONFIG_USBD_PRODUCTID		0x5678
#define CONFIG_USBD_MANUFACTURER	"Texas Instruments"
#define CONFIG_USBD_PRODUCT_NAME	"IGEP"

#ifndef CONFIG_SPL_BUILD

/* Environment */
#define ENV_DEVICE_SETTINGS \
	"stdin=serial\0" \
	"stdout=serial\0" \
	"stderr=serial\0"

#define MEM_LAYOUT_SETTINGS \
	DEFAULT_LINUX_BOOT_ENV \
	"scriptaddr=0x87E00000\0" \
	"pxefile_addr_r=0x87F00000\0"

#define BOOT_TARGET_DEVICES(func) \
	func(MMC, mmc, 0)

#include <config_distro_bootcmd.h>

#define ENV_FINDFDT \
	"findfdt="\
		"if test ${board_name} = igep0020; then " \
			"if test ${board_rev} = F; then " \
				"setenv fdtfile omap3-igep0020-rev-f.dtb; " \
			"else " \
				"setenv fdtfile omap3-igep0020.dtb; fi; fi; " \
		"if test ${board_name} = igep0030; then " \
			"if test ${board_rev} = G; then " \
				"setenv fdtfile omap3-igep0030-rev-g.dtb; " \
			"else " \
				"setenv fdtfile omap3-igep0030.dtb; fi; fi; " \
		"if test ${fdtfile} = ''; then " \
			"echo WARNING: Could not determine device tree to use; fi; \0"

#define CONFIG_EXTRA_ENV_SETTINGS \
	ENV_FINDFDT \
	ENV_DEVICE_SETTINGS \
	MEM_LAYOUT_SETTINGS \
	BOOTENV

#endif

#define CONFIG_MTD_PARTITIONS
#define CONFIG_SYS_MTDPARTS_RUNTIME

/* OneNAND config */
#define CONFIG_USE_ONENAND_BOARD_INIT
#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
#define CONFIG_SYS_ONENAND_BLOCK_SIZE	(128*1024)

/* NAND config */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT	64
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS		{ 2,  3,  4,  5,  6,  7,  8,  9, \
					 10, 11, 12, 13, 14, 15, 16, 17, \
					 18, 19, 20, 21, 22, 23, 24, 25, \
					 26, 27, 28, 29, 30, 31, 32, 33, \
					 34, 35, 36, 37, 38, 39, 40, 41, \
					 42, 43, 44, 45, 46, 47, 48, 49, \
					 50, 51, 52, 53, 54, 55, 56, 57, }
#define CONFIG_SYS_NAND_ECCSIZE		512
#define CONFIG_SYS_NAND_ECCBYTES	14
#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW

/* UBI configuration */
#define CONFIG_SPL_UBI			1
#define CONFIG_SPL_UBI_MAX_VOL_LEBS	256
#define CONFIG_SPL_UBI_MAX_PEB_SIZE	(256*1024)
#define CONFIG_SPL_UBI_MAX_PEBS		4096
#define CONFIG_SPL_UBI_VOL_IDS		8
#define CONFIG_SPL_UBI_LOAD_MONITOR_ID	0
#define CONFIG_SPL_UBI_LOAD_KERNEL_ID	3
#define CONFIG_SPL_UBI_LOAD_ARGS_ID	4
#define CONFIG_SPL_UBI_PEB_OFFSET	4
#define CONFIG_SPL_UBI_VID_OFFSET	512
#define CONFIG_SPL_UBI_LEB_START	2048
#define CONFIG_SPL_UBI_INFO_ADDR	0x88080000

/* environment organization */
#define CONFIG_ENV_UBI_PART		"UBI"
#define CONFIG_ENV_UBI_VOLUME		"config"
#define CONFIG_ENV_UBI_VOLUME_REDUND	"config_r"
#define CONFIG_UBI_SILENCE_MSG		1
#define CONFIG_UBIFS_SILENCE_MSG	1
#define CONFIG_ENV_SIZE			(32*1024)

#endif /* __IGEP00X0_H */
Commit	Line	Data
8a3f6bb6	1	/*
dc7a9e64 EBS	2	* Common configuration settings for IGEP technology based boards
	3	*
	4	* (C) Copyright 2012
8a3f6bb6 EBS	5	* ISEE 2007 SL, <www.iseebcn.com>
8a3f6bb6 EBS	6	*
3765b3e7	7	* SPDX-License-Identifier: GPL-2.0+
8a3f6bb6 EBS	8	*/
8a3f6bb6 EBS	9
dc7a9e64 EBS	10	#ifndef __IGEP00X0_H
	11	#define __IGEP00X0_H
	12
e37e954e	13	#define CONFIG_NR_DRAM_BANKS 2
8a3f6bb6	14
e37e954e	15	#include <configs/ti_omap3_common.h>
8a3f6bb6	16
fa2f81b0 TR	17	/*
	18	* We are only ever GP parts and will utilize all of the "downloaded image"
	19	* area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
	20	*/
e7fbcbc2	21	#undef CONFIG_SPL_TEXT_BASE
e7fbcbc2 EBS	22	#define CONFIG_SPL_TEXT_BASE 0x40200000
e7fbcbc2 EBS	23
8a3f6bb6 EBS	24	#define CONFIG_MISC_INIT_R
8a3f6bb6 EBS	25
8a3f6bb6 EBS	26	#define CONFIG_REVISION_TAG 1
8a3f6bb6 EBS	27
195dc231 PP	28	/* GPIO banks */
	29	#define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO bank 2 */
	30	#define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO bank 4 */
	31
	32	/* TPS65950 */
	33	#define PBIASLITEVMODE1 (1 << 8)
	34
	35	/* LED */
	36	#define IGEP0020_GPIO_LED 27
	37	#define IGEP0030_GPIO_LED 16
	38
	39	/* Board and revision detection GPIOs */
	40	#define IGEP0030_USB_TRANSCEIVER_RESET 54
	41	#define GPIO_IGEP00X0_BOARD_DETECTION 28
	42	#define GPIO_IGEP00X0_REVISION_DETECTION 129
9d4f5421	43
8a3f6bb6 EBS	44	/* USB device configuration */
	45	#define CONFIG_USB_DEVICE 1
	46	#define CONFIG_USB_TTY 1
8a3f6bb6 EBS	47
	48	/* Change these to suit your needs */
	49	#define CONFIG_USBD_VENDORID 0x0451
	50	#define CONFIG_USBD_PRODUCTID 0x5678
	51	#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
	52	#define CONFIG_USBD_PRODUCT_NAME "IGEP"
	53
40372244 EBS	54	#ifndef CONFIG_SPL_BUILD
40372244 EBS	55
40372244 EBS	56	/* Environment */
	57	#define ENV_DEVICE_SETTINGS \
	58	"stdin=serial\0" \
	59	"stdout=serial\0" \
	60	"stderr=serial\0"
	61
	62	#define MEM_LAYOUT_SETTINGS \
	63	DEFAULT_LINUX_BOOT_ENV \
	64	"scriptaddr=0x87E00000\0" \
	65	"pxefile_addr_r=0x87F00000\0"
	66
	67	#define BOOT_TARGET_DEVICES(func) \
	68	func(MMC, mmc, 0)
	69
	70	#include <config_distro_bootcmd.h>
	71
195dc231 PP	72	#define ENV_FINDFDT \
	73	"findfdt="\
	74	"if test ${board_name} = igep0020; then " \
	75	"if test ${board_rev} = F; then " \
	76	"setenv fdtfile omap3-igep0020-rev-f.dtb; " \
	77	"else " \
	78	"setenv fdtfile omap3-igep0020.dtb; fi; fi; " \
	79	"if test ${board_name} = igep0030; then " \
	80	"if test ${board_rev} = G; then " \
	81	"setenv fdtfile omap3-igep0030-rev-g.dtb; " \
	82	"else " \
	83	"setenv fdtfile omap3-igep0030.dtb; fi; fi; " \
	84	"if test ${fdtfile} = ''; then " \
	85	"echo WARNING: Could not determine device tree to use; fi; \0"
	86
8a3f6bb6	87	#define CONFIG_EXTRA_ENV_SETTINGS \
195dc231	88	ENV_FINDFDT \
40372244 EBS	89	ENV_DEVICE_SETTINGS \
	90	MEM_LAYOUT_SETTINGS \
	91	BOOTENV
	92
	93	#endif
8a3f6bb6	94
4b9dc7c2	95	#define CONFIG_MTD_PARTITIONS
a5debaa3	96	#define CONFIG_SYS_MTDPARTS_RUNTIME
d271a611	97
4b9dc7c2	98	/* OneNAND config */
4b9dc7c2 LM	99	#define CONFIG_USE_ONENAND_BOARD_INIT
	100	#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
	101	#define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024)
d271a611	102
4b9dc7c2	103	/* NAND config */
d271a611 JMC	104	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	105	#define CONFIG_SYS_NAND_PAGE_COUNT 64
	106	#define CONFIG_SYS_NAND_PAGE_SIZE 2048
	107	#define CONFIG_SYS_NAND_OOBSIZE 64
	108	#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
81fd858c LM	109	#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
	110	#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
	111	10, 11, 12, 13, 14, 15, 16, 17, \
	112	18, 19, 20, 21, 22, 23, 24, 25, \
	113	26, 27, 28, 29, 30, 31, 32, 33, \
	114	34, 35, 36, 37, 38, 39, 40, 41, \
	115	42, 43, 44, 45, 46, 47, 48, 49, \
	116	50, 51, 52, 53, 54, 55, 56, 57, }
d271a611	117	#define CONFIG_SYS_NAND_ECCSIZE 512
81fd858c LM	118	#define CONFIG_SYS_NAND_ECCBYTES 14
81fd858c LM	119	#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
81fd858c	120
4b9dc7c2 LM	121	/* UBI configuration */
	122	#define CONFIG_SPL_UBI 1
	123	#define CONFIG_SPL_UBI_MAX_VOL_LEBS 256
	124	#define CONFIG_SPL_UBI_MAX_PEB_SIZE (256*1024)
	125	#define CONFIG_SPL_UBI_MAX_PEBS 4096
	126	#define CONFIG_SPL_UBI_VOL_IDS 8
	127	#define CONFIG_SPL_UBI_LOAD_MONITOR_ID 0
	128	#define CONFIG_SPL_UBI_LOAD_KERNEL_ID 3
	129	#define CONFIG_SPL_UBI_LOAD_ARGS_ID 4
	130	#define CONFIG_SPL_UBI_PEB_OFFSET 4
	131	#define CONFIG_SPL_UBI_VID_OFFSET 512
	132	#define CONFIG_SPL_UBI_LEB_START 2048
	133	#define CONFIG_SPL_UBI_INFO_ADDR 0x88080000
	134
	135	/* environment organization */
4b9dc7c2 LM	136	#define CONFIG_ENV_UBI_PART "UBI"
	137	#define CONFIG_ENV_UBI_VOLUME "config"
	138	#define CONFIG_ENV_UBI_VOLUME_REDUND "config_r"
	139	#define CONFIG_UBI_SILENCE_MSG 1
	140	#define CONFIG_UBIFS_SILENCE_MSG 1
	141	#define CONFIG_ENV_SIZE (32*1024)
	142
dc7a9e64	143	#endif /* __IGEP00X0_H */