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9e40808c MK |
1 | /* |
2 | * Copyright (C) 2010 Samsung Electronics | |
3 | * Minkyu Kang <mk7.kang@samsung.com> | |
4 | * | |
393cb361 | 5 | * Configuation settings for the SAMSUNG Universal (EXYNOS4210) board. |
9e40808c | 6 | * |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
9e40808c MK |
8 | */ |
9 | ||
3f41ffe4 PW |
10 | #ifndef __CONFIG_UNIVERSAL_H |
11 | #define __CONFIG_UNIVERSAL_H | |
9e40808c | 12 | |
3f41ffe4 PW |
13 | #include <configs/exynos4-dt.h> |
14 | ||
15 | #define CONFIG_SYS_PROMPT "Universal # " /* Monitor Command Prompt */ | |
9e40808c | 16 | |
3f41ffe4 PW |
17 | #undef CONFIG_DEFAULT_DEVICE_TREE |
18 | #define CONFIG_DEFAULT_DEVICE_TREE exynos4210-universal_c210 | |
9e40808c | 19 | |
3f41ffe4 | 20 | #define CONFIG_TIZEN /* TIZEN lib */ |
9e40808c MK |
21 | |
22 | /* Keep L2 Cache Disabled */ | |
e47f2db5 | 23 | #define CONFIG_SYS_L2CACHE_OFF 1 |
9e40808c | 24 | |
3f41ffe4 PW |
25 | /* Universal has 2 banks of DRAM */ |
26 | #define CONFIG_NR_DRAM_BANKS 2 | |
9e40808c | 27 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
3f41ffe4 | 28 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE |
9e40808c | 29 | |
3f41ffe4 | 30 | #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ |
9e40808c MK |
31 | |
32 | /* Size of malloc() pool */ | |
3f41ffe4 | 33 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M)) |
9e40808c MK |
34 | |
35 | /* select serial console configuration */ | |
3f41ffe4 PW |
36 | #define CONFIG_SERIAL2 |
37 | #define CONFIG_BAUDRATE 115200 | |
38 | ||
39 | /* Console configuration */ | |
40 | #define CONFIG_SYS_CONSOLE_INFO_QUIET | |
41 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | |
42 | ||
43 | #define CONFIG_BOOTARGS "Please use defined boot" | |
44 | #define CONFIG_BOOTCOMMAND "run mmcboot" | |
45 | #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" | |
46 | ||
47 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ | |
48 | - GENERATED_GBL_DATA_SIZE) | |
49 | ||
50 | #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ | |
51 | ||
52 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 | |
53 | ||
54 | /* memtest works on */ | |
55 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
56 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) | |
57 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) | |
58 | ||
59 | #define CONFIG_SYS_TEXT_BASE 0x44800000 | |
9e40808c MK |
60 | |
61 | #define CONFIG_MTD_DEVICE | |
62 | #define CONFIG_MTD_PARTITIONS | |
63 | ||
64 | /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ | |
65 | #define MTDIDS_DEFAULT "onenand0=samsung-onenand" | |
66 | ||
67 | #define MTDPARTS_DEFAULT "mtdparts=samsung-onenand:"\ | |
68 | "128k(s-boot)"\ | |
69 | ",896k(bootloader)"\ | |
70 | ",256k(params)"\ | |
71 | ",2816k(config)"\ | |
72 | ",8m(csa)"\ | |
73 | ",7m(kernel)"\ | |
74 | ",1m(log)"\ | |
75 | ",12m(modem)"\ | |
76 | ",60m(qboot)"\ | |
77 | ",-(UBI)\0" | |
78 | ||
79 | #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT | |
80 | ||
81 | #define MBRPARTS_DEFAULT "20M(permanent)"\ | |
82 | ",20M(boot)"\ | |
83 | ",1G(system)"\ | |
84 | ",100M(swap)"\ | |
85 | ",-(UMS)\0" | |
86 | ||
9e40808c MK |
87 | #define CONFIG_ENV_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=4 ubi.mtd=7" |
88 | #define CONFIG_BOOTBLOCK "10" | |
89 | #define CONFIG_UBIBLOCK "9" | |
90 | ||
3f41ffe4 PW |
91 | #define CONFIG_ENV_IS_IN_MMC |
92 | #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV | |
93 | #define CONFIG_ENV_SIZE 4096 | |
94 | #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */ | |
95 | ||
9e40808c MK |
96 | #define CONFIG_ENV_UBIFS_OPTION " rootflags=bulk_read,no_chk_data_crc " |
97 | #define CONFIG_ENV_FLASHBOOT CONFIG_ENV_UBI_MTD CONFIG_ENV_UBIFS_OPTION \ | |
98 | "${mtdparts}" | |
99 | ||
100 | #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}" | |
101 | ||
815a6072 PW |
102 | #define CONFIG_ENV_VARS_UBOOT_CONFIG |
103 | #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG | |
104 | ||
9e40808c MK |
105 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
106 | "updateb=" \ | |
107 | "onenand erase 0x0 0x100000;" \ | |
108 | "onenand write 0x42008000 0x0 0x100000\0" \ | |
109 | "updatek=" \ | |
110 | "onenand erase 0xc00000 0x500000;" \ | |
111 | "onenand write 0x41008000 0xc00000 0x500000\0" \ | |
112 | "bootk=" \ | |
113 | "run loaduimage; bootm 0x40007FC0\0" \ | |
9e40808c | 114 | "updatebackup=" \ |
188c42b3 JC |
115 | "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \ |
116 | "mmc dev 0 0\0" \ | |
9e40808c MK |
117 | "updatebootb=" \ |
118 | "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ | |
119 | "lpj=lpj=3981312\0" \ | |
120 | "ubifsboot=" \ | |
121 | "set bootargs root=ubi0!rootfs rootfstype=ubifs ${lpj} " \ | |
122 | CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \ | |
123 | CONFIG_ENV_COMMON_BOOT "; run bootk\0" \ | |
124 | "tftpboot=" \ | |
125 | "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ | |
126 | CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \ | |
127 | CONFIG_ENV_COMMON_BOOT \ | |
128 | "; tftp 0x40007FC0 uImage; bootm 0x40007FC0\0" \ | |
129 | "nfsboot=" \ | |
130 | "set bootargs root=/dev/nfs rw " \ | |
131 | "nfsroot=${nfsroot},nolock,tcp " \ | |
132 | "ip=${ipaddr}:${serverip}:${gatewayip}:" \ | |
133 | "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \ | |
134 | "; run bootk\0" \ | |
135 | "ramfsboot=" \ | |
136 | "set bootargs root=/dev/ram0 rw rootfstype=ext2 " \ | |
137 | "${console} ${meminfo} " \ | |
138 | "initrd=0x43000000,8M ramdisk=8192\0" \ | |
139 | "mmcboot=" \ | |
140 | "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ | |
141 | "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ | |
142 | "run loaduimage; bootm 0x40007FC0\0" \ | |
143 | "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ | |
144 | "boottrace=setenv opts initcall_debug; run bootcmd\0" \ | |
145 | "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ | |
146 | "verify=n\0" \ | |
147 | "rootfstype=ext4\0" \ | |
148 | "console=" CONFIG_DEFAULT_CONSOLE \ | |
149 | "mtdparts=" MTDPARTS_DEFAULT \ | |
150 | "mbrparts=" MBRPARTS_DEFAULT \ | |
151 | "meminfo=crashkernel=32M@0x50000000\0" \ | |
152 | "nfsroot=/nfsroot/arm\0" \ | |
153 | "bootblock=" CONFIG_BOOTBLOCK "\0" \ | |
154 | "ubiblock=" CONFIG_UBIBLOCK" \0" \ | |
155 | "ubi=enabled\0" \ | |
156 | "loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ | |
157 | "mmcdev=0\0" \ | |
158 | "mmcbootpart=2\0" \ | |
159 | "mmcrootpart=3\0" \ | |
160 | "opts=always_resume=1" | |
161 | ||
9e40808c | 162 | #define CONFIG_USE_ONENAND_BOARD_INIT |
a08a649d | 163 | #define CONFIG_SAMSUNG_ONENAND |
9e40808c MK |
164 | #define CONFIG_SYS_ONENAND_BASE 0x0C000000 |
165 | ||
2427f5d5 ŁM |
166 | #include <asm/arch/gpio.h> |
167 | /* | |
168 | * I2C Settings | |
169 | */ | |
9b97b727 AS |
170 | #define CONFIG_SOFT_I2C_GPIO_SCL EXYNOS4_GPIO_B7 |
171 | #define CONFIG_SOFT_I2C_GPIO_SDA EXYNOS4_GPIO_B6 | |
2427f5d5 | 172 | |
3f41ffe4 PW |
173 | #define CONFIG_CMD_I2C |
174 | ||
ea818dbb HS |
175 | #define CONFIG_SYS_I2C |
176 | #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ | |
177 | #define CONFIG_SYS_I2C_SOFT_SPEED 50000 | |
178 | #define CONFIG_SYS_I2C_SOFT_SLAVE 0 | |
2427f5d5 | 179 | #define CONFIG_SOFT_I2C_READ_REPEATED_START |
2427f5d5 ŁM |
180 | #define CONFIG_I2C_MULTI_BUS |
181 | #define CONFIG_SYS_MAX_I2C_BUS 7 | |
182 | ||
be3b51aa ŁM |
183 | #define CONFIG_POWER |
184 | #define CONFIG_POWER_I2C | |
185 | #define CONFIG_POWER_MAX8998 | |
2427f5d5 | 186 | |
ddc7e541 ŁM |
187 | #define CONFIG_USB_GADGET |
188 | #define CONFIG_USB_GADGET_S3C_UDC_OTG | |
189 | #define CONFIG_USB_GADGET_DUALSPEED | |
190 | ||
ff0fedd5 PW |
191 | /* |
192 | * SPI Settings | |
193 | */ | |
194 | #define CONFIG_SOFT_SPI | |
195 | #define CONFIG_SOFT_SPI_MODE SPI_MODE_3 | |
9b97b727 AS |
196 | #define CONFIG_SOFT_SPI_GPIO_SCLK EXYNOS4_GPIO_Y31 |
197 | #define CONFIG_SOFT_SPI_GPIO_MOSI EXYNOS4_GPIO_Y33 | |
198 | #define CONFIG_SOFT_SPI_GPIO_MISO EXYNOS4_GPIO_Y30 | |
199 | #define CONFIG_SOFT_SPI_GPIO_CS EXYNOS4_GPIO_Y43 | |
ff0fedd5 PW |
200 | |
201 | #define SPI_DELAY udelay(1) | |
202 | #undef SPI_INIT | |
203 | #define SPI_SCL(bit) universal_spi_scl(bit) | |
204 | #define SPI_SDA(bit) universal_spi_sda(bit) | |
205 | #define SPI_READ universal_spi_read() | |
206 | #ifndef __ASSEMBLY__ | |
207 | void universal_spi_scl(int bit); | |
208 | void universal_spi_sda(int bit); | |
209 | int universal_spi_read(void); | |
210 | #endif | |
211 | ||
679549d1 PM |
212 | /* Common misc for Samsung */ |
213 | #define CONFIG_MISC_COMMON | |
214 | ||
215 | #define CONFIG_MISC_INIT_R | |
216 | ||
82b0a055 PM |
217 | /* Download menu - Samsung common */ |
218 | #define CONFIG_LCD_MENU | |
219 | #define CONFIG_LCD_MENU_BOARD | |
220 | ||
221 | /* Download menu - definitions for check keys */ | |
222 | #ifndef __ASSEMBLY__ | |
223 | #include <power/max8998_pmic.h> | |
224 | ||
225 | #define KEY_PWR_PMIC_NAME "MAX8998_PMIC" | |
226 | #define KEY_PWR_STATUS_REG MAX8998_REG_STATUS1 | |
227 | #define KEY_PWR_STATUS_MASK (1 << 7) | |
228 | #define KEY_PWR_INTERRUPT_REG MAX8998_REG_IRQ1 | |
229 | #define KEY_PWR_INTERRUPT_MASK (1 << 7) | |
230 | ||
9b97b727 AS |
231 | #define KEY_VOL_UP_GPIO EXYNOS4_GPIO_X20 |
232 | #define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21 | |
82b0a055 PM |
233 | #endif /* __ASSEMBLY__ */ |
234 | ||
235 | /* LCD console */ | |
236 | #define LCD_BPP LCD_COLOR16 | |
237 | #define CONFIG_SYS_WHITE_ON_BLACK | |
238 | ||
d984b9f8 PW |
239 | /* |
240 | * LCD Settings | |
241 | */ | |
242 | #define CONFIG_EXYNOS_FB | |
243 | #define CONFIG_LCD | |
244 | #define CONFIG_CMD_BMP | |
2df21cb3 | 245 | #define CONFIG_BMP_16BPP |
d984b9f8 | 246 | #define CONFIG_LD9040 |
d984b9f8 | 247 | #define CONFIG_VIDEO_BMP_GZIP |
903afe18 | 248 | #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) |
d984b9f8 | 249 | |
3f41ffe4 PW |
250 | #define LCD_XRES 480 |
251 | #define LCD_YRES 800 | |
252 | ||
9e40808c | 253 | #endif /* __CONFIG_H */ |