[people/ms/u-boot.git] / include / configs / sama5d3xek.h

/*
 * Configuation settings for the SAMA5D3xEK board.
 *
 * Copyright (C) 2012 - 2013 Atmel
 *
 * based on at91sam9m10g45ek.h by:
 * Stelian Pop <stelian@popies.net>
 * Lead Tech Design <www.leadtechdesign.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * If has No NOR flash, please put the definition: CONFIG_SYS_NO_FLASH
 * before the common header.
 */
#include "at91-sama5_common.h"

/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
#define	CONFIG_USART_ID			ATMEL_ID_DBGU

/*
 * This needs to be defined for the OHCI code to work but it is defined as
 * ATMEL_ID_UHPHS in the CPU specific header files.
 */
#define ATMEL_ID_UHP			ATMEL_ID_UHPHS

/*
 * Specify the clock enable bit in the PMC_SCER register.
 */
#define ATMEL_PMC_UHP			AT91SAM926x_PMC_UHP

/* LCD */
#define CONFIG_LCD
#define LCD_BPP				LCD_COLOR16
#define LCD_OUTPUT_BPP                  24
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
#define CONFIG_SYS_CONSOLE_IS_IN_ENV

/* board specific (not enough SRAM) */
#define CONFIG_SAMA5D3_LCD_BASE		0x23E00000

/* NOR flash */
#ifndef CONFIG_SYS_NO_FLASH
#define CONFIG_CMD_FLASH
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_PROTECTION
#define CONFIG_SYS_FLASH_BASE		0x10000000
#define CONFIG_SYS_MAX_FLASH_SECT	131
#define CONFIG_SYS_MAX_FLASH_BANKS	1
#endif

/* SDRAM */
#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
#define CONFIG_SYS_SDRAM_SIZE		0x20000000

#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_INIT_SP_ADDR		0x310000
#else
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
#endif

/* SerialFlash */
#define CONFIG_CMD_SF

#ifdef CONFIG_CMD_SF
#define CONFIG_ATMEL_SPI
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_ATMEL
#define CONFIG_SF_DEFAULT_SPEED		30000000
#endif

/* NAND flash */
#define CONFIG_CMD_NAND

#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
#define CONFIG_SYS_NAND_ONFI_DETECTION
/* PMECC & PMERRLOC */
#define CONFIG_ATMEL_NAND_HWECC
#define CONFIG_ATMEL_NAND_HW_PMECC
#define CONFIG_PMECC_CAP		4
#define CONFIG_PMECC_SECTOR_SIZE	512
#define CONFIG_CMD_NAND_TRIMFFS
#endif

/* Ethernet Hardware */
#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT		20
#define CONFIG_MACB_SEARCH_PHY
#define CONFIG_RGMII
#define CONFIG_CMD_MII
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#define CONFIG_PHY_MICREL_KSZ9021

/* MMC */
#define CONFIG_CMD_MMC

#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_GENERIC_ATMEL_MCI
#define ATMEL_BASE_MMCI			ATMEL_BASE_MCI0
#endif

/* USB */
#define CONFIG_CMD_USB

#ifdef CONFIG_CMD_USB
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"sama5d3"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	3
#define CONFIG_DOS_PARTITION
#define CONFIG_USB_STORAGE
#endif

/* USB device */
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_USB_GADGET_ATMEL_USBA
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
#define CONFIG_USBNET_MANUFACTURER      "Atmel SAMA5D3xEK"

#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
#define CONFIG_CMD_FAT
#define CONFIG_FAT_WRITE
#endif

#define CONFIG_SYS_LOAD_ADDR			0x22000000 /* load address */

#ifdef CONFIG_SYS_USE_SERIALFLASH
/* bootstrap + u-boot + env + linux in serial flash */
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_OFFSET       0x5000
#define CONFIG_ENV_SIZE         0x3000
#define CONFIG_ENV_SECT_SIZE    0x1000
#define CONFIG_BOOTCOMMAND      "sf probe 0; " \
				"sf read 0x22000000 0x42000 0x300000; " \
				"bootm 0x22000000"
#elif CONFIG_SYS_USE_NANDFLASH
/* bootstrap + u-boot + env in nandflash */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET		0xc0000
#define CONFIG_ENV_OFFSET_REDUND	0x100000
#define CONFIG_ENV_SIZE			0x20000
#define CONFIG_BOOTCOMMAND	"nand read 0x21000000 0x180000 0x80000;" \
				"nand read 0x22000000 0x200000 0x600000;" \
				"bootm 0x22000000 - 0x21000000"
#elif CONFIG_SYS_USE_MMC
/* bootstrap + u-boot + env in sd card */
#define CONFIG_ENV_IS_IN_FAT
#define FAT_ENV_INTERFACE	"mmc"
#define FAT_ENV_FILE		"uboot.env"
#define FAT_ENV_DEVICE_AND_PART	"0"
#define CONFIG_ENV_SIZE		0x4000
#define CONFIG_BOOTCOMMAND	"fatload mmc 0:1 0x21000000 dtb; " \
				"fatload mmc 0:1 0x22000000 uImage; " \
				"bootm 0x22000000 - 0x21000000"
#else
#define CONFIG_ENV_IS_NOWHERE
#endif

/* SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE		0x300000
#define CONFIG_SPL_MAX_SIZE		0x10000
#define CONFIG_SPL_BSS_START_ADDR	0x20000000
#define CONFIG_SPL_BSS_MAX_SIZE		0x80000
#define CONFIG_SYS_SPL_MALLOC_START	0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000

#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT

#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_MONITOR_LEN		(512 << 10)

#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_SPL_LDSCRIPT		arch/arm/mach-at91/armv7/u-boot-spl.lds
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x400
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.img"
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_LIBDISK_SUPPORT

#elif CONFIG_SYS_USE_NANDFLASH
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_SIZE	0x800
#define CONFIG_SYS_NAND_PAGE_COUNT	64
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER

#elif CONFIG_SYS_USE_SERIALFLASH
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8400

#endif

#endif
Commit	Line	Data
3225f34e BS	1	/*
	2	* Configuation settings for the SAMA5D3xEK board.
	3	*
	4	* Copyright (C) 2012 - 2013 Atmel
	5	*
	6	* based on at91sam9m10g45ek.h by:
	7	* Stelian Pop <stelian@popies.net>
	8	* Lead Tech Design <www.leadtechdesign.com>
	9	*
1a459660	10	* SPDX-License-Identifier: GPL-2.0+
3225f34e BS	11	*/
	12
	13	#ifndef __CONFIG_H
	14	#define __CONFIG_H
	15
b2d387bc WJ	16	/*
	17	* If has No NOR flash, please put the definition: CONFIG_SYS_NO_FLASH
	18	* before the common header.
	19	*/
	20	#include "at91-sama5_common.h"
3225f34e BS	21
	22	/* serial console */
	23	#define CONFIG_ATMEL_USART
	24	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
	25	#define CONFIG_USART_ID ATMEL_ID_DBGU
	26
	27	/*
	28	* This needs to be defined for the OHCI code to work but it is defined as
	29	* ATMEL_ID_UHPHS in the CPU specific header files.
	30	*/
	31	#define ATMEL_ID_UHP ATMEL_ID_UHPHS
	32
	33	/*
	34	* Specify the clock enable bit in the PMC_SCER register.
	35	*/
	36	#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
	37
	38	/* LCD */
	39	#define CONFIG_LCD
	40	#define LCD_BPP LCD_COLOR16
	41	#define LCD_OUTPUT_BPP 24
	42	#define CONFIG_LCD_LOGO
3225f34e BS	43	#define CONFIG_LCD_INFO
	44	#define CONFIG_LCD_INFO_BELOW_LOGO
	45	#define CONFIG_SYS_WHITE_ON_BLACK
	46	#define CONFIG_ATMEL_HLCD
	47	#define CONFIG_ATMEL_LCD_RGB565
	48	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
	49
	50	/* board specific (not enough SRAM) */
	51	#define CONFIG_SAMA5D3_LCD_BASE 0x23E00000
	52
d6b79434	53	/* NOR flash */
b2d387bc	54	#ifndef CONFIG_SYS_NO_FLASH
d6b79434	55	#define CONFIG_CMD_FLASH
d6b79434 BS	56	#define CONFIG_FLASH_CFI_DRIVER
	57	#define CONFIG_SYS_FLASH_CFI
	58	#define CONFIG_SYS_FLASH_PROTECTION
	59	#define CONFIG_SYS_FLASH_BASE 0x10000000
	60	#define CONFIG_SYS_MAX_FLASH_SECT 131
	61	#define CONFIG_SYS_MAX_FLASH_BANKS 1
d6b79434	62	#endif
3225f34e	63
3225f34e BS	64	/* SDRAM */
	65	#define CONFIG_NR_DRAM_BANKS 1
	66	#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
	67	#define CONFIG_SYS_SDRAM_SIZE 0x20000000
	68
c5e8885a BS	69	#ifdef CONFIG_SPL_BUILD
	70	#define CONFIG_SYS_INIT_SP_ADDR 0x310000
	71	#else
3225f34e BS	72	#define CONFIG_SYS_INIT_SP_ADDR \
3225f34e BS	73	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
c5e8885a	74	#endif
3225f34e BS	75
	76	/* SerialFlash */
	77	#define CONFIG_CMD_SF
	78
	79	#ifdef CONFIG_CMD_SF
	80	#define CONFIG_ATMEL_SPI
	81	#define CONFIG_SPI_FLASH
	82	#define CONFIG_SPI_FLASH_ATMEL
	83	#define CONFIG_SF_DEFAULT_SPEED 30000000
	84	#endif
	85
	86	/* NAND flash */
	87	#define CONFIG_CMD_NAND
	88
	89	#ifdef CONFIG_CMD_NAND
3225f34e BS	90	#define CONFIG_NAND_ATMEL
	91	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	92	#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
	93	/* our ALE is AD21 */
	94	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	95	/* our CLE is AD22 */
	96	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
	97	#define CONFIG_SYS_NAND_ONFI_DETECTION
	98	/* PMECC & PMERRLOC */
	99	#define CONFIG_ATMEL_NAND_HWECC
	100	#define CONFIG_ATMEL_NAND_HW_PMECC
	101	#define CONFIG_PMECC_CAP 4
	102	#define CONFIG_PMECC_SECTOR_SIZE 512
3225f34e BS	103	#define CONFIG_CMD_NAND_TRIMFFS
	104	#endif
	105
	106	/* Ethernet Hardware */
	107	#define CONFIG_MACB
	108	#define CONFIG_RMII
3225f34e BS	109	#define CONFIG_NET_RETRY_COUNT 20
3225f34e BS	110	#define CONFIG_MACB_SEARCH_PHY
e08d6f3a BS	111	#define CONFIG_RGMII
	112	#define CONFIG_CMD_MII
	113	#define CONFIG_PHYLIB
	114	#define CONFIG_PHY_MICREL
	115	#define CONFIG_PHY_MICREL_KSZ9021
3225f34e BS	116
	117	/* MMC */
	118	#define CONFIG_CMD_MMC
	119
	120	#ifdef CONFIG_CMD_MMC
	121	#define CONFIG_MMC
	122	#define CONFIG_GENERIC_MMC
	123	#define CONFIG_GENERIC_ATMEL_MCI
	124	#define ATMEL_BASE_MMCI ATMEL_BASE_MCI0
	125	#endif
	126
	127	/* USB */
	128	#define CONFIG_CMD_USB
	129
	130	#ifdef CONFIG_CMD_USB
	131	#define CONFIG_USB_ATMEL
dcd2f1a0	132	#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
3225f34e BS	133	#define CONFIG_USB_OHCI_NEW
	134	#define CONFIG_SYS_USB_OHCI_CPU_INIT
	135	#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
	136	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "sama5d3"
	137	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
	138	#define CONFIG_DOS_PARTITION
	139	#define CONFIG_USB_STORAGE
	140	#endif
	141
3668ce3c BS	142	/* USB device */
	143	#define CONFIG_USB_GADGET
	144	#define CONFIG_USB_GADGET_DUALSPEED
	145	#define CONFIG_USB_GADGET_ATMEL_USBA
	146	#define CONFIG_USB_ETHER
	147	#define CONFIG_USB_ETH_RNDIS
	148	#define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D3xEK"
	149
3225f34e BS	150	#if defined(CONFIG_CMD_USB) \|\| defined(CONFIG_CMD_MMC)
3225f34e BS	151	#define CONFIG_CMD_FAT
a248558a	152	#define CONFIG_FAT_WRITE
3225f34e BS	153	#endif
	154
	155	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
	156
	157	#ifdef CONFIG_SYS_USE_SERIALFLASH
	158	/* bootstrap + u-boot + env + linux in serial flash */
	159	#define CONFIG_ENV_IS_IN_SPI_FLASH
	160	#define CONFIG_ENV_OFFSET 0x5000
	161	#define CONFIG_ENV_SIZE 0x3000
	162	#define CONFIG_ENV_SECT_SIZE 0x1000
	163	#define CONFIG_BOOTCOMMAND "sf probe 0; " \
	164	"sf read 0x22000000 0x42000 0x300000; " \
	165	"bootm 0x22000000"
	166	#elif CONFIG_SYS_USE_NANDFLASH
	167	/* bootstrap + u-boot + env in nandflash */
	168	#define CONFIG_ENV_IS_IN_NAND
	169	#define CONFIG_ENV_OFFSET 0xc0000
	170	#define CONFIG_ENV_OFFSET_REDUND 0x100000
	171	#define CONFIG_ENV_SIZE 0x20000
	172	#define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \
	173	"nand read 0x22000000 0x200000 0x600000;" \
	174	"bootm 0x22000000 - 0x21000000"
	175	#elif CONFIG_SYS_USE_MMC
	176	/* bootstrap + u-boot + env in sd card */
a248558a WJ	177	#define CONFIG_ENV_IS_IN_FAT
	178	#define FAT_ENV_INTERFACE "mmc"
	179	#define FAT_ENV_FILE "uboot.env"
	180	#define FAT_ENV_DEVICE_AND_PART "0"
	181	#define CONFIG_ENV_SIZE 0x4000
3225f34e BS	182	#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \
	183	"fatload mmc 0:1 0x22000000 uImage; " \
	184	"bootm 0x22000000 - 0x21000000"
3225f34e	185	#else
a4c79b3a	186	#define CONFIG_ENV_IS_NOWHERE
3225f34e BS	187	#endif
3225f34e BS	188
c5e8885a	189	/* SPL */
c5e8885a BS	190	#define CONFIG_SPL_FRAMEWORK
	191	#define CONFIG_SPL_TEXT_BASE 0x300000
	192	#define CONFIG_SPL_MAX_SIZE 0x10000
	193	#define CONFIG_SPL_BSS_START_ADDR 0x20000000
	194	#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
	195	#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
	196	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
	197
	198	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	199	#define CONFIG_SPL_LIBGENERIC_SUPPORT
	200	#define CONFIG_SPL_GPIO_SUPPORT
	201	#define CONFIG_SPL_SERIAL_SUPPORT
	202
	203	#define CONFIG_SPL_BOARD_INIT
8a45b0ba BS	204	#define CONFIG_SYS_MONITOR_LEN (512 << 10)
8a45b0ba BS	205
c5e8885a	206	#ifdef CONFIG_SYS_USE_MMC
993ea97e	207	#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
c5e8885a BS	208	#define CONFIG_SPL_MMC_SUPPORT
	209	#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
	210	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
e2ccdf89	211	#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
205b4f33	212	#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
c5e8885a BS	213	#define CONFIG_SPL_FAT_SUPPORT
c5e8885a BS	214	#define CONFIG_SPL_LIBDISK_SUPPORT
8a45b0ba	215
27019e4a BS	216	#elif CONFIG_SYS_USE_NANDFLASH
	217	#define CONFIG_SPL_NAND_SUPPORT
	218	#define CONFIG_SPL_NAND_DRIVERS
	219	#define CONFIG_SPL_NAND_BASE
	220	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
	221	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	222	#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
	223	#define CONFIG_SYS_NAND_PAGE_COUNT 64
	224	#define CONFIG_SYS_NAND_OOBSIZE 64
	225	#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
	226	#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
e166a831	227	#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
27019e4a	228
8a45b0ba BS	229	#elif CONFIG_SYS_USE_SERIALFLASH
	230	#define CONFIG_SPL_SPI_SUPPORT
	231	#define CONFIG_SPL_SPI_FLASH_SUPPORT
	232	#define CONFIG_SPL_SPI_LOAD
8a45b0ba BS	233	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
8a45b0ba BS	234
c5e8885a BS	235	#endif
c5e8885a BS	236
3225f34e	237	#endif