]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/tegra-common.h
sunxi: Update sunxi-common.h to deal with different DRAM base addr on sun9i
[people/ms/u-boot.git] / include / configs / tegra-common.h
CommitLineData
f01b631f
TW
1/*
2 * (C) Copyright 2010-2012
3 * NVIDIA Corporation <www.nvidia.com>
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
f01b631f
TW
6 */
7
bfcf46db
TW
8#ifndef _TEGRA_COMMON_H_
9#define _TEGRA_COMMON_H_
1ace4022 10#include <linux/sizes.h>
f01b631f
TW
11#include <linux/stringify.h>
12
13/*
14 * High Level Configuration Options
15 */
16#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
f01b631f
TW
17#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
18
f01b631f
TW
19#include <asm/arch/tegra.h> /* get chip and board defs */
20
31df9893
RH
21#define CONFIG_SYS_TIMER_RATE 1000000
22#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
23
f01b631f
TW
24/*
25 * Display CPU and Board information
26 */
27#define CONFIG_DISPLAY_CPUINFO
28#define CONFIG_DISPLAY_BOARDINFO
29
30#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
f01b631f
TW
31
32/* Environment */
33#define CONFIG_ENV_VARS_UBOOT_CONFIG
34#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
35
36/*
37 * Size of malloc() pool
38 */
52a7c98a
PM
39#ifdef CONFIG_DFU_MMC
40#define CONFIG_SYS_MALLOC_LEN ((4 << 20) + \
41 CONFIG_SYS_DFU_DATA_BUF_SIZE)
42#else
f01b631f 43#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
52a7c98a 44#endif
d1e5b406
TR
45
46#define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */
f01b631f
TW
47
48/*
bfcf46db 49 * NS16550 Configuration
f01b631f 50 */
858530a8 51#define CONFIG_TEGRA_SERIAL
858530a8 52#define CONFIG_SYS_NS16550
f01b631f 53
f175603f
SW
54/*
55 * Common HW configuration.
56 * If this varies between SoCs later, move to tegraNN-common.h
57 * Note: This is number of devices, not max device ID.
58 */
59#define CONFIG_SYS_MMC_MAX_DEVICE 4
60
f01b631f
TW
61/*
62 * select serial console configuration
63 */
64#define CONFIG_CONS_INDEX 1
65
66/* allow to overwrite serial and ethaddr */
67#define CONFIG_ENV_OVERWRITE
68#define CONFIG_BAUDRATE 115200
69
70/* include default commands */
71#include <config_cmd_default.h>
72
73/* remove unused commands */
74#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
75#undef CONFIG_CMD_FPGA /* FPGA configuration support */
76#undef CONFIG_CMD_IMI
77#undef CONFIG_CMD_IMLS
78#undef CONFIG_CMD_NFS /* NFS support */
79#undef CONFIG_CMD_NET /* network support */
80
81/* turn on command-line edit/hist/auto */
f01b631f 82#define CONFIG_COMMAND_HISTORY
f01b631f 83
11d9c030 84/* turn on commonly used storage-related commands */
11d9c030 85#define CONFIG_PARTITION_UUIDS
11d9c030
SW
86#define CONFIG_CMD_PART
87
f01b631f
TW
88#define CONFIG_SYS_NO_FLASH
89
90#define CONFIG_CONSOLE_MUX
91#define CONFIG_SYS_CONSOLE_IS_IN_ENV
86bd20b0
SW
92#ifndef CONFIG_SPL_BUILD
93#define CONFIG_SYS_STDIO_DEREGISTER
94#endif
f01b631f
TW
95
96/*
97 * Miscellaneous configurable options
98 */
f01b631f
TW
99#define CONFIG_SYS_PROMPT V_PROMPT
100/*
101 * Increasing the size of the IO buffer as default nfsargs size is more
102 * than 256 and so it is not possible to edit it
103 */
104#define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */
105/* Print Buffer Size */
106#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
107 sizeof(CONFIG_SYS_PROMPT) + 16)
108#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
109/* Boot Argument Buffer Size */
110#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
111
112#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
113#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
114
9dacbb27 115#ifndef CONFIG_SPL_BUILD
4270d5af 116#define CONFIG_USE_ARCH_MEMCPY
9dacbb27 117#endif
4270d5af 118
f01b631f
TW
119/*-----------------------------------------------------------------------
120 * Physical Memory Map
121 */
122#define CONFIG_NR_DRAM_BANKS 1
123#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
124#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
125
126#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
127#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
128
129#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
130
131#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
132#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
133#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
134 CONFIG_SYS_INIT_RAM_SIZE - \
135 GENERATED_GBL_DATA_SIZE)
136
137#define CONFIG_TEGRA_GPIO
138#define CONFIG_CMD_GPIO
139#define CONFIG_CMD_ENTERRCM
f01b631f
TW
140
141/* Defines for SPL */
f01b631f
TW
142#define CONFIG_SPL_FRAMEWORK
143#define CONFIG_SPL_RAM_DEVICE
144#define CONFIG_SPL_BOARD_INIT
145#define CONFIG_SPL_NAND_SIMPLE
6ebc3461 146#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
f01b631f
TW
147 CONFIG_SPL_TEXT_BASE)
148#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
149
150#define CONFIG_SPL_LIBCOMMON_SUPPORT
151#define CONFIG_SPL_LIBGENERIC_SUPPORT
152#define CONFIG_SPL_SERIAL_SUPPORT
153#define CONFIG_SPL_GPIO_SUPPORT
154
dd7f65f6 155#define CONFIG_SYS_GENERIC_BOARD
026baff7
SW
156#define CONFIG_BOARD_EARLY_INIT_F
157#define CONFIG_BOARD_LATE_INIT
3efff99f 158
a885f852
SW
159/* Misc utility code */
160#define CONFIG_BOUNCE_BUFFER
3efff99f 161#define CONFIG_CRC32_VERIFY
dd7f65f6 162
68cf64db
SW
163#ifndef CONFIG_SPL_BUILD
164#include <config_distro_defaults.h>
165#endif
166
f01b631f 167#endif /* _TEGRA_COMMON_H_ */