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xtensa: clean up CONFIG_SYS_TEXT_ADDR
[people/ms/u-boot.git] / include / configs / tegra-common.h
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1/*
2 * (C) Copyright 2010-2012
3 * NVIDIA Corporation <www.nvidia.com>
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
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6 */
7
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8#ifndef _TEGRA_COMMON_H_
9#define _TEGRA_COMMON_H_
1ace4022 10#include <linux/sizes.h>
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11#include <linux/stringify.h>
12
13/*
14 * High Level Configuration Options
15 */
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16#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
17
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18#include <asm/arch/tegra.h> /* get chip and board defs */
19
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20/* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */
21#ifndef CONFIG_ARM64
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22#define CONFIG_SYS_TIMER_RATE 1000000
23#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
f41f0a19 24#endif
31df9893 25
f01b631f 26#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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27
28/* Environment */
29#define CONFIG_ENV_VARS_UBOOT_CONFIG
30#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
31
f01b631f 32/*
bfcf46db 33 * NS16550 Configuration
f01b631f 34 */
1874626b 35#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
f01b631f 36
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37/*
38 * Common HW configuration.
39 * If this varies between SoCs later, move to tegraNN-common.h
40 * Note: This is number of devices, not max device ID.
41 */
42#define CONFIG_SYS_MMC_MAX_DEVICE 4
43
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44/*
45 * select serial console configuration
46 */
47#define CONFIG_CONS_INDEX 1
48
49/* allow to overwrite serial and ethaddr */
50#define CONFIG_ENV_OVERWRITE
f01b631f 51
f01b631f 52/* turn on command-line edit/hist/auto */
a1b343d7 53#define CONFIG_CMDLINE_EDITING
f01b631f 54
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55/*
56 * Increasing the size of the IO buffer as default nfsargs size is more
57 * than 256 and so it is not possible to edit it
58 */
64a4fe74 59#define CONFIG_SYS_CBSIZE (1024 * 2) /* Console I/O Buffer Size */
f01b631f 60/* Print Buffer Size */
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61#define CONFIG_SYS_MAXARGS 64 /* max number of command args */
62
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63/* Boot Argument Buffer Size */
64#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
65
66#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
67#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
68
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69/*-----------------------------------------------------------------------
70 * Physical Memory Map
71 */
bbc1b99e 72#define CONFIG_NR_DRAM_BANKS 2
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73#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
74#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
75
76#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
77#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
78
79#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
80
f097532d 81#ifndef CONFIG_ARM64
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82#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
83#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
84#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
85 CONFIG_SYS_INIT_RAM_SIZE - \
86 GENERATED_GBL_DATA_SIZE)
f097532d 87#endif
f01b631f 88
0d1bd150 89#ifndef CONFIG_ARM64
f01b631f 90/* Defines for SPL */
6ebc3461 91#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
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92 CONFIG_SPL_TEXT_BASE)
93#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
0d1bd150 94#endif
f01b631f 95
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96/* Misc utility code */
97#define CONFIG_BOUNCE_BUFFER
dd7f65f6 98
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99#ifndef CONFIG_SPL_BUILD
100#include <config_distro_defaults.h>
101#endif
102
f01b631f 103#endif /* _TEGRA_COMMON_H_ */