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1/*
2 * (C) Copyright 2010-2012
3 * NVIDIA Corporation <www.nvidia.com>
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
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6 */
7
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8#ifndef _TEGRA_COMMON_H_
9#define _TEGRA_COMMON_H_
1ace4022 10#include <linux/sizes.h>
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11#include <linux/stringify.h>
12
13/*
14 * High Level Configuration Options
15 */
16#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
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17#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
18
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19#include <asm/arch/tegra.h> /* get chip and board defs */
20
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21#define CONFIG_SYS_TIMER_RATE 1000000
22#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
23
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24/*
25 * Display CPU and Board information
26 */
27#define CONFIG_DISPLAY_CPUINFO
28#define CONFIG_DISPLAY_BOARDINFO
29
30#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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31
32/* Environment */
33#define CONFIG_ENV_VARS_UBOOT_CONFIG
34#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
35
36/*
37 * Size of malloc() pool
38 */
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39#ifdef CONFIG_DFU_MMC
40#define CONFIG_SYS_MALLOC_LEN ((4 << 20) + \
41 CONFIG_SYS_DFU_DATA_BUF_SIZE)
42#else
f01b631f 43#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
52a7c98a 44#endif
d1e5b406 45
6527268d 46#ifndef CONFIG_ARM64
d1e5b406 47#define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */
6527268d 48#endif
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49
50/*
bfcf46db 51 * NS16550 Configuration
f01b631f 52 */
858530a8 53#define CONFIG_TEGRA_SERIAL
858530a8 54#define CONFIG_SYS_NS16550
f01b631f 55
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56/*
57 * Common HW configuration.
58 * If this varies between SoCs later, move to tegraNN-common.h
59 * Note: This is number of devices, not max device ID.
60 */
61#define CONFIG_SYS_MMC_MAX_DEVICE 4
62
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63/*
64 * select serial console configuration
65 */
66#define CONFIG_CONS_INDEX 1
67
68/* allow to overwrite serial and ethaddr */
69#define CONFIG_ENV_OVERWRITE
70#define CONFIG_BAUDRATE 115200
71
f01b631f 72/* turn on command-line edit/hist/auto */
f01b631f 73#define CONFIG_COMMAND_HISTORY
f01b631f 74
11d9c030 75/* turn on commonly used storage-related commands */
11d9c030 76#define CONFIG_PARTITION_UUIDS
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77#define CONFIG_CMD_PART
78
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79#define CONFIG_SYS_NO_FLASH
80
81#define CONFIG_CONSOLE_MUX
82#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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83#ifndef CONFIG_SPL_BUILD
84#define CONFIG_SYS_STDIO_DEREGISTER
85#endif
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86
87/*
88 * Miscellaneous configurable options
89 */
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90#define CONFIG_SYS_PROMPT V_PROMPT
91/*
92 * Increasing the size of the IO buffer as default nfsargs size is more
93 * than 256 and so it is not possible to edit it
94 */
95#define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */
96/* Print Buffer Size */
97#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
98 sizeof(CONFIG_SYS_PROMPT) + 16)
0859b49d 99#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
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100/* Boot Argument Buffer Size */
101#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
102
103#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
104#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
105
6527268d 106#ifndef CONFIG_ARM64
9dacbb27 107#ifndef CONFIG_SPL_BUILD
4270d5af 108#define CONFIG_USE_ARCH_MEMCPY
9dacbb27 109#endif
6527268d 110#endif
4270d5af 111
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112/*-----------------------------------------------------------------------
113 * Physical Memory Map
114 */
115#define CONFIG_NR_DRAM_BANKS 1
116#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
117#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
118
119#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
120#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
121
122#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
123
124#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
125#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
126#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
127 CONFIG_SYS_INIT_RAM_SIZE - \
128 GENERATED_GBL_DATA_SIZE)
129
130#define CONFIG_TEGRA_GPIO
131#define CONFIG_CMD_GPIO
132#define CONFIG_CMD_ENTERRCM
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133
134/* Defines for SPL */
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135#define CONFIG_SPL_FRAMEWORK
136#define CONFIG_SPL_RAM_DEVICE
137#define CONFIG_SPL_BOARD_INIT
138#define CONFIG_SPL_NAND_SIMPLE
6ebc3461 139#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
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140 CONFIG_SPL_TEXT_BASE)
141#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
142
143#define CONFIG_SPL_LIBCOMMON_SUPPORT
144#define CONFIG_SPL_LIBGENERIC_SUPPORT
145#define CONFIG_SPL_SERIAL_SUPPORT
146#define CONFIG_SPL_GPIO_SUPPORT
147
dd7f65f6 148#define CONFIG_SYS_GENERIC_BOARD
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149#define CONFIG_BOARD_EARLY_INIT_F
150#define CONFIG_BOARD_LATE_INIT
3efff99f 151
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152/* Misc utility code */
153#define CONFIG_BOUNCE_BUFFER
3efff99f 154#define CONFIG_CRC32_VERIFY
dd7f65f6 155
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156#ifndef CONFIG_SPL_BUILD
157#include <config_distro_defaults.h>
158#endif
159
f01b631f 160#endif /* _TEGRA_COMMON_H_ */