[people/ms/u-boot.git] / include / configs / xilinx_zynqmp.h

/*
 * Configuration for Xilinx ZynqMP
 * (C) Copyright 2014 - 2015 Xilinx, Inc.
 * Michal Simek <michal.simek@xilinx.com>
 *
 * Based on Configuration for Versatile Express
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __XILINX_ZYNQMP_H
#define __XILINX_ZYNQMP_H

#define CONFIG_REMAKE_ELF

/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */

#define CONFIG_SYS_NO_FLASH


/* Generic Interrupt Controller Definitions */
#define CONFIG_GICV2
#define GICD_BASE	0xF9010000
#define GICC_BASE	0xF9020000

#define CONFIG_SYS_ALT_MEMTEST
#define CONFIG_SYS_MEMTEST_SCRATCH	0xfffc0000

#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		CONFIG_SYS_SDRAM_SIZE

/* Have release address at the end of 256MB for now */
#define CPU_RELEASE_ADDR	0xFFFFFF0

/* Cache Definitions */
#define CONFIG_SYS_CACHELINE_SIZE	64

#if !defined(CONFIG_IDENT_STRING)
# define CONFIG_IDENT_STRING		" Xilinx ZynqMP"
#endif

#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x7fff0)

/* Flat Device Tree Definitions */
#define CONFIG_OF_LIBFDT

/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
#if !defined(COUNTER_FREQUENCY)
# define COUNTER_FREQUENCY		100000000
#endif

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 0x2000000)

/* Serial setup */
#if defined(CONFIG_ZYNQMP_DCC)
# define CONFIG_ARM_DCC
# define CONFIG_CPU_ARMV8
#else
# define CONFIG_ZYNQ_SERIAL
#endif

#define CONFIG_CONS_INDEX		0
#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE \
	{ 4800, 9600, 19200, 38400, 57600, 115200 }

/* Command line configuration */
#define CONFIG_CMD_ENV
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_FAT
#define CONFIG_CMD_FS_GENERIC
#define CONFIG_DOS_PARTITION
#define CONFIG_MP

#define CONFIG_CMD_MII

/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_MAY_FAIL
#define CONFIG_BOOTP_SERVERIP

/* SPI */
#ifdef CONFIG_ZYNQ_SPI
# define CONFIG_CMD_SF
#endif

#if defined(CONFIG_ZYNQ_SDHCI)
# define CONFIG_MMC
# define CONFIG_GENERIC_MMC
# define CONFIG_SDHCI
# define CONFIG_CMD_MMC
# ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ
#  define CONFIG_ZYNQ_SDHCI_MAX_FREQ	200000000
# endif
# define CONFIG_FAT_WRITE
# define CONFIG_CMD_EXT4_WRITE
#endif

#ifdef CONFIG_NAND_ARASAN
# define CONFIG_CMD_NAND
# define CONFIG_CMD_NAND_LOCK_UNLOCK
# define CONFIG_SYS_MAX_NAND_DEVICE	1
# define CONFIG_SYS_NAND_SELF_INIT
# define CONFIG_SYS_NAND_ONFI_DETECTION
# define CONFIG_MTD_DEVICE
#endif

/* Miscellaneous configurable options */
#define CONFIG_SYS_LOAD_ADDR		0x8000000

#if defined(CONFIG_ZYNQMP_USB)
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_XHCI
#define CONFIG_USB_MAX_CONTROLLER_COUNT         1
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
#define CONFIG_USB_XHCI_ZYNQMP

#define CONFIG_USB_DWC3
#define CONFIG_USB_DWC3_GADGET

#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_DOWNLOAD
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_USB_GADGET_VBUS_DRAW	2
#define CONFIG_USBDOWNLOAD_GADGET
#define CONFIG_SYS_DFU_DATA_BUF_SIZE	0x1800000
#define DFU_DEFAULT_POLL_TIMEOUT	300
#define CONFIG_USB_FUNCTION_DFU
#define CONFIG_DFU_RAM
#define CONFIG_G_DNL_VENDOR_NUM		0x03FD
#define CONFIG_G_DNL_PRODUCT_NUM	0x0300
#define CONFIG_G_DNL_MANUFACTURER	"Xilinx"
#define CONFIG_USB_CABLE_CHECK
#define CONFIG_CMD_DFU
#define CONFIG_CMD_THOR_DOWNLOAD
#define CONFIG_USB_FUNCTION_THOR
#define CONFIG_THOR_RESET_OFF
#define DFU_ALT_INFO_RAM \
	"dfu_ram_info=" \
	"setenv dfu_alt_info " \
	"Image ram $kernel_addr $kernel_size\\\\;" \
	"system.dtb ram $fdt_addr $fdt_size\0" \
	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"

#define DFU_ALT_INFO  \
		DFU_ALT_INFO_RAM
#endif

#if !defined(DFU_ALT_INFO)
# define DFU_ALT_INFO
#endif

/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
	"kernel_addr=0x80000\0" \
	"fdt_addr=0x7000000\0" \
	"fdt_high=0x10000000\0" \
	"kernel_size=0x2000000\0" \
	"fdt_size=0x80000\0" \
	"sdbootdev=0\0"\
	"sdboot=mmc dev $sdbootdev && mmcinfo && load mmc $sdbootdev:$partid $fdt_addr system.dtb && " \
		"load mmc $sdbootdev:$partid $kernel_addr Image && " \
		"booti $kernel_addr - $fdt_addr\0" \
	DFU_ALT_INFO

#define CONFIG_PREBOOT		"run bootargs"
#define CONFIG_BOOTCOMMAND	"run $modeboot"
#define CONFIG_BOOTDELAY	5

#define CONFIG_BOARD_LATE_INIT

/* Do not preserve environment */
#define CONFIG_ENV_IS_NOWHERE		1
#define CONFIG_ENV_SIZE			0x1000

/* Monitor Command Prompt */
/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE		2048
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_MAXARGS		64

/* Ethernet driver */
#if defined(CONFIG_ZYNQ_GEM)
# define CONFIG_NET_MULTI
# define CONFIG_MII
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
# define CONFIG_PHY_MARVELL
# define CONFIG_PHY_NATSEMI
# define CONFIG_PHY_TI
# define CONFIG_PHY_GIGE
# define PHY_ANEG_TIMEOUT       20000
#endif

/* I2C */
#if defined(CONFIG_SYS_I2C_ZYNQ)
# define CONFIG_CMD_I2C
# define CONFIG_SYS_I2C
# define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
# define CONFIG_SYS_I2C_ZYNQ_SLAVE		0
#endif

/* EEPROM */
#ifdef CONFIG_ZYNQMP_EEPROM
# define CONFIG_CMD_EEPROM
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
# define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
# define CONFIG_SYS_EEPROM_SIZE			(64 * 1024)
#endif

#ifdef CONFIG_AHCI
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
#define CONFIG_SYS_SCSI_MAX_LUN		1
#define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
					 CONFIG_SYS_SCSI_MAX_LUN)
#define CONFIG_CMD_SCSI
#endif

#define CONFIG_SYS_BOOTM_LEN	(60 * 1024 * 1024)

#define CONFIG_CMD_BOOTI
#define CONFIG_CMD_UNZIP

#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_CLOCKS

#endif /* __XILINX_ZYNQMP_H */
Commit	Line	Data
84c7204b MS	1	/*
	2	* Configuration for Xilinx ZynqMP
	3	* (C) Copyright 2014 - 2015 Xilinx, Inc.
	4	* Michal Simek <michal.simek@xilinx.com>
	5	*
	6	* Based on Configuration for Versatile Express
	7	*
	8	* SPDX-License-Identifier: GPL-2.0+
	9	*/
	10
	11	#ifndef __XILINX_ZYNQMP_H
	12	#define __XILINX_ZYNQMP_H
	13
	14	#define CONFIG_REMAKE_ELF
	15
	16	/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */
	17
	18	#define CONFIG_SYS_NO_FLASH
	19
84c7204b MS	20
	21	/* Generic Interrupt Controller Definitions */
	22	#define CONFIG_GICV2
	23	#define GICD_BASE 0xF9010000
	24	#define GICC_BASE 0xF9020000
	25
d759512f MS	26	#define CONFIG_SYS_ALT_MEMTEST
	27	#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000
	28
84c7204b MS	29	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
	30	#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_SDRAM_SIZE
	31
	32	/* Have release address at the end of 256MB for now */
	33	#define CPU_RELEASE_ADDR 0xFFFFFF0
	34
	35	/* Cache Definitions */
222b2129	36	#define CONFIG_SYS_CACHELINE_SIZE 64
84c7204b	37
15c3eb53 MS	38	#if !defined(CONFIG_IDENT_STRING)
	39	# define CONFIG_IDENT_STRING " Xilinx ZynqMP"
	40	#endif
84c7204b	41
84c7204b MS	42	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
	43
	44	/* Flat Device Tree Definitions */
	45	#define CONFIG_OF_LIBFDT
	46
	47	/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
713b6164 MS	48	#if !defined(COUNTER_FREQUENCY)
	49	# define COUNTER_FREQUENCY 100000000
	50	#endif
84c7204b MS	51
84c7204b MS	52	/* Size of malloc() pool */
16fa00a7	53	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 0x2000000)
84c7204b MS	54
84c7204b MS	55	/* Serial setup */
b0d18bee SDPP	56	#if defined(CONFIG_ZYNQMP_DCC)
	57	# define CONFIG_ARM_DCC
	58	# define CONFIG_CPU_ARMV8
	59	#else
42800ffa	60	# define CONFIG_ZYNQ_SERIAL
b0d18bee	61	#endif
84c7204b MS	62
	63	#define CONFIG_CONS_INDEX 0
	64	#define CONFIG_BAUDRATE 115200
	65	#define CONFIG_SYS_BAUDRATE_TABLE \
	66	{ 4800, 9600, 19200, 38400, 57600, 115200 }
	67
	68	/* Command line configuration */
	69	#define CONFIG_CMD_ENV
	70	#define CONFIG_CMD_EXT2
	71	#define CONFIG_CMD_EXT4
	72	#define CONFIG_CMD_FAT
5af37bd0	73	#define CONFIG_CMD_FS_GENERIC
84c7204b	74	#define CONFIG_DOS_PARTITION
5cb24200	75	#define CONFIG_MP
84c7204b	76
cb7ea820 MS	77	#define CONFIG_CMD_MII
	78
	79	/* BOOTP options */
	80	#define CONFIG_BOOTP_BOOTFILESIZE
	81	#define CONFIG_BOOTP_BOOTPATH
	82	#define CONFIG_BOOTP_GATEWAY
	83	#define CONFIG_BOOTP_HOSTNAME
	84	#define CONFIG_BOOTP_MAY_FAIL
	85	#define CONFIG_BOOTP_SERVERIP
	86
48d7260d SDPP	87	/* SPI */
48d7260d SDPP	88	#ifdef CONFIG_ZYNQ_SPI
48d7260d SDPP	89	# define CONFIG_CMD_SF
	90	#endif
	91
ce0335f2	92	#if defined(CONFIG_ZYNQ_SDHCI)
84c7204b MS	93	# define CONFIG_MMC
	94	# define CONFIG_GENERIC_MMC
	95	# define CONFIG_SDHCI
84c7204b	96	# define CONFIG_CMD_MMC
f3bd7280 MS	97	# ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ
	98	# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 200000000
	99	# endif
84c7204b MS	100	# define CONFIG_FAT_WRITE
	101	# define CONFIG_CMD_EXT4_WRITE
	102	#endif
	103
78cb965a SDPP	104	#ifdef CONFIG_NAND_ARASAN
	105	# define CONFIG_CMD_NAND
	106	# define CONFIG_CMD_NAND_LOCK_UNLOCK
	107	# define CONFIG_SYS_MAX_NAND_DEVICE 1
	108	# define CONFIG_SYS_NAND_SELF_INIT
	109	# define CONFIG_SYS_NAND_ONFI_DETECTION
	110	# define CONFIG_MTD_DEVICE
	111	#endif
	112
84c7204b MS	113	/* Miscellaneous configurable options */
	114	#define CONFIG_SYS_LOAD_ADDR 0x8000000
	115
16fa00a7	116	#if defined(CONFIG_ZYNQMP_USB)
0f676767 SDPP	117	#define CONFIG_USB_XHCI_DWC3
	118	#define CONFIG_USB_XHCI
	119	#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
	120	#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
	121	#define CONFIG_CMD_USB
	122	#define CONFIG_USB_STORAGE
	123	#define CONFIG_USB_XHCI_ZYNQMP
	124
16fa00a7 SDPP	125	#define CONFIG_USB_DWC3
	126	#define CONFIG_USB_DWC3_GADGET
	127
	128	#define CONFIG_USB_GADGET
	129	#define CONFIG_USB_GADGET_DOWNLOAD
	130	#define CONFIG_USB_GADGET_DUALSPEED
	131	#define CONFIG_USB_GADGET_VBUS_DRAW 2
	132	#define CONFIG_USBDOWNLOAD_GADGET
	133	#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x1800000
	134	#define DFU_DEFAULT_POLL_TIMEOUT 300
	135	#define CONFIG_USB_FUNCTION_DFU
	136	#define CONFIG_DFU_RAM
	137	#define CONFIG_G_DNL_VENDOR_NUM 0x03FD
	138	#define CONFIG_G_DNL_PRODUCT_NUM 0x0300
	139	#define CONFIG_G_DNL_MANUFACTURER "Xilinx"
	140	#define CONFIG_USB_CABLE_CHECK
	141	#define CONFIG_CMD_DFU
	142	#define CONFIG_CMD_THOR_DOWNLOAD
	143	#define CONFIG_USB_FUNCTION_THOR
	144	#define CONFIG_THOR_RESET_OFF
	145	#define DFU_ALT_INFO_RAM \
	146	"dfu_ram_info=" \
0e43140b	147	"setenv dfu_alt_info " \
1b19daf4 SDPP	148	"Image ram $kernel_addr $kernel_size\\\\;" \
1b19daf4 SDPP	149	"system.dtb ram $fdt_addr $fdt_size\0" \
16fa00a7 SDPP	150	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
	151	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
	152
	153	#define DFU_ALT_INFO \
	154	DFU_ALT_INFO_RAM
	155	#endif
	156
	157	#if !defined(DFU_ALT_INFO)
	158	# define DFU_ALT_INFO
	159	#endif
	160
84c7204b MS	161	/* Initial environment variables */
	162	#define CONFIG_EXTRA_ENV_SETTINGS \
	163	"kernel_addr=0x80000\0" \
	164	"fdt_addr=0x7000000\0" \
	165	"fdt_high=0x10000000\0" \
1b19daf4 SDPP	166	"kernel_size=0x2000000\0" \
1b19daf4 SDPP	167	"fdt_size=0x80000\0" \
2d9925bc MS	168	"sdbootdev=0\0"\
	169	"sdboot=mmc dev $sdbootdev && mmcinfo && load mmc $sdbootdev:$partid $fdt_addr system.dtb && " \
	170	"load mmc $sdbootdev:$partid $kernel_addr Image && " \
	171	"booti $kernel_addr - $fdt_addr\0" \
16fa00a7	172	DFU_ALT_INFO
84c7204b	173
84c7204b MS	174	#define CONFIG_PREBOOT "run bootargs"
	175	#define CONFIG_BOOTCOMMAND "run $modeboot"
	176	#define CONFIG_BOOTDELAY 5
	177
	178	#define CONFIG_BOARD_LATE_INIT
	179
	180	/* Do not preserve environment */
	181	#define CONFIG_ENV_IS_NOWHERE 1
	182	#define CONFIG_ENV_SIZE 0x1000
	183
	184	/* Monitor Command Prompt */
	185	/* Console I/O Buffer Size */
	186	#define CONFIG_SYS_CBSIZE 2048
84c7204b MS	187	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	188	sizeof(CONFIG_SYS_PROMPT) + 16)
	189	#define CONFIG_SYS_HUSH_PARSER
	190	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	191	#define CONFIG_SYS_LONGHELP
	192	#define CONFIG_CMDLINE_EDITING
	193	#define CONFIG_SYS_MAXARGS 64
	194
cb7ea820	195	/* Ethernet driver */
596e5782	196	#if defined(CONFIG_ZYNQ_GEM)
cb7ea820	197	# define CONFIG_NET_MULTI
cb7ea820 MS	198	# define CONFIG_MII
cb7ea820 MS	199	# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
cb7ea820	200	# define CONFIG_PHY_MARVELL
f96fe2c0	201	# define CONFIG_PHY_NATSEMI
bf146325	202	# define CONFIG_PHY_TI
c4c96f2b	203	# define CONFIG_PHY_GIGE
e2928f32	204	# define PHY_ANEG_TIMEOUT 20000
cb7ea820 MS	205	#endif
cb7ea820 MS	206
2594e03c SDPP	207	/* I2C */
	208	#if defined(CONFIG_SYS_I2C_ZYNQ)
	209	# define CONFIG_CMD_I2C
	210	# define CONFIG_SYS_I2C
	211	# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
	212	# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
	213	#endif
	214
2594e03c SDPP	215	/* EEPROM */
	216	#ifdef CONFIG_ZYNQMP_EEPROM
	217	# define CONFIG_CMD_EEPROM
	218	# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
	219	# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
	220	# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
	221	# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
	222	# define CONFIG_SYS_EEPROM_SIZE (64 * 1024)
	223	#endif
	224
6fe6f135 MS	225	#ifdef CONFIG_AHCI
	226	#define CONFIG_LIBATA
	227	#define CONFIG_SCSI_AHCI
	228	#define CONFIG_SCSI_AHCI_PLAT
	229	#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
	230	#define CONFIG_SYS_SCSI_MAX_LUN 1
	231	#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
	232	CONFIG_SYS_SCSI_MAX_LUN)
	233	#define CONFIG_CMD_SCSI
	234	#endif
	235
84c7204b MS	236	#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
	237
	238	#define CONFIG_CMD_BOOTI
	239	#define CONFIG_CMD_UNZIP
	240
	241	#define CONFIG_BOARD_EARLY_INIT_R
	242	#define CONFIG_CLOCKS
	243
	244	#endif /* __XILINX_ZYNQMP_H */