[people/ms/u-boot.git] / include / configs / zynq-common.h

/*
 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
 * (C) Copyright 2013 Xilinx, Inc.
 *
 * Common configuration options for all Zynq boards.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_ZYNQ_COMMON_H
#define __CONFIG_ZYNQ_COMMON_H

/* CPU clock */
#ifndef CONFIG_CPU_FREQ_HZ
# define CONFIG_CPU_FREQ_HZ	800000000
#endif

/* Cache options */
#define CONFIG_CMD_CACHE
#define CONFIG_SYS_CACHELINE_SIZE	32

#define CONFIG_SYS_L2CACHE_OFF
#ifndef CONFIG_SYS_L2CACHE_OFF
# define CONFIG_SYS_L2_PL310
# define CONFIG_SYS_PL310_BASE		0xf8f02000
#endif

/* Serial drivers */
#define CONFIG_BAUDRATE		115200
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE  \
	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}

/* DCC driver */
#if defined(CONFIG_ZYNQ_DCC)
# define CONFIG_ARM_DCC
# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */
#else
# define CONFIG_ZYNQ_SERIAL
#endif

/* Ethernet driver */
#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1)
# define CONFIG_NET_MULTI
# define CONFIG_ZYNQ_GEM
# define CONFIG_MII
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
# define CONFIG_PHYLIB
# define CONFIG_PHY_MARVELL
#endif

/* SPI */
#ifdef CONFIG_ZYNQ_SPI
# define CONFIG_SPI_FLASH
# define CONFIG_SPI_FLASH_SST
# define CONFIG_CMD_SF
#endif

/* NOR */
#ifndef CONFIG_SYS_NO_FLASH
# define CONFIG_SYS_FLASH_BASE		0xE2000000
# define CONFIG_SYS_FLASH_SIZE		(16 * 1024 * 1024)
# define CONFIG_SYS_MAX_FLASH_BANKS	1
# define CONFIG_SYS_MAX_FLASH_SECT	512
# define CONFIG_SYS_FLASH_ERASE_TOUT	1000
# define CONFIG_SYS_FLASH_WRITE_TOUT	5000
# define CONFIG_FLASH_SHOW_PROGRESS	10
# define CONFIG_SYS_FLASH_CFI
# undef CONFIG_SYS_FLASH_EMPTY_INFO
# define CONFIG_FLASH_CFI_DRIVER
# undef CONFIG_SYS_FLASH_PROTECTION
# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#endif

/* MMC */
#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
# define CONFIG_MMC
# define CONFIG_GENERIC_MMC
# define CONFIG_SDHCI
# define CONFIG_ZYNQ_SDHCI
# define CONFIG_CMD_MMC
#endif

#ifdef CONFIG_ZYNQ_USB
# define CONFIG_USB_EHCI
# define CONFIG_CMD_USB
# define CONFIG_USB_STORAGE
# define CONFIG_USB_EHCI_ZYNQ
# define CONFIG_USB_ULPI_VIEWPORT
# define CONFIG_USB_ULPI
# define CONFIG_EHCI_IS_TDI
# define CONFIG_USB_MAX_CONTROLLER_COUNT	2
#endif

#if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB)
# define CONFIG_SUPPORT_VFAT
# define CONFIG_CMD_FAT
# define CONFIG_CMD_EXT2
# define CONFIG_FAT_WRITE
# define CONFIG_DOS_PARTITION
# define CONFIG_CMD_EXT4
# define CONFIG_CMD_EXT4_WRITE
#endif

#define CONFIG_SYS_I2C_ZYNQ
/* I2C */
#if defined(CONFIG_SYS_I2C_ZYNQ)
# define CONFIG_CMD_I2C
# define CONFIG_SYS_I2C
# define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
# define CONFIG_SYS_I2C_ZYNQ_SLAVE		0
#endif

/* EEPROM */
#ifdef CONFIG_ZYNQ_EEPROM
# define CONFIG_CMD_EEPROM
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
# define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
# define CONFIG_SYS_EEPROM_SIZE			1024 /* Bytes */
#endif

#define CONFIG_BOOTP_SERVERIP
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_MAY_FAIL

/* Total Size of Environment Sector */
#define CONFIG_ENV_SIZE			(128 << 10)

/* Allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

/* Environment */
#ifndef CONFIG_ENV_IS_NOWHERE
# ifndef CONFIG_SYS_NO_FLASH
#  define CONFIG_ENV_IS_IN_FLASH
# elif defined(CONFIG_SYS_NO_FLASH)
#  define CONFIG_ENV_IS_NOWHERE
# endif

# define CONFIG_ENV_SECT_SIZE		CONFIG_ENV_SIZE
# define CONFIG_ENV_OFFSET		0xE0000
# define CONFIG_CMD_SAVEENV
#endif

/* Default environment */
#define CONFIG_EXTRA_ENV_SETTINGS	\
	"fit_image=fit.itb\0"		\
	"load_addr=0x2000000\0"		\
	"fit_size=0x800000\0"		\
	"flash_off=0x100000\0"		\
	"nor_flash_off=0xE2100000\0"	\
	"fdt_high=0x20000000\0"		\
	"initrd_high=0x20000000\0"	\
	"norboot=echo Copying FIT from NOR flash to RAM... && " \
		"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
		"bootm ${load_addr}\0" \
	"sdboot=echo Copying FIT from SD to RAM... && " \
		"fatload mmc 0 ${load_addr} ${fit_image} && " \
		"bootm ${load_addr}\0" \
	"jtagboot=echo TFTPing FIT to RAM... && " \
		"tftpboot ${load_addr} ${fit_image} && " \
		"bootm ${load_addr}\0" \
	"usbboot=if usb start; then " \
			"echo Copying FIT from USB to RAM... && " \
			"fatload usb 0 ${load_addr} ${fit_image} && " \
			"bootm ${load_addr}\0" \
		"fi\0"

#define CONFIG_BOOTCOMMAND		"run $modeboot"
#define CONFIG_BOOTDELAY		3 /* -1 to Disable autoboot */
#define CONFIG_SYS_LOAD_ADDR		0 /* default? */

/* Miscellaneous configurable options */
#define CONFIG_SYS_PROMPT		"zynq-uboot> "
#define CONFIG_SYS_HUSH_PARSER

#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_SYS_LONGHELP
#define CONFIG_CLOCKS
#define CONFIG_CMD_CLK
#define CONFIG_SYS_MAXARGS		32 /* max number of command args */
#define CONFIG_SYS_CBSIZE		256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)

/* Physical Memory map */
#define CONFIG_SYS_TEXT_BASE		0x4000000

#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE		0

#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x1000)

#define CONFIG_SYS_MALLOC_LEN		0x400000
#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_MALLOC_LEN
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					CONFIG_SYS_INIT_RAM_SIZE - \
					GENERATED_GBL_DATA_SIZE)

/* Enable the PL to be downloaded */
#define CONFIG_FPGA
#define CONFIG_FPGA_XILINX
#define CONFIG_FPGA_ZYNQPL
#define CONFIG_CMD_FPGA
#define CONFIG_CMD_FPGA_LOADMK
#define CONFIG_CMD_FPGA_LOADP
#define CONFIG_CMD_FPGA_LOADBP
#define CONFIG_CMD_FPGA_LOADFS

/* Open Firmware flat tree */
#define CONFIG_OF_LIBFDT

/* FIT support */
#define CONFIG_FIT
#define CONFIG_FIT_VERBOSE	1 /* enable fit_format_{error,warning}() */
#define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */

/* FDT support */
#define CONFIG_DISPLAY_BOARDINFO_LATE

/* RSA support */
#define CONFIG_FIT_SIGNATURE
#define CONFIG_RSA

/* Extend size of kernel image for uncompression */
#define CONFIG_SYS_BOOTM_LEN	(60 * 1024 * 1024)

/* Boot FreeBSD/vxWorks from an ELF image */
#if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
# define CONFIG_API
# define CONFIG_CMD_ELF
# define CONFIG_SYS_MMC_MAX_DEVICE	1
#endif

#define CONFIG_SYS_LDSCRIPT  "arch/arm/cpu/armv7/zynq/u-boot.lds"

/* Commands */
#include <config_cmd_default.h>

#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMD_TFTPPUT

/* SPL part */
#define CONFIG_CMD_SPL
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_BOARD_INIT

#define CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/armv7/zynq/u-boot-spl.lds"

/* MMC support */
#ifdef CONFIG_ZYNQ_SDHCI0
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION    1
#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME     "u-boot-dtb.img"
#endif

/* Disable dcache for SPL just for sure */
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_DCACHE_OFF
#undef CONFIG_FPGA
#endif

/* Address in RAM where the parameters must be copied by SPL. */
#define CONFIG_SYS_SPL_ARGS_ADDR	0x10000000

#define CONFIG_SPL_FS_LOAD_ARGS_NAME		"system.dtb"
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME		"uImage"

/* Not using MMC raw mode - just for compilation purpose */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0

/* qspi mode is working fine */
#ifdef CONFIG_ZYNQ_QSPI
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x100000
#endif

/* for booting directly linux */
#define CONFIG_SPL_OS_BOOT

/* SP location before relocation, must use scratch RAM */
#define CONFIG_SPL_TEXT_BASE	0x0

/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
#define CONFIG_SPL_MAX_SIZE	0x30000

/* The highest 64k OCM address */
#define OCM_HIGH_ADDR	0xffff0000

/* Just define any reasonable size */
#define CONFIG_SPL_STACK_SIZE	0x1000

/* SPL stack position - and stack goes down */
#define CONFIG_SPL_STACK	(OCM_HIGH_ADDR + CONFIG_SPL_STACK_SIZE)

/* On the top of OCM space */
#define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_STACK + \
					 GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x1000

/* BSS setup */
#define CONFIG_SPL_BSS_START_ADDR	0x100000
#define CONFIG_SPL_BSS_MAX_SIZE		0x100000

#define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE

#define CONFIG_SYS_GENERIC_BOARD

#endif /* __CONFIG_ZYNQ_COMMON_H */
Commit	Line	Data
f22651cf MS	1	/*
f22651cf MS	2	* (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
06fe8dae JT	3	* (C) Copyright 2013 Xilinx, Inc.
	4	*
	5	* Common configuration options for all Zynq boards.
f22651cf	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
f22651cf MS	8	*/
f22651cf MS	9
06fe8dae JT	10	#ifndef __CONFIG_ZYNQ_COMMON_H
06fe8dae JT	11	#define __CONFIG_ZYNQ_COMMON_H
f22651cf	12
f22651cf	13	/* CPU clock */
53e49f74 JT	14	#ifndef CONFIG_CPU_FREQ_HZ
	15	# define CONFIG_CPU_FREQ_HZ 800000000
	16	#endif
f22651cf	17
8cfac504 JT	18	/* Cache options */
	19	#define CONFIG_CMD_CACHE
	20	#define CONFIG_SYS_CACHELINE_SIZE 32
	21
	22	#define CONFIG_SYS_L2CACHE_OFF
	23	#ifndef CONFIG_SYS_L2CACHE_OFF
	24	# define CONFIG_SYS_L2_PL310
	25	# define CONFIG_SYS_PL310_BASE 0xf8f02000
	26	#endif
	27
53e49f74 JT	28	/* Serial drivers */
53e49f74 JT	29	#define CONFIG_BAUDRATE 115200
f22651cf MS	30	/* The following table includes the supported baudrates */
	31	#define CONFIG_SYS_BAUDRATE_TABLE \
	32	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
	33
53e49f74 JT	34	/* DCC driver */
	35	#if defined(CONFIG_ZYNQ_DCC)
	36	# define CONFIG_ARM_DCC
	37	# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */
bf834950 MS	38	#else
bf834950 MS	39	# define CONFIG_ZYNQ_SERIAL
53e49f74 JT	40	#endif
53e49f74 JT	41
f22651cf	42	/* Ethernet driver */
88fcfb1c JT	43	#if defined(CONFIG_ZYNQ_GEM0) \|\| defined(CONFIG_ZYNQ_GEM1)
	44	# define CONFIG_NET_MULTI
	45	# define CONFIG_ZYNQ_GEM
	46	# define CONFIG_MII
	47	# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
	48	# define CONFIG_PHYLIB
	49	# define CONFIG_PHY_MARVELL
	50	#endif
f22651cf	51
53e49f74 JT	52	/* SPI */
	53	#ifdef CONFIG_ZYNQ_SPI
	54	# define CONFIG_SPI_FLASH
	55	# define CONFIG_SPI_FLASH_SST
	56	# define CONFIG_CMD_SF
	57	#endif
	58
fe5eddbf JT	59	/* NOR */
	60	#ifndef CONFIG_SYS_NO_FLASH
	61	# define CONFIG_SYS_FLASH_BASE 0xE2000000
	62	# define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
	63	# define CONFIG_SYS_MAX_FLASH_BANKS 1
	64	# define CONFIG_SYS_MAX_FLASH_SECT 512
	65	# define CONFIG_SYS_FLASH_ERASE_TOUT 1000
	66	# define CONFIG_SYS_FLASH_WRITE_TOUT 5000
	67	# define CONFIG_FLASH_SHOW_PROGRESS 10
	68	# define CONFIG_SYS_FLASH_CFI
	69	# undef CONFIG_SYS_FLASH_EMPTY_INFO
	70	# define CONFIG_FLASH_CFI_DRIVER
	71	# undef CONFIG_SYS_FLASH_PROTECTION
	72	# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
	73	#endif
	74
293eb33f MS	75	/* MMC */
	76	#if defined(CONFIG_ZYNQ_SDHCI0) \|\| defined(CONFIG_ZYNQ_SDHCI1)
	77	# define CONFIG_MMC
	78	# define CONFIG_GENERIC_MMC
	79	# define CONFIG_SDHCI
	80	# define CONFIG_ZYNQ_SDHCI
	81	# define CONFIG_CMD_MMC
293eb33f MS	82	#endif
293eb33f MS	83
c6024c8e SDPP	84	#ifdef CONFIG_ZYNQ_USB
	85	# define CONFIG_USB_EHCI
	86	# define CONFIG_CMD_USB
	87	# define CONFIG_USB_STORAGE
c6024c8e SDPP	88	# define CONFIG_USB_EHCI_ZYNQ
	89	# define CONFIG_USB_ULPI_VIEWPORT
	90	# define CONFIG_USB_ULPI
	91	# define CONFIG_EHCI_IS_TDI
	92	# define CONFIG_USB_MAX_CONTROLLER_COUNT 2
	93	#endif
	94
47b35a51	95	#if defined(CONFIG_ZYNQ_SDHCI) \|\| defined(CONFIG_ZYNQ_USB)
293eb33f	96	# define CONFIG_SUPPORT_VFAT
47b35a51	97	# define CONFIG_CMD_FAT
293eb33f	98	# define CONFIG_CMD_EXT2
47b35a51	99	# define CONFIG_FAT_WRITE
293eb33f	100	# define CONFIG_DOS_PARTITION
2e38a906 SDPP	101	# define CONFIG_CMD_EXT4
2e38a906 SDPP	102	# define CONFIG_CMD_EXT4_WRITE
293eb33f MS	103	#endif
293eb33f MS	104
18948632	105	#define CONFIG_SYS_I2C_ZYNQ
8934f784	106	/* I2C */
18948632	107	#if defined(CONFIG_SYS_I2C_ZYNQ)
8934f784	108	# define CONFIG_CMD_I2C
0bdffe71	109	# define CONFIG_SYS_I2C
0bdffe71	110	# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
18948632	111	# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
8934f784 MS	112	#endif
8934f784 MS	113
65da1efd JT	114	/* EEPROM */
	115	#ifdef CONFIG_ZYNQ_EEPROM
	116	# define CONFIG_CMD_EEPROM
	117	# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
	118	# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
	119	# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
	120	# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
	121	# define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */
	122	#endif
	123
f22651cf MS	124	#define CONFIG_BOOTP_SERVERIP
	125	#define CONFIG_BOOTP_BOOTPATH
	126	#define CONFIG_BOOTP_GATEWAY
	127	#define CONFIG_BOOTP_HOSTNAME
	128	#define CONFIG_BOOTP_MAY_FAIL
	129
18eee22f JT	130	/* Total Size of Environment Sector */
	131	#define CONFIG_ENV_SIZE (128 << 10)
	132
b660ca13 JT	133	/* Allow to overwrite serial and ethaddr */
	134	#define CONFIG_ENV_OVERWRITE
	135
f22651cf	136	/* Environment */
ed53e4d6 JT	137	#ifndef CONFIG_ENV_IS_NOWHERE
	138	# ifndef CONFIG_SYS_NO_FLASH
	139	# define CONFIG_ENV_IS_IN_FLASH
	140	# elif defined(CONFIG_SYS_NO_FLASH)
	141	# define CONFIG_ENV_IS_NOWHERE
	142	# endif
	143
	144	# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
	145	# define CONFIG_ENV_OFFSET 0xE0000
	146	# define CONFIG_CMD_SAVEENV
	147	#endif
e83f61a6 JT	148
	149	/* Default environment */
	150	#define CONFIG_EXTRA_ENV_SETTINGS \
	151	"fit_image=fit.itb\0" \
	152	"load_addr=0x2000000\0" \
	153	"fit_size=0x800000\0" \
	154	"flash_off=0x100000\0" \
	155	"nor_flash_off=0xE2100000\0" \
	156	"fdt_high=0x20000000\0" \
	157	"initrd_high=0x20000000\0" \
	158	"norboot=echo Copying FIT from NOR flash to RAM... && " \
	159	"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
	160	"bootm ${load_addr}\0" \
	161	"sdboot=echo Copying FIT from SD to RAM... && " \
	162	"fatload mmc 0 ${load_addr} ${fit_image} && " \
	163	"bootm ${load_addr}\0" \
	164	"jtagboot=echo TFTPing FIT to RAM... && " \
dfa94058	165	"tftpboot ${load_addr} ${fit_image} && " \
c6024c8e SDPP	166	"bootm ${load_addr}\0" \
	167	"usbboot=if usb start; then " \
	168	"echo Copying FIT from USB to RAM... && " \
	169	"fatload usb 0 ${load_addr} ${fit_image} && " \
	170	"bootm ${load_addr}\0" \
	171	"fi\0"
	172
e83f61a6 JT	173	#define CONFIG_BOOTCOMMAND "run $modeboot"
	174	#define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */
	175	#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
f22651cf	176
36e0e197 JT	177	/* Miscellaneous configurable options */
	178	#define CONFIG_SYS_PROMPT "zynq-uboot> "
	179	#define CONFIG_SYS_HUSH_PARSER
	180
	181	#define CONFIG_CMDLINE_EDITING
	182	#define CONFIG_AUTO_COMPLETE
b3de9249	183	#define CONFIG_BOARD_LATE_INIT
36e0e197	184	#define CONFIG_SYS_LONGHELP
6c3e61de	185	#define CONFIG_CLOCKS
d6c9bbaa	186	#define CONFIG_CMD_CLK
841426ad	187	#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
36e0e197 JT	188	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
36e0e197 JT	189	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
f22651cf MS	190	sizeof(CONFIG_SYS_PROMPT) + 16)
f22651cf MS	191
7cd04192	192	/* Physical Memory map */
0f5c2156	193	#define CONFIG_SYS_TEXT_BASE 0x4000000
f22651cf	194
7cd04192 JT	195	#define CONFIG_NR_DRAM_BANKS 1
7cd04192 JT	196	#define CONFIG_SYS_SDRAM_BASE 0
7cd04192 JT	197
	198	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
	199	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
	200
53e49f74	201	#define CONFIG_SYS_MALLOC_LEN 0x400000
7cd04192 JT	202	#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE
	203	#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
	204	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	205	CONFIG_SYS_INIT_RAM_SIZE - \
	206	GENERATED_GBL_DATA_SIZE)
53e49f74 JT	207
	208	/* Enable the PL to be downloaded */
	209	#define CONFIG_FPGA
	210	#define CONFIG_FPGA_XILINX
	211	#define CONFIG_FPGA_ZYNQPL
	212	#define CONFIG_CMD_FPGA
64e809af	213	#define CONFIG_CMD_FPGA_LOADMK
26ea9ce5 MS	214	#define CONFIG_CMD_FPGA_LOADP
26ea9ce5 MS	215	#define CONFIG_CMD_FPGA_LOADBP
1a897668	216	#define CONFIG_CMD_FPGA_LOADFS
53e49f74 JT	217
	218	/* Open Firmware flat tree */
	219	#define CONFIG_OF_LIBFDT
	220
	221	/* FIT support */
f22651cf	222	#define CONFIG_FIT
773590eb	223	#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
21d29f7f	224	#define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
f22651cf	225
f8f36c5d	226	/* FDT support */
f8f36c5d JT	227	#define CONFIG_DISPLAY_BOARDINFO_LATE
f8f36c5d JT	228
a8826eb4 JT	229	/* RSA support */
	230	#define CONFIG_FIT_SIGNATURE
	231	#define CONFIG_RSA
	232
ae9f4899	233	/* Extend size of kernel image for uncompression */
3d456eec	234	#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
ae9f4899	235
09ed635b JT	236	/* Boot FreeBSD/vxWorks from an ELF image */
	237	#if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
	238	# define CONFIG_API
	239	# define CONFIG_CMD_ELF
	240	# define CONFIG_SYS_MMC_MAX_DEVICE 1
	241	#endif
	242
38716189 MS	243	#define CONFIG_SYS_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot.lds"
38716189 MS	244
f22651cf MS	245	/* Commands */
	246	#include <config_cmd_default.h>
	247
	248	#define CONFIG_CMD_PING
	249	#define CONFIG_CMD_DHCP
	250	#define CONFIG_CMD_MII
427b2d4e	251	#define CONFIG_CMD_TFTPPUT
f22651cf	252
d7e269cf	253	/* SPL part */
d7e269cf MS	254	#define CONFIG_CMD_SPL
	255	#define CONFIG_SPL_FRAMEWORK
	256	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	257	#define CONFIG_SPL_LIBGENERIC_SUPPORT
	258	#define CONFIG_SPL_SERIAL_SUPPORT
1540fb72	259	#define CONFIG_SPL_BOARD_INIT
d7e269cf MS	260
	261	#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot-spl.lds"
	262
d7e269cf MS	263	/* MMC support */
	264	#ifdef CONFIG_ZYNQ_SDHCI0
	265	#define CONFIG_SPL_MMC_SUPPORT
	266	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
	267	#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
205b4f33	268	#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
d7e269cf MS	269	#define CONFIG_SPL_LIBDISK_SUPPORT
d7e269cf MS	270	#define CONFIG_SPL_FAT_SUPPORT
205b4f33	271	#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
0dfbcf02 MY	272	#endif
	273
	274	/* Disable dcache for SPL just for sure */
	275	#ifdef CONFIG_SPL_BUILD
	276	#define CONFIG_SYS_DCACHE_OFF
	277	#undef CONFIG_FPGA
d7e269cf MS	278	#endif
	279
	280	/* Address in RAM where the parameters must be copied by SPL. */
	281	#define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
	282
205b4f33 GG	283	#define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb"
205b4f33 GG	284	#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
d7e269cf MS	285
	286	/* Not using MMC raw mode - just for compilation purpose */
	287	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
	288	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
	289	#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
	290
	291	/* qspi mode is working fine */
	292	#ifdef CONFIG_ZYNQ_QSPI
	293	#define CONFIG_SPL_SPI_SUPPORT
	294	#define CONFIG_SPL_SPI_LOAD
	295	#define CONFIG_SPL_SPI_FLASH_SUPPORT
d7e269cf	296	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
d7e269cf MS	297	#endif
	298
	299	/* for booting directly linux */
	300	#define CONFIG_SPL_OS_BOOT
	301
	302	/* SP location before relocation, must use scratch RAM */
	303	#define CONFIG_SPL_TEXT_BASE 0x0
	304
	305	/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
	306	#define CONFIG_SPL_MAX_SIZE 0x30000
	307
	308	/* The highest 64k OCM address */
	309	#define OCM_HIGH_ADDR 0xffff0000
	310
	311	/* Just define any reasonable size */
	312	#define CONFIG_SPL_STACK_SIZE 0x1000
	313
	314	/* SPL stack position - and stack goes down */
	315	#define CONFIG_SPL_STACK (OCM_HIGH_ADDR + CONFIG_SPL_STACK_SIZE)
	316
	317	/* On the top of OCM space */
	318	#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_STACK + \
	319	GENERATED_GBL_DATA_SIZE)
	320	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x1000
	321
	322	/* BSS setup */
	323	#define CONFIG_SPL_BSS_START_ADDR 0x100000
	324	#define CONFIG_SPL_BSS_MAX_SIZE 0x100000
	325
	326	#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
f22651cf	327
2b257216 MS	328	#define CONFIG_SYS_GENERIC_BOARD
2b257216 MS	329
06fe8dae	330	#endif /* __CONFIG_ZYNQ_COMMON_H */