[people/ms/u-boot.git] / include / configs / zynq-common.h

/*
 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
 * (C) Copyright 2013 Xilinx, Inc.
 *
 * Common configuration options for all Zynq boards.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_ZYNQ_COMMON_H
#define __CONFIG_ZYNQ_COMMON_H

/* High Level configuration Options */
#define CONFIG_ARMV7
#define CONFIG_ZYNQ

/* CPU clock */
#ifndef CONFIG_CPU_FREQ_HZ
# define CONFIG_CPU_FREQ_HZ	800000000
#endif

/* Cache options */
#define CONFIG_CMD_CACHE
#define CONFIG_SYS_CACHELINE_SIZE	32

#define CONFIG_SYS_L2CACHE_OFF
#ifndef CONFIG_SYS_L2CACHE_OFF
# define CONFIG_SYS_L2_PL310
# define CONFIG_SYS_PL310_BASE		0xf8f02000
#endif

/* Serial drivers */
#define CONFIG_BAUDRATE		115200
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE  \
	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}

/* DCC driver */
#if defined(CONFIG_ZYNQ_DCC)
# define CONFIG_ARM_DCC
# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */
#else
# define CONFIG_ZYNQ_SERIAL
#endif

/* Ethernet driver */
#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1)
# define CONFIG_NET_MULTI
# define CONFIG_ZYNQ_GEM
# define CONFIG_MII
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
# define CONFIG_PHYLIB
# define CONFIG_PHY_MARVELL
#endif

/* SPI */
#ifdef CONFIG_ZYNQ_SPI
# define CONFIG_SPI_FLASH
# define CONFIG_SPI_FLASH_SST
# define CONFIG_CMD_SF
#endif

/* NOR */
#ifndef CONFIG_SYS_NO_FLASH
# define CONFIG_SYS_FLASH_BASE		0xE2000000
# define CONFIG_SYS_FLASH_SIZE		(16 * 1024 * 1024)
# define CONFIG_SYS_MAX_FLASH_BANKS	1
# define CONFIG_SYS_MAX_FLASH_SECT	512
# define CONFIG_SYS_FLASH_ERASE_TOUT	1000
# define CONFIG_SYS_FLASH_WRITE_TOUT	5000
# define CONFIG_FLASH_SHOW_PROGRESS	10
# define CONFIG_SYS_FLASH_CFI
# undef CONFIG_SYS_FLASH_EMPTY_INFO
# define CONFIG_FLASH_CFI_DRIVER
# undef CONFIG_SYS_FLASH_PROTECTION
# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#endif

/* MMC */
#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
# define CONFIG_MMC
# define CONFIG_GENERIC_MMC
# define CONFIG_SDHCI
# define CONFIG_ZYNQ_SDHCI
# define CONFIG_CMD_MMC
#endif

#ifdef CONFIG_ZYNQ_USB
# define CONFIG_USB_EHCI
# define CONFIG_CMD_USB
# define CONFIG_USB_STORAGE
# define CONFIG_USB_EHCI_ZYNQ
# define CONFIG_USB_ULPI_VIEWPORT
# define CONFIG_USB_ULPI
# define CONFIG_EHCI_IS_TDI
# define CONFIG_USB_MAX_CONTROLLER_COUNT	2
#endif

#if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB)
# define CONFIG_SUPPORT_VFAT
# define CONFIG_CMD_FAT
# define CONFIG_CMD_EXT2
# define CONFIG_FAT_WRITE
# define CONFIG_DOS_PARTITION
# define CONFIG_CMD_EXT4
# define CONFIG_CMD_EXT4_WRITE
#endif

#define CONFIG_SYS_I2C_ZYNQ
/* I2C */
#if defined(CONFIG_SYS_I2C_ZYNQ)
# define CONFIG_CMD_I2C
# define CONFIG_SYS_I2C
# define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
# define CONFIG_SYS_I2C_ZYNQ_SLAVE		0
#endif

/* EEPROM */
#ifdef CONFIG_ZYNQ_EEPROM
# define CONFIG_CMD_EEPROM
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
# define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
# define CONFIG_SYS_EEPROM_SIZE			1024 /* Bytes */
#endif

#define CONFIG_BOOTP_SERVERIP
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_MAY_FAIL

/* Total Size of Environment Sector */
#define CONFIG_ENV_SIZE			(128 << 10)

/* Allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

/* Environment */
#ifndef CONFIG_ENV_IS_NOWHERE
# ifndef CONFIG_SYS_NO_FLASH
#  define CONFIG_ENV_IS_IN_FLASH
# elif defined(CONFIG_SYS_NO_FLASH)
#  define CONFIG_ENV_IS_NOWHERE
# endif

# define CONFIG_ENV_SECT_SIZE		CONFIG_ENV_SIZE
# define CONFIG_ENV_OFFSET		0xE0000
# define CONFIG_CMD_SAVEENV
#endif

/* Default environment */
#define CONFIG_EXTRA_ENV_SETTINGS	\
	"fit_image=fit.itb\0"		\
	"load_addr=0x2000000\0"		\
	"fit_size=0x800000\0"		\
	"flash_off=0x100000\0"		\
	"nor_flash_off=0xE2100000\0"	\
	"fdt_high=0x20000000\0"		\
	"initrd_high=0x20000000\0"	\
	"norboot=echo Copying FIT from NOR flash to RAM... && " \
		"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
		"bootm ${load_addr}\0" \
	"sdboot=echo Copying FIT from SD to RAM... && " \
		"fatload mmc 0 ${load_addr} ${fit_image} && " \
		"bootm ${load_addr}\0" \
	"jtagboot=echo TFTPing FIT to RAM... && " \
		"tftpboot ${load_addr} ${fit_image} && " \
		"bootm ${load_addr}\0" \
	"usbboot=if usb start; then " \
			"echo Copying FIT from USB to RAM... && " \
			"fatload usb 0 ${load_addr} ${fit_image} && " \
			"bootm ${load_addr}\0" \
		"fi\0"

#define CONFIG_BOOTCOMMAND		"run $modeboot"
#define CONFIG_BOOTDELAY		3 /* -1 to Disable autoboot */
#define CONFIG_SYS_LOAD_ADDR		0 /* default? */

/* Miscellaneous configurable options */
#define CONFIG_SYS_PROMPT		"zynq-uboot> "
#define CONFIG_SYS_HUSH_PARSER

#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_SYS_LONGHELP
#define CONFIG_CLOCKS
#define CONFIG_CMD_CLK
#define CONFIG_SYS_MAXARGS		32 /* max number of command args */
#define CONFIG_SYS_CBSIZE		256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)

/* Physical Memory map */
#define CONFIG_SYS_TEXT_BASE		0x4000000

#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE		0

#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x1000)

#define CONFIG_SYS_MALLOC_LEN		0x400000
#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_MALLOC_LEN
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					CONFIG_SYS_INIT_RAM_SIZE - \
					GENERATED_GBL_DATA_SIZE)

/* Enable the PL to be downloaded */
#define CONFIG_FPGA
#define CONFIG_FPGA_XILINX
#define CONFIG_FPGA_ZYNQPL
#define CONFIG_CMD_FPGA
#define CONFIG_CMD_FPGA_LOADMK
#define CONFIG_CMD_FPGA_LOADP
#define CONFIG_CMD_FPGA_LOADBP
#define CONFIG_CMD_FPGA_LOADFS

/* Open Firmware flat tree */
#define CONFIG_OF_LIBFDT

/* FIT support */
#define CONFIG_FIT
#define CONFIG_FIT_VERBOSE	1 /* enable fit_format_{error,warning}() */

/* FDT support */
#define CONFIG_OF_CONTROL
#define CONFIG_OF_SEPARATE
#define CONFIG_DISPLAY_BOARDINFO_LATE

/* RSA support */
#define CONFIG_FIT_SIGNATURE
#define CONFIG_RSA

/* Extend size of kernel image for uncompression */
#define CONFIG_SYS_BOOTM_LEN	(60 * 1024 * 1024)

/* Boot FreeBSD/vxWorks from an ELF image */
#if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
# define CONFIG_API
# define CONFIG_CMD_ELF
# define CONFIG_SYS_MMC_MAX_DEVICE	1
#endif

#define CONFIG_SYS_LDSCRIPT  "arch/arm/cpu/armv7/zynq/u-boot.lds"

/* Commands */
#include <config_cmd_default.h>

#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMD_TFTPPUT

/* SPL part */
#define CONFIG_SPL
#define CONFIG_CMD_SPL
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_BOARD_INIT

#define CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/armv7/zynq/u-boot-spl.lds"

/* MMC support */
#ifdef CONFIG_ZYNQ_SDHCI0
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SPL_FAT_SUPPORT
#if defined(CONFIG_OF_CONTROL) && defined(CONFIG_OF_SEPARATE)
# define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME     "u-boot-dtb.img"
#else
# define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME     "u-boot.img"
#endif
#endif

/* Disable dcache for SPL just for sure */
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_DCACHE_OFF
#undef CONFIG_FPGA
#undef CONFIG_OF_CONTROL
#endif

/* Address in RAM where the parameters must be copied by SPL. */
#define CONFIG_SYS_SPL_ARGS_ADDR	0x10000000

#define CONFIG_SPL_FAT_LOAD_ARGS_NAME		"system.dtb"
#define CONFIG_SPL_FAT_LOAD_KERNEL_NAME		"uImage"

/* Not using MMC raw mode - just for compilation purpose */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0

/* qspi mode is working fine */
#ifdef CONFIG_ZYNQ_QSPI
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_BUS	0
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x100000
#define CONFIG_SPL_SPI_CS	0
#endif

/* for booting directly linux */
#define CONFIG_SPL_OS_BOOT

/* SP location before relocation, must use scratch RAM */
#define CONFIG_SPL_TEXT_BASE	0x0

/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
#define CONFIG_SPL_MAX_SIZE	0x30000

/* The highest 64k OCM address */
#define OCM_HIGH_ADDR	0xffff0000

/* Just define any reasonable size */
#define CONFIG_SPL_STACK_SIZE	0x1000

/* SPL stack position - and stack goes down */
#define CONFIG_SPL_STACK	(OCM_HIGH_ADDR + CONFIG_SPL_STACK_SIZE)

/* On the top of OCM space */
#define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_STACK + \
					 GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x1000

/* BSS setup */
#define CONFIG_SPL_BSS_START_ADDR	0x100000
#define CONFIG_SPL_BSS_MAX_SIZE		0x100000

#define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE

#endif /* __CONFIG_ZYNQ_COMMON_H */
Commit	Line	Data
f22651cf MS	1	/*
f22651cf MS	2	* (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
06fe8dae JT	3	* (C) Copyright 2013 Xilinx, Inc.
	4	*
	5	* Common configuration options for all Zynq boards.
f22651cf	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
f22651cf MS	8	*/
f22651cf MS	9
06fe8dae JT	10	#ifndef __CONFIG_ZYNQ_COMMON_H
06fe8dae JT	11	#define __CONFIG_ZYNQ_COMMON_H
f22651cf	12
53e49f74 JT	13	/* High Level configuration Options */
53e49f74 JT	14	#define CONFIG_ARMV7
f22651cf MS	15	#define CONFIG_ZYNQ
	16
	17	/* CPU clock */
53e49f74 JT	18	#ifndef CONFIG_CPU_FREQ_HZ
	19	# define CONFIG_CPU_FREQ_HZ 800000000
	20	#endif
f22651cf	21
8cfac504 JT	22	/* Cache options */
	23	#define CONFIG_CMD_CACHE
	24	#define CONFIG_SYS_CACHELINE_SIZE 32
	25
	26	#define CONFIG_SYS_L2CACHE_OFF
	27	#ifndef CONFIG_SYS_L2CACHE_OFF
	28	# define CONFIG_SYS_L2_PL310
	29	# define CONFIG_SYS_PL310_BASE 0xf8f02000
	30	#endif
	31
53e49f74 JT	32	/* Serial drivers */
53e49f74 JT	33	#define CONFIG_BAUDRATE 115200
f22651cf MS	34	/* The following table includes the supported baudrates */
	35	#define CONFIG_SYS_BAUDRATE_TABLE \
	36	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
	37
53e49f74 JT	38	/* DCC driver */
	39	#if defined(CONFIG_ZYNQ_DCC)
	40	# define CONFIG_ARM_DCC
	41	# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */
bf834950 MS	42	#else
bf834950 MS	43	# define CONFIG_ZYNQ_SERIAL
53e49f74 JT	44	#endif
53e49f74 JT	45
f22651cf	46	/* Ethernet driver */
88fcfb1c JT	47	#if defined(CONFIG_ZYNQ_GEM0) \|\| defined(CONFIG_ZYNQ_GEM1)
	48	# define CONFIG_NET_MULTI
	49	# define CONFIG_ZYNQ_GEM
	50	# define CONFIG_MII
	51	# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
	52	# define CONFIG_PHYLIB
	53	# define CONFIG_PHY_MARVELL
	54	#endif
f22651cf	55
53e49f74 JT	56	/* SPI */
	57	#ifdef CONFIG_ZYNQ_SPI
	58	# define CONFIG_SPI_FLASH
	59	# define CONFIG_SPI_FLASH_SST
	60	# define CONFIG_CMD_SF
	61	#endif
	62
fe5eddbf JT	63	/* NOR */
	64	#ifndef CONFIG_SYS_NO_FLASH
	65	# define CONFIG_SYS_FLASH_BASE 0xE2000000
	66	# define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
	67	# define CONFIG_SYS_MAX_FLASH_BANKS 1
	68	# define CONFIG_SYS_MAX_FLASH_SECT 512
	69	# define CONFIG_SYS_FLASH_ERASE_TOUT 1000
	70	# define CONFIG_SYS_FLASH_WRITE_TOUT 5000
	71	# define CONFIG_FLASH_SHOW_PROGRESS 10
	72	# define CONFIG_SYS_FLASH_CFI
	73	# undef CONFIG_SYS_FLASH_EMPTY_INFO
	74	# define CONFIG_FLASH_CFI_DRIVER
	75	# undef CONFIG_SYS_FLASH_PROTECTION
	76	# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
	77	#endif
	78
293eb33f MS	79	/* MMC */
	80	#if defined(CONFIG_ZYNQ_SDHCI0) \|\| defined(CONFIG_ZYNQ_SDHCI1)
	81	# define CONFIG_MMC
	82	# define CONFIG_GENERIC_MMC
	83	# define CONFIG_SDHCI
	84	# define CONFIG_ZYNQ_SDHCI
	85	# define CONFIG_CMD_MMC
293eb33f MS	86	#endif
293eb33f MS	87
c6024c8e SDPP	88	#ifdef CONFIG_ZYNQ_USB
	89	# define CONFIG_USB_EHCI
	90	# define CONFIG_CMD_USB
	91	# define CONFIG_USB_STORAGE
c6024c8e SDPP	92	# define CONFIG_USB_EHCI_ZYNQ
	93	# define CONFIG_USB_ULPI_VIEWPORT
	94	# define CONFIG_USB_ULPI
	95	# define CONFIG_EHCI_IS_TDI
	96	# define CONFIG_USB_MAX_CONTROLLER_COUNT 2
	97	#endif
	98
47b35a51	99	#if defined(CONFIG_ZYNQ_SDHCI) \|\| defined(CONFIG_ZYNQ_USB)
293eb33f	100	# define CONFIG_SUPPORT_VFAT
47b35a51	101	# define CONFIG_CMD_FAT
293eb33f	102	# define CONFIG_CMD_EXT2
47b35a51	103	# define CONFIG_FAT_WRITE
293eb33f	104	# define CONFIG_DOS_PARTITION
2e38a906 SDPP	105	# define CONFIG_CMD_EXT4
2e38a906 SDPP	106	# define CONFIG_CMD_EXT4_WRITE
293eb33f MS	107	#endif
293eb33f MS	108
18948632	109	#define CONFIG_SYS_I2C_ZYNQ
8934f784	110	/* I2C */
18948632	111	#if defined(CONFIG_SYS_I2C_ZYNQ)
8934f784	112	# define CONFIG_CMD_I2C
0bdffe71	113	# define CONFIG_SYS_I2C
0bdffe71	114	# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
18948632	115	# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
8934f784 MS	116	#endif
8934f784 MS	117
65da1efd JT	118	/* EEPROM */
	119	#ifdef CONFIG_ZYNQ_EEPROM
	120	# define CONFIG_CMD_EEPROM
	121	# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
	122	# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
	123	# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
	124	# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
	125	# define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */
	126	#endif
	127
f22651cf MS	128	#define CONFIG_BOOTP_SERVERIP
	129	#define CONFIG_BOOTP_BOOTPATH
	130	#define CONFIG_BOOTP_GATEWAY
	131	#define CONFIG_BOOTP_HOSTNAME
	132	#define CONFIG_BOOTP_MAY_FAIL
	133
18eee22f JT	134	/* Total Size of Environment Sector */
	135	#define CONFIG_ENV_SIZE (128 << 10)
	136
b660ca13 JT	137	/* Allow to overwrite serial and ethaddr */
	138	#define CONFIG_ENV_OVERWRITE
	139
f22651cf	140	/* Environment */
ed53e4d6 JT	141	#ifndef CONFIG_ENV_IS_NOWHERE
	142	# ifndef CONFIG_SYS_NO_FLASH
	143	# define CONFIG_ENV_IS_IN_FLASH
	144	# elif defined(CONFIG_SYS_NO_FLASH)
	145	# define CONFIG_ENV_IS_NOWHERE
	146	# endif
	147
	148	# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
	149	# define CONFIG_ENV_OFFSET 0xE0000
	150	# define CONFIG_CMD_SAVEENV
	151	#endif
e83f61a6 JT	152
	153	/* Default environment */
	154	#define CONFIG_EXTRA_ENV_SETTINGS \
	155	"fit_image=fit.itb\0" \
	156	"load_addr=0x2000000\0" \
	157	"fit_size=0x800000\0" \
	158	"flash_off=0x100000\0" \
	159	"nor_flash_off=0xE2100000\0" \
	160	"fdt_high=0x20000000\0" \
	161	"initrd_high=0x20000000\0" \
	162	"norboot=echo Copying FIT from NOR flash to RAM... && " \
	163	"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
	164	"bootm ${load_addr}\0" \
	165	"sdboot=echo Copying FIT from SD to RAM... && " \
	166	"fatload mmc 0 ${load_addr} ${fit_image} && " \
	167	"bootm ${load_addr}\0" \
	168	"jtagboot=echo TFTPing FIT to RAM... && " \
dfa94058	169	"tftpboot ${load_addr} ${fit_image} && " \
c6024c8e SDPP	170	"bootm ${load_addr}\0" \
	171	"usbboot=if usb start; then " \
	172	"echo Copying FIT from USB to RAM... && " \
	173	"fatload usb 0 ${load_addr} ${fit_image} && " \
	174	"bootm ${load_addr}\0" \
	175	"fi\0"
	176
e83f61a6 JT	177	#define CONFIG_BOOTCOMMAND "run $modeboot"
	178	#define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */
	179	#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
f22651cf	180
36e0e197 JT	181	/* Miscellaneous configurable options */
	182	#define CONFIG_SYS_PROMPT "zynq-uboot> "
	183	#define CONFIG_SYS_HUSH_PARSER
	184
	185	#define CONFIG_CMDLINE_EDITING
	186	#define CONFIG_AUTO_COMPLETE
b3de9249	187	#define CONFIG_BOARD_LATE_INIT
36e0e197	188	#define CONFIG_SYS_LONGHELP
6c3e61de	189	#define CONFIG_CLOCKS
d6c9bbaa	190	#define CONFIG_CMD_CLK
841426ad	191	#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
36e0e197 JT	192	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
36e0e197 JT	193	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
f22651cf MS	194	sizeof(CONFIG_SYS_PROMPT) + 16)
f22651cf MS	195
7cd04192	196	/* Physical Memory map */
0f5c2156	197	#define CONFIG_SYS_TEXT_BASE 0x4000000
f22651cf	198
7cd04192 JT	199	#define CONFIG_NR_DRAM_BANKS 1
7cd04192 JT	200	#define CONFIG_SYS_SDRAM_BASE 0
7cd04192 JT	201
	202	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
	203	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
	204
53e49f74	205	#define CONFIG_SYS_MALLOC_LEN 0x400000
7cd04192 JT	206	#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE
	207	#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
	208	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	209	CONFIG_SYS_INIT_RAM_SIZE - \
	210	GENERATED_GBL_DATA_SIZE)
53e49f74 JT	211
	212	/* Enable the PL to be downloaded */
	213	#define CONFIG_FPGA
	214	#define CONFIG_FPGA_XILINX
	215	#define CONFIG_FPGA_ZYNQPL
	216	#define CONFIG_CMD_FPGA
64e809af	217	#define CONFIG_CMD_FPGA_LOADMK
26ea9ce5 MS	218	#define CONFIG_CMD_FPGA_LOADP
26ea9ce5 MS	219	#define CONFIG_CMD_FPGA_LOADBP
1a897668	220	#define CONFIG_CMD_FPGA_LOADFS
53e49f74 JT	221
	222	/* Open Firmware flat tree */
	223	#define CONFIG_OF_LIBFDT
	224
	225	/* FIT support */
f22651cf	226	#define CONFIG_FIT
773590eb	227	#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
f22651cf	228
f8f36c5d JT	229	/* FDT support */
	230	#define CONFIG_OF_CONTROL
	231	#define CONFIG_OF_SEPARATE
	232	#define CONFIG_DISPLAY_BOARDINFO_LATE
	233
a8826eb4 JT	234	/* RSA support */
	235	#define CONFIG_FIT_SIGNATURE
	236	#define CONFIG_RSA
	237
ae9f4899	238	/* Extend size of kernel image for uncompression */
3d456eec	239	#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
ae9f4899	240
09ed635b JT	241	/* Boot FreeBSD/vxWorks from an ELF image */
	242	#if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
	243	# define CONFIG_API
	244	# define CONFIG_CMD_ELF
	245	# define CONFIG_SYS_MMC_MAX_DEVICE 1
	246	#endif
	247
38716189 MS	248	#define CONFIG_SYS_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot.lds"
38716189 MS	249
f22651cf MS	250	/* Commands */
	251	#include <config_cmd_default.h>
	252
	253	#define CONFIG_CMD_PING
	254	#define CONFIG_CMD_DHCP
	255	#define CONFIG_CMD_MII
427b2d4e	256	#define CONFIG_CMD_TFTPPUT
f22651cf	257
d7e269cf MS	258	/* SPL part */
	259	#define CONFIG_SPL
	260	#define CONFIG_CMD_SPL
	261	#define CONFIG_SPL_FRAMEWORK
	262	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	263	#define CONFIG_SPL_LIBGENERIC_SUPPORT
	264	#define CONFIG_SPL_SERIAL_SUPPORT
1540fb72	265	#define CONFIG_SPL_BOARD_INIT
d7e269cf MS	266
	267	#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot-spl.lds"
	268
d7e269cf MS	269	/* MMC support */
	270	#ifdef CONFIG_ZYNQ_SDHCI0
	271	#define CONFIG_SPL_MMC_SUPPORT
	272	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
	273	#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
	274	#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
	275	#define CONFIG_SPL_LIBDISK_SUPPORT
	276	#define CONFIG_SPL_FAT_SUPPORT
0dfbcf02 MY	277	#if defined(CONFIG_OF_CONTROL) && defined(CONFIG_OF_SEPARATE)
	278	# define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
	279	#else
	280	# define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
	281	#endif
	282	#endif
	283
	284	/* Disable dcache for SPL just for sure */
	285	#ifdef CONFIG_SPL_BUILD
	286	#define CONFIG_SYS_DCACHE_OFF
	287	#undef CONFIG_FPGA
	288	#undef CONFIG_OF_CONTROL
d7e269cf MS	289	#endif
	290
	291	/* Address in RAM where the parameters must be copied by SPL. */
	292	#define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
	293
	294	#define CONFIG_SPL_FAT_LOAD_ARGS_NAME "system.dtb"
	295	#define CONFIG_SPL_FAT_LOAD_KERNEL_NAME "uImage"
	296
	297	/* Not using MMC raw mode - just for compilation purpose */
	298	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
	299	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
	300	#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
	301
	302	/* qspi mode is working fine */
	303	#ifdef CONFIG_ZYNQ_QSPI
	304	#define CONFIG_SPL_SPI_SUPPORT
	305	#define CONFIG_SPL_SPI_LOAD
	306	#define CONFIG_SPL_SPI_FLASH_SUPPORT
	307	#define CONFIG_SPL_SPI_BUS 0
	308	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
	309	#define CONFIG_SPL_SPI_CS 0
	310	#endif
	311
	312	/* for booting directly linux */
	313	#define CONFIG_SPL_OS_BOOT
	314
	315	/* SP location before relocation, must use scratch RAM */
	316	#define CONFIG_SPL_TEXT_BASE 0x0
	317
	318	/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
	319	#define CONFIG_SPL_MAX_SIZE 0x30000
	320
	321	/* The highest 64k OCM address */
	322	#define OCM_HIGH_ADDR 0xffff0000
	323
	324	/* Just define any reasonable size */
	325	#define CONFIG_SPL_STACK_SIZE 0x1000
	326
	327	/* SPL stack position - and stack goes down */
	328	#define CONFIG_SPL_STACK (OCM_HIGH_ADDR + CONFIG_SPL_STACK_SIZE)
	329
	330	/* On the top of OCM space */
	331	#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_STACK + \
	332	GENERATED_GBL_DATA_SIZE)
	333	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x1000
	334
	335	/* BSS setup */
	336	#define CONFIG_SPL_BSS_START_ADDR 0x100000
	337	#define CONFIG_SPL_BSS_MAX_SIZE 0x100000
	338
	339	#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
f22651cf	340
06fe8dae	341	#endif /* __CONFIG_ZYNQ_COMMON_H */