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1/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
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6 *
7 * Be sure to mark tests to be run before relocation as such with the
6d0f6bcf 8 * CONFIG_SYS_POST_PREREL flag so that logging is done correctly if the
228f29ac 9 * logbuffer support is enabled.
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10 */
11
12#include <common.h>
13
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14#include <post.h>
15
6e8ec682 16extern int ocm_post_test (int flags);
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17extern int cache_post_test (int flags);
18extern int watchdog_post_test (int flags);
19extern int i2c_post_test (int flags);
20extern int rtc_post_test (int flags);
21extern int memory_post_test (int flags);
22extern int cpu_post_test (int flags);
a11e0696 23extern int fpu_post_test (int flags);
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24extern int uart_post_test (int flags);
25extern int ether_post_test (int flags);
26extern int spi_post_test (int flags);
27extern int usb_post_test (int flags);
28extern int spr_post_test (int flags);
4532cb69 29extern int sysmon_post_test (int flags);
5a8c51cd 30extern int dsp_post_test (int flags);
79fa88f3 31extern int codec_post_test (int flags);
531e3e8b 32extern int ecc_post_test (int flags);
f6f7395e 33extern int flash_post_test(int flags);
4532cb69 34
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35extern int dspic_init_post_test (int flags);
36extern int dspic_post_test (int flags);
37extern int gdc_post_test (int flags);
38extern int fpga_post_test (int flags);
39extern int lwmon5_watchdog_post_test(int flags);
40extern int sysmon1_post_test(int flags);
29fd7ceb 41extern int coprocessor_post_test(int flags);
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42extern int led_post_test(int flags);
43extern int button_post_test(int flags);
8d3fcb5e 44extern int memory_regions_post_test(int flags);
65b20dce 45
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46extern int sysmon_init_f (void);
47
48extern void sysmon_reloc (void);
49
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50
51struct post_test post_list[] =
52{
6d0f6bcf 53#if CONFIG_POST & CONFIG_SYS_POST_OCM
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54 {
55 "OCM test",
56 "ocm",
57 "This test checks on chip memory (OCM).",
7845d490 58 POST_ROM | POST_ALWAYS | POST_PREREL | POST_CRITICAL | POST_STOP,
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59 &ocm_post_test,
60 NULL,
61 NULL,
6d0f6bcf 62 CONFIG_SYS_POST_OCM
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63 },
64#endif
6d0f6bcf 65#if CONFIG_POST & CONFIG_SYS_POST_CACHE
324f6cfd 66 {
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67 "Cache test",
68 "cache",
69 "This test verifies the CPU cache operation.",
70 POST_RAM | POST_ALWAYS,
71 &cache_post_test,
72 NULL,
73 NULL,
6d0f6bcf 74 CONFIG_SYS_POST_CACHE
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75 },
76#endif
6d0f6bcf 77#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
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78#if defined(CONFIG_POST_WATCHDOG)
79 CONFIG_POST_WATCHDOG,
80#else
324f6cfd 81 {
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82 "Watchdog timer test",
83 "watchdog",
84 "This test checks the watchdog timer.",
8564acf9 85 POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT,
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86 &watchdog_post_test,
87 NULL,
88 NULL,
6d0f6bcf 89 CONFIG_SYS_POST_WATCHDOG
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90 },
91#endif
65b20dce 92#endif
6d0f6bcf 93#if CONFIG_POST & CONFIG_SYS_POST_I2C
324f6cfd 94 {
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95 "I2C test",
96 "i2c",
97 "This test verifies the I2C operation.",
98 POST_RAM | POST_ALWAYS,
99 &i2c_post_test,
100 NULL,
101 NULL,
6d0f6bcf 102 CONFIG_SYS_POST_I2C
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103 },
104#endif
6d0f6bcf 105#if CONFIG_POST & CONFIG_SYS_POST_RTC
324f6cfd 106 {
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107 "RTC test",
108 "rtc",
109 "This test verifies the RTC operation.",
8564acf9 110 POST_RAM | POST_SLOWTEST | POST_MANUAL,
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111 &rtc_post_test,
112 NULL,
113 NULL,
6d0f6bcf 114 CONFIG_SYS_POST_RTC
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115 },
116#endif
6d0f6bcf 117#if CONFIG_POST & CONFIG_SYS_POST_MEMORY
324f6cfd 118 {
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119 "Memory test",
120 "memory",
121 "This test checks RAM.",
8564acf9 122 POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL,
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123 &memory_post_test,
124 NULL,
125 NULL,
6d0f6bcf 126 CONFIG_SYS_POST_MEMORY
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127 },
128#endif
6d0f6bcf 129#if CONFIG_POST & CONFIG_SYS_POST_CPU
324f6cfd 130 {
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131 "CPU test",
132 "cpu",
133 "This test verifies the arithmetic logic unit of"
134 " CPU.",
135 POST_RAM | POST_ALWAYS,
136 &cpu_post_test,
137 NULL,
138 NULL,
6d0f6bcf 139 CONFIG_SYS_POST_CPU
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140 },
141#endif
6d0f6bcf 142#if CONFIG_POST & CONFIG_SYS_POST_FPU
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143 {
144 "FPU test",
145 "fpu",
146 "This test verifies the arithmetic logic unit of"
147 " FPU.",
148 POST_RAM | POST_ALWAYS,
149 &fpu_post_test,
150 NULL,
151 NULL,
6d0f6bcf 152 CONFIG_SYS_POST_FPU
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153 },
154#endif
6d0f6bcf 155#if CONFIG_POST & CONFIG_SYS_POST_UART
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156#if defined(CONFIG_POST_UART)
157 CONFIG_POST_UART,
158#else
324f6cfd 159 {
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160 "UART test",
161 "uart",
162 "This test verifies the UART operation.",
8564acf9 163 POST_RAM | POST_SLOWTEST | POST_MANUAL,
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164 &uart_post_test,
165 NULL,
166 NULL,
6d0f6bcf 167 CONFIG_SYS_POST_UART
324f6cfd 168 },
834a45d7 169#endif /* CONFIG_POST_UART */
324f6cfd 170#endif
6d0f6bcf 171#if CONFIG_POST & CONFIG_SYS_POST_ETHER
324f6cfd 172 {
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173 "ETHERNET test",
174 "ethernet",
175 "This test verifies the ETHERNET operation.",
176 POST_RAM | POST_ALWAYS | POST_MANUAL,
177 &ether_post_test,
178 NULL,
179 NULL,
6d0f6bcf 180 CONFIG_SYS_POST_ETHER
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181 },
182#endif
6d0f6bcf 183#if CONFIG_POST & CONFIG_SYS_POST_SPI
324f6cfd 184 {
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185 "SPI test",
186 "spi",
187 "This test verifies the SPI operation.",
188 POST_RAM | POST_ALWAYS | POST_MANUAL,
189 &spi_post_test,
190 NULL,
191 NULL,
6d0f6bcf 192 CONFIG_SYS_POST_SPI
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193 },
194#endif
6d0f6bcf 195#if CONFIG_POST & CONFIG_SYS_POST_USB
324f6cfd 196 {
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197 "USB test",
198 "usb",
199 "This test verifies the USB operation.",
200 POST_RAM | POST_ALWAYS | POST_MANUAL,
201 &usb_post_test,
202 NULL,
203 NULL,
6d0f6bcf 204 CONFIG_SYS_POST_USB
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205 },
206#endif
6d0f6bcf 207#if CONFIG_POST & CONFIG_SYS_POST_SPR
324f6cfd 208 {
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209 "SPR test",
210 "spr",
211 "This test checks SPR contents.",
b2e2142c 212 POST_RAM | POST_ALWAYS,
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213 &spr_post_test,
214 NULL,
215 NULL,
6d0f6bcf 216 CONFIG_SYS_POST_SPR
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217 },
218#endif
6d0f6bcf 219#if CONFIG_POST & CONFIG_SYS_POST_SYSMON
4532cb69 220 {
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221 "SYSMON test",
222 "sysmon",
223 "This test monitors system hardware.",
224 POST_RAM | POST_ALWAYS,
225 &sysmon_post_test,
226 &sysmon_init_f,
227 &sysmon_reloc,
6d0f6bcf 228 CONFIG_SYS_POST_SYSMON
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229 },
230#endif
6d0f6bcf 231#if CONFIG_POST & CONFIG_SYS_POST_DSP
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232 {
233 "DSP test",
234 "dsp",
235 "This test checks any connected DSP(s).",
5744ddc6 236 POST_RAM | POST_ALWAYS | POST_MANUAL,
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237 &dsp_post_test,
238 NULL,
239 NULL,
6d0f6bcf 240 CONFIG_SYS_POST_DSP
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241 },
242#endif
6d0f6bcf 243#if CONFIG_POST & CONFIG_SYS_POST_CODEC
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244 {
245 "CODEC test",
246 "codec",
247 "This test checks any connected codec(s).",
248 POST_RAM | POST_MANUAL,
249 &codec_post_test,
250 NULL,
251 NULL,
6d0f6bcf 252 CONFIG_SYS_POST_CODEC
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253 },
254#endif
6d0f6bcf 255#if CONFIG_POST & CONFIG_SYS_POST_ECC
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256 {
257 "ECC test",
258 "ecc",
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259 "This test checks the ECC facility of memory.",
260 POST_ROM | POST_ALWAYS | POST_PREREL,
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261 &ecc_post_test,
262 NULL,
263 NULL,
6d0f6bcf 264 CONFIG_SYS_POST_ECC
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265 },
266#endif
6d0f6bcf 267#if CONFIG_POST & CONFIG_SYS_POST_BSPEC1
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268 CONFIG_POST_BSPEC1,
269#endif
6d0f6bcf 270#if CONFIG_POST & CONFIG_SYS_POST_BSPEC2
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271 CONFIG_POST_BSPEC2,
272#endif
6d0f6bcf 273#if CONFIG_POST & CONFIG_SYS_POST_BSPEC3
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274 CONFIG_POST_BSPEC3,
275#endif
6d0f6bcf 276#if CONFIG_POST & CONFIG_SYS_POST_BSPEC4
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277 CONFIG_POST_BSPEC4,
278#endif
6d0f6bcf 279#if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
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280 CONFIG_POST_BSPEC5,
281#endif
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282#if CONFIG_POST & CONFIG_SYS_POST_COPROC
283 {
284 "Coprocessors communication test",
285 "coproc_com",
286 "This test checks communication with coprocessors.",
287 POST_RAM | POST_ALWAYS | POST_CRITICAL,
288 &coprocessor_post_test,
289 NULL,
290 NULL,
291 CONFIG_SYS_POST_COPROC
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292 },
293#endif
294#if CONFIG_POST & CONFIG_SYS_POST_FLASH
295 {
296 "Parallel NOR flash test",
297 "flash",
298 "This test verifies parallel flash operations.",
299 POST_RAM | POST_SLOWTEST | POST_MANUAL,
300 &flash_post_test,
301 NULL,
302 NULL,
303 CONFIG_SYS_POST_FLASH
304 },
29fd7ceb 305#endif
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306#if CONFIG_POST & CONFIG_SYS_POST_MEM_REGIONS
307 {
308 "Memory regions test",
309 "mem_regions",
310 "This test checks regularly placed regions of the RAM.",
311 POST_ROM | POST_SLOWTEST | POST_PREREL,
312 &memory_regions_post_test,
313 NULL,
314 NULL,
315 CONFIG_SYS_POST_MEM_REGIONS
316 },
317#endif
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318};
319
d2397817 320unsigned int post_list_size = ARRAY_SIZE(post_list);