arch/powerpc/cpu/ppc4xx/gpio.c

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <asm/processor.h>
  26 #include <asm/io.h>
  27 #include <asm/ppc4xx-gpio.h>
  28
  29 /* Only compile this file for boards with GPIO support */
  30 #if defined(GPIO0_BASE)
  31
  32 #if defined(CONFIG_SYS_4xx_GPIO_TABLE)
  33 gpio_param_s const gpio_tab[GPIO_GROUP_MAX][GPIO_MAX] = CONFIG_SYS_4xx_GPIO_TABLE;
  34 #endif
  35
  36 #if defined(GPIO0_OSRL)
  37 /* Only some 4xx variants support alternate funtions on the GPIO's */
  38 void gpio_config(int pin, int in_out, int gpio_alt, int out_val)
  39 {
  40         u32 mask;
  41         u32 mask2;
  42         u32 val;
  43         u32 offs = 0;
  44         u32 offs2 = 0;
  45         int pin2 = pin << 1;
  46
  47         if (pin >= GPIO_MAX) {
  48                 offs = 0x100;
  49                 pin -= GPIO_MAX;
  50         }
  51
  52         if (pin >= GPIO_MAX/2) {
  53                 offs2 = 0x4;
  54                 pin2 = (pin - GPIO_MAX/2) << 1;
  55         }
  56
  57         mask = 0x80000000 >> pin;
  58         mask2 = 0xc0000000 >> pin2;
  59
  60         /* first set TCR to 0 */
  61         out_be32((void *)GPIO0_TCR + offs, in_be32((void *)GPIO0_TCR + offs) & ~mask);
  62
  63         if (in_out == GPIO_OUT) {
  64                 val = in_be32((void *)GPIO0_OSRL + offs + offs2) & ~mask2;
  65                 switch (gpio_alt) {
  66                 case GPIO_ALT1:
  67                         val |= GPIO_ALT1_SEL >> pin2;
  68                         break;
  69                 case GPIO_ALT2:
  70                         val |= GPIO_ALT2_SEL >> pin2;
  71                         break;
  72                 case GPIO_ALT3:
  73                         val |= GPIO_ALT3_SEL >> pin2;
  74                         break;
  75                 }
  76                 out_be32((void *)GPIO0_OSRL + offs + offs2, val);
  77
  78                 /* setup requested output value */
  79                 if (out_val == GPIO_OUT_0)
  80                         out_be32((void *)GPIO0_OR + offs,
  81                                  in_be32((void *)GPIO0_OR + offs) & ~mask);
  82                 else if (out_val == GPIO_OUT_1)
  83                         out_be32((void *)GPIO0_OR + offs,
  84                                  in_be32((void *)GPIO0_OR + offs) | mask);
  85
  86                 /* now configure TCR to drive output if selected */
  87                 out_be32((void *)GPIO0_TCR + offs,
  88                          in_be32((void *)GPIO0_TCR + offs) | mask);
  89         } else {
  90                 val = in_be32((void *)GPIO0_ISR1L + offs + offs2) & ~mask2;
  91                 val |= GPIO_IN_SEL >> pin2;
  92                 out_be32((void *)GPIO0_ISR1L + offs + offs2, val);
  93         }
  94 }
  95 #endif /* GPIO_OSRL */
  96
  97 void gpio_write_bit(int pin, int val)
  98 {
  99         u32 offs = 0;
 100
 101         if (pin >= GPIO_MAX) {
 102                 offs = 0x100;
 103                 pin -= GPIO_MAX;
 104         }
 105
 106         if (val)
 107                 out_be32((void *)GPIO0_OR + offs,
 108                          in_be32((void *)GPIO0_OR + offs) | GPIO_VAL(pin));
 109         else
 110                 out_be32((void *)GPIO0_OR + offs,
 111                          in_be32((void *)GPIO0_OR + offs) & ~GPIO_VAL(pin));
 112 }
 113
 114 int gpio_read_out_bit(int pin)
 115 {
 116         u32 offs = 0;
 117
 118         if (pin >= GPIO_MAX) {
 119                 offs = 0x100;
 120                 pin -= GPIO_MAX;
 121         }
 122
 123         return (in_be32((void *)GPIO0_OR + offs) & GPIO_VAL(pin) ? 1 : 0);
 124 }
 125
 126 int gpio_read_in_bit(int pin)
 127 {
 128         u32 offs = 0;
 129
 130         if (pin >= GPIO_MAX) {
 131                 offs = 0x100;
 132                 pin -= GPIO_MAX;
 133         }
 134
 135         return (in_be32((void *)GPIO0_IR + offs) & GPIO_VAL(pin) ? 1 : 0);
 136 }
 137
 138 #if defined(CONFIG_SYS_4xx_GPIO_TABLE)
 139 void gpio_set_chip_configuration(void)
 140 {
 141         unsigned char i=0, j=0, offs=0, gpio_core;
 142         unsigned long reg, core_add;
 143
 144         for (gpio_core=0; gpio_core<GPIO_GROUP_MAX; gpio_core++) {
 145                 j = 0;
 146                 offs = 0;
 147                 /* GPIO config of the GPIOs 0 to 31 */
 148                 for (i=0; i<GPIO_MAX; i++, j++) {
 149                         if (i == GPIO_MAX/2) {
 150                                 offs = 4;
 151                                 j = i-16;
 152                         }
 153
 154                         core_add = gpio_tab[gpio_core][i].add;
 155
 156                         if ((gpio_tab[gpio_core][i].in_out == GPIO_IN) ||
 157                             (gpio_tab[gpio_core][i].in_out == GPIO_BI)) {
 158
 159                                 switch (gpio_tab[gpio_core][i].alt_nb) {
 160                                 case GPIO_SEL:
 161                                         break;
 162
 163                                 case GPIO_ALT1:
 164                                         reg = in_be32((void *)GPIO_IS1(core_add+offs))
 165                                                 & ~(GPIO_MASK >> (j*2));
 166                                         reg = reg | (GPIO_IN_SEL >> (j*2));
 167                                         out_be32((void *)GPIO_IS1(core_add+offs), reg);
 168                                         break;
 169
 170                                 case GPIO_ALT2:
 171                                         reg = in_be32((void *)GPIO_IS2(core_add+offs))
 172                                                 & ~(GPIO_MASK >> (j*2));
 173                                         reg = reg | (GPIO_IN_SEL >> (j*2));
 174                                         out_be32((void *)GPIO_IS2(core_add+offs), reg);
 175                                         break;
 176
 177                                 case GPIO_ALT3:
 178                                         reg = in_be32((void *)GPIO_IS3(core_add+offs))
 179                                                 & ~(GPIO_MASK >> (j*2));
 180                                         reg = reg | (GPIO_IN_SEL >> (j*2));
 181                                         out_be32((void *)GPIO_IS3(core_add+offs), reg);
 182                                         break;
 183                                 }
 184                         }
 185
 186                         if ((gpio_tab[gpio_core][i].in_out == GPIO_OUT) ||
 187                             (gpio_tab[gpio_core][i].in_out == GPIO_BI)) {
 188
 189                                 u32 gpio_alt_sel = 0;
 190
 191                                 switch (gpio_tab[gpio_core][i].alt_nb) {
 192                                 case GPIO_SEL:
 193                                         /*
 194                                          * Setup output value
 195                                          * 1 -> high level
 196                                          * 0 -> low level
 197                                          * else -> don't touch
 198                                          */
 199                                         reg = in_be32((void *)GPIO_OR(core_add));
 200                                         if (gpio_tab[gpio_core][i].out_val == GPIO_OUT_1)
 201                                                 reg |= (0x80000000 >> (i));
 202                                         else if (gpio_tab[gpio_core][i].out_val == GPIO_OUT_0)
 203                                                 reg &= ~(0x80000000 >> (i));
 204                                         out_be32((void *)GPIO_OR(core_add), reg);
 205
 206                                         reg = in_be32((void *)GPIO_TCR(core_add)) |
 207                                                 (0x80000000 >> (i));
 208                                         out_be32((void *)GPIO_TCR(core_add), reg);
 209
 210                                         reg = in_be32((void *)GPIO_OS(core_add+offs))
 211                                                 & ~(GPIO_MASK >> (j*2));
 212                                         out_be32((void *)GPIO_OS(core_add+offs), reg);
 213                                         reg = in_be32((void *)GPIO_TS(core_add+offs))
 214                                                 & ~(GPIO_MASK >> (j*2));
 215                                         out_be32((void *)GPIO_TS(core_add+offs), reg);
 216                                         break;
 217
 218                                 case GPIO_ALT1:
 219                                         gpio_alt_sel = GPIO_ALT1_SEL;
 220                                         break;
 221
 222                                 case GPIO_ALT2:
 223                                         gpio_alt_sel = GPIO_ALT2_SEL;
 224                                         break;
 225
 226                                 case GPIO_ALT3:
 227                                         gpio_alt_sel = GPIO_ALT3_SEL;
 228                                         break;
 229                                 }
 230
 231                                 if (0 != gpio_alt_sel) {
 232                                         reg = in_be32((void *)GPIO_OS(core_add+offs))
 233                                                 & ~(GPIO_MASK >> (j*2));
 234                                         reg = reg | (gpio_alt_sel >> (j*2));
 235                                         out_be32((void *)GPIO_OS(core_add+offs), reg);
 236
 237                                         if (gpio_tab[gpio_core][i].out_val == GPIO_OUT_1) {
 238                                                 reg = in_be32((void *)GPIO_TCR(core_add))
 239                                                         | (0x80000000 >> (i));
 240                                                 out_be32((void *)GPIO_TCR(core_add), reg);
 241                                                 reg = in_be32((void *)GPIO_TS(core_add+offs))
 242                                                         & ~(GPIO_MASK >> (j*2));
 243                                                 out_be32((void *)GPIO_TS(core_add+offs), reg);
 244                                         } else {
 245                                                 reg = in_be32((void *)GPIO_TCR(core_add))
 246                                                         & ~(0x80000000 >> (i));
 247                                                 out_be32((void *)GPIO_TCR(core_add), reg);
 248                                                 reg = in_be32((void *)GPIO_TS(core_add+offs))
 249                                                         & ~(GPIO_MASK >> (j*2));
 250                                                 reg = reg | (gpio_alt_sel >> (j*2));
 251                                                 out_be32((void *)GPIO_TS(core_add+offs), reg);
 252                                         }
 253                                 }
 254                         }
 255                 }
 256         }
 257 }
 258
 259 #endif /* GPIO0_BASE */
 260 #endif /* CONFIG_SYS_4xx_GPIO_TABLE */