3 * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@gmail.com
4 * This work has been supported by: QTechnology http://qtec.com/
5 * Based on interrupts.c Wolfgang Denk-DENX Software Engineering-wd@denx.de
6 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/processor.h>
12 #include <asm/interrupt.h>
13 #include <asm/ppc4xx.h>
14 #include <ppc_asm.tmpl>
16 #include <asm/xilinx_irq.h>
18 DECLARE_GLOBAL_DATA_PTR
;
22 debug("Xilinx PIC at 0x%8x\n", intc
);
25 * Disable all external interrupts until they are
26 * explicitly requested.
28 out_be32((u32
*) IER
, 0);
30 /* Acknowledge any pending interrupts just in case. */
31 out_be32((u32
*) IAR
, 0xffffffff);
33 /* Turn on the Master Enable. */
34 out_be32((u32
*) MER
, 0x3UL
);
39 int xilinx_pic_irq_get(void)
42 irq
= in_be32((u32
*) IVR
);
44 /* If no interrupt is pending then all bits of the IVR are set to 1. As
45 * the IVR is as many bits wide as numbers of inputs are available.
46 * Therefore, if all bits of the IVR are set to one, its content will
47 * be bigger than XPAR_INTC_MAX_NUM_INTR_INPUTS.
49 if (irq
>= XPAR_INTC_MAX_NUM_INTR_INPUTS
)
50 irq
= -1; /* report no pending interrupt. */
52 debug("get_irq: %d\n", irq
);
56 void pic_irq_enable(unsigned int irq
)
58 u32 mask
= IRQ_MASK(irq
);
59 debug("enable: %d\n", irq
);
60 out_be32((u32
*) SIE
, mask
);
63 void pic_irq_disable(unsigned int irq
)
65 u32 mask
= IRQ_MASK(irq
);
66 debug("disable: %d\n", irq
);
67 out_be32((u32
*) CIE
, mask
);
70 void pic_irq_ack(unsigned int irq
)
72 u32 mask
= IRQ_MASK(irq
);
73 debug("ack: %d\n", irq
);
74 out_be32((u32
*) IAR
, mask
);
77 void external_interrupt(struct pt_regs
*regs
)
81 irq
= xilinx_pic_irq_get();
85 interrupt_run_handler(irq
);