include/configs/hammerhead.h

   1 /*
   2  * Copyright (C) 2008 Miromico AG
   3  *
   4  * Configuration settings for the Miromico Hammerhead AVR32 board
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10
  11 #define CONFIG_AVR32
  12 #define CONFIG_AT32AP
  13 #define CONFIG_AT32AP7000
  14 #define CONFIG_HAMMERHEAD
  15
  16 /*
  17  * Set up the PLL to run at 125 MHz, the CPU to run at the PLL
  18  * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
  19  * and the PBA bus to run at 1/4 the PLL frequency.
  20  */
  21 #define CONFIG_PLL
  22 #define CONFIG_SYS_POWER_MANAGER
  23 #define CONFIG_SYS_OSC0_HZ                      25000000
  24 #define CONFIG_SYS_PLL0_DIV                     1
  25 #define CONFIG_SYS_PLL0_MUL                     5
  26 #define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
  27 #define CONFIG_SYS_CLKDIV_CPU                   0
  28 #define CONFIG_SYS_CLKDIV_HSB                   1
  29 #define CONFIG_SYS_CLKDIV_PBA                   2
  30 #define CONFIG_SYS_CLKDIV_PBB                   1
  31
  32 /* Reserve VM regions for SDRAM and NOR flash */
  33 #define CONFIG_SYS_NR_VM_REGIONS                2
  34
  35 /*
  36  * The PLLOPT register controls the PLL like this:
  37  *   icp = PLLOPT<2>
  38  *   ivco = PLLOPT<1:0>
  39  *
  40  * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
  41  */
  42 #define CONFIG_SYS_PLL0_OPT                     0x04
  43
  44 #define CONFIG_USART_BASE                       ATMEL_BASE_USART1
  45 #define CONFIG_USART_ID                         1
  46
  47 #define CONFIG_HOSTNAME                 hammerhead
  48
  49 /* User serviceable stuff */
  50 #define CONFIG_DOS_PARTITION
  51
  52 #define CONFIG_CMDLINE_TAG
  53 #define CONFIG_SETUP_MEMORY_TAGS
  54 #define CONFIG_INITRD_TAG
  55
  56 #define CONFIG_STACKSIZE                (2048)
  57
  58 #define CONFIG_BAUDRATE                 115200
  59 #define CONFIG_BOOTARGS                                                 \
  60         "console=ttyS0 root=mtd1 rootfstype=jffs2"
  61 #define CONFIG_BOOTCOMMAND                                              \
  62         "fsload; bootm"
  63
  64 /*
  65  * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
  66  * data on the serial line may interrupt the boot sequence.
  67  */
  68 #define CONFIG_BOOTDELAY                1
  69 #define CONFIG_AUTOBOOT
  70 #define CONFIG_AUTOBOOT_KEYED
  71 #define CONFIG_AUTOBOOT_PROMPT                          \
  72         "Press SPACE to abort autoboot in %d seconds\n", bootdelay
  73 #define CONFIG_AUTOBOOT_DELAY_STR       "d"
  74 #define CONFIG_AUTOBOOT_STOP_STR        " "
  75
  76 /*
  77  * After booting the board for the first time, new ethernet address
  78  * should be generated and assigned to the environment variables
  79  * "ethaddr". This is normally done during production.
  80  */
  81 #define CONFIG_OVERWRITE_ETHADDR_ONCE
  82
  83 /*
  84  * BOOTP/DHCP options
  85  */
  86 #define CONFIG_BOOTP_SUBNETMASK
  87 #define CONFIG_BOOTP_GATEWAY
  88
  89 /*
  90  * Command line configuration.
  91  */
  92 #include <config_cmd_default.h>
  93
  94 #define CONFIG_CMD_ASKENV
  95 #define CONFIG_CMD_DHCP
  96 #define CONFIG_CMD_EXT2
  97 #define CONFIG_CMD_FAT
  98 #define CONFIG_CMD_JFFS2
  99 #define CONFIG_CMD_MMC
 100 #undef CONFIG_CMD_FPGA
 101 #undef CONFIG_CMD_SETGETDCR
 102
 103 #define CONFIG_ATMEL_USART
 104 #define CONFIG_MACB
 105 #define CONFIG_PORTMUX_PIO
 106 #define CONFIG_SYS_NR_PIOS                      5
 107 #define CONFIG_SYS_HSDRAMC
 108 #define CONFIG_MMC
 109 #define CONFIG_GENERIC_ATMEL_MCI
 110 #define CONFIG_GENERIC_MMC
 111
 112 #define CONFIG_SYS_DCACHE_LINESZ                32
 113 #define CONFIG_SYS_ICACHE_LINESZ                32
 114
 115 #define CONFIG_NR_DRAM_BANKS            1
 116
 117 #define CONFIG_SYS_FLASH_CFI
 118 #define CONFIG_FLASH_CFI_DRIVER
 119
 120 #define CONFIG_SYS_FLASH_BASE                   0x00000000
 121 #define CONFIG_SYS_FLASH_SIZE                   0x800000
 122 #define CONFIG_SYS_MAX_FLASH_BANKS              1
 123 #define CONFIG_SYS_MAX_FLASH_SECT               135
 124
 125 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 126 #define CONFIG_SYS_TEXT_BASE            0x00000000
 127
 128 #define CONFIG_SYS_INTRAM_BASE                  0x24000000
 129 #define CONFIG_SYS_INTRAM_SIZE                  0x8000
 130
 131 #define CONFIG_SYS_SDRAM_BASE                   0x10000000
 132
 133 #define CONFIG_ENV_IS_IN_FLASH
 134 #define CONFIG_ENV_SIZE                 65536
 135 #define CONFIG_ENV_ADDR                 (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
 136
 137 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
 138
 139 #define CONFIG_SYS_MALLOC_LEN                   (256*1024)
 140
 141 #define CONFIG_SYS_DMA_ALLOC_LEN                (16384)
 142
 143 /* Allow 4MB for the kernel run-time image */
 144 #define CONFIG_SYS_LOAD_ADDR                    (CONFIG_SYS_SDRAM_BASE + 0x00400000)
 145 #define CONFIG_SYS_BOOTPARAMS_LEN               (16 * 1024)
 146
 147 /* Other configuration settings that shouldn't have to change all that often */
 148 #define CONFIG_SYS_PROMPT                       "Hammerhead> "
 149 #define CONFIG_SYS_CBSIZE                       256
 150 #define CONFIG_SYS_MAXARGS                      16
 151 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 152 #define CONFIG_SYS_LONGHELP
 153
 154 #define CONFIG_SYS_MEMTEST_START                CONFIG_SYS_SDRAM_BASE
 155 #define CONFIG_SYS_MEMTEST_END                  (CONFIG_SYS_MEMTEST_START + 0x1f00000)
 156
 157 #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
 158
 159 #endif /* __CONFIG_H */