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1 /*
2 * DENX M53 configuration
3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 #ifndef __M53EVK_CONFIG_H__
9 #define __M53EVK_CONFIG_H__
10
11 #define CONFIG_MX53
12 #define CONFIG_SYS_GENERIC_BOARD
13 #define CONFIG_MXC_GPIO
14
15 #include <asm/arch/imx-regs.h>
16
17 #define CONFIG_DISPLAY_CPUINFO
18 #define CONFIG_BOARD_EARLY_INIT_F
19 #define CONFIG_REVISION_TAG
20 #define CONFIG_SYS_NO_FLASH
21
22 #define CONFIG_FIT
23
24 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
25
26 /*
27 * U-Boot Commands
28 */
29 #define CONFIG_DISPLAY_BOARDINFO
30 #define CONFIG_DOS_PARTITION
31 #define CONFIG_FAT_WRITE
32
33 #define CONFIG_CMD_ASKENV
34 #define CONFIG_CMD_BMP
35 #define CONFIG_CMD_DATE
36 #define CONFIG_CMD_DHCP
37 #define CONFIG_CMD_EXT4
38 #define CONFIG_CMD_EXT4_WRITE
39 #define CONFIG_CMD_FAT
40 #define CONFIG_CMD_FS_GENERIC
41 #define CONFIG_CMD_GREPENV
42 #define CONFIG_CMD_I2C
43 #define CONFIG_CMD_MII
44 #define CONFIG_CMD_MMC
45 #define CONFIG_CMD_NAND
46 #define CONFIG_CMD_PING
47 #define CONFIG_CMD_SATA
48 #define CONFIG_CMD_USB
49 #define CONFIG_VIDEO
50
51
52 /*
53 * Memory configurations
54 */
55 #define CONFIG_NR_DRAM_BANKS 2
56 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
57 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
58 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
59 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
60 #define PHYS_SDRAM_SIZE (gd->ram_size)
61 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
62 #define CONFIG_SYS_MEMTEST_START 0x70000000
63 #define CONFIG_SYS_MEMTEST_END 0x8ff00000
64
65 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
66 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
67 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
68
69 #define CONFIG_SYS_INIT_SP_OFFSET \
70 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
71 #define CONFIG_SYS_INIT_SP_ADDR \
72 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
73
74 #define CONFIG_SYS_TEXT_BASE 0x71000000
75
76 /*
77 * U-Boot general configurations
78 */
79 #define CONFIG_SYS_LONGHELP
80 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
81 #define CONFIG_SYS_PBSIZE \
82 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
83 /* Print buffer size */
84 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
85 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
86 /* Boot argument buffer size */
87 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
88 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
89 #define CONFIG_CMDLINE_EDITING /* Command history etc */
90 #define CONFIG_SYS_HUSH_PARSER
91
92 /*
93 * Serial Driver
94 */
95 #define CONFIG_MXC_UART
96 #define CONFIG_MXC_UART_BASE UART2_BASE
97 #define CONFIG_CONS_INDEX 1
98 #define CONFIG_BAUDRATE 115200
99
100 /*
101 * MMC Driver
102 */
103 #ifdef CONFIG_CMD_MMC
104 #define CONFIG_MMC
105 #define CONFIG_GENERIC_MMC
106 #define CONFIG_FSL_ESDHC
107 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
108 #define CONFIG_SYS_FSL_ESDHC_NUM 1
109 #endif
110
111 /*
112 * NAND
113 */
114 #define CONFIG_ENV_SIZE (16 * 1024)
115 #ifdef CONFIG_CMD_NAND
116 #define CONFIG_SYS_MAX_NAND_DEVICE 1
117 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
118 #define CONFIG_NAND_MXC
119 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
120 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
121 #define CONFIG_SYS_NAND_LARGEPAGE
122 #define CONFIG_MXC_NAND_HWECC
123 #define CONFIG_SYS_NAND_USE_FLASH_BBT
124
125 /* Environment is in NAND */
126 #define CONFIG_ENV_IS_IN_NAND
127 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
128 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
129 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE)
130 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */
131 #define CONFIG_ENV_OFFSET_REDUND \
132 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
133
134 #define CONFIG_CMD_UBI
135 #define CONFIG_CMD_UBIFS
136 #define CONFIG_CMD_MTDPARTS
137 #define CONFIG_RBTREE
138 #define CONFIG_LZO
139 #define CONFIG_MTD_DEVICE
140 #define CONFIG_MTD_PARTITIONS
141 #define MTDIDS_DEFAULT "nand0=mxc_nand"
142 #define MTDPARTS_DEFAULT \
143 "mtdparts=mxc_nand:" \
144 "1024k(u-boot)," \
145 "512k(env1)," \
146 "512k(env2)," \
147 "14m(boot)," \
148 "240m(data)," \
149 "-@2048k(UBI)"
150 #else
151 #define CONFIG_ENV_IS_NOWHERE
152 #endif
153
154 /*
155 * Ethernet on SOC (FEC)
156 */
157 #ifdef CONFIG_CMD_NET
158 #define CONFIG_FEC_MXC
159 #define IMX_FEC_BASE FEC_BASE_ADDR
160 #define CONFIG_FEC_MXC_PHYADDR 0x0
161 #define CONFIG_MII
162 #define CONFIG_DISCOVER_PHY
163 #define CONFIG_FEC_XCV_TYPE RMII
164 #define CONFIG_PHYLIB
165 #define CONFIG_PHY_MICREL
166 #define CONFIG_ETHPRIME "FEC0"
167 #endif
168
169 /*
170 * I2C
171 */
172 #ifdef CONFIG_CMD_I2C
173 #define CONFIG_SYS_I2C
174 #define CONFIG_SYS_I2C_MXC
175 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
176 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
177 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
178 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
179 #endif
180
181 /*
182 * RTC
183 */
184 #ifdef CONFIG_CMD_DATE
185 #define CONFIG_RTC_M41T62
186 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
187 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
188 #endif
189
190 /*
191 * USB
192 */
193 #ifdef CONFIG_CMD_USB
194 #define CONFIG_USB_EHCI
195 #define CONFIG_USB_EHCI_MX5
196 #define CONFIG_USB_STORAGE
197 #define CONFIG_USB_HOST_ETHER
198 #define CONFIG_USB_ETHER_ASIX
199 #define CONFIG_USB_ETHER_MCS7830
200 #define CONFIG_USB_ETHER_SMSC95XX
201 #define CONFIG_MXC_USB_PORT 1
202 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
203 #define CONFIG_MXC_USB_FLAGS 0
204 #endif
205
206 /*
207 * SATA
208 */
209 #ifdef CONFIG_CMD_SATA
210 #define CONFIG_DWC_AHSATA
211 #define CONFIG_SYS_SATA_MAX_DEVICE 1
212 #define CONFIG_DWC_AHSATA_PORT_ID 0
213 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
214 #define CONFIG_LBA48
215 #define CONFIG_LIBATA
216 #endif
217
218 /*
219 * LCD
220 */
221 #ifdef CONFIG_VIDEO
222 #define CONFIG_VIDEO_IPUV3
223 #define CONFIG_CFB_CONSOLE
224 #define CONFIG_VGA_AS_SINGLE_DEVICE
225 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
226 #define CONFIG_VIDEO_BMP_RLE8
227 #define CONFIG_VIDEO_BMP_GZIP
228 #define CONFIG_SPLASH_SCREEN
229 #define CONFIG_SPLASHIMAGE_GUARD
230 #define CONFIG_SPLASH_SCREEN_ALIGN
231 #define CONFIG_BMP_16BPP
232 #define CONFIG_VIDEO_LOGO
233 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
234 #define CONFIG_IPUV3_CLK 200000000
235 #endif
236
237 /*
238 * Boot Linux
239 */
240 #define CONFIG_CMDLINE_TAG
241 #define CONFIG_INITRD_TAG
242 #define CONFIG_REVISION_TAG
243 #define CONFIG_SETUP_MEMORY_TAGS
244 #define CONFIG_BOOTDELAY 3
245 #define CONFIG_BOOTFILE "fitImage"
246 #define CONFIG_BOOTARGS "console=ttymxc1,115200"
247 #define CONFIG_LOADADDR 0x70800000
248 #define CONFIG_BOOTCOMMAND "run mmc_mmc"
249 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
250 #define CONFIG_OF_LIBFDT
251
252 /*
253 * NAND SPL
254 */
255 #define CONFIG_SPL_FRAMEWORK
256 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
257 #define CONFIG_SPL_BOARD_INIT
258 #define CONFIG_SPL_TEXT_BASE 0x70008000
259 #define CONFIG_SPL_PAD_TO 0x8000
260 #define CONFIG_SPL_STACK 0x70004000
261 #define CONFIG_SPL_GPIO_SUPPORT
262 #define CONFIG_SPL_LIBCOMMON_SUPPORT
263 #define CONFIG_SPL_LIBGENERIC_SUPPORT
264 #define CONFIG_SPL_NAND_SUPPORT
265 #define CONFIG_SPL_SERIAL_SUPPORT
266
267 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
268 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
269 #define CONFIG_SYS_NAND_OOBSIZE 64
270 #define CONFIG_SYS_NAND_PAGE_COUNT 64
271 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
272 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
273
274 /*
275 * Extra Environments
276 */
277 #define CONFIG_PREBOOT "run try_bootscript"
278 #define CONFIG_HOSTNAME m53evk
279
280 #define CONFIG_EXTRA_ENV_SETTINGS \
281 "consdev=ttymxc1\0" \
282 "baudrate=115200\0" \
283 "bootscript=boot.scr\0" \
284 "bootdev=/dev/mmcblk0p1\0" \
285 "rootdev=/dev/mmcblk0p2\0" \
286 "netdev=eth0\0" \
287 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \
288 "kernel_addr_r=0x72000000\0" \
289 "addcons=" \
290 "setenv bootargs ${bootargs} " \
291 "console=${consdev},${baudrate}\0" \
292 "addip=" \
293 "setenv bootargs ${bootargs} " \
294 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
295 "${netmask}:${hostname}:${netdev}:off\0" \
296 "addmisc=" \
297 "setenv bootargs ${bootargs} ${miscargs}\0" \
298 "adddfltmtd=" \
299 "if test \"x${mtdparts}\" == \"x\" ; then " \
300 "mtdparts default ; " \
301 "fi\0" \
302 "addmtd=" \
303 "run adddfltmtd ; " \
304 "setenv bootargs ${bootargs} ${mtdparts}\0" \
305 "addargs=run addcons addmtd addmisc\0" \
306 "mmcload=" \
307 "mmc rescan ; " \
308 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \
309 "ubiload=" \
310 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \
311 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
312 "netload=" \
313 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
314 "miscargs=nohlt panic=1\0" \
315 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \
316 "ubiargs=" \
317 "setenv bootargs ubi.mtd=5 " \
318 "root=ubi0:rootfs rootfstype=ubifs\0" \
319 "nfsargs=" \
320 "setenv bootargs root=/dev/nfs rw " \
321 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
322 "mmc_mmc=" \
323 "run mmcload mmcargs addargs ; " \
324 "bootm ${kernel_addr_r}\0" \
325 "mmc_ubi=" \
326 "run mmcload ubiargs addargs ; " \
327 "bootm ${kernel_addr_r}\0" \
328 "mmc_nfs=" \
329 "run mmcload nfsargs addip addargs ; " \
330 "bootm ${kernel_addr_r}\0" \
331 "ubi_mmc=" \
332 "run ubiload mmcargs addargs ; " \
333 "bootm ${kernel_addr_r}\0" \
334 "ubi_ubi=" \
335 "run ubiload ubiargs addargs ; " \
336 "bootm ${kernel_addr_r}\0" \
337 "ubi_nfs=" \
338 "run ubiload nfsargs addip addargs ; " \
339 "bootm ${kernel_addr_r}\0" \
340 "net_mmc=" \
341 "run netload mmcargs addargs ; " \
342 "bootm ${kernel_addr_r}\0" \
343 "net_ubi=" \
344 "run netload ubiargs addargs ; " \
345 "bootm ${kernel_addr_r}\0" \
346 "net_nfs=" \
347 "run netload nfsargs addip addargs ; " \
348 "bootm ${kernel_addr_r}\0" \
349 "try_bootscript=" \
350 "mmc rescan;" \
351 "if test -e mmc 0:1 ${bootscript} ; then " \
352 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \
353 "then ; " \
354 "echo Running bootscript... ; " \
355 "source ${kernel_addr_r} ; " \
356 "fi ; " \
357 "fi\0"
358
359 #endif /* __M53EVK_CONFIG_H__ */