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git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/microblaze-generic.h
2 * (C) Copyright 2007-2010 Michal Simek
4 * Michal SIMEK <monstr@monstr.eu>
6 * SPDX-License-Identifier: GPL-2.0+
12 #include "../board/xilinx/microblaze-generic/xparameters.h"
15 #define MICROBLAZE_V5 1
17 /* linear and spi flash memory */
18 #ifdef XILINX_FLASH_START
21 #undef RAMENV /* hold environment in flash */
23 #ifdef XILINX_SPI_FLASH_BASEADDR
26 #undef RAMENV /* hold environment in flash */
30 #define RAMENV /* hold environment in RAM */
35 # define CONFIG_BAUDRATE 115200
36 /* The following table includes the supported baudrates */
37 # define CONFIG_SYS_BAUDRATE_TABLE \
38 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
40 /* setting reset address */
41 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/
44 #undef CONFIG_SYS_ENET
45 #if defined(CONFIG_XILINX_EMACLITE)
46 # define CONFIG_SYS_ENET
48 #if defined(XILINX_AXIEMAC_BASEADDR)
49 # define CONFIG_XILINX_AXIEMAC 1
50 # define CONFIG_SYS_ENET
56 #ifdef XILINX_GPIO_BASEADDR
57 # define CONFIG_XILINX_GPIO
58 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
61 /* interrupt controller */
62 #ifdef XILINX_INTC_BASEADDR
63 # define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
64 # define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
68 #if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ)
69 # define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
70 # define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
74 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
75 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR
76 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ
77 # ifndef CONFIG_SPL_BUILD
78 # define CONFIG_HW_WATCHDOG
79 # define CONFIG_XILINX_TB_WATCHDOG
83 #if !defined(CONFIG_OF_CONTROL) || \
84 (defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_OF_CONTROL))
85 /* ddr sdram - main memory */
86 # define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START
87 # define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE
90 #define CONFIG_SYS_MALLOC_LEN 0xC0000
92 /* Stack location before relocation */
93 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \
94 CONFIG_SYS_MALLOC_F_LEN)
97 * CFI flash memory layout - Example
98 * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
99 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB
101 * SECT_SIZE = 0x20000; 128kB is one sector
102 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store
104 * 0x2200_0000 CONFIG_SYS_FLASH_BASE
106 * 0x2204_0000 CONFIG_ENV_ADDR
110 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
115 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
116 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
117 # define CONFIG_SYS_FLASH_CFI 1
118 # define CONFIG_FLASH_CFI_DRIVER 1
120 # define CONFIG_SYS_FLASH_EMPTY_INFO 1
121 /* max number of memory banks */
122 # define CONFIG_SYS_MAX_FLASH_BANKS 1
123 /* max number of sectors on one chip */
124 # define CONFIG_SYS_MAX_FLASH_SECT 512
125 /* hardware flash protection */
126 # define CONFIG_SYS_FLASH_PROTECTION
127 /* use buffered writes (20x faster) */
128 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
130 # define CONFIG_ENV_IS_NOWHERE 1
131 # define CONFIG_ENV_SIZE 0x1000
132 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
134 # else /* FLASH && !RAMENV */
135 # define CONFIG_ENV_IS_IN_FLASH 1
136 /* 128K(one sector) for env */
137 # define CONFIG_ENV_SECT_SIZE 0x20000
138 # define CONFIG_ENV_ADDR \
139 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
140 # define CONFIG_ENV_SIZE 0x20000
141 # endif /* FLASH && !RAMBOOT */
145 # define CONFIG_SYS_NO_FLASH 1
146 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR
147 # define CONFIG_SPI 1
148 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
149 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ
150 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS
153 # define CONFIG_ENV_IS_NOWHERE 1
154 # define CONFIG_ENV_SIZE 0x1000
155 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
157 # else /* SPIFLASH && !RAMENV */
158 # define CONFIG_ENV_IS_IN_SPI_FLASH 1
159 # define CONFIG_ENV_SPI_MODE SPI_MODE_3
160 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
161 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
162 /* 128K(two sectors) for env */
163 # define CONFIG_ENV_SECT_SIZE 0x10000
164 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE)
165 /* Warning: adjust the offset in respect of other flash content and size */
166 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
167 # endif /* SPIFLASH && !RAMBOOT */
168 #else /* !SPIFLASH */
171 # define CONFIG_SYS_NO_FLASH 1
172 # define CONFIG_ENV_IS_NOWHERE 1
173 # define CONFIG_ENV_SIZE 0x1000
174 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
175 #endif /* !SPIFLASH */
179 #ifdef XILINX_SYSACE_BASEADDR
180 # define CONFIG_SYSTEMACE
181 /* #define DEBUG_SYSTEMACE */
182 # define SYSTEMACE_CONFIG_FPGA
183 # define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
184 # define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
185 # define CONFIG_DOS_PARTITION
188 #if defined(XILINX_USE_ICACHE)
189 # define CONFIG_ICACHE
191 # undef CONFIG_ICACHE
194 #if defined(XILINX_USE_DCACHE)
195 # define CONFIG_DCACHE
197 # undef CONFIG_DCACHE
200 #ifndef XILINX_DCACHE_BYTE_SIZE
201 #define XILINX_DCACHE_BYTE_SIZE 32768
207 #define CONFIG_BOOTP_BOOTFILESIZE
208 #define CONFIG_BOOTP_BOOTPATH
209 #define CONFIG_BOOTP_GATEWAY
210 #define CONFIG_BOOTP_HOSTNAME
213 * Command line configuration.
215 #define CONFIG_CMD_ASKENV
216 #define CONFIG_CMD_IRQ
217 #define CONFIG_CMD_MFSL
219 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
220 # define CONFIG_CMD_CACHE
222 # undef CONFIG_CMD_CACHE
225 #ifdef CONFIG_SYS_ENET
226 # define CONFIG_CMD_PING
227 # define CONFIG_CMD_DHCP
228 # define CONFIG_CMD_TFTPPUT
231 #if defined(CONFIG_SYSTEMACE)
232 # define CONFIG_CMD_EXT2
233 # define CONFIG_CMD_FAT
237 # define CONFIG_CMD_JFFS2
238 # define CONFIG_CMD_UBI
239 # undef CONFIG_CMD_UBIFS
241 # if !defined(RAMENV)
242 # define CONFIG_CMD_SAVES
246 #if defined(SPIFLASH)
247 # define CONFIG_CMD_SF
249 # if !defined(RAMENV)
250 # define CONFIG_CMD_SAVES
253 # undef CONFIG_CMD_JFFS2
254 # undef CONFIG_CMD_UBI
255 # undef CONFIG_CMD_UBIFS
259 #if defined(CONFIG_CMD_JFFS2)
260 # define CONFIG_MTD_PARTITIONS
263 #if defined(CONFIG_CMD_UBIFS)
264 # define CONFIG_CMD_UBI
268 #if defined(CONFIG_CMD_UBI)
269 # define CONFIG_MTD_PARTITIONS
270 # define CONFIG_RBTREE
273 #if defined(CONFIG_MTD_PARTITIONS)
275 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */
276 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
277 #define CONFIG_FLASH_CFI_MTD
278 #define MTDIDS_DEFAULT "nor0=flash-0"
280 /* default mtd partition table */
281 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\
282 "256k(env),3m(kernel),1m(romfs),"\
283 "1m(cramfs),-(jffs2)"
286 /* size of console buffer */
287 #define CONFIG_SYS_CBSIZE 512
288 /* print buffer size */
289 #define CONFIG_SYS_PBSIZE \
290 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
291 /* max number of command args */
292 #define CONFIG_SYS_MAXARGS 15
293 #define CONFIG_SYS_LONGHELP
294 /* default load address */
295 #define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START
297 #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
298 #define CONFIG_BOOTARGS "root=romfs"
299 #define CONFIG_HOSTNAME XILINX_BOARD_NAME
300 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
301 #define CONFIG_IPADDR 192.168.0.3
302 #define CONFIG_SERVERIP 192.168.0.5
303 #define CONFIG_GATEWAYIP 192.168.0.1
305 /* architecture dependent code */
306 #define CONFIG_SYS_USR_EXCEP /* user exception */
308 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo"
310 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \
312 "mtdparts=mtdparts=flash-0:"\
313 "256k(u-boot),256k(env),3m(kernel),"\
314 "1m(romfs),1m(cramfs),-(jffs2)\0"\
315 "nc=setenv stdout nc;"\
316 "setenv stdin nc\0" \
317 "serial=setenv stdout serial;"\
318 "setenv stdin serial\0"
320 #define CONFIG_CMDLINE_EDITING
322 #define CONFIG_NETCONSOLE
323 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
325 /* Use the HUSH parser */
326 #define CONFIG_SYS_HUSH_PARSER
328 /* Enable flat device tree support */
331 #define CONFIG_OF_LIBFDT 1
333 #if defined(CONFIG_XILINX_AXIEMAC)
334 # define CONFIG_MII 1
335 # define CONFIG_CMD_MII 1
336 # define CONFIG_PHY_GIGE 1
337 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1
338 # define CONFIG_PHY_ATHEROS 1
339 # define CONFIG_PHY_BROADCOM 1
340 # define CONFIG_PHY_DAVICOM 1
341 # define CONFIG_PHY_LXT 1
342 # define CONFIG_PHY_MARVELL 1
343 # define CONFIG_PHY_MICREL 1
344 # define CONFIG_PHY_MICREL_KSZ9021
345 # define CONFIG_PHY_NATSEMI 1
346 # define CONFIG_PHY_REALTEK 1
347 # define CONFIG_PHY_VITESSE 1
350 # undef CONFIG_CMD_MII
354 #define CONFIG_CMD_SPL
355 #define CONFIG_SPL_FRAMEWORK
356 #define CONFIG_SPL_LIBCOMMON_SUPPORT
357 #define CONFIG_SPL_LIBGENERIC_SUPPORT
358 #define CONFIG_SPL_SERIAL_SUPPORT
359 #define CONFIG_SPL_BOARD_INIT
361 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds"
363 #define CONFIG_SPL_RAM_DEVICE
364 #ifdef CONFIG_SYS_FLASH_BASE
365 # define CONFIG_SPL_NOR_SUPPORT
366 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
369 /* for booting directly linux */
370 #define CONFIG_SPL_OS_BOOT
372 #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + \
374 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
376 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \
379 /* SP location before relocation, must use scratch RAM */
381 #define CONFIG_SYS_INIT_RAM_ADDR 0x0
382 /* BRAM size - will be generated */
383 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000
385 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
386 CONFIG_SYS_INIT_RAM_SIZE - \
387 CONFIG_SYS_MALLOC_F_LEN)
389 /* Just for sure that there is a space for stack */
390 #define CONFIG_SPL_STACK_SIZE 0x100
392 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
394 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \
395 CONFIG_SYS_INIT_RAM_ADDR - \
396 CONFIG_SYS_MALLOC_F_LEN - \
397 CONFIG_SPL_STACK_SIZE)
399 #endif /* __CONFIG_H */