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1 /*
2 * Copyright (C) ST-Ericsson SA 2009
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 #ifndef __CONFIG_H
8 #define __CONFIG_H
9
10 /*
11 * #define DEBUG 1
12 */
13
14 #define CONFIG_SKIP_LOWLEVEL_INIT
15 #define CONFIG_SNOWBALL
16 #define CONFIG_SYS_ICACHE_OFF
17 #define CONFIG_SYS_DCACHE_OFF
18 #define CONFIG_ARCH_CPU_INIT
19 #define CONFIG_BOARD_LATE_INIT
20
21 /*
22 * High Level Configuration Options
23 * (easy to change)
24 */
25 #define CONFIG_U8500
26 #define CONFIG_L2_OFF
27
28 #define CONFIG_SYS_MEMTEST_START 0x00000000
29 #define CONFIG_SYS_MEMTEST_END 0x1FFFFFFF
30
31 /*-----------------------------------------------------------------------
32 * Size of environment and malloc() pool
33 */
34 /*
35 * If you use U-Boot as crash kernel, make sure that it does not overwrite
36 * information saved by kexec during panic. Kexec expects the start
37 * address of the executable 32K above "crashkernel" address.
38 */
39 /*
40 * Size of malloc() pool
41 */
42 #define CONFIG_ENV_SIZE (8*1024)
43 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256*1024)
44
45 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */
46
47 #define CONFIG_ENV_IS_IN_MMC
48 #define CONFIG_CMD_ENV
49 #define CONFIG_CMD_SAVEENV
50 #define CONFIG_ENV_OFFSET 0x0118000
51 #define CONFIG_SYS_MMC_ENV_DEV 0 /* SLOT2: eMMC */
52
53 /*
54 * PL011 Configuration
55 */
56 #define CONFIG_PL011_SERIAL
57 #define CONFIG_PL011_SERIAL_RLCR
58 #define CONFIG_PL011_SERIAL_FLUSH_ON_INIT
59
60 /*
61 * U8500 UART registers base for 3 serial devices
62 */
63 #define CFG_UART0_BASE 0x80120000
64 #define CFG_UART1_BASE 0x80121000
65 #define CFG_UART2_BASE 0x80007000
66 #define CFG_SERIAL0 CFG_UART0_BASE
67 #define CFG_SERIAL1 CFG_UART1_BASE
68 #define CFG_SERIAL2 CFG_UART2_BASE
69 #define CONFIG_PL011_CLOCK 38400000
70 #define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1, \
71 (void *)CFG_SERIAL2 }
72 #define CONFIG_CONS_INDEX 2
73 #define CONFIG_BAUDRATE 115200
74
75 /*
76 * Devices and file systems
77 */
78 #define CONFIG_MMC
79 #define CONFIG_GENERIC_MMC
80 #define CONFIG_DOS_PARTITION
81
82 /*
83 * Commands
84 */
85 #define CONFIG_CMD_MEMORY
86 #define CONFIG_CMD_BOOTD
87 #define CONFIG_CMD_BDI
88 #define CONFIG_CMD_IMI
89 #define CONFIG_CMD_MISC
90 #define CONFIG_CMD_RUN
91 #define CONFIG_CMD_ECHO
92 #define CONFIG_CMD_CONSOLE
93 #define CONFIG_CMD_LOADS
94 #define CONFIG_CMD_LOADB
95 #define CONFIG_CMD_MMC
96 #define CONFIG_CMD_FAT
97 #define CONFIG_CMD_EXT2
98 #define CONFIG_CMD_SOURCE
99
100 #ifndef CONFIG_BOOTDELAY
101 #define CONFIG_BOOTDELAY 1
102 #endif
103 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
104
105 #undef CONFIG_BOOTARGS
106 #define CONFIG_BOOTCOMMAND \
107 "mmc dev 1; " \
108 "if run loadbootscript; " \
109 "then run bootscript; " \
110 "else " \
111 "if run mmcload; " \
112 "then run mmcboot; " \
113 "else " \
114 "mmc dev 0; " \
115 "if run emmcloadbootscript; " \
116 "then run bootscript; " \
117 "else " \
118 "if run emmcload; " \
119 "then run emmcboot; " \
120 "else " \
121 "echo No media to boot from; " \
122 "fi; " \
123 "fi; " \
124 "fi; " \
125 "fi; "
126
127 #define CONFIG_EXTRA_ENV_SETTINGS \
128 "verify=n\0" \
129 "loadaddr=0x00100000\0" \
130 "console=ttyAMA2,115200n8\0" \
131 "loadbootscript=fatload mmc 1:1 ${loadaddr} boot.scr\0" \
132 "emmcloadbootscript=fatload mmc 0:2 ${loadaddr} boot.scr\0" \
133 "bootscript=echo Running bootscript " \
134 "from mmc ...; source ${loadaddr}\0" \
135 "memargs256=mem=96M@0 mem_modem=32M@96M mem=32M@128M " \
136 "hwmem=22M@160M pmem_hwb=42M@182M mem_mali=32@224M\0" \
137 "memargs512=mem=96M@0 mem_modem=32M@96M hwmem=32M@128M " \
138 "mem=64M@160M mem_mali=32M@224M " \
139 "pmem_hwb=128M@256M mem=128M@384M\0" \
140 "memargs1024=mem=128M@0 mali.mali_mem=32M@128M " \
141 "hwmem=168M@M160M mem=48M@328M " \
142 "mem_issw=1M@383M mem=640M@384M\0" \
143 "memargs=setenv bootargs ${bootargs} ${memargs1024}\0" \
144 "emmcload=fatload mmc 0:2 ${loadaddr} uImage\0" \
145 "mmcload=fatload mmc 1:1 ${loadaddr} uImage\0" \
146 "commonargs=setenv bootargs console=${console} " \
147 "vmalloc=300M\0" \
148 "emmcargs=setenv bootargs ${bootargs} " \
149 "root=/dev/mmcblk0p3 " \
150 "rootwait\0" \
151 "addcons=setenv bootargs ${bootargs} " \
152 "console=${console}\0" \
153 "emmcboot=echo Booting from eMMC ...; " \
154 "run commonargs emmcargs memargs; " \
155 "bootm ${loadaddr}\0" \
156 "mmcargs=setenv bootargs ${bootargs} " \
157 "root=/dev/mmcblk1p2 " \
158 "rootwait earlyprintk\0" \
159 "mmcboot=echo Booting from external MMC ...; " \
160 "run commonargs mmcargs memargs; " \
161 "bootm ${loadaddr}\0" \
162 "fdt_high=0x2BC00000\0" \
163 "stdout=serial,usbtty\0" \
164 "stdin=serial,usbtty\0" \
165 "stderr=serial,usbtty\0"
166
167 /*-----------------------------------------------------------------------
168 * Miscellaneous configurable options
169 */
170
171 #define CONFIG_SYS_LONGHELP /* undef to save memory */
172 #define CONFIG_SYS_PROMPT "U8500 $ " /* Monitor Command Prompt */
173 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
174
175 /* Print Buffer Size */
176 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
177 + sizeof(CONFIG_SYS_PROMPT) + 16)
178 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
179 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */
180
181 #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
182 #define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
183 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1
184
185 #define CONFIG_SYS_HUSH_PARSER 1
186 #define CONFIG_CMDLINE_EDITING
187
188 #define CONFIG_SETUP_MEMORY_TAGS 2
189 #define CONFIG_INITRD_TAG 1
190 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
191
192 /*
193 * Physical Memory Map
194 */
195 #define CONFIG_NR_DRAM_BANKS 1
196 #define PHYS_SDRAM_1 0x00000000 /* DDR-SDRAM Bank #1 */
197
198 /*
199 * additions for new relocation code
200 */
201 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
202 #define CONFIG_SYS_MAX_RAM_SIZE 0x40000000
203 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000
204 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
205 CONFIG_SYS_INIT_RAM_SIZE - \
206 GENERATED_GBL_DATA_SIZE)
207 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
208
209 /* landing address before relocation */
210 #ifndef CONFIG_SYS_TEXT_BASE
211 #define CONFIG_SYS_TEXT_BASE 0x0
212 #endif
213
214 /*
215 * MMC related configs
216 */
217 #define CONFIG_ARM_PL180_MMCI
218 #define MMC_BLOCK_SIZE 512
219 #define CFG_EMMC_BASE 0x80114000
220 #define CFG_MMC_BASE 0x80126000
221
222 /*
223 * FLASH and environment organization
224 */
225 #define CONFIG_SYS_NO_FLASH
226
227 /*
228 * base register values for U8500
229 */
230 #define CFG_PRCMU_BASE 0x80157000 /* Power, reset and clock */
231
232
233 /*
234 * U8500 GPIO register base for 9 banks
235 */
236 #define CONFIG_DB8500_GPIO
237 #define CFG_GPIO_0_BASE 0x8012E000
238 #define CFG_GPIO_1_BASE 0x8012E080
239 #define CFG_GPIO_2_BASE 0x8000E000
240 #define CFG_GPIO_3_BASE 0x8000E080
241 #define CFG_GPIO_4_BASE 0x8000E100
242 #define CFG_GPIO_5_BASE 0x8000E180
243 #define CFG_GPIO_6_BASE 0x8011E000
244 #define CFG_GPIO_7_BASE 0x8011E080
245 #define CFG_GPIO_8_BASE 0xA03FE000
246
247 #define CFG_FSMC_BASE 0x80000000 /* FSMC Controller */
248
249 #endif /* __CONFIG_H */