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1 /*
2 * Copyright (C) 2013 Samsung Electronics
3 * Sanghee Kim <sh0130.kim@samsung.com>
4 * Piotr Wilczek <p.wilczek@samsung.com>
5 *
6 * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11 #ifndef __CONFIG_TRATS2_H
12 #define __CONFIG_TRATS2_H
13
14 #include <configs/exynos4-common.h>
15
16 #define CONFIG_TIZEN /* TIZEN lib */
17
18 #define CONFIG_SYS_L2CACHE_OFF
19 #ifndef CONFIG_SYS_L2CACHE_OFF
20 #define CONFIG_SYS_L2_PL310
21 #define CONFIG_SYS_PL310_BASE 0x10502000
22 #endif
23
24 /* TRATS2 has 4 banks of DRAM */
25 #define CONFIG_NR_DRAM_BANKS 4
26 #define CONFIG_SYS_SDRAM_BASE 0x40000000
27 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
28 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
29 /* memtest works on */
30 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
31 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
32 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
33
34 #define CONFIG_SYS_TEXT_BASE 0x43e00000
35
36 /* select serial console configuration */
37 #define CONFIG_SERIAL2
38 #define CONFIG_BAUDRATE 115200
39
40 /* Console configuration */
41 #define CONFIG_SYS_CONSOLE_INFO_QUIET
42 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
43
44 #define CONFIG_BOOTARGS "Please use defined boot"
45 #define CONFIG_BOOTCOMMAND "run autoboot"
46 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
47
48 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
49 - GENERATED_GBL_DATA_SIZE)
50
51 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
52
53 #define CONFIG_SYS_MONITOR_BASE 0x00000000
54
55 #define CONFIG_ENV_IS_IN_MMC
56 #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
57 #define CONFIG_ENV_SIZE 4096
58 #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
59
60 #define CONFIG_ENV_OVERWRITE
61
62 #define CONFIG_ENV_VARS_UBOOT_CONFIG
63 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
64
65 /* Tizen - partitions definitions */
66 #define PARTS_CSA "csa-mmc"
67 #define PARTS_BOOT "boot"
68 #define PARTS_QBOOT "qboot"
69 #define PARTS_CSC "csc"
70 #define PARTS_ROOT "platform"
71 #define PARTS_DATA "data"
72 #define PARTS_UMS "ums"
73
74 #define PARTS_DEFAULT \
75 "uuid_disk=${uuid_gpt_disk};" \
76 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
77 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
78 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
79 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
80 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
81 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
82 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
83
84 #define CONFIG_DFU_ALT \
85 "u-boot raw 0x80 0x800;" \
86 "/uImage ext4 0 2;" \
87 "/modem.bin ext4 0 2;" \
88 "/exynos4412-trats2.dtb ext4 0 2;" \
89 ""PARTS_CSA" part 0 1;" \
90 ""PARTS_BOOT" part 0 2;" \
91 ""PARTS_QBOOT" part 0 3;" \
92 ""PARTS_CSC" part 0 4;" \
93 ""PARTS_ROOT" part 0 5;" \
94 ""PARTS_DATA" part 0 6;" \
95 ""PARTS_UMS" part 0 7;" \
96 "params.bin raw 0x38 0x8;" \
97 "/Image.itb ext4 0 2\0"
98
99 #define CONFIG_EXTRA_ENV_SETTINGS \
100 "bootk=" \
101 "run loaduimage;" \
102 "if run loaddtb; then " \
103 "bootm 0x40007FC0 - ${fdtaddr};" \
104 "fi;" \
105 "bootm 0x40007FC0;\0" \
106 "updatebackup=" \
107 "mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
108 " mmc dev 0 0\0" \
109 "updatebootb=" \
110 "mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
111 "mmcboot=" \
112 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
113 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
114 "run bootk\0" \
115 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
116 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
117 "verify=n\0" \
118 "rootfstype=ext4\0" \
119 "console=" CONFIG_DEFAULT_CONSOLE \
120 "kernelname=uImage\0" \
121 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
122 "${kernelname}\0" \
123 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
124 "${fdtfile}\0" \
125 "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
126 "mmcbootpart=2\0" \
127 "mmcrootpart=5\0" \
128 "opts=always_resume=1\0" \
129 "partitions=" PARTS_DEFAULT \
130 "dfu_alt_info=" CONFIG_DFU_ALT \
131 "uartpath=ap\0" \
132 "usbpath=ap\0" \
133 "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
134 "consoleoff=set console console=ram; save; reset\0" \
135 "spladdr=0x40000100\0" \
136 "splsize=0x200\0" \
137 "splfile=falcon.bin\0" \
138 "spl_export=" \
139 "setexpr spl_imgsize ${splsize} + 8 ;" \
140 "setenv spl_imgsize 0x${spl_imgsize};" \
141 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
142 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
143 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
144 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
145 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
146 "spl export atags 0x40007FC0;" \
147 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
148 "mw.l ${spl_addr_tmp} ${splsize};" \
149 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
150 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
151 "setenv spl_imgsize;" \
152 "setenv spl_imgaddr;" \
153 "setenv spl_addr_tmp;\0" \
154 CONFIG_EXTRA_ENV_ITB \
155 "fdtaddr=40800000\0" \
156
157 /* GPT */
158 #define CONFIG_RANDOM_UUID
159
160 /* I2C */
161 #include <asm/arch/gpio.h>
162
163 #define CONFIG_CMD_I2C
164
165 #define CONFIG_SYS_I2C
166 #define CONFIG_SYS_I2C_S3C24X0
167 #define CONFIG_SYS_I2C_S3C24X0_SPEED 100000
168 #define CONFIG_SYS_I2C_S3C24X0_SLAVE 0
169 #define CONFIG_MAX_I2C_NUM 8
170 #define CONFIG_SYS_I2C_SOFT
171 #define CONFIG_SYS_I2C_SOFT_SPEED 50000
172 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
173 #define I2C_SOFT_DECLARATIONS2
174 #define CONFIG_SYS_I2C_SOFT_SPEED_2 50000
175 #define CONFIG_SYS_I2C_SOFT_SLAVE_2 0x00
176 #define CONFIG_SOFT_I2C_READ_REPEATED_START
177 #define CONFIG_SYS_I2C_INIT_BOARD
178
179 #ifndef __ASSEMBLY__
180 int get_soft_i2c_scl_pin(void);
181 int get_soft_i2c_sda_pin(void);
182 #endif
183 #define CONFIG_SOFT_I2C_GPIO_SCL get_soft_i2c_scl_pin()
184 #define CONFIG_SOFT_I2C_GPIO_SDA get_soft_i2c_sda_pin()
185
186 /* POWER */
187 #define CONFIG_POWER
188 #define CONFIG_POWER_I2C
189 #define CONFIG_POWER_MAX77686
190 #define CONFIG_POWER_PMIC_MAX77693
191 #define CONFIG_POWER_MUIC_MAX77693
192 #define CONFIG_POWER_FG_MAX77693
193 #define CONFIG_POWER_BATTERY_TRATS2
194
195 /* Security subsystem - enable hw_rand() */
196 #define CONFIG_EXYNOS_ACE_SHA
197 #define CONFIG_LIB_HW_RAND
198
199 /* Common misc for Samsung */
200 #define CONFIG_MISC_COMMON
201
202 #define CONFIG_MISC_INIT_R
203
204 /* Download menu - Samsung common */
205 #define CONFIG_LCD_MENU
206 #define CONFIG_LCD_MENU_BOARD
207
208 /* Download menu - definitions for check keys */
209 #ifndef __ASSEMBLY__
210 #include <power/max77686_pmic.h>
211
212 #define KEY_PWR_PMIC_NAME "MAX77686_PMIC"
213 #define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1
214 #define KEY_PWR_STATUS_MASK (1 << 0)
215 #define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1
216 #define KEY_PWR_INTERRUPT_MASK (1 << 1)
217
218 #define KEY_VOL_UP_GPIO EXYNOS4X12_GPIO_X22
219 #define KEY_VOL_DOWN_GPIO EXYNOS4X12_GPIO_X33
220 #endif /* __ASSEMBLY__ */
221
222 /* LCD console */
223 #define LCD_BPP LCD_COLOR16
224 #define CONFIG_SYS_WHITE_ON_BLACK
225
226 /* LCD */
227 #define CONFIG_EXYNOS_FB
228 #define CONFIG_LCD
229 #define CONFIG_CMD_BMP
230 #define CONFIG_BMP_16BPP
231 #define CONFIG_FB_ADDR 0x52504000
232 #define CONFIG_S6E8AX0
233 #define CONFIG_EXYNOS_MIPI_DSIM
234 #define CONFIG_VIDEO_BMP_GZIP
235 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
236
237 #endif /* __CONFIG_H */