include/configs/warp7.h

   1 /*
   2  * Copyright (C) 2016 NXP Semiconductors
   3  *
   4  * Configuration settings for the i.MX7S Warp board.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __WARP7_CONFIG_H
  10 #define __WARP7_CONFIG_H
  11
  12 #include "mx7_common.h"
  13
  14 #define PHYS_SDRAM_SIZE                 SZ_512M
  15
  16 #define CONFIG_MXC_UART_BASE            UART1_IPS_BASE_ADDR
  17
  18 /* Size of malloc() pool */
  19 #define CONFIG_SYS_MALLOC_LEN           (35 * SZ_1M)
  20
  21 /* MMC Config*/
  22 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC3_BASE_ADDR
  23 #define CONFIG_SUPPORT_EMMC_BOOT
  24 #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
  25 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
  26
  27 #define CONFIG_PARTITION_UUIDS
  28 #define CONFIG_CMD_PART
  29
  30 #define CONFIG_DFU_ENV_SETTINGS \
  31         "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \
  32
  33 #define CONFIG_EXTRA_ENV_SETTINGS \
  34         CONFIG_DFU_ENV_SETTINGS \
  35         "script=boot.scr\0" \
  36         "image=zImage\0" \
  37         "console=ttymxc0\0" \
  38         "ethact=usb_ether\0" \
  39         "fdt_high=0xffffffff\0" \
  40         "initrd_high=0xffffffff\0" \
  41         "fdt_file=imx7s-warp.dtb\0" \
  42         "fdt_addr=0x83000000\0" \
  43         "boot_fdt=try\0" \
  44         "ip_dyn=yes\0" \
  45         "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  46         "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  47         "finduuid=part uuid mmc 0:2 uuid\0" \
  48         "mmcargs=setenv bootargs console=${console},${baudrate} " \
  49                 "root=PARTUUID=${uuid} rootwait rw\0" \
  50         "loadbootscript=" \
  51                 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  52         "bootscript=echo Running bootscript from mmc ...; " \
  53                 "source\0" \
  54         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  55         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  56         "mmcboot=echo Booting from mmc ...; " \
  57                 "run finduuid; " \
  58                 "run mmcargs; " \
  59                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  60                         "if run loadfdt; then " \
  61                                 "bootz ${loadaddr} - ${fdt_addr}; " \
  62                         "else " \
  63                                 "if test ${boot_fdt} = try; then " \
  64                                         "bootz; " \
  65                                 "else " \
  66                                         "echo WARN: Cannot load the DT; " \
  67                                 "fi; " \
  68                         "fi; " \
  69                 "else " \
  70                         "bootz; " \
  71                 "fi;\0" \
  72
  73 #define CONFIG_BOOTCOMMAND \
  74            "mmc dev ${mmcdev};" \
  75            "mmc dev ${mmcdev}; if mmc rescan; then " \
  76                    "if run loadbootscript; then " \
  77                            "run bootscript; " \
  78                    "else " \
  79                            "if run loadimage; then " \
  80                                    "run mmcboot; " \
  81                            "fi; " \
  82                    "fi; " \
  83            "fi"
  84
  85 #define CONFIG_SYS_MEMTEST_START        0x80000000
  86 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x20000000)
  87
  88 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
  89 #define CONFIG_SYS_HZ                   1000
  90
  91 #define CONFIG_STACKSIZE                SZ_128K
  92
  93 /* Physical Memory Map */
  94 #define CONFIG_NR_DRAM_BANKS            1
  95 #define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
  96
  97 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
  98 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
  99 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 100
 101 #define CONFIG_SYS_INIT_SP_OFFSET \
 102         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 103 #define CONFIG_SYS_INIT_SP_ADDR \
 104         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 105
 106 /* I2C configs */
 107 #define CONFIG_SYS_I2C
 108 #define CONFIG_SYS_I2C_MXC
 109 #define CONFIG_SYS_I2C_MXC_I2C1
 110 #define CONFIG_SYS_I2C_SPEED            100000
 111
 112 /* PMIC */
 113 #define CONFIG_POWER
 114 #define CONFIG_POWER_I2C
 115 #define CONFIG_POWER_PFUZE3000
 116 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
 117
 118 /* FLASH and environment organization */
 119 #define CONFIG_SYS_NO_FLASH
 120 #define CONFIG_ENV_SIZE                 SZ_8K
 121 #define CONFIG_ENV_IS_IN_MMC
 122
 123 #define CONFIG_ENV_OFFSET               (8 * SZ_64K)
 124 #define CONFIG_SYS_FSL_USDHC_NUM        1
 125
 126 #define CONFIG_SYS_MMC_ENV_DEV          0
 127 #define CONFIG_SYS_MMC_ENV_PART         0
 128
 129 /* USB Configs */
 130 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 131
 132 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
 133 #define CONFIG_MXC_USB_FLAGS            0
 134 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */
 135
 136 #define CONFIG_IMX_THERMAL
 137
 138 #define CONFIG_USBD_HS
 139
 140 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 141
 142 /* USB Device Firmware Update support */
 143 #define CONFIG_SYS_DFU_DATA_BUF_SIZE    SZ_16M
 144 #define DFU_DEFAULT_POLL_TIMEOUT        300
 145
 146 #define CONFIG_USB_ETHER
 147 #define CONFIG_USB_ETH_CDC
 148 #define CONFIG_USB_ETH_RNDIS
 149 #define CONFIG_USBNET_HOST_ADDR         "de:ad:be:af:00:00"
 150 #define CONFIG_USBNET_DEV_ADDR          "de:ad:be:af:00:01"
 151
 152 #endif