]> git.ipfire.org Git - people/ms/u-boot.git/commitdiff
rockchip: add early uart driver
authorhuang lin <hl@rock-chips.com>
Tue, 17 Nov 2015 06:20:25 +0000 (14:20 +0800)
committerSimon Glass <sjg@chromium.org>
Tue, 1 Dec 2015 15:07:22 +0000 (08:07 -0700)
add early uart driver so we can print debug message in
SPL stage

Signed-off-by: Lin Huang <hl@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
arch/arm/include/asm/arch-rockchip/uart.h [new file with mode: 0644]
arch/arm/mach-rockchip/Makefile
arch/arm/mach-rockchip/rk_early_print.c [new file with mode: 0644]

diff --git a/arch/arm/include/asm/arch-rockchip/uart.h b/arch/arm/include/asm/arch-rockchip/uart.h
new file mode 100644 (file)
index 0000000..ea86ce6
--- /dev/null
@@ -0,0 +1,44 @@
+/*
+ * (C) Copyright 2015 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_UART_H
+#define __ASM_ARCH_UART_H
+struct rk_uart {
+       unsigned int rbr; /* Receive buffer register. */
+       unsigned int ier; /* Interrupt enable register. */
+       unsigned int fcr; /* FIFO control register. */
+       unsigned int lcr; /* Line control register. */
+       unsigned int mcr; /* Modem control register. */
+       unsigned int lsr; /* Line status register. */
+       unsigned int msr; /* Modem status register. */
+       unsigned int scr;
+       unsigned int reserved1[(0x30 - 0x20) / 4];
+       unsigned int srbr[(0x70 - 0x30) / 4];
+       unsigned int far;
+       unsigned int tfr;
+       unsigned int rfw;
+       unsigned int usr;
+       unsigned int tfl;
+       unsigned int rfl;
+       unsigned int srr;
+       unsigned int srts;
+       unsigned int sbcr;
+       unsigned int sdmam;
+       unsigned int sfe;
+       unsigned int srt;
+       unsigned int stet;
+       unsigned int htx;
+       unsigned int dmasa;
+       unsigned int reserver2[(0xf4 - 0xac) / 4];
+       unsigned int cpr;
+       unsigned int ucv;
+       unsigned int ctr;
+};
+
+void rk_uart_init(void *base);
+void print_hex(unsigned int n);
+void print(char *s);
+#endif
index 902235b86746cd42c479252bd5dfcb6f96d477c2..a29675ddf1d661aa704df48596381470b5bb9a6b 100644 (file)
@@ -10,5 +10,6 @@ else
 obj-y += board.o
 endif
 obj-y += rk_timer.o
+obj-y += rk_early_print.o
 obj-$(CONFIG_$(SPL_)ROCKCHIP_COMMON) += common.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/
diff --git a/arch/arm/mach-rockchip/rk_early_print.c b/arch/arm/mach-rockchip/rk_early_print.c
new file mode 100644 (file)
index 0000000..a1c14b0
--- /dev/null
@@ -0,0 +1,63 @@
+/*
+ * (C) Copyright 2015 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <asm/arch/uart.h>
+#include <common.h>
+
+static struct rk_uart *uart_ptr;
+
+static void uart_wrtie_byte(char byte)
+{
+       writel(byte, &uart_ptr->rbr);
+       while (!(readl(&uart_ptr->lsr) & 0x40))
+               ;
+}
+
+void print(char *s)
+{
+       while (*s) {
+               if (*s == '\n')
+                       uart_wrtie_byte('\r');
+           uart_wrtie_byte(*s);
+           s++;
+       }
+}
+
+void print_hex(unsigned int n)
+{
+       int i;
+       int temp;
+
+       uart_wrtie_byte('0');
+       uart_wrtie_byte('x');
+
+       for (i = 8; i > 0; i--) {
+               temp = (n >> (i - 1) * 4) & 0x0f;
+               if (temp < 10)
+                       uart_wrtie_byte((char)(temp + '0'));
+               else
+                       uart_wrtie_byte((char)(temp - 10 + 'a'));
+       }
+       uart_wrtie_byte('\n');
+       uart_wrtie_byte('\r');
+}
+
+/*
+ * TODO: since rk3036 only 4K sram to use in SPL, for saving space,
+ * we implement uart driver this way, we should convert this to use
+ * ns16550 driver in future, which support DEBUG_UART in the standard way
+ */
+void rk_uart_init(void *base)
+{
+       uart_ptr = (struct rk_uart *)base;
+       writel(0x83, &uart_ptr->lcr);
+       writel(0x0d, &uart_ptr->rbr);
+       writel(0x03, &uart_ptr->lcr);
+
+       /* fifo enable, sfe is shadow register of FCR[0] */
+       writel(0x01, &uart_ptr->sfe);
+}