E: aheppel@sysgo.de
D: CPU Support for MPC 75x; board support for Eltec BAB750 [obsolete!]
-N: August Hoeraendl
-E: august.hoerandl@gmx.at
-D: Support for the logodl board (PXA2xx)
-
N: Josh Huber
E: huber@alum.wpi.edu
D: Port to the Galileo Evaluation Board, and the MPC74xx cpu series.
N: Robert Schwebel
E: r.schwebel@pengutronix.de
-D: Support for csb226, logodl and innokom boards (PXA2xx)
+D: Support for csb226 and innokom boards (PXA2xx)
N: Aaron Sells
E: sellsa@embeddedplanet.com
mx51evk i.MX51
vision2 i.MX51
+Enric Balletbo i Serra <eballetbo@iseebcn.com>
+
+ igep0020 ARM ARMV7 (OMAP3xx SoC)
+ igep0030 ARM ARMV7 (OMAP3xx SoC)
+
Dirk Behme <dirk.behme@gmail.com>
omap3_beagle ARM ARMV7 (OMAP3530 SoC)
lart SA1100
dnp1110 SA1110
-Enric Balletbo i Serra <eballetbo@iseebcn.com>
-
- igep0020 ARM ARMV7 (OMAP3xx SoC)
- igep0030 ARM ARMV7 (OMAP3xx SoC)
-
-------------------------------------------------------------------------
Unknown / orphaned boards:
#!/bin/bash
+# Tool mainly for U-Boot Quality Assurance: build one or more board
+# configurations with minimal verbosity, showing only warnings and
+# errors.
+#
+# There are several ways to select which boards to build.
+#
+# Traditionally, architecture names (like "powerpc"), CPU family names
+# (like "mpc83xx") or board names can be specified on the command
+# line; without any arguments, MAKEALL defaults to building all Power
+# Architecture systems (i. e. same as for "MAKEALL powerpc").
+#
+# With the iontroduction of the board.cfg file, it has become possible
+# to provide additional selections. We use standard command line
+# options for this:
+#
+# -a or --arch : Select architecture
+# -c or --cpu : Select CPU family
+# -s or --soc : Select SoC type
+# -v or --vendor: Select board vendor
+#
+# Selections by these options are logically ANDed; if the same option
+# is used repeatedly, such selections are ORed. So "-v FOO -v BAR"
+# will select all configurations where the vendor is either FOO or
+# BAR. Any additional arguments specified on the command line are
+# always build additionally.
+#
+# Examples:
+#
+# - build all Power Architecture boards:
+#
+# MAKEALL -a powerpc
+# or
+# MAKEALL --arch powerpc
+# or
+# MAKEALL powerpc
+#
+# - build all PowerPC boards manufactured by vendor "esd":
+#
+# MAKEALL -a powerpc -v esd
+#
+# - build all PowerPC boards manufactured either by "keymile" or
+# "siemens":
+#
+# MAKEALL -a powerpc -v keymile -v siemens
+#
+# - build all Freescale boards with MPC83xx CPUs, plus all 4xx boards:
+#
+# MAKEALL -c mpc83xx -v freescale 4xx
+#
+#########################################################################
+
+SHORT_OPTS="a:c:v:s:"
+LONG_OPTS="arch:,cpu:,vendor:,soc:"
+
+# Option processing based on util-linux-2.13/getopt-parse.bash
+
+# Note that we use `"$@"' to let each command-line parameter expand to a
+# separate word. The quotes around `$@' are essential!
+# We need TEMP as the `eval set --' would nuke the return value of
+# getopt.
+TEMP=`getopt -o ${SHORT_OPTS} --long ${LONG_OPTS} \
+ -n 'MAKEALL' -- "$@"`
+
+if [ $? != 0 ] ; then echo "Terminating..." >&2 ; exit 1 ; fi
+
+# Note the quotes around `$TEMP': they are essential!
+eval set -- "$TEMP"
+
+SELECTED=''
+
+while true ; do
+ case "$1" in
+ -a|--arch)
+ # echo "Option ARCH: argument \`$2'"
+ if [ "$opt_a" ] ; then
+ opt_a="${opt_a%)} || \$2 == \"$2\")"
+ else
+ opt_a="(\$2 == \"$2\")"
+ fi
+ SELECTED='y'
+ shift 2 ;;
+ -c|--cpu)
+ # echo "Option CPU: argument \`$2'"
+ if [ "$opt_c" ] ; then
+ opt_c="${opt_c%)} || \$3 == \"$2\")"
+ else
+ opt_c="(\$3 == \"$2\")"
+ fi
+ SELECTED='y'
+ shift 2 ;;
+ -s|--soc)
+ # echo "Option SoC: argument \`$2'"
+ if [ "$opt_s" ] ; then
+ opt_s="${opt_s%)} || \$6 == \"$2\")"
+ else
+ opt_s="(\$6 == \"$2\")"
+ fi
+ SELECTED='y'
+ shift 2 ;;
+ -v|--vendor)
+ # echo "Option VENDOR: argument \`$2'"
+ if [ "$opt_v" ] ; then
+ opt_v="${opt_v%)} || \$5 == \"$2\")"
+ else
+ opt_v="(\$5 == \"$2\")"
+ fi
+ SELECTED='y'
+ shift 2 ;;
+ --)
+ shift ; break ;;
+ *)
+ echo "Internal error!" >&2 ; exit 1 ;;
+ esac
+done
+# echo "Remaining arguments:"
+# for arg do echo '--> '"\`$arg'" ; done
+
+FILTER="\$1 !~ /^#/"
+[ "$opt_a" ] && FILTER="${FILTER} && $opt_a"
+[ "$opt_c" ] && FILTER="${FILTER} && $opt_c"
+[ "$opt_s" ] && FILTER="${FILTER} && $opt_s"
+[ "$opt_v" ] && FILTER="${FILTER} && $opt_v"
+
+if [ "$SELECTED" ] ; then
+ SELECTED=$(awk '('"$FILTER"') { print $1 }' boards.cfg)
+fi
+
+#########################################################################
+
# Print statistics when we exit
trap exit 1 2 3 15
trap print_stats 0
## MPC5xxx Systems
#########################################################################
-LIST_5xxx="$(boards_by_cpu mpc5xxx)
- digsy_mtc \
- EVAL5200 \
- fo300 \
- galaxy5200 \
- icecube_5200 \
- lite5200b \
- mcc200 \
- MVBC_P \
- MVSMR \
- pcm030 \
- PM520 \
- TB5200 \
- Total5200 \
- Total5200_Rev2 \
- TQM5200 \
- TQM5200_B \
- TQM5200S \
-"
+LIST_5xxx="$(boards_by_cpu mpc5xxx)"
#########################################################################
## MPC512x Systems
#########################################################################
-LIST_512x="$(boards_by_cpu mpc512x)
- mpc5121ads \
-"
+LIST_512x="$(boards_by_cpu mpc512x)"
#########################################################################
## MPC8xx Systems
#########################################################################
-LIST_8xx="$(boards_by_cpu mpc8xx)
- Adder87x \
- AdderII \
- ADS860 \
- FADS823 \
- FADS850SAR \
- FADS860T \
- FPS850L \
- GEN860T \
- GEN860T_SC \
- ICU862_100MHz \
- IVML24 \
- IVML24_128 \
- IVML24_256 \
- IVMS8 \
- IVMS8_128 \
- IVMS8_256 \
- MBX \
- MBX860T \
- MPC86xADS \
- MPC885ADS \
- NETPHONE \
- NETTA \
- NETTA2 \
- NETTA_ISDN \
- NETVIA \
- NETVIA_V2 \
- RPXlite_DW \
- SPD823TS \
- SXNI855T \
- TK885D \
- TQM823L \
- TQM823L_LCD \
- TQM850L \
- TQM855L \
- TQM860L \
- TQM885D \
- v37 \
-"
+LIST_8xx="$(boards_by_cpu mpc8xx)"
#########################################################################
## PPC4xx Systems
#########################################################################
-LIST_4xx="$(boards_by_cpu ppc4xx)
- acadia_nand \
- arches \
- bamboo_nand \
- canyonlands \
- canyonlands_nand \
- CPCI405 \
- CPCI4052 \
- CPCI405AB \
- CPCI405DT \
- devconcenter \
- fx12mm \
- glacier \
- haleakala \
- haleakala_nand \
- hcu4 \
- hcu5 \
- intip \
- kilauea \
- kilauea_nand \
- mcu25 \
- MIP405T \
- ml507 \
- ml507_flash \
- OCRTC \
- ORSG \
- PPChameleonEVB \
- rainier \
- sequoia \
- sequoia_nand \
- v5fx30teval \
- v5fx30teval_flash \
- W7OLMC \
- W7OLMG \
- walnut \
- xilinx-ppc440-generic \
- xilinx-ppc440-generic_flash \
- yellowstone \
- yosemite \
-"
+LIST_4xx="$(boards_by_cpu ppc4xx)"
#########################################################################
## MPC8220 Systems
## MPC824x Systems
#########################################################################
-LIST_824x="$(boards_by_cpu mpc824x)
- CPC45 \
- eXalion \
- IDS8247 \
- linkstation_HGLAN \
- Sandpoint8240 \
- Sandpoint8245 \
-"
+LIST_824x="$(boards_by_cpu mpc824x)"
#########################################################################
## MPC8260 Systems (includes 8250, 8255 etc.)
#########################################################################
-LIST_8260="$(boards_by_cpu mpc8260)
- cogent_mpc8260 \
- CPU86 \
- CPU87 \
- ep8248 \
- ISPAN \
- MPC8260ADS \
- MPC8272ADS \
- PM826 \
- PM828 \
- Rattler8248 \
- TQM8260_AC \
- TQM8260_AD \
- TQM8260_AE \
-"
+LIST_8260="$(boards_by_cpu mpc8260)"
#########################################################################
## MPC83xx Systems (includes 8349, etc.)
#########################################################################
-LIST_83xx="$(boards_by_cpu mpc83xx)
- caddy2 \
- MPC8313ERDB_33 \
- MPC8313ERDB_NAND_66 \
- MPC8315ERDB \
- MPC8315ERDB_NAND \
- MPC832XEMDS \
- MPC832XEMDS_ATM \
- MPC8349ITX \
- MPC8349ITXGP \
- MPC8360EMDS \
- MPC8360EMDS_ATM \
- MPC8360ERDK_33 \
- MPC8360ERDK_66 \
- MPC837XEMDS \
- sbc8349 \
- SIMPC8313_LP \
- vme8349 \
-"
-
+LIST_83xx="$(boards_by_cpu mpc83xx)"
#########################################################################
## MPC85xx Systems (includes 8540, 8560 etc.)
#########################################################################
-LIST_85xx="$(boards_by_cpu mpc85xx)
- MPC8536DS \
- MPC8536DS_NAND \
- MPC8536DS_SDCARD \
- MPC8536DS_SPIFLASH \
- MPC8536DS_36BIT \
- MPC8540EVAL \
- MPC8541CDS \
- MPC8548CDS \
- MPC8555CDS \
- MPC8569MDS \
- MPC8569MDS_ATM \
- MPC8569MDS_NAND \
- MPC8572DS \
- MPC8572DS_36BIT \
- P2020DS \
- P2020DS_36BIT \
- P1011RDB \
- P1011RDB_NAND \
- P1011RDB_SDCARD \
- P1011RDB_SPIFLASH \
- P1020RDB \
- P1020RDB_NAND \
- P1020RDB_SDCARD \
- P1020RDB_SPIFLASH \
- P2010RDB \
- P2010RDB_NAND \
- P2010RDB_SDCARD \
- P2010RDB_SPIFLASH \
- P2020RDB \
- P2020RDB_NAND \
- P2020RDB_SDCARD \
- P2020RDB_SPIFLASH \
- sbc8540 \
- sbc8548 \
- sbc8548_PCI_33 \
- sbc8548_PCI_66 \
- sbc8548_PCI_33_PCIE \
- sbc8548_PCI_66_PCIE \
- sbc8560 \
- stxssa \
- TQM8540 \
- TQM8541 \
- TQM8548 \
- TQM8548_AG \
- TQM8548_BE \
- TQM8555 \
- TQM8560 \
-"
+LIST_85xx="$(boards_by_cpu mpc85xx)"
#########################################################################
## MPC86xx Systems
#########################################################################
-LIST_86xx="$(boards_by_cpu mpc86xx)
- MPC8641HPCN_36BIT \
- MPC8641HPCN \
-"
+LIST_86xx="$(boards_by_cpu mpc86xx)"
#########################################################################
## 74xx/7xx Systems
#########################################################################
-LIST_74xx=" \
- DB64360 \
- DB64460 \
- EVB64260 \
- mpc7448hpc2 \
- P3G4 \
- p3m7448 \
- PCIPPC2 \
- PCIPPC6 \
- ZUMA \
-"
-
-LIST_7xx=" \
- BAB7xx \
- CPCI750 \
- ELPPC \
- p3m750 \
- ppmc7xx \
-"
+LIST_74xx_7xx="$(boards_by_cpu 74xx_7xx)"
#########################################################################
## PowerPC groups
${LIST_85xx} \
${LIST_86xx} \
${LIST_4xx} \
- ${LIST_74xx} \
- ${LIST_7xx} \
+ ${LIST_74xx_7xx}\
"
# Alias "ppc" -> "powerpc" to not break compatibility with older scripts
#-----------------------------------------------------------------------
-#----- for now, just run PowerPC by default -----
+# Build target groups selected by options, plus any command line args
+set -- ${SELECTED} "$@"
+# run PowerPC by default
[ $# = 0 ] && set -- powerpc
-
build_targets "$@"
$(obj)u-boot.img: $(obj)u-boot.bin
$(obj)tools/mkimage -A $(ARCH) -T firmware -C none \
- -a $(TEXT_BASE) -e 0 \
+ -a $(CONFIG_SYS_TEXT_BASE) -e 0 \
-n $(shell sed -n -e 's/.*U_BOOT_VERSION//p' $(VERSION_FILE) | \
sed -e 's/"[ ]*$$/ for $(BOARD) board"/') \
-d $< $@
$(obj)u-boot.imx: $(obj)u-boot.bin
$(obj)tools/mkimage -n $(IMX_CONFIG) -T imximage \
- -e $(TEXT_BASE) -d $< $@
+ -e $(CONFIG_SYS_TEXT_BASE) -d $< $@
$(obj)u-boot.kwb: $(obj)u-boot.bin
$(obj)tools/mkimage -n $(KWD_CONFIG) -T kwbimage \
- -a $(TEXT_BASE) -e $(TEXT_BASE) -d $< $@
+ -a $(CONFIG_SYS_TEXT_BASE) -e $(TEXT_BASE) -d $< $@
$(obj)u-boot.sha1: $(obj)u-boot.bin
$(obj)tools/ubsha1 $(obj)u-boot.bin
lcname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\L\1/')
ucname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\U\1/')
-#========================================================================
-# PowerPC
-#========================================================================
-
-#########################################################################
-## MPC5xxx Systems
-#########################################################################
-
-digsy_mtc_config \
-digsy_mtc_LOWBOOT_config \
-digsy_mtc_RAMBOOT_config: unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)board/digsy_mtc
- @ >$(obj)include/config.h
- @[ -z "$(findstring LOWBOOT_,$@)" ] || \
- echo "TEXT_BASE = 0xFF000000" >$(obj)board/digsy_mtc/config.tmp
- @[ -z "$(findstring RAMBOOT_,$@)" ] || \
- echo "TEXT_BASE = 0x00100000" >$(obj)board/digsy_mtc/config.tmp
- @$(MKCONFIG) -n $@ -a digsy_mtc powerpc mpc5xxx digsy_mtc
-
-galaxy5200_LOWBOOT_config \
-galaxy5200_config: unconfig
- @mkdir -p $(obj)include
- @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a galaxy5200 powerpc mpc5xxx galaxy5200
-
-Lite5200_config \
-Lite5200_LOWBOOT_config \
-Lite5200_LOWBOOT08_config \
-icecube_5200_config \
-icecube_5200_LOWBOOT_config \
-icecube_5200_LOWBOOT08_config \
-icecube_5200_DDR_config \
-icecube_5200_DDR_LOWBOOT_config \
-icecube_5200_DDR_LOWBOOT08_config: unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)board/icecube
- @[ -z "$(findstring LOWBOOT_,$@)" ] || \
- if [ "$(findstring DDR,$@)" ] ; \
- then echo "TEXT_BASE = 0xFF800000" >$(obj)board/icecube/config.tmp ; \
- else echo "TEXT_BASE = 0xFF000000" >$(obj)board/icecube/config.tmp ; \
- fi
- @[ -z "$(findstring LOWBOOT08,$@)" ] || \
- echo "TEXT_BASE = 0xFF800000" >$(obj)board/icecube/config.tmp
- @[ -z "$(findstring DDR,$@)" ] || \
- echo "#define CONFIG_MPC5200_DDR" >>$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a IceCube powerpc mpc5xxx icecube
-
-lite5200b_config \
-lite5200b_PM_config \
-lite5200b_LOWBOOT_config: unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)board/icecube
- @ echo "#define CONFIG_MPC5200_DDR" >>$(obj)include/config.h
- @ echo "#define CONFIG_LITE5200B" >>$(obj)include/config.h
- @[ -z "$(findstring _PM_,$@)" ] || \
- echo "#define CONFIG_LITE5200B_PM" >>$(obj)include/config.h
- @[ -z "$(findstring LOWBOOT_,$@)" ] || \
- echo "TEXT_BASE = 0xFF000000" >$(obj)board/icecube/config.tmp
- @$(MKCONFIG) -n $@ -a IceCube powerpc mpc5xxx icecube
-
-mcc200_config \
-mcc200_SDRAM_config \
-mcc200_highboot_config \
-mcc200_COM12_config \
-mcc200_COM12_SDRAM_config \
-mcc200_COM12_highboot_config \
-mcc200_COM12_highboot_SDRAM_config \
-mcc200_highboot_SDRAM_config \
-prs200_config \
-prs200_DDR_config \
-prs200_highboot_config \
-prs200_highboot_DDR_config: unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)board/mcc200
- @[ -z "$(findstring highboot,$@)" ] || \
- echo "TEXT_BASE = 0xFFF00000" >$(obj)board/mcc200/config.tmp
- @[ -n "$(findstring _SDRAM,$@)" ] || \
- if [ -n "$(findstring prs200,$@)" ]; \
- then \
- if [ -z "$(findstring _DDR,$@)" ];\
- then \
- echo "#define CONFIG_MCC200_SDRAM" >>$(obj)include/config.h ;\
- fi; \
- fi
- @[ -z "$(findstring _SDRAM,$@)" ] || \
- echo "#define CONFIG_MCC200_SDRAM" >>$(obj)include/config.h
- @[ -z "$(findstring COM12,$@)" ] || \
- echo "#define CONFIG_CONSOLE_COM12" >>$(obj)include/config.h
- @[ -z "$(findstring prs200,$@)" ] || \
- echo "#define CONFIG_PRS200" >>$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a mcc200 powerpc mpc5xxx mcc200
-
-MVBC_P_config: unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)board/mvbc_p
- @ >$(obj)include/config.h
- @[ -z "$(findstring MVBC_P,$@)" ] || \
- echo "#define CONFIG_MVBC_P" >>$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a $@ powerpc mpc5xxx mvbc_p matrix_vision
-
-MVSMR_config: unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)board/matrix_vision/mvsmr
- @$(MKCONFIG) $@ powerpc mpc5xxx mvsmr matrix_vision
-
-pcm030_config \
-pcm030_LOWBOOT_config: unconfig
- @mkdir -p $(obj)include $(obj)board/phytec/pcm030
- @ >$(obj)include/config.h
- @[ -z "$(findstring LOWBOOT_,$@)" ] || \
- echo "TEXT_BASE = 0xFF000000" >$(obj)board/phytec/pcm030/config.tmp
- @$(MKCONFIG) -n $@ -a pcm030 powerpc mpc5xxx pcm030 phytec
-
-PM520_config \
-PM520_DDR_config \
-PM520_ROMBOOT_config \
-PM520_ROMBOOT_DDR_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring DDR,$@)" ] || \
- echo "#define CONFIG_MPC5200_DDR" >>$(obj)include/config.h
- @[ -z "$(findstring ROMBOOT,$@)" ] || \
- echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a PM520 powerpc mpc5xxx pm520
-
-TB5200_B_config \
-TB5200_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring _B,$@)" ] || \
- echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a TB5200 powerpc mpc5xxx tqm5200 tqc
-
-MINI5200_config \
-EVAL5200_config \
-TOP5200_config: unconfig
- @mkdir -p $(obj)include
- @ echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a TOP5200 powerpc mpc5xxx top5200 emk
-
-Total5200_config \
-Total5200_lowboot_config \
-Total5200_Rev2_config \
-Total5200_Rev2_lowboot_config: unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)board/total5200
- @[ -n "$(findstring Rev,$@)" ] || \
- echo "#define CONFIG_TOTAL5200_REV 1" >>$(obj)include/config.h
- @[ -z "$(findstring Rev2_,$@)" ] || \
- echo "#define CONFIG_TOTAL5200_REV 2" >>$(obj)include/config.h
- @[ -z "$(findstring lowboot_,$@)" ] || \
- echo "TEXT_BASE = 0xFE000000" >$(obj)board/total5200/config.tmp
- @$(MKCONFIG) -n $@ -a Total5200 powerpc mpc5xxx total5200
-
-cam5200_config \
-cam5200_niosflash_config \
-fo300_config \
-MiniFAP_config \
-TQM5200S_config \
-TQM5200S_HIGHBOOT_config \
-TQM5200_B_config \
-TQM5200_B_HIGHBOOT_config \
-TQM5200_config \
-TQM5200_STK100_config: unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)board/tqc/tqm5200
- @[ -z "$(findstring cam5200,$@)" ] || \
- { echo "#define CONFIG_CAM5200" >>$(obj)include/config.h ; \
- echo "#define CONFIG_TQM5200S" >>$(obj)include/config.h ; \
- echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \
- }
- @[ -z "$(findstring niosflash,$@)" ] || \
- echo "#define CONFIG_CAM5200_NIOSFLASH" >>$(obj)include/config.h
- @[ -z "$(findstring fo300,$@)" ] || \
- echo "#define CONFIG_FO300" >>$(obj)include/config.h
- @[ -z "$(findstring MiniFAP,$@)" ] || \
- echo "#define CONFIG_MINIFAP" >>$(obj)include/config.h
- @[ -z "$(findstring STK100,$@)" ] || \
- echo "#define CONFIG_STK52XX_REV100" >>$(obj)include/config.h
- @[ -z "$(findstring TQM5200_B,$@)" ] || \
- echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h
- @[ -z "$(findstring TQM5200S,$@)" ] || \
- { echo "#define CONFIG_TQM5200S" >>$(obj)include/config.h ; \
- echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \
- }
- @[ -z "$(findstring HIGHBOOT,$@)" ] || \
- echo "TEXT_BASE = 0xFFF00000" >$(obj)board/tqm5200/config.tmp
- @$(MKCONFIG) -n $@ -a TQM5200 powerpc mpc5xxx tqm5200 tqc
-
-#########################################################################
-## MPC512x Systems
-#########################################################################
-
-mpc5121ads_config \
-mpc5121ads_rev2_config \
- : unconfig
- @mkdir -p $(obj)include
- @if [ "$(findstring rev2,$@)" ] ; then \
- echo "#define CONFIG_MPC5121ADS_REV2 1" > $(obj)include/config.h; \
- fi
- @$(MKCONFIG) -n $@ -a mpc5121ads powerpc mpc512x mpc5121ads freescale
-
-#########################################################################
-## MPC8xx Systems
-#########################################################################
-
-Adder87x_config \
-AdderII_config \
-AdderUSB_config \
-Adder_config \
- : unconfig
- @mkdir -p $(obj)include
- $(if $(findstring AdderII,$@), \
- @echo "#define CONFIG_MPC852T" > $(obj)include/config.h)
- @$(MKCONFIG) -n $@ -a Adder powerpc mpc8xx adder
-
-ADS860_config \
-FADS823_config \
-FADS850SAR_config \
-MPC86xADS_config \
-MPC885ADS_config \
-FADS860T_config: unconfig
- @$(MKCONFIG) -n $@ $@ powerpc mpc8xx fads
-
-GEN860T_SC_config \
-GEN860T_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring _SC,$@)" ] || \
- echo "#define CONFIG_SC" >>$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a GEN860T powerpc mpc8xx gen860t
-
-ICU862_100MHz_config \
-ICU862_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring _100MHz,$@)" ] || \
- echo "#define CONFIG_100MHz" >>$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a ICU862 powerpc mpc8xx icu862
-
-IVML24_256_config \
-IVML24_128_config \
-IVML24_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring IVML24_config,$@)" ] || \
- echo "#define CONFIG_IVML24_16M" >>$(obj)include/config.h
- @[ -z "$(findstring IVML24_128_config,$@)" ] || \
- echo "#define CONFIG_IVML24_32M" >>$(obj)include/config.h
- @[ -z "$(findstring IVML24_256_config,$@)" ] || \
- echo "#define CONFIG_IVML24_64M" >>$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a IVML24 powerpc mpc8xx ivm
-
-IVMS8_256_config \
-IVMS8_128_config \
-IVMS8_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring IVMS8_config,$@)" ] || \
- echo "#define CONFIG_IVMS8_16M" >>$(obj)include/config.h
- @[ -z "$(findstring IVMS8_128_config,$@)" ] || \
- echo "#define CONFIG_IVMS8_32M" >>$(obj)include/config.h
- @[ -z "$(findstring IVMS8_256_config,$@)" ] || \
- echo "#define CONFIG_IVMS8_64M" >>$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a IVMS8 powerpc mpc8xx ivm
-
-MBX_config \
-MBX860T_config: unconfig
- @$(MKCONFIG) -n $@ $@ powerpc mpc8xx mbx8xx
-
-NETVIA_V2_config \
-NETVIA_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring NETVIA_config,$@)" ] || \
- echo "#define CONFIG_NETVIA_VERSION 1" >>$(obj)include/config.h
- @[ -z "$(findstring NETVIA_V2_config,$@)" ] || \
- echo "#define CONFIG_NETVIA_VERSION 2" >>$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a NETVIA powerpc mpc8xx netvia
-
-NETPHONE_V2_config \
-NETPHONE_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring NETPHONE_config,$@)" ] || \
- echo "#define CONFIG_NETPHONE_VERSION 1" >>$(obj)include/config.h
- @[ -z "$(findstring NETPHONE_V2_config,$@)" ] || \
- echo "#define CONFIG_NETPHONE_VERSION 2" >>$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a NETPHONE powerpc mpc8xx netphone
-
-NETTA_ISDN_6412_SWAPHOOK_config \
-NETTA_ISDN_SWAPHOOK_config \
-NETTA_6412_SWAPHOOK_config \
-NETTA_SWAPHOOK_config \
-NETTA_ISDN_6412_config \
-NETTA_ISDN_config \
-NETTA_6412_config \
-NETTA_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring ISDN_,$@)" ] || \
- echo "#define CONFIG_NETTA_ISDN 1" >>$(obj)include/config.h
- @[ -n "$(findstring ISDN_,$@)" ] || \
- echo "#undef CONFIG_NETTA_ISDN" >>$(obj)include/config.h
- @[ -z "$(findstring 6412_,$@)" ] || \
- echo "#define CONFIG_NETTA_6412 1" >>$(obj)include/config.h
- @[ -n "$(findstring 6412_,$@)" ] || \
- echo "#undef CONFIG_NETTA_6412" >>$(obj)include/config.h
- @[ -z "$(findstring SWAPHOOK_,$@)" ] || \
- echo "#define CONFIG_NETTA_SWAPHOOK 1" >>$(obj)include/config.h
- @[ -n "$(findstring SWAPHOOK_,$@)" ] || \
- echo "#undef CONFIG_NETTA_SWAPHOOK" >>$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a NETTA powerpc mpc8xx netta
-
-NETTA2_V2_config \
-NETTA2_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring NETTA2_config,$@)" ] || \
- echo "#define CONFIG_NETTA2_VERSION 1" >>$(obj)include/config.h
- @[ -z "$(findstring NETTA2_V2_config,$@)" ] || \
- echo "#define CONFIG_NETTA2_VERSION 2" >>$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a NETTA2 powerpc mpc8xx netta2
-
-NC650_Rev1_config \
-NC650_Rev2_config \
-CP850_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring CP850,$@)" ] || \
- { echo "#define CONFIG_CP850 1" >>$(obj)include/config.h ; \
- echo "#define CONFIG_IDS852_REV2 1" >>$(obj)include/config.h ; \
- }
- @[ -z "$(findstring Rev1,$@)" ] || \
- { echo "#define CONFIG_IDS852_REV1 1" >>$(obj)include/config.h ; \
- }
- @[ -z "$(findstring Rev2,$@)" ] || \
- { echo "#define CONFIG_IDS852_REV2 1" >>$(obj)include/config.h ; \
- }
- @$(MKCONFIG) -n $@ -a NC650 powerpc mpc8xx nc650
-
-RPXlite_DW_64_config \
-RPXlite_DW_LCD_config \
-RPXlite_DW_64_LCD_config \
-RPXlite_DW_NVRAM_config \
-RPXlite_DW_NVRAM_64_config \
-RPXlite_DW_NVRAM_LCD_config \
-RPXlite_DW_NVRAM_64_LCD_config \
-RPXlite_DW_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring _64,$@)" ] || \
- echo "#define RPXlite_64MHz" >>$(obj)include/config.h
- @[ -z "$(findstring _LCD,$@)" ] || \
- { echo "#define CONFIG_LCD" >>$(obj)include/config.h ; \
- echo "#define CONFIG_NEC_NL6448BC20" >>$(obj)include/config.h ; \
- }
- @[ -z "$(findstring _NVRAM,$@)" ] || \
- echo "#define CONFIG_ENV_IS_IN_NVRAM" >>$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a RPXlite_DW powerpc mpc8xx RPXlite_dw
-
-RRvision_LCD_config: unconfig
- @mkdir -p $(obj)include
- @echo "#define CONFIG_LCD" >$(obj)include/config.h
- @echo "#define CONFIG_SHARP_LQ104V7DS01" >>$(obj)include/config.h
- @$(MKCONFIG) -a RRvision powerpc mpc8xx RRvision
-
-SPD823TS_config: unconfig
- @$(MKCONFIG) $@ powerpc mpc8xx spd8xx
-
-SXNI855T_config: unconfig
- @$(MKCONFIG) $@ powerpc mpc8xx sixnet
-
-# Play some tricks for configuration selection
-# Only 855 and 860 boards may come with FEC
-# and only 823 boards may have LCD support
-xtract_8xx = $(subst _LCD,,$1)
-
-FPS850L_config \
-FPS860L_config \
-NSCU_config \
-TQM823L_config \
-TQM823L_LCD_config \
-TQM850L_config \
-TQM855L_config \
-TQM860L_config \
-TQM862L_config \
-TQM823M_config \
-TQM850M_config \
-TQM855M_config \
-TQM860M_config \
-TQM862M_config \
-TQM866M_config \
-TQM885D_config \
-TK885D_config \
-virtlab2_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring _LCD,$@)" ] || \
- { echo "#define CONFIG_LCD" >>$(obj)include/config.h ; \
- echo "#define CONFIG_NEC_NL6448BC20" >>$(obj)include/config.h ; \
- }
- @$(MKCONFIG) -n $@ -a $(call xtract_8xx,$@) powerpc mpc8xx tqm8xx tqc
-
-TTTech_config: unconfig
- @mkdir -p $(obj)include
- @echo "#define CONFIG_LCD" >$(obj)include/config.h
- @echo "#define CONFIG_SHARP_LQ104V7DS01" >>$(obj)include/config.h
- @$(MKCONFIG) -a TQM823L powerpc mpc8xx tqm8xx tqc
-
-v37_config: unconfig
- @mkdir -p $(obj)include
- @echo "#define CONFIG_LCD" >$(obj)include/config.h
- @echo "#define CONFIG_SHARP_LQ084V1DG21" >>$(obj)include/config.h
- @$(MKCONFIG) $@ powerpc mpc8xx v37
-
-wtk_config: unconfig
- @mkdir -p $(obj)include
- @echo "#define CONFIG_LCD" >$(obj)include/config.h
- @echo "#define CONFIG_SHARP_LQ065T9DR51U" >>$(obj)include/config.h
- @$(MKCONFIG) -a TQM823L powerpc mpc8xx tqm8xx tqc
-
-#########################################################################
-## PPC4xx Systems
-#########################################################################
-
-acadia_nand_config: unconfig
- @mkdir -p $(obj)include $(obj)board/amcc/acadia
- @mkdir -p $(obj)nand_spl/board/amcc/acadia
- @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
- @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/acadia/config.tmp
- @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
- @$(MKCONFIG) -n $@ -a acadia powerpc ppc4xx acadia amcc
-
-bamboo_nand_config: unconfig
- @mkdir -p $(obj)include $(obj)board/amcc/bamboo
- @mkdir -p $(obj)nand_spl/board/amcc/bamboo
- @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
- @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/bamboo/config.tmp
- @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
- @$(MKCONFIG) -n $@ -a bamboo powerpc ppc4xx bamboo amcc
-
-# Arches, Canyonlands & Glacier use different U-Boot images
-arches_config \
-canyonlands_config \
-glacier_config: unconfig
- @mkdir -p $(obj)include
- @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
- tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a canyonlands powerpc ppc4xx canyonlands amcc
-
-canyonlands_nand_config \
-glacier_nand_config: unconfig
- @mkdir -p $(obj)include $(obj)board/amcc/canyonlands
- @mkdir -p $(obj)nand_spl/board/amcc/canyonlands
- @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
- @echo "#define CONFIG_$$(echo $(subst ,,$(@:_nand_config=)) | \
- tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h
- @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/canyonlands/config.tmp
- @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
- @$(MKCONFIG) -n $@ -a canyonlands powerpc ppc4xx canyonlands amcc
-
-CATcenter_config \
-CATcenter_25_config \
-CATcenter_33_config: unconfig
- @mkdir -p $(obj)include
- @echo "/* CATcenter uses PPChameleon Model ME */" > $(obj)include/config.h
- @echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 1" >> $(obj)include/config.h
- @[ -z "$(findstring _25,$@)" ] || \
- echo "#define CONFIG_PPCHAMELEON_CLK_25" >> $(obj)include/config.h
- @[ -z "$(findstring _33,$@)" ] || \
- echo "#define CONFIG_PPCHAMELEON_CLK_33" >> $(obj)include/config.h
- @$(MKCONFIG) -n $@ -a CATcenter powerpc ppc4xx PPChameleonEVB dave
-
-CPCI405_config \
-CPCI4052_config \
-CPCI405DT_config \
-CPCI405AB_config: unconfig
- @mkdir -p $(obj)board/esd/cpci405
- @$(MKCONFIG) -n $@ $@ powerpc ppc4xx cpci405 esd
-
-fx12mm_flash_config: unconfig
- @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic
- @mkdir -p $(obj)include $(obj)board/avnet/fx12mm
- @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds"\
- > $(obj)board/avnet/fx12mm/config.tmp
- @echo "TEXT_BASE := 0xFFCB0000" \
- >> $(obj)board/avnet/fx12mm/config.tmp
- @$(MKCONFIG) fx12mm powerpc ppc4xx fx12mm avnet
-
-fx12mm_config: unconfig
- @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic
- @mkdir -p $(obj)include $(obj)board/avnet/fx12mm
- @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds"\
- > $(obj)board/avnet/fx12mm/config.tmp
- @echo "TEXT_BASE := 0x03000000" \
- >> $(obj)board/avnet/fx12mm/config.tmp
- @$(MKCONFIG) fx12mm powerpc ppc4xx fx12mm avnet
-
-# Compact-Center(codename intip) & DevCon-Center use different U-Boot images
-intip_config \
-devconcenter_config: unconfig
- @mkdir -p $(obj)include
- @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
- tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a intip powerpc ppc4xx intip gdsys
-
-hcu4_config \
-hcu5_config \
-mcu25_config: unconfig
- @mkdir -p $(obj)board/netstal/common
- @$(MKCONFIG) $@ powerpc ppc4xx $(call lcname,$@) netstal
-
-# Kilauea & Haleakala images are identical (recognized via PVR)
-kilauea_config \
-haleakala_config: unconfig
- @$(MKCONFIG) -n $@ kilauea powerpc ppc4xx kilauea amcc
-
-kilauea_nand_config \
-haleakala_nand_config: unconfig
- @mkdir -p $(obj)include $(obj)board/amcc/kilauea
- @mkdir -p $(obj)nand_spl/board/amcc/kilauea
- @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
- @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/kilauea/config.tmp
- @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
- @$(MKCONFIG) -n $@ -a kilauea powerpc ppc4xx kilauea amcc
-
-MIP405T_config: unconfig
- @mkdir -p $(obj)include
- @echo "#define CONFIG_MIP405T" >$(obj)include/config.h
- @$(XECHO) "Enable subset config for MIP405T"
- @$(MKCONFIG) -a MIP405 powerpc ppc4xx mip405 mpl
-
-ml507_flash_config: unconfig
- @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
- @mkdir -p $(obj)include $(obj)board/xilinx/ml507
- @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds"\
- > $(obj)board/xilinx/ml507/config.tmp
- @echo "TEXT_BASE := 0xFE360000" \
- >> $(obj)board/xilinx/ml507/config.tmp
- @$(MKCONFIG) ml507 powerpc ppc4xx ml507 xilinx
-
-ml507_config: unconfig
- @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
- @mkdir -p $(obj)include $(obj)board/xilinx/ml507
- @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds"\
- > $(obj)board/xilinx/ml507/config.tmp
- @echo "TEXT_BASE := 0x04000000" \
- >> $(obj)board/xilinx/ml507/config.tmp
- @$(MKCONFIG) $@ powerpc ppc4xx ml507 xilinx
-
-OCRTC_config \
-ORSG_config: unconfig
- @$(MKCONFIG) -n $@ $@ powerpc ppc4xx ocrtc esd
-
-PPChameleonEVB_config \
-PPChameleonEVB_BA_25_config \
-PPChameleonEVB_ME_25_config \
-PPChameleonEVB_HI_25_config \
-PPChameleonEVB_BA_33_config \
-PPChameleonEVB_ME_33_config \
-PPChameleonEVB_HI_33_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring EVB_BA,$@)" ] || \
- echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 0" >>$(obj)include/config.h
- @[ -z "$(findstring EVB_ME,$@)" ] || \
- echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 1" >>$(obj)include/config.h
- @[ -z "$(findstring EVB_HI,$@)" ] || \
- echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 2" >>$(obj)include/config.h
- @[ -z "$(findstring _25,$@)" ] || \
- echo "#define CONFIG_PPCHAMELEON_CLK_25" >>$(obj)include/config.h
- @[ -z "$(findstring _33,$@)" ] || \
- echo "#define CONFIG_PPCHAMELEON_CLK_33" >>$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a PPChameleonEVB powerpc ppc4xx PPChameleonEVB dave
-
-sequoia_config \
-rainier_config: unconfig
- @mkdir -p $(obj)include
- @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
- tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a sequoia powerpc ppc4xx sequoia amcc
-
-sequoia_nand_config \
-rainier_nand_config: unconfig
- @mkdir -p $(obj)include $(obj)board/amcc/sequoia
- @mkdir -p $(obj)nand_spl/board/amcc/sequoia
- @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
- @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
- tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h
- @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
- @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
- @$(MKCONFIG) -n $@ -a sequoia powerpc ppc4xx sequoia amcc
-
-sequoia_ramboot_config \
-rainier_ramboot_config: unconfig
- @mkdir -p $(obj)include $(obj)board/amcc/sequoia
- @echo "#define CONFIG_SYS_RAMBOOT" > $(obj)include/config.h
- @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
- tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h
- @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
- @echo "LDSCRIPT = board/amcc/sequoia/u-boot-ram.lds" >> \
- $(obj)board/amcc/sequoia/config.tmp
- @$(MKCONFIG) -n $@ -a sequoia powerpc ppc4xx sequoia amcc
-
-v5fx30teval_config: unconfig
- @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
- @mkdir -p $(obj)include $(obj)board/avnet/v5fx30teval
- @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds"\
- > $(obj)board/avnet/v5fx30teval/config.tmp
- @echo "TEXT_BASE := 0x03000000" \
- >> $(obj)board/avnet/v5fx30teval/config.tmp
- @$(MKCONFIG) $@ powerpc ppc4xx v5fx30teval avnet
-
-v5fx30teval_flash_config: unconfig
- @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
- @mkdir -p $(obj)include $(obj)board/avnet/v5fx30teval
- @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds"\
- > $(obj)board/avnet/v5fx30teval/config.tmp
- @echo "TEXT_BASE := 0xFF1C0000" \
- >> $(obj)board/avnet/v5fx30teval/config.tmp
- @$(MKCONFIG) v5fx30teval powerpc ppc4xx v5fx30teval avnet
-
-W7OLMC_config \
-W7OLMG_config: unconfig
- @$(MKCONFIG) $@ powerpc ppc4xx w7o
-
-# Walnut & Sycamore images are identical (recognized via PVR)
-walnut_config \
-sycamore_config: unconfig
- @$(MKCONFIG) -n $@ walnut powerpc ppc4xx walnut amcc
-
-xilinx-ppc405-generic_flash_config: unconfig
- @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic
- @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds"\
- > $(obj)board/xilinx/ppc405-generic/config.tmp
- @echo "TEXT_BASE := 0xFE360000" \
- >> $(obj)board/xilinx/ppc405-generic/config.tmp
- @$(MKCONFIG) xilinx-ppc405-generic powerpc ppc4xx ppc405-generic xilinx
-
-xilinx-ppc405-generic_config: unconfig
- @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic
- @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds"\
- > $(obj)board/xilinx/ppc405-generic/config.tmp
- @echo "TEXT_BASE := 0x04000000" \
- >> $(obj)board/xilinx/ppc405-generic/config.tmp
- @$(MKCONFIG) xilinx-ppc405-generic powerpc ppc4xx ppc405-generic xilinx
-
-xilinx-ppc440-generic_flash_config: unconfig
- @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
- @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds"\
- > $(obj)board/xilinx/ppc440-generic/config.tmp
- @echo "TEXT_BASE := 0xFE360000" \
- >> $(obj)board/xilinx/ppc440-generic/config.tmp
- @$(MKCONFIG) xilinx-ppc440-generic powerpc ppc4xx ppc440-generic xilinx
-
-xilinx-ppc440-generic_config: unconfig
- @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
- @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds"\
- > $(obj)board/xilinx/ppc440-generic/config.tmp
- @echo "TEXT_BASE := 0x04000000" \
- >> $(obj)board/xilinx/ppc440-generic/config.tmp
- @$(MKCONFIG) xilinx-ppc440-generic powerpc ppc4xx ppc440-generic xilinx
-
-yosemite_config \
-yellowstone_config: unconfig
- @mkdir -p $(obj)include
- @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
- tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a yosemite powerpc ppc4xx yosemite amcc
-
-#########################################################################
-## MPC824x Systems
-#########################################################################
-
-eXalion_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x eXalion
-
-CPC45_config \
-CPC45_ROMBOOT_config: unconfig
- @mkdir -p $(obj)include ; \
- if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
- echo "CONFIG_BOOT_ROM = y" >> $(obj)include/config.mk ; \
- else \
- echo "CONFIG_BOOT_ROM = n" >> $(obj)include/config.mk ; \
- fi; \
- echo "export CONFIG_BOOT_ROM" >> $(obj)include/config.mk;
- @$(MKCONFIG) -n $@ CPC45 powerpc mpc824x cpc45
-
-# HDLAN is broken ATM. Should be fixed as soon as hardware is available and as
-# time permits.
-#linkstation_HDLAN_config \
-# Remove this line when HDLAN is fixed
-linkstation_HGLAN_config: unconfig
- @mkdir -p $(obj)include
- @case $@ in \
- *HGLAN*) echo "#define CONFIG_HGLAN 1" >$(obj)include/config.h; ;; \
- *HDLAN*) echo "#define CONFIG_HLAN 1" >$(obj)include/config.h; ;; \
- esac
- @$(MKCONFIG) -n $@ -a linkstation powerpc mpc824x linkstation
-
-Sandpoint8240_config: unconfig
- @$(MKCONFIG) $@ powerpc mpc824x sandpoint
-
-Sandpoint8245_config: unconfig
- @$(MKCONFIG) $@ powerpc mpc824x sandpoint
-
-#########################################################################
-## MPC8260 Systems
-#########################################################################
-
-cogent_mpc8260_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8260 cogent
-
-CPU86_config \
-CPU86_ROMBOOT_config: unconfig
- @mkdir -p $(obj)include ; \
- if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
- echo "CONFIG_BOOT_ROM = y" >> $(obj)include/config.mk ; \
- else \
- echo "CONFIG_BOOT_ROM = n" >> $(obj)include/config.mk ; \
- fi; \
- echo "export CONFIG_BOOT_ROM" >> $(obj)include/config.mk;
- @$(MKCONFIG) -n $@ CPU86 powerpc mpc8260 cpu86
-
-CPU87_config \
-CPU87_ROMBOOT_config: unconfig
- @mkdir -p $(obj)include ; \
- if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
- echo "CONFIG_BOOT_ROM = y" >> $(obj)include/config.mk ; \
- else \
- echo "CONFIG_BOOT_ROM = n" >> $(obj)include/config.mk ; \
- fi; \
- echo "export CONFIG_BOOT_ROM" >> $(obj)include/config.mk;
- @$(MKCONFIG) -n $@ CPU87 powerpc mpc8260 cpu87
-
-ep8248_config \
-ep8248E_config : unconfig
- @$(MKCONFIG) -n $@ ep8248 powerpc mpc8260 ep8248
-
-ISPAN_config \
-ISPAN_REVB_config: unconfig
- @mkdir -p $(obj)include
- @if [ "$(findstring _REVB_,$@)" ] ; then \
- echo "#define CONFIG_SYS_REV_B" > $(obj)include/config.h ; \
- fi
- @$(MKCONFIG) -n $@ -a ISPAN powerpc mpc8260 ispan
-
-MPC8260ADS_config \
-MPC8260ADS_lowboot_config \
-MPC8260ADS_33MHz_config \
-MPC8260ADS_33MHz_lowboot_config \
-MPC8260ADS_40MHz_config \
-MPC8260ADS_40MHz_lowboot_config \
-MPC8272ADS_config \
-MPC8272ADS_lowboot_config \
-PQ2FADS_config \
-PQ2FADS_lowboot_config \
-PQ2FADS-VR_config \
-PQ2FADS-VR_lowboot_config \
-PQ2FADS-ZU_config \
-PQ2FADS-ZU_lowboot_config \
-PQ2FADS-ZU_66MHz_config \
-PQ2FADS-ZU_66MHz_lowboot_config \
- : unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)board/freescale/mpc8260ads
- $(if $(findstring PQ2FADS,$@), \
- @echo "#define CONFIG_ADSTYPE CONFIG_SYS_PQ2FADS" > $(obj)include/config.h, \
- @echo "#define CONFIG_ADSTYPE CONFIG_SYS_"$(subst MPC,,$(word 1,$(subst _, ,$@))) > $(obj)include/config.h)
- $(if $(findstring MHz,$@), \
- @echo "#define CONFIG_8260_CLKIN" $(subst MHz,,$(word 2,$(subst _, ,$@)))"000000" >> $(obj)include/config.h, \
- $(if $(findstring VR,$@), \
- @echo "#define CONFIG_8260_CLKIN 66000000" >> $(obj)include/config.h))
- @[ -z "$(findstring lowboot_,$@)" ] || \
- echo "TEXT_BASE = 0xFF800000" >$(obj)board/freescale/mpc8260ads/config.tmp
- @$(MKCONFIG) -n $@ -a MPC8260ADS powerpc mpc8260 mpc8260ads freescale
-
-muas3001_dev_config \
-muas3001_config : unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)board/muas3001
- @if [ "$(findstring dev,$@)" ] ; then \
- echo "#define CONFIG_MUAS_DEV_BOARD" > $(obj)include/config.h ; \
- fi
- @$(MKCONFIG) -n $@ -a muas3001 powerpc mpc8260 muas3001
-
-# PM825/PM826 default configuration: small (= 8 MB) Flash / boot from 64-bit flash
-PM825_config \
-PM825_ROMBOOT_config \
-PM825_BIGFLASH_config \
-PM825_ROMBOOT_BIGFLASH_config \
-PM826_config \
-PM826_ROMBOOT_config \
-PM826_BIGFLASH_config \
-PM826_ROMBOOT_BIGFLASH_config: unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)board/pm826
- @if [ "$(findstring PM825_,$@)" ] ; then \
- echo "#define CONFIG_PCI" >$(obj)include/config.h ; \
- else \
- >$(obj)include/config.h ; \
- fi
- @if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
- echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h ; \
- echo "TEXT_BASE = 0xFF800000" >$(obj)board/pm826/config.tmp ; \
- if [ "$(findstring _BIGFLASH_,$@)" ] ; then \
- echo "#define CONFIG_FLASH_32MB" >>$(obj)include/config.h ; \
- fi; \
- else \
- if [ "$(findstring _BIGFLASH_,$@)" ] ; then \
- $(XECHO) "... with 32 MB Flash" ; \
- echo "#define CONFIG_FLASH_32MB" >>$(obj)include/config.h ; \
- echo "TEXT_BASE = 0x40000000" >$(obj)board/pm826/config.tmp ; \
- else \
- echo "TEXT_BASE = 0xFF000000" >$(obj)board/pm826/config.tmp ; \
- fi; \
- fi
- @$(MKCONFIG) -n $@ -a PM826 powerpc mpc8260 pm826
-
-PM828_config \
-PM828_PCI_config \
-PM828_ROMBOOT_config \
-PM828_ROMBOOT_PCI_config: unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)board/pm826
- @if [ "$(findstring _PCI_,$@)" ] ; then \
- echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
- fi
- @if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
- echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h ; \
- echo "TEXT_BASE = 0xFF800000" >$(obj)board/pm826/config.tmp ; \
- fi
- @$(MKCONFIG) -n $@ -a PM828 powerpc mpc8260 pm828
-
-Rattler8248_config \
-Rattler_config: unconfig
- @mkdir -p $(obj)include
- $(if $(findstring 8248,$@), \
- @echo "#define CONFIG_MPC8248" > $(obj)include/config.h)
- @$(MKCONFIG) -n $@ -a Rattler powerpc mpc8260 rattler
-
-TQM8255_AA_config \
-TQM8260_AA_config \
-TQM8260_AB_config \
-TQM8260_AC_config \
-TQM8260_AD_config \
-TQM8260_AE_config \
-TQM8260_AF_config \
-TQM8260_AG_config \
-TQM8260_AH_config \
-TQM8260_AI_config \
-TQM8265_AA_config: unconfig
- @mkdir -p $(obj)include
- @case "$@" in \
- TQM8255_AA_config) CTYPE=MPC8255; CFREQ=300; CACHE=no; BMODE=8260;; \
- TQM8260_AA_config) CTYPE=MPC8260; CFREQ=200; CACHE=no; BMODE=8260;; \
- TQM8260_AB_config) CTYPE=MPC8260; CFREQ=200; CACHE=yes; BMODE=60x;; \
- TQM8260_AC_config) CTYPE=MPC8260; CFREQ=200; CACHE=yes; BMODE=60x;; \
- TQM8260_AD_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=60x;; \
- TQM8260_AE_config) CTYPE=MPC8260; CFREQ=266; CACHE=no; BMODE=8260;; \
- TQM8260_AF_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=60x;; \
- TQM8260_AG_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=8260;; \
- TQM8260_AH_config) CTYPE=MPC8260; CFREQ=300; CACHE=yes; BMODE=60x;; \
- TQM8260_AI_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=60x;; \
- TQM8265_AA_config) CTYPE=MPC8265; CFREQ=300; CACHE=no; BMODE=60x;; \
- esac; \
- if [ "$${CTYPE}" != "MPC8260" ] ; then \
- echo "#define CONFIG_$${CTYPE}" >>$(obj)include/config.h ; \
- fi; \
- echo "#define CONFIG_$${CFREQ}MHz" >>$(obj)include/config.h ; \
- if [ "$${CACHE}" = "yes" ] ; then \
- echo "#define CONFIG_L2_CACHE" >>$(obj)include/config.h ; \
- else \
- echo "#undef CONFIG_L2_CACHE" >>$(obj)include/config.h ; \
- fi; \
- if [ "$${BMODE}" = "60x" ] ; then \
- echo "#define CONFIG_BUSMODE_60x" >>$(obj)include/config.h ; \
- else \
- echo "#undef CONFIG_BUSMODE_60x" >>$(obj)include/config.h ; \
- fi
- @$(MKCONFIG) -n $@ -a TQM8260 powerpc mpc8260 tqm8260 tqc
-
-VoVPN-GW_66MHz_config \
-VoVPN-GW_100MHz_config: unconfig
- @mkdir -p $(obj)include
- @echo "#define CONFIG_CLKIN_$(word 2,$(subst _, ,$@))" > $(obj)include/config.h
- @$(MKCONFIG) -n $@ -a VoVPN-GW powerpc mpc8260 vovpn-gw funkwerk
-
#########################################################################
## Coldfire
#########################################################################
esac; \
if [ "$${FLASH}" = "SPANSION" ] ; then \
echo "#define CONFIG_SYS_SPANSION_BOOT" >> $(obj)include/config.h ; \
- echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m52277evb/config.tmp ; \
+ echo "CONFIG_SYS_TEXT_BASE = 0x00000000" > $(obj)board/freescale/m52277evb/config.tmp ; \
cp $(obj)board/freescale/m52277evb/u-boot.spa $(obj)board/freescale/m52277evb/u-boot.lds ; \
fi; \
if [ "$${FLASH}" = "STMICRO" ] ; then \
echo "#define CONFIG_CF_SBF" >> $(obj)include/config.h ; \
echo "#define CONFIG_SYS_STMICRO_BOOT" >> $(obj)include/config.h ; \
- echo "TEXT_BASE = 0x43E00000" > $(obj)board/freescale/m52277evb/config.tmp ; \
+ echo "CONFIG_SYS_TEXT_BASE = 0x43E00000" > $(obj)board/freescale/m52277evb/config.tmp ; \
cp $(obj)board/freescale/m52277evb/u-boot.stm $(obj)board/freescale/m52277evb/u-boot.lds ; \
fi
@$(MKCONFIG) -n $@ -a M52277EVB m68k mcf5227x m52277evb freescale
esac; \
if [ "$${FLASH}" != "16" ] ; then \
echo "#define NORFLASH_PS32BIT 1" >> $(obj)include/config.h ; \
- echo "TEXT_BASE = 0xFFC00000" > $(obj)board/freescale/m5235evb/config.tmp ; \
+ echo "CONFIG_SYS_TEXT_BASE = 0xFFC00000" > $(obj)board/freescale/m5235evb/config.tmp ; \
cp $(obj)board/freescale/m5235evb/u-boot.32 $(obj)board/freescale/m5235evb/u-boot.lds ; \
else \
- echo "TEXT_BASE = 0xFFE00000" > $(obj)board/freescale/m5235evb/config.tmp ; \
+ echo "CONFIG_SYS_TEXT_BASE = 0xFFE00000" > $(obj)board/freescale/m5235evb/config.tmp ; \
cp $(obj)board/freescale/m5235evb/u-boot.16 $(obj)board/freescale/m5235evb/u-boot.lds ; \
fi
@$(MKCONFIG) -n $@ -a M5235EVB m68k mcf523x m5235evb freescale
EB+MCF-EV123_config : unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/BuS/EB+MCF-EV123
- @echo "TEXT_BASE = 0xFFE00000"|tee $(obj)board/BuS/EB+MCF-EV123/textbase.mk
+ @echo "CONFIG_SYS_TEXT_BASE = 0xFFE00000"|tee $(obj)board/BuS/EB+MCF-EV123/textbase.mk
@$(MKCONFIG) -n $@ EB+MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS
EB+MCF-EV123_internal_config : unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/BuS/EB+MCF-EV123
- @echo "TEXT_BASE = 0xF0000000"|tee $(obj)board/BuS/EB+MCF-EV123/textbase.mk
+ @echo "CONFIG_SYS_TEXT_BASE = 0xF0000000"|tee $(obj)board/BuS/EB+MCF-EV123/textbase.mk
@$(MKCONFIG) -n $@ EB+MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS
M5329AFEE_config \
M54451EVB_stmicro_config) FLASH=STMICRO;; \
esac; \
if [ "$${FLASH}" = "NOR" ] ; then \
- echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54451evb/config.tmp ; \
+ echo "CONFIG_SYS_TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54451evb/config.tmp ; \
cp $(obj)board/freescale/m54451evb/u-boot.spa $(obj)board/freescale/m54451evb/u-boot.lds ; \
fi; \
if [ "$${FLASH}" = "STMICRO" ] ; then \
echo "#define CONFIG_CF_SBF" >> $(obj)include/config.h ; \
echo "#define CONFIG_SYS_STMICRO_BOOT" >> $(obj)include/config.h ; \
- echo "TEXT_BASE = 0x47E00000" > $(obj)board/freescale/m54451evb/config.tmp ; \
+ echo "CONFIG_SYS_TEXT_BASE = 0x47E00000" > $(obj)board/freescale/m54451evb/config.tmp ; \
cp $(obj)board/freescale/m54451evb/u-boot.stm $(obj)board/freescale/m54451evb/u-boot.lds ; \
fi; \
echo "#define CONFIG_SYS_INPUT_CLKSRC 24000000" >> $(obj)include/config.h ;
esac; \
if [ "$${FLASH}" = "INTEL" ] ; then \
echo "#define CONFIG_SYS_INTEL_BOOT" >> $(obj)include/config.h ; \
- echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
+ echo "CONFIG_SYS_TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
cp $(obj)board/freescale/m54455evb/u-boot.int $(obj)board/freescale/m54455evb/u-boot.lds ; \
fi; \
if [ "$${FLASH}" = "ATMEL" ] ; then \
echo "#define CONFIG_SYS_ATMEL_BOOT" >> $(obj)include/config.h ; \
- echo "TEXT_BASE = 0x04000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
+ echo "CONFIG_SYS_TEXT_BASE = 0x04000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
cp $(obj)board/freescale/m54455evb/u-boot.atm $(obj)board/freescale/m54455evb/u-boot.lds ; \
fi; \
if [ "$${FLASH}" = "STMICRO" ] ; then \
echo "#define CONFIG_CF_SBF" >> $(obj)include/config.h ; \
echo "#define CONFIG_SYS_STMICRO_BOOT" >> $(obj)include/config.h ; \
- echo "TEXT_BASE = 0x4FE00000" > $(obj)board/freescale/m54455evb/config.tmp ; \
+ echo "CONFIG_SYS_TEXT_BASE = 0x4FE00000" > $(obj)board/freescale/m54455evb/config.tmp ; \
cp $(obj)board/freescale/m54455evb/u-boot.stm $(obj)board/freescale/m54455evb/u-boot.lds ; \
fi; \
echo "#define CONFIG_SYS_INPUT_CLKSRC $${FREQ}" >> $(obj)include/config.h ; \
fi
@$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale
-#########################################################################
-## MPC83xx Systems
-#########################################################################
-
-MPC8313ERDB_33_config \
-MPC8313ERDB_66_config \
-MPC8313ERDB_NAND_33_config \
-MPC8313ERDB_NAND_66_config: unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)board/freescale/mpc8313erdb
- @if [ "$(findstring _33_,$@)" ] ; then \
- echo "#define CONFIG_SYS_33MHZ" >>$(obj)include/config.h ; \
- fi ; \
- if [ "$(findstring _66_,$@)" ] ; then \
- echo "#define CONFIG_SYS_66MHZ" >>$(obj)include/config.h ; \
- fi ; \
- if [ "$(findstring _NAND_,$@)" ] ; then \
- echo "TEXT_BASE = 0x00100000" > $(obj)board/freescale/mpc8313erdb/config.tmp ; \
- echo "#define CONFIG_NAND_U_BOOT" >>$(obj)include/config.h ; \
- fi ;
- @if [ "$(findstring _NAND_,$@)" ] ; then \
- echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk ; \
- fi ;
- @$(MKCONFIG) -n $@ -a MPC8313ERDB powerpc mpc83xx mpc8313erdb freescale
-
-MPC8315ERDB_NAND_config \
-MPC8315ERDB_config: unconfig
- @$(MKCONFIG) -n $@ -t $@ MPC8315ERDB powerpc mpc83xx mpc8315erdb freescale
-
-MPC832XEMDS_config \
-MPC832XEMDS_HOST_33_config \
-MPC832XEMDS_HOST_66_config \
-MPC832XEMDS_SLAVE_config \
-MPC832XEMDS_ATM_config: unconfig
- @mkdir -p $(obj)include
- @if [ "$(findstring _HOST_,$@)" ] ; then \
- echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
- fi ; \
- if [ "$(findstring _SLAVE_,$@)" ] ; then \
- echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
- echo "#define CONFIG_PCISLAVE" >>$(obj)include/config.h ; \
- fi ; \
- if [ "$(findstring _33_,$@)" ] ; then \
- echo "#define PCI_33M" >>$(obj)include/config.h ; \
- echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
- fi ; \
- if [ "$(findstring _66_,$@)" ] ; then \
- echo "#define PCI_66M" >>$(obj)include/config.h ; \
- echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
- fi ; \
- if [ "$(findstring _ATM_,$@)" ] ; then \
- echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
- echo "#define CONFIG_PQ_MDS_PIB_ATM 1" >>$(obj)include/config.h ; \
- fi ;
- @$(MKCONFIG) -n $@ -a MPC832XEMDS powerpc mpc83xx mpc832xemds freescale
-
-MPC8349ITX_config \
-MPC8349ITX_LOWBOOT_config \
-MPC8349ITXGP_config: unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)board/freescale/mpc8349itx
- @echo "#define CONFIG_$(subst _LOWBOOT,,$(@:_config=))" >> $(obj)include/config.h
- @if [ "$(findstring GP,$@)" ] ; then \
- echo "TEXT_BASE = 0xFE000000" >$(obj)board/freescale/mpc8349itx/config.tmp ; \
- fi
- @if [ "$(findstring LOWBOOT,$@)" ] ; then \
- echo "TEXT_BASE = 0xFE000000" >$(obj)board/freescale/mpc8349itx/config.tmp ; \
- fi
- @$(MKCONFIG) -n $@ -a MPC8349ITX powerpc mpc83xx mpc8349itx freescale
-
-MPC8360EMDS_config \
-MPC8360EMDS_HOST_33_config \
-MPC8360EMDS_HOST_66_config \
-MPC8360EMDS_SLAVE_config \
-MPC8360EMDS_ATM_config: unconfig
- @mkdir -p $(obj)include
- @if [ "$(findstring _HOST_,$@)" ] ; then \
- echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
- fi ; \
- if [ "$(findstring _SLAVE_,$@)" ] ; then \
- echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
- echo "#define CONFIG_PCISLAVE" >>$(obj)include/config.h ; \
- fi ; \
- if [ "$(findstring _33_,$@)" ] ; then \
- echo "#define PCI_33M" >>$(obj)include/config.h ; \
- echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
- fi ; \
- if [ "$(findstring _66_,$@)" ] ; then \
- echo "#define PCI_66M" >>$(obj)include/config.h ; \
- echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
- fi ; \
- if [ "$(findstring _ATM_,$@)" ] ; then \
- echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
- echo "#define CONFIG_PQ_MDS_PIB_ATM 1" >>$(obj)include/config.h ; \
- fi ;
- @$(MKCONFIG) -n $@ -a MPC8360EMDS powerpc mpc83xx mpc8360emds freescale
-
-MPC8360ERDK_33_config \
-MPC8360ERDK_66_config \
-MPC8360ERDK_config: unconfig
- @mkdir -p $(obj)include
- @if [ "$(findstring _33_,$@)" ] ; then \
- echo "#define CONFIG_CLKIN_33MHZ" >>$(obj)include/config.h ;\
- fi ;
- @$(MKCONFIG) -n $@ -a MPC8360ERDK powerpc mpc83xx mpc8360erdk freescale
-
-MPC837XEMDS_config \
-MPC837XEMDS_HOST_config: unconfig
- @mkdir -p $(obj)include
- @if [ "$(findstring _HOST_,$@)" ] ; then \
- echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
- fi ;
- @$(MKCONFIG) -n $@ -a MPC837XEMDS powerpc mpc83xx mpc837xemds freescale
-
-sbc8349_config \
-sbc8349_PCI_33_config \
-sbc8349_PCI_66_config: unconfig
- @$(MKCONFIG) -n $@ -t $@ sbc8349 powerpc mpc83xx sbc8349
-
-SIMPC8313_LP_config \
-SIMPC8313_SP_config: unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)board/sheldon/simpc8313
- @if [ "$(findstring _LP_,$@)" ] ; then \
- echo "#define CONFIG_NAND_LP" >> $(obj)include/config.h ; \
- fi ; \
- if [ "$(findstring _SP_,$@)" ] ; then \
- echo "#define CONFIG_NAND_SP" >> $(obj)include/config.h ; \
- fi ;
- @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
- @$(MKCONFIG) -n $@ -a SIMPC8313 powerpc mpc83xx simpc8313 sheldon
-
-caddy2_config \
-vme8349_config: unconfig
- @$(MKCONFIG) -n $@ -t $@ vme8349 powerpc mpc83xx vme8349 esd
-
-#########################################################################
-## MPC85xx Systems
-#########################################################################
-
-MPC8536DS_NAND_config \
-MPC8536DS_SDCARD_config \
-MPC8536DS_SPIFLASH_config \
-MPC8536DS_36BIT_config \
-MPC8536DS_config: unconfig
- @$(MKCONFIG) -n $@ -t $@ MPC8536DS powerpc mpc85xx mpc8536ds freescale
-
-MPC8540EVAL_config \
-MPC8540EVAL_33_config \
-MPC8540EVAL_66_config \
-MPC8540EVAL_33_slave_config \
-MPC8540EVAL_66_slave_config: unconfig
- @mkdir -p $(obj)include
- @if [ -z "$(findstring _33_,$@)" ] ; then \
- echo "#define CONFIG_SYSCLK_66M" >>$(obj)include/config.h ; \
- fi ; \
- if [ "$(findstring _slave_,$@)" ] ; then \
- echo "#define CONFIG_PCI_SLAVE" >>$(obj)include/config.h ; \
- fi
- @$(MKCONFIG) -n $@ -a MPC8540EVAL powerpc mpc85xx mpc8540eval
-
-MPC8541CDS_legacy_config \
-MPC8541CDS_config: unconfig
- @mkdir -p $(obj)include
- @if [ "$(findstring _legacy_,$@)" ] ; then \
- echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
- fi
- @$(MKCONFIG) -n $@ -a MPC8541CDS powerpc mpc85xx mpc8541cds freescale
-
-MPC8548CDS_legacy_config \
-MPC8548CDS_config: unconfig
- @mkdir -p $(obj)include
- @if [ "$(findstring _legacy_,$@)" ] ; then \
- echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
- fi
- @$(MKCONFIG) -n $@ -a MPC8548CDS powerpc mpc85xx mpc8548cds freescale
-
-MPC8555CDS_legacy_config \
-MPC8555CDS_config: unconfig
- @mkdir -p $(obj)include
- @if [ "$(findstring _legacy_,$@)" ] ; then \
- echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
- fi
- @$(MKCONFIG) -n $@ -a MPC8555CDS powerpc mpc85xx mpc8555cds freescale
-
-MPC8569MDS_ATM_config \
-MPC8569MDS_NAND_config \
-MPC8569MDS_config: unconfig
- @$(MKCONFIG) -n $@ -t $@ MPC8569MDS powerpc mpc85xx mpc8569mds freescale
-
-MPC8572DS_36BIT_config \
-MPC8572DS_config: unconfig
- @$(MKCONFIG) -n $@ -t $@ MPC8572DS powerpc mpc85xx mpc8572ds freescale
-
-P2020DS_36BIT_config \
-P2020DS_config: unconfig
- @$(MKCONFIG) -n $@ -t $@ P2020DS powerpc mpc85xx p2020ds freescale
-
-P1011RDB_config \
-P1011RDB_NAND_config \
-P1011RDB_SDCARD_config \
-P1011RDB_SPIFLASH_config \
-P1020RDB_config \
-P1020RDB_NAND_config \
-P1020RDB_SDCARD_config \
-P1020RDB_SPIFLASH_config \
-P2010RDB_config \
-P2010RDB_NAND_config \
-P2010RDB_SDCARD_config \
-P2010RDB_SPIFLASH_config \
-P2020DS_DDR2_config \
-P2020RDB_config \
-P2020RDB_NAND_config \
-P2020RDB_SDCARD_config \
-P2020RDB_SPIFLASH_config: unconfig
- @$(MKCONFIG) -n $@ -t $@ P1_P2_RDB powerpc mpc85xx p1_p2_rdb freescale
-
-sbc8540_config \
-sbc8540_33_config \
-sbc8540_66_config: unconfig
- @$(MKCONFIG) -n $@ -t $@ SBC8540 powerpc mpc85xx sbc8560
-
-sbc8548_config \
-sbc8548_PCI_33_config \
-sbc8548_PCI_66_config \
-sbc8548_PCI_33_PCIE_config \
-sbc8548_PCI_66_PCIE_config: unconfig
- @$(MKCONFIG) -n $@ -t $@ sbc8548 powerpc mpc85xx sbc8548
-
-sbc8560_config \
-sbc8560_33_config \
-sbc8560_66_config: unconfig
- @$(MKCONFIG) -n $@ -t $@ sbc8560 powerpc mpc85xx sbc8560
-
-stxssa_config \
-stxssa_4M_config: unconfig
- @mkdir -p $(obj)include
- @if [ "$(findstring _4M_,$@)" ] ; then \
- echo "#define CONFIG_STXSSA_4M" >>$(obj)include/config.h ; \
- fi
- @$(MKCONFIG) -n $@ -a stxssa powerpc mpc85xx stxssa stx
-
-TQM8540_config \
-TQM8541_config \
-TQM8548_config \
-TQM8548_AG_config \
-TQM8548_BE_config \
-TQM8555_config \
-TQM8560_config: unconfig
- @mkdir -p $(obj)include
- @BTYPE=$(@:_config=); \
- CTYPE=$(subst TQM,,$(subst _AG,,$(subst _BE,,$(@:_config=)))); \
- echo "#define CONFIG_MPC$${CTYPE}">>$(obj)include/config.h; \
- echo "#define CONFIG_$${BTYPE}">>$(obj)include/config.h; \
- echo "#define CONFIG_HOSTNAME tqm$${CTYPE}">>$(obj)include/config.h; \
- echo "#define CONFIG_BOARDNAME \"$${BTYPE}\"">>$(obj)include/config.h;
- @echo "CONFIG_$(@:_config=) = y">>$(obj)include/config.mk;
- @$(MKCONFIG) -n $@ -a TQM85xx powerpc mpc85xx tqm85xx tqc
-
-#########################################################################
-## MPC86xx Systems
-#########################################################################
-
-MPC8641HPCN_36BIT_config \
-MPC8641HPCN_config: unconfig
- @mkdir -p $(obj)include
- @if [ "$(findstring _36BIT_,$@)" ] ; then \
- echo "#define CONFIG_PHYS_64BIT" >>$(obj)include/config.h ; \
- fi
- @$(MKCONFIG) -n $@ -a MPC8641HPCN powerpc mpc86xx mpc8641hpcn freescale
-
-#########################################################################
-## 74xx/7xx Systems
-#########################################################################
-
-EVB64260_config \
-EVB64260_750CX_config: unconfig
- @$(MKCONFIG) -n $@ EVB64260 powerpc 74xx_7xx evb64260
-
-p3m750_config \
-p3m7448_config: unconfig
- @mkdir -p $(obj)include
- @if [ "$(findstring 750_,$@)" ] ; then \
- echo "#define CONFIG_P3M750" >>$(obj)include/config.h ; \
- else \
- echo "#define CONFIG_P3M7448" >>$(obj)include/config.h ; \
- fi
- @$(MKCONFIG) -n $@ -a p3mx powerpc 74xx_7xx p3mx prodrive
-
-PCIPPC2_config \
-PCIPPC6_config: unconfig
- @$(MKCONFIG) -n $@ $@ powerpc 74xx_7xx pcippc2
-
#========================================================================
# ARM
#========================================================================
@[ -z "$(findstring _bigflash,$@)" ] || \
{ echo "#define CONFIG_FLASH_16MB" >>$(obj)include/config.h ; \
echo "#define CONFIG_RAM_16MB" >>$(obj)include/config.h ; \
- echo "TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \
+ echo "CONFIG_SYS_TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \
}
@[ -z "$(findstring _old,$@)" ] || \
{ echo "#define CONFIG_FLASH_8MB" >>$(obj)include/config.h ; \
echo "#define CONFIG_RAM_16MB" >>$(obj)include/config.h ; \
- echo "TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \
+ echo "CONFIG_SYS_TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \
}
@$(MKCONFIG) -n $@ -a trab arm arm920t trab - s3c24x0
@echo "#define CONFIG_SH7785LCR 1" > $(obj)include/config.h
@if [ "$(findstring 32bit, $@)" ] ; then \
echo "#define CONFIG_SH_32BIT 1" >> $(obj)include/config.h ; \
- echo "TEXT_BASE = 0x8ff80000" > \
+ echo "CONFIG_SYS_TEXT_BASE = 0x8ff80000" > \
$(obj)board/renesas/sh7785lcr/config.tmp ; \
fi
@$(MKCONFIG) -n $@ -a sh7785lcr sh sh4 sh7785lcr renesas
$(obj)tools/mkimage $(obj)tools/mpc86x_clk \
$(obj)tools/ncb $(obj)tools/ubsha1
@rm -f $(obj)board/cray/L1/{bootscript.c,bootscript.image} \
+ $(obj)board/matrix_vision/*/bootscript.img \
$(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin} \
$(obj)board/trab/trab_fkt $(obj)board/voiceblue/eeprom \
$(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds \
- CONFIG_SYS_MONITOR_BASE:
Physical start address of boot monitor code (set by
make config files to be same as the text base address
- (TEXT_BASE) used when linking) - same as
+ (CONFIG_SYS_TEXT_BASE) used when linking) - same as
CONFIG_SYS_FLASH_BASE when booting from flash.
- CONFIG_SYS_MONITOR_LEN:
all data for the Linux kernel must be between "bootm_low"
and "bootm_low" + CONFIG_SYS_BOOTMAPSZ.
+- CONFIG_SYS_BOOT_RAMDISK_HIGH:
+ Enable initrd_high functionality. If defined then the
+ initrd_high feature is enabled and the bootm ramdisk subcommand
+ is enabled.
+
+- CONFIG_SYS_BOOT_GET_CMDLINE:
+ Enables allocating and saving kernel cmdline in space between
+ "bootm_low" and "bootm_low" + BOOTMAPSZ.
+
+- CONFIG_SYS_BOOT_GET_KBD:
+ Enables allocating and saving a kernel copy of the bd_info in
+ space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
+
- CONFIG_SYS_MAX_FLASH_BANKS:
Max number of Flash memory banks
.globl _TEXT_BASE
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
.globl _TEXT_BASE
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
/*
* Below variable is very important because we use MMU in U-Boot.
/* Prepare to disable the MMU */
adr r2, mmu_disable_phys
- sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - TEXT_BASE)
+ sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
b mmu_disable
.align 5
/* Prepare to disable the MMU */
adr r2, mmu_disable_phys
- sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - TEXT_BASE)
+ sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
b mmu_disable
.align 5
.globl _TEXT_BASE
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
cmp r0, r1 /* don't reloc during debug */
beq stack_setup
-#if TEXT_BASE
+#if CONFIG_SYS_TEXT_BASE
#ifndef CONFIG_LPC2292 /* already done in lowlevel_init */
ldr r2, =0x0 /* Relocate the exception vectors */
cmp r1, r2 /* and associated data to address */
- ldmneia r0!, {r3-r10} /* 0x0. Do nothing if TEXT_BASE is */
+ ldmneia r0!, {r3-r10} /* 0x0. Do nothing if CONFIG_SYS_TEXT_BASE is */
stmneia r2!, {r3-r10} /* 0x0. Copy the first 15 words. */
ldmneia r0, {r3-r9}
stmneia r2, {r3-r9}
ldr r0, [r1, #+NETARM_MEM_CS0_BASE_ADDR]
ldr r1, =0xFFFFF000
and r0, r1, r0
- ldr r1, =(relocate-TEXT_BASE)
+ ldr r1, =(relocate-CONFIG_SYS_TEXT_BASE)
add r0, r1, r0
ldr r4, =NETARM_GEN_MODULE_BASE
ldr r1, =NETARM_GEN_SW_SVC_RESETA
_MTEXT_BASE:
#undef START_FROM_MEM
#ifdef START_FROM_MEM
- .word TEXT_BASE-PHYS_FLASH_1
+ .word CONFIG_SYS_TEXT_BASE-PHYS_FLASH_1
#else
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
#endif
.globl lowlevel_init
_MTEXT_BASE:
#undef START_FROM_MEM
#ifdef START_FROM_MEM
- .word TEXT_BASE-PHYS_FLASH_1
+ .word CONFIG_SYS_TEXT_BASE-PHYS_FLASH_1
#else
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
#endif
.globl lowlevel_init
.globl _TEXT_BASE
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
.globl _TEXT_BASE
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
#endif
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
.globl lowlevel_init
.type lowlevel_init,function
ldr r0, =POS1 /* r0 = POS1 compile */
ldr r2, _TEXT_BASE
sub r0, r0, r2 /* r0 = POS1-_TEXT_BASE (POS1 relative) */
- sub r5, r5, r0 /* r0 = TEXT_BASE-1 */
+ sub r5, r5, r0 /* r0 = CONFIG_SYS_TEXT_BASE-1 */
sub r5, r5, #4 /* r1 = text base - current */
/* memory control configuration 1 */
.globl _TEXT_BASE
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
.globl _TEXT_BASE
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
.globl _TEXT_BASE
_TEXT_BASE:
- .word TEXT_BASE /* address of _start in the linked image */
+ .word CONFIG_SYS_TEXT_BASE /* address of _start in the linked image */
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
#include <asm/arch/clocks_omap3.h>
_TEXT_BASE:
- .word TEXT_BASE /* sdram load addr from config.mk */
+ .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
#if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_NAND_BOOT)
/**************************************************************************
.globl _TEXT_BASE
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
.globl _TEXT_BASE
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
.globl _TEXT_BASE
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
.globl _TEXT_BASE
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
.globl _TEXT_BASE
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
.globl _TEXT_BASE
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
/* Relocation to SDRAM works on all ARM boards */
#define CONFIG_RELOC_FIXUP_WORKS
#endif
+#define CONFIG_LMB
+#define CONFIG_SYS_BOOT_RAMDISK_HIGH
#endif
#include <image.h>
#include <u-boot/zlib.h>
#include <asm/byteorder.h>
+#include <fdt.h>
+#include <libfdt.h>
+#include <fdt_support.h>
DECLARE_GLOBAL_DATA_PTR;
static struct tag *params;
#endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */
-int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
+static ulong get_sp(void);
+#if defined(CONFIG_OF_LIBFDT)
+static int bootm_linux_fdt(int machid, bootm_headers_t *images);
+#endif
+
+void arch_lmb_reserve(struct lmb *lmb)
+{
+ ulong sp;
+
+ /*
+ * Booting a (Linux) kernel image
+ *
+ * Allocate space for command line and board info - the
+ * address should be as high as possible within the reach of
+ * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused
+ * memory, which means far enough below the current stack
+ * pointer.
+ */
+ sp = get_sp();
+ debug("## Current stack ends at 0x%08lx ", sp);
+
+ /* adjust sp by 1K to be safe */
+ sp -= 1024;
+ lmb_reserve(lmb, sp,
+ gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size - sp);
+}
+
+static void announce_and_cleanup(void)
+{
+ printf("\nStarting kernel ...\n\n");
+
+#ifdef CONFIG_USB_DEVICE
+ {
+ extern void udc_disconnect(void);
+ udc_disconnect();
+ }
+#endif
+ cleanup_before_linux();
+}
+
+int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
{
bd_t *bd = gd->bd;
char *s;
int machid = bd->bi_arch_number;
- void (*theKernel)(int zero, int arch, uint params);
+ void (*kernel_entry)(int zero, int arch, uint params);
#ifdef CONFIG_CMDLINE_TAG
char *commandline = getenv ("bootargs");
if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
return 1;
- theKernel = (void (*)(int, int, uint))images->ep;
-
s = getenv ("machid");
if (s) {
machid = simple_strtoul (s, NULL, 16);
show_boot_progress (15);
+#ifdef CONFIG_OF_LIBFDT
+ if (images->ft_len)
+ return bootm_linux_fdt(machid, images);
+#endif
+
+ kernel_entry = (void (*)(int, int, uint))images->ep;
+
debug ("## Transferring control to Linux (at address %08lx) ...\n",
- (ulong) theKernel);
+ (ulong) kernel_entry);
#if defined (CONFIG_SETUP_MEMORY_TAGS) || \
defined (CONFIG_CMDLINE_TAG) || \
if (images->rd_start && images->rd_end)
setup_initrd_tag (bd, images->rd_start, images->rd_end);
#endif
- setup_end_tag (bd);
+ setup_end_tag(bd);
#endif
- /* we assume that the kernel is in place */
- printf ("\nStarting kernel ...\n\n");
+ announce_and_cleanup();
-#ifdef CONFIG_USB_DEVICE
- {
- extern void udc_disconnect (void);
- udc_disconnect ();
+ kernel_entry(0, machid, bd->bi_boot_params);
+ /* does not return */
+
+ return 1;
+}
+
+#if defined(CONFIG_OF_LIBFDT)
+static int fixup_memory_node(void *blob)
+{
+ bd_t *bd = gd->bd;
+ int bank;
+ u64 start[CONFIG_NR_DRAM_BANKS];
+ u64 size[CONFIG_NR_DRAM_BANKS];
+
+ for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
+ start[bank] = bd->bi_dram[bank].start;
+ size[bank] = bd->bi_dram[bank].size;
}
-#endif
- cleanup_before_linux ();
+ return fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
+}
+
+static int bootm_linux_fdt(int machid, bootm_headers_t *images)
+{
+ ulong rd_len;
+ bd_t *bd = gd->bd;
+ char *s;
+ void (*kernel_entry)(int zero, int dt_machid, void *dtblob);
+ ulong bootmap_base = getenv_bootm_low();
+ ulong of_size = images->ft_len;
+ char **of_flat_tree = &images->ft_addr;
+ ulong *initrd_start = &images->initrd_start;
+ ulong *initrd_end = &images->initrd_end;
+ struct lmb *lmb = &images->lmb;
+ int ret;
+
+ kernel_entry = (void (*)(int, int, void *))images->ep;
+
+ rd_len = images->rd_end - images->rd_start;
+ ret = boot_ramdisk_high(lmb, images->rd_start, rd_len,
+ initrd_start, initrd_end);
+ if (ret)
+ return ret;
+
+ ret = boot_relocate_fdt(lmb, bootmap_base, of_flat_tree, &of_size);
+ if (ret)
+ return ret;
- theKernel (0, machid, bd->bi_boot_params);
+ debug("## Transferring control to Linux (at address %08lx) ...\n",
+ (ulong) kernel_entry);
+
+ fdt_chosen(*of_flat_tree, 1);
+
+ fixup_memory_node(*of_flat_tree);
+
+ fdt_initrd(*of_flat_tree, *initrd_start, *initrd_end, 1);
+
+ announce_and_cleanup();
+
+ kernel_entry(0, machid, *of_flat_tree);
/* does not return */
return 1;
}
-
+#endif
#if defined (CONFIG_SETUP_MEMORY_TAGS) || \
defined (CONFIG_CMDLINE_TAG) || \
params->hdr.size = 0;
}
+static ulong get_sp(void)
+{
+ ulong ret;
+
+ asm("mov %0, sp" : "=r"(ret) : );
+ return ret;
+}
+
#endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */
re_end = (Elf32_Rel *)(rel_dyn_end + ((gd_t *)gdp)->load_off);
do {
- if (re_src->r_offset >= TEXT_BASE)
- if (*(Elf32_Addr *)(re_src->r_offset - rel_offset) >= TEXT_BASE)
+ if (re_src->r_offset >= CONFIG_SYS_TEXT_BASE)
+ if (*(Elf32_Addr *)(re_src->r_offset - rel_offset) >= CONFIG_SYS_TEXT_BASE)
*(Elf32_Addr *)(re_src->r_offset - rel_offset) -= rel_offset;
} while (re_src++ < re_end);
rte;
#if defined(CONFIG_CF_SBF)
-#define ASM_DRAMINIT (asm_dram_init - TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
-#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
+#define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
+#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
#endif
.text
asm_sbf_img_hdr:
.long 0x00000000 /* checksum, not yet implemented */
.long 0x00020000 /* image length */
- .long TEXT_BASE /* image to be relocated at */
+ .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
asm_dram_init:
move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
jsr asm_dspi_rd_status
/* jump to memory and execute */
- move.l #(TEXT_BASE + 0x400), %a0
+ move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
move.l %a0, (%a1)
jmp (%a0)
/* Set vector base register at the beginning of the Flash */
#if defined(CONFIG_CF_SBF)
- move.l #TEXT_BASE, %d0
+ move.l #CONFIG_SYS_TEXT_BASE, %d0
movec %d0, %VBR
#else
move.l #CONFIG_SYS_FLASH_BASE, %d0
_vectors:
.long 0x00000000 /* Flash offset is 0 until we setup CS0 */
-#if defined(CONFIG_M5282) && (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
-.long _start - TEXT_BASE
+#if defined(CONFIG_M5282) && (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
+.long _start - CONFIG_SYS_TEXT_BASE
#else
.long _START
#endif
#if defined(CONFIG_SYS_INT_FLASH_BASE) && \
(defined(CONFIG_M5282) || defined(CONFIG_M5281))
- #if (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
+ #if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
.long 0x55AA55AA,0xAA55AA55 /* CFM Backdoorkey */
.long 0xFFFFFFFF /* all sectors protected */
.long 0x00000000 /* supervisor/User restriction */
movec %d0, %RAMBAR1
#if defined(CONFIG_M5282)
-#if (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
+#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
/* Setup code in SRAM to initialize FLASHBAR, if start from internal Flash */
move.l #(_flashbar_setup-CONFIG_SYS_INT_FLASH_BASE), %a0
/* Setup code to initialize FLASHBAR, if start from external Memory */
move.l #(CONFIG_SYS_INT_FLASH_BASE + CONFIG_SYS_INT_FLASH_ENABLE), %d0
movec %d0, %FLASHBAR
-#endif /* (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) */
+#endif /* (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) */
#endif
#endif
* therefore no VBR to set
*/
#if !defined(CONFIG_MONITOR_IS_IN_RAM)
-#if defined(CONFIG_M5282) && (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
+#if defined(CONFIG_M5282) && (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
move.l #CONFIG_SYS_INT_FLASH_BASE, %d0
#else
move.l #CONFIG_SYS_FLASH_BASE, %d0
/* set parameters for board_init_r */
move.l %a0,-(%sp) /* dest_addr */
move.l %d0,-(%sp) /* gd */
-#if defined(DEBUG) && (TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) && \
+#if defined(DEBUG) && (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) && \
defined(CONFIG_SYS_HALT_BEFOR_RAM_JUMP)
halt
#endif
rte;
#if defined(CONFIG_CF_SBF)
-#define ASM_DRAMINIT (asm_dram_init - TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
-#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
+#define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
+#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
#endif
.text
asm_sbf_img_hdr:
.long 0x00000000 /* checksum, not yet implemented */
.long 0x00030000 /* image length */
- .long TEXT_BASE /* image to be relocated at */
+ .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
asm_dram_init:
move.w #0x2700,%sr /* Mask off Interrupt */
jsr asm_dspi_rd_status
/* jump to memory and execute */
- move.l #(TEXT_BASE + 0x400), %a0
+ move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
jmp (%a0)
asm_dspi_wr_status:
#define _ASM_CONFIG_H_
#define CONFIG_LMB
+#define CONFIG_SYS_BOOT_RAMDISK_HIGH
+#define CONFIG_SYS_BOOT_GET_CMDLINE
+#define CONFIG_SYS_BOOT_GET_KBD
#endif
shi r7, r0, 0x2
shi r6, r0, 0x6
/*
- * Copy U-Boot code to TEXT_BASE
+ * Copy U-Boot code to CONFIG_SYS_TEXT_BASE
* solve problem with sbrk_base
*/
-#if (CONFIG_SYS_RESET_ADDRESS != TEXT_BASE)
+#if (CONFIG_SYS_RESET_ADDRESS != CONFIG_SYS_TEXT_BASE)
addi r4, r0, __end
addi r5, r0, __text_start
rsub r4, r5, r4 /* size = __end - __text_start */
puts ("SDRAM :\n");
printf ("\t\tIcache:%s\n", icache_status() ? "ON" : "OFF");
printf ("\t\tDcache:%s\n", dcache_status() ? "ON" : "OFF");
- printf ("\tU-Boot Start:0x%08x\n", TEXT_BASE);
+ printf ("\tU-Boot Start:0x%08x\n", CONFIG_SYS_TEXT_BASE);
#if defined(CONFIG_CMD_FLASH)
puts ("FLASH: ");
char *of_flat_tree = NULL;
#if defined(CONFIG_OF_LIBFDT)
- ulong of_size = 0;
-
- /* find flattened device tree */
- ret = boot_get_fdt (flag, argc, argv, images, &of_flat_tree, &of_size);
- if (ret)
- return 1;
+ /* did generic code already find a device tree? */
+ if (images->ft_len)
+ of_flat_tree = images->ft_addr;
#endif
theKernel = (void (*)(char *, ulong, ulong))images->ep;
show_boot_progress (15);
- if (!(ulong) of_flat_tree)
- of_flat_tree = (char *)simple_strtoul (argv[3], NULL, 16);
-
+ if (!of_flat_tree && argc > 3)
+ of_flat_tree = (char *)simple_strtoul(argv[3], NULL, 16);
#ifdef DEBUG
printf ("## Transferring control to Linux (at address 0x%08lx) " \
"ramdisk 0x%08lx, FDT 0x%08lx...\n",
ulong initrd_end = images->rd_end;
char *of_flat_tree = NULL;
#if defined(CONFIG_OF_LIBFDT)
- ulong of_size = 0;
-
- /* find flattened device tree */
- if (boot_get_fdt(flag, argc, argv, images, &of_flat_tree, &of_size))
- return 1;
+ /* did generic code already find a device tree? */
+ if (images->ft_len)
+ of_flat_tree = images->ft_addr;
#endif
if (!of_flat_tree && argc > 3)
of_flat_tree = (char *)simple_strtoul(argv[3], NULL, 16);
#include <asm/cache.h>
#include <asm/mmu.h>
+#include <asm/u-boot.h>
#if !defined(CONFIG_DB64360) && \
!defined(CONFIG_DB64460) && \
beq 4f
3: lwzu r4,4(r3)
lwzux r0,r4,r11
+ cmpwi r0,0
add r0,r0,r11
stw r10,0(r3)
+ beq- 5f
stw r0,0(r4)
- bdnz 3b
+5: bdnz 3b
4:
/* clear_bss: */
/*
#include <asm/cache.h>
#include <asm/mmu.h>
+#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING "MPC512X"
beq 4f
3: lwzu r4,4(r3)
lwzux r0,r4,r11
+ cmpwi r0,0
add r0,r0,r11
stw r10,0(r3)
+ beq- 5f
stw r0,0(r4)
- bdnz 3b
+5: bdnz 3b
4:
clear_bss:
/*
#include <linux/config.h>
#include <asm/processor.h>
+#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""
beq 4f
3: lwzu r4,4(r3)
lwzux r0,r4,r11
+ cmpwi r0,0
add r0,r0,r11
stw r10,0(r3)
+ beq- 5f
stw r0,0(r4)
- bdnz 3b
+5: bdnz 3b
4:
clear_bss:
/*
#include <asm/cache.h>
#include <asm/mmu.h>
+#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""
beq 4f
3: lwzu r4,4(r3)
lwzux r0,r4,r11
+ cmpwi r0,0
add r0,r0,r11
stw r10,0(r3)
+ beq- 5f
stw r0,0(r4)
- bdnz 3b
+5: bdnz 3b
4:
clear_bss:
/*
#include <asm/cache.h>
#include <asm/mmu.h>
+#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""
beq 4f
3: lwzu r4,4(r3)
lwzux r0,r4,r11
+ cmpwi r0,0
add r0,r0,r11
stw r10,0(r3)
+ beq- 5f
stw r0,0(r4)
- bdnz 3b
+5: bdnz 3b
4:
clear_bss:
/*
#include <asm/cache.h>
#include <asm/mmu.h>
+#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""
beq 4f
3: lwzu r4,4(r3)
lwzux r0,r4,r11
+ cmpwi r0,0
add r0,r0,r11
stw r10,0(r3)
+ beq- 5f
stw r0,0(r4)
- bdnz 3b
+5: bdnz 3b
4:
clear_bss:
/*
#include <asm/cache.h>
#include <asm/mmu.h>
+#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""
beq 4f
3: lwzu r4,4(r3)
lwzux r0,r4,r11
+ cmpwi r0,0
add r0,r0,r11
stw r10,0(r3)
+ beq- 5f
stw r0,0(r4)
- bdnz 3b
+5: bdnz 3b
4:
clear_bss:
/*
#include <asm/cache.h>
#include <asm/mmu.h>
+#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING "MPC83XX"
beq 4f
3: lwzu r4,4(r3)
lwzux r0,r4,r11
+ cmpwi r0,0
add r0,r0,r11
stw r10,0(r3)
+ beq- 5f
stw r0,0(r4)
- bdnz 3b
+5: bdnz 3b
4:
#endif
beq 2b
/* Setup interrupt vectors */
- lis r1,TEXT_BASE@h
+ lis r1,CONFIG_SYS_TEXT_BASE@h
mtspr IVPR,r1
li r1,0x0100
lis r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_4M)@h
ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_4M)@l
- lis r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@h
- ori r8,r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@l
+ lis r8,FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@h
+ ori r8,r8,FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@l
/* The 85xx has the default boot window 0xff800000 - 0xffffffff */
lis r9,FSL_BOOKE_MAS3(0xffc00000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h
ori r9,r9,FSL_BOOKE_MAS3(0xffc00000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l
#else
/*
- * create a temp mapping in AS=1 to the 1M TEXT_BASE space, the main
- * image has been relocated to TEXT_BASE on the second stage.
+ * create a temp mapping in AS=1 to the 1M CONFIG_SYS_TEXT_BASE space, the main
+ * image has been relocated to CONFIG_SYS_TEXT_BASE on the second stage.
*/
lis r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_1M)@h
ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_1M)@l
- lis r8,FSL_BOOKE_MAS2(TEXT_BASE, (MAS2_I|MAS2_G))@h
- ori r8,r8,FSL_BOOKE_MAS2(TEXT_BASE, (MAS2_I|MAS2_G))@l
+ lis r8,FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE, (MAS2_I|MAS2_G))@h
+ ori r8,r8,FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE, (MAS2_I|MAS2_G))@l
- lis r9,FSL_BOOKE_MAS3(TEXT_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h
- ori r9,r9,FSL_BOOKE_MAS3(TEXT_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l
+ lis r9,FSL_BOOKE_MAS3(CONFIG_SYS_TEXT_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h
+ ori r9,r9,FSL_BOOKE_MAS3(CONFIG_SYS_TEXT_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l
#endif
mtspr MAS0,r6
beq 4f
3: lwzu r4,4(r3)
lwzux r0,r4,r11
+ cmpwi r0,0
add r0,r0,r11
stw r10,0(r3)
+ beq- 5f
stw r0,0(r4)
- bdnz 3b
+5: bdnz 3b
4:
clear_bss:
/*
#include <asm/cache.h>
#include <asm/mmu.h>
+#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""
beq 4f
3: lwzu r4,4(r3)
lwzux r0,r4,r11
+ cmpwi r0,0
add r0,r0,r11
stw r10,0(r3)
+ beq- 5f
stw r0,0(r4)
- bdnz 3b
+5: bdnz 3b
4:
/* clear_bss: */
/*
stw r5, 0(r4) /* Store physical value of CCSR */
isync
- lis r5, TEXT_BASE@h
- ori r5,r5,TEXT_BASE@l
+ lis r5, CONFIG_SYS_TEXT_BASE@h
+ ori r5,r5,CONFIG_SYS_TEXT_BASE@l
lwz r5, 0(r5)
isync
#include <asm/cache.h>
#include <asm/mmu.h>
+#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""
beq 4f
3: lwzu r4,4(r3)
lwzux r0,r4,r11
+ cmpwi r0,0
add r0,r0,r11
stw r10,0(r3)
+ beq- 5f
stw r0,0(r4)
- bdnz 3b
+5: bdnz 3b
4:
clear_bss:
/*
beq 4f
3: lwzu r4,4(r3)
lwzux r0,r4,r11
+ cmpwi r0,0
add r0,r0,r11
stw r10,0(r3)
+ beq- 5f
stw r0,0(r4)
- bdnz 3b
+5: bdnz 3b
4:
clear_bss:
/*
#define _ASM_CONFIG_H_
#define CONFIG_LMB
+#define CONFIG_SYS_BOOT_RAMDISK_HIGH
+#define CONFIG_SYS_BOOT_GET_CMDLINE
+#define CONFIG_SYS_BOOT_GET_KBD
#ifndef CONFIG_MAX_MEM_MAPPED
#if defined(CONFIG_4xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
}
#endif /* __ASSEMBLY__ */
+#define CONFIG_SYS_MPC512x_USB_OFFSET 0x4000
+#define CONFIG_SYS_MPC512x_USB_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC512x_USB_OFFSET)
+
#endif /* __IMMAP_512x__ */
unsigned long bi_flbfreq; /* Flexbus Freq, in MHz */
unsigned long bi_vcofreq; /* VCO Freq, in MHz */
#endif
- unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */
+ unsigned long bi_bootflags; /* boot / reboot flag (Unused) */
unsigned long bi_ip_addr; /* IP Address */
unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */
unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
}
#endif
- bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
-
WATCHDOG_RESET ();
bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
# if defined(CONFIG_OXC) || defined(CONFIG_RMU)
/* flash mapped at end of memory map */
- bd->bi_flashoffset = TEXT_BASE + flash_size;
+ bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size;
# elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
# endif
endif
PLATFORM_CPPFLAGS += -DCONFIG_SH -D__SH__
-PLATFORM_LDFLAGS += -e $(TEXT_BASE) --defsym reloc_dst=$(TEXT_BASE)
+PLATFORM_LDFLAGS += -e $(CONFIG_SYS_TEXT_BASE) --defsym reloc_dst=$(TEXT_BASE)
LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds
static int sh_mem_env_init(void)
{
- mem_malloc_init(TEXT_BASE - CONFIG_SYS_GBL_DATA_SIZE -
+ mem_malloc_init(CONFIG_SYS_TEXT_BASE - CONFIG_SYS_GBL_DATA_SIZE -
CONFIG_SYS_MALLOC_LEN, CONFIG_SYS_MALLOC_LEN - 16);
env_relocate();
jumptable_init();
include $(SRCTREE)/rules.mk
$(START): $(START:.o=.S)
- $(CC) -D__ASSEMBLY__ $(DBGFLAGS) $(OPTFLAGS) -D__KERNEL__ -DTEXT_BASE=$(TEXT_BASE) \
- -I$(TOPDIR)/include -fno-builtin -ffreestanding -nostdinc -isystem $(gccincdir) -pipe \
+ $(CC) -D__ASSEMBLY__ $(DBGFLAGS) $(OPTFLAGS) -D__KERNEL__ \
+ -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) -I$(TOPDIR)/include \
+ -fno-builtin -ffreestanding -nostdinc -isystem $(gccincdir) -pipe \
$(PLATFORM_CPPFLAGS) -Wall -Wstrict-prototypes \
-I$(TOPDIR)/board -c -o $(START) $(START:.o=.S)
#define PROM_SIZE_MASK (PROM_OFFS-1)
#define __va(x) ( \
(void *)( ((unsigned long)(x))-PROM_OFFS+ \
- (CONFIG_SYS_PROM_OFFSET-phys_base)+PAGE_OFFSET-TEXT_BASE ) \
+ (CONFIG_SYS_PROM_OFFSET-phys_base)+PAGE_OFFSET-CONFIG_SYS_TEXT_BASE ) \
)
-#define __phy(x) ((void *)(((unsigned long)(x))-PROM_OFFS+CONFIG_SYS_PROM_OFFSET-TEXT_BASE))
+#define __phy(x) ((void *)(((unsigned long)(x))-PROM_OFFS+CONFIG_SYS_PROM_OFFSET-CONFIG_SYS_TEXT_BASE))
struct property {
char *name;
WRITE_PAUSE
mov %l7, %o0 ! irq level
set handler_irq, %o1
- set (CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE), %o2
+ set (CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE), %o2
add %o1, %o2, %o1
call %o1
add %sp, SF_REGS_SZ, %o1 ! pt_regs ptr
include $(SRCTREE)/rules.mk
$(START): $(START:.o=.S)
- $(CC) -D__ASSEMBLY__ $(DBGFLAGS) $(OPTFLAGS) -D__KERNEL__ -DTEXT_BASE=$(TEXT_BASE) \
- -I$(TOPDIR)/include -fno-builtin -ffreestanding -nostdinc -isystem $(gccincdir) -pipe \
+ $(CC) -D__ASSEMBLY__ $(DBGFLAGS) $(OPTFLAGS) -D__KERNEL__ \
+ -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) -I$(TOPDIR)/include \
+ -fno-builtin -ffreestanding -nostdinc -isystem $(gccincdir) -pipe \
$(PLATFORM_CPPFLAGS) -Wall -Wstrict-prototypes \
-I$(TOPDIR)/board -c -o $(START) $(START:.o=.S)
#define PROM_SIZE_MASK (PROM_OFFS-1)
#define __va(x) ( \
(void *)( ((unsigned long)(x))-PROM_OFFS+ \
- (CONFIG_SYS_PROM_OFFSET-phys_base)+PAGE_OFFSET-TEXT_BASE ) \
+ (CONFIG_SYS_PROM_OFFSET-phys_base)+PAGE_OFFSET-CONFIG_SYS_TEXT_BASE ) \
)
-#define __phy(x) ((void *)(((unsigned long)(x))-PROM_OFFS+CONFIG_SYS_PROM_OFFSET-TEXT_BASE))
+#define __phy(x) ((void *)(((unsigned long)(x))-PROM_OFFS+CONFIG_SYS_PROM_OFFSET-CONFIG_SYS_TEXT_BASE))
struct property {
char *name;
sethi %hi(0x00800000), %o0
lda [%g0] 2, %o1
and %o0, %o1, %o0
- sethi %hi(leon3_snooping_avail+CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE), %o1
- st %o0, [%lo(leon3_snooping_avail+CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE)+%o1]
+ sethi %hi(leon3_snooping_avail+CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE), %o1
+ st %o0, [%lo(leon3_snooping_avail+CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)+%o1]
/* call relocate*/
nop
WRITE_PAUSE
mov %l7, %o0 ! irq level
set handler_irq, %o1
- set (CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE), %o2
+ set (CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE), %o2
add %o1, %o2, %o1
call %o1
add %sp, SF_REGS_SZ, %o1 ! pt_regs ptr
* c-code can be called.
*/
#define SAVE_ALL_HEAD \
- sethi %hi(trap_setup+(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE)), %l4; \
- jmpl %l4 + %lo(trap_setup+(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE)), %l6;
+ sethi %hi(trap_setup+(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)), %l4; \
+ jmpl %l4 + %lo(trap_setup+(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)), %l6;
#define SAVE_ALL \
SAVE_ALL_HEAD \
nop;
#define _ASM_CONFIG_H_
#define CONFIG_LMB
+#define CONFIG_SYS_BOOT_RAMDISK_HIGH
#endif
int checkboard (void)
{
puts ("Board: MCF-EV1 + MCF-EV23 (BuS Elektronik GmbH & Co. KG)\n");
-#if (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
+#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
puts (" Boot from Internal FLASH\n");
#endif
#
sinclude $(OBJTREE)/board/$(BOARDDIR)/textbase.mk
-ifndef TEXT_BASE
-TEXT_BASE = 0xFE000000
+ifndef CONFIG_SYS_TEXT_BASE
+CONFIG_SYS_TEXT_BASE = 0xFE000000
endif
-TEXT_BASE = 0xFFE00000
+CONFIG_SYS_TEXT_BASE = 0xFFE00000
-TEXT_BASE = 0x23f00000
+CONFIG_SYS_TEXT_BASE = 0x23f00000
+++ /dev/null
-#######################################################################
-#
-# Copyright (C) 2000, 2001, 2002, 2003
-# The LEOX team <team@leox.org>, http://www.leox.org
-#
-# LEOX.org is about the development of free hardware and software resources
-# for system on chip.
-#
-# Description: U-Boot port on the LEOX's ELPT860 CPU board
-# ~~~~~~~~~~~
-#
-#######################################################################
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-#######################################################################
-
-#
-# ELPT860 board
-#
-
-TEXT_BASE = 0x02000000
-#TEXT_BASE = 0x00FB0000
# MA 02110-1301 USA
#
-TEXT_BASE = 0x00100000
+CONFIG_SYS_TEXT_BASE = 0x00100000
+++ /dev/null
-#
-# (C) Copyright 2001
-# Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# EVB64360 boards
-#
-
-TEXT_BASE = 0xfff00000
+++ /dev/null
-#
-# (C) Copyright 2001
-# Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# EVB64460 boards
-#
-
-TEXT_BASE = 0xfff00000
# MA 02110-1301 USA
#
-TEXT_BASE = 0x00600000
+CONFIG_SYS_TEXT_BASE = 0x00600000
KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg
# MA 02110-1301 USA
#
-TEXT_BASE = 0x00600000
+CONFIG_SYS_TEXT_BASE = 0x00600000
# Kirkwood Boot Image configuration file
KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg
# MA 02110-1301 USA
#
-TEXT_BASE = 0x00600000
+CONFIG_SYS_TEXT_BASE = 0x00600000
# Kirkwood Boot Image configuration file
KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg
# MA 02110-1301 USA
#
-TEXT_BASE = 0x00600000
+CONFIG_SYS_TEXT_BASE = 0x00600000
# Kirkwood Boot Image configuration file
KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg
# MA 02110-1301 USA
#
-TEXT_BASE = 0x00600000
+CONFIG_SYS_TEXT_BASE = 0x00600000
# Kirkwood Boot Image configuration file
KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg
+++ /dev/null
-#
-# (C) Copyright 2001
-# Stäubli Faverges - <www.staubli.com>
-# Pierre AUBERT p.aubert@staubli.com
-# U-Boot port on RPXClassic LF (CLLF_BW31) board
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xff000000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# RPXlite boards
-#
-
-TEXT_BASE = 0xfff00000
+++ /dev/null
-#
-# (C) Copyright 2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-# Sam Song, IEMC. SHU, samsongshu@yahoo.com.cn
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# RPXlite dw boards : lite_dw
-#
-
-TEXT_BASE = 0xff000000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# RedRock vision boards
-#
-
-TEXT_BASE = 0x40000000
+++ /dev/null
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Artis A-3000 boards
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
-TEXT_BASE = 0x00e00000
+CONFIG_SYS_TEXT_BASE = 0x00e00000
# include NPE ethernet driver
BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.a
-TEXT_BASE = 0x00e00000
+CONFIG_SYS_TEXT_BASE = 0x00e00000
# include NPE ethernet driver
BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.a
-TEXT_BASE = 0x00e00000
+CONFIG_SYS_TEXT_BASE = 0x00e00000
# include NPE ethernet driver
BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.a
-TEXT_BASE = 0x00e00000
+CONFIG_SYS_TEXT_BASE = 0x00e00000
# include NPE ethernet driver
BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.a
+++ /dev/null
-#
-# Copyright (C) 2004 Arabella Software Ltd.
-# Yuli Barcohen <yuli@arabellasw.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Analogue&Micro Adder boards family
-#
-TEXT_BASE = 0xFE000000
-TEXT_BASE = 0x21f00000
+CONFIG_SYS_TEXT_BASE = 0x21f00000
+++ /dev/null
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# alaska board
-#
-
-TEXT_BASE = 0xfff00000
-# TEXT_BASE = 0x00100000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
#
# we get text_base from board config header, so do not use this
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
#
-# (C) Copyright 2007
+# (C) Copyright 2007-2010
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# AMCC 405EZ Reference Platform (Acadia) board
#
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xFFF80000
-endif
-
ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DDEBUG
endif
-ifdef CONFIG_NAND_U_BOOT
+ifdef CONFIG_SYS_LDSCRIPT
+# need to strip off double quotes
+LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT))
+else ifdef CONFIG_NAND_U_BOOT
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
endif
#
-# (C) Copyright 2002-2007
+# (C) Copyright 2002-2010
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# MA 02111-1307 USA
#
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xFFFA0000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000
endif
-ifdef CONFIG_NAND_U_BOOT
+ifdef CONFIG_SYS_LDSCRIPT
+# need to strip off double quotes
+LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT))
+else ifdef CONFIG_NAND_U_BOOT
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
endif
# Applied Micro APM821XX Evaluation board.
#
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xFFFA0000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFFC0000
#
-# (C) Copyright 2008
+# (C) Copyright 2008-2010
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# AMCC 460EX/460GT Evaluation Board (Canyonlands) board
#
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xFFF80000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000
endif
-ifdef CONFIG_NAND_U_BOOT
+ifdef CONFIG_SYS_LDSCRIPT
+# need to strip off double quotes
+LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT))
+else ifdef CONFIG_NAND_U_BOOT
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
endif
# MA 02111-1307 USA
#
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0x07FD0000
-else
-TEXT_BASE = 0xFFFC0000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
# AMCC 440SPe Evaluation (Katmai) board
#
-TEXT_BASE = 0xFFFA0000
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
#
-# (C) Copyright 2007
+# (C) Copyright 2007-2010
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# MA 02111-1307 USA
#
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xFFFA0000
-endif
-
ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DDEBUG
endif
-ifdef CONFIG_NAND_U_BOOT
+ifdef CONFIG_SYS_LDSCRIPT
+# need to strip off double quotes
+LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT))
+else ifdef CONFIG_NAND_U_BOOT
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
endif
# MA 02111-1307 USA
#
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0x00001000
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0xFBD00000
-else
-TEXT_BASE = 0xFFFB0000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFFA0000
# AMCC 440GX Reference Platform (Ocotea) board
#
-#TEXT_BASE = 0xFFFE0000
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0x07FD0000
-else
-TEXT_BASE = 0xFFFC0000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
# AMCC 460SX Reference Platform (redwood) board
#
-ifeq ($(ramsym),1)
-TEXT_BASE = 0x07FD0000
-else
-TEXT_BASE = 0xfffb0000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
#
-# (C) Copyright 2002
+# (C) Copyright 2002-2010
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# AMCC 440EPx Reference Platform (Sequoia) board
#
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xFFF80000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000
endif
-ifdef CONFIG_NAND_U_BOOT
+ifdef CONFIG_SYS_LDSCRIPT
+# need to strip off double quotes
+LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT))
+else ifdef CONFIG_NAND_U_BOOT
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
endif
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFFC0000
# AMCC 440GX Reference Platform (Taishan) board
#
-#TEXT_BASE = 0xFFFE0000
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0x07FD0000
-else
-TEXT_BASE = 0xFFFC0000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFFC0000
# MA 02111-1307 USA
#
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0x00001000
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0xFBD00000
-else
-TEXT_BASE = 0xFFF80000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
#
ifeq ($(ramsym),1)
-TEXT_BASE = 0x07FD0000
+CONFIG_SYS_TEXT_BASE = 0x07FD0000
else
-TEXT_BASE = 0xfffb0000
+CONFIG_SYS_TEXT_BASE = 0xfffb0000
endif
PLATFORM_CPPFLAGS += -DCONFIG_440=1
# MA 02111-1307 USA
#
-# Start at bottom of RAM, but at an aliased address so that it looks
-# like it's not in RAM. This is a bit of voodoo to allow it to be
-# run from RAM instead of Flash.
-TEXT_BASE = 0x08000000
-
# Use board specific linker script
LDSCRIPT := $(SRCTREE)/board/amirix/ap1000/u-boot.lds
# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
# (mem base + reserved)
# For use with external or internal boots.
-TEXT_BASE = 0x83e80000
+CONFIG_SYS_TEXT_BASE = 0x83e80000
# Used with full SRAM boot.
# This is either with a GP system or a signed boot image.
# easiest, and safest way to go if you can.
-#TEXT_BASE = 0x40270000
+#CONFIG_SYS_TEXT_BASE = 0x40270000
# Handy to get symbols to debug ROM version.
-#TEXT_BASE = 0x0
-#TEXT_BASE = 0x08000000
+#CONFIG_SYS_TEXT_BASE = 0x0
+#CONFIG_SYS_TEXT_BASE = 0x08000000
#define SDRAM_BASE_ADDRESS 0x80008000
_TEXT_BASE:
- .word TEXT_BASE /* sdram load addr from config.mk */
+ .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
.globl lowlevel_init
lowlevel_init:
#
#address where u-boot will be relocated
-TEXT_BASE = 0xc0f80000
+CONFIG_SYS_TEXT_BASE = 0xc0f80000
# image should be loaded at 0x01000000
#
-TEXT_BASE = 0x01000000
+CONFIG_SYS_TEXT_BASE = 0x01000000
# image should be loaded at 0x01000000
#
-TEXT_BASE = 0x01000000
+CONFIG_SYS_TEXT_BASE = 0x01000000
# The Intel Assabet 1 bank of 32 MiB SDRAM
#
-TEXT_BASE = 0xc1f00000
+CONFIG_SYS_TEXT_BASE = 0xc1f00000
# MA 02111-1307 USA
#
-TEXT_BASE = $(CONFIG_TEXT_BASE)
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
+PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE)
# ATC boards
#
-# This should be equal to the CONFIG_SYS_FLASH_BASE define in config_atc.h
-# for the "final" configuration, with U-Boot in flash, or the address
-# in RAM where U-Boot is loaded at for debugging.
-#
-
-TEXT_BASE := 0xFF000000
-
-# RAM version
-#TEXT_BASE := 0x100000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
+PLATFORM_CPPFLAGS += -I$(TOPDIR)
-TEXT_BASE = 0x73000000
+CONFIG_SYS_TEXT_BASE = 0x73000000
-TEXT_BASE = 0x21f00000
+CONFIG_SYS_TEXT_BASE = 0x21f00000
-TEXT_BASE = 0x21f00000
+CONFIG_SYS_TEXT_BASE = 0x21f00000
-TEXT_BASE = 0x23f00000
+CONFIG_SYS_TEXT_BASE = 0x23f00000
-TEXT_BASE = 0x23f00000
+CONFIG_SYS_TEXT_BASE = 0x23f00000
-TEXT_BASE = 0x23f00000
+CONFIG_SYS_TEXT_BASE = 0x23f00000
-TEXT_BASE = 0x73f00000
+CONFIG_SYS_TEXT_BASE = 0x73f00000
-TEXT_BASE = 0x23f00000
+CONFIG_SYS_TEXT_BASE = 0x23f00000
-TEXT_BASE = 0x00000000
+CONFIG_SYS_TEXT_BASE = 0x00000000
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
PLATFORM_LDFLAGS += --gc-sections
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
PLATFORM_LDFLAGS += --gc-sections
-TEXT_BASE = 0x00000000
+CONFIG_SYS_TEXT_BASE = 0x00000000
LDSCRIPT = $(src)board/atmel/atstk1000/u-boot.lds
+++ /dev/null
-#
-# Copyright 2004, 2007 Freescale Semiconductor.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# atum8548 board
-# TEXT_BASE = 0xfff80000
-# TEXT_BASE = 0xfffff000
-ifndef TEXT_BASE
-TEXT_BASE = 0xfff80000
-endif
#
#
-sinclude $(SRCTREE)/board/xilinx/ppc405-generic/config.mk
+ifdef CONFIG_SYS_LDSCRIPT
+# need to strip off double quotes
+LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT))
+endif
#
#
-sinclude $(SRCTREE)/board/xilinx/ppc440-generic/config.mk
+ifdef CONFIG_SYS_LDSCRIPT
+# need to strip off double quotes
+LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT))
+endif
+++ /dev/null
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Barco Hydra/SCN boards
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
+++ /dev/null
-#
-# (C) Copyright 2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# BC3450 board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFC000000 boot low (standard configuration with room for max 64 MByte
-# Flash ROM)
-# 0x00100000 boot from RAM (for testing only)
-#
-
-ifndef TEXT_BASE
-## Standard: boot low
-TEXT_BASE = 0xFC000000
-## For testing: boot from RAM
-# TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf536-0.3
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf518-0.0
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf526-0.0
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf527-0.2
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf527-0.0
#define LCD_Y_RES 240 /* Vertical Resolution */
#define DMA_BUS_SIZE 16
-#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1 /* lq035q1 */
+#ifdef CONFIG_BF527_EZKIT_REV_2_1 /* lq035q1 */
#if !defined(CONFIG_LQ035Q1_USE_RGB888_8_BIT_PPI) && \
!defined(CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI)
#define PPI_PACK_EN 0x80
#define PPI_POLS_1 0x8000
-#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1
+#ifdef CONFIG_BF527_EZKIT_REV_2_1
static struct spi_slave *slave;
static int lq035q1_control(unsigned char reg, unsigned short value)
{
int video_init(void *dst)
{
-#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1
+#ifdef CONFIG_BF527_EZKIT_REV_2_1
lq035q1_control(LQ035_SHUT_CTL, LQ035_ON);
lq035q1_control(LQ035_DRIVER_OUTPUT_CTL, (CONFIG_LQ035Q1_LCD_MODE &
LQ035_DRIVER_OUTPUT_MASK) | LQ035_DRIVER_OUTPUT_DEFAULT);
Init_PPI();
EnablePPI();
-#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1
+#ifdef CONFIG_BF527_EZKIT_REV_2_1
EnableTIMER12();
#else
/* Frame sync 2 (VS) needs to start at least one PPI clk earlier */
DisableDMA();
DisableTIMER0();
DisableTIMER1();
-#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1
+#ifdef CONFIG_BF527_EZKIT_REV_2_1
lq035q1_control(LQ035_SHUT_CTL, LQ035_SHUT);
#endif
}
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf527-0.2
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf533-0.3
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf533-0.3
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf537-0.2
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf537-0.2
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf537-0.2
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf537-0.2
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf538-0.4
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf548-0.0
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf561-0.5
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf561-0.3
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf532-0.5
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf561-0.5
#
#
-# CU824 board
+# BMW board
#
-TEXT_BASE = 0xFFF00000
# NOTE: The flags below affect how the BCM570x driver is compiled
PLATFORM_CPPFLAGS += -DEMBEDDED -DBIG_ENDIAN_HOST -DINCLUDE_5701_AX_FIX=1\
- -DDBG=0 -DT3_JUMBO_RCV_RCB_ENTRY_COUNT=256\
- -DTEXT_BASE=$(TEXT_BASE)
+ -DDBG=0 -DT3_JUMBO_RCV_RCB_ENTRY_COUNT=256
+++ /dev/null
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TTTech C2MON boards
-#
-
-TEXT_BASE = 0x40000000
-TEXT_BASE = 0x23f00000
+CONFIG_SYS_TEXT_BASE = 0x23f00000
-TEXT_BASE = 0x23f00000
+CONFIG_SYS_TEXT_BASE = 0x23f00000
+++ /dev/null
-#
-# (C) Copyright 2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2003
-# Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# CANMB board
-#
-# allowed and functional TEXT_BASE values:
-#
-# 0xfe000000 low boot at 0x00000100 (default board setting)
-# 0x00100000 RAM load and test
-#
-
-TEXT_BASE = 0xFE000000
-#TEXT_BASE = 0x00100000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
# Cerf board with PXA250 cpu
#
#
-TEXT_BASE = 0xa3080000
+CONFIG_SYS_TEXT_BASE = 0xa3080000
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf527-0.0
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf533-0.3
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf537-0.2
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf537-0.2
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf548-0.0
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf561-0.3
-TEXT_BASE = 0x00f00000
+CONFIG_SYS_TEXT_BASE = 0x00f00000
-TEXT_BASE = 0x00f00000
+CONFIG_SYS_TEXT_BASE = 0x00f00000
+++ /dev/null
-#
-# (C) Copyright 2007
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xfc000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
-TEXT_BASE = 0x20F00000
+CONFIG_SYS_TEXT_BASE = 0x20F00000
## For testing: load at 0x20100000 and "go" at 0x201000A4
-#TEXT_BASE = 0x20100000
+#CONFIG_SYS_TEXT_BASE = 0x20100000
#
#
-# EPQ Board Configuration
+# CMI Board Configuration
#
-# Boot from flash at location 0x00000000
-TEXT_BASE = 0x02000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
+PLATFORM_CPPFLAGS += -I$(TOPDIR)
# MA 02111-1307 USA
#
-TEXT_BASE = 0xffe00000
+CONFIG_SYS_TEXT_BASE = 0xffe00000
8xx SMC ports, and set CONFIG_8xx_CONS_{SMC1,SMC2,NONE} accordingly
(NONE means use Cogent motherboard serial port A).
-Then edit the file "cogent/config.mk". Firstly, set TEXT_BASE to be
+Then edit the file "cogent/config.mk". Firstly, set CONFIG_SYS_TEXT_BASE to be
the base address of the EPROM for the CPU module. This should be the
same as the value selected for CONFIG_SYS_MONITOR_BASE in
"include/config_cogent_*.h" (in fact, I have made this automatic via
-the -DTEXT_BASE=... option in CPPFLAGS).
+the -CONFIG_SYS_TEXT_BASE=... option in CPPFLAGS).
Finally, set the values of the make variables $(CMA_MB) and $(CMA_IOMS).
# Cogent Modular Architecture
#
-# Boot EPROM location
-TEXT_BASE = 0xfff00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
+PLATFORM_CPPFLAGS += -I$(TOPDIR)
LDSCRIPT := $(SRCTREE)/board/cogent/u-boot.lds
-TEXT_BASE = 0xa1000000
+CONFIG_SYS_TEXT_BASE = 0xa1000000
# CPC45 board
#
-
-ifeq ($(CONFIG_BOOT_ROM),y)
- TEXT_BASE := 0xFFF00000
- PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM
-else
- TEXT_BASE := 0xFFF00000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
+PLATFORM_CPPFLAGS += -I$(TOPDIR)
# CPU86 boards
#
-# This should be equal to the CONFIG_SYS_FLASH_BASE define in config_CPU86.h
-# for the "final" configuration, with U-Boot in flash, or the address
-# in RAM where U-Boot is loaded at for debugging.
-#
-
-ifeq ($(CONFIG_BOOT_ROM),y)
- TEXT_BASE := 0xFF800000
- PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM
-else
- TEXT_BASE := 0xFF000000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
+PLATFORM_CPPFLAGS += -I$(TOPDIR)
# CPU87 board
#
-# This should be equal to the CONFIG_SYS_FLASH_BASE define in configs/cpu87.h
-# for the "final" configuration, with U-Boot in flash, or the address
-# in RAM where U-Boot is loaded at for debugging.
-#
-
-ifeq ($(CONFIG_BOOT_ROM),y)
- TEXT_BASE := 0xFF800000
- PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM
-else
- TEXT_BASE := 0xFF000000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
+PLATFORM_CPPFLAGS += -I$(TOPDIR)
-TEXT_BASE = 0xa0f80000
-#TEXT_BASE = 0
+CONFIG_SYS_TEXT_BASE = 0xa0f80000
+#CONFIG_SYS_TEXT_BASE = 0
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-# Note: I make an "image" from U-Boot itself, which prefixes 0x40 bytes of
-# header info, hence start address is thus shifted.
-TEXT_BASE = 0xFFFD0040
#
# This is the address where U-Boot lives in flash:
-#TEXT_BASE = 0
+#CONFIG_SYS_TEXT_BASE = 0
# FIXME: armboot does only work correctly when being compiled
# for the addresses _after_ relocation to RAM!! Otherwhise the
# .bss segment is assumed in flash...
-TEXT_BASE = 0xa1fe0000
+CONFIG_SYS_TEXT_BASE = 0xa1fe0000
.endm
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
/*
#
LDFLAGS += $(LINKER_UNDEFS)
-
-TEXT_BASE := 0xFFFC0000
-#TEXT_BASE := 0x00100000
-
-PLATFORM_RELFLAGS := $(PLATFORM_RELFLAGS)
#
LDFLAGS += $(LINKER_UNDEFS)
-
-TEXT_BASE := 0xFFFC0000
-#TEXT_BASE := 0x00100000
-
-PLATFORM_RELFLAGS := $(PLATFORM_RELFLAGS)
-TEXT_BASE = 0x23fc0000
+CONFIG_SYS_TEXT_BASE = 0x23fc0000
+++ /dev/null
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# CU824 board
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
# MA 02111-1307 USA
#
-TEXT_BASE = 0x0C100000
+CONFIG_SYS_TEXT_BASE = 0x0C100000
PLATFORM_CPPFLAGS += -Uarm
+++ /dev/null
-#
-# (C) Copyright 2000, 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-# Reserve 256 kB for Monitor
-#TEXT_BASE = 0xFFFC0000
-
-# Reserve 320 kB for Monitor
-TEXT_BASE = 0xFFFB0000
+++ /dev/null
-#
-# (C) Copyright 2009 Wolfgang Denk <wd@denx.de>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFF00000
-TEXT_BASE = 0xa0000000
+CONFIG_SYS_TEXT_BASE = 0xa0000000
# PLATFORM_CPPFLAGS += -DDEBUG
#Provide at least 16MB spacing between us and the Linux Kernel image
-TEXT_BASE = 0xC1080000
+CONFIG_SYS_TEXT_BASE = 0xC1080000
#
#Provide at least 16MB spacing between us and the Linux Kernel image
-TEXT_BASE = 0x81080000
+CONFIG_SYS_TEXT_BASE = 0x81080000
#
#Provide at least 16MB spacing between us and the Linux Kernel image
-TEXT_BASE = 0x81080000
+CONFIG_SYS_TEXT_BASE = 0x81080000
#
#Provide at least 16MB spacing between us and the Linux Kernel image
-TEXT_BASE = 0x81080000
+CONFIG_SYS_TEXT_BASE = 0x81080000
#Provide at least 16MB spacing between us and the Linux Kernel image
-TEXT_BASE = 0x81080000
+CONFIG_SYS_TEXT_BASE = 0x81080000
#
#Provide at least 16MB spacing between us and the Linux Kernel image
-TEXT_BASE = 0x81080000
+CONFIG_SYS_TEXT_BASE = 0x81080000
#
#Provide at least 16MB spacing between us and the Linux Kernel image
-TEXT_BASE = 0x81080000
+CONFIG_SYS_TEXT_BASE = 0x81080000
/* Set serial number from UID chip */
if (i2c_read(CONFIG_SYS_UID_ADDR, 0, 1, buf, 8)) {
printf("\nUID @ 0x%02x read FAILED!!!\n", CONFIG_SYS_UID_ADDR);
- forceenv("serial#", "FAILED");
+ setenv("serial#", "FAILED");
} else {
if (buf[0] != 0x70) {
/* Device Family Code */
printf("\nUID @ 0x%02x read FAILED!!!\n", CONFIG_SYS_UID_ADDR);
- forceenv("serial#", "FAILED");
+ setenv("serial#", "FAILED");
}
}
/* Now check CRC */
if (tmp[0] != 0) {
printf("\nUID @ 0x%02x - BAD CRC!!!\n", CONFIG_SYS_UID_ADDR);
- forceenv("serial#", "FAILED");
+ setenv("serial#", "FAILED");
} else {
/* CRC OK, set "serial" env variable */
sprintf((char *)&tmp[0], "%02x%02x%02x%02x%02x%02x",
buf[6], buf[5], buf[4], buf[3], buf[2], buf[1]);
- forceenv("serial#", (char *)&tmp[0]);
+ setenv("serial#", (char *)&tmp[0]);
}
return(0);
#
# we load ourself to 8400'0000 to provide at least 32MB spacing
# between us and the Integrity kernel image
-TEXT_BASE = 0x84000000
+CONFIG_SYS_TEXT_BASE = 0x84000000
#
#Provide at least 16MB spacing between us and the Linux Kernel image
-TEXT_BASE = 0x81080000
+CONFIG_SYS_TEXT_BASE = 0x81080000
NOTE! When you switch between the two boot flashes, the
base addresses will be swapped.
-Have this in mind when you compile u-boot. TEXT_BASE has
+Have this in mind when you compile u-boot. CONFIG_SYS_TEXT_BASE has
to match the address where u-boot is located when you
actually launch.
#
# ROM version
-TEXT_BASE = 0xbfc00000
+CONFIG_SYS_TEXT_BASE = 0xbfc00000
# RAM version
-#TEXT_BASE = 0x80100000
+#CONFIG_SYS_TEXT_BASE = 0x80100000
-TEXT_BASE = 0x83008000
+CONFIG_SYS_TEXT_BASE = 0x83008000
+++ /dev/null
-#
-# Author: Grzegorz Bernacki, Semihalf, gjb@semihalf.com
-#
-
-#
-# digsyMTC board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFF00000 boot high (standard configuration)
-# 0xFE000000 boot low
-# 0x00100000 boot from RAM (for testing only)
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-## For testing: boot from RAM
-# TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
# we load ourself to c1f8'0000, the upper 1 MB of the first (only) bank
#
-TEXT_BASE = 0xc1f80000
+CONFIG_SYS_TEXT_BASE = 0xc1f80000
# MA 02111-1307 USA
#
-TEXT_BASE = 0x06000000
+CONFIG_SYS_TEXT_BASE = 0x06000000
CFLAGS_common/dlmalloc.o += -Wa,--no-warn -fno-strict-aliasing
PLATFORM_RELFLAGS += -fvisibility=hidden
PLATFORM_CPPFLAGS += -fno-dwarf2-cfi-asm
+++ /dev/null
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Sandpoint boards
-#
-
-#TEXT_BASE = 0x00090000
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
PLATFORM_LDFLAGS += --gc-sections
-TEXT_BASE = 0x00000000
+CONFIG_SYS_TEXT_BASE = 0x00000000
LDSCRIPT = $(src)board/earthlcd/favr-32-ezkit/u-boot.lds
LDSCRIPT := $(SRCTREE)/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
ifdef CONFIG_EDB9301
-TEXT_BASE = 0x05700000
+CONFIG_SYS_TEXT_BASE = 0x05700000
endif
ifdef CONFIG_EDB9302
-TEXT_BASE = 0x05700000
+CONFIG_SYS_TEXT_BASE = 0x05700000
endif
ifdef CONFIG_EDB9302A
-TEXT_BASE = 0xc5700000
+CONFIG_SYS_TEXT_BASE = 0xc5700000
endif
ifdef CONFIG_EDB9307
-TEXT_BASE = 0x01f00000
+CONFIG_SYS_TEXT_BASE = 0x01f00000
endif
ifdef CONFIG_EDB9307A
-TEXT_BASE = 0xc1f00000
+CONFIG_SYS_TEXT_BASE = 0xc1f00000
endif
ifdef CONFIG_EDB9312
-TEXT_BASE = 0x01f00000
+CONFIG_SYS_TEXT_BASE = 0x01f00000
endif
ifdef CONFIG_EDB9315
-TEXT_BASE = 0x01f00000
+CONFIG_SYS_TEXT_BASE = 0x01f00000
endif
ifdef CONFIG_EDB9315A
-TEXT_BASE = 0xc1f00000
+CONFIG_SYS_TEXT_BASE = 0xc1f00000
endif
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
+++ /dev/null
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MHPC boards
-#
-
-TEXT_BASE = 0xfe000000
-/*TEXT_BASE = 0x00200000 */
+++ /dev/null
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2003
-# Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TOP5200 board, on optional MINI5200 and EVAL5200 boards
-#
-# allowed and functional TEXT_BASE values:
-#
-# 0xff000000 low boot at 0x00000100 (default board setting)
-# 0xfff00000 high boot at 0xfff00100 (board needs modification)
-# 0x00100000 RAM load and test
-#
-
-TEXT_BASE = 0xff000000
-#TEXT_BASE = 0xfff00000
-#TEXT_BASE = 0x00100000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+++ /dev/null
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TOP860 board
-#
-
-TEXT_BASE = 0x80000000
# MA 02111-1307 USA
#
-TEXT_BASE = 0xc0f80000
+CONFIG_SYS_TEXT_BASE = 0xc0f80000
+++ /dev/null
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# Modified by, Yuli Barcohen, Arabella Software Ltd. <yuli@arabellasw.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# EP82xx series boards by Embedded Planet
-#
-
-TEXT_BASE = 0xFFF00000
# EP8260 boards
#
-# This should be equal to the CONFIG_SYS_FLASH_BASE define in config_ep8260.h
-# for the "final" configuration, with U-Boot in flash, or the address
-# in RAM where U-Boot is loaded at for debugging.
-#
-#TEXT_BASE = 0x00100000
-#TEXT_BASE = 0xFF000000
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
+PLATFORM_CPPFLAGS += -I$(TOPDIR)
+++ /dev/null
-#
-# (C) Copyright 2001-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-# EP82xxM series boards by Embedded Planet
-
-TEXT_BASE = 0xFFF00000
+++ /dev/null
-#
-# Copyright (C) 2005 Arabella Software Ltd.
-# Yuli Barcohen <yuli@arabellasw.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Embedded Planet EP88x boards
-#
-TEXT_BASE = 0xFC000000
+++ /dev/null
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFF80000
-TEXT_BASE = 0xFFFC0000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-# FLASH:
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0xFFFD0000
-
-# SDRAM:
-#TEXT_BASE = 0x00FE0000
+++ /dev/null
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ABG405 boards
-#
-
-TEXT_BASE = 0xFFF80000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-TEXT_BASE = 0xFFFA0000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ASH405 boards
-#
-
-TEXT_BASE = 0xFFFC0000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-TEXT_BASE = 0xFFFC0000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-TEXT_BASE = 0xFFFC8000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd CPCI2DP board
-#
-
-TEXT_BASE = 0xFFFC0000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFFC0000
+++ /dev/null
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# IceCube board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFF00000 boot high (standard configuration)
-# 0xFF000000 boot low for 16 MiB boards
-# 0xFF800000 boot low for 8 MiB boards
-# 0x00100000 boot from RAM (for testing only)
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-## For testing: boot from RAM
-# TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+++ /dev/null
-#
-# (C) Copyright 2004
-# Reinhard Arlt <reinhard.arlt@esd-electronics.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# cpci750 board
-#
-
-TEXT_BASE = 0xfff00000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd CPCIISER4 boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-#TEXT_BASE = 0xFFFD0000
-TEXT_BASE = 0xFFFC0000
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
-TEXT_BASE = 0xFFFC0000
# Use board specific linker script
LDSCRIPT := $(SRCTREE)/board/esd/dasa_sim/u-boot.lds
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFFD0000
+++ /dev/null
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd CPCIISER4 boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0xFFFD0000
-#TEXT_BASE = 0xFFFC0000
#
-# (C) Copyright 2002
+# (C) Copyright 2002-2010
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xFFFA0000
-endif
PLATFORM_CPPFLAGS += -DCONFIG_440=1
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd VOH405 boards
-#
-
-#TEXT_BASE = 0xFFF00000
-TEXT_BASE = 0xFFF80000
-#TEXT_BASE = 0xFFFC0000
-#TEXT_BASE = 0x00FC0000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd HUB405 boards
-#
-
-TEXT_BASE = 0xFFFC0000
+++ /dev/null
-#
-# (C) Copyright 2009 Wolfgang Denk <wd@denx.de>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFF00000
+++ /dev/null
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# IceCube board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFF00000 boot high (standard configuration)
-# 0xFF000000 boot low for 16 MiB boards
-# 0xFF800000 boot low for 8 MiB boards
-# 0x00100000 boot from RAM (for testing only)
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-## For testing: boot from RAM
-# TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
-TEXT_BASE = 0x21f00000
+CONFIG_SYS_TEXT_BASE = 0x21f00000
+++ /dev/null
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0xFFFD0000
-TEXT_BASE = 0x23f00000
+CONFIG_SYS_TEXT_BASE = 0x23f00000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0xFFFD0000
+++ /dev/null
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# IceCube board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFF00000 boot high (standard configuration)
-# 0xFF000000 boot low for 16 MiB boards
-# 0xFF800000 boot low for 8 MiB boards
-# 0x00100000 boot from RAM (for testing only)
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-## For testing: boot from RAM
-# TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd PLU405 boards
-#
-
-TEXT_BASE = 0xFFF80000
+++ /dev/null
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFF80000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-TEXT_BASE = 0xFFFC0000
#
-# (C) Copyright 2002
+# (C) Copyright 2002-2010
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xFFF90000
-endif
PLATFORM_CPPFLAGS += -DCONFIG_440=1
# MA 02111-1307 USA
#
-TEXT_BASE = 0xffc00000
+CONFIG_SYS_TEXT_BASE = 0xffc00000
+++ /dev/null
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# VME8349E
-#
-
-TEXT_BASE = 0xFFF00000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd VOH405 boards
-#
-
-TEXT_BASE = 0xFFF80000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-TEXT_BASE = 0xFFFC8000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ASH405 boards
-#
-
-TEXT_BASE = 0xFFFC0000
#
# board/espt/config.mk
#
-# TEXT_BASE refers to image _after_ relocation.
+# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation.
#
# NOTE: Must match value used in u-boot.lds (in this directory).
#
-TEXT_BASE = 0x8FFC0000
+CONFIG_SYS_TEXT_BASE = 0x8FFC0000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TQM8xxL boards
-#
-
-TEXT_BASE = 0x40000000
+++ /dev/null
-#
-# (C) Copyright 2000, 2001
-# Sangmoon, Etin Systems, dogoil@etinsys.com.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Debris boards
-#
-
-#TEXT_BASE = 0x00090000
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
+++ /dev/null
-#
-# (C) Copyright 2005
-# Sangmoon, Etin Systems, dogoil@etinsys.com.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# KVME080 board
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# ETX_094 Boards
-#
-
-TEXT_BASE = 0x40000000
-TEXT_BASE = 0x21f00000
+CONFIG_SYS_TEXT_BASE = 0x21f00000
-TEXT_BASE = 0x21F00000
+CONFIG_SYS_TEXT_BASE = 0x21F00000
# MA 02111-1307 USA
#
-TEXT_BASE = 0x007d0000
+CONFIG_SYS_TEXT_BASE = 0x007d0000
+++ /dev/null
-#
-# (C) Copyright 2001
-# Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# EVB64260 boards
-#
-
-TEXT_BASE = 0xfff00000
+++ /dev/null
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# Modified by, Yuli Barcohen, Arabella Software Ltd., yuli@arabellasw.com
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Motorola old MPC821/860ADS, MPC8xxFADS, new MPC866ADS, and
-# MPC885ADS boards
-#
-
-TEXT_BASE = 0xFE000000
-PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/fads
-HOSTCFLAGS += -I$(TOPDIR)/board/fads
-HOST_ENVIRO_CFLAGS += -I$(TOPDIR)/board/fads
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 KB for monitor */
#ifdef CONFIG_BZIP2
#define CONFIG_SYS_OR1_PRELIM 0xFFFF8110 /* 64Kbyte address space */
#define CONFIG_SYS_BR1_PRELIM ((BCSR_ADDR) | BR_V)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/* values according to the manual */
#define BCSR0 ((uint) (BCSR_ADDR + 0x00))
#
# download area is 1200'0000
-TEXT_BASE = 0x13f80000
+CONFIG_SYS_TEXT_BASE = 0x13f80000
+++ /dev/null
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TQM8xxL boards
-#
-
-TEXT_BASE = 0x40000000
#
# P4080DS board
#
-ifndef TEXT_BASE
-TEXT_BASE = 0xeff80000
-endif
RESET_VECTOR_ADDRESS = 0xeffffffc
# MA 02111-1307 USA
#
-TEXT_BASE = 0
+CONFIG_SYS_TEXT_BASE = 0
sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
+PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE)
# MA 02111-1307 USA
#
-/*TEXT_BASE = 0xFFC00000*/
+/*CONFIG_SYS_TEXT_BASE = 0xFFC00000*/
sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
\ No newline at end of file
+PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE)
# MA 02111-1307 USA
#
-TEXT_BASE = 0xffe00000
+CONFIG_SYS_TEXT_BASE = 0xffe00000
# MA 02111-1307 USA
#
-TEXT_BASE = 0xFF800000
+CONFIG_SYS_TEXT_BASE = 0xFF800000
# MA 02111-1307 USA
#
-TEXT_BASE = 0xffe00000
+CONFIG_SYS_TEXT_BASE = 0xffe00000
# MA 02111-1307 USA
#
-TEXT_BASE = 0xffe00000
+CONFIG_SYS_TEXT_BASE = 0xffe00000
# MA 02111-1307 USA
#
-TEXT_BASE = 0xffe00000
+CONFIG_SYS_TEXT_BASE = 0xffe00000
# MA 02111-1307 USA
#
-TEXT_BASE = 0xffe00000
+CONFIG_SYS_TEXT_BASE = 0xffe00000
# MA 02111-1307 USA
#
-TEXT_BASE = 0xFFE00000
+CONFIG_SYS_TEXT_BASE = 0xFFE00000
# MA 02111-1307 USA
#
-TEXT_BASE = 0
+CONFIG_SYS_TEXT_BASE = 0
# MA 02111-1307 USA
#
-TEXT_BASE = 0
+CONFIG_SYS_TEXT_BASE = 0
# MA 02111-1307 USA
#
-TEXT_BASE = 0
+CONFIG_SYS_TEXT_BASE = 0
sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
+PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE)
sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
+PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE)
# MA 02111-1307 USA
#
-TEXT_BASE = 0xFF800000
+CONFIG_SYS_TEXT_BASE = 0xFF800000
# MA 02111-1307 USA
#
-TEXT_BASE = 0xFF800000
+CONFIG_SYS_TEXT_BASE = 0xFF800000
+++ /dev/null
-#
-# (C) Copyright 2007 DENX Software Engineering
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFF00000
#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_DIU_EN | \
CLOCK_SCCR2_I2C_EN | \
CLOCK_SCCR2_MEM_EN | \
- CLOCK_SCCR2_SPDIF_EN)
+ CLOCK_SCCR2_SPDIF_EN | \
+ CLOCK_SCCR2_USB1_EN | \
+ CLOCK_SCCR2_USB2_EN)
void __mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip);
# MA 02111-1307 USA
#
-# Flash address
-TEXT_BASE = 0xFF000000
-# RAM address
-#TEXT_BASE = 0x00400000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -maltivec -mabi=altivec -msoft-float
+PLATFORM_CPPFLAGS += -maltivec -mabi=altivec -msoft-float
+++ /dev/null
-#
-# (C) Copyright 2001-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# Modified by, Stuart Hughes, Lineo Inc, stuarth@lineo.com
-#
-# Modified by, Yuli Barcohen, Arabella Software Ltd., yuli@arabellasw.com
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MPC8260ADS, MPC8266ADS, and PQ2FADS-ZU/VR boards
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-endif
+++ /dev/null
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# Modified by, Stuart Hughes, Lineo Inc, stuarth@lineo.com
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8260ads board
-#
-
-TEXT_BASE = 0xfe000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+++ /dev/null
-TEXT_BASE = 0xFE000000
+++ /dev/null
-ifndef NAND_SPL
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-endif
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xFE000000
-endif
+++ /dev/null
-ifndef NAND_SPL
-ifeq ($(CONFIG_MK_NAND), y)
-TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE)
-endif
-endif
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xFE000000
-endif
+++ /dev/null
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MPC8323ERDB
-#
-
-TEXT_BASE = 0xFE000000
+++ /dev/null
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MPC832XEMDS
-#
-
-TEXT_BASE = 0xFE000000
};
#endif
-DECLARE_GLOBAL_DATA_PTR;
-
-
void pci_init_board(void)
#ifdef CONFIG_PCISLAVE
{
/* initialize the PCA9555PW IO expander on the PIB board */
pib_init();
-#if defined(PCI_66M)
+#if defined(CONFIG_PCI_66M)
clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
printf("PCI clock is 66MHz\n");
-#elif defined(PCI_33M)
+#elif defined(CONFIG_PCI_33M)
clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2 |
OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 | OCCR_PCICR;
printf("PCI clock is 33MHz\n");
+++ /dev/null
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MPC8349EMDS
-#
-
-TEXT_BASE = 0xFE000000
+++ /dev/null
-#
-# Copyright (C) Freescale Semiconductor, Inc. 2006.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MPC8349E-mITX and MPC8349E-mITX-GP
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xFEF00000
-endif
+++ /dev/null
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MPC8360EMDS
-#
-
-TEXT_BASE = 0xFE000000
/* initialize the PCA9555PW IO expander on the PIB board */
pib_init();
-#if defined(PCI_66M)
+#if defined(CONFIG_PCI_66M)
clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
printf("PCI clock is 66MHz\n");
-#elif defined(PCI_33M)
+#elif defined(CONFIG_PCI_33M)
clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2 |
OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 | OCCR_PCICR;
printf("PCI clock is 33MHz\n");
+++ /dev/null
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MPC8360ERDK
-#
-
-TEXT_BASE = 0xFF800000
volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
struct pci_region *reg[] = { pci_regions, };
-#if defined(PCI_33M)
+#if defined(CONFIG_PCI_33M)
clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2 |
OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 | OCCR_PCICR;
printf("PCI clock is 33MHz\n");
+++ /dev/null
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MPC837xEMDS
-#
-
-TEXT_BASE = 0xFE000000
out_be32(&pcie_law[1].bar, CONFIG_SYS_PCIE2_BASE & LAWBAR_BAR);
out_be32(&pcie_law[1].ar, LBLAWAR_EN | LBLAWAR_512MB);
- mpc83xx_pcie_init(pex2 ? 1 : 2, pcie_reg, 0);
+ mpc83xx_pcie_init(pex2 ? 1 : 2, pcie_reg);
}
void ft_pcie_fixup(void *blob, bd_t *bd)
+++ /dev/null
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MPC837xERDB
-#
-
-TEXT_BASE = 0xFE000000
# mpc8536ds board
#
ifndef NAND_SPL
-ifeq ($(CONFIG_MK_NAND), y)
-TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE)
+ifeq ($(CONFIG_NAND), y)
LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
endif
endif
-ifeq ($(CONFIG_MK_SDCARD), y)
-TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE)
+ifeq ($(CONFIG_SDCARD), y)
RESET_VECTOR_ADDRESS = 0xf8fffffc
endif
-ifeq ($(CONFIG_MK_SPIFLASH), y)
-TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE)
+ifeq ($(CONFIG_SPIFLASH), y)
RESET_VECTOR_ADDRESS = 0xf8fffffc
endif
-ifndef TEXT_BASE
-TEXT_BASE = 0xeff80000
-endif
-
ifndef RESET_VECTOR_ADDRESS
RESET_VECTOR_ADDRESS = 0xeffffffc
endif
+++ /dev/null
-# Copyright 2004 Freescale Semiconductor.
-# Modified by Xianghua Xiao, X.Xiao@motorola.com
-# (C) Copyright 2002,Motorola Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8540ads board
-# default CCARBAR is at 0xff700000
-# assume U-Boot is less than 0.5MB
-#
-TEXT_BASE = 0xfff80000
+++ /dev/null
-#
-# Copyright 2004 Freescale Semiconductor.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8541cds board
-#
-TEXT_BASE = 0xfff80000
+++ /dev/null
-#
-# Copyright 2007 Freescale Semiconductor, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8544ds board
-#
-ifndef TEXT_BASE
-TEXT_BASE = 0xfff80000
-endif
+++ /dev/null
-#
-# Copyright 2004, 2007 Freescale Semiconductor.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8548cds board
-#
-ifndef TEXT_BASE
-TEXT_BASE = 0xfff80000
-endif
+++ /dev/null
-#
-# Copyright 2004 Freescale Semiconductor.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8555cds board
-#
-TEXT_BASE = 0xfff80000
+++ /dev/null
-# Copyright 2004 Freescale Semiconductor.
-# Modified by Xianghua Xiao, X.Xiao@motorola.com
-# (C) Copyright 2002,2003 Motorola Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8560ads board
-# default CCARBAR is at 0xff700000
-# assume U-Boot is less than 0.5MB
-#
-TEXT_BASE = 0xfff80000
+++ /dev/null
-#
-# Copyright 2007 Freescale Semiconductor.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8568mds board
-#
-TEXT_BASE = 0xfff80000
# mpc8569mds board
#
ifndef NAND_SPL
-ifeq ($(CONFIG_MK_NAND), y)
-TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE)
+ifeq ($(CONFIG_NAND), y)
LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
endif
endif
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xfff80000
-endif
#
# mpc8572ds board
#
-ifndef TEXT_BASE
-TEXT_BASE = 0xeff80000
-endif
-
RESET_VECTOR_ADDRESS = 0xeffffffc
+++ /dev/null
-# Copyright 2007 Freescale Semiconductor.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xfff00000
+++ /dev/null
-# Copyright 2004 Freescale Semiconductor.
-# Modified by Jeff Brown
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8641hpcn board
-# default CCSRBAR is at 0xff700000
-# assume U-Boot is less than 0.5MB
-#
-TEXT_BASE = 0xeff00000
-TEXT_BASE = 0x87f00000
+CONFIG_SYS_TEXT_BASE = 0x87f00000
LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds
ifdef CONFIG_NAND_SPL
-TEXT_BASE = 0x87ec0000
+CONFIG_SYS_TEXT_BASE = 0x87ec0000
else
-TEXT_BASE = 0x87f00000
+CONFIG_SYS_TEXT_BASE = 0x87f00000
endif
#
LDSCRIPT = $(CPUDIR)/$(SOC)/u-boot.lds
-TEXT_BASE = 0x97800000
+CONFIG_SYS_TEXT_BASE = 0x97800000
IMX_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/imximage.cfg
ALL += $(obj)u-boot.imx
# any later version.
#
-ifndef TEXT_BASE
-TEXT_BASE = 0xeff80000
-endif
-
RESET_VECTOR_ADDRESS = 0xeffffffc
#
ifndef NAND_SPL
-ifeq ($(CONFIG_MK_NAND), y)
-TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE)
+ifeq ($(CONFIG_NAND), y)
LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
endif
endif
-ifeq ($(CONFIG_MK_SDCARD), y)
-TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE)
+ifeq ($(CONFIG_SDCARD), y)
RESET_VECTOR_ADDRESS = 0xf8fffffc
endif
-ifeq ($(CONFIG_MK_SPIFLASH), y)
-TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE)
+ifeq ($(CONFIG_SPIFLASH), y)
RESET_VECTOR_ADDRESS = 0xf8fffffc
endif
-ifndef TEXT_BASE
-TEXT_BASE = 0xeff80000
-endif
-
ifndef RESET_VECTOR_ADDRESS
RESET_VECTOR_ADDRESS = 0xeffffffc
endif
#
# p2020ds board
#
-ifndef TEXT_BASE
-TEXT_BASE = 0xeff80000
-endif
-
RESET_VECTOR_ADDRESS = 0xeffffffc
+++ /dev/null
-# (C) Copyright 2004
-# Elmeg Communications Systems GmbH, Juergen Selent (j.selent@elmeg.de)
-#
-# Support for the Elmeg VoVPN Gateway Module
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-
-TEXT_BASE = 0xfff00000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd PLU405 boards
-#
-
-TEXT_BASE = 0xFFFC0000
-#TEXT_BASE = 0x00FC0000
#
# U-BOOT IN FLASH
-TEXT_BASE = 0x00000000
+CONFIG_SYS_TEXT_BASE = 0x00000000
# U-BOOT IN RAM or SDRAM with -nosram flag set when starting GRMON
-#TEXT_BASE = 0x40000000
+#CONFIG_SYS_TEXT_BASE = 0x40000000
# U-BOOT IN SDRAM
-#TEXT_BASE = 0x60000000
+#CONFIG_SYS_TEXT_BASE = 0x60000000
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) \
+ -I$(TOPDIR)/board
#
# U-BOOT IN FLASH
-TEXT_BASE = 0x00000000
+CONFIG_SYS_TEXT_BASE = 0x00000000
# U-BOOT IN SDRAM
-#TEXT_BASE = 0x40000000
+#CONFIG_SYS_TEXT_BASE = 0x40000000
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) \
+ -I$(TOPDIR)/board
#
# U-BOOT IN FLASH
-TEXT_BASE = 0x00000000
+CONFIG_SYS_TEXT_BASE = 0x00000000
# U-BOOT IN RAM
-#TEXT_BASE = 0x40000000
+#CONFIG_SYS_TEXT_BASE = 0x40000000
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) \
+ -I$(TOPDIR)/board
#
# U-BOOT IN FLASH
-TEXT_BASE = 0x00000000
+CONFIG_SYS_TEXT_BASE = 0x00000000
# U-BOOT IN RAM
-#TEXT_BASE = 0x40000000
+#CONFIG_SYS_TEXT_BASE = 0x40000000
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) \
+ -I$(TOPDIR)/board
#
# RUN U-BOOT FROM PROM
-TEXT_BASE = 0x00000000
+CONFIG_SYS_TEXT_BASE = 0x00000000
# RUN U-BOOT FROM RAM
-#TEXT_BASE = 0x40000000
+#CONFIG_SYS_TEXT_BASE = 0x40000000
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) \
+ -I$(TOPDIR)/board
+++ /dev/null
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# galaxy5200 board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFF00000 boot high (standard configuration)
-# 0xFE000000 boot low
-# 0x00100000 boot from RAM (for testing only) does not work
-#
-
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
-
-ifdef CONFIG_galaxy5200_LOWBOOT
-TEXT_BASE = 0xFE000000
-endif
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
# bootp;tftp;bootm, repeat, etc.,.
#
-TEXT_BASE = 0xc8f00000
+CONFIG_SYS_TEXT_BASE = 0xc8f00000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFFC0000
# G&D 440EP/GR ETX-Module
#
-#TEXT_BASE = 0x00001000
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0xFBD00000
-else
-TEXT_BASE = 0xFFF80000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
#
-# (C) Copyright 2008
+# (C) Copyright 2008-2010
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# G&D CompactCenter
#
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xFFFA0000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFFC0000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# FLASH base address for GEN860T board
-#
-
-TEXT_BASE = 0x40000000
# MA 02111-1307 USA
#
-TEXT_BASE = 0x00000000
OBJCFLAGS = --set-section-flags=.ppcenv=contents,alloc,load,data
#
ifeq ($(TBASE),0)
-TEXT_BASE = 0
+CONFIG_SYS_TEXT_BASE = 0
else
ifeq ($(TBASE),1)
-TEXT_BASE = 0xbfc10070
+CONFIG_SYS_TEXT_BASE = 0xbfc10070
else
ifeq ($(TBASE),2)
-TEXT_BASE = 0xbfc30070
+CONFIG_SYS_TEXT_BASE = 0xbfc30070
else
## Only to make ordinary make work
-TEXT_BASE = 0x90000000
+CONFIG_SYS_TEXT_BASE = 0x90000000
endif
endif
endif
+++ /dev/null
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MBX8xx boards
-#
-
-TEXT_BASE = 0x40000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Multidata HERMES-PRO ISDN Routers
-#
-
-TEXT_BASE = 0xFE000000
+++ /dev/null
-#
-# (C) Copyright 2000-2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Hidden Dragon boards
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
# HYMOD boards
#
-TEXT_BASE = 0x40000000
-
PLATFORM_CPPFLAGS += -I$(TOPDIR)
OBJCFLAGS = --remove-section=.ppcenv
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf561-0.5
+++ /dev/null
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# IceCube board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFF00000 boot high (standard configuration)
-# 0xFF000000 boot low for 16 MiB boards
-# 0xFF800000 boot low for 8 MiB boards
-# 0x00100000 boot from RAM (for testing only)
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-## For testing: boot from RAM
-# TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
# ICU862 boards
#
-TEXT_BASE = 0x40F00000
OBJCFLAGS = --set-section-flags=.ppcenv=contents,alloc,load,data
# MA 02111-1307 USA
#
-TEXT_BASE = 0xff800000
+CONFIG_SYS_TEXT_BASE = 0xff800000
#
# IDS 8247 Board
#
-
-# This should be equal to the CONFIG_SYS_FLASH_BASE define in config_IDS8247.h
-# for the "final" configuration, with U-Boot in flash, or the address
-# in RAM where U-Boot is loaded at for debugging.
-#
-TEXT_BASE = 0xfff00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
+PLATFORM_CPPFLAGS += -I$(TOPDIR)
# MA 02111-1307 USA
#
-TEXT_BASE = 0xc1780000
+CONFIG_SYS_TEXT_BASE = 0xc1780000
-TEXT_BASE = 0x87f00000
+CONFIG_SYS_TEXT_BASE = 0x87f00000
#
# ROM version
-TEXT_BASE = 0xB0000000
+CONFIG_SYS_TEXT_BASE = 0xB0000000
# RAM version
-#TEXT_BASE = 0x80100000
+#CONFIG_SYS_TEXT_BASE = 0x80100000
#
# INKA 4X0 board:
#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFE00000 boot low
-#
-# 0x00100000 boot from RAM (for testing only)
-#
-
-ifndef TEXT_BASE
-## Standard: boot low
-TEXT_BASE = 0xFFE00000
-## For testing: boot from RAM
-#TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds
#
# This is the address where U-Boot lives in flash:
-#TEXT_BASE = 0
+#CONFIG_SYS_TEXT_BASE = 0
# FIXME: armboot does only work correctly when being compiled
# for the addresses _after_ relocation to RAM!! Otherwhise the
# .bss segment is assumed in flash...
-TEXT_BASE = 0xa1fe0000
+CONFIG_SYS_TEXT_BASE = 0xa1fe0000
.endm
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
/*
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf532-0.5
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MicroSys IP860 VMEBus Systems
-#
-
-TEXT_BASE = 0x10000000
+++ /dev/null
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# IPEK01 board
-#
-
-TEXT_BASE = 0xfc000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+++ /dev/null
-#
-# (C) Copyright 2002 Wolfgang Grandegger <wg@denx.de>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# iphase4539 board
-#
-
-TEXT_BASE = 0xffb00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+++ /dev/null
-#
-# Copyright (C) 2004 Arabella Software Ltd.
-# Yuli Barcohen <yuli@arabellasw.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Interphase iSPAN Communications Controllers
-#
-#TEXT_BASE = 0xFF800000
-#TEXT_BASE = 0xFFBA0000
-TEXT_BASE = 0xFE7A0000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-# Ulrich Lutz, Speech Design GmbH, ulutz@datalab.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# IVM boards
-#
-
-TEXT_BASE = 0xFF000000
#
-TEXT_BASE = 0x00f80000
+CONFIG_SYS_TEXT_BASE = 0x00f80000
+++ /dev/null
-#
-# (C) Copyright 2003 Picture Elements, Inc.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Picture Elements, Inc. JSE boards
-#
-
-TEXT_BASE = 0xFFF80000
+++ /dev/null
-#
-# (C) Copyright 2007
-# Heiko Schocher, DENX Software Engineering, hs@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Jupiter board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFF00000 boot high (standard configuration)
-# 0x00100000 boot from RAM (for testing only)
-#
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-## For testing: boot from RAM
-# TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
-#PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -DDEBUG -I$(TOPDIR)/board
ifdef CONFIG_NAND_SPL
-TEXT_BASE = 0x810c0000
+CONFIG_SYS_TEXT_BASE = 0x810c0000
else
-TEXT_BASE = 0x81fc0000
+CONFIG_SYS_TEXT_BASE = 0x81fc0000
endif
-TEXT_BASE = 0x21f00000
+CONFIG_SYS_TEXT_BASE = 0x21f00000
+++ /dev/null
-#
-# (C) Copyright 2007
-# Heiko Schocher, DENX Software Engineering, hs@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mgsvud boards
-#
-
-TEXT_BASE = 0xf0000000
# MA 02110-1301 USA
#
-TEXT_BASE = 0x004000000
+CONFIG_SYS_TEXT_BASE = 0x004000000
# Kirkwood Boot Image configuration file
KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg
+++ /dev/null
-#
-# (C) Copyright 2008
-# Heiko Schocher, DENX Software Engineering, hs@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xF0000000
+++ /dev/null
-#
-# (C) Copyright 2007
-# Heiko Schocher, DENX Software Engineering, hs@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFE000000
PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8CFF0000
endif
-ifeq ($(perm),1)
-PLATFORM_CPPFLAGS += -DCONFIG_KORAT_PERMANENT
-TEXT_BASE = 0xFFFA0000
-else
-TEXT_BASE = 0xF7F60000
+ifndef CONFIG_KORAT_PERMANENT
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-F7FC.lds
endif
+++ /dev/null
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# KUP4K board
-#
-
-TEXT_BASE = 0x40000000
+++ /dev/null
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# KUP4X board
-#
-
-TEXT_BASE = 0x40000000
+++ /dev/null
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Lantec board (based on TQM8xxL config).
-#
-
-TEXT_BASE = 0x40000000
#
-TEXT_BASE = 0xc1780000
+CONFIG_SYS_TEXT_BASE = 0xc1780000
+++ /dev/null
-#
-# (C) Copyright 2001-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-# LinkStation/LinkStation-HG:
-#
-# Valid values for TEXT_BASE are:
-#
-# Standard configuration - all models
-# 0xFFF00000 boot from flash
-#
-# Test configuration (boot from RAM using uloader.o)
-# LinkStation HD-HLAN and KuroBox Standard
-# 0x03F00000 boot from RAM
-# LinkStation HD-HGLAN and KuroBox HG
-# 0x07F00000 boot from RAM
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-# For flash image - all models
-TEXT_BASE = 0xFFF00000
-# For RAM image
-# HLAN and LAN
-#TEXT_BASE = 0x03F00000
-# HGLAN and HGTL
-#TEXT_BASE = 0x07F00000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
# (mem base + reserved)
# For use with external or internal boots.
-TEXT_BASE = 0x80e80000
+CONFIG_SYS_TEXT_BASE = 0x80e80000
-TEXT_BASE = 0xc0000000
+CONFIG_SYS_TEXT_BASE = 0xc0000000
-TEXT_BASE = 0xa0000000
+CONFIG_SYS_TEXT_BASE = 0xa0000000
# (mem base + reserved)
# For use with external or internal boots.
-TEXT_BASE = 0x80e80000
+CONFIG_SYS_TEXT_BASE = 0x80e80000
# (mem base + reserved)
# For use with external or internal boots.
-TEXT_BASE = 0x80e80000
+CONFIG_SYS_TEXT_BASE = 0x80e80000
+++ /dev/null
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).a
-
-COBJS := logodl.o flash.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+++ /dev/null
-#
-# Linux-Kernel is expected to be at c000'8000, entry c000'8000
-#
-# we load ourself to c170'0000, the upper 1 MB of second bank
-#
-# download areas is c800'0000
-#
-
-#TEXT_BASE = 0
-
-# FIXME: armboot does only work correctly when being compiled
-# # for the addresses _after_ relocation to RAM!! Otherwhise the
-# # .bss segment is assumed in flash...
-#
-TEXT_BASE = 0x083E0000
+++ /dev/null
-/*
- * (C) 2000 Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * (C) 2003 August Hoeraendl, Logotronic GmbH
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#undef CONFIG_FLASH_16BIT
-
-#include <common.h>
-
-#define FLASH_BANK_SIZE 0x1000000
-#define MAIN_SECT_SIZE 0x20000 /* 2x64k = 128k per sector */
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
- * has nothing to do with the flash chip being 8-bit or 16-bit.
- */
-#ifdef CONFIG_FLASH_16BIT
-typedef unsigned short FLASH_PORT_WIDTH;
-typedef volatile unsigned short FLASH_PORT_WIDTHV;
-
-#define FLASH_ID_MASK 0xFFFF
-#else
-typedef unsigned long FLASH_PORT_WIDTH;
-typedef volatile unsigned long FLASH_PORT_WIDTHV;
-
-#define FLASH_ID_MASK 0xFFFFFFFF
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define ORMASK(size) ((-size) & OR_AM_MSK)
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(FPWV *addr, flash_info_t *info);
-static void flash_reset(flash_info_t *info);
-static int write_word_intel(flash_info_t *info, FPWV *dest, FPW data);
-static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
-#define write_word(in, de, da) write_word_amd(in, de, da)
-static void flash_get_offsets(ulong base, flash_info_t *info);
-#ifdef CONFIG_SYS_FLASH_PROTECTION
-static void flash_sync_real_protect(flash_info_t *info);
-#endif
-
-/*-----------------------------------------------------------------------
- * flash_init()
- *
- * sets up flash_info and returns size of FLASH (bytes)
- */
-ulong flash_init(void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
- {
- ulong flashbase = 0;
- flash_info[i].flash_id =
- (FLASH_MAN_AMD & FLASH_VENDMASK) |
- (FLASH_AM640U & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
- switch (i)
- {
- case 0:
- flashbase = PHYS_FLASH_1;
- break;
- case 1:
- flashbase = PHYS_FLASH_2;
- break;
- default:
- panic("configured too many flash banks!\n");
- break;
- }
- for (j = 0; j < flash_info[i].sector_count; j++)
- {
- flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_SYS_FLASH_BASE,
- CONFIG_SYS_FLASH_BASE + _bss_start - _armboot_start,
- &flash_info[0]);
-
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
- &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_reset(flash_info_t *info)
-{
- FPWV *base = (FPWV *)(info->start[0]);
-
- /* Put FLASH back in read mode */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
- *base = (FPW)0x00FF00FF; /* Intel Read Mode */
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
- *base = (FPW)0x00F000F0; /* AMD Read Mode */
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL
- && (info->flash_id & FLASH_BTYPE)) {
- int bootsect_size; /* number of bytes/boot sector */
- int sect_size; /* number of bytes/regular sector */
-
- bootsect_size = 0x00002000 * (sizeof(FPW)/2);
- sect_size = 0x00010000 * (sizeof(FPW)/2);
-
- /* set sector offsets for bottom boot block type */
- for (i = 0; i < 8; ++i) {
- info->start[i] = base + (i * bootsect_size);
- }
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + ((i - 7) * sect_size);
- }
- }
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
- && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U) {
-
- int sect_size; /* number of bytes/sector */
-
- sect_size = 0x00010000 * (sizeof(FPW)/2);
-
- /* set up sector start address table (uniform sector type) */
- for( i = 0; i < info->sector_count; i++ )
- info->start[i] = base + (i * sect_size);
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
- uchar *boottype;
- uchar *bootletter;
- uchar *fmt;
- uchar botbootletter[] = "B";
- uchar topbootletter[] = "T";
- uchar botboottype[] = "bottom boot sector";
- uchar topboottype[] = "top boot sector";
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- /* check for top or bottom boot, if it applies */
- if (info->flash_id & FLASH_BTYPE) {
- boottype = botboottype;
- bootletter = botbootletter;
- }
- else {
- boottype = topboottype;
- bootletter = topbootletter;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM640U:
- fmt = "29LV641D (64 Mbit, uniform sectors)\n";
- break;
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- fmt = "28F800C3%s (8 Mbit, %s)\n";
- break;
- case FLASH_INTEL800B:
- case FLASH_INTEL800T:
- fmt = "28F800B3%s (8 Mbit, %s)\n";
- break;
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- fmt = "28F160C3%s (16 Mbit, %s)\n";
- break;
- case FLASH_INTEL160B:
- case FLASH_INTEL160T:
- fmt = "28F160B3%s (16 Mbit, %s)\n";
- break;
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- fmt = "28F320C3%s (32 Mbit, %s)\n";
- break;
- case FLASH_INTEL320B:
- case FLASH_INTEL320T:
- fmt = "28F320B3%s (32 Mbit, %s)\n";
- break;
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- fmt = "28F640C3%s (64 Mbit, %s)\n";
- break;
- case FLASH_INTEL640B:
- case FLASH_INTEL640T:
- fmt = "28F640B3%s (64 Mbit, %s)\n";
- break;
- default:
- fmt = "Unknown Chip Type\n";
- break;
- }
-
- printf (fmt, bootletter, boottype);
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20,
- info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
-
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
-
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-ulong flash_get_size (FPWV *addr, flash_info_t *info)
-{
- /* Write auto select command: read Manufacturer ID */
-
- /* Write auto select command sequence and test FLASH answer */
- addr[0x0555] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
- addr[0x02AA] = (FPW)0x00550055; /* for AMD, Intel ignores this */
- addr[0x0555] = (FPW)0x00900090; /* selects Intel or AMD */
-
- /* The manufacturer codes are only 1 byte, so just use 1 byte.
- * This works for any bus width and any FLASH device width.
- */
- switch (addr[0] & 0xff) {
-
- case (uchar)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case (uchar)INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
- if (info->flash_id != FLASH_UNKNOWN) switch (addr[1]) {
-
- case (FPW)AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */
- info->flash_id += FLASH_AM640U;
- info->sector_count = 128;
- info->size = 0x00800000 * (sizeof(FPW)/2);
- break; /* => 8 or 16 MB */
-
- case (FPW)INTEL_ID_28F800C3B:
- info->flash_id += FLASH_28F800C3B;
- info->sector_count = 23;
- info->size = 0x00100000 * (sizeof(FPW)/2);
- break; /* => 1 or 2 MB */
-
- case (FPW)INTEL_ID_28F800B3B:
- info->flash_id += FLASH_INTEL800B;
- info->sector_count = 23;
- info->size = 0x00100000 * (sizeof(FPW)/2);
- break; /* => 1 or 2 MB */
-
- case (FPW)INTEL_ID_28F160C3B:
- info->flash_id += FLASH_28F160C3B;
- info->sector_count = 39;
- info->size = 0x00200000 * (sizeof(FPW)/2);
- break; /* => 2 or 4 MB */
-
- case (FPW)INTEL_ID_28F160B3B:
- info->flash_id += FLASH_INTEL160B;
- info->sector_count = 39;
- info->size = 0x00200000 * (sizeof(FPW)/2);
- break; /* => 2 or 4 MB */
-
- case (FPW)INTEL_ID_28F320C3B:
- info->flash_id += FLASH_28F320C3B;
- info->sector_count = 71;
- info->size = 0x00400000 * (sizeof(FPW)/2);
- break; /* => 4 or 8 MB */
-
- case (FPW)INTEL_ID_28F320B3B:
- info->flash_id += FLASH_INTEL320B;
- info->sector_count = 71;
- info->size = 0x00400000 * (sizeof(FPW)/2);
- break; /* => 4 or 8 MB */
-
- case (FPW)INTEL_ID_28F640C3B:
- info->flash_id += FLASH_28F640C3B;
- info->sector_count = 135;
- info->size = 0x00800000 * (sizeof(FPW)/2);
- break; /* => 8 or 16 MB */
-
- case (FPW)INTEL_ID_28F640B3B:
- info->flash_id += FLASH_INTEL640B;
- info->sector_count = 135;
- info->size = 0x00800000 * (sizeof(FPW)/2);
- break; /* => 8 or 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* => no or unknown flash */
- }
-
- flash_get_offsets((ulong)addr, info);
-
- /* Put FLASH back in read mode */
- flash_reset(info);
-
- return (info->size);
-}
-
-#ifdef CONFIG_SYS_FLASH_PROTECTION
-/*-----------------------------------------------------------------------
- */
-
-static void flash_sync_real_protect(flash_info_t *info)
-{
- FPWV *addr = (FPWV *)(info->start[0]);
- FPWV *sect;
- int i;
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- /* check for protected sectors */
- *addr = (FPW)0x00900090;
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02.
- * D0 = 1 for each device if protected.
- * If at least one device is protected the sector is marked
- * protected, but mixed protected and unprotected devices
- * within a sector should never happen.
- */
- sect = (FPWV *)(info->start[i]);
- info->protect[i] = (sect[2] & (FPW)(0x00010001)) ? 1 : 0;
- }
-
- /* Put FLASH back in read mode */
- flash_reset(info);
- break;
-
- case FLASH_AM640U:
- default:
- /* no hardware protect that we support */
- break;
- }
-}
-#endif
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- FPWV *addr;
- int flag, prot, sect;
- int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
- ulong start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_INTEL800B:
- case FLASH_INTEL160B:
- case FLASH_INTEL320B:
- case FLASH_INTEL640B:
- case FLASH_28F800C3B:
- case FLASH_28F160C3B:
- case FLASH_28F320C3B:
- case FLASH_28F640C3B:
- case FLASH_AM640U:
- break;
- case FLASH_UNKNOWN:
- default:
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer(0);
- last = start;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
-
- if (info->protect[sect] != 0) /* protected, skip it */
- continue;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr = (FPWV *)(info->start[sect]);
- if (intel) {
- *addr = (FPW)0x00500050; /* clear status register */
- *addr = (FPW)0x00200020; /* erase setup */
- *addr = (FPW)0x00D000D0; /* erase confirm */
- }
- else {
- /* must be AMD style if not Intel */
- FPWV *base; /* first address in bank */
-
- base = (FPWV *)(info->start[0]);
- base[0x0555] = (FPW)0x00AA00AA; /* unlock */
- base[0x02AA] = (FPW)0x00550055; /* unlock */
- base[0x0555] = (FPW)0x00800080; /* erase mode */
- base[0x0555] = (FPW)0x00AA00AA; /* unlock */
- base[0x02AA] = (FPW)0x00550055; /* unlock */
- *addr = (FPW)0x00300030; /* erase sector */
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 50us for AMD, 80us for Intel.
- * Let's wait 1 ms.
- */
- udelay (1000);
-
- while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
- if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
-
- if (intel) {
- /* suspend erase */
- *addr = (FPW)0x00B000B0;
- }
-
- flash_reset(info); /* reset to read mode */
- rcode = 1; /* failed */
- break;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- flash_reset(info); /* reset to read mode */
- }
-
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int bad_write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
- int bytes; /* number of bytes to program in current word */
- int left; /* number of bytes left to program */
- int i, res;
-
- for (left = cnt, res = 0;
- left > 0 && res == 0;
- addr += sizeof(data), left -= sizeof(data) - bytes) {
-
- bytes = addr & (sizeof(data) - 1);
- addr &= ~(sizeof(data) - 1);
-
- /* combine source and destination data so can program
- * an entire word of 16 or 32 bits
- */
- for (i = 0; i < sizeof(data); i++) {
- data <<= 8;
- if (i < bytes || i - bytes >= left )
- data += *((uchar *)addr + i);
- else
- data += *src++;
- }
-
- /* write one word to the flash */
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- res = write_word_amd(info, (FPWV *)addr, data);
- break;
- case FLASH_MAN_INTEL:
- res = write_word_intel(info, (FPWV *)addr, data);
- break;
- default:
- /* unknown flash type, error! */
- printf ("missing or unknown FLASH type\n");
- res = 1; /* not really a timeout, but gives error */
- break;
- }
- }
-
- return (res);
-}
-
-/**
- * write_buf: - Copy memory to flash.
- *
- * @param info:
- * @param src: source of copy transaction
- * @param addr: where to copy to
- * @param cnt: number of bytes to copy
- *
- * @return error code
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int l;
- int i, rc;
-
- wp = (addr & ~1); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 8);
- }
- for (; i<2 && cnt>0; ++i) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 8);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 2) {
- /* data = *((vushort*)src); */
- data = *((FPW*)src);
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- src += sizeof(FPW);
- wp += sizeof(FPW);
- cnt -= sizeof(FPW);
- }
-
- if (cnt == 0) return ERR_OK;
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- }
- for (; i<2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 8);
- }
-
- return write_word(info, wp, data);
-}
-
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for AMD FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
-{
- ulong start;
- int flag;
- int res = 0; /* result, assume success */
- FPWV *base; /* first address in flash bank */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
-
- base = (FPWV *)(info->start[0]);
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- base[0x0555] = (FPW)0x00AA00AA; /* unlock */
- base[0x02AA] = (FPW)0x00550055; /* unlock */
- base[0x0555] = (FPW)0x00A000A0; /* selects program mode */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- /* data polling for D7 */
- while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
- if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
- *dest = (FPW)0x00F000F0; /* reset bank */
- res = 1;
- }
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for Intel FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_intel (flash_info_t *info, FPWV *dest, FPW data)
-{
- ulong start;
- int flag;
- int res = 0; /* result, assume success */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *dest = (FPW)0x00500050; /* clear status register */
- *dest = (FPW)0x00FF00FF; /* make sure in read mode */
- *dest = (FPW)0x00400040; /* program setup */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- while (res == 0 && (*dest & (FPW)0x00800080) != (FPW)0x00800080) {
- if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
- *dest = (FPW)0x00B000B0; /* Suspend program */
- res = 1;
- }
- }
-
- if (res == 0 && (*dest & (FPW)0x00100010))
- res = 1; /* write failed, time out error is close enough */
-
- *dest = (FPW)0x00500050; /* clear status register */
- *dest = (FPW)0x00FF00FF; /* make sure in read mode */
-
- return (res);
-}
-
-#ifdef CONFIG_SYS_FLASH_PROTECTION
-/*-----------------------------------------------------------------------
- */
-int flash_real_protect (flash_info_t * info, long sector, int prot)
-{
- int rcode = 0; /* assume success */
- FPWV *addr; /* address of sector */
- FPW value;
-
- addr = (FPWV *) (info->start[sector]);
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- flash_reset (info); /* make sure in read mode */
- *addr = (FPW) 0x00600060L; /* lock command setup */
- if (prot)
- *addr = (FPW) 0x00010001L; /* lock sector */
- else
- *addr = (FPW) 0x00D000D0L; /* unlock sector */
- flash_reset (info); /* reset to read mode */
-
- /* now see if it really is locked/unlocked as requested */
- *addr = (FPW) 0x00900090;
- /* read sector protection at sector address, (A7 .. A0) = 0x02.
- * D0 = 1 for each device if protected.
- * If at least one device is protected the sector is marked
- * protected, but return failure. Mixed protected and
- * unprotected devices within a sector should never happen.
- */
- value = addr[2] & (FPW) 0x00010001;
- if (value == 0)
- info->protect[sector] = 0;
- else if (value == (FPW) 0x00010001)
- info->protect[sector] = 1;
- else {
- /* error, mixed protected and unprotected */
- rcode = 1;
- info->protect[sector] = 1;
- }
- if (info->protect[sector] != prot)
- rcode = 1; /* failed to protect/unprotect as requested */
-
- /* reload all protection bits from hardware for now */
- flash_sync_real_protect (info);
- break;
-
- case FLASH_AM640U:
- default:
- /* no hardware protect that we support */
- info->protect[sector] = prot;
- break;
- }
-
- return rcode;
-}
-#endif
+++ /dev/null
-/*
- * (C) 2002 Kyle Harris <kharris@nexus-tech.net>, Nexus Technologies, Inc.
- * (C) 2002 Marius Groeger <mgroeger@sysgo.de>, Sysgo GmbH
- * (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <netdev.h>
-#include <asm/arch/pxa-regs.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/**
- * board_init: - setup some data structures
- *
- * @return: 0 in case of success
- */
-
-int board_init (void)
-{
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- gd->bd->bi_arch_number = MACH_TYPE_LOGODL;
- gd->bd->bi_boot_params = 0x08000100;
- gd->bd->bi_baudrate = CONFIG_BAUDRATE;
-
- (*((volatile short*)0x14800000)) = 0xff; /* power on eth0 */
- (*((volatile short*)0x14000000)) = 0xff; /* power on uart */
-
- return 0;
-}
-
-
-/**
- * dram_init: - setup dynamic RAM
- *
- * @return: 0 in case of success
- */
-
-int dram_init (void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return 0;
-}
-
-
-/**
- * logodl_set_led: - switch LEDs on or off
- *
- * @param led: LED to switch (0,1)
- * @param state: switch on (1) or off (0)
- */
-
-void logodl_set_led(int led, int state)
-{
- switch(led) {
-
- case 0:
- if (state==1) {
- CONFIG_SYS_LED_A_CR = CONFIG_SYS_LED_A_BIT;
- } else if (state==0) {
- CONFIG_SYS_LED_A_SR = CONFIG_SYS_LED_A_BIT;
- }
- break;
-
- case 1:
- if (state==1) {
- CONFIG_SYS_LED_B_CR = CONFIG_SYS_LED_B_BIT;
- } else if (state==0) {
- CONFIG_SYS_LED_B_SR = CONFIG_SYS_LED_B_BIT;
- }
- break;
- }
-
- return;
-}
-
-
-/**
- * show_boot_progress: - indicate state of the boot process
- *
- * @param status: Status number - see README for details.
- *
- * The LOGOTRONIC does only have 2 LEDs, so we switch them on at the most
- * important states (1, 5, 15).
- */
-
-void show_boot_progress (int status)
-{
- if (status < -32) status = -1; /* let things compatible */
- /*
- switch(status) {
- case 1: logodl_set_led(0,1); break;
- case 5: logodl_set_led(1,1); break;
- case 15: logodl_set_led(2,1); break;
- }
- */
- logodl_set_led(0, (status & 1)==1);
- logodl_set_led(1, (status & 2)==2);
-
- return;
-}
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_SMC91111
- rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
-#endif
- return rc;
-}
-#endif
+++ /dev/null
-/*
- * Most of this taken from Redboot hal_platform_setup.h with cleanup
- *
- * NOTE: I haven't clean this up considerably, just enough to get it
- * running. See hal_platform_setup.h for the source. See
- * board/cradle/lowlevel_init.S for another PXA250 setup that is
- * much cleaner.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/pxa-regs.h>
-
-DRAM_SIZE: .long CONFIG_SYS_DRAM_SIZE
-
-/* wait for coprocessor write complete */
- .macro CPWAIT reg
- mrc p15,0,\reg,c2,c0,0
- mov \reg,\reg
- sub pc,pc,#4
- .endm
-
-_TEXT_BASE:
- .word TEXT_BASE
-
-
-/*
- * Memory setup
- */
-
-.globl lowlevel_init
-lowlevel_init:
-
- mov r10, lr
-
- /* Set up GPIO pins first ----------------------------------------- */
-
- ldr r0, =GPSR0
- ldr r1, =CONFIG_SYS_GPSR0_VAL
- str r1, [r0]
-
- ldr r0, =GPSR1
- ldr r1, =CONFIG_SYS_GPSR1_VAL
- str r1, [r0]
-
- ldr r0, =GPSR2
- ldr r1, =CONFIG_SYS_GPSR2_VAL
- str r1, [r0]
-
- ldr r0, =GPCR0
- ldr r1, =CONFIG_SYS_GPCR0_VAL
- str r1, [r0]
-
- ldr r0, =GPCR1
- ldr r1, =CONFIG_SYS_GPCR1_VAL
- str r1, [r0]
-
- ldr r0, =GPCR2
- ldr r1, =CONFIG_SYS_GPCR2_VAL
- str r1, [r0]
-
- ldr r0, =GPDR0
- ldr r1, =CONFIG_SYS_GPDR0_VAL
- str r1, [r0]
-
- ldr r0, =GPDR1
- ldr r1, =CONFIG_SYS_GPDR1_VAL
- str r1, [r0]
-
- ldr r0, =GPDR2
- ldr r1, =CONFIG_SYS_GPDR2_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_L
- ldr r1, =CONFIG_SYS_GAFR0_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_U
- ldr r1, =CONFIG_SYS_GAFR0_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_L
- ldr r1, =CONFIG_SYS_GAFR1_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_U
- ldr r1, =CONFIG_SYS_GAFR1_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_L
- ldr r1, =CONFIG_SYS_GAFR2_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_U
- ldr r1, =CONFIG_SYS_GAFR2_U_VAL
- str r1, [r0]
-
- ldr r0, =PSSR /* enable GPIO pins */
- ldr r1, =CONFIG_SYS_PSSR_VAL
- str r1, [r0]
-
-/* ldr r3, =MSC1 / low - bank 2 Lubbock Registers / SRAM */
-/* ldr r2, =CONFIG_SYS_MSC1_VAL / high - bank 3 Ethernet Controller */
-/* str r2, [r3] / need to set MSC1 before trying to write to the HEX LEDs */
-/* ldr r2, [r3] / need to read it back to make sure the value latches (see MSC section of manual) */
-/* */
-/* ldr r1, =LED_BLANK */
-/* mov r0, #0xFF */
-/* str r0, [r1] / turn on hex leds */
-/* */
-/*loop: */
-/* */
-/* ldr r0, =0xB0070001 */
-/* ldr r1, =_LED */
-/* str r0, [r1] / hex display */
-
-
- /* ---------------------------------------------------------------- */
- /* Enable memory interface */
- /* */
- /* The sequence below is based on the recommended init steps */
- /* detailed in the Intel PXA250 Operating Systems Developers Guide, */
- /* Chapter 10. */
- /* ---------------------------------------------------------------- */
-
- /* ---------------------------------------------------------------- */
- /* Step 1: Wait for at least 200 microsedonds to allow internal */
- /* clocks to settle. Only necessary after hard reset... */
- /* FIXME: can be optimized later */
- /* ---------------------------------------------------------------- */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-mem_init:
-
- ldr r1, =MEMC_BASE /* get memory controller base addr. */
-
- /* ---------------------------------------------------------------- */
- /* Step 2a: Initialize Asynchronous static memory controller */
- /* ---------------------------------------------------------------- */
-
- /* MSC registers: timing, bus width, mem type */
-
- /* MSC0: nCS(0,1) */
- ldr r2, =CONFIG_SYS_MSC0_VAL
- str r2, [r1, #MSC0_OFFSET]
- ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */
- /* that data latches */
- /* MSC1: nCS(2,3) */
- ldr r2, =CONFIG_SYS_MSC1_VAL
- str r2, [r1, #MSC1_OFFSET]
- ldr r2, [r1, #MSC1_OFFSET]
-
- /* MSC2: nCS(4,5) */
- ldr r2, =CONFIG_SYS_MSC2_VAL
- str r2, [r1, #MSC2_OFFSET]
- ldr r2, [r1, #MSC2_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2b: Initialize Card Interface */
- /* ---------------------------------------------------------------- */
-
- /* MECR: Memory Expansion Card Register */
- ldr r2, =CONFIG_SYS_MECR_VAL
- str r2, [r1, #MECR_OFFSET]
- ldr r2, [r1, #MECR_OFFSET]
-
- /* MCMEM0: Card Interface slot 0 timing */
- ldr r2, =CONFIG_SYS_MCMEM0_VAL
- str r2, [r1, #MCMEM0_OFFSET]
- ldr r2, [r1, #MCMEM0_OFFSET]
-
- /* MCMEM1: Card Interface slot 1 timing */
- ldr r2, =CONFIG_SYS_MCMEM1_VAL
- str r2, [r1, #MCMEM1_OFFSET]
- ldr r2, [r1, #MCMEM1_OFFSET]
-
- /* MCATT0: Card Interface Attribute Space Timing, slot 0 */
- ldr r2, =CONFIG_SYS_MCATT0_VAL
- str r2, [r1, #MCATT0_OFFSET]
- ldr r2, [r1, #MCATT0_OFFSET]
-
- /* MCATT1: Card Interface Attribute Space Timing, slot 1 */
- ldr r2, =CONFIG_SYS_MCATT1_VAL
- str r2, [r1, #MCATT1_OFFSET]
- ldr r2, [r1, #MCATT1_OFFSET]
-
- /* MCIO0: Card Interface I/O Space Timing, slot 0 */
- ldr r2, =CONFIG_SYS_MCIO0_VAL
- str r2, [r1, #MCIO0_OFFSET]
- ldr r2, [r1, #MCIO0_OFFSET]
-
- /* MCIO1: Card Interface I/O Space Timing, slot 1 */
- ldr r2, =CONFIG_SYS_MCIO1_VAL
- str r2, [r1, #MCIO1_OFFSET]
- ldr r2, [r1, #MCIO1_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2c: Write FLYCNFG FIXME: what's that??? */
- /* ---------------------------------------------------------------- */
-
- /* test if we run from flash or RAM - RAM/BDI: don't setup RAM */
- adr r3, mem_init /* r0 <- current position of code */
- ldr r2, =mem_init
- cmp r3, r2 /* skip init if in place */
- beq initirqs
-
-
- /* ---------------------------------------------------------------- */
- /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */
- /* ---------------------------------------------------------------- */
-
- /* Before accessing MDREFR we need a valid DRI field, so we set */
- /* this to power on defaults + DRI field. */
-
- ldr r3, =CONFIG_SYS_MDREFR_VAL
- ldr r2, =0xFFF
- and r3, r3, r2
- ldr r4, =0x03ca4000
- orr r4, r4, r3
-
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
-
- /* ---------------------------------------------------------------- */
- /* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */
- /* ---------------------------------------------------------------- */
-
- /* Initialize SXCNFG register. Assert the enable bits */
-
- /* Write SXMRS to cause an MRS command to all enabled banks of */
- /* synchronous static memory. Note that SXLCR need not be written */
- /* at this time. */
-
- /* FIXME: we use async mode for now */
-
-
- /* ---------------------------------------------------------------- */
- /* Step 4: Initialize SDRAM */
- /* ---------------------------------------------------------------- */
-
- /* Step 4a: assert MDREFR:K?RUN and configure */
- /* MDREFR:K1DB2 and MDREFR:K2DB2 as desired. */
-
- ldr r4, =CONFIG_SYS_MDREFR_VAL
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
- /* Step 4b: de-assert MDREFR:SLFRSH. */
-
- bic r4, r4, #(MDREFR_SLFRSH)
-
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
-
- /* Step 4c: assert MDREFR:E1PIN and E0PIO */
-
- orr r4, r4, #(MDREFR_E1PIN|MDREFR_E0PIN)
-
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
-
- /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */
- /* configure but not enable each SDRAM partition pair. */
-
- ldr r4, =CONFIG_SYS_MDCNFG_VAL
- bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1)
-
- str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */
- ldr r4, [r1, #MDCNFG_OFFSET]
-
-
- /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */
- /* 100..200 µsec. */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-
- /* Step 4f: Trigger a number (usually 8) refresh cycles by */
- /* attempting non-burst read or write accesses to disabled */
- /* SDRAM, as commonly specified in the power up sequence */
- /* documented in SDRAM data sheets. The address(es) used */
- /* for this purpose must not be cacheable. */
-
- /* There should 9 writes, since the first write doesn't */
- /* trigger a refresh cycle on PXA250. See Intel PXA250 and */
- /* PXA210 Processors Specification Update, */
- /* Jan 2003, Errata #116, page 30. */
-
-
- ldr r3, =CONFIG_SYS_DRAM_BASE
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
-
- /* Step 4g: Write MDCNFG with enable bits asserted */
- /* (MDCNFG:DEx set to 1). */
-
- ldr r3, [r1, #MDCNFG_OFFSET]
- orr r3, r3, #(MDCNFG_DE0|MDCNFG_DE1)
- str r3, [r1, #MDCNFG_OFFSET]
-
- /* Step 4h: Write MDMRS. */
-
- ldr r2, =CONFIG_SYS_MDMRS_VAL
- str r2, [r1, #MDMRS_OFFSET]
-
-
- /* We are finished with Intel's memory controller initialisation */
-
- /* ---------------------------------------------------------------- */
- /* Disable (mask) all interrupts at interrupt controller */
- /* ---------------------------------------------------------------- */
-
-initirqs:
-
- mov r1, #0 /* clear int. level register (IRQ, not FIQ) */
- ldr r2, =ICLR
- str r1, [r2]
-
- ldr r2, =ICMR /* mask all interrupts at the controller */
- str r1, [r2]
-
-
- /* ---------------------------------------------------------------- */
- /* Clock initialisation */
- /* ---------------------------------------------------------------- */
-
-initclks:
-
- /* Disable the peripheral clocks, and set the core clock frequency */
- /* (hard-coding at 398.12MHz for now). */
-
- /* Turn Off ALL on-chip peripheral clocks for re-configuration */
- /* Note: See label 'ENABLECLKS' for the re-enabling */
- ldr r1, =CKEN
- mov r2, #0
- str r2, [r1]
-
-
- /* default value in case no valid rotary switch setting is found */
- ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */
-
- /* ... and write the core clock config register */
- ldr r1, =CCCR
- str r2, [r1]
-
- /* enable the 32Khz oscillator for RTC and PowerManager */
-/*
- ldr r1, =OSCC
- mov r2, #OSCC_OON
- str r2, [r1]
-*/
- /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */
- /* has settled. */
-60:
- ldr r2, [r1]
- ands r2, r2, #1
- beq 60b
-
- /* ---------------------------------------------------------------- */
- /* */
- /* ---------------------------------------------------------------- */
-
- /* Save SDRAM size */
- ldr r1, =DRAM_SIZE
- str r8, [r1]
-
- /* Interrupt init: Mask all interrupts */
- ldr r0, =ICMR /* enable no sources */
- mov r1, #0
- str r1, [r0]
-
- /* FIXME */
-
-#ifndef DEBUG
- /*Disable software and data breakpoints */
- mov r0,#0
- mcr p15,0,r0,c14,c8,0 /* ibcr0 */
- mcr p15,0,r0,c14,c9,0 /* ibcr1 */
- mcr p15,0,r0,c14,c4,0 /* dbcon */
-
- /*Enable all debug functionality */
- mov r0,#0x80000000
- mcr p14,0,r0,c10,c0,0 /* dcsr */
-#endif
-
- /* ---------------------------------------------------------------- */
- /* End lowlevel_init */
- /* ---------------------------------------------------------------- */
-
-endlowlevel_init:
-
- mov pc, lr
#
#address where u-boot will be relocated
-#TEXT_BASE = 0x0
-TEXT_BASE = 0x81500000
+#CONFIG_SYS_TEXT_BASE = 0x0
+CONFIG_SYS_TEXT_BASE = 0x81500000
#define BCFG1_VALUE 0x10001C61
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
MEMMAP_ADR:
.word MEMMAP
BCFG0_ADR:
# download area is 0xc0f00000
#
-TEXT_BASE = 0xc1fc0000
-#TEXT_BASE = 0x00000000
+CONFIG_SYS_TEXT_BASE = 0xc1fc0000
+#CONFIG_SYS_TEXT_BASE = 0x00000000
#define DO_MEM_READ 2
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
.globl lowlevel_init
lowlevel_init:
-#TEXT_BASE = 0xa1700000
-TEXT_BASE = 0xa3080000
-#TEXT_BASE = 0
+#CONFIG_SYS_TEXT_BASE = 0xa1700000
+CONFIG_SYS_TEXT_BASE = 0xa3080000
+#CONFIG_SYS_TEXT_BASE = 0
+++ /dev/null
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-# Ulrich Lutz, Speech Design GmbH, ulutz@datalab.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# LWE Monitorcontroller Litronic LCD IV boards
-#
-
-TEXT_BASE = 0x40000000
-#TEXT_BASE = 0x41000000
# lwmon5 (440EPx)
#
-ifndef TEXT_BASE
-TEXT_BASE = 0xFFF80000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
-TEXT_BASE = 0x21f00000
+CONFIG_SYS_TEXT_BASE = 0x21f00000
# MA 02111-1307 USA
#
-#
-# INKA 4X0 board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFE00000 boot high
-#
-# 0x00100000 boot from RAM (for testing only)
-#
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-## For testing: boot from RAM
-#TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds
+++ /dev/null
-#
-# (C) Copyright 2008
-# Heiko Schocher, DENX Software Engineering, hs@denx.de.
-#
-# (C) Copyright 2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MUCMC52 board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFE00000 boot high
-#
-# 0x00100000 boot from RAM (for testing only)
-#
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-## For testing: boot from RAM
-#TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
-LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc5xxx/u-boot.lds
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# UC100 boards
-#
-
-#TEXT_BASE = 0x40000000
-TEXT_BASE = 0x40700000
# MA 02111-1307 USA
#
-#
-# INKA 4X0 board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFE00000 boot high
-#
-# 0x00100000 boot from RAM (for testing only)
-#
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-## For testing: boot from RAM
-#TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds
+++ /dev/null
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xFF800000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+++ /dev/null
-#
-# Copyright (C) Freescale Semiconductor, Inc. 2006.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-TEXT_BASE = 0xFFF00000
#
-# (C) Copyright 2003
+# (C) Copyright 2003-2010
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# MA 02111-1307 USA
#
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xFF800000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
LDSCRIPT := $(SRCTREE)/board/matrix_vision/mvsmr/u-boot.lds
+++ /dev/null
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MBX8xx boards
-#
-
-TEXT_BASE = 0xfe000000
-/*TEXT_BASE = 0x00200000 */
+++ /dev/null
-#
-# (C) Copyright 2003-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MCC200, PRS200 boards:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFC000000 boot low (standard configuration)
-# 0xFFF00000 boot high
-# 0x00100000 boot from RAM (for testing only)
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot low
-TEXT_BASE = 0xFC000000
-## Boot high
-# TEXT_BASE = 0xFFF00000
-## For testing: boot from RAM
-# TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
-ifndef TEXT_BASE
-TEXT_BASE = 0x87000000
+ifndef CONFIG_SYS_TEXT_BASE
+CONFIG_SYS_TEXT_BASE = 0x87000000
endif
-TEXT_BASE = 0x00000000
+CONFIG_SYS_TEXT_BASE = 0x00000000
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
PLATFORM_LDFLAGS += --gc-sections
-TEXT_BASE = 0x00000000
+CONFIG_SYS_TEXT_BASE = 0x00000000
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
PLATFORM_LDFLAGS += --gc-sections
# MA 02111-1307 USA
#
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0x18000000
-
# Use board specific linker script
LDSCRIPT := $(SRCTREE)/board/ml2/u-boot.lds
# MA 02111-1307 USA
#
-TEXT_BASE = 0x00f00000
+CONFIG_SYS_TEXT_BASE = 0x00f00000
#CROSS_COMPILE = arm-elf-
lowlevel_init:
#if defined(CONFIG_MODNET50)
- ldr pc, =(_jump_to_high + NETARM_MMAP_CS0_BASE - TEXT_BASE)
+ ldr pc, =(_jump_to_high + NETARM_MMAP_CS0_BASE - CONFIG_SYS_TEXT_BASE)
_jump_to_high:
/*
# MA 02111-1307 USA
#
-TEXT_BASE = 0xFFFA0000
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
+++ /dev/null
-#
-# (C) Copyright 2006-2007
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Promess Motion-PRO
-#
-
-TEXT_BASE = 0xfff00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
#
# MOUSSE boards
#
-TEXT_BASE = 0xFFF00000
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
-
LDSCRIPT := $(SRCTREE)/board/mousse/u-boot.lds
-TEXT_BASE = 0x27F00000
+CONFIG_SYS_TEXT_BASE = 0x27F00000
## For testing: load at 0x20100000 and "go" at 0x201000A4
-#TEXT_BASE = 0x20100000
+#CONFIG_SYS_TEXT_BASE = 0x20100000
+++ /dev/null
-ifndef TEXT_BASE
-TEXT_BASE = 0xFC000000
-endif
+++ /dev/null
-# Modified by Xianghua Xiao, X.Xiao@motorola.com
-# (C) Copyright 2002,Motorola Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# gda8540 board
-# default CCARBAR is at 0xff700000
-# assume U-Boot is less than 0.5MB
-#
-#TEXT_BASE = 0x1000000
-TEXT_BASE = 0xfff80000
+++ /dev/null
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0xFFF80000
# MA 02111-1307 USA
#
-#
-# EPQ Board Configuration
-#
-
-# Boot from flash at location 0x00000000
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
+PLATFORM_CPPFLAGS += -I$(TOPDIR)
+++ /dev/null
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0xFFF80000
#
-#TEXT_BASE = 0x30F80000
-TEXT_BASE = 0x33F80000
+#CONFIG_SYS_TEXT_BASE = 0x30F80000
+CONFIG_SYS_TEXT_BASE = 0x33F80000
/**************************************/
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
.globl lowlevel_init
lowlevel_init:
# MA 02111-1307 USA
#
-# TEXT_BASE refers to image _after_ relocation.
+# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation.
#
# NOTE: Must match value used in u-boot.lds (in this directory).
#
-TEXT_BASE = 0x8FFC0000
+CONFIG_SYS_TEXT_BASE = 0x8FFC0000
# MA 02111-1307 USA
#
-# TEXT_BASE refers to image _after_ relocation.
+# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation.
#
# NOTE: Must match value used in u-boot.lds (in this directory).
#
-TEXT_BASE = 0x8FFC0000
+CONFIG_SYS_TEXT_BASE = 0x8FFC0000
# MA 02111-1307 USA
#
-# TEXT_BASE refers to image _after_ relocation.
+# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation.
#
# NOTE: Must match value used in u-boot.lds (in this directory).
#
-TEXT_BASE = 0x8FFC0000
+CONFIG_SYS_TEXT_BASE = 0x8FFC0000
#
# NOTE: Must match value used in u-boot.lds (in this directory).
#
-TEXT_BASE = 0x8FFC0000
+CONFIG_SYS_TEXT_BASE = 0x8FFC0000
+++ /dev/null
-#
-# (C) Copyright 2008
-# Heiko Schocher, DENX Software Engineering, hs@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFF000000
+++ /dev/null
-#
-# (C) Copyright 2007
-# Heiko Schocher, DENX Software Engineering, hs@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MUNICes board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFF00000 boot high (standard configuration)
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xFFF00000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+++ /dev/null
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# CU824 board
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
+++ /dev/null
-#
-# (C) Copyright 2001-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
-TEXT_BASE = 0x08400000
+CONFIG_SYS_TEXT_BASE = 0x08400000
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
.globl lowlevel_init
lowlevel_init:
#
# This config file is used for compilation of IMX sources
#
-# You might change location of U-Boot in memory by setting right TEXT_BASE.
+# You might change location of U-Boot in memory by setting right CONFIG_SYS_TEXT_BASE.
# This allows for example having one copy located at the end of ram and stored
# in flash device and later on while developing use other location to test
# the code in RAM device only.
#
-TEXT_BASE = 0x08f00000
+CONFIG_SYS_TEXT_BASE = 0x08f00000
+++ /dev/null
-#
-# (C) Copyright 2006, 2007 Detlev Zundel, dzu@denx.de
-# (C) Copyright 2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# NC650 board
-#
-
-TEXT_BASE = 0x40700000
+++ /dev/null
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# netVia Boards
-#
-
-TEXT_BASE = 0x40000000
#
# Netstal Maschinen AG: HCU4 boards
#
-
-TEXT_BASE = 0xFFFB0000
-
ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DDEBUG -g
endif
#
# Netstal Maschinen AG: HCU5 boards
#
-
-TEXT_BASE = 0xFFFB0000
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
#
# Netstal Maschinen AG: MCU25 board
#
-TEXT_BASE = 0xFFFB0000
-
ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DDEBUG -g
endif
# entry 1000'8000 (mem base + reserved)
#
# We load ourself to internal RAM at 2001'2000
-# Check map file when changing TEXT_BASE.
+# Check map file when changing CONFIG_SYS_TEXT_BASE.
# Everything has fit into 192kB internal SRAM!
#
-# XXX TEXT_BASE = 0x20012000
-TEXT_BASE = 0x13FC0000
+# XXX CONFIG_SYS_TEXT_BASE = 0x20012000
+CONFIG_SYS_TEXT_BASE = 0x13FC0000
#include <version.h>
_TEXT_BASE:
- .word TEXT_BASE /* SDRAM load addr from config.mk */
+ .word CONFIG_SYS_TEXT_BASE /* SDRAM load addr from config.mk */
OMAP5910_LPG1_BASE: .word 0xfffbd000
OMAP5910_TIPB_SWITCHES_BASE: .word 0xfffbc800
+++ /dev/null
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# netVia Boards
-#
-
-TEXT_BASE = 0x40000000
+++ /dev/null
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# netVia Boards
-#
-
-TEXT_BASE = 0x40000000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# netVia Boards
-#
-
-TEXT_BASE = 0x40000000
#
-TEXT_BASE = 0x00780000
+CONFIG_SYS_TEXT_BASE = 0x00780000
.endm
_TEXT_BASE:
- .word TEXT_BASE @ sdram load addr from config.mk
+ .word CONFIG_SYS_TEXT_BASE @ sdram load addr from config.mk
_PHYS_FLASH:
.word PHYS_FLASH_1 @ real flash address (without mirroring)
_CAS_LATENCY:
+++ /dev/null
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Nexus boards
-#
-
-TEXT_BASE = 0x40000000
+++ /dev/null
-#
-# (C) Copyright 2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-# boot low for 16 MiB boards
-TEXT_BASE = 0xFF000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
# (mem base + reserved)
-# For use with external or internal boots.
-TEXT_BASE = 0x80008000
+CONFIG_SYS_TEXT_BASE = 0x80008000
+++ /dev/null
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# OXC boards
-#
-
-#TEXT_BASE = 0x00090000
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
# (mem base + reserved)
# For use with external or internal boots.
-TEXT_BASE = 0x80e80000
+CONFIG_SYS_TEXT_BASE = 0x80e80000
NOTE! When you switch between the two boot flashes, the
base addresses will be swapped.
-Have this in mind when you compile u-boot. TEXT_BASE has
+Have this in mind when you compile u-boot. CONFIG_SYS_TEXT_BASE has
to match the address where u-boot is located when you
actually launch.
#
# ROM version
-#TEXT_BASE = 0xbfc00000
+#CONFIG_SYS_TEXT_BASE = 0xbfc00000
# SDRAM version
-TEXT_BASE = 0x83800000
+CONFIG_SYS_TEXT_BASE = 0x83800000
+++ /dev/null
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# PCIPPC-2 boards
-#
-
-TEXT_BASE = 0xfff00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
# Check the U-Boot Image with a SHA1 checksum
ALL += $(obj)u-boot.sha1
-#TEXT_BASE = 0x00001000
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0xFBD00000
-else
-TEXT_BASE = 0xFFFA0000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
+++ /dev/null
-#
-# (C) Copyright 2009
-# Michael Weiß, ifm ecomatic gmbh, michael.weiss@ifm.com
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xF0000000
+++ /dev/null
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# phyCORE-MPC5200B tiny board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFF00000 boot high (standard configuration)
-# 0xFF000000 boot low
-# 0x00100000 boot from RAM (for testing only)
-#
-
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
-TEXT_BASE = 0xa1F80000
-#TEXT_BASE = 0xa3080000
-#TEXT_BASE = 0
+CONFIG_SYS_TEXT_BASE = 0xa1F80000
+#CONFIG_SYS_TEXT_BASE = 0xa3080000
+#CONFIG_SYS_TEXT_BASE = 0
+++ /dev/null
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# PM520 board
-#
-
-TEXT_BASE = 0xfff00000
-# TEXT_BASE = 0x00100000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
#
-# (C) Copyright 2001-2004
+# (C) Copyright 2001-2010
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
#
# MicroSys PM826 board:
#
-
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot 64-bit flash
-TEXT_BASE = 0xFF000000
-
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
+PLATFORM_CPPFLAGS += -I$(TOPDIR)
#
-# (C) Copyright 2003-2004
+# (C) Copyright 2003-2010
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
#
# MicroSys PM828 board:
#
-
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot 64-bit flash
-TEXT_BASE = 0x40000000
-
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
+PLATFORM_CPPFLAGS += -I$(TOPDIR)
+++ /dev/null
-# Copyright 2004 Freescale Semiconductor.
-# Modified by Xianghua Xiao, X.Xiao@motorola.com
-# (C) Copyright 2002,Motorola Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# pm854 board
-# default CCARBAR is at 0xff700000
-# assume U-Boot is less than 0.5MB
-#
-TEXT_BASE = 0xfff80000
+++ /dev/null
-# Copyright 2004 Freescale Semiconductor.
-# Modified by Xianghua Xiao, X.Xiao@motorola.com
-# (C) Copyright 2002,2003 Motorola Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# PM856 board
-# default CCARBAR is at 0xff700000
-# assume U-Boot is less than 0.5MB
-#
-TEXT_BASE = 0xfff80000
+++ /dev/null
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# PN62 boards
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
-TEXT_BASE = 0xFFF00000
TEXT_END = 0xFFF40000
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
# MBX8xx boards
#
-TEXT_BASE = 0xfe000000
TEXT_END = 0xfe080000
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
# MA 02111-1307 USA
#
-#
-# AMCC 440GX Reference Platform (Ocotea) board
-#
-
-#TEXT_BASE = 0xFFFE0000
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0x07FD0000
-else
-TEXT_BASE = 0xFFFC0000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
+++ /dev/null
-#
-# (C) Copyright 2002-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# p3mx boards (P3M750 & P3M7448)
-#
-
-TEXT_BASE = 0xfff00000
# MA 02111-1307 USA
#
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0x07FD0000
-else
-TEXT_BASE = 0xFFFC0000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
#
-TEXT_BASE = 0x01f00000
+CONFIG_SYS_TEXT_BASE = 0x01f00000
# MA 02111-1307 USA
#
-TEXT_BASE = 0x018e0000
+CONFIG_SYS_TEXT_BASE = 0x018e0000
PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
# MA 02111-1307 USA
#
-TEXT_BASE = 0x01fc0000
+CONFIG_SYS_TEXT_BASE = 0x01fc0000
PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
#
# ROM version
-TEXT_BASE = 0xB0000000
+CONFIG_SYS_TEXT_BASE = 0xB0000000
# RAM version
-#TEXT_BASE = 0x80100000
+#CONFIG_SYS_TEXT_BASE = 0x80100000
FUNCPTR absEntry;
ulong *src,*dst;
- src = (ulong *)(TEXT_BASE + 0x428);
+ src = (ulong *)(CONFIG_SYS_TEXT_BASE + 0x428);
dst = (ulong *)0xbf0081d0;
- absEntry = (FUNCPTR)(TEXT_BASE + 0x400);
+ absEntry = (FUNCPTR)(CONFIG_SYS_TEXT_BASE + 0x400);
absEntry(src,dst,0x6);
src = (ulong *)((ulong)copydwords & 0xfffffff8);
-#TEXT_BASE = 0xa1700000
-TEXT_BASE = 0xa3080000
-#TEXT_BASE = 0
+#CONFIG_SYS_TEXT_BASE = 0xa1700000
+CONFIG_SYS_TEXT_BASE = 0xa3080000
+#CONFIG_SYS_TEXT_BASE = 0
#
# ROM version
-TEXT_BASE = 0xbfc00000
+CONFIG_SYS_TEXT_BASE = 0xbfc00000
# RAM version
-#TEXT_BASE = 0x80001000
+#CONFIG_SYS_TEXT_BASE = 0x80001000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFFC0000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# RMU boards
-#
-
-TEXT_BASE = 0xfff00000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TQM8xxL boards
-#
-
-TEXT_BASE = 0x40000000
+++ /dev/null
-#
-# (C) Copyright 2001-2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# Modified by, Yuli Barcohen, Arabella Software Ltd. <yuli@arabellasw.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Rattler series boards by Analogue & Micro
-#
-
-TEXT_BASE = 0xFE000000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# RBC823 boards
-#
-
-TEXT_BASE = 0xFFF00000
# MA 02111-1307 USA
#
-# TEXT_BASE refers to image _after_ relocation.
+# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation.
#
# NOTE: Must match value used in u-boot.lds (in this directory).
#
-TEXT_BASE = 0x8FFC0000
+CONFIG_SYS_TEXT_BASE = 0x8FFC0000
# MA 02111-1307 USA
#
-# TEXT_BASE refers to image _after_ relocation.
+# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation.
#
# NOTE: Must match value used in u-boot.lds (in this directory).
#
-TEXT_BASE = 0x8FFC0000
+CONFIG_SYS_TEXT_BASE = 0x8FFC0000
#
# NOTE: Must match value used in u-boot.lds (in this directory).
#
-TEXT_BASE = 0x0FFC0000
+CONFIG_SYS_TEXT_BASE = 0x0FFC0000
# MA 02111-1307 USA
#
-# TEXT_BASE refers to image _after_ relocation.
+# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation.
#
# NOTE: Must match value used in u-boot.lds (in this directory).
#
-TEXT_BASE = 0x0FFC0000
+CONFIG_SYS_TEXT_BASE = 0x0FFC0000
# MA 02111-1307 USA
#
-# TEXT_BASE refers to image _after_ relocation.
+# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation.
#
# NOTE: Must match value used in u-boot.lds (in this directory).
#
-TEXT_BASE = 0x0C7C0000
+CONFIG_SYS_TEXT_BASE = 0x0C7C0000
#
# board/sh7763rdp/config.mk
#
-# TEXT_BASE refers to image _after_ relocation.
+# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation.
#
# NOTE: Must match value used in u-boot.lds (in this directory).
#
-TEXT_BASE = 0x8FFC0000
+CONFIG_SYS_TEXT_BASE = 0x8FFC0000
# PLATFORM_CPPFLAGS += -DCONFIG_MULTIBOOT
# MA 02111-1307 USA
#
-# TEXT_BASE refers to image _after_ relocation.
+# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation.
#
# NOTE: Must match value used in u-boot.lds (in this directory).
#
sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-ifndef TEXT_BASE
-TEXT_BASE = 0x0ff80000
+ifndef CONFIG_SYS_TEXT_BASE
+CONFIG_SYS_TEXT_BASE = 0x0ff80000
endif
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# RMU boards
-#
-
-TEXT_BASE = 0xfff00000
-TEXT_BASE = 0x23f00000
\ No newline at end of file
+CONFIG_SYS_TEXT_BASE = 0x23f00000
\ No newline at end of file
-TEXT_BASE = 0x23f00000
+CONFIG_SYS_TEXT_BASE = 0x23f00000
-TEXT_BASE = 0x73f00000
+CONFIG_SYS_TEXT_BASE = 0x73f00000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MBX8xx boards
-#
-
-TEXT_BASE = 0x80F00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
# MA 02111-1307 USA
#
-#
-# MBX8xx boards
-#
-
-TEXT_BASE = 0xff000000
-/*TEXT_BASE = 0x00200000 */
-
LDSCRIPT := $(SRCTREE)/board/rsdproto/u-boot.lds
+++ /dev/null
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# 82xx boards
-#
-
-TEXT_BASE = 0x40000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
# 0x30000000 to 0x35000000 (80MiB)
# 0x40000000 to 0x50000000 (256MiB)
#
-TEXT_BASE = 0x34800000
+CONFIG_SYS_TEXT_BASE = 0x34800000
*/
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
.globl lowlevel_init
lowlevel_init:
#
-TEXT_BASE = 0x0CF80000
+CONFIG_SYS_TEXT_BASE = 0x0CF80000
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
.globl lowlevel_init
lowlevel_init:
#
-TEXT_BASE = 0x33F80000
+CONFIG_SYS_TEXT_BASE = 0x33F80000
/**************************************/
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
.globl lowlevel_init
lowlevel_init:
sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
ifndef CONFIG_NAND_SPL
-TEXT_BASE = $(RAM_TEXT)
+CONFIG_SYS_TEXT_BASE = $(RAM_TEXT)
else
-TEXT_BASE = 0
+CONFIG_SYS_TEXT_BASE = 0
endif
LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot-nand.lds
#endif
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
.globl lowlevel_init
lowlevel_init:
# 0x30000000 to 0x35000000 (80MiB)
# 0x40000000 to 0x48000000 (128MiB)
#
-TEXT_BASE = 0x34800000
+CONFIG_SYS_TEXT_BASE = 0x34800000
*/
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
.globl lowlevel_init
lowlevel_init:
# Travis B. Sawyer
#
-ifeq ($(ramsym),1)
-TEXT_BASE = 0x07FD0000
-else
-TEXT_BASE = 0xFFF80000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
# MA 02111-1307 USA
#
-ifeq ($(ramsym),1)
-TEXT_BASE = 0x07FD0000
-else
-TEXT_BASE = 0xFFF80000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
+++ /dev/null
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Sandpoint boards
-#
-
-#TEXT_BASE = 0x00090000
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
#
# download area is 3300'0000
-TEXT_BASE = 0x33F80000
+CONFIG_SYS_TEXT_BASE = 0x33F80000
/**************************************/
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
.globl lowlevel_init
lowlevel_init:
+++ /dev/null
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Wind River sbc405 boards
-#
-
-TEXT_BASE = 0xFFFC0000
+++ /dev/null
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# sbc8240 board
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
+++ /dev/null
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MBX8xx boards
-#
-
-TEXT_BASE = 0x40000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+++ /dev/null
-#
-# Copyright (c) 2006 Wind River Systems, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# SBC8349E
-#
-
-TEXT_BASE = 0xFF800000
+++ /dev/null
-#
-# Copyright 2004, 2007 Freescale Semiconductor.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# sbc8548 board
-#
-ifndef TEXT_BASE
-TEXT_BASE = 0xfffa0000
-endif
+++ /dev/null
-# Modified by Xianghua Xiao, X.Xiao@motorola.com
-# (C) Copyright 2002,2003 Motorola Inc.
-#
-# (C) Copyright 2004 Wind River Systems Inc <www.windriver.com>.
-# Added support for Wind River SBC8560 board
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-#
-# based on mpc8560ads board
-# default CCARBAR is at 0xff700000
-# assume U-Boot is less than 256K
-#
-TEXT_BASE = 0xfffc0000
+++ /dev/null
-# Copyright 2004 Freescale Semiconductor.
-# Modified by Jeff Brown
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# sbc8641 board
-# default CCSRBAR is at 0xff700000
-#
-TEXT_BASE = 0xfff00000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFFA0000
#
# This config file is used for compilation of scb93328 sources
#
-# You might change location of U-Boot in memory by setting right TEXT_BASE.
+# You might change location of U-Boot in memory by setting right CONFIG_SYS_TEXT_BASE.
# This allows for example having one copy located at the end of ram and stored
# in flash device and later on while developing use other location to test
# the code in RAM device only.
#
-TEXT_BASE = 0x08f00000
+CONFIG_SYS_TEXT_BASE = 0x08f00000
#
-TEXT_BASE = 0xd8380000
+CONFIG_SYS_TEXT_BASE = 0xd8380000
-ifndef NAND_SPL
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-endif
-
-ifndef TEXT_BASE
-TEXT_BASE = 0x00100000
-endif
-
ifdef CONFIG_NAND_LP
PAD_TO = 0xFFF20000
else
+++ /dev/null
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000, 2001, 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# iad210 boards
-#
-
-TEXT_BASE = 0x08000000
-/*TEXT_BASE = 0x00200000 */
#
# Siemens SCM boards
#
-
-# This should be equal to the CONFIG_SYS_FLASH_BASE define in config_SCM.h
-# for the "final" configuration, with U-Boot in flash, or the address
-# in RAM where U-Boot is loaded at for debugging.
-#
-TEXT_BASE = 0x40000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
+PLATFORM_CPPFLAGS += -I$(TOPDIR)
#
#address where u-boot will be relocated
-#TEXT_BASE = 0x0
-TEXT_BASE = 0x81500000
+#CONFIG_SYS_TEXT_BASE = 0x0
+CONFIG_SYS_TEXT_BASE = 0x81500000
#define IO0_VALUE 0x4000C
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
MEMMAP_ADR:
.word MEMMAP
BCFG0_ADR:
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# SIXNET boards
-#
-
-TEXT_BASE = 0xF8000000
+++ /dev/null
-#
-# (C) Copyright 2002-2003
-# Simple Network Magic Corporation, dnevil@snmc.com
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# QS850
-# Start address of Bootloader in Flash
-#
-
-TEXT_BASE = 0xFFF00000
+++ /dev/null
-#
-# (C) Copyright 2002
-# Simple Network Magic Corporation, dnevil@snmc.com
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# QS860T
-# Start address of 512K Socketed Flash
-#
-
-TEXT_BASE = 0xFFF00000
+++ /dev/null
-# Copyright 2004 Freescale Semiconductor.
-#
-# Modified by Sergei Poselenov
-# (C) Copyright 2008, Emcraft Systems.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# socrates board
-# default CCARBAR is at 0xff700000
-#
-TEXT_BASE = 0xfff80000
+++ /dev/null
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# sorcery board
-#
-
-TEXT_BASE = 0xfff00000
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+++ /dev/null
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# Modified by, Yuli Barcohen, Arabella Software Ltd., yuli@arabellasw.com
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Motorola old MPC821/860ADS, MPC8xxFADS, new MPC866ADS, and
-# MPC885ADS boards
-#
-
-#TEXT_BASE = 0xFE000000
-TEXT_BASE = 0xFFF00000
-PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/spc1920
-HOSTCFLAGS += -I$(TOPDIR)/board/spc1920
-HOST_ENVIRO_CFLAGS += -I$(TOPDIR)/board/spc1920
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-# Ulrich Lutz, Speech Design GmbH, ulutz@datalab.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# SPD823TS boards
-#
-
-TEXT_BASE = 0xFF000000
#########################################################################
-TEXT_BASE = 0x00700000
+CONFIG_SYS_TEXT_BASE = 0x00700000
ALL += $(obj)u-boot.img
#########################################################################
-TEXT_BASE = 0x00700000
+CONFIG_SYS_TEXT_BASE = 0x00700000
ALL += $(obj)u-boot.img
#########################################################################
-TEXT_BASE = 0x00700000
+CONFIG_SYS_TEXT_BASE = 0x00700000
ALL += $(obj)u-boot.img
#########################################################################
-TEXT_BASE = 0x00700000
+CONFIG_SYS_TEXT_BASE = 0x00700000
ALL += $(obj)u-boot.img
# image should be loaded at 0x01000000
#
-TEXT_BASE = 0x03F80000
+CONFIG_SYS_TEXT_BASE = 0x03F80000
+++ /dev/null
-# Modified by Xianghua Xiao, X.Xiao@motorola.com
-# (C) Copyright 2002,2003 Motorola Inc.
-#
-# Copied from ADS85xx for STx GP3 - Dan Malek
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# default CCARBAR is at 0xff700000
-# assume U-Boot is less than 0.5MB
-#
-TEXT_BASE = 0xfff80000
+++ /dev/null
-# Modified by Xianghua Xiao, X.Xiao@motorola.com
-# (C) Copyright 2002,2003 Motorola Inc.
-#
-# Copied from ADS85xx for STx GP3 - Dan Malek
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-# default CCARBAR is at 0xff700000
-# assume U-Boot is less than 0.5MB
-# U-Boot is less than 256K, so push
-# it further up into the flash
-#
-TEXT_BASE = 0xFFFC0000
+++ /dev/null
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# STx XTc
-#
-
-TEXT_BASE = 0x40F00000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0x40000000
#
#
-TEXT_BASE = 0x11080000
+CONFIG_SYS_TEXT_BASE = 0x11080000
_TEXT_BASE:
- .word TEXT_BASE /* sdram load addr from config.mk */
+ .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
.globl lowlevel_init
lowlevel_init:
-TEXT_BASE = 0x10000000
+CONFIG_SYS_TEXT_BASE = 0x10000000
#
#
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xFFFA0000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
#
# ROM version
-TEXT_BASE = 0xBFC00000
+CONFIG_SYS_TEXT_BASE = 0xBFC00000
# RAM version
-#TEXT_BASE = 0x80400000
+#CONFIG_SYS_TEXT_BASE = 0x80400000
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf518-0.0
#
# This is not actually used for Blackfin boards so do not change it
-#TEXT_BASE = do-not-use-me
+#CONFIG_SYS_TEXT_BASE = do-not-use-me
CONFIG_BFIN_CPU = bf537-0.2
# (mem base + reserved)
# For use with external or internal boots.
-TEXT_BASE = 0x80008000
+CONFIG_SYS_TEXT_BASE = 0x80008000
# (mem base + reserved)
# For use with external or internal boots.
-TEXT_BASE = 0x80e80000
+CONFIG_SYS_TEXT_BASE = 0x80e80000
#
-TEXT_BASE = 0x11080000
+CONFIG_SYS_TEXT_BASE = 0x11080000
_TEXT_BASE:
- .word TEXT_BASE /* sdram load addr from config.mk */
+ .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
.globl lowlevel_init
lowlevel_init:
#
-TEXT_BASE = 0x11080000
+CONFIG_SYS_TEXT_BASE = 0x11080000
_TEXT_BASE:
- .word TEXT_BASE /* sdram load addr from config.mk */
+ .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
.globl lowlevel_init
lowlevel_init:
# (mem base + reserved)
# For use with external or internal boots.
-TEXT_BASE = 0x80e80000
+CONFIG_SYS_TEXT_BASE = 0x80e80000
# Used with full SRAM boot.
# This is either with a GP system or a signed boot image.
# easiest, and safest way to go if you can.
-#TEXT_BASE = 0x40270000
+#CONFIG_SYS_TEXT_BASE = 0x40270000
# Handy to get symbols to debug ROM version.
-#TEXT_BASE = 0x0
-#TEXT_BASE = 0x08000000
-#TEXT_BASE = 0x04000000
+#CONFIG_SYS_TEXT_BASE = 0x0
+#CONFIG_SYS_TEXT_BASE = 0x08000000
+#CONFIG_SYS_TEXT_BASE = 0x04000000
#include <asm/arch/clocks.h>
_TEXT_BASE:
- .word TEXT_BASE /* sdram load addr from config.mk */
+ .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
/**************************************************************************
* cpy_clk_code: relocates clock code into SRAM where its safer to execute
#
-TEXT_BASE = 0x11080000
+CONFIG_SYS_TEXT_BASE = 0x11080000
_TEXT_BASE:
- .word TEXT_BASE /* sdram load addr from config.mk */
+ .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
.globl lowlevel_init
lowlevel_init:
#
#
-TEXT_BASE = 0x11080000
+CONFIG_SYS_TEXT_BASE = 0x11080000
#endif
_TEXT_BASE:
- .word TEXT_BASE /* sdram load addr from config.mk */
+ .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
.globl lowlevel_init
lowlevel_init:
# 8000'0000 - 9fff'ffff (512 MB)
# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
# (mem base + reserved)
-TEXT_BASE = 0x80e80000
+
+CONFIG_SYS_TEXT_BASE = 0x80e80000
# (mem base + reserved)
# For use with external or internal boots.
-TEXT_BASE = 0x80e80000
+CONFIG_SYS_TEXT_BASE = 0x80e80000
# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
# (mem base + reserved)
-TEXT_BASE = 0x80e80000
+CONFIG_SYS_TEXT_BASE = 0x80e80000
# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
#
-TEXT_BASE = 0x83FC0000
+CONFIG_SYS_TEXT_BASE = 0x83FC0000
# (mem base + reserved)
# For use with external or internal boots.
-TEXT_BASE = 0x80e80000
+CONFIG_SYS_TEXT_BASE = 0x80e80000
+++ /dev/null
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Total5200 board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFF00000 boot high (standard configuration)
-# 0xFE000000 boot low
-# 0x00100000 boot from RAM (for testing only)
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-## For testing: boot from RAM
-# TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+++ /dev/null
-#
-# (C) Copyright 2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TQM5200 board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFC000000 boot low (standard configuration with room for max 64 MByte
-# Flash ROM)
-# 0xFFF00000 boot high (for a backup copy of U-Boot)
-# 0x00100000 boot from RAM (for testing only)
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot low
-TEXT_BASE = 0xFC000000
-## For a backup copy of U-Boot at the end of flash: boot high
-# TEXT_BASE = 0xFFF00000
-## For testing: boot from RAM
-# TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
#
# TQM8260 boards
#
-
-# This should be equal to the CONFIG_SYS_FLASH_BASE define in config_TQM8260.h
-# for the "final" configuration, with U-Boot in flash, or the address
-# in RAM where U-Boot is loaded at for debugging.
-#
-TEXT_BASE = 0x40000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
+PLATFORM_CPPFLAGS += -I$(TOPDIR)
#
# TQM8272 boards
#
-
-# This should be equal to the CONFIG_SYS_FLASH_BASE define in config_TQM8260.h
-# for the "final" configuration, with U-Boot in flash, or the address
-# in RAM where U-Boot is loaded at for debugging.
-#
-TEXT_BASE = 0x40000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
+PLATFORM_CPPFLAGS += -I$(TOPDIR)
+++ /dev/null
-#
-# Copyright 2004 Freescale Semiconductor, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0x80000000
+++ /dev/null
-# Copyright 2004 Freescale Semiconductor.
-# Modified by Xianghua Xiao, X.Xiao@motorola.com
-# (C) Copyright 2002,Motorola Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# tqm85xx board
-#
-ifeq ($(CONFIG_TQM8548_BE),y)
-TEXT_BASE = 0xfff80000
-else
-TEXT_BASE = 0xfffc0000
-endif
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TQM8xxL boards
-#
-
-TEXT_BASE = 0x40000000
sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-ifndef TEXT_BASE
-TEXT_BASE = 0x0DF40000
+ifndef CONFIG_SYS_TEXT_BASE
+CONFIG_SYS_TEXT_BASE = 0x0DF40000
endif
LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
.globl lowlevel_init
lowlevel_init:
-TEXT_BASE =0xa1f00000
+CONFIG_SYS_TEXT_BASE =0xa1f00000
# 0xa1700000
-#TEXT_BASE = 0
+#CONFIG_SYS_TEXT_BASE = 0
+++ /dev/null
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2002
-# Gregory E. Allen, gallen@arlut.utexas.edu
-# Matthew E. Karger, karger@arlut.utexas.edu
-# Applied Research Laboratories, The University of Texas at Austin
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# UTX8245 boards
-#
-TEXT_BASE = 0xFFF00000
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
+++ /dev/null
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Marel V37 boards
-#
-TEXT_BASE = 0x40000000
+++ /dev/null
-#
-# (C) Copyright 2003-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MarelV38B board
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-TEXT_BASE = 0xFF000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+++ /dev/null
-ifndef NAND_SPL
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-endif
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xfe000000
-endif
-TEXT_BASE = 0x13FD0000
+CONFIG_SYS_TEXT_BASE = 0x13FD0000
#include <version.h>
_TEXT_BASE:
- .word TEXT_BASE /* SDRAM load addr from config.mk */
+ .word CONFIG_SYS_TEXT_BASE /* SDRAM load addr from config.mk */
OMAP5910_LPG1_BASE: .word 0xfffbd000
OMAP5910_TIPB_SWITCHES_BASE: .word 0xfffbc800
-TEXT_BASE = 0xa1000000
+CONFIG_SYS_TEXT_BASE = 0xa1000000
+++ /dev/null
-#
-# (C) Copyright 2001
-# Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Wave 7 Optics boards
-#
-
-#TEXT_BASE = 0xFFF80000
-TEXT_BASE = 0xFFFC0000
-
-#PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARD)
#
# This is config used for compilation of WEP EP250 sources
#
-# You might change location of U-Boot in memory by setting right TEXT_BASE.
+# You might change location of U-Boot in memory by setting right CONFIG_SYS_TEXT_BASE.
# This allows for example having one copy located at the end of ram and stored
# in flash device and later on while developing use other location to test
# the code in RAM device only.
#
-TEXT_BASE = 0xa1fe0000
-#TEXT_BASE = 0xa1001000
+CONFIG_SYS_TEXT_BASE = 0xa1fe0000
+#CONFIG_SYS_TEXT_BASE = 0xa1001000
# MA 02111-1307 USA
#
-#TEXT_BASE = 0xFE000000
-TEXT_BASE = 0x40000000
OBJCFLAGS = --set-section-flags=.ppcenv=contents,alloc,load,data
-TEXT_BASE = 0xa3FB0000
-#TEXT_BASE = 0
+CONFIG_SYS_TEXT_BASE = 0xa3FB0000
+#CONFIG_SYS_TEXT_BASE = 0
# XES XPedite1000 PPC440GX
#
-ifeq ($(ramsym),1)
-TEXT_BASE = 0x07FD0000
-else
-TEXT_BASE = 0xFFF80000
-endif
-
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
+++ /dev/null
-#
-# Copyright 2009 Extreme Engineering Solutions, Inc.
-# Copyright 2007-2008 Freescale Semiconductor, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# XPedite5170
-#
-TEXT_BASE = 0xfff00000
+++ /dev/null
-#
-# Copyright 2008 Extreme Engineering Solutions, Inc.
-# Copyright 2004, 2007 Freescale Semiconductor.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# xpedite5200 board
-#
-ifndef TEXT_BASE
-TEXT_BASE = 0xfff80000
-endif
+++ /dev/null
-#
-# Copyright 2008 Extreme Engineering Solutions, Inc.
-# Copyright 2007-2008 Freescale Semiconductor, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# xpedite5370 board
-#
-ifndef TEXT_BASE
-TEXT_BASE = 0xfff80000
-endif
# Version: Xilinx EDK 6.3 EDK_Gmm.12.3
#
-TEXT_BASE = 0x29000000
+CONFIG_SYS_TEXT_BASE = 0x29000000
PLATFORM_CPPFLAGS += -mno-xl-soft-mul
PLATFORM_CPPFLAGS += -mno-xl-soft-div
-#
-# (C) Copyright 2008
-# Ricardo Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
-# Work supported by Qtechnology http://www.qtec.com
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-#
-
-sinclude $(SRCTREE)/board/xilinx/ppc440-generic/config.mk
+# need to strip off double quotes
+ifneq ($(CONFIG_SYS_LDSCRIPT),)
+LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT))
+endif
-#
-# (C) Copyright 2008
-# Ricardo Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
-# Work supported by Qtechnology http://www.qtec.com
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+# need to strip off double quotes
+ifneq ($(CONFIG_SYS_LDSCRIPT),)
+LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT))
+endif
*(COMMON)
}
- ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your configuration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified.");
+ ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your configuration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified.");
_end = . ;
PROVIDE (end = .);
*(COMMON)
}
- ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your configuration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified.");
+ ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your configuration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified.");
_end = . ;
PROVIDE (end = .);
-#
-# (C) Copyright 2008
-# Ricardo Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
-# Work supported by Qtechnology http://www.qtec.com
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+# need to strip off double quotes
+ifneq ($(CONFIG_SYS_LDSCRIPT),)
+LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT))
+endif
. = ALIGN(4);
}
- ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified.");
+ ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified.");
_end = . ;
PROVIDE (end = .);
. = ALIGN(4);
}
- ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified.");
+ ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified.");
_end = . ;
PROVIDE (end = .);
# This is the address where U-Boot lives in flash:
-#TEXT_BASE = 0
+#CONFIG_SYS_TEXT_BASE = 0
# FIXME: armboot does only work correctly when being compiled
# for the addresses _after_ relocation to RAM!! Otherwhise the
# .bss segment is assumed in flash...
-TEXT_BASE = 0xA3F80000
+CONFIG_SYS_TEXT_BASE = 0xA3F80000
-TEXT_BASE = 0xA3F80000
+CONFIG_SYS_TEXT_BASE = 0xA3F80000
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFFC0000
-TEXT_BASE = 0xa1000000
+CONFIG_SYS_TEXT_BASE = 0xa1000000
+++ /dev/null
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# Modified by, Yuli Barcohen, Arabella Software Ltd. <yuli@arabellasw.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# ZPC.1900 board
-#
-
-TEXT_BASE = 0xFE000000
-#TEXT_BASE = 0x0
-#TEXT_BASE = 0xa1700000
-#TEXT_BASE = 0xa3080000
-TEXT_BASE = 0xa3008000
+#CONFIG_SYS_TEXT_BASE = 0x0
+#CONFIG_SYS_TEXT_BASE = 0xa1700000
+#CONFIG_SYS_TEXT_BASE = 0xa3080000
+CONFIG_SYS_TEXT_BASE = 0xa3008000
#
# :.,$! sort -f -k2,2 -k3,3 -k6,6 -k5,5 -k1,1
#
-# Target ARCH CPU Board name Vendor SoC
-###########################################################################
+# Target ARCH CPU Board name Vendor SoC Options
+###############################################################################################
qong arm arm1136 - davedenx mx31
mx31ads arm arm1136 - freescale mx31
otc570 arm arm926ejs - esd at91
pm9261 arm arm926ejs - ronetix at91
pm9263 arm arm926ejs - ronetix at91
-jadecpu arm arm926ejs jadecpu syteco mb86r0x
suen3 arm arm926ejs km_arm keymile kirkwood
rd6281a arm arm926ejs - Marvell kirkwood
+jadecpu arm arm926ejs jadecpu syteco mb86r0x
mx51evk arm armv7 mx51evk freescale mx5
vision2 arm armv7 vision2 ttcontrol mx5
actux1 arm ixp
actux4 arm ixp
ixdp425 arm ixp
cerf250 arm pxa
-colibri_pxa270 arm pxa
cradle arm pxa
csb226 arm pxa
delta arm pxa
innokom arm pxa
-logodl arm pxa
lubbock arm pxa
pleb2 arm pxa
xaeniax arm pxa
lart arm sa1100
shannon arm sa1100
mimc200 avr32 at32ap - mimc at32ap700x
+ip04 blackfin blackfin
eNET i386 i386 - - sc520
idmr m68k mcf52x2
TASREG m68k mcf52x2 tasreg esd
PCI5441 nios2 nios2 pci5441 psyent
PK1C20 nios2 nios2 pk1c20 psyent
P3G4 powerpc 74xx_7xx evb64260
+PCIPPC2 powerpc 74xx_7xx pcippc2
+PCIPPC6 powerpc 74xx_7xx pcippc2
ppmc7xx powerpc 74xx_7xx
ZUMA powerpc 74xx_7xx evb64260
BAB7xx powerpc 74xx_7xx bab7xx eltec
CPCI750 powerpc 74xx_7xx cpci750 esd
DB64360 powerpc 74xx_7xx db64360 Marvell
DB64460 powerpc 74xx_7xx db64460 Marvell
+p3m7448 powerpc 74xx_7xx p3mx prodrive - p3mx:P3M7448
+p3m750 powerpc 74xx_7xx p3mx prodrive - p3mx:P3M750
aria powerpc mpc512x - davedenx
PATI powerpc mpc5xx pati mpl
a4m072 powerpc mpc5xxx a4m072
BC3450 powerpc mpc5xxx bc3450
canmb powerpc mpc5xxx
cm5200 powerpc mpc5xxx
-hmi1001 powerpc mpc5xxx - manroland
inka4x0 powerpc mpc5xxx
ipek01 powerpc mpc5xxx
jupiter powerpc mpc5xxx
-mucmc52 powerpc mpc5xxx - manroland
munices powerpc mpc5xxx
o2dnt powerpc mpc5xxx
-uc101 powerpc mpc5xxx - manroland
+PM520 powerpc mpc5xxx pm520
v38b powerpc mpc5xxx
pf5200 powerpc mpc5xxx - esd
+hmi1001 powerpc mpc5xxx - manroland
+mucmc52 powerpc mpc5xxx - manroland
+uc101 powerpc mpc5xxx - manroland
+MVSMR powerpc mpc5xxx mvsmr matrix_vision
aev powerpc mpc5xxx tqm5200 tqc
+TB5200 powerpc mpc5xxx tqm5200 tqc
+lite5200b powerpc mpc5xxx icecube - - IceCube:MPC5200_DDR,LITE5200B
+lite5200b_PM powerpc mpc5xxx icecube - - IceCube:MPC5200_DDR,LITE5200B,LITE5200B_PM
+mcc200 powerpc mpc5xxx mcc200 - - mcc200
+mcc200_COM12 powerpc mpc5xxx mcc200 - - mcc200:CONSOLE_COM12
+mcc200_highboot powerpc mpc5xxx mcc200 - - mcc200:SYS_TEXT_BASE=0xFFF00000
+mcc200_SDRAM powerpc mpc5xxx mcc200 - - mcc200:MCC200_SDRAM
+prs200 powerpc mpc5xxx mcc200 - - mcc200:PRS200,MCC200_SDRAM
+prs200_DDR powerpc mpc5xxx mcc200 - - mcc200:PRS200
+prs200_highboot powerpc mpc5xxx mcc200 - - mcc200:PRS200,SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM
+TOP5200 powerpc mpc5xxx top5200 emk - TOP5200:TOP5200
+pcm030 powerpc mpc5xxx pcm030 phytec - pcm030
+cam5200 powerpc mpc5xxx tqm5200 tqc - TQM5200:CAM5200,TQM5200S,TQM5200_B
+fo300 powerpc mpc5xxx tqm5200 tqc - TQM5200:FO300
+MiniFAP powerpc mpc5xxx tqm5200 tqc - TQM5200:MINIFAP
+TQM5200 powerpc mpc5xxx tqm5200 tqc - TQM5200:
+MVBC_P powerpc mpc5xxx mvbc_p matrix_vision - MVBC_P:MVBC_P
sorcery powerpc mpc8220
A3000 powerpc mpc824x a3000
barco powerpc mpc824x
BMW powerpc mpc824x bmw
CU824 powerpc mpc824x cu824
+eXalion powerpc mpc824x eXalion
MOUSSE powerpc mpc824x mousse
MUSENKI powerpc mpc824x musenki
MVBLUE powerpc mpc824x mvblue
utx8245 powerpc mpc824x
debris powerpc mpc824x - etin
kvme080 powerpc mpc824x - etin
+CPC45 powerpc mpc824x cpc45 - - CPC45
atc powerpc mpc8260
+ep8248 powerpc mpc8260 ep8248
ep8260 powerpc mpc8260
ep82xxm powerpc mpc8260
gw8260 powerpc mpc8260
hymod powerpc mpc8260
IDS8247 powerpc mpc8260 ids8247
+ISPAN powerpc mpc8260 ispan
sacsng powerpc mpc8260
sbc8260 powerpc mpc8260
ZPC1900 powerpc mpc8260 zpc1900
mgcoge powerpc mpc8260 - keymile
SCM powerpc mpc8260 - siemens
TQM8272 powerpc mpc8260 tqm8272 tqc
+CPU86 powerpc mpc8260 cpu86 - - CPU86
+CPU87 powerpc mpc8260 cpu87 - - CPU87
+PM825 powerpc mpc8260 pm826 - - PM826:PCI,SYS_TEXT_BASE=0xFF000000
+PM826 powerpc mpc8260 pm826 - - PM826:SYS_TEXT_BASE=0xFF000000
+PM828 powerpc mpc8260 pm828 - - PM828
+ep8248E powerpc mpc8260 ep8248 - - ep8248
+Rattler powerpc mpc8260 rattler - - Rattler
+PQ2FADS powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS
ve8313 powerpc mpc83xx ve8313
kmeter1 powerpc mpc83xx kmeter1 keymile
MVBLM7 powerpc mpc83xx mvblm7 matrix_vision
TQM834x powerpc mpc83xx tqm834x tqc
+sbc8349 powerpc mpc83xx sbc8349 - - sbc8349
+caddy2 powerpc mpc83xx vme8349 esd - vme8349:CADDY2
+vme8349 powerpc mpc83xx vme8349 esd - vme8349
PM854 powerpc mpc85xx pm854
PM856 powerpc mpc85xx pm856
+P1022DS powerpc mpc85xx p1022ds freescale
+P2020DS powerpc mpc85xx p2020ds freescale
stxgp3 powerpc mpc85xx stxgp3 stx
+P4080DS powerpc mpc85xx corenet_ds freescale
+sbc8540 powerpc mpc85xx sbc8560 - - SBC8540
+sbc8548 powerpc mpc85xx sbc8548 - - sbc8548
+sbc8560 powerpc mpc85xx sbc8560 - - sbc8560
+stxssa powerpc mpc85xx stxssa stx - stxssa
+TQM8540 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8540,TQM8540=y,HOSTNAME=tqm8540,BOARDNAME="TQM8540"
+TQM8541 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8541,TQM8541=y,HOSTNAME=tqm8541,BOARDNAME="TQM8541"
+TQM8548 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8548,TQM8548=y,HOSTNAME=tqm8548,BOARDNAME="TQM8548"
+TQM8555 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8555,TQM8555=y,HOSTNAME=tqm8555,BOARDNAME="TQM8555"
+TQM8560 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8560,TQM8560=y,HOSTNAME=tqm8560,BOARDNAME="TQM8560"
+Adder powerpc mpc8xx adder
+ADS860 powerpc mpc8xx fads
c2mon powerpc mpc8xx
EP88x powerpc mpc8xx ep88x
ETX094 powerpc mpc8xx etx094
+FADS823 powerpc mpc8xx fads
FLAGADM powerpc mpc8xx flagadm
+GEN860T powerpc mpc8xx gen860t
GENIETV powerpc mpc8xx genietv
hermes powerpc mpc8xx
+ICU862 powerpc mpc8xx icu862
IP860 powerpc mpc8xx ip860
LANTEC powerpc mpc8xx lantec
lwmon powerpc mpc8xx
+MBX powerpc mpc8xx mbx8xx
+MBX860T powerpc mpc8xx mbx8xx
NX823 powerpc mpc8xx nx823
quantum powerpc mpc8xx
R360MPI powerpc mpc8xx r360mpi
rmu powerpc mpc8xx
RPXlite powerpc mpc8xx
spc1920 powerpc mpc8xx
-uc100 powerpc mpc8xx - manroland
+v37 powerpc mpc8xx
MHPC powerpc mpc8xx mhpc eltec
TOP860 powerpc mpc8xx top860 emk
kmsupx4 powerpc mpc8xx km8xx keymile
KUP4K powerpc mpc8xx kup4k kup
KUP4X powerpc mpc8xx kup4x kup
ELPT860 powerpc mpc8xx elpt860 LEOX
+uc100 powerpc mpc8xx - manroland
IAD210 powerpc mpc8xx - siemens
QS823 powerpc mpc8xx qs850 snmc
QS850 powerpc mpc8xx qs850 snmc
QS860T powerpc mpc8xx qs860t snmc
stxxtc powerpc mpc8xx stxxtc stx
+FPS850L powerpc mpc8xx tqm8xx tqc
+FPS860L powerpc mpc8xx tqm8xx tqc
+NSCU powerpc mpc8xx tqm8xx tqc
SM850 powerpc mpc8xx tqm8xx tqc
+TK885D powerpc mpc8xx tqm8xx tqc
+TQM823L powerpc mpc8xx tqm8xx tqc
+TQM823M powerpc mpc8xx tqm8xx tqc
+TQM850L powerpc mpc8xx tqm8xx tqc
+TQM850M powerpc mpc8xx tqm8xx tqc
+TQM855L powerpc mpc8xx tqm8xx tqc
+TQM855M powerpc mpc8xx tqm8xx tqc
+TQM860L powerpc mpc8xx tqm8xx tqc
+TQM860M powerpc mpc8xx tqm8xx tqc
+TQM862L powerpc mpc8xx tqm8xx tqc
+TQM862M powerpc mpc8xx tqm8xx tqc
+TQM866M powerpc mpc8xx tqm8xx tqc
+TQM885D powerpc mpc8xx tqm8xx tqc
AMX860 powerpc mpc8xx amx860 westel
+AdderII powerpc mpc8xx adder - - Adder:MPC852T
+CP850 powerpc mpc8xx nc650 - - NC650:CP850=1,IDS852_REV2=1
+IVML24 powerpc mpc8xx ivm - - IVML24:IVML24_16M
+IVMS8 powerpc mpc8xx ivm - - IVMS8:IVMS8_16M
+NETTA powerpc mpc8xx netta - - NETTA
+NETTA2 powerpc mpc8xx netta2 - - NETTA2:NETTA2_VERSION=1
+NETVIA powerpc mpc8xx netvia - - NETVIA:NETVIA_VERSION=1
+TTTech powerpc mpc8xx tqm8xx tqc - TQM823L:LCD,SHARP_LQ104V7DS01
+wtk powerpc mpc8xx tqm8xx tqc - TQM823L:LCD,SHARP_LQ065T9DR51U
csb272 powerpc ppc4xx
csb472 powerpc ppc4xx
ERIC powerpc ppc4xx eric
sbc405 powerpc ppc4xx
sc3 powerpc ppc4xx
t3corp powerpc ppc4xx
+W7OLMC powerpc ppc4xx w7o
+W7OLMG powerpc ppc4xx w7o
zeus powerpc ppc4xx
acadia powerpc ppc4xx - amcc
bamboo powerpc ppc4xx - amcc
-bluestone powerpc ppc4xx - amcc
bubinga powerpc ppc4xx - amcc
ebony powerpc ppc4xx - amcc
katmai powerpc ppc4xx - amcc
redwood powerpc ppc4xx - amcc
taihu powerpc ppc4xx - amcc
taishan powerpc ppc4xx - amcc
+walnut powerpc ppc4xx walnut amcc
yucca powerpc ppc4xx - amcc
AP1000 powerpc ppc4xx ap1000 amirix
CRAYL1 powerpc ppc4xx L1 cray
CANBT powerpc ppc4xx canbt esd
CMS700 powerpc ppc4xx cms700 esd
CPCI2DP powerpc ppc4xx cpci2dp esd
+CPCI405 powerpc ppc4xx cpci405 esd
DP405 powerpc ppc4xx dp405 esd
DU405 powerpc ppc4xx du405 esd
DU440 powerpc ppc4xx du440 esd
HH405 powerpc ppc4xx hh405 esd
HUB405 powerpc ppc4xx hub405 esd
+OCRTC powerpc ppc4xx ocrtc esd
PCI405 powerpc ppc4xx pci405 esd
PLU405 powerpc ppc4xx plu405 esd
PMC405 powerpc ppc4xx pmc405 esd
icon powerpc ppc4xx - mosaixtech
MIP405 powerpc ppc4xx mip405 mpl
PIP405 powerpc ppc4xx pip405 mpl
+hcu4 powerpc ppc4xx hcu4 netstal
+hcu5 powerpc ppc4xx hcu5 netstal
+mcu25 powerpc ppc4xx mcu25 netstal
alpr powerpc ppc4xx - prodrive
p3p440 powerpc ppc4xx - prodrive
KAREF powerpc ppc4xx karef sandburst
+acadia_nand powerpc ppc4xx acadia amcc - acadia:NAND_U_BOOT=y,SYS_TEXT_BASE=0x01000000
+bamboo_nand powerpc ppc4xx bamboo amcc - bamboo:NAND_U_BOOT=y,SYS_TEXT_BASE=0x01000000
+haleakala_nand powerpc ppc4xx kilauea amcc - kilauea:NAND_U_BOOT=y,SYS_TEXT_BASE=0x01000000
+kilauea powerpc ppc4xx kilauea amcc - kilauea:KILAUEA
+kilauea_nand powerpc ppc4xx kilauea amcc - kilauea:NAND_U_BOOT=y,SYS_TEXT_BASE=0x01000000
+rainier powerpc ppc4xx sequoia amcc - sequoia:RAINIER
+rainier_nand powerpc ppc4xx sequoia amcc - sequoia:RAINIER,NAND_U_BOOT=y,SYS_TEXT_BASE=0x01000000
+rainier_ramboot powerpc ppc4xx sequoia amcc - sequoia:RAINIER,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds
+sequoia powerpc ppc4xx sequoia amcc - sequoia:SEQUOIA
+sequoia_nand powerpc ppc4xx sequoia amcc - sequoia:SEQUOIA,NAND_U_BOOT=y,SYS_TEXT_BASE=0x01000000
+sequoia_ramboot powerpc ppc4xx sequoia amcc - sequoia:SEQUOIA,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds
+fx12mm powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0x03000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds
+fx12mm_flash powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0xFFCB0000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds
+intip powerpc ppc4xx intip gdsys - intip:INTIB
+MIP405T powerpc ppc4xx mip405 mpl - MIP405:MIP405T
+ml507 powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0x04000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds
+ml507_flash powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0xFE360000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds
+arches powerpc ppc4xx canyonlands amcc - canyonlands:ARCHES
+glacier powerpc ppc4xx canyonlands amcc - canyonlands:GLACIER
+glacier_nand powerpc ppc4xx canyonlands amcc - canyonlands:GLACIER,NAND_U_BOOT=y,SYS_TEXT_BASE=0x01000000
+v5fx30teval powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0x03000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds
grsim sparc leon3 - gaisler
+PM825_ROMBOOT_BIGFLASH powerpc mpc8260 pm826 - - PM826:PCI,BOOT_ROM,FLASH_32MB,SYS_TEXT_BASE=0xFF800000
+PM826_ROMBOOT_BIGFLASH powerpc mpc8260 pm826 - - PM826:BOOT_ROM,FLASH_32MB,SYS_TEXT_BASE=0xFF800000
imx31_litekit arm arm1136 - logicpd mx31
omap2420h4 arm arm1136 - ti omap24xx
tnetv107x_evm arm arm1176 tnetv107xevm ti tnetv107x
omap3_beagle arm armv7 beagle ti omap3
omap3_evm arm armv7 evm ti omap3
omap3_sdp3430 arm armv7 sdp3430 ti omap3
-omap4_panda arm armv7 panda ti omap4
-omap4_sdp4430 arm armv7 sdp4430 ti omap4
-am3517_evm arm armv7 am3517evm logicpd omap3
-devkit8000 arm armv7 devkit8000 timll omap3
igep0020 arm armv7 igep0020 isee omap3
igep0030 arm armv7 igep0030 isee omap3
+am3517_evm arm armv7 am3517evm logicpd omap3
+devkit8000 arm armv7 devkit8000 timll omap3
+omap4_panda arm armv7 panda ti omap4
+omap4_sdp4430 arm armv7 sdp4430 ti omap4
s5p_goni arm armv7 goni samsung s5pc1xx
smdkc100 arm armv7 smdkc100 samsung s5pc1xx
ixdpg425 arm ixp
lpd7a400 arm lh7a40x lpd7a40x
lpd7a404 arm lh7a40x lpd7a40x
+colibri_pxa270 arm pxa
pxa255_idp arm pxa
wepep250 arm pxa
xsengine arm pxa
bct-brettl2 blackfin blackfin
bf518f-ezbrd blackfin blackfin
bf526-ezbrd blackfin blackfin
-bf527-ad7160-eval blackfin blackfin
bf527-ezkit blackfin blackfin
bf527-sdp blackfin blackfin
bf533-ezkit blackfin blackfin
cm-bf548 blackfin blackfin
cm-bf561 blackfin blackfin
ibf-dsp561 blackfin blackfin
-ip04 blackfin blackfin
tcm-bf518 blackfin blackfin
tcm-bf537 blackfin blackfin
M5208EVBE m68k mcf52x2 m5208evbe freescale
M5275EVB m68k mcf52x2 m5275evb freescale
M5282EVB m68k mcf52x2 m5282evb freescale
M53017EVB m68k mcf52x2 m53017evb freescale
-microblaze-generic microblaze microblaze microblaze-generic xilinx
mpc7448hpc2 powerpc 74xx_7xx mpc7448hpc2 freescale
+EVB64260 powerpc 74xx_7xx evb64260 - - EVB64260
+EVB64260_750CX powerpc 74xx_7xx evb64260 - - EVB64260
pdm360ng powerpc mpc512x
mecp5123 powerpc mpc512x - esd
+mpc5121ads powerpc mpc512x mpc5121ads freescale
+mpc5121ads_rev2 powerpc mpc512x mpc5121ads freescale - mpc5121ads:MPC5121ADS_REV2
cmi_mpc5xx powerpc mpc5xx cmi
+digsy_mtc powerpc mpc5xxx digsy_mtc
motionpro powerpc mpc5xxx
cpci5200 powerpc mpc5xxx - esd
mecp5200 powerpc mpc5xxx - esd
+icecube_5200 powerpc mpc5xxx icecube - - IceCube
+icecube_5200_DDR powerpc mpc5xxx icecube - - IceCube:MPC5200_DDR
+icecube_5200_LOWBOOT powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF000000
+icecube_5200_LOWBOOT08 powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF800000
+Lite5200 powerpc mpc5xxx icecube - - IceCube
+lite5200b_LOWBOOT powerpc mpc5xxx icecube - - IceCube:MPC5200_DDR,LITE5200B,SYS_TEXT_BASE=0xFF000000
+Lite5200_LOWBOOT powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF000000
+Lite5200_LOWBOOT08 powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF800000
+mcc200_COM12_highboot powerpc mpc5xxx mcc200 - - mcc200:CONSOLE_COM12,SYS_TEXT_BASE=0xFFF00000
+mcc200_COM12_SDRAM powerpc mpc5xxx mcc200 - - mcc200:CONSOLE_COM12,MCC200_SDRAM
+mcc200_highboot_SDRAM powerpc mpc5xxx mcc200 - - mcc200:SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM
+PM520_DDR powerpc mpc5xxx pm520 - - PM520:MPC5200_DDR
+PM520_ROMBOOT powerpc mpc5xxx pm520 - - PM520:BOOT_ROM
+prs200_highboot_DDR powerpc mpc5xxx mcc200 - - mcc200:PRS200,SYS_TEXT_BASE=0xFFF00000
+EVAL5200 powerpc mpc5xxx top5200 emk - TOP5200:EVAL5200
+MINI5200 powerpc mpc5xxx top5200 emk - TOP5200:MINI5200
+pcm030_LOWBOOT powerpc mpc5xxx pcm030 phytec - pcm030:SYS_TEXT_BASE=0xFF000000
+cam5200_niosflash powerpc mpc5xxx tqm5200 tqc - TQM5200:CAM5200,TQM5200S,TQM5200_B,CAM5200_NIOSFLASH
+TB5200_B powerpc mpc5xxx tqm5200 tqc - TB5200:TQM5200_B
+TQM5200S powerpc mpc5xxx tqm5200 tqc - TQM5200:TQM5200_B,TQM5200S
+TQM5200S_HIGHBOOT powerpc mpc5xxx tqm5200 tqc - TQM5200:TQM5200_B,TQM5200S,SYS_TEXT_BASE=0xFFF00000
+TQM5200_B powerpc mpc5xxx tqm5200 tqc - TQM5200:TQM5200_B
+TQM5200_B_HIGHBOOT powerpc mpc5xxx tqm5200 tqc - TQM5200:TQM5200_B,SYS_TEXT_BASE=0xFFF00000
+TQM5200_STK100 powerpc mpc5xxx tqm5200 tqc - TQM5200:STK52XX_REV100
+galaxy5200 powerpc mpc5xxx galaxy5200 - - galaxy5200:galaxy5200
+Total5200 powerpc mpc5xxx total5200 - - Total5200:TOTAL5200_REV=1
+Total5200_lowboot powerpc mpc5xxx total5200 - - Total5200:TOTAL5200_REV=1,SYS_TEXT_BASE=0xFE000000
+Total5200_Rev2 powerpc mpc5xxx total5200 - - Total5200:TOTAL5200_REV=2
+Total5200_Rev2_lowboot powerpc mpc5xxx total5200 - - Total5200:TOTAL5200_REV=2,SYS_TEXT_BASE=0xFE000000
Alaska8220 powerpc mpc8220 alaska
Yukon8220 powerpc mpc8220 alaska
HIDDEN_DRAGON powerpc mpc824x hidden_dragon
+Sandpoint8240 powerpc mpc824x sandpoint
+Sandpoint8245 powerpc mpc824x sandpoint
+CPC45_ROMBOOT powerpc mpc824x cpc45 - - CPC45:BOOT_ROM
+cogent_mpc8260 powerpc mpc8260 cogent
IPHASE4539 powerpc mpc8260 iphase4539
+muas3001 powerpc mpc8260 muas3001
ppmc8260 powerpc mpc8260
RPXsuper powerpc mpc8260 rpxsuper
rsdproto powerpc mpc8260
MPC8266ADS powerpc mpc8260 mpc8266ads freescale
-mpc8308_p1m powerpc mpc83xx
+CPU86_ROMBOOT powerpc mpc8260 cpu86 - - CPU86:BOOT_ROM
+CPU87_ROMBOOT powerpc mpc8260 cpu87 - - CPU87:BOOT_ROM
+ISPAN_REVB powerpc mpc8260 ispan - - ISPAN:SYS_REV_B
+PM825_BIGFLASH powerpc mpc8260 pm826 - - PM826:PCI,FLASH_32MB,SYS_TEXT_BASE=0x40000000
+PM825_ROMBOOT powerpc mpc8260 pm826 - - PM826:PCI,BOOT_ROM,SYS_TEXT_BASE=0xFF800000
+PM826_BIGFLASH powerpc mpc8260 pm826 - - PM826:FLASH_32MB,SYS_TEXT_BASE=0x40000000
+PM826_ROMBOOT powerpc mpc8260 pm826 - - PM826:BOOT_ROM,SYS_TEXT_BASE=0xFF800000
+PM828_PCI powerpc mpc8260 pm828 - - PM828:PCI
+PM828_ROMBOOT powerpc mpc8260 pm828 - - PM828:BOOT_ROM,SYS_TEXT_BASE=0xFF800000
+Rattler8248 powerpc mpc8260 rattler - - Rattler:MPC8248
+TQM8255_AA powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8255,300MHz
+TQM8260_AA powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,200MHz
+TQM8260_AB powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,200MHz,L2_CACHE,BUSMODE_60x
+TQM8260_AC powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,200MHz,L2_CACHE,BUSMODE_60x
+TQM8260_AD powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz,BUSMODE_60x
+TQM8260_AE powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,266MHz
+TQM8260_AF powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz,BUSMODE_60x
+TQM8260_AG powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz
+TQM8260_AH powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz,L2_CACHE,BUSMODE_60x
+TQM8260_AI powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz,BUSMODE_60x
+TQM8265_AA powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8265,300MHz,BUSMODE_60x
+muas3001_dev powerpc mpc8260 muas3001 - - muas3001:MUAS_DEV_BOARD
+MPC8260ADS powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS
+MPC8272ADS powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8272ADS
+PQ2FADS-VR powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000
+PQ2FADS-ZU powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS
+PQ2FADS_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,SYS_TEXT_BASE=0xFF800000
+VoVPN-GW_100MHz powerpc mpc8260 vovpn-gw funkwerk - VoVPN-GW:CLKIN_100MHz
+VoVPN-GW_66MHz powerpc mpc8260 vovpn-gw funkwerk - VoVPN-GW:CLKIN_66MHz
MPC8308RDB powerpc mpc83xx mpc8308rdb freescale
MPC8323ERDB powerpc mpc83xx mpc8323erdb freescale
MPC8349EMDS powerpc mpc83xx mpc8349emds freescale
MPC837XERDB powerpc mpc83xx mpc837xerdb freescale
+sbc8349_PCI_33 powerpc mpc83xx sbc8349 - - sbc8349:PCI,PCI_33M
+sbc8349_PCI_66 powerpc mpc83xx sbc8349 - - sbc8349:PCI,PCI_66M
+SIMPC8313_LP powerpc mpc83xx simpc8313 sheldon - SIMPC8313:NAND_LP
+SIMPC8313_SP powerpc mpc83xx simpc8313 sheldon - SIMPC8313:NAND_SP
+MPC8313ERDB_33 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_33MHZ
+MPC8313ERDB_66 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_66MHZ
+MPC8315ERDB powerpc mpc83xx mpc8315erdb freescale - MPC8315ERDB
+MPC832XEMDS powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:
+MPC832XEMDS_ATM powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1
+MPC8349ITX powerpc mpc83xx mpc8349itx freescale - MPC8349ITX:MPC8349ITX
+MPC8349ITXGP powerpc mpc83xx mpc8349itx freescale - MPC8349ITX:MPC8349ITXGP,SYS_TEXT_BASE=0xFE000000
+MPC8360EMDS powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:
+MPC8360EMDS_ATM powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1
+MPC8360ERDK powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK
+MPC8360ERDK_33 powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK:CLKIN_33MHZ
+MPC8360ERDK_66 powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK
+MPC837XEMDS powerpc mpc83xx mpc837xemds freescale - MPC837XEMDS
ATUM8548 powerpc mpc85xx atum8548
socrates powerpc mpc85xx socrates
MPC8540ADS powerpc mpc85xx mpc8540ads freescale
MPC8544DS powerpc mpc85xx mpc8544ds freescale
MPC8560ADS powerpc mpc85xx mpc8560ads freescale
MPC8568MDS powerpc mpc85xx mpc8568mds freescale
-P4080DS powerpc mpc85xx corenet_ds freescale
XPEDITE5200 powerpc mpc85xx xpedite5200 xes
XPEDITE5370 powerpc mpc85xx xpedite5370 xes
-P1022DS powerpc mpc85xx p1022ds freescale
+sbc8540_33 powerpc mpc85xx sbc8560 - - SBC8540
+sbc8540_66 powerpc mpc85xx sbc8560 - - SBC8540
+sbc8548_PCI_33 powerpc mpc85xx sbc8548 - - sbc8548:PCI,33
+sbc8548_PCI_66 powerpc mpc85xx sbc8548 - - sbc8548:PCI,66
+sbc8560_33 powerpc mpc85xx sbc8560 - - sbc8560
+sbc8560_66 powerpc mpc85xx sbc8560 - - sbc8560
+stxssa_4M powerpc mpc85xx stxssa stx - stxssa:STXSSA_4M
+TQM8548_AG powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8548,TQM8548_AG=y,HOSTNAME=tqm8485,BOARDNAME="TQM8548_AG"
+TQM8548_BE powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8548,TQM8548_BE=y,HOSTNAME=tqm8548,BOARDNAME="TQM8548_BE"
+MPC8540EVAL powerpc mpc85xx mpc8540eval - - MPC8540EVAL:SYSCLK_66M
+MPC8540EVAL_33 powerpc mpc85xx mpc8540eval - - MPC8540EVAL
+MPC8540EVAL_66 powerpc mpc85xx mpc8540eval - - MPC8540EVAL:SYSCLK_66M
+P2020DS_36BIT powerpc mpc85xx p2020ds freescale - P2020DS:36BIT
+MPC8536DS powerpc mpc85xx mpc8536ds freescale - MPC8536DS
+MPC8536DS_36BIT powerpc mpc85xx mpc8536ds freescale - MPC8536DS:36BIT
+MPC8536DS_NAND powerpc mpc85xx mpc8536ds freescale - MPC8536DS:NAND
+MPC8541CDS powerpc mpc85xx mpc8541cds freescale - MPC8541CDS
+MPC8548CDS powerpc mpc85xx mpc8548cds freescale - MPC8548CDS
+MPC8555CDS powerpc mpc85xx mpc8555cds freescale - MPC8555CDS
+MPC8569MDS powerpc mpc85xx mpc8569mds freescale - MPC8569MDS
+MPC8569MDS_ATM powerpc mpc85xx mpc8569mds freescale - MPC8569MDS:ATM
+MPC8569MDS_NAND powerpc mpc85xx mpc8569mds freescale - MPC8569MDS:NAND
+MPC8572DS powerpc mpc85xx mpc8572ds freescale - MPC8572DS
+MPC8572DS_36BIT powerpc mpc85xx mpc8572ds freescale - MPC8572DS:36BIT
+P1011RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011
+P1011RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011,NAND
+P1011RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011,SDCARD
+P1020RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB
+P1020RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,NAND
+P1020RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,SDCARD
+P2010RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010
+P2010RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010,NAND
+P2010RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010,SDCARD
+P2020DS_DDR2 powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020,DDR2
+P2020RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020
+P2020RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020,NAND
+P2020RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020,SDCARD
sbc8641d powerpc mpc86xx
MPC8610HPCD powerpc mpc86xx mpc8610hpcd freescale
XPEDITE5170 powerpc mpc86xx xpedite5170 xes
+MPC8641HPCN powerpc mpc86xx mpc8641hpcn freescale - MPC8641HPCN
cogent_mpc8xx powerpc mpc8xx cogent
ESTEEM192E powerpc mpc8xx esteem192e
+FADS850SAR powerpc mpc8xx fads
+FADS860T powerpc mpc8xx fads
+MPC86xADS powerpc mpc8xx fads
+MPC885ADS powerpc mpc8xx fads
RPXClassic powerpc mpc8xx
RRvision powerpc mpc8xx
+SPD823TS powerpc mpc8xx spd8xx
svm_sc8xx powerpc mpc8xx
+SXNI855T powerpc mpc8xx sixnet
+virtlab2 powerpc mpc8xx tqm8xx tqc
+Adder87x powerpc mpc8xx adder - - Adder
+AdderUSB powerpc mpc8xx adder - - Adder
+GEN860T_SC powerpc mpc8xx gen860t - - GEN860T:SC
+ICU862_100MHz powerpc mpc8xx icu862 - - ICU862:100MHz
+IVML24_128 powerpc mpc8xx ivm - - IVML24:IVML24_32M
+IVML24_256 powerpc mpc8xx ivm - - IVML24:IVML24_64M
+IVMS8_128 powerpc mpc8xx ivm - - IVMS8:IVMS8_32M
+IVMS8_256 powerpc mpc8xx ivm - - IVMS8:IVMS8_64M
+NC650_Rev1 powerpc mpc8xx nc650 - - NC650:IDS852_REV2=1
+NC650_Rev2 powerpc mpc8xx nc650 - - NC650:IDS852_REV1=1
+NETTA2_V2 powerpc mpc8xx netta2 - - NETTA2:NETTA2_VERSION=2
+NETTA_6412 powerpc mpc8xx netta - - NETTA:NETTA_6412=1
+NETTA_ISDN powerpc mpc8xx netta - - NETTA:NETTA_ISDN=1
+NETTA_ISDN_6412 powerpc mpc8xx netta - - NETTA:NETTA_ISDN=1,NETTA_6412=1
+NETTA_SWAPHOOK powerpc mpc8xx netta - - NETTA:NETTA_SWAPHOOK=1
+NETVIA_V2 powerpc mpc8xx netvia - - NETVIA:NETVIA_VERSION=2
+TQM823L_LCD powerpc mpc8xx tqm8xx tqc - TQM823L:LCD,NEC_NL6448BC20
+NETPHONE powerpc mpc8xx netphone - - NETPHONE:NETPHONE_VERSION=1
+NETPHONE_V2 powerpc mpc8xx netphone - - NETPHONE:NETPHONE_VERSION=2
+RPXlite_DW powerpc mpc8xx RPXlite_dw - - RPXlite_DW
+RPXlite_DW_64 powerpc mpc8xx RPXlite_dw - - RPXlite_DW:RPXlite_64MHz
+RPXlite_DW_64_LCD powerpc mpc8xx RPXlite_dw - - RPXlite_DW:RPXlite_64MHz,LCD,NEC_NL6448BC20
+RPXlite_DW_LCD powerpc mpc8xx RPXlite_dw - - RPXlite_DW:LCD,NEC_NL6448BC20
+RPXlite_DW_NVRAM powerpc mpc8xx RPXlite_dw - - RPXlite_DW:ENV_IS_IN_NVRAM
+RPXlite_DW_NVRAM_64 powerpc mpc8xx RPXlite_dw - - RPXlite_DW:RPXlite_64MHz,ENV_IS_IN_NVRAM
+RPXlite_DW_NVRAM_64_LCD powerpc mpc8xx RPXlite_dw - - RPXlite_DW:RPXlite_64MHz,LCD,NEC_NL6448BC20,ENV_IS_IN_NVRAM
+RPXlite_DW_NVRAM_LCD powerpc mpc8xx RPXlite_dw - - RPXlite_DW:LCD,NEC_NL6448BC20,ENV_IS_IN_NVRAM
+RRvision_LCD powerpc mpc8xx RRvision - - RRvision:LCD,SHARP_LQ104V7DS01
pcs440ep powerpc ppc4xx
quad100hd powerpc ppc4xx
+CPCI4052 powerpc ppc4xx cpci405 esd
+CPCI405AB powerpc ppc4xx cpci405 esd
+CPCI405DT powerpc ppc4xx cpci405 esd
dlvision powerpc ppc4xx - gdsys
gdppc440etx powerpc ppc4xx - gdsys
CPCIISER4 powerpc ppc4xx cpciiser4 esd
PMC405DE powerpc ppc4xx pmc405de esd
METROBOX powerpc ppc4xx metrobox sandburst
XPEDITE1000 powerpc ppc4xx xpedite1000 xes
+korat_perm powerpc ppc4xx korat - - korat:KORAT_PERMANENT
+haleakala powerpc ppc4xx kilauea amcc - kilauea:HALEAKALA
+sycamore powerpc ppc4xx walnut amcc - walnut
+devconcenter powerpc ppc4xx intip gdsys - intip:DEVCONCENTER
+canyonlands powerpc ppc4xx canyonlands amcc - canyonlands:CANYONLANDS
+yellowstone powerpc ppc4xx yosemite amcc - yosemite:YELLOWSTONE
+yosemite powerpc ppc4xx yosemite amcc - yosemite:YOSEMITE
+CATcenter powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1
+CATcenter_25 powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_25
+CATcenter_33 powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_33
+xilinx-ppc405-generic powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0x04000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds
+xilinx-ppc440-generic powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds
+mpc8308_p1m powerpc mpc83xx
+bluestone powerpc ppc4xx - amcc
grsim_leon2 sparc leon2 - gaisler
gr_cpci_ax2000 sparc leon3 - gaisler
gr_ep2s60 sparc leon3 - gaisler
gr_xc3s_1500 sparc leon3 - gaisler
+icecube_5200_DDR_LOWBOOT powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF800000,MPC5200_DDR
+MPC832XEMDS_SLAVE powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PCI,PCISLAVE
+MPC8360EMDS_SLAVE powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCISLAVE
+microblaze-generic microblaze microblaze microblaze-generic xilinx
+digsy_mtc_LOWBOOT powerpc mpc5xxx digsy_mtc - - digsy_mtc:SYS_TEXT_BASE=0xFF000000
+digsy_mtc_RAMBOOT powerpc mpc5xxx digsy_mtc - - digsy_mtc:SYS_TEXT_BASE=0x00100000
+PPChameleonEVB powerpc ppc4xx PPChameleonEVB dave
+PM520_ROMBOOT_DDR powerpc mpc5xxx pm520 - - PM520:MPC5200_DDR,BOOT_ROM
+galaxy5200_LOWBOOT powerpc mpc5xxx galaxy5200 - - galaxy5200:galaxy5200_LOWBOOT
+icecube_5200_DDR_LOWBOOT08 powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF800000,MPC5200_DDR
+mcc200_COM12_highboot_SDRAM powerpc mpc5xxx mcc200 - - mcc200:CONSOLE_COM12,SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM
+linkstation_HGLAN powerpc mpc824x linkstation - - linkstation:HGLAN=1
+PM828_ROMBOOT_PCI powerpc mpc8260 pm828 - - PM828:PCI,BOOT_ROM,SYS_TEXT_BASE=0xFF800000
+MPC8260ADS_33MHz powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=33000000
+MPC8260ADS_33MHz_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=33000000,SYS_TEXT_BASE=0xFF800000
+MPC8260ADS_40MHz powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=40000000
+MPC8260ADS_40MHz_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=40000000,SYS_TEXT_BASE=0xFF800000
+MPC8260ADS_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,SYS_TEXT_BASE=0xFF800000
+MPC8272ADS_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8272ADS,SYS_TEXT_BASE=0xFF800000
+PQ2FADS-VR_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000,SYS_TEXT_BASE=0xFF800000
+PQ2FADS-ZU_66MHz powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000
+PQ2FADS-ZU_66MHz_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000,SYS_TEXT_BASE=0xFF800000
+PQ2FADS-ZU_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,SYS_TEXT_BASE=0xFF800000
+MPC8313ERDB_NAND_33 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_33MHZ,NAND_U_BOOT=y,SYS_TEXT_BASE=0x00100000
+MPC8313ERDB_NAND_66 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_66MHZ,NAND_U_BOOT=y,SYS_TEXT_BASE=0x00100000
+MPC8315ERDB_NAND powerpc mpc83xx mpc8315erdb freescale - MPC8315ERDB:NAND
+MPC832XEMDS_HOST_33 powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PCI,PCI_33M,PQ_MDS_PIB=1
+MPC832XEMDS_HOST_66 powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PCI,PCI_66M,PQ_MDS_PIB=1
+MPC8349ITX_LOWBOOT powerpc mpc83xx mpc8349itx freescale - MPC8349ITX:MPC8349ITX,SYS_TEXT_BASE=0xFE000000
+MPC8360EMDS_HOST_33 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCI_33M,PQ_MDS_PIB=1
+MPC8360EMDS_HOST_66 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCI_66M,PQ_MDS_PIB=1
+MPC837XEMDS_HOST powerpc mpc83xx mpc837xemds freescale - MPC837XEMDS:PCI
+sbc8548_PCI_33_PCIE powerpc mpc85xx sbc8548 - - sbc8548:PCI,33,PCIE
+sbc8548_PCI_66_PCIE powerpc mpc85xx sbc8548 - - sbc8548:PCI,66,PCIE
+MPC8540EVAL_33_slave powerpc mpc85xx mpc8540eval - - MPC8540EVAL:PCI_SLAVE
+MPC8540EVAL_66_slave powerpc mpc85xx mpc8540eval - - MPC8540EVAL:SYSCLK_66M,PCI_SLAVE
+MPC8536DS_SDCARD powerpc mpc85xx mpc8536ds freescale - MPC8536DS:SDCARD
+MPC8536DS_SPIFLASH powerpc mpc85xx mpc8536ds freescale - MPC8536DS:SPIFLASH
+MPC8541CDS_legacy powerpc mpc85xx mpc8541cds freescale - MPC8541CDS:LEGACY
+MPC8548CDS_legacy powerpc mpc85xx mpc8548cds freescale - MPC8548CDS:LEGACY
+MPC8555CDS_legacy powerpc mpc85xx mpc8555cds freescale - MPC8555CDS:LEGACY
+P1011RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011,SPIFLASH
+P1020RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020,SPIFLASH
+P2010RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010,SPIFLASH
+P2020RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020,SPIFLASH
+MPC8641HPCN_36BIT powerpc mpc86xx mpc8641hpcn freescale - MPC8641HPCN:PHYS_64BIT
+NETTA_6412_SWAPHOOK powerpc mpc8xx netta - - NETTA:NETTA_6412=1,NETTA_SWAPHOOK=1
+NETTA_ISDN_SWAPHOOK powerpc mpc8xx netta - - NETTA:NETTA_ISDN=1,NETTA_SWAPHOOK=1
+NETTA_ISDN_6412_SWAPHOOK powerpc mpc8xx netta - - NETTA:NETTA_ISDN=1,NETTA_6412=1,NETTA_SWAPHOOK=1
+canyonlands_nand powerpc ppc4xx canyonlands amcc - canyonlands:CANYONLANDS,NAND_U_BOOT=y,SYS_TEXT_BASE=0x01000000
+v5fx30teval_flash powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0xFF1C0000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds
+PPChameleonEVB_BA_25 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=0,PPCHAMELEON_CLK_25
+PPChameleonEVB_BA_33 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=0,PPCHAMELEON_CLK_33
+PPChameleonEVB_HI_25 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=2,PPCHAMELEON_CLK_25
+PPChameleonEVB_HI_33 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=2,PPCHAMELEON_CLK_33
+PPChameleonEVB_ME_25 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_25
+PPChameleonEVB_ME_33 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_33
+xilinx-ppc405-generic_flash powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0xFE360000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds
+xilinx-ppc440-generic_flash powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0xFE360000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds
davinci_dm355evm arm arm926ejs dm355evm davinci davinci
davinci_dm365evm arm arm926ejs dm365evm davinci davinci
davinci_dm6467evm arm arm926ejs dm6467evm davinci davinci
davinci_schmoogie arm arm926ejs schmoogie davinci davinci
davinci_dm355leopard arm arm926ejs dm355leopard davinci davinci
+bf527-ad7160-eval blackfin blackfin
+# Target ARCH CPU Board name Vendor SoC Options
+###############################################################################################
}
#if defined(CONFIG_OF_LIBFDT)
-#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC)
/* find flattened device tree */
ret = boot_get_fdt (flag, argc, argv, &images,
&images.ft_addr, &images.ft_len);
}
set_working_fdt_addr(images.ft_addr);
-#endif
#endif
}
static cmd_tbl_t cmd_bootm_sub[] = {
U_BOOT_CMD_MKENT(start, 0, 1, (void *)BOOTM_STATE_START, "", ""),
U_BOOT_CMD_MKENT(loados, 0, 1, (void *)BOOTM_STATE_LOADOS, "", ""),
-#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC)
+#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
U_BOOT_CMD_MKENT(ramdisk, 0, 1, (void *)BOOTM_STATE_RAMDISK, "", ""),
#endif
#ifdef CONFIG_OF_LIBFDT
lmb_reserve(&images.lmb, images.os.load,
(load_end - images.os.load));
break;
-#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC)
+#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
case BOOTM_STATE_RAMDISK:
{
ulong rd_len = images.rd_end - images.rd_start;
}
if (strcmp(cmd, "unlock") == 0) {
- if (arg_off_size(argc - 2, argv + 2, nand, &off, &size) < 0)
+ if (arg_off_size(argc - 2, argv + 2, &dev, &off, &size) < 0)
return 1;
if (!nand_unlock(&nand_info[dev], off, size)) {
INTERNAL_SIZE_T size; /* Size in bytes, including overhead. */
struct malloc_chunk* fd; /* double links -- used only if free. */
struct malloc_chunk* bk;
-};
+} __attribute__((__may_alias__)) ;
typedef struct malloc_chunk* mchunkptr;
do_fixup_by_compat(fdt, compat, prop, &val, 4, create);
}
-int fdt_fixup_memory(void *blob, u64 start, u64 size)
+/*
+ * Get cells len in bytes
+ * if #NNNN-cells property is 2 then len is 8
+ * otherwise len is 4
+ */
+static int get_cells_len(void *blob, char *nr_cells_name)
+{
+ const u32 *cell;
+
+ cell = fdt_getprop(blob, 0, nr_cells_name, NULL);
+ if (cell && *cell == 2)
+ return 8;
+
+ return 4;
+}
+
+/*
+ * Write a 4 or 8 byte big endian cell
+ */
+static void write_cell(u8 *addr, u64 val, int size)
{
- int err, nodeoffset, len = 0;
- u8 tmp[16];
+ int shift = (size - 1) * 8;
+ while (size-- > 0) {
+ *addr++ = (val >> shift) & 0xff;
+ shift -= 8;
+ }
+}
+
+int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks)
+{
+ int err, nodeoffset;
+ int addr_cell_len, size_cell_len, len;
+ u8 tmp[banks * 8];
+ int bank;
const u32 *addrcell, *sizecell;
err = fdt_check_header(blob);
return err;
}
- addrcell = fdt_getprop(blob, 0, "#address-cells", NULL);
- /* use shifts and mask to ensure endianness */
- if ((addrcell) && (*addrcell == 2)) {
- tmp[0] = (start >> 56) & 0xff;
- tmp[1] = (start >> 48) & 0xff;
- tmp[2] = (start >> 40) & 0xff;
- tmp[3] = (start >> 32) & 0xff;
- tmp[4] = (start >> 24) & 0xff;
- tmp[5] = (start >> 16) & 0xff;
- tmp[6] = (start >> 8) & 0xff;
- tmp[7] = (start ) & 0xff;
- len = 8;
- } else {
- tmp[0] = (start >> 24) & 0xff;
- tmp[1] = (start >> 16) & 0xff;
- tmp[2] = (start >> 8) & 0xff;
- tmp[3] = (start ) & 0xff;
- len = 4;
- }
+ addr_cell_len = get_cells_len(blob, "#address-cells");
+ size_cell_len = get_cells_len(blob, "#size-cells");
- sizecell = fdt_getprop(blob, 0, "#size-cells", NULL);
- /* use shifts and mask to ensure endianness */
- if ((sizecell) && (*sizecell == 2)) {
- tmp[0+len] = (size >> 56) & 0xff;
- tmp[1+len] = (size >> 48) & 0xff;
- tmp[2+len] = (size >> 40) & 0xff;
- tmp[3+len] = (size >> 32) & 0xff;
- tmp[4+len] = (size >> 24) & 0xff;
- tmp[5+len] = (size >> 16) & 0xff;
- tmp[6+len] = (size >> 8) & 0xff;
- tmp[7+len] = (size ) & 0xff;
- len += 8;
- } else {
- tmp[0+len] = (size >> 24) & 0xff;
- tmp[1+len] = (size >> 16) & 0xff;
- tmp[2+len] = (size >> 8) & 0xff;
- tmp[3+len] = (size ) & 0xff;
- len += 4;
+ for (bank = 0, len = 0; bank < banks; bank++) {
+ write_cell(tmp + len, start[bank], addr_cell_len);
+ len += addr_cell_len;
+
+ write_cell(tmp + len, size[bank], size_cell_len);
+ len += size_cell_len;
}
err = fdt_setprop(blob, nodeoffset, "reg", tmp, len);
return 0;
}
+int fdt_fixup_memory(void *blob, u64 start, u64 size)
+{
+ return fdt_fixup_memory_banks(blob, &start, &size, 1);
+}
+
void fdt_fixup_ethernet(void *fdt)
{
int node, i, j;
return 0;
}
-#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC)
+#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
/**
* boot_ramdisk_high - relocate init ramdisk
* @lmb: pointer to lmb handle, will be used for memory mgmt
error:
return -1;
}
-#endif /* defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC) */
+#endif /* CONFIG_SYS_BOOT_RAMDISK_HIGH */
#ifdef CONFIG_OF_LIBFDT
static void fdt_error (const char *msg)
*of_size = of_len;
} else {
*of_flat_tree = fdt_blob;
- of_len = (CONFIG_SYS_BOOTMAPSZ + bootmap_base) - (ulong)fdt_blob;
+ of_len = *of_size + CONFIG_SYS_FDT_PAD;
lmb_reserve(lmb, (ulong)fdt_blob, of_len);
fdt_set_totalsize(*of_flat_tree, of_len);
goto error;
}
- if (be32_to_cpu (fdt_totalsize (fdt_blob)) != fdt_len) {
+ if (fdt_totalsize(fdt_blob) != fdt_len) {
fdt_error ("fdt size != image size");
goto error;
}
}
*of_flat_tree = fdt_blob;
- *of_size = be32_to_cpu (fdt_totalsize (fdt_blob));
+ *of_size = fdt_totalsize(fdt_blob);
debug (" of_flat_tree at 0x%08lx size 0x%08lx\n",
(ulong)*of_flat_tree, *of_size);
}
#endif /* CONFIG_OF_LIBFDT */
-#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
+#ifdef CONFIG_SYS_BOOT_GET_CMDLINE
/**
* boot_get_cmdline - allocate and initialize kernel cmdline
* @lmb: pointer to lmb handle, will be used for memory mgmt
return 0;
}
+#endif /* CONFIG_SYS_BOOT_GET_CMDLINE */
+#ifdef CONFIG_SYS_BOOT_GET_KBD
/**
* boot_get_kbd - allocate and initialize kernel copy of board info
* @lmb: pointer to lmb handle, will be used for memory mgmt
return 0;
}
-#endif /* CONFIG_PPC || CONFIG_M68K */
+#endif /* CONFIG_SYS_BOOT_GET_KBD */
#endif /* !USE_HOSTCC */
#if defined(CONFIG_FIT)
CPPFLAGS := $(DBGFLAGS) $(OPTFLAGS) $(RELFLAGS) \
-D__KERNEL__
-ifneq ($(TEXT_BASE),)
-CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
+ifneq ($(CONFIG_SYS_TEXT_BASE),)
+CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE)
endif
ifneq ($(RESET_VECTOR_ADDRESS),)
AFLAGS := $(AFLAGS_DEBUG) -D__ASSEMBLY__ $(CPPFLAGS)
LDFLAGS += -Bstatic -T $(obj)u-boot.lds $(PLATFORM_LDFLAGS)
-ifneq ($(TEXT_BASE),)
-LDFLAGS += -Ttext $(TEXT_BASE)
+ifneq ($(CONFIG_SYS_TEXT_BASE),)
+LDFLAGS += -Ttext $(CONFIG_SYS_TEXT_BASE)
endif
# Location of a usable BFD library, where we define "usable" as
export HOSTCC HOSTCFLAGS HOSTLDFLAGS PEDCFLAGS HOSTSTRIP CROSS_COMPILE \
AS LD CC CPP AR NM STRIP OBJCOPY OBJDUMP MAKE
-export TEXT_BASE PLATFORM_CPPFLAGS PLATFORM_RELFLAGS CPPFLAGS CFLAGS AFLAGS
+export CONFIG_SYS_TEXT_BASE PLATFORM_CPPFLAGS PLATFORM_RELFLAGS CPPFLAGS CFLAGS AFLAGS
#########################################################################
>
>How are they (should they be) set in your memory map above?
-_armboot_start contains the value of TEXT_BASE (0xA07E0000); it seems
-TEXT_BASE and _armboot_start are both used for the same purpose in
+_armboot_start contains the value of CONFIG_SYS_TEXT_BASE (0xA07E0000); it seems
+CONFIG_SYS_TEXT_BASE and _armboot_start are both used for the same purpose in
different parts of the (ARM) code.
Furthermore, the startup code (cpu/<arm>/start.S) internally uses
another variable (_TEXT_BASE) with the same content as _armboot_start.
=> u-boot as single bootloader starting from flash
- in board/cobra5272/config.mk TEXT_BASE should be
+ in board/cobra5272/config.mk CONFIG_SYS_TEXT_BASE should be
- TEXT_BASE = 0xffe00000
+ CONFIG_SYS_TEXT_BASE = 0xffe00000
=> linking address for u-boot as single bootloader stored in flash
=> u-boot as RAM version, chainloaded by another bootloader or using bdm cable
- in board/cobra5272/config.mk TEXT_BASE should be
+ in board/cobra5272/config.mk CONFIG_SYS_TEXT_BASE should be
- TEXT_BASE = 0x00020000
+ CONFIG_SYS_TEXT_BASE = 0x00020000
=> target linking address for RAM
-------------------------------------------------------------------------------------
For boards which boot from nand_spl, it is possible to save a copy
-if TEXT_BASE == relocation address! This prevents that uboot code
+if CONFIG_SYS_TEXT_BASE == relocation address! This prevents that uboot code
is copied again in relocate_code().
example for the tx25 board:
f) u-boot code steps through board_init_f() and calculates
the relocation address and copy itself to it
-If TEXT_BASE == relocation address, the copying of u-boot
+If CONFIG_SYS_TEXT_BASE == relocation address, the copying of u-boot
in f) could be saved.
-------------------------------------------------------------------------------------
- fill in bd_t infos (check)
- adapt all boards
-- maybe adapt TEXT_BASE (this must be checked from board maintainers)
+- maybe adapt CONFIG_SYS_TEXT_BASE (this must be checked from board maintainers)
This *must* be done for boards, which boot from NOR flash
- on other boards if TEXT_BASE = relocation baseaddr, this saves
+ on other boards if CONFIG_SYS_TEXT_BASE = relocation baseaddr, this saves
one copying from u-boot code.
- new function dram_init_banksize() is actual board specific. Maybe
and start with code execution on this address.
- The First page contains u-boot code from u-boot:nand_spl/nand_boot_fsl_nfc.c
- which inits the dram, cpu registers, reloacte itself to TEXT_BASE and loads
+ which inits the dram, cpu registers, reloacte itself to CONFIG_SYS_TEXT_BASE and loads
the "real" u-boot to CONFIG_SYS_NAND_U_BOOT_DST and starts execution
@CONFIG_SYS_NAND_U_BOOT_START
- This u-boot does no ram int, nor cpu register setup. Just looks
where it have to relocate and relocate itself to this address.
- If relocate address = TEXT_BASE(not the same, as the TEXT_BASE
+ If relocate address = CONFIG_SYS_TEXT_BASE(not the same, as the TEXT_BASE
from the nand_spl code), no need to copy, just go on with bss clear
and jump to board_init_r.
The build sequence:
- make korat_config
- make all perm=1
+ make korat_perm_config
+ make all
builds the permanent U-Boot by selecting loader file "u-boot.lds" and defining
preprocessor symbol "CONFIG_KORAT_PERMANENT". The default build:
make korat_config
make all
-creates the upgradable U-Boot but selecting loader file "u-boot-F7FC.lds" and
+creates the upgradable U-Boot by selecting loader file "u-boot-F7FC.lds" and
leaving preprocessor symbol "CONFIG_KORAT_PERMANENT" undefined.
2008-02-22, Larry Johnson <lrj@acm.org>
http://mailman.uclinux.org/pipermail/uclinux-dev/2003-December/023384.html
U-boot is configured to run at 0x20000 at default. This can be configured by
-change TEXT_BASE in board/m5282evb/config.mk and CONFIG_SYS_MONITOR_BASE in
+change CONFIG_SYS_TEXT_BASE in board/m5282evb/config.mk and CONFIG_SYS_MONITOR_BASE in
include/configs/M5282EVB.h.
3.2 BuS EB+MCF-EV123
initial vector table and basic processor initialization will not
be compiled in. The start address of u-boot must be adjusted in
the boards config header file (CONFIG_SYS_MONITOR_BASE) and Makefile
-(TEXT_BASE) to the load address.
+(CONFIG_SYS_TEXT_BASE) to the load address.
4.1 MCF5272 specific Options/Settings
-------------------------------------
pcm030_LOWBOOT_config: unconfig
@ >include/config.h
@[ -z "$(findstring LOWBOOT_,$@)" ] || \
- { echo "TEXT_BASE = 0xFF000000" >board/phytec/pcm030/config.tmp ; \
+ { echo "CONFIG_SYS_TEXT_BASE = 0xFF000000" >board/phytec/pcm030/config.tmp ; \
echo "... with LOWBOOT configuration" ; \
}
@[ -z "$(findstring RAMBOOT_,$@)" ] || \
- { echo "TEXT_BASE = 0x00100000" >board/phycore_mpc5200b_tiny/\
+ { echo "CONFIG_SYS_TEXT_BASE = 0x00100000" >board/phycore_mpc5200b_tiny/\
config.tmp ; \
echo "... with RAMBOOT configuration" ; \
echo "... remember to make sure that MBAR is already \
#endif
break;
case fpga_lattice:
+#if defined(CONFIG_FPGA_LATTICE)
printf("Lattice Device\nDescriptor @ 0x%p\n", desc);
ret_val = lattice_info(desc->devdesc);
+#else
+ fpga_no_sup( (char *)__FUNCTION__, "Lattice devices" );
+#endif
break;
default:
printf( "%s: Invalid or unsupported device type %d\n",
#endif
break;
case fpga_lattice:
+#if defined(CONFIG_FPGA_LATTICE)
ret_val = lattice_load(desc->devdesc, buf, bsize);
+#else
+ fpga_no_sup( (char *)__FUNCTION__, "Lattice devices" );
+#endif
break;
default:
printf( "%s: Invalid or unsupported device type %d\n",
#endif
break;
case fpga_lattice:
+#if defined(CONFIG_FPGA_LATTICE)
ret_val = lattice_dump(desc->devdesc, buf, bsize);
+#else
+ fpga_no_sup( (char *)__FUNCTION__, "Lattice devices" );
+#endif
break;
default:
printf( "%s: Invalid or unsupported device type %d\n",
# echi
COBJS-$(CONFIG_USB_EHCI) += ehci-hcd.o
+ifdef CONFIG_MPC512X
+COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-mpc512x.o
+else
COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o
+endif
COBJS-$(CONFIG_USB_EHCI_MXC) += ehci-mxc.o
COBJS-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
COBJS-$(CONFIG_USB_EHCI_IXP4XX) += ehci-ixp.o
{
struct usb_ehci *ehci;
- ehci = (struct usb_ehci *)CONFIG_SYS_MPC8xxx_USB_ADDR;
+ ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
hcor = (struct ehci_hcor *)((uint32_t) hccr +
HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
--- /dev/null
+/*
+ * (C) Copyright 2010, Damien Dusha, <d.dusha@gmail.com>
+ *
+ * (C) Copyright 2009, Value Team S.p.A.
+ * Francesco Rendine, <francesco.rendine@valueteam.com>
+ *
+ * (C) Copyright 2009 Freescale Semiconductor, Inc.
+ *
+ * (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB
+ *
+ * Author: Tor Krill tor@excito.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <pci.h>
+#include <usb.h>
+#include <asm/io.h>
+#include <usb/ehci-fsl.h>
+
+#include "ehci.h"
+#include "ehci-core.h"
+
+static void fsl_setup_phy(volatile struct ehci_hcor *);
+static void fsl_platform_set_host_mode(volatile struct usb_ehci *ehci);
+static int reset_usb_controller(volatile struct usb_ehci *ehci);
+static void usb_platform_dr_init(volatile struct usb_ehci *ehci);
+
+/*
+ * Initialize SOC FSL EHCI Controller
+ *
+ * This code is derived from EHCI FSL USB Linux driver for MPC5121
+ *
+ */
+int ehci_hcd_init(void)
+{
+ volatile struct usb_ehci *ehci;
+
+ /* Hook the memory mapped registers for EHCI-Controller */
+ ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
+ hccr = (struct ehci_hccr *)((uint32_t)&(ehci->caplength));
+ hcor = (struct ehci_hcor *)((uint32_t) hccr +
+ HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+
+ /* configure interface for UTMI_WIDE */
+ usb_platform_dr_init(ehci);
+
+ /* Init Phy USB0 to UTMI+ */
+ fsl_setup_phy(hcor);
+
+ /* Set to host mode */
+ fsl_platform_set_host_mode(ehci);
+
+ /*
+ * Setting the burst size seems to be required to prevent the
+ * USB from hanging when communicating with certain USB Mass
+ * storage devices. This was determined by analysing the
+ * EHCI registers under Linux vs U-Boot and burstsize was the
+ * major non-interrupt related difference between the two
+ * implementations.
+ *
+ * Some USB sticks behave better than others. In particular,
+ * the following USB stick is especially problematic:
+ * 0930:6545 Toshiba Corp
+ *
+ * The burstsize is set here to match the Linux implementation.
+ */
+ out_be32(&ehci->burstsize, FSL_EHCI_TXPBURST(8) |
+ FSL_EHCI_RXPBURST(8));
+
+ return 0;
+}
+
+/*
+ * Destroy the appropriate control structures corresponding
+ * the the EHCI host controller.
+ */
+int ehci_hcd_stop(void)
+{
+ volatile struct usb_ehci *ehci;
+ int exit_status = 0;
+
+ if (hcor) {
+ /* Unhook struct */
+ hccr = NULL;
+ hcor = NULL;
+
+ /* Reset the USB controller */
+ ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
+ exit_status = reset_usb_controller(ehci);
+ }
+
+ return exit_status;
+}
+
+static int reset_usb_controller(volatile struct usb_ehci *ehci)
+{
+ unsigned int i;
+
+ /* Command a reset of the USB Controller */
+ out_be32(&(ehci->usbcmd), EHCI_FSL_USBCMD_RST);
+
+ /* Wait for the reset process to finish */
+ for (i = 65535 ; i > 0 ; i--) {
+ /*
+ * The host will set this bit to zero once the
+ * reset process is complete
+ */
+ if ((in_be32(&(ehci->usbcmd)) & EHCI_FSL_USBCMD_RST) == 0)
+ return 0;
+ }
+
+ /* Hub did not reset in time */
+ return -1;
+}
+
+static void fsl_setup_phy(volatile struct ehci_hcor *hcor)
+{
+ uint32_t portsc;
+
+ portsc = ehci_readl(&hcor->or_portsc[0]);
+ portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
+
+ /* Enable the phy mode to UTMI Wide */
+ portsc |= PORT_PTS_PTW;
+ portsc |= PORT_PTS_UTMI;
+
+ ehci_writel(&hcor->or_portsc[0], portsc);
+}
+
+static void fsl_platform_set_host_mode(volatile struct usb_ehci *ehci)
+{
+ uint32_t temp;
+
+ temp = in_le32(&ehci->usbmode);
+ temp |= CM_HOST | ES_BE;
+ out_le32(&ehci->usbmode, temp);
+}
+
+static void usb_platform_dr_init(volatile struct usb_ehci *ehci)
+{
+ /* Configure interface for UTMI_WIDE */
+ out_be32(&ehci->isiphyctrl, PHYCTRL_PHYE | PHYCTRL_PXE);
+ out_be32(&ehci->usbgenctrl, GC_PPP | GC_PFP );
+}
#define STD_ASS (1 << 15)
#define STS_HALT (1 << 12)
uint32_t or_usbintr;
+#define INTR_UE (1 << 0) /* USB interrupt enable */
+#define INTR_UEE (1 << 1) /* USB error interrupt enable */
+#define INTR_PCE (1 << 2) /* Port change detect enable */
+#define INTR_SEE (1 << 4) /* system error enable */
+#define INTR_AAE (1 << 5) /* Interrupt on async adavance enable */
uint32_t or_frindex;
uint32_t or_ctrldssegment;
uint32_t or_periodiclistbase;
#define CONFIG_MPC8245 1
#define CONFIG_A3000 1
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 9600
#define CONFIG_SYS_EUMB_ADDR 0xFC000000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
* Definitions for initial stack pointer and data area
*/
-/* #define CONFIG_SYS_MONITOR_BASE TEXT_BASE */
+/* #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE */
/*#define CONFIG_SYS_GBL_DATA_SIZE 256*/
#define CONFIG_SYS_GBL_DATA_SIZE 128
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_IOP480 1 /* This is a IOP480 CPU */
#define CONFIG_ADCIOP 1 /* ...on a ADCIOP board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFD0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
#define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 */
#define FLASH_BASE1_PRELIM 0xFFE00000 /* FLASH bank #1 */
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
/* Processor type */
#define CONFIG_MPC860 1
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
#define CONFIG_MPC860 1
#define CONFIG_AMX860 1
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#undef CONFIG_8xx_CONS_SMC1 /* Console is on SCC2 */
#undef CONFIG_8xx_CONS_SMC2
#define CONFIG_8xx_CONS_SCC2 1
#define CONFIG_SYS_OR6_PRELIM 0xFFFF8000 /* 32kB, 15 waits, cs after addr, no bursts */
#define CONFIG_SYS_BR6_PRELIM 0x60000401 /* use GPCM for CS generation, 8 bit port */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_AP1000 1 /* ...on an AP1000 board */
+/*
+ * Start at bottom of RAM, but at an aliased address so that it looks
+ * like it's not in RAM. This is a bit of voodoo to allow it to be
+ * run from RAM instead of Flash.
+ */
+#define CONFIG_SYS_TEXT_BASE 0x08000000
+
#define CONFIG_PCI 1
#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE 0x20000000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
*/
#define SPD_EEPROM_ADDRESS 0x50
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_APCG405 1 /* ...on a APC405 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_BOARD_EARLY_INIT_R 1
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 8)
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* PCI OHCI controller
*/
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_AR405 1 /* ...on a AR405 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1)
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
/*
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_ASH405 1 /* ...on a ASH405 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
#define CONFIG_SYS_DUART_RST (0x80000000 >> 14)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Default speed selection (cpu_plb_opb_ebc) in mhz.
* This value will be set if iic boot eprom is disabled.
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */
#define CONFIG_MPC8548 1 /* MPC8548 specific */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
+#endif
+
#define CONFIG_PCI 1 /* enable any pci type devices */
#define CONFIG_PCI1 1 /* PCI controller 1 */
#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 8000 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_FLASH_CFI_DRIVER 1
#define CONFIG_SYS_FLASH_CFI 1
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_ADDER /* Analogue&Micro Adder board */
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#define CONFIG_BAUDRATE 38400
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 KB for Monitor */
#ifdef CONFIG_BZIP2
#define CONFIG_SYS_MALLOC_LEN (2500 << 10) /* Reserve ~2.5 MB for malloc() */
*/
#define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx chips */
-/*-----------------------------------------------------------------------
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from flash */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_MPC8220 1
#define CONFIG_ALASKA8220 1 /* ... on Alaska board */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_BAT_RW 1 /* Use common BAT rw code */
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
#define CONFIG_SYS_MPC8220_CLKIN 30000000/* ... running at 30MHz */
#define CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER 16 /* VCO multiplier can't be read from any register */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Serial console configuration
*/
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
* (easy to change)
*/
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
/* these hardware addresses are pretty bogus, please change them to
suit your needs */
#define CONFIG_SYS_L2_BAB7xx
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
#define CONFIG_NET_MULTI /* Multi ethernet cards support */
#define CONFIG_TULIP
#define CONFIG_TULIP_SELECT_MEDIA
#define CONFIG_BC3450_FP 1 /* + enable FP O/P */
#undef CONFIG_BC3450_CRT /* + enable CRT O/P (Debug only!) */
-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ * 0xFC000000 boot low (standard configuration with room for
+ * max 64 MByte Flash ROM)
+ * 0x00100000 boot from RAM (for testing only)
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFC000000
+#endif
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
#define CONFIG_TIMESTAMP /* display image timestamps */
-#if (TEXT_BASE == 0xFC000000) /* Boot low */
+#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) /* Boot low */
# define CONFIG_SYS_LOWBOOT 1
#endif
/*
* Flash configuration
*/
-#define CONFIG_SYS_FLASH_BASE TEXT_BASE /* 0xFC000000 */
+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE /* 0xFC000000 */
/* use CFI flash driver if no module variant is spezified */
#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_MPC8245 1
#define CONFIG_BMW 1
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */
#define CONFIG_BCM570x 1 /* Use Broadcom BCM570x Ethernet Driver */
#define CONFIG_SYS_EUMB_ADDR 0xFC000000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (2048 << 10) /* Reserve 2MB for malloc() */
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
#endif /* __CONFIG_H */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_CANBT 1 /* ...on a CANBT board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1)
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
/*
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_PPCHAMELEONEVB 1 /* ...on a PPChameleonEVB board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 /* Reserve 320 kB for Monitor */
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
#define CONFIG_SYS_GPIO0_TSRH 0x00000000
#define CONFIG_SYS_GPIO0_TCR 0xF7FF8014
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
#define CONFIG_NO_SERIAL_EEPROM
/*--------------------------------------------------------------------*/
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_VOM405 1 /* ...on a VOM405 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC8000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1)
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1)
#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
#if (CONFIG_SYS_MONITOR_BASE < FLASH_BASE0_PRELIM)
#define CONFIG_SYS_EEPROM_WP (0x80000000 >> 8) /* GPIO8 */
#define CONFIG_SYS_PLD_RESET (0x80000000 >> 12) /* GPIO12 */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Default speed selection (cpu_plb_opb_ebc) in mhz.
* This value will be set if iic boot eprom is disabled.
#define CONFIG_MPC8245 1
#define CONFIG_CPC45 1
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 9600
#define CONFIG_SYS_EUMB_ADDR 0xFCE00000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
-
/*----------------------------------------------------------------------*/
/* CPC45 Memory Map */
/*----------------------------------------------------------------------*/
#define CONFIG_405GP 1 /* This is a PPC405 CPU */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_SYS_CLK_FREQ 33330000 /* external frequency to pll */
#define CONFIG_SYS_PB_LED (0x80000000 >> 16) /* GPIO16 */
#define CONFIG_SYS_INTA_FAKE (0x80000000 >> 23) /* GPIO23 */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_CPCI405 1 /* ...on a CPCI405 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_FLASH_BASE TEXT_BASE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1)
+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
/*
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_CPCI405_VER2 1 /* ...version 2 */
#undef CONFIG_CPCI405_6U /* enable this for 6U boards */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_CPCI405_VER2 1 /* ...version 2 */
#define CONFIG_CPCI405AB 1 /* ...and special AB version */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_CPCI405 1 /* ...on a CPCI405 board */
#define CONFIG_CPCI405_VER2 1 /* ...version 2 */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_CPCI750 1 /* this is an CPCI750 board */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_BAUDRATE 9600 /* console baudrate = 9600 */
#define CONFIG_MV64360_ECC /* enable ECC support */
#define L2_ENABLE (L2_INIT | L2CR_L2E)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SYS_BOARD_ASM_INIT 1
#define CPCI750_SLAVE_TEST (((in8(0xf0300000) & 0x80) == 0) ? 0 : 1)
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_CPCIISER4 1 /* ...on a CPCIISER4 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_CPU86 1 /* ...on a CPU86 board */
#define CONFIG_CPM2 1 /* Has a CPM2 */
+#ifdef CONFIG_BOOT_ROM
+#define CONFIG_SYS_TEXT_BASE 0xFF800000
+#else
+#define CONFIG_SYS_TEXT_BASE 0xFF000000
+#endif
+
/*
* select serial console configuration
*
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_MAX_SIZE 0x08000000 /* max. 128 MB */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/
#define CONFIG_ENV_SIZE (2048 - 512)
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CONFIG_PCI
#define CONFIG_CPM2 1 /* Has a CPM2 */
+#ifdef CONFIG_BOOT_ROM
+#define CONFIG_SYS_TEXT_BASE 0xFF800000
+#else
+#define CONFIG_SYS_TEXT_BASE 0xFF000000
+#endif
+
/*
* select serial console configuration
*
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_MAX_SIZE 0x08000000 /* max. 128 MB */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/
#define CONFIG_ENV_SIZE (2048 - 512)
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CONFIG_405GP 1 /* This is a PPC405 CPU */
#define CONFIG_4xx 1 /* ...member of PPC405 family */
+
+/*
+ * Note: I make an "image" from U-Boot itself, which prefixes 0x40
+ * bytes of header info, hence start address is thus shifted.
+ */
+#define CONFIG_SYS_TEXT_BASE 0xFFFD0040
+
#define CONFIG_SYS_CLK_FREQ 25000000
#define CONFIG_BAUDRATE 9600
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE 0xFFC00000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 192 kB for Monitor */
#define EEPROM_WRITE_ADDRESS 0xA0
#define EEPROM_READ_ADDRESS 0xA1
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC8240 1
#define CONFIG_CU824 1
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 9600
#define CONFIG_SYS_EUMB_ADDR 0xFCE00000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*-----------------------------------------------------------------------
* PCI stuff
*-----------------------------------------------------------------------
#define CONFIG_IOP480 1 /* This is a IOP480 CPU */
#define CONFIG_DASA_SIM 1 /* ...on a DASA_SIM board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
#define FLASH_BASE0_PRELIM 0xFFE00000 /* FLASH bank #0 */
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_DB64360 1 /* this is an DB64360 board */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_BAUDRATE 115200 /* console baudrate = 115000 */
/*ronen - we don't use the global CONFIG_ECC, since in the global ecc we initialize the
DRAM for ECC in the phase we are relocating to it, which isn't so sufficient.
#define L2_ENABLE (L2_INIT | L2CR_L2E)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SYS_BOARD_ASM_INIT 1
#endif /* __CONFIG_H */
#define CONFIG_DB64460 1 /* this is an DB64460 board */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_BAUDRATE 115200 /* console baudrate = 115000 */
/*ronen - we don't use the global CONFIG_ECC, since in the global ecc we initialize the
DRAM for ECC in the phase we are relocating to it, which isn't so sufficient.
#define L2_ENABLE (L2_INIT | L2CR_L2E)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SYS_BOARD_ASM_INIT 1
#endif /* __CONFIG_H */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_DP405 1 /* ...on a DP405 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFD0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1)
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1)
#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
#if (CONFIG_SYS_MONITOR_BASE < FLASH_BASE0_PRELIM)
#define CONFIG_SYS_GPIO0_TSRH 0x00000000 /* 16 ... 31 */
#define CONFIG_SYS_GPIO0_TCR 0xB7FE0014 /* 0 ... 31 */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Default speed selection (cpu_plb_opb_ebc) in mhz.
* This value will be set if iic boot eprom is disabled.
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_DU405 1 /* ...on a DU405 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFD0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_SYS_CLK_FREQ 33333400 /* external freq to pll */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
+#endif
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
#define CONFIG_LAST_STAGE_INIT 1 /* last_stage_init */
#define CONFIG_SYS_BOOT_BASE_ADDR 0xf0000000
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
#define CONFIG_SYS_FLASH_BASE 0xfc000000 /* start of FLASH */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND0_ADDR 0xd0000000 /* NAND Flash */
#define CONFIG_SYS_NAND1_ADDR 0xd0100000 /* NAND Flash */
#define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND0_ADDR + CONFIG_SYS_NAND0_CS, \
CONFIG_SYS_NAND1_ADDR + CONFIG_SYS_NAND1_CS}
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
/* If M5282 port is fully implemented the monitor base will be behind
* the vector table. */
-#if (TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE)
-#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400)
+#if (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE)
+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
#else
-#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */
+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */
#endif
#define CONFIG_SYS_MONITOR_LEN 0x20000
* (easy to change)
*/
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
/* these hardware addresses are pretty bogus, please change them to
suit your needs */
#endif
#define L2_ENABLE (L2_INIT | L2CR_L2E)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_NET_MULTI /* Multi ethernet cards support */
#define CONFIG_EEPRO100
#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
#define CONFIG_MPC860T 1
#define CONFIG_ELPT860 1 /* ...on a LEOX's ELPT860 CPU board */
+#define CONFIG_SYS_TEXT_BASE 0x02000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-/*-----------------------------------------------------------------------
- * Internal Definitions
- *-----------------------------------------------------------------------
- *
- */
-
-/*
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
#endif /* __CONFIG_H */
#define CONFIG_EP88X /* Embedded Planet EP88x board */
+#define CONFIG_SYS_TEXT_BASE 0xFC000000
+
#define CONFIG_BOARD_EARLY_INIT_F /* Call board_early_init_f */
/* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 KB for Monitor */
#ifdef CONFIG_BZIP2
#define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve ~4 MB for malloc() */
*/
#define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx chips */
-/*-----------------------------------------------------------------------
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from flash */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_ERIC 1 /* ...on a ERIC board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* run board_early_init_f() */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */
*/
#define SPD_EEPROM_ADDRESS 0x50
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MPC850 1 /* This is a MPC850 CPU */
#define CONFIG_ESTEEM192E 1 /* ...on a EST ESTEEM192E */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_FLASH_16BIT 1 /* Rom 16 bit data bus */
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#define CONFIG_SYS_MAMR_8COL 0x18803112
#define CONFIG_SYS_MAMR_9COL 0x18803112 /* same as 8 column because its just easier to port with*/
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC850 1 /* This is a MPC850 CPU */
#define CONFIG_ETX094 1 /* ...on a ETX_094 board */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_1X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_EVB64260 1 /* this is an EVB64260 board */
#define CONFIG_SYS_GT_6426x GT_64260 /* with a 64260 system controller */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_BAUDRATE 38400 /* console baudrate = 38400 */
#undef CONFIG_ECC /* enable ECC support */
#define L2_ENABLE (L2_INIT | L2CR_L2E)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SYS_BOARD_ASM_INIT 1
#define CONFIG_SYS_FLASH1_SIZE 0x02000000
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE
#define CONFIG_SYS_FLASH_SIZE CONFIG_SYS_FLASH0_SIZE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+
#define CONFIG_ETHADDR 08:00:22:50:70:63 /* Ethernet address */
#define CONFIG_ENV_OVERWRITE 1 /* Overwrite the environment */
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
#define CONFIG_SYS_MAMR 0x13a01114
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
/* values according to the manual */
#define CONFIG_MPC850SAR 1
#define CONFIG_FADS 1
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
#define CONFIG_SYS_MAMR 0x13a01114
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/* values according to the manual */
/* processor type */
#define CONFIG_MPC860T 1 /* 860T */
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
#define CONFIG_FLAGADM 1 /* ...on a FLAGA DM */
#define CONFIG_8xx_GCLK_FREQ 48000000 /*48MHz*/
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#undef CONFIG_8xx_CONS_SMC1 /* Console is on SMC1 */
#define CONFIG_8xx_CONS_SMC2 1
#undef CONFIG_8xx_CONS_NONE
#define CONFIG_SYS_OR4 ( OR_AM_MSK | OR_CSNT_SAM | OR_BI | OR_G5LS)
#define CONFIG_SYS_BR4 ( (DSP_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_UPMB | BR_V )
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC850 1 /* This is a MPC850 CPU */
#define CONFIG_FPS850L 1 /* ...on a FingerPrint Sensor */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */
#define CONFIG_SYS_SMC_RXBUFLEN 128
#define CONFIG_SYS_MAXIDLE 10
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_MPC860 1 /* This is a MPC860 CPU */
#define CONFIG_FPS860L 1 /* ...on a FingerPrint Sensor */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */
#define CONFIG_SYS_SMC_RXBUFLEN 128
#define CONFIG_SYS_MAXIDLE 10
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SCC1_ENET
/* pass open firmware flat tree */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_G2000 1 /* ...on a PLU405 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
#define CONFIG_SYS_GPIO0_TSRH 0x00000000
#define CONFIG_SYS_GPIO0_TCR 0xF7FF8014
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Default speed selection (cpu_plb_opb_ebc) in mhz.
* This value will be set if iic boot eprom is disabled.
#define CONFIG_MPC860
#define CONFIG_GEN860T
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
/*
* Identify the board
*/
BR_V \
)
-/*
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* FEC interrupt assignment
*/
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_TEXT_BASE 0x00000000
+
#define CONFIG_ETHADDR 08:00:22:50:70:63 /* Ethernet address */
#define CONFIG_ENV_OVERWRITE 1 /* Overwrite the environment */
MAMR_G0CLA_A11 | MAMR_RLFA_1X | MAMR_WLFA_1X \
| MAMR_TLFA_4X) /* 0x5d802114 */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/* values according to the manual */
#define CONFIG_DRAM_50MHZ 1
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_HH405 1 /* ...on a HH405 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE 0xFFF80000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 4 MB for malloc() */
#define CONFIG_SYS_LCD0_RST (0x80000000 >> 30)
#define CONFIG_SYS_LCD1_RST (0x80000000 >> 31)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Default speed selection (cpu_plb_opb_ebc) in mhz.
* This value will be set if iic boot eprom is disabled.
#define CONFIG_MPC8245 1
#define CONFIG_HIDDEN_DRAGON 1
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#if 0
#define USE_DINK32 1
#else
#else
#undef CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_MONITOR_LEN 0x00030000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_GBL_DATA_SIZE 128
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/* values according to the manual */
#define CONFIG_DRAM_50MHZ 1
#define CONFIG_SDRAM_50MHZ
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_HUB405 1 /* ...on a HUB405 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
#define CONFIG_SYS_UART4_RS232 (0x80000000 >> 7)
#define CONFIG_SYS_UART5_RS232 (0x80000000 >> 8)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Default speed selection (cpu_plb_opb_ebc) in mhz.
* This value will be set if iic boot eprom is disabled.
#define CONFIG_MPC860T 1
#define CONFIG_MPC862 1
+#define CONFIG_SYS_TEXT_BASE 0x08000000
+
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#undef CONFIG_8xx_CONS_SMC1
MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_8X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#ifdef CONFIG_MPC860T
/* Interrupt level assignments.
#define CONFIG_ICU862 1
#define CONFIG_MPC862 1
+#define CONFIG_SYS_TEXT_BASE 0x40F00000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
#else
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#endif
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */
/*
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
#define CONFIG_SYS_MAMR 0x13a01114
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
#ifdef CONFIG_MPC860T
#define CPU_ID_STR "MPC8247"
#define CONFIG_CPM2 1 /* Has a CPM2 */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_BOOTCOUNT_LIMIT
#define CONFIG_SYS_FLASH_BANKS_LIST { 0xFF800000 }
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
/* What should the base address of the main FLASH be and how big is
- * it (in MBytes)? This must contain TEXT_BASE from board/ids8247/config.mk
+ * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/ids8247/config.mk
* The main FLASH is whichever is connected to *CS0.
*/
#define CONFIG_SYS_FLASH0_BASE 0xFFF00000
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CONFIG_MPC860 1 /* This is a MPC860 CPU */
#define CONFIG_IP860 1 /* ...on a IP860 board */
+
+#define CONFIG_SYS_TEXT_BASE 0x10000000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
#define BD_CTRL_FLWE 0x20 /* Flash Write Enable */
#define BD_CTRL_RWDN 0x10 /* VMEBus Requester Release When Done Enable */
-/*-----------------------------------------------------------------------
- *
- *-----------------------------------------------------------------------
- *
- */
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */
#define CONFIG_IPHASE4539 1 /* ...on a Interphase 4539 PMC */
+#define CONFIG_SYS_TEXT_BASE 0xffb00000
+
#define CONFIG_CPM2 1 /* Has a CPM2 */
/*-----------------------------------------------------------------------
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE 0xFF800000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-/*-----------------------------------------------------------------------
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CONFIG_ISPAN /* ...on one of Interphase iSPAN boards */
#define CONFIG_CPM2 1 /* Has a CPM2 */
+#define CONFIG_SYS_TEXT_BASE 0xFE7A0000
+
/*-----------------------------------------------------------------------
* Select serial console configuration
*
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
#ifdef CONFIG_BZIP2
#define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-/*-----------------------------------------------------------------------
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from flash */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CONFIG_MPC860 1 /* This is a MPC860 CPU */
#define CONFIG_IVML24 1 /* ...on a IVML24 board */
+#define CONFIG_SYS_TEXT_BASE 0xFF000000
+
#if defined (CONFIG_IVML24_16M)
# define CONFIG_IDENT_STRING " IVML24"
#elif defined (CONFIG_IVML24_32M)
MBMR_AMB_TYPE_1 | MBMR_DSB_1_CYCL | MBMR_G0CLB_A10 | \
MBMR_RLFB_1X | MBMR_WLFB_1X | MBMR_TLFB_4X)
#endif
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC860 1 /* This is a MPC860 CPU */
#define CONFIG_IVMS8 1 /* ...on a IVMS8 board */
+#define CONFIG_SYS_TEXT_BASE 0xFF000000
+
#if defined (CONFIG_IVMS8_16M)
# define CONFIG_IDENT_STRING " IVMS8"
#elif defined (CONFIG_IVMS8_32M)
MBMR_RLFB_1X | MBMR_WLFB_1X | MBMR_TLFB_4X)
#endif
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC5200 1 /* (more precisely a MPC5200 CPU) */
#define CONFIG_ICECUBE 1 /* ... on IceCube board */
-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ * 0xFFF00000 boot high (standard configuration)
+ * 0xFF000000 boot low for 16 MiB boards
+ * 0xFF800000 boot low for 8 MiB boards
+ * 0x00100000 boot from RAM (for testing only)
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+#endif
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
#endif
-#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
+#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
# define CONFIG_SYS_LOWBOOT 1
# define CONFIG_SYS_LOWBOOT16 1
#endif
-#if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */
+#if (CONFIG_SYS_TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */
#if defined(CONFIG_LITE5200B)
# error CONFIG_SYS_LOWBOOT08 is incompatible with the Lite5200B
#else
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
/* JSE has a PPC405GPr */
#define CONFIG_405GP 1
/* ... which is a 4xxx series */
-#define CONFIG_4xx 1
+#define CONFIG_4x 1
/* ... with a 33MHz OSC. connected to the SysCLK input */
#define CONFIG_SYS_CLK_FREQ 33333333
/* ... with on-chip memory here (4KBytes) */
/* Do not set up locked dcache as init ram. */
#undef CONFIG_SYS_INIT_DCACHE_CS
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+
/* Map the SystemACE chip (CS#1) here. (Must be a multiple of 1Meg) */
#define CONFIG_SYSTEMACE 1
#define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000
/* Configuration Port location */
#define CONFIG_PORT_ADDR 0xF0000500
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_MISC_INIT_F 1 /* Call board misc_init_f */
#define CONFIG_MISC_INIT_R 1 /* Call board misc_init_r */
+
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+
#undef CONFIG_SYS_DRAM_TEST /* Disable-takes long time!*/
#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal PowerOn: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */
#define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */
#define CONFIG_MPC855 1 /* This is a MPC855 CPU */
#define CONFIG_KUP4K 1 /* ...on a KUP4K module */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
#define LATCH_ADDR 0x90000200
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */
#define CONFIG_AUTOBOOT_STOP_STR "."
#define CONFIG_SILENT_CONSOLE 1
#define CONFIG_MPC859T 1 /* This is a MPC859T CPU */
#define CONFIG_KUP4X 1 /* ...on a KUP4X module */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
#define LATCH_ADDR 0x90000200
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */
#define CONFIG_AUTOBOOT_STOP_STR "." /* easy to stop for now */
#define CONFIG_MPC850 1 /* This is a MPC850 CPU */
#define CONFIG_LANTEC 2 /* ...on a Lantec rev.2 board */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
/*
* Port assignments (CONFIG_LANTEC == 1):
* - SMC1: J11 (MDB) ?
MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* JFFS2 partitions
*
#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
#ifdef CONFIG_CF_SBF
-# define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400)
+# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
#else
# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
#endif
/* If M5282 port is fully implemented the monitor base will be behind
* the vector table. */
-#if (TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE)
+#if (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE)
#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
#else
-#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */
+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */
#endif
#define CONFIG_SYS_MONITOR_LEN 0x20000
#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
#ifdef CONFIG_CF_SBF
-# define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400)
+# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
#else
# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
#endif
#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
#ifdef CONFIG_CF_SBF
-# define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400)
+# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
#else
# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
#endif
#define CONFIG_MPC860 1 /* This is a MPC860 CPU */
#define CONFIG_MBX 1 /* ...on an MBX module */
+#define CONFIG_SYS_TEXT_BASE 0xfe000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
*/
#define CONFIG_SYS_DER 0
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC860T 1
#define CONFIG_MBX 1
+#define CONFIG_SYS_TEXT_BASE 0xfe000000
+
#define CONFIG_8xx_CPUCLOCK 40
#define CONFIG_8xx_BUSCLOCK (CONFIG_8xx_CPUCLOCK)
#define TARGET_SYSTEM_FREQUENCY 40
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
#define CONFIG_SYS_MAMR 0x13821000
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/* values according to the manual */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_MISC_INIT_F 1 /* Call board misc_init_f */
#define CONFIG_MISC_INIT_R 1 /* Call board misc_init_r */
+
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+
#undef CONFIG_SYS_DRAM_TEST /* Disable-takes long time!*/
#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal PowerOn: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */
#define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* do special hardware init. */
#define CONFIG_MISC_INIT_R 1
+#define CONFIG_SYS_TEXT_BASE 0xfe000000
+
#define CONFIG_8xx_GCLK_FREQ MPC8XX_SPEED
#undef CONFIG_8xx_CONS_SMC1
#define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */
*/
#define CONFIG_SYS_DER 0
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_405GP 1 /* This is a PPC405 CPU */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_MIP405 1 /* ...on a MIP405 board */
+
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+
/***********************************************************
* Note that it may also be a MIP405T board which is a subset of the
* MIP405
#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 12)
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/***********************************************************************
* External peripheral base address
***********************************************************************/
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_ML2 1 /* ...on a ML2 board */
+#define CONFIG_SYS_TEXT_BASE 0x18000000
#define CONFIG_ENV_IS_IN_FLASH 1
*/
#define SPD_EEPROM_ADDRESS 0x50
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MPC824X 1
#define CONFIG_MPC8240 1
#define CONFIG_MOUSSE 1
+
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#define CONFIG_SYS_ADDR_MAP_B 1
+
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 9600
#if 1
*/
#define CONFIG_SYS_CACHELINE_SIZE 16
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/* Localizations */
#if 0
#define CONFIG_ETHADDR 0:0:0:0:1:d
#define CONFIG_MPC8260ADS 1 /* Motorola PQ2 ADS family board */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000 /* Standard: boot high */
+#endif
+
#define CONFIG_CPM2 1 /* Has a CPM2 */
/*
* Figure out if we are booting low via flash HRCW or high via the BCSR.
*/
-#if (TEXT_BASE != 0xFFF00000) /* Boot low (flash HRCW) */
+#if (CONFIG_SYS_TEXT_BASE != 0xFFF00000) /* Boot low (flash HRCW) */
# define CONFIG_SYS_LOWBOOT 1
#endif
#define CONFIG_SYS_HRCW_SLAVE6 0
#define CONFIG_SYS_HRCW_SLAVE7 0
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=" MK_STR(CONFIG_NETDEV) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
"fdtaddr=400000\0" \
"console=ttyCPM0\0" \
"setbootargs=setenv bootargs " \
/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!! !!
!! This configuration requires JP3 to be in position 1-2 to work !!
- !! To make it work for the default, the TEXT_BASE define in !!
+ !! To make it work for the default, the CONFIG_SYS_TEXT_BASE define in !!
!! board/mpc8266ads/config.mk must be changed from 0xfe000000 to !!
!! 0xfff00000 !!
!! The CONFIG_SYS_HRCW_MASTER define below must also be changed to match !!
#define CONFIG_MPC8266ADS 1 /* ...on motorola ADS board */
#define CONFIG_CPM2 1 /* Has a CPM2 */
+#define CONFIG_SYS_TEXT_BASE 0xfe000000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
#define CONFIG_SYS_HRCW_SLAVE6 0
#define CONFIG_SYS_HRCW_SLAVE7 0
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_MPC8308 1 /* MPC8308 CPU specific */
#define CONFIG_MPC8308RDB 1 /* MPC8308RDB board specific */
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+
#define CONFIG_MISC_INIT_R
/*
/*
* The reserved memory
*/
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */
#define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */
#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Environment Configuration
*/
#define CONFIG_MPC8313 1
#define CONFIG_MPC8313ERDB 1
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+#endif
+
#define CONFIG_PCI
#define CONFIG_FSL_ELBC 1
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) && !defined(CONFIG_NAND_SPL)
#define CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Environment Configuration
*/
"ethprime=TSEC1\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
"fdtaddr=780000\0" \
"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \
"console=ttyS0\0" \
#ifndef __CONFIG_H
#define __CONFIG_H
-#ifdef CONFIG_MK_NAND
+#ifdef CONFIG_NAND
#define CONFIG_NAND_U_BOOT 1
-#define CONFIG_RAMBOOT_TEXT_BASE 0x00100000
+#define CONFIG_SYS_TEXT_BASE 0x00100000
+#endif
+
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
#endif
/*
/*
* The reserved memory
*/
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */
#define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC832x 1 /* MPC832x CPU specific */
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+
#define CONFIG_PCI 1
/*
/*
* The reserved memory
*/
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if (CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
"netdev=" MK_STR(CONFIG_NETDEV) "\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftp $loadaddr $uboot;" \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
"fdtaddr=780000\0" \
"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \
"ramdiskaddr=1000000\0" \
#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC832x 1 /* MPC832x CPU specific */
#define CONFIG_MPC832XEMDS 1 /* MPC832XEMDS board specific */
-#undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */
-#undef CONFIG_PQ_MDS_PIB_ATM /* QOC3 ATM card */
+
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
/*
* System Clock Setup
/*
* The reserved memory
*/
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
/*
- * (C) Copyright 2006
+ * (C) Copyright 2006-2010
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
#define CONFIG_MPC8349 1 /* MPC8349 specific */
#define CONFIG_MPC8349EMDS 1 /* MPC8349EMDS board specific */
-#define PCI_66M
-#ifdef PCI_66M
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+
+#define CONFIG_PCI_66M
+#ifdef CONFIG_PCI_66M
#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
#else
#define CONFIG_83XX_CLKIN 33000000 /* in Hz */
#endif /* CONFIG_PCISLAVE */
#ifndef CONFIG_SYS_CLK_FREQ
-#ifdef PCI_66M
+#ifdef CONFIG_PCI_66M
#define CONFIG_SYS_CLK_FREQ 66000000
#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1
#else
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#ifndef __CONFIG_H
#define __CONFIG_H
-#if (TEXT_BASE == 0xFE000000)
+#if (CONFIG_SYS_TEXT_BASE == 0xFE000000)
#define CONFIG_SYS_LOWBOOT
#endif
#define CONFIG_MPC834x /* MPC834x family (8343, 8347, 8349) */
#define CONFIG_MPC8349 /* MPC8349 specific */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFEF00000
+#endif
+
#define CONFIG_SYS_IMMR 0xE0000000 /* The IMMR is relocated to here */
#define CONFIG_MISC_INIT_F
/*
* U-Boot memory configuration
*/
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#endif
-#define PCI_66M
-#ifdef PCI_66M
+#define CONFIG_PCI_66M
+#ifdef CONFIG_PCI_66M
#define CONFIG_83XX_CLKIN 66666666 /* in Hz */
#else
#define CONFIG_83XX_CLKIN 33333333 /* in Hz */
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
"netdev=" MK_STR(CONFIG_NETDEV) "\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
"fdtaddr=780000\0" \
"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0"
#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC8360 1 /* MPC8360 CPU specific */
#define CONFIG_MPC8360EMDS 1 /* MPC8360EMDS board specific */
+
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+
#undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */
#undef CONFIG_PQ_MDS_PIB_ATM /* QOC3 ATM card */
* The reserved memory
*/
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MPC8360 1 /* MPC8360 CPU specific */
#define CONFIG_MPC8360ERDK 1 /* MPC8360ERDK board specific */
+#define CONFIG_SYS_TEXT_BASE 0xFF800000
+
/*
* System Clock Setup
*/
#ifdef CONFIG_CLKIN_33MHZ
#define CONFIG_83XX_CLKIN 33333333
#define CONFIG_SYS_CLK_FREQ 33333333
-#define PCI_33M 1
+#define CONFIG_PCI_33M 1
#define HRCWL_CSB_TO_CLKIN_MPC8360ERDK HRCWL_CSB_TO_CLKIN_10X1
#else
#define CONFIG_83XX_CLKIN 66000000
#define CONFIG_SYS_CLK_FREQ 66000000
-#define PCI_66M 1
+#define CONFIG_PCI_66M 1
#define HRCWL_CSB_TO_CLKIN_MPC8360ERDK HRCWL_CSB_TO_CLKIN_5X1
#endif /* CONFIG_CLKIN_33MHZ */
/*
* The reserved memory
*/
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_SYS_FLASH_BASE 0xFF800000 /* FLASH base address */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
#endif /* CONFIG_PCI */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MPC837x 1 /* MPC837x CPU specific */
#define CONFIG_MPC837XEMDS 1 /* MPC837XEMDS board specific */
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+
/*
* System Clock Setup
*/
/*
* The reserved memory
*/
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MPC837x 1 /* MPC837x CPU specific */
#define CONFIG_MPC837XERDB 1
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+
#define CONFIG_PCI 1
#define CONFIG_BOARD_EARLY_INIT_F
/*
* The reserved memory
*/
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
"netdev=" MK_STR(CONFIG_NETDEV) "\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftp $loadaddr $uboot;" \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
"fdtaddr=780000\0" \
"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \
"ramdiskaddr=1000000\0" \
#include "../board/freescale/common/ics307_clk.h"
-#ifdef CONFIG_MK_36BIT
+#ifdef CONFIG_36BIT
#define CONFIG_PHYS_64BIT 1
#endif
-#ifdef CONFIG_MK_NAND
+#ifdef CONFIG_NAND
#define CONFIG_NAND_U_BOOT 1
#define CONFIG_RAMBOOT_NAND 1
-#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f82000
+#define CONFIG_SYS_TEXT_BASE 0xf8f82000
#endif
-#ifdef CONFIG_MK_SDCARD
+#ifdef CONFIG_SDCARD
#define CONFIG_RAMBOOT_SDCARD 1
-#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000
+#define CONFIG_SYS_TEXT_BASE 0xf8f80000
#endif
-#ifdef CONFIG_MK_SPIFLASH
+#ifdef CONFIG_SPIFLASH
#define CONFIG_RAMBOOT_SPIFLASH 1
-#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000
+#define CONFIG_SYS_TEXT_BASE 0xf8f80000
+#endif
+
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xeff80000
#endif
/* High Level Configuration Options */
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \
|| defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH)
*/
#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
"netdev=eth0\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
"consoledev=ttyS0\0" \
"ramdiskaddr=2000000\0" \
"ramdiskfile=8536ds/ramdisk.uboot\0" \
#define CONFIG_MPC8540 1 /* MPC8540 specific */
#define CONFIG_MPC8540ADS 1 /* MPC8540ADS board specific */
+/*
+ * default CCARBAR is at 0xff700000
+ * assume U-Boot is less than 0.5MB
+ */
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
+
#ifndef CONFIG_HAS_FEC
#define CONFIG_HAS_FEC 1 /* 8540 has FEC */
#endif
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
*/
#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MPC8540 1 /* MPC8540 specific */
#define CONFIG_MPC8540EVAL 1 /* MPC8540EVAL board specific */
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
+
#undef CONFIG_PCI /* pci ethernet support */
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms)*/
#define CONFIG_SYS_FLASH_CFI 1
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MPC8541 1 /* MPC8541 specific */
#define CONFIG_MPC8541CDS 1 /* MPC8541CDS board specific */
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
+
#define CONFIG_PCI
#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
*/
#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MPC8544 1
#define CONFIG_MPC8544DS 1
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
+#endif
+
#define CONFIG_PCI 1 /* Enable PCI/PCIE */
#define CONFIG_PCI1 1 /* PCI controller 1 */
#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
*/
#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
"netdev=eth0\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
"consoledev=ttyS0\0" \
"ramdiskaddr=2000000\0" \
"ramdiskfile=8544ds/ramdisk.uboot\0" \
#define CONFIG_MPC8548 1 /* MPC8548 specific */
#define CONFIG_MPC8548CDS 1 /* MPC8548CDS board specific */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
+#endif
+
#define CONFIG_PCI /* enable any pci type devices */
#define CONFIG_PCI1 /* PCI controller 1 */
#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
*/
#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
"netdev=eth0\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
"consoledev=ttyS1\0" \
"ramdiskaddr=2000000\0" \
"ramdiskfile=ramdisk.uboot\0" \
#define CONFIG_MPC8555 1 /* MPC8555 specific */
#define CONFIG_MPC8555CDS 1 /* MPC8555CDS board specific */
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
+
#define CONFIG_PCI
#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
*/
#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MPC8560ADS 1 /* MPC8560ADS board specific */
#define CONFIG_MPC8560 1
+/*
+ * default CCARBAR is at 0xff700000
+ * assume U-Boot is less than 0.5MB
+ */
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
+
#define CONFIG_PCI
#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
*/
#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MPC8568 1 /* MPC8568 specific */
#define CONFIG_MPC8568MDS 1 /* MPC8568MDS board specific */
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
+
#define CONFIG_PCI 1 /* Enable PCI/PCIE */
#define CONFIG_PCI1 1 /* PCI controller */
#define CONFIG_PCIE1 1 /* PCIE controller */
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
*/
#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_SYS_CLK_FREQ 66666666
#define CONFIG_DDR_CLK_FREQ CONFIG_SYS_CLK_FREQ
-#ifdef CONFIG_MK_ATM
+#ifdef CONFIG_ATM
#define CONFIG_PQ_MDS_PIB
#define CONFIG_PQ_MDS_PIB_ATM
#endif
#define CONFIG_L2_CACHE /* toggle L2 cache */
#define CONFIG_BTB /* toggle branch predition */
-#ifdef CONFIG_MK_NAND
+#ifdef CONFIG_NAND
#define CONFIG_NAND_U_BOOT 1
#define CONFIG_RAMBOOT_NAND 1
-#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f82000
+#define CONFIG_SYS_TEXT_BASE 0xf8f82000
+#endif
+
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
#endif
/*
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND)
#define CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
/* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#include "../board/freescale/common/ics307_clk.h"
-#ifdef CONFIG_MK_36BIT
+#ifdef CONFIG_36BIT
#define CONFIG_PHYS_64BIT
#endif
#define CONFIG_MPC8572DS 1
#define CONFIG_MP 1 /* support multiple processors */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xeff80000
+#endif
+
#define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */
#define CONFIG_PCI 1 /* Enable PCI/PCIE */
#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
*/
#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
"netdev=eth0\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
"consoledev=ttyS0\0" \
"ramdiskaddr=2000000\0" \
"ramdiskfile=8572ds/ramdisk.uboot\0" \
#define CONFIG_MPC8610HPCD 1 /* MPC8610HPCD board specific */
#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_FSL_DIU_FB 1 /* FSL DIU */
/* video */
#undef CONFIG_SYS_FLASH_CHECKSUM
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */
#define CONFIG_FLASH_CFI_DRIVER
/* Map the last 1M of flash where we're running from reset */
#define CONFIG_SYS_DBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \
| BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT6U_EARLY (TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP)
+#define CONFIG_SYS_DBAT6U_EARLY (CONFIG_SYS_TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP)
#define CONFIG_SYS_IBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \
| BATL_MEMCOHERENCE)
#define CONFIG_SYS_IBAT6U_EARLY CONFIG_SYS_DBAT6U_EARLY
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
"netdev=eth0\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
"consoledev=ttyS0\0" \
"ramdiskaddr=2000000\0" \
"ramdiskfile=8610hpcd/ramdisk.uboot\0" \
/*#define CONFIG_PHYS_64BIT 1*/ /* Place devices in 36-bit space */
#define CONFIG_ADDR_MAP 1 /* Use addr map */
+/*
+ * default CCSRBAR is at 0xff700000
+ * assume U-Boot is less than 0.5MB
+ */
+#define CONFIG_SYS_TEXT_BASE 0xeff00000
+
#ifdef RUN_DIAG
#define CONFIG_SYS_DIAG_ADDR CONFIG_SYS_FLASH_BASE
#endif
#undef CONFIG_SYS_FLASH_CHECKSUM
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */
#define CONFIG_FLASH_CFI_DRIVER
/* Map the last 1M of flash where we're running from reset */
#define CONFIG_SYS_DBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \
| BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT6U_EARLY (TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP)
+#define CONFIG_SYS_DBAT6U_EARLY (CONFIG_SYS_TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP)
#define CONFIG_SYS_IBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \
| BATL_MEMCOHERENCE)
#define CONFIG_SYS_IBAT6U_EARLY CONFIG_SYS_DBAT6U_EARLY
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
"netdev=eth0\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
"consoledev=ttyS0\0" \
"ramdiskaddr=2000000\0" \
"ramdiskfile=your.ramdisk.u-boot\0" \
#undef CONFIG_MPC859DSL
#undef CONFIG_MPC852T
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
#define CONFIG_MPC885 1 /* MPC885 CPU (Duet family) */
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
#define CONFIG_MPC8245 1
#define CONFIG_MUSENKI 1
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 9600
#define CONFIG_SYS_EUMB_ADDR 0xFC000000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
* Definitions for initial stack pointer and data area
*/
-/* #define CONFIG_SYS_MONITOR_BASE TEXT_BASE */
+/* #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE */
/*#define CONFIG_SYS_GBL_DATA_SIZE 256*/
#define CONFIG_SYS_GBL_DATA_SIZE 128
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC5xxx 1
#define CONFIG_MPC5200 1
-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFF800000
+#endif
-#define BOOTFLAG_COLD 0x01
-#define BOOTFLAG_WARM 0x02
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000
#define CONFIG_MISC_INIT_R 1
#define CONFIG_SYS_MAX_FLASH_SECT 256
#define CONFIG_SYS_LOWBOOT
-#define CONFIG_SYS_FLASH_BASE TEXT_BASE
+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_FLASH_SIZE 0x00800000
/*
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_MPC834x 1
#define CONFIG_MPC8343 1
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#define CONFIG_SYS_IMMR 0xE0000000
#define CONFIG_PCI
/*
* U-Boot memory configuration
*/
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#undef CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_INIT_RAM_LOCK
#define CONFIG_NET_MULTI 1
#define CONFIG_NET_RETRY_COUNT 3
-#define PCI_66M
+#define CONFIG_PCI_66M
#define CONFIG_83XX_CLKIN 66666667
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/*
* Environment Configuration
*/
#define MVBLUE_BOARD_BOX 1
#define MVBLUE_BOARD_LYNX 2
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#if 0
#define ERR_LED(code) do { if (code) \
*(volatile char *)(0xff000003) = ( 3 | (code<<4) ) & 0xf3; \
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE 0xFFF00000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100
#define CONFIG_SYS_EUMB_ADDR 0xFC000000
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A7 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC5xxx 1
#define CONFIG_MPC5200 1
-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFF800000
+#endif
-#define BOOTFLAG_COLD 0x01
-#define BOOTFLAG_WARM 0x02
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000
#define CONFIG_MISC_INIT_R 1
#define CONFIG_SYS_MAX_FLASH_SECT 256
#define CONFIG_SYS_LOWBOOT
-#define CONFIG_SYS_FLASH_BASE TEXT_BASE
+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_FLASH_SIZE 0x00800000
/*
CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_MPC852T 1
#define CONFIG_NC650 1
+#define CONFIG_SYS_TEXT_BASE 0x40700000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */
/*
#define CONFIG_SYS_MBMR_NAND ( MBMR_WLFB_5X )
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */
#define NAND_CACHE_PAGES 16 /* size of nand cache in 512 bytes pages */
#define CONFIG_MPC870 1 /* This is a MPC885 CPU */
#define CONFIG_NETPHONE 1 /* ...on a NetPhone board */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_LAST_STAGE_INIT /* needed to reset the damn phys */
/****************************************************************/
#define CONFIG_MPC885 1 /* This is a MPC885 CPU */
#define CONFIG_NETTA 1 /* ...on a NetTA board */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_LAST_STAGE_INIT /* needed to reset the damn phys */
/***********************************************************************************************************
#define CONFIG_MPC870 1 /* This is a MPC885 CPU */
#define CONFIG_NETTA2 1 /* ...on a NetTA2 board */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_LAST_STAGE_INIT /* needed to reset the damn phys */
/****************************************************************/
#define CONFIG_MPC850 1 /* This is a MPC850 CPU */
#define CONFIG_NETVIA 1 /* ...on a NetVia board */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#if !defined(CONFIG_NETVIA_VERSION) || CONFIG_NETVIA_VERSION == 1
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/* Ethernet at SCC2 */
#define CONFIG_SCC2_ENET
#define CONFIG_TQM855M 1 /* ...on a TQM8xxM module */
#define CONFIG_NSCU 1
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SCC1 1 /* Console is on SMC1 */
#define CONFIG_SYS_SMC_RXBUFLEN 128
#define CONFIG_SYS_MAXIDLE 10
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#undef CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
#define CONFIG_MPC823 1 /* This is a MPC823 CPU */
#define CONFIG_NX823 1 /* ...on a NEXUS 823 module */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
/*#define CONFIG_VIDEO 1 */
#define CONFIG_8xx_GCLK_FREQ MPC8XX_SPEED
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_ENV_OVERWRITE /* allow changes to ethaddr (for now) */
#define CONFIG_ETHADDR 00:10:20:30:40:50
#define CONFIG_IPADDR 10.77.77.20
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_OCRTC 1 /* ...on a OCRTC board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFD0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC8240 1
#define CONFIG_OXC 1
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_IDENT_STRING " [oxc] "
#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN 0x00030000
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_PRELIMBASE)
#if defined(CONFIG_CMD_KGDB)
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_P1022DS
#define CONFIG_MP /* support multiple processors */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xeff80000
+#endif
+
#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */
#define CONFIG_PCI /* Enable PCI/PCIE */
#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
#define CONFIG_SYS_MAX_FLASH_BANKS 2
#define CONFIG_SYS_MAX_FLASH_SECT 1024
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
*/
#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#ifdef CONFIG_CMD_KGDB
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
"netdev=eth0\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
"consoledev=ttyS0\0" \
"ramdiskaddr=2000000\0" \
"ramdiskfile=uramdisk\0" \
#ifndef __CONFIG_H
#define __CONFIG_H
-#ifdef CONFIG_MK_P1011RDB
+#ifdef CONFIG_P1011RDB
#define CONFIG_P1011
#endif
-#ifdef CONFIG_MK_P1020RDB
+#ifdef CONFIG_P1020RDB
#define CONFIG_P1020
#endif
-#ifdef CONFIG_MK_P2010RDB
+#ifdef CONFIG_P2010RDB
#define CONFIG_P2010
#endif
-#ifdef CONFIG_MK_P2020RDB
+#ifdef CONFIG_P2020RDB
#define CONFIG_P2020
#endif
-#ifdef CONFIG_MK_NAND
+#ifdef CONFIG_NAND
#define CONFIG_NAND_U_BOOT 1
#define CONFIG_RAMBOOT_NAND 1
-#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f82000
+#define CONFIG_SYS_TEXT_BASE 0xf8f82000
#endif
-#ifdef CONFIG_MK_SDCARD
+#ifdef CONFIG_SDCARD
#define CONFIG_RAMBOOT_SDCARD 1
-#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000
+#define CONFIG_SYS_TEXT_BASE 0xf8f80000
#endif
-#ifdef CONFIG_MK_SPIFLASH
+#ifdef CONFIG_SPIFLASH
#define CONFIG_RAMBOOT_SPIFLASH 1
-#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000
+#define CONFIG_SYS_TEXT_BASE 0xf8f80000
+#endif
+
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xeff80000
#endif
/* High Level Configuration Options */
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \
|| defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH)
*/
#define CONFIG_SYS_BOOTMAPSZ (16 << 20)/* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"loadaddr=1000000\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
"consoledev=ttyS0\0" \
"ramdiskaddr=2000000\0" \
"ramdiskfile=rootfs.ext2.gz.uboot\0" \
#include "../board/freescale/common/ics307_clk.h"
-#ifdef CONFIG_MK_36BIT
+#ifdef CONFIG_36BIT
#define CONFIG_PHYS_64BIT
#endif
#define CONFIG_P2020DS 1
#define CONFIG_MP 1 /* support multiple processors */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xeff80000
+#endif
+
#define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */
#define CONFIG_PCI 1 /* Enable PCI/PCIE */
#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */
/* DDR Setup */
#define CONFIG_VERY_BIG_RAM
-#ifdef CONFIG_MK_DDR2
+#ifdef CONFIG_DDR2
#define CONFIG_FSL_DDR2
#else
#define CONFIG_FSL_DDR3 1
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
*/
#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
"netdev=eth0\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
"consoledev=ttyS0\0" \
"ramdiskaddr=2000000\0" \
"ramdiskfile=p2020ds/ramdisk.uboot\0" \
#define CONFIG_P3G4 1 /* this is a P3G4 board */
#define CONFIG_SYS_GT_6426x GT_64260 /* with a 64260 system controller */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_BAUDRATE 115200 /* console baudrate = 115200 */
#undef CONFIG_ECC /* enable ECC support */
#define CONFIG_SYS_FLASH_BASE 0xff000000
#define CONFIG_SYS_RESET_ADDRESS 0xfff00100
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */
/* areas to map different things with the GT in physical space */
#define L2_ENABLE (L2_INIT | L2CR_L2E)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SYS_BOARD_ASM_INIT 1
#define CONFIG_SYS_P4080_ERRATUM_CPU22
#define CONFIG_SYS_P4080_ERRATUM_SERDES8
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xeff80000
+#endif
+
#include "corenet_ds.h"
#define CONFIG_MPC555 1 /* This is an MPC555 CPU */
#define CONFIG_PATI 1 /* ...On a PATI board */
+
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
/* Serial Console Configuration */
#define CONFIG_5xx_CONS_SCI1
#undef CONFIG_5xx_CONS_SCI2
#define PLD_CONFIG_BASE 0x04001000 /* PLD (CS3) */
#define CONFIG_SYS_MONITOR_BASE 0xFFF00000
-/* CONFIG_SYS_FLASH_BASE */ /* TEXT_BASE is defined in the board config.mk file. */
+/* CONFIG_SYS_FLASH_BASE */ /* CONFIG_SYS_TEXT_BASE is defined in the board config.mk file. */
/* This adress is given to the linker with -Ttext to */
/* locate the text section at this adress. */
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 192 kB for Monitor */
*/
#define CONFIG_SYS_DER 0x00000000
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
#define VERSION_TAG "released"
#define CONFIG_ISO_STRING "MEV-10084-001"
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_PCI405 1 /* ...on a PCI405 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFD0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() on init */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_PCIPPC2 1 /* this is a PCIPPC2 board */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_BOARD_EARLY_INIT_F 1
#define CONFIG_MISC_INIT_R 1
#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT)
#define L2_ENABLE (L2_INIT | L2CR_L2E)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*-----------------------------------------------------------------------
RTC m48t59
*/
#define CONFIG_PCIPPC2 1 /* this is a PCIPPC2 board */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_BOARD_EARLY_INIT_F 1
#define CONFIG_MISC_INIT_R 1
#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT)
#define L2_ENABLE (L2_INIT | L2CR_L2E)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*-----------------------------------------------------------------------
RTC m48t59
*/
#define CONFIG_405GP 1 /* This is a PPC405 CPU */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_PIP405 1 /* ...on a PIP405 board */
+
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+
/***********************************************************
* Clock
***********************************************************/
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/***********************************************************************
* External peripheral base address
***********************************************************************/
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_PLU405 1 /* ...on a PLU405 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1)
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1)
#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
/*
#define CONFIG_SYS_DUART_RST (0x80000000 >> 14)
#define CONFIG_SYS_EEPROM_WP (0x80000000 >> 0)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Default speed selection (cpu_plb_opb_ebc) in MHz.
* This value will be set if iic boot eprom is disabled.
#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
#define CONFIG_PM520 1 /* ... on PM520 board */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */
#define CONFIG_MISC_INIT_R
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/*
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_PM826 1 /* ...on a PM8260 module */
#define CONFIG_CPM2 1 /* Has a CPM2 */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFF000000 /* Standard: boot 64-bit flash */
+#endif
+
#undef CONFIG_DB_CR826_J30x_ON /* J30x jumpers on D.B. carrier */
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/
#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CONFIG_PM828 1 /* ...on a PM828 module */
#define CONFIG_CPM2 1 /* Has a CPM2 */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0x40000000 /* Standard: boot 64-bit flash */
+#endif
+
#undef CONFIG_DB_CR826_J30x_ON /* J30x jumpers on D.B. carrier */
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/
#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CONFIG_MPC8540 1 /* MPC8540 specific */
#define CONFIG_PM854 1 /* PM854 board specific */
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
+
#define CONFIG_PCI
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_CPM2 1 /* Has a CPM2 */
#define CONFIG_PM856 1 /* PM856 board specific */
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
+
#define CONFIG_PCI
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_PMC405 1 /* ...on a PMC405 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1)
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* 128 kB for malloc() */
#define CONFIG_PRAM 0 /* use pram variable to overwrite */
CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_OF_LIBFDT
#define CONFIG_OF_BOARD_SETUP
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_PMC405DE 1 /* ...on a PMC405DE board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
#define CONFIG_BOARD_TYPES 1 /* support board types */
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE 0xfe000000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1)
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1)
#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
/*
#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_4xx 1 /* ... PPC4xx family */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF90000
+#endif
+
#define CONFIG_SYS_CLK_FREQ 33333400
#if 0 /* temporary disabled because OS/9 does not like dcache on startup */
* Base addresses -- Note these are effective addresses where the
* actual resources get mapped (not physical addresses)
*----------------------------------------------------------------------*/
-#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1)
+#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1)
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserve 256 kB for malloc() */
#define CONFIG_PRAM 0 /* use pram variable to overwrite */
#define CONFIG_SYS_BOOT_BASE_ADDR 0xf0000000
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
#define CONFIG_SYS_FLASH_BASE 0xfc000000 /* start of FLASH */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_ADDR 0xd0000000 /* NAND Flash */
#define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */
#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_OCM_BASE
#define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */
#define CONFIG_SYS_NAND_QUIET_TEST 1
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MPC8240 1
#define CONFIG_PN62 1
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#define CONFIG_CONS_INDEX 1
#undef CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_MONITOR_LEN 0x00030000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
/*#define CONFIG_SYS_GBL_DATA_SIZE 256*/
#define CONFIG_SYS_GBL_DATA_SIZE 128
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
#endif /* __CONFIG_H */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_PPCHAMELEONEVB 1 /* ...on a PPChameleonEVB board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 /* Reserve 320 kB for Monitor */
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
#define CONFIG_SYS_GPIO0_TSRH 0x00000000
#define CONFIG_SYS_GPIO0_TCR 0xF7FF8014
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
#define CONFIG_NO_SERIAL_EEPROM
/*--------------------------------------------------------------------*/
#define CONFIG_QS823 1 /* ...on a QS823 module */
#define CONFIG_SCC2_ENET 1 /* SCC2 10BaseT ethernet */
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
/* Select the target clock speed */
#undef CONFIG_CLOCK_16MHZ /* cpu=16,777,216 Hz, mem=16Mhz */
#undef CONFIG_CLOCK_33MHZ /* cpu=33,554,432 Hz, mem=33Mhz */
#define CONFIG_SYS_OR7_PRELIM 0xFFF00000
#define CONFIG_SYS_BR7_PRELIM 0xF0700000
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Sanity checks
*/
#define CONFIG_QS850 1 /* ...on a QS850 module */
#define CONFIG_SCC2_ENET 1 /* SCC2 10BaseT ethernet */
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
/* Select the target clock speed */
#undef CONFIG_CLOCK_16MHZ /* cpu=16,777,216 Hz, mem=16Mhz */
#undef CONFIG_CLOCK_33MHZ /* cpu=33,554,432 Hz, mem=33Mhz */
#define CONFIG_SYS_OR7_PRELIM 0xFFF00000
#define CONFIG_SYS_BR7_PRELIM 0xF0700000
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Sanity checks
*/
#define CONFIG_MPC860 1 /* This is a MPC860 CPU */
#define CONFIG_QS860T 1 /* ...on a QS860T module */
+/* Start address of 512K Socketed Flash */
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#define CONFIG_FEC_ENET 1 /* FEC 10/100BaseT ethernet */
#define CONFIG_MII
#define FEC_INTERRUPT SIU_LEVEL1
/* #define CONFIG_SYS_OR7 0xFF000000 */
/* #define CONFIG_SYS_BR7 0xE8000000 */
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Sanity checks
*/
#define CONFIG_MPC823 1 /* This is a MPC823 CPU */
#define CONFIG_R360MPI 1
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_LCD
#undef CONFIG_EDT32F10
#define CONFIG_SHARP_LQ057Q3DC02
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC823 1 /* This is a MPC823 CPU */
#define CONFIG_RBC823 1 /* ...on a RBC823 module */
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
#if 0
#define DEBUG 1
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* JFFS2 partitions
*
#define CONFIG_MPC860 1
#define CONFIG_RPXCLASSIC 1
+#define CONFIG_SYS_TEXT_BASE 0xff000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A12 | \
MAMR_GPL_A4DIS | MAMR_RLFA_4X | MAMR_WLFA_3X | MAMR_TLFA_16X)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */
/* Configuration variable added by yooth. */
/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */
#define CONFIG_MPC850 1 /* This is a MPC850 CPU */
#define CONFIG_RPXLITE 1
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE 0xFFC00000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#ifdef CONFIG_BZIP2
#define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve ~4 MB for malloc() */
MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A12 | \
MAMR_GPL_A4DIS | MAMR_RLFA_4X | MAMR_WLFA_3X | MAMR_TLFA_16X)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */
/* Configuration variable added by yooth. */
/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */
#define CONFIG_MPC823 1 /* This is a MPC823e CPU. */
#define CONFIG_RPXLITE 1 /* RPXlite DW version board */
+#define CONFIG_SYS_TEXT_BASE 0xff000000
+
#ifdef CONFIG_LCD /* with LCD controller ? */
#define CONFIG_SPLASH_SCREEN /* ... with splashscreen support*/
#endif
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10)
/* CONFIG_SYS_MAMR_9COL:0x20904000 @ 64MHz */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */
/* Configuration variable added by yooth. */
/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_TEXT_BASE 0x80F00000
/*****************************************************************************
*
#undef CONFIG_SYS_SBC_BOOT_LOW
/* What should the base address of the main FLASH be and how big is
- * it (in MBytes)? This must contain TEXT_BASE from board/sbc8260/config.mk
+ * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/sbc8260/config.mk
* The main FLASH is whichever is connected to *CS0. U-Boot expects
* this to be the SIMM.
*/
ORxG_SCY_5_CLK |\
ORxG_TRLX)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC823 1 /* This is a MPC823 CPU */
#define CONFIG_RRVISION 1 /* ...on a RRvision board */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_GCLK_FREQ 64000000
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CPU_ID_STR "MPC8250"
#endif /* CONFIG_MPC8248 */
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+
#define CONFIG_CPM2 1 /* Has a CPM2 */
#define CONFIG_RATTLER /* Analogue&Micro Rattler board */
*/
#endif /* CONFIG_CMD_JFFS2 */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_SYS_HRCW_SLAVE6 0
#define CONFIG_SYS_HRCW_SLAVE7 0
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*
* Top level Makefile configuration choices
*/
-#ifdef CONFIG_MK_66
+#ifdef CONFIG_66
#define CONFIG_PCI_66
#endif
#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */
#define CONFIG_MPC85xx_REV1 1 /* MPC85xx Rev 1.0 chip */
+#define CONFIG_SYS_TEXT_BASE 0xfffc0000
+
#define CONFIG_CPM2 1 /* has CPM2 */
#define CONFIG_SYS_FLASH_ERASE_TOUT 200000 /* Timeout for Flash Erase (in ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 50000 /* Timeout for Flash Write (in ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if 0
/* XXX This doesn't work and I don't want to fix it */
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_SCM 1 /* ...on a System Controller Module */
#define CONFIG_CPM2 1 /* Has a CPM2 */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#if (CONFIG_TQM8260 <= 100)
# error "TQM8260 module revison not supported"
#endif
/* What should the base address of the main FLASH be and how big is
- * it (in MBytes)? This must contain TEXT_BASE from board/tqm8260/config.mk
+ * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/tqm8260/config.mk
* The main FLASH is whichever is connected to *CS0.
*/
#define CONFIG_SYS_FLASH0_BASE 0x40000000
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/*-----------------------------------------------------------------------
* Hardware Information Block
*/
#define CONFIG_MPC831x 1
#define CONFIG_MPC8313 1
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0x00100000
+#endif
+
#define CONFIG_PCI
#define CONFIG_FSL_ELBC 1
*/
#define CONFIG_SYS_NO_FLASH
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if !defined(CONFIG_NAND_SPL)
#define CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Environment Configuration
*/
"ethprime=TSEC1\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
"fdtaddr=ae0000\0" \
"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \
"console=ttyS0\0" \
#define CONFIG_MPC850 1 /* This is a MPC850 CPU */
#define CONFIG_SM850 1 /*...on a MPC850 Service Module */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */
#define CONFIG_SYS_SMC_RXBUFLEN 128
#define CONFIG_SYS_MAXIDLE 10
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_MPC823 1 /* This is a MPC823 CPU */
#define CONFIG_SPD823TS 1 /* ...on a SPD823TS board */
+#define CONFIG_SYS_TEXT_BASE 0xFF000000
+
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
MBMR_AMB_TYPE_0 | MBMR_DSB_1_CYCL | MBMR_G0CLB_A11 | \
MBMR_RLFB_1X | MBMR_WLFB_1X | MBMR_TLFB_4X)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC860T 1
#define CONFIG_MPC855T 1
+#define CONFIG_SYS_TEXT_BASE 0xF8000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_SCC1
#define DUART_BR5_VALUE ((CONFIG_SYS_DUARTA_BASE & BR_BA_MSK ) | DUART_BR_VALUE)
#define DUART_BR6_VALUE ((CONFIG_SYS_DUARTB_BASE & BR_BA_MSK ) | DUART_BR_VALUE)
-/**********************************************************
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_RESET_ON_PANIC /* reset if system panic() */
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_MPC8240 1
#define CONFIG_SANDPOINT 1
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#if 0
#define USE_DINK32 1
#else
#else
#undef CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_MONITOR_LEN 0x00030000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
/*#define CONFIG_SYS_GBL_DATA_SIZE 256*/
#define CONFIG_SYS_GBL_DATA_SIZE 128
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/* values according to the manual */
#define CONFIG_DRAM_50MHZ 1
#define CONFIG_MPC8245 1
#define CONFIG_SANDPOINT 1
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#if 0
#define USE_DINK32 1
#else
#else
#undef CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_MONITOR_LEN 0x00030000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
/*#define CONFIG_SYS_GBL_DATA_SIZE 256*/
#define CONFIG_SYS_GBL_DATA_SIZE 128
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/* values according to the manual */
#define CONFIG_DRAM_50MHZ 1
#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
#define CONFIG_TB5200 1 /* ... on a TB5200 base board */
-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ * 0xFC000000 boot low (standard configuration with room for
+ * max 64 MByte Flash ROM)
+ * 0xFFF00000 boot high (for a backup copy of U-Boot)
+ * 0x00100000 boot from RAM (for testing only)
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFC000000
+#endif
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
#define CONFIG_TIMESTAMP /* display image timestamps */
-#if (TEXT_BASE == 0xFC000000) /* Boot low */
+#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) /* Boot low */
# define CONFIG_SYS_LOWBOOT 1
#endif
/*
* Flash configuration
*/
-#define CONFIG_SYS_FLASH_BASE TEXT_BASE /* 0xFC000000 */
+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE /* 0xFC000000 */
/* use CFI flash driver */
#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_TQM885D 1 /* ...on a TQM88D module */
#define CONFIG_TK885D 1 /* ...in a TK885D base board */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_OSCLK 10000000 /* 10 MHz - PLL input clock */
#define CONFIG_SYS_8xx_CPUCLK_MIN 15000000 /* 15 MHz - CPU minimum clock */
#define CONFIG_SYS_8xx_CPUCLK_MAX 133000000 /* 133 MHz - CPU maximum clock */
MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A9 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Network configuration
*/
#define CONFIG_MPC5200 1 /* More exactly a MPC5200 */
#define CONFIG_TOP5200 1 /* ... on TOP5200 board - we need this for FEC.C */
-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
+/*
+ * allowed and functional CONFIG_SYS_TEXT_BASE values:
+ * 0xff000000 low boot at 0x00000100 (default board setting)
+ * 0xfff00000 high boot at 0xfff00100 (board needs modification)
+ * 0x00100000 RAM load and test
+ */
+#define CONFIG_SYS_TEXT_BASE 0xff000000
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/*
* MUST be low boot - HIGHBOOT is not supported anymore
*/
-#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
+#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
# define CONFIG_SYS_LOWBOOT 1
# define CONFIG_SYS_LOWBOOT16 1
#else
-# error "TEXT_BASE must be 0xff000000"
+# error "CONFIG_SYS_TEXT_BASE must be 0xff000000"
#endif
/*
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_MPC860 1 /* This is a MPC860 CPU */
#define CONFIG_MPC860T 1 /* even better... an FEC! */
#define CONFIG_TOP860 1 /* ...on a TOP860 module */
+
+#define CONFIG_SYS_TEXT_BASE 0x80000000
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_IDENT_STRING " EMK TOP860"
* adresses
*/
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
/*-----------------------------------------------------------------------
*/
#define FEC_INTERRUPT SIU_LEVEL1 /* FEC interrupt */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*-----------------------------------------------------------------------
* Debug Enable Register
*-----------------------------------------------------------------------
#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ * 0xFC000000 boot low (standard configuration with room for
+ * max 64 MByte Flash ROM)
+ * 0xFFF00000 boot high (for a backup copy of U-Boot)
+ * 0x00100000 boot from RAM (for testing only)
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFC000000
+#endif
+
/* On a Cameron or on a FO300 board or ... */
#if !defined(CONFIG_CAM5200) && !defined(CONFIG_FO300)
#define CONFIG_STK52XX 1 /* ... on a STK52XX board */
#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/*
#define CONFIG_TIMESTAMP /* display image timestamps */
-#if (TEXT_BASE != 0xFFF00000)
+#if (CONFIG_SYS_TEXT_BASE != 0xFFF00000)
# define CONFIG_SYS_LOWBOOT 1 /* Boot low */
#endif
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_MPC823 1 /* This is a MPC823 CPU */
#define CONFIG_TQM823L 1 /* ...on a TQM8xxL module */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#ifdef CONFIG_LCD /* with LCD controller ? */
#define CONFIG_LCD_LOGO 1 /* print our logo on the LCD */
#define CONFIG_LCD_INFO 1 /* ... and some board info */
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_MPC823 1 /* This is a MPC823 CPU */
#define CONFIG_TQM823M 1 /* ...on a TQM8xxM module */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#ifdef CONFIG_LCD /* with LCD controller ? */
/* #define CONFIG_NEC_NL6448BC20 1 / * use NEC NL6448BC20 display */
#endif
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
* (easy to change)
*/
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_MPC8260 1 /* This is a MPC8260 CPU */
#if 0
/* What should the base address of the main FLASH be and how big is
- * it (in MBytes)? This must contain TEXT_BASE from board/tqm8260/config.mk
+ * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/tqm8260/config.mk
* The main FLASH is whichever is connected to *CS0.
*/
#define CONFIG_SYS_FLASH0_BASE 0x40000000
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc()*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CONFIG_MPC8272_FAMILY 1
#define CONFIG_TQM8272 1
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_GET_CPU_STR_F 1 /* Get the CPU ID STR */
#define CONFIG_BOARD_GET_CPU_CLK_F 1 /* Get the CLKIN from board fct */
/* What should the base address of the main FLASH be and how big is
- * it (in MBytes)? This must contain TEXT_BASE from board/tqm8272/config.mk
+ * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/tqm8272/config.mk
* The main FLASH is whichever is connected to *CS0.
*/
#define CONFIG_SYS_FLASH0_BASE 0x40000000
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CONFIG_MPC8349 1 /* MPC8349 specific */
#define CONFIG_TQM834X 1 /* TQM834X board specific */
+#define CONFIG_SYS_TEXT_BASE 0x80000000
+
/* IMMR Base Addres Register, use Freescale default: 0xff400000 */
#define CONFIG_SYS_IMMR 0xff400000
/*
* Monitor config
*/
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MPC850 1 /* This is a MPC850 CPU */
#define CONFIG_TQM850L 1 /* ...on a TQM8xxL module */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#define CONFIG_SYS_SMC_RXBUFLEN 128
#define CONFIG_SYS_MAXIDLE 10
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_MPC850 1 /* This is a MPC850 CPU */
#define CONFIG_TQM850M 1 /* ...on a TQM8xxM module */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#define CONFIG_SYS_SMC_RXBUFLEN 128
#define CONFIG_SYS_MAXIDLE 10
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_MPC855 1 /* This is a MPC855 CPU */
#define CONFIG_TQM855L 1 /* ...on a TQM8xxL module */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#define CONFIG_SYS_SMC_RXBUFLEN 128
#define CONFIG_SYS_MAXIDLE 10
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC"
#define CONFIG_MPC855 1 /* This is a MPC855 CPU */
#define CONFIG_TQM855M 1 /* ...on a TQM8xxM module */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#define CONFIG_SYS_SMC_RXBUFLEN 128
#define CONFIG_SYS_MAXIDLE 10
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC"
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41 */
+#if defined(CONFIG_TQM8548_BE)
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
+#else
+#define CONFIG_SYS_TEXT_BASE 0xfffc0000
+#endif
+
#if defined(CONFIG_TQM8548_AG) || defined(CONFIG_TQM8548_BE)
#define CONFIG_TQM8548
#endif
* NAND flash support (disabled by default)
*
* Warning: NAND support will likely increase the U-Boot image size
- * to more than 256 KB. Please adjust TEXT_BASE if necessary.
+ * to more than 256 KB. Please adjust CONFIG_SYS_TEXT_BASE if necessary.
*/
#ifdef CONFIG_TQM8548_BE
#define CONFIG_NAND
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
/*
* Note: when changing the Local Bus clock divider you have to
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_LEN (~TEXT_BASE + 1)/* Reserved for Monitor */
+#define CONFIG_SYS_MONITOR_LEN (~CONFIG_SYS_TEXT_BASE + 1)/* Reserved for Monitor */
#define CONFIG_SYS_MALLOC_LEN (384 * 1024) /* Reserved for malloc */
/* Serial Port */
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port*/
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
MK_STR(CONFIG_HOSTNAME)".dtb\0"
#define CONFIG_ENV_BOOTFILE "bootfile="MK_STR(CONFIG_HOSTNAME)"/uImage\0"
#define CONFIG_ENV_UBOOT "uboot="MK_STR(CONFIG_HOSTNAME)"/u-boot.bin\0" \
- "uboot_addr="MK_STR(TEXT_BASE)"\0"
+ "uboot_addr="MK_STR(CONFIG_SYS_TEXT_BASE)"\0"
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_ENV_BOOTFILE \
#define CONFIG_MPC860 1 /* This is a MPC860 CPU */
#define CONFIG_TQM860L 1 /* ...on a TQM8xxL module */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#define CONFIG_SYS_SMC_RXBUFLEN 128
#define CONFIG_SYS_MAXIDLE 10
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC"
#define CONFIG_MPC860 1 /* This is a MPC860 CPU */
#define CONFIG_TQM860M 1 /* ...on a TQM8xxM module */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#define CONFIG_SYS_SMC_RXBUFLEN 128
#define CONFIG_SYS_MAXIDLE 10
MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A9 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC"
#define CONFIG_TQM862L 1 /* ...on a TQM8xxL module */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#define CONFIG_SYS_SMC_RXBUFLEN 128
#define CONFIG_SYS_MAXIDLE 10
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_NET_MULTI
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
#define CONFIG_TQM862M 1 /* ...on a TQM8xxM module */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#define CONFIG_SYS_SMC_RXBUFLEN 128
#define CONFIG_SYS_MAXIDLE 10
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_NET_MULTI
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
#define CONFIG_MPC866 1 /* This is a MPC866 CPU */
#define CONFIG_TQM866M 1 /* ...on a TQM8xxM module */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_OSCLK 10000000 /* 10 MHz - PLL input clock */
#define CONFIG_SYS_8xx_CPUCLK_MIN 15000000 /* 15 MHz - CPU minimum clock */
#define CONFIG_SYS_8xx_CPUCLK_MAX 133000000 /* 133 MHz - CPU maximum clock */
MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A9 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC"
#define CONFIG_MPC885 1 /* This is a MPC885 CPU */
#define CONFIG_TQM885D 1 /* ...on a TQM88D module */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_OSCLK 10000000 /* 10 MHz - PLL input clock */
#define CONFIG_SYS_8xx_CPUCLK_MIN 15000000 /* 15 MHz - CPU minimum clock */
#define CONFIG_SYS_8xx_CPUCLK_MAX 133000000 /* 133 MHz - CPU maximum clock */
MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A9 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Network configuration
*/
#define CONFIG_MPC5200 1 /* (more precisely a MPC5200 CPU) */
#define CONFIG_TOTAL5200 1 /* ... on Total5200 board */
-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ * 0xFFF00000 boot high (standard configuration)
+ * 0xFE000000 boot low
+ * 0x00100000 boot from RAM (for testing only)
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+#endif
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
#define CONFIG_CMD_USB
-#if (TEXT_BASE == 0xFE000000) /* Boot low */
+#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low */
# define CONFIG_SYS_LOWBOOT 1
#endif
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_VOH405 1 /* ...on a VOH405 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE 0xFFF80000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (2 * 1024*1024) /* Reserve 2 MB for malloc() */
#define CONFIG_SYS_LCD1_RST (0x80000000 >> 31)
#define CONFIG_SYS_EEPROM_WP (0x80000000 >> 0)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Default speed selection (cpu_plb_opb_ebc) in mhz.
* This value will be set if iic boot eprom is disabled.
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_VOM405 1 /* ...on a VOM405 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC8000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1)
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1)
#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
#if (CONFIG_SYS_MONITOR_BASE < FLASH_BASE0_PRELIM)
#define CONFIG_SYS_GPIO0_TSRH 0x00000000 /* 16 ... 31 */
#define CONFIG_SYS_GPIO0_TCR 0xF7FE0014 /* 0 ... 31 */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Default speed selection (cpu_plb_opb_ebc) in mhz.
* This value will be set if iic boot eprom is disabled.
/* define busmode: 8260 */
#undef CONFIG_BUSMODE_60x
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
/* system clock rate (CLKIN) - equal to the 60x and local bus speed */
#ifdef CONFIG_CLKIN_66MHz
#define CONFIG_8260_CLKIN 66666666 /* in Hz */
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_SIZE (32*1024*1024)
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_FLASH (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_OFFSET)
#define CONFIG_SYS_MONITOR_LEN 0x00020000
#define CONFIG_SYS_MALLOC_LEN 0x00020000
-/* boot flags */
-#define BOOTFLAG_COLD 0x01 /* normal power-on */
-#define BOOTFLAG_WARM 0x02 /* software reboot */
-
/* cache configuration */
#define CONFIG_SYS_CACHELINE_SIZE 32 /* for MPC8260 */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_W7O 1 /* ...on a Wave 7 Optics board */
#define CONFIG_W7OLMC 1 /* ...specifically an LMC */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_MISC_INIT_F 1 /* and misc_init_f() */
#define CONFIG_MISC_INIT_R 1 /* and misc_init_r() */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_W7O 1 /* ...on a Wave 7 Optics board */
#define CONFIG_W7OLMG 1 /* ...specifically an LMG */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_MISC_INIT_F 1 /* and misc_init_f() */
#define CONFIG_MISC_INIT_R 1 /* and misc_init_r() */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_WUH405 1 /* ...on a WUH405 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
#define CONFIG_SYS_DUART_RST (0x80000000 >> 14)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Default speed selection (cpu_plb_opb_ebc) in mhz.
* This value will be set if iic boot eprom is disabled.
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+
/*
* DDR config
*/
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-/*
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Environment Configuration
*/
* ff000000 - ffbfffff OS Use/Filesystem (12MB)
*/
-#define CONFIG_UBOOT_ENV_ADDR MK_STR(TEXT_BASE)
+#define CONFIG_UBOOT_ENV_ADDR MK_STR(CONFIG_SYS_TEXT_BASE)
#define CONFIG_FDT_ENV_ADDR MK_STR(0xfff00000)
#define CONFIG_OS_ENV_ADDR MK_STR(0xffc00000)
#define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */
#define CONFIG_ALTIVEC 1
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_PCI 1 /* Enable PCI/PCIE */
#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */
#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff00000, 0xc0000}, \
{0xf7f00000, 0xc0000} }
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */
/*
BATL_PP_RW |\
BATL_CACHEINHIBIT |\
BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT6U_EARLY (TEXT_BASE |\
+#define CONFIG_SYS_DBAT6U_EARLY (CONFIG_SYS_TEXT_BASE |\
BATU_BL_1M |\
BATU_VS |\
BATU_VP)
#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/
#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */
-/*
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Environment Configuration
*/
#define CONFIG_SYS_BOARD_NAME "XPedite5200"
#define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
+#endif
+
#define CONFIG_PCI 1 /* Enable PCI/PCIE */
#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */
#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \
{0xfbf40000, 0xc0000} }
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
/*
* Chip select configuration
#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/
#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */
-/*
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Environment Configuration
*/
#define CONFIG_SYS_BOARD_NAME "XPedite5370"
#define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
+#endif
+
#define CONFIG_PCI 1 /* Enable PCI/PCIE */
#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */
#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \
{0xf7f40000, 0xc0000} }
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
/*
* Chip select configuration
#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/
#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */
-/*
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Environment Configuration
*/
#define CONFIG_MPC8220 1
#define CONFIG_YUKON8220 1 /* ... on Yukon board */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_BAT_RW 1 /* Use common BAT rw code */
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
#define CONFIG_SYS_MPC8220_CLKIN 30000000/* ... running at 30MHz */
#define CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER 16 /* VCO multiplier can't be read from any register */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Serial console configuration
*/
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */
#define CONFIG_ZPC1900 1 /* ...on Zephyr ZPC.1900 board */
+
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+
#define CPU_ID_STR "MPC8265"
#define CONFIG_CPM2 1 /* Has a CPM2 */
#define CONFIG_SYS_HRCW_SLAVE6 0
#define CONFIG_SYS_HRCW_SLAVE7 0
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_EVB64260 1 /* this is an EVB64260 board */
#define CONFIG_ZUMA_V2 1 /* always define this for ZUMA v2 */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
/* #define CONFIG_ZUMA_V2_OLD 1 */ /* backwards compat for old V2 board */
#define CONFIG_BAUDRATE 38400 /* console baudrate = 38400 */
*/
#define CONFIG_GT_I2C
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/*
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_405EZ 1 /* Specifc 405EZ support*/
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+#endif
+
/*
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_AEVFIFO 1
#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ * 0xFC000000 boot low (standard configuration with room for
+ * max 64 MByte Flash ROM)
+ * 0xFFF00000 boot high (for a backup copy of U-Boot)
+ * 0x00100000 boot from RAM (for testing only)
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFC000000
+#endif
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/*
* Serial console configuration
#define CONFIG_TIMESTAMP /* display image timestamps */
-#if (TEXT_BASE == 0xFC000000) /* Boot low */
+#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) /* Boot low */
# define CONFIG_SYS_LOWBOOT 1
#endif
/*
* Flash configuration
*/
-#define CONFIG_SYS_FLASH_BASE TEXT_BASE /* 0xFC000000 */
+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE /* 0xFC000000 */
/* use CFI flash driver if no module variant is spezified */
#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_LAST_STAGE_INIT 1 /* call last_stage_init() */
+
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
#define CONFIG_4xx_DCACHE /* Enable i- and d-cache */
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define __AMCC_COMMON_H
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of U-Boot */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */
#define CONFIG_SYS_MONITOR_LEN (0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1)
#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* Reserved for malloc */
#define CONFIG_FSL_DIU_FB 1 /* FSL DIU */
#define CONFIG_FSL_DIU_LOGO_BMP 1 /* Don't include FSL DIU binary bmp */
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
/* video */
#undef CONFIG_VIDEO
CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (384 * 1024)
#ifdef CONFIG_FSL_DIU_FB
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01
-#define BOOTFLAG_WARM 0x02
-
#ifdef CONFIG_CMD_KGDB
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define PHYS_FLASH_BANK_SIZE 0x01000000 /* 16 MB Banks */
#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 KB for Monitor */
#if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE
#include <config_cmd_default.h>
/*
- * CONFIG_MK_RAM defines if u-boot is loaded via BDM (or started from
+ * CONFIG_RAM defines if u-boot is loaded via BDM (or started from
* a different bootloader that has already performed RAM setup) or
* started directly from flash, which is the regular case for production
* boards.
*/
-#ifdef CONFIG_MK_RAM
+#ifdef CONFIG_RAM
#define CONFIG_MONITOR_IS_IN_RAM
-#define CONFIG_TEXT_BASE 0x40020000
+#define CONFIG_SYS_TEXT_BASE 0x40020000
#define ENABLE_JFFS 0
#else
-#define CONFIG_TEXT_BASE 0x00000000
+#define CONFIG_SYS_TEXT_BASE 0x00000000
#define ENABLE_JFFS 1
#endif
#define CONFIG_SYS_FLASH_BASE 0x00000000
#ifdef CONFIG_MONITOR_IS_IN_RAM
-#define CONFIG_SYS_MONITOR_BASE CONFIG_TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#else
/* This is mainly used during relocation in start.S */
#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
#define CONFIG_ATC 1 /* ...on a ATC board */
#define CONFIG_CPM2 1 /* Has a CPM2 */
+#define CONFIG_SYS_TEXT_BASE 0xFF000000
+
/*
* select serial console configuration
*
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_MAX_SIZE 0x08000000 /* max. 128 MB */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/
#define CONFIG_ENV_SIZE 2048
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* 16-byte page size */
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*-----------------------------------------------------------------------
* Cache Configuration
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
+#endif
+
/*
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_MPC8245 1
#define CONFIG_BARCOBCD_STREAMING 1
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#undef USE_DINK32
#define CONFIG_CONS_INDEX 3 /* set to '3' for on-chip DUART */
#else
#undef CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_MONITOR_LEN 0x00030000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_GBL_DATA_SIZE 128
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/* values according to the manual */
#define CONFIG_DRAM_50MHZ 1
/*
* Video Settings
*/
-#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1
+#ifdef CONFIG_BF527_EZKIT_REV_2_1
# define CONFIG_LQ035Q1_SPI_BUS 0
# define CONFIG_LQ035Q1_SPI_CS 7
#endif
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_440 1
+
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
+#endif
+
/*
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_BUBINGA 1 /* ...on a BUBINGA board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
/*
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_MPC855 1 /* This is a MPC855 CPU */
#define CONFIG_C2MON 1 /* ...on a C2MON module */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_80MHz 1 /* Running at 5 * 16 = 80 MHz */
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC5200 1 /* More exactly a MPC5200 */
#define CONFIG_CANMB 1 /* ... on canmb board - we need this for FEC.C */
-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
+/*
+ * allowed and functional CONFIG_SYS_TEXT_BASE values:
+ * 0xfe000000 low boot at 0x00000100 (default board setting)
+ * 0x00100000 RAM load and test
+ */
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
#define CONFIG_BOARD_EARLY_INIT_R
/*
* MUST be low boot - HIGHBOOT is not supported anymore
*/
-#if (TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */
+#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */
# define CONFIG_SYS_LOWBOOT 1
# define CONFIG_SYS_LOWBOOT16 1
#else
-# error "TEXT_BASE must be 0xFE000000"
+# error "CONFIG_SYS_TEXT_BASE must be 0xFE000000"
#endif
/*
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_440 1
#define CONFIG_4xx 1 /* ... PPC4xx family */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+#endif
+
/*
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
#define CONFIG_CM5200 1 /* ... on CM5200 platform */
+#define CONFIG_SYS_TEXT_BASE 0xfc000000
+
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/*
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* 384 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (256 << 10) /* 256 kB for malloc() */
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */
#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
#define CONFIG_SYS_HID0_FINAL HID0_ICE
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SYS_XLB_PIPELINING 1 /* enable transaction pipeling */
/*
#define CONFIG_MPC555 1 /* This is an MPC555 CPU */
#define CONFIG_CMI 1 /* Using the customized cmi board */
+#define CONFIG_SYS_TEXT_BASE 0x02000000 /* Boot from flash at location 0x00000000 */
+
/* Serial Console Configuration */
#define CONFIG_5xx_CONS_SCI1
#undef CONFIG_5xx_CONS_SCI2
#define ANYBUS_BASE 0x03010000 /* Anybus Module */
#define CONFIG_SYS_RESET_ADRESS 0x01000000 /* Adress which causes reset */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* TEXT_BASE is defined in the board config.mk file. */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* CONFIG_SYS_TEXT_BASE is defined in the board config.mk file. */
/* This adress is given to the linker with -Ttext to */
/* locate the text section at this adress. */
#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
*/
#define CONFIG_SYS_DER 0x00000000
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
*
* Setting #if 0: u-boot will start from flash and relocate itself to RAM
*
- * Please do not forget to modify the setting of TEXT_BASE
+ * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
* in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
*
* ---
#define CONFIG_COGENT 1 /* using Cogent Modular Architecture */
#define CONFIG_CPM2 1 /* Has a CPM2 */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */
#define CONFIG_MISC_INIT_R /* Use misc_init_r() */
#else
#define CONFIG_SYS_FLASH_BASE CMA_MB_FLASH_BASE /* flash on m/b */
#endif
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/
* (the *_SIZE vars must be a power of 2)
*/
-#define CONFIG_SYS_CMA_CS0_BASE TEXT_BASE /* EPROM */
+#define CONFIG_SYS_CMA_CS0_BASE CONFIG_SYS_TEXT_BASE /* EPROM */
#define CONFIG_SYS_CMA_CS0_SIZE (1 << 20)
#if 0
#define CONFIG_SYS_CMA_CS2_BASE 0x10000000 /* Local Bus SDRAM */
#endif
#endif
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC860 1 /* This is an MPC860 CPU */
#define CONFIG_COGENT 1 /* using Cogent Modular Architecture */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */
#define CONFIG_MISC_INIT_R /* Use misc_init_r() */
#else
#define CONFIG_SYS_FLASH_BASE CMA_MB_FLASH_BASE /* flash on m/b */
#endif
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
* (the *_SIZE vars must be a power of 2)
*/
-#define CONFIG_SYS_CMA_CS0_BASE TEXT_BASE /* EPROM */
+#define CONFIG_SYS_CMA_CS0_BASE CONFIG_SYS_TEXT_BASE /* EPROM */
#define CONFIG_SYS_CMA_CS0_SIZE (1 << 20)
#define CONFIG_SYS_CMA_CS1_BASE CMA_MB_RAM_BASE /* RAM + I/O SLOT 1 */
#define CONFIG_SYS_CMA_CS1_SIZE (64 << 20)
#define CONFIG_SYS_OR3_PRELIM ((~(CONFIG_SYS_CMA_CS3_SIZE-1)&OR_AM_MSK)|OR_BI|OR_SETA)
#endif
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_SYS_FLASH_EMPTY_INFO
#define CONFIG_SYS_FLASH_AMD_CHECK_DQ7
*/
#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#ifdef CONFIG_CMD_KGDB
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
"bank_intlv=cs0_cs1\0" \
"netdev=eth0\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
- "ubootaddr=" MK_STR(TEXT_BASE) "\0" \
+ "ubootaddr=" MK_STR(CONFIG_SYS_TEXT_BASE) "\0" \
"tftpflash=tftpboot $loadaddr $uboot && " \
"protect off $ubootaddr +$filesize && " \
"erase $ubootaddr +$filesize && " \
#define CONFIG_CPCI5200 1 /* ... on CPCI5200 board */
#define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */
-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000 /* Standard: boot high */
+#endif
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_DATE
-#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
+#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
# define CONFIG_SYS_LOWBOOT 1
# define CONFIG_SYS_LOWBOOT16 1
#endif
-#if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */
+#if (CONFIG_SYS_TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */
# define CONFIG_SYS_LOWBOOT 1
# define CONFIG_SYS_LOWBOOT08 1
#endif
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_LAST_STAGE_INIT 1 /* Call last_stage_init() */
#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
/*
* OS Bootstrap configuration
*
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE 0xFE000000
#define CONFIG_SYS_FLASH_SIZE 0x02000000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 KB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 KB for malloc() */
#define CONFIG_SYS_I2C_PLL_ADDR 0x58 /* I2C address of AMIS FS6377-01 PLL */
#define CONFIG_I2CFAST 1 /* enable "i2cfast" env. setting */
-/*
- * Internal Definitions
- *
- * Boot Flags
- *
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_LAST_STAGE_INIT 1 /* Call last_stage_init() */
#define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
/*
* OS Bootstrap configuration
*
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE 0xFF800000
#define CONFIG_SYS_FLASH_SIZE 0x00800000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 KB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 KB for malloc() */
*/
#define CONFIG_I2CFAST 1 /* enable "i2cfast" env. setting */
-/*
- * Internal Definitions
- *
- * Boot Flags
- *
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_SYS_NAND_CS 2
#undef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_SYS_NO_FLASH
+#define CONFIG_ENV_OVERWRITE /* instead if obsoleted forceenv() */
#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
#define CONFIG_ENV_SECT_SIZE 512 /* Env sector Size */
#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
#define CONFIG_FLASH_CFI_DRIVER 1
/* The following #defines are needed to get flash environment right */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 << 10)
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
/* Environments */
/* bootargs */
#else
#undef CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_MONITOR_LEN 0x00040000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
/*#define CONFIG_SYS_GBL_DATA_SIZE 256*/
#define CONFIG_SYS_GBL_DATA_SIZE 128
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/* values according to the manual */
#define CONFIG_DRAM_50MHZ 1
#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
#define CONFIG_DIGSY_MTC 1 /* ... on InterControl digsyMTC board */
-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ * 0xFFF00000 boot high (standard configuration)
+ * 0xFE000000 boot low
+ * 0x00100000 boot from RAM (for testing only)
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000 /* Standard: boot high */
+#endif
-#define BOOTFLAG_COLD 0x01
-#define BOOTFLAG_WARM 0x02
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000
#define CONFIG_SYS_CACHELINE_SIZE 32
#define CONFIG_CMD_SPI
#define CONFIG_CMD_USB
-#if (TEXT_BASE == 0xFF000000)
+#if (CONFIG_SYS_TEXT_BASE == 0xFF000000)
#define CONFIG_SYS_LOWBOOT 1
#endif
(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_4xx 1 /* member of PPC4xx family */
#define CONFIG_DLVISION 1 /* on a Neo board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
/*
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_SYS_STACK_SIZE 0x8000 /* Size of bootloader stack */
#define CONFIG_SYS_BL_START_FLASH 0x38040000 /* Address of relocated code */
#define CONFIG_SYS_BL_START_RAM 0x03fd0000 /* Address of relocated code */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
#define CONFIG_SYS_FLASH_BASE 0x38000000 /* Boot Flash */
#define CONFIG_SYS_FLASH_BASE_1 0x10000000 /* StrataFlash 1 */
#define CONFIG_MPC8245 1
#define CONFIG_EXALION 1
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#if defined (CONFIG_MPC8240)
/* #warning ---------- eXalion with MPC8240 --------------- */
#elif defined (CONFIG_MPC8245)
#undef CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-
-/*-----------------------------------------------------------------------
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/* values according to the manual */
#define CONFIG_DRAM_50MHZ 1
#define CONFIG_SDRAM_50MHZ
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
/*
* Include common defines/options for all AMCC eval boards
*/
#ifndef __CONFIG_H
#define __CONFIG_H
-#ifdef CONFIG_MK_edb9301
+#ifdef CONFIG_edb9301
#define CONFIG_EDB9301
-#elif defined(CONFIG_MK_edb9302)
+#elif defined(CONFIG_edb9302)
#define CONFIG_EDB9302
-#elif defined(CONFIG_MK_edb9302a)
+#elif defined(CONFIG_edb9302a)
#define CONFIG_EDB9302A
-#elif defined(CONFIG_MK_edb9307)
+#elif defined(CONFIG_edb9307)
#define CONFIG_EDB9307
-#elif defined(CONFIG_MK_edb9307a)
+#elif defined(CONFIG_edb9307a)
#define CONFIG_EDB9307A
-#elif defined(CONFIG_MK_edb9312)
+#elif defined(CONFIG_edb9312)
#define CONFIG_EDB9312
-#elif defined(CONFIG_MK_edb9315)
+#elif defined(CONFIG_edb9315)
#define CONFIG_EDB9315
-#elif defined(CONFIG_MK_edb9315a)
+#elif defined(CONFIG_edb9315a)
#define CONFIG_EDB9315A
#else
#error "no board defined"
#define CONFIG_EP8248 /* Embedded Planet EP8248 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
/* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */
#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
#endif
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_SYS_HRCW_SLAVE6 0
#define CONFIG_SYS_HRCW_SLAVE7 0
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
#define CONFIG_SYS_EP8260_H2 1
/* #undef CONFIG_SYS_EP8260_H2 */
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#define CONFIG_CPM2 1 /* Has a CPM2 */
/* What is the oscillator's (UX2) frequency in Hz? */
#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100
/* What should the base address of the main FLASH be and how big is
- * it (in MBytes)? This must contain TEXT_BASE from board/ep8260/config.mk
+ * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/ep8260/config.mk
* The main FLASH is whichever is connected to *CS0. U-Boot expects
* this to be the SIMM.
*/
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
* Note also that the logic that sets CONFIG_SYS_RAMBOOT is platform dependent.
*/
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
ORxG_SCY_10_CLK)
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* JFFS2 partitions
*
#define CONFIG_EP82XXM /* Embedded Planet EP82xxM H 1.0 board */
/* 256MB SDRAM / 64MB FLASH */
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
/* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */
#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
#endif
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_SYS_HRCW_SLAVE6 0
#define CONFIG_SYS_HRCW_SLAVE7 0
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
#define CONFIG_SYS_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ * 0xFFF00000 boot high (standard configuration)
+ * 0xFE000000 boot low
+ * 0x00100000 boot from RAM (for testing only) does not work
+ */
+#ifdef CONFIG_galaxy5200_LOWBOOT
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+#endif
+
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000 /* Standard: boot high */
+#endif
/*
* Serial console configuration
#define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */
-#if (TEXT_BASE == 0xFE000000) /* Boot low */
+#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low */
#define CONFIG_SYS_LOWBOOT 1
#endif
/* RAMBOOT will be defined automatically in memory section */
CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+
/*
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
#define CONFIG_SYS_STACK_SIZE (0x10000-32)
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
/* make un relocated address from relocated address */
-#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE))
+#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
/*
* Ethernet configuration uses on board SMC91C111
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
#define CONFIG_SYS_STACK_SIZE (0x10000-32)
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
/* make un relocated address from relocated address */
-#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE))
+#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
/*
* Ethernet configuration uses on board SMC91C111, however if a mezzanine
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
#define CONFIG_SYS_STACK_SIZE (0x10000-32)
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
/* make un relocated address from relocated address */
-#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE))
+#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
/*
* Ethernet configuration
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
#define CONFIG_SYS_STACK_SIZE (0x10000-32)
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
/* make un relocated address from relocated address */
-#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE))
+#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
/*
* Ethernet configuration
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
#define CONFIG_SYS_STACK_SIZE (0x10000-32)
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
/* make un relocated address from relocated address */
-#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE))
+#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
/*
* Ethernet configuration
#define PHYS_FLASH 0xbfc00000 /* Flash Bank #1 */
/* The following #defines are needed to get flash environment right */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 << 10)
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
/* Enable debug prints */
#undef DEBUG_BOOTP_EXT /* Debug received vendor fields */
#define CONFIG_SYS_SBC_BOOT_LOW 1
/* What should the base address of the main FLASH be and how big is
- * it (in MBytes)? This must contain TEXT_BASE from board/sbc8260/config.mk
+ * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/sbc8260/config.mk
* The main FLASH is whichever is connected to *CS0. U-Boot expects
* this to be the SIMM.
*/
ORxG_SCY_11_CLK |\
ORxG_EHTR)
#endif /* CONFIG_SYS_IO_BASE */
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_4xx 1
#define CONFIG_HOSTNAME hcu4
+#define CONFIG_SYS_TEXT_BASE 0xFFFB0000
+
/*
* Include common defines/options for all boards produced by Netstal Maschinen
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
#define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
/* ... with on-chip memory here (4KBytes) */
#define CONFIG_SYS_OCM_DATA_ADDR 0xF4000000
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_HOSTNAME hcu5
+#define CONFIG_SYS_TEXT_BASE 0xFFFB0000
+
/*
* Include common defines/options for all boards produced by Netstal Maschinen
*/
#define CONFIG_SYS_BOOT_BASE_ADDR 0xfff00000
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
#define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */
#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_OCM_BASE
#define CONFIG_SYS_PCI_BASE 0xe0000000 /* Internal PCI regs */
#define CONFIG_MPC860 1 /* This is a MPC860T CPU */
#define CONFIG_HERMES 1 /* ...on a HERMES-PRO board */
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
#define CONFIG_SYS_MAMR_9COL ((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
#define CONFIG_HMI1001 1 /* HMI1001 board */
-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+#endif
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */
-#if (TEXT_BASE == 0xFFF00000) /* Boot low */
+#if (CONFIG_SYS_TEXT_BASE == 0xFFF00000) /* Boot low */
# define CONFIG_SYS_LOWBOOT 1
#endif
#define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */
#define CONFIG_SYS_MAX_FLASH_SECT 67 /* max num of sects on one chip */
-#define CONFIG_ENV_ADDR (TEXT_BASE+0x40000) /* second sector */
+#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE+0x40000) /* second sector */
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
(= chip selects) */
#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_HYMOD 1 /* ...on a Hymod board */
#define CONFIG_CPM2 1 /* Has a CPM2 */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */
#define CONFIG_BOARD_POSTCLK_INIT /* have board_postclk_init() function */
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_FLASH_BASE TEXT_BASE
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_FPGA_BASE 0x80000000
/*
* unfortunately, CONFIG_SYS_MONITOR_LEN must include the
*/
#define FPGA_MAIN_IRQ SIU_INT_IRQ2
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* JFFS2 partitions
*
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_440SPE 1 /* Specifc SPe support */
+
+#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
+
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
#define CONFIG_SYS_4xx_RESET_TYPE 0x2 /* use chip reset on this board */
#define PHYS_FLASH_2 0xb0800000 /* Flash Bank #2 */
/* The following #defines are needed to get flash environment right */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 << 10)
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
#define CONFIG_INKA4X0 1 /* INKA4x0 board */
-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ * 0xFFE00000 boot low
+ * 0x00100000 boot from RAM (for testing only)
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFE00000 /* Standard: boot low */
+#endif
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
#define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */
#define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */
-#if (TEXT_BASE == 0xFFE00000) /* Boot low */
+#if (CONFIG_SYS_TEXT_BASE == 0xFFE00000) /* Boot low */
# define CONFIG_SYS_LOWBOOT 1
#endif
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_440 1
#define CONFIG_4xx 1 /* ... PPC4xx family */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
+#endif
+
/*
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */
#define CONFIG_IPEK01 /* Motherboard is ipek01 */
+#define CONFIG_SYS_TEXT_BASE 0xfc000000
+
#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */
#define CONFIG_MISC_INIT_R
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#ifdef CONFIG_CMD_KGDB
#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_MPC5200 1 /* especially an MPC5200 */
#define CONFIG_JUPITER 1 /* ... on Jupiter board */
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ * 0xFFF00000 boot high (standard configuration)
+ * 0x00100000 boot from RAM (for testing only)
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+#endif
+
#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
#define CONFIG_BOARD_EARLY_INIT_R 1
#define CONFIG_BOARD_EARLY_INIT_F 1
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/*
#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
-#define CONFIG_ENV_ADDR (TEXT_BASE + 0x40000) /* third sector */
+#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */
#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
#define CONFIG_SYS_4xx_RESET_TYPE 0x2 /* use chip reset on this board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
+
/*
* Enable this board for more than 2GB of SDRAM
*/
#define CONFIG_405EX 1 /* Specifc 405EX support*/
#define CONFIG_SYS_CLK_FREQ 33333333 /* ext frequency to pll */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
+#endif
+
/*
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_SYS_BR3_PRELIM (0x30000401)
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SCC3_ENET
#define CONFIG_ETHPRIME "SCC"
#define CONFIG_HAS_ETH0
#define CONFIG_KMETER1 1 /* KMETER1 board specific */
#define CONFIG_HOSTNAME kmeter1
+#define CONFIG_SYS_TEXT_BASE 0xF0000000
+
/* include common defines/options for all Keymile boards */
#include "keymile-common.h"
/*
* The reserved memory
*/
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_SYS_FLASH_BASE 0xF0000000
#define CONFIG_SYS_PIGGY_BASE 0xE8000000
#define CONFIG_SYS_PIGGY_SIZE 128
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
#endif /* CONFIG_PCI */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define BOOTFLASH_START F0000000
#define CONFIG_PRAM 512 /* protected RAM [KBytes] */
#define CONFIG_KMSUPX4 1 /* ...on a kmsupx4 board */
#define CONFIG_HOSTNAME kmsupx4
+#define CONFIG_SYS_TEXT_BASE 0xf0000000
+
/* include common defines/options for all Keymile 8xx boards */
#include "km8xx.h"
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_SYS_CLK_FREQ 33333333
+#ifdef CONFIG_KORAT_PERMANENT
+#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
+#else
+#define CONFIG_SYS_TEXT_BASE 0xF7F60000
+#endif
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
#define CONFIG_SYS_FLASH1_MAX_SIZE 0x08000000
#define CONFIG_SYS_FLASH1_ADDR (CONFIG_SYS_FLASH1_TOP - CONFIG_SYS_FLASH1_MAX_SIZE)
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH1_ADDR /* start of FLASH */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */
#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_OCM_BASE
#define CONFIG_SYS_PCI_BASE 0xe0000000 /* Internal PCI regs */
} \
}
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MPC8245 1
#define CONFIG_KVME080 1
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
#define CONFIG_VERY_BIG_RAM
#define CONFIG_SYS_MONITOR_LEN 0x00040000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MALLOC_LEN (512 << 10)
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-#define BOOTFLAG_COLD 0x01
-#define BOOTFLAG_WARM 0x02
-
#endif /* __CONFIG_H */
#ifndef __CONFIG_H
#define __CONFIG_H
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ *
+ * Standard configuration - all models
+ * 0xFFF00000 boot from flash
+ *
+ * Test configuration (boot from RAM using uloader.o)
+ * LinkStation HD-HLAN and KuroBox Standard
+ * 0x03F00000 boot from RAM
+ * LinkStation HD-HGLAN and KuroBox HG
+ * 0x07F00000 boot from RAM
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+#endif
+
#if 0
#define DEBUG
#endif
#define CONFIG_SYS_FLASH_BASE 0xFFC00000
#define CONFIG_SYS_FLASH_SIZE 0x00400000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100
#define CONFIG_SYS_EUMB_ADDR 0x80000000
#endif
/*-----------------------------------------------------------------------
- * Change TEXT_BASE in bord/linkstation/config.mk to get a RAM build
+ * Change CONFIG_SYS_TEXT_BASE in bord/linkstation/config.mk to get a RAM build
*
* RAM based builds are for testing purposes. A Linux module, uloader.o,
* exists to load U-Boot and pass control to it
*/
#define CONFIG_DOS_PARTITION
-/*-----------------------------------------------------------------------
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
+++ /dev/null
-/*
- * (C) Copyright 2003
- * Robert Schwebel, Pengutronix, r.schwebel@pengutronix.de.
- *
- * Configuration for the Logotronic DL board.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * include/configs/logodl.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_PXA250 1 /* This is an PXA250 CPU */
-#define CONFIG_GEALOG 1 /* on a Logotronic GEALOG SG board */
-
-#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
- /* for timer/console/ethernet */
-
-/* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
-
-/*
- * Hardware drivers
- */
-
-/*
- * select serial console configuration
- */
-#define CONFIG_PXA_SERIAL
-#define CONFIG_FFUART 1 /* we use FFUART */
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_BAUDRATE 19200
-#undef CONFIG_MISC_INIT_R /* FIXME: misc_init_r() missing */
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_ECHO
-#define CONFIG_CMD_SAVEENV
-#define CONFIG_CMD_FLASH
-#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_RUN
-
-
-#define CONFIG_BOOTDELAY 3
-/* #define CONFIG_BOOTARGS "root=/dev/nfs ip=bootp console=ttyS0,19200" */
-#define CONFIG_BOOTARGS "console=ttyS0,19200"
-#define CONFIG_ETHADDR FF:FF:FF:FF:FF:FF
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_IPADDR 192.168.1.56
-#define CONFIG_SERVERIP 192.168.1.2
-#define CONFIG_BOOTCOMMAND "bootm 0x40000"
-#define CONFIG_SHOW_BOOT_PROGRESS
-
-#define CONFIG_CMDLINE_TAG 1
-
-/*
- * Miscellaneous configurable options
- */
-
-/*
- * Size of malloc() pool; this lives below the uppermost 128 KiB which are
- * used for the RAM copy of the uboot code
- *
- */
-#define CONFIG_SYS_MALLOC_LEN (256*1024)
-
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "uboot> " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0x08000000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x0800ffff /* 64 KiB */
-
-#define CONFIG_SYS_LOAD_ADDR 0x08000000 /* load kernel to this address */
-
-#define CONFIG_SYS_HZ 1000
- /* RS: the oscillator is actually 3680130?? */
-
-#define CONFIG_SYS_CPUSPEED 0x141 /* set core clock to 200/200/100 MHz */
- /* 0101000001 */
- /* ^^^^^ Memory Speed 99.53 MHz */
- /* ^^ Run Mode Speed = 2x Mem Speed */
- /* ^^ Turbo Mode Sp. = 1x Run M. Sp. */
-
-#define CONFIG_SYS_MONITOR_LEN 0x20000 /* 128 KiB */
-
- /* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
-/*
- * SMSC91C111 Network Card
- */
-#if 0
-#define CONFIG_NET_MULTI
-#define CONFIG_SMC91111 1
-#define CONFIG_SMC91111_BASE 0x10000000 /* chip select 4 */
-#undef CONFIG_SMC_USE_32_BIT /* 16 bit bus access */
-#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
-#undef CONFIG_SHOW_ACTIVITY
-#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */
-#endif
-
-/*
- * Stack sizes
- *
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE (128*1024) /* regular stack */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
-#endif
-
-/*
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of RAM */
-#define PHYS_SDRAM_1 0x08000000 /* SRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE (4*1024*1024) /* 4 MB */
-
-#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
-#define PHYS_FLASH_2 0x01000000 /* Flash Bank #2 */
-#define PHYS_FLASH_SIZE (32*1024*1024) /* 32 MB */
-
-#define CONFIG_SYS_DRAM_BASE PHYS_SDRAM_1 /* RAM starts here */
-#define CONFIG_SYS_DRAM_SIZE PHYS_SDRAM_1_SIZE
-
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-
-
-/*
- * GPIO settings
- *
- * GP?? == FOOBAR is 0/1
- */
-
-#define _BIT0 0x00000001
-#define _BIT1 0x00000002
-#define _BIT2 0x00000004
-#define _BIT3 0x00000008
-
-#define _BIT4 0x00000010
-#define _BIT5 0x00000020
-#define _BIT6 0x00000040
-#define _BIT7 0x00000080
-
-#define _BIT8 0x00000100
-#define _BIT9 0x00000200
-#define _BIT10 0x00000400
-#define _BIT11 0x00000800
-
-#define _BIT12 0x00001000
-#define _BIT13 0x00002000
-#define _BIT14 0x00004000
-#define _BIT15 0x00008000
-
-#define _BIT16 0x00010000
-#define _BIT17 0x00020000
-#define _BIT18 0x00040000
-#define _BIT19 0x00080000
-
-#define _BIT20 0x00100000
-#define _BIT21 0x00200000
-#define _BIT22 0x00400000
-#define _BIT23 0x00800000
-
-#define _BIT24 0x01000000
-#define _BIT25 0x02000000
-#define _BIT26 0x04000000
-#define _BIT27 0x08000000
-
-#define _BIT28 0x10000000
-#define _BIT29 0x20000000
-#define _BIT30 0x40000000
-#define _BIT31 0x80000000
-
-
-#define CONFIG_SYS_LED_A_BIT (_BIT18)
-#define CONFIG_SYS_LED_A_SR GPSR0
-#define CONFIG_SYS_LED_A_CR GPCR0
-
-#define CONFIG_SYS_LED_B_BIT (_BIT16)
-#define CONFIG_SYS_LED_B_SR GPSR1
-#define CONFIG_SYS_LED_B_CR GPCR1
-
-
-/* LED A: off, LED B: off */
-#define CONFIG_SYS_GPSR0_VAL (_BIT1+_BIT6+_BIT8+_BIT9+_BIT11+_BIT15+_BIT16+_BIT18)
-#define CONFIG_SYS_GPSR1_VAL (_BIT0+_BIT1+_BIT16+_BIT24+_BIT25 +_BIT7+_BIT8+_BIT9+_BIT11+_BIT13)
-#define CONFIG_SYS_GPSR2_VAL (_BIT14+_BIT15+_BIT16)
-
-#define CONFIG_SYS_GPCR0_VAL 0x00000000
-#define CONFIG_SYS_GPCR1_VAL 0x00000000
-#define CONFIG_SYS_GPCR2_VAL 0x00000000
-
-#define CONFIG_SYS_GPDR0_VAL (_BIT1+_BIT6+_BIT8+_BIT9+_BIT11+_BIT15+_BIT16+_BIT17+_BIT18)
-#define CONFIG_SYS_GPDR1_VAL (_BIT0+_BIT1+_BIT16+_BIT24+_BIT25 +_BIT7+_BIT8+_BIT9+_BIT11+_BIT13)
-#define CONFIG_SYS_GPDR2_VAL (_BIT14+_BIT15+_BIT16)
-
-#define CONFIG_SYS_GAFR0_L_VAL (_BIT22+_BIT24+_BIT31)
-#define CONFIG_SYS_GAFR0_U_VAL (_BIT15+_BIT17+_BIT19+\
- _BIT20+_BIT22+_BIT24+_BIT26+_BIT29+_BIT31)
-#define CONFIG_SYS_GAFR1_L_VAL (_BIT3+_BIT4+_BIT6+_BIT8+_BIT10+_BIT12+_BIT15+_BIT17+_BIT19+\
- _BIT20+_BIT23+_BIT24+_BIT27+_BIT28+_BIT31)
-#define CONFIG_SYS_GAFR1_U_VAL (_BIT21+_BIT23+_BIT25+_BIT27+_BIT29+_BIT31)
-#define CONFIG_SYS_GAFR2_L_VAL (_BIT1+_BIT3+_BIT5+_BIT7+_BIT9+_BIT11+_BIT13+_BIT15+_BIT17+\
- _BIT19+_BIT21+_BIT23+_BIT25+_BIT27+_BIT29+_BIT31)
-#define CONFIG_SYS_GAFR2_U_VAL (_BIT1)
-
-#define CONFIG_SYS_PSSR_VAL (0x20)
-
-/*
- * Memory settings
- */
-#define CONFIG_SYS_MSC0_VAL 0x123c2980
-#define CONFIG_SYS_MSC1_VAL 0x123c2661
-#define CONFIG_SYS_MSC2_VAL 0x7ff87ff8
-
-
-/* no sdram/pcmcia here */
-#define CONFIG_SYS_MDCNFG_VAL 0x00000000
-#define CONFIG_SYS_MDREFR_VAL 0x00000000
-#define CONFIG_SYS_MDREFR_VAL_100 0x00000000
-#define CONFIG_SYS_MDMRS_VAL 0x00000000
-
-/* only SRAM */
-#define SXCNFG_SETTINGS 0x00000000
-
-/*
- * PCMCIA and CF Interfaces
- */
-
-#define CONFIG_SYS_MECR_VAL 0x00000000
-#define CONFIG_SYS_MCMEM0_VAL 0x00010504
-#define CONFIG_SYS_MCMEM1_VAL 0x00010504
-#define CONFIG_SYS_MCATT0_VAL 0x00010504
-#define CONFIG_SYS_MCATT1_VAL 0x00010504
-#define CONFIG_SYS_MCIO0_VAL 0x00004715
-#define CONFIG_SYS_MCIO1_VAL 0x00004715
-
-
-/*
- * FLASH and environment organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
-
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
-
-/* FIXME */
-#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */
-#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
-
-#endif /* __CONFIG_H */
#define CONFIG_440 1
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
+#define CONFIG_SYS_TEXT_BASE 0xFFFB0000
+
/*
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_MPC823 1 /* This is a MPC823E CPU */
#define CONFIG_LWMON 1 /* ...on a LWMON board */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
/* Default Ethernet MAC address */
#define CONFIG_ETHADDR 00:11:B0:00:00:00
*/
#define CONFIG_SYS_MAR 0x00000088
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_440EPX 1 /* Specific PPC440EPx */
#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_4xx 1 /* ... PPC4xx family */
+
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+#endif
+
#define CONFIG_SYS_CLK_FREQ 33300000 /* external freq to pll */
#define CONFIG_BOARD_EARLY_INIT_F /* Call board_early_init_f */
* Base addresses -- Note these are effective addresses where the
* actual resources get mapped (not physical addresses)
*/
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of U-Boot */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */
#define CONFIG_SYS_MONITOR_LEN (0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1)
#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* Reserved for malloc */
} \
}
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_405EX 1 /* Specifc 405EX support*/
#define CONFIG_SYS_CLK_FREQ 33330000 /* ext frequency to pll */
+#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
+
/*
* Include common defines/options for all AMCC eval boards
*/
* (easy to change)
*/
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_BOARD_EARLY_INIT_R
/* Partitions */
"u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin \0" \
"u-boot_addr_r=200000\0" \
"load=tftp ${u-boot_addr_r} ${u-boot}\0" \
- "update=protect off " xstr(TEXT_BASE) " +${filesize};" \
- "erase " xstr(TEXT_BASE) " +${filesize};" \
- "cp.b ${u-boot_addr_r} " xstr(TEXT_BASE) \
+ "update=protect off " xstr(CONFIG_SYS_TEXT_BASE) " +${filesize};" \
+ "erase " xstr(CONFIG_SYS_TEXT_BASE) " +${filesize};" \
+ "cp.b ${u-boot_addr_r} " xstr(CONFIG_SYS_TEXT_BASE) \
" ${filesize};" \
- "protect on " xstr(TEXT_BASE) " +${filesize}\0" \
+ "protect on " xstr(CONFIG_SYS_TEXT_BASE) " +${filesize}\0" \
""
#define CONFIG_BOOTCOMMAND "run net_nfs"
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200,\
230400 }
-#if (TEXT_BASE == 0xFFF00000) /* Boot low */
+#if (CONFIG_SYS_TEXT_BASE == 0xFFF00000) /* Boot low */
# define CONFIG_SYS_LOWBOOT 1
#endif
#define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */
-#define CONFIG_ENV_ADDR (TEXT_BASE+0x40000) /* second sector */
+#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE+0x40000) /* second sector */
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
(= chip selects) */
#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout [ms]*/
#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
#endif
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
#define CONFIG_MCC200 1 /* ... on MCC200 board */
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ * 0xFC000000 boot low (standard configuration)
+ * 0xFFF00000 boot high
+ * 0x00100000 boot from RAM (for testing only)
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFC000000
+#endif
+
#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */
#define CONFIG_MISC_INIT_R
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/*
"rootpath=/opt/eldk/ppc_6xx\0" \
"bootfile=/tftpboot/" CONFIG_SYS__BOARDNAME "/uImage\0" \
"load=tftp 200000 /tftpboot/" CONFIG_SYS__BOARDNAME "/u-boot.bin\0" \
- "text_base=" MK_STR(TEXT_BASE) "\0" \
+ "text_base=" MK_STR(CONFIG_SYS_TEXT_BASE) "\0" \
"kernel_addr=0xFC0C0000\0" \
"update=protect off ${text_base} +${filesize};" \
"era ${text_base} +${filesize};" \
#define CONFIG_ENV_OVERWRITE 1 /* allow modification of vendor params */
-#if TEXT_BASE == CONFIG_SYS_FLASH_BASE
+#if CONFIG_SYS_TEXT_BASE == CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LOWBOOT 1
#endif
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_4xx 1
#define CONFIG_HOSTNAME mcu25
+#define CONFIG_SYS_TEXT_BASE 0xFFFB0000
+
/*
* Include common defines/options for all boards produced by Netstal Maschinen
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
#define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
/* ... with on-chip memory here (4KBytes) */
#define CONFIG_SYS_OCM_DATA_ADDR 0xF4000000
#define CONFIG_E300 1 /* E300 Family */
#define CONFIG_MPC512X 1 /* MPC512X family */
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#define CONFIG_SYS_MPC512X_CLKIN 33333333 /* in Hz */
#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of monitor */
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Monitor length */
#define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Malloc size */
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#ifdef CONFIG_CMD_KGDB
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MECP5200 1 /* ... on MECP5200 board */
#define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */
-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+#endif
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
#define CONFIG_CMD_ELF
-#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
+#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
# define CONFIG_SYS_LOWBOOT 1
# define CONFIG_SYS_LOWBOOT16 1
#endif
-#if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */
+#if (CONFIG_SYS_TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */
# define CONFIG_SYS_LOWBOOT 1
# define CONFIG_SYS_LOWBOOT08 1
#endif
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_MGCOGE 1
#define CONFIG_HOSTNAME mgcoge
+#define CONFIG_SYS_TEXT_BASE 0xFE000000
+
#define CONFIG_CPM2 1 /* Has a CPM2 */
/* include common defines/options for all Keymile boards */
CONFIG_SYS_FLASH_BASE_1, \
CONFIG_SYS_FLASH_BASE_2 }
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_SYS_HRCW_SLAVE6 0
#define CONFIG_SYS_HRCW_SLAVE7 0
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC8260 CPUs */
#define CONFIG_MGSUVD 1 /* ...on a mgsuvd board */
#define CONFIG_HOSTNAME mgsuvd
+#define CONFIG_SYS_TEXT_BASE 0xf0000000
+
/* include common defines/options for all Keymile 8xx boards */
#include "km8xx.h"
#endif
/* setting reset address */
-/*#define CONFIG_SYS_RESET_ADDRESS TEXT_BASE*/
+/*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/
/* ethernet */
#ifdef XILINX_EMACLITE_BASEADDR
/*
* memory layout - Example
- * TEXT_BASE = 0x1200_0000;
+ * CONFIG_SYS_TEXT_BASE = 0x1200_0000;
* CONFIG_SYS_SRAM_BASE = 0x1000_0000;
* CONFIG_SYS_SRAM_SIZE = 0x0400_0000;
*
*
* 0x1000_0000 CONFIG_SYS_SDRAM_BASE
* FREE
- * 0x1200_0000 TEXT_BASE
+ * 0x1200_0000 CONFIG_SYS_TEXT_BASE
* U-BOOT code
* 0x1202_0000
* FREE
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
/*
* BOOTP options
*/
* (e.g., by the BDI). Otherwise we must specify the default boot-up value of
* MBAR, as given in the doccumentation.
*/
-#if TEXT_BASE == 0x00100000
+#if CONFIG_SYS_TEXT_BASE == 0x00100000
#define CONFIG_SYS_DEFAULT_MBAR 0xf0000000
-#else /* TEXT_BASE != 0x00100000 */
+#else /* CONFIG_SYS_TEXT_BASE != 0x00100000 */
#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
#define CONFIG_SYS_LOWBOOT 1
-#endif /* TEXT_BASE == 0x00100000 */
+#endif /* CONFIG_SYS_TEXT_BASE == 0x00100000 */
/* Use SRAM until RAM will be available */
#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
#define CONFIG_SYS_HID0_FINAL HID0_ICE
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#define CONFIG_MPC512X 1 /* MPC512X family */
#define CONFIG_FSL_DIU_FB 1 /* FSL DIU */
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
/* video */
#undef CONFIG_VIDEO
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of monitor */
#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */
#ifdef CONFIG_FSL_DIU_FB
#define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Reserved for malloc */
#define CONFIG_RTC_M41T62 /* use M41T62 rtc via i2 */
#define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */
+/*
+ * USB Support
+ */
+#define CONFIG_CMD_USB
+
+#if defined(CONFIG_CMD_USB)
+#define CONFIG_USB_EHCI /* Enable EHCI Support */
+#define CONFIG_USB_EHCI_FSL /* On a FSL platform */
+#define CONFIG_EHCI_MMIO_BIG_ENDIAN /* With big-endian regs */
+#define CONFIG_EHCI_DESC_BIG_ENDIAN
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#endif
+
/*
* Environment
*/
"mpc5121.nand:-(data)"
-#if defined(CONFIG_CMD_IDE) || defined(CONFIG_CMD_EXT2)
+#if defined(CONFIG_CMD_IDE) || defined(CONFIG_CMD_EXT2) || defined(CONFIG_CMD_USB)
+
#define CONFIG_DOS_PARTITION
#define CONFIG_MAC_PARTITION
#define CONFIG_ISO_PARTITION
+
+#define CONFIG_CMD_FAT
+#define CONFIG_SUPPORT_VFAT
+
#endif /* defined(CONFIG_CMD_IDE) */
/*
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#ifdef CONFIG_CMD_KGDB
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_HIGH_BATS /* High BATs supported */
#define CONFIG_ALTIVEC /* undef to disable */
+#define CONFIG_SYS_TEXT_BASE 0xFF000000
+
#define CONFIG_SYS_BOARD_NAME "MPC7448 HPC II"
#define CONFIG_IDENT_STRING " Freescale MPC7448 HPC II"
#define CONFIG_SYS_RESET_ADDRESS 0x3fffff00
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* u-boot code base */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* u-boot code base */
#define CONFIG_SYS_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */
/* Peripheral Device section */
#define L2_INIT 0
#define L2_ENABLE (L2_INIT | L2CR_L2E)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_SYS_SERIAL_HANG_IN_EXCEPTION
#endif /* __CONFIG_H */
#define CONFIG_MPC8308 1 /* MPC8308 CPU specific */
#define CONFIG_MPC8308_P1M 1 /* mpc8308_p1m board specific */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFC000000
+#endif
+
/*
* On-board devices
*
/*
* The reserved memory
*/
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */
#define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */
#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Environment Configuration
*/
#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 }
#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END (TEXT_BASE - 0x100000)
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
/* NOR Flash */
/* #define CONFIG_SYS_FLASH_BASE (0xA1000000)*/
#define CONFIG_MPC8260 1
#define CONFIG_MUAS3001 1
+#define CONFIG_SYS_TEXT_BASE 0xFF000000
+
#define CONFIG_CPM2 1 /* Has a CPM2 */
/* Do boardspecific init */
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_SYS_HRCW_SLAVE6 0
#define CONFIG_SYS_HRCW_SLAVE7 0
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
#define CONFIG_MUCMC52 1 /* MUCMC52 board */
#define CONFIG_HOSTNAME mucmc52
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+#endif
+
#include "manroland/common.h"
#include "manroland/mpc5200-common.h"
#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
#define CONFIG_MPC5200_DDR 1 /* (with DDR-SDRAM) */
#define CONFIG_MUNICES 1 /* ... on MUNICes board */
+
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+#endif
+
#define CONFIG_SYS_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
*/
#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_OFFSET 0x40000
-#define CONFIG_ENV_ADDR (TEXT_BASE + CONFIG_ENV_OFFSET)
+#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SIZE 0x4000
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_ADDR_REDUND (TEXT_BASE + CONFIG_ENV_OFFSET_REDUND)
+#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_TEXT_BASE + CONFIG_ENV_OFFSET_REDUND)
#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
#define CONFIG_ENV_OVERWRITE 1
#define CONFIG_4xx 1 /* member of PPC4xx family */
#define CONFIG_NEO 1 /* on a Neo board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
/*
* Include common defines/options for all AMCC eval boards
*/
#define __NETSTAL_COMMON_H
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of U-Boot */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */
#define CONFIG_SYS_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
#define CONFIG_MPC5200
#define CONFIG_O2DNT 1 /* ... on O2DNT board */
-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
+#define CONFIG_SYS_TEXT_BASE 0xFF000000 /* boot low for 16 MiB boards */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
#define CONFIG_CMD_PCI
-#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
+#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
# define CONFIG_SYS_LOWBOOT 1
#else
-# error "TEXT_BASE must be 0xFF000000"
+# error "CONFIG_SYS_TEXT_BASE must be 0xFF000000"
#endif
/*
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
/*
* Include common defines/options for all AMCC eval boards
*/
#undef CONFIG_USE_IRQ /* no support for IRQs */
#define CONFIG_MISC_INIT_R
+#define CONFIG_OF_LIBFDT 1
+/*
+ * The early kernel mapping on ARM currently only maps from the base of DRAM
+ * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000.
+ * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
+ * so that leaves DRAM base to DRAM base + 0x4000 available.
+ */
+#define CONFIG_SYS_BOOTMAPSZ 0x4000
+
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
*----------------------------------------------------------------------*/
#define CONFIG_P3Mx /* used for both board versions */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#if defined (CONFIG_P3M750)
#define CONFIG_750FX /* 750GL/GX/FX */
#define CONFIG_HIGH_BATS /* High BATs supported */
#define L2_ENABLE (L2_INIT | L2CR_L2E)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
+
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
/*-----------------------------------------------------------------------
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */
/* The following #defines are needed to get flash environment right */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 << 10)
#define CONFIG_SYS_INIT_SP_OFFSET 0x4000000
#define CONFIG_MPC5200_DDR 1 /* (with DDR-SDRAM) */
#define CONFIG_PHYCORE_MPC5200B_TINY 1 /* phyCORE-MPC5200B -> */
/* FEC configuration and IDE */
+
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ * 0xFFF00000 boot high (standard configuration)
+ * 0xFF000000 boot low
+ * 0x00100000 boot from RAM (for testing only)
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+#endif
+
#define CONFIG_SYS_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*-----------------------------------------------------------------------------
Serial console configuration
#define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */
-#if (TEXT_BASE == 0xFF000000) /* Boot low */
+#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low */
#define CONFIG_SYS_LOWBOOT 1
#endif
/* RAMBOOT will be defined automatically in memory section */
CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_440EP 1 /* Specific PPC440EP support */
#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_4xx 1 /* ... PPC4xx family */
+
+#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
+
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
} \
}
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MPC512X 1 /* MPC512X family */
#define CONFIG_FSL_DIU_FB 1 /* FSL DIU */
+#define CONFIG_SYS_TEXT_BASE 0xF0000000
+
/* Used for silent command in environment */
#define CONFIG_SYS_DEVICE_NULLDEV
#define CONFIG_SILENT_CONSOLE
#define CONFIG_FDT_FIXUP_PARTITIONS
#endif
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of monitor */
#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* 512 kB for monitor */
#ifdef CONFIG_FSL_DIU_FB
#define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* for malloc */
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#ifdef CONFIG_CMD_KGDB
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_PF5200 1 /* ... on PF5200 board */
#define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */
-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+#endif
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/*
#define CONFIG_CMD_PCI
-#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
+#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
# define CONFIG_SYS_LOWBOOT 1
# define CONFIG_SYS_LOWBOOT16 1
#endif
-#if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */
+#if (CONFIG_SYS_TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */
# define CONFIG_SYS_LOWBOOT 1
# define CONFIG_SYS_LOWBOOT08 1
#endif
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#undef CONFIG_ALTIVEC
#define CONFIG_BUS_CLK 66000000
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
/*
* Monitor configuration
* CONFIG_SYS_MALLOC_LEN - Size of malloc pool (128KB)
*/
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MALLOC_LEN 0x20000
#define CONFIG_SYS_BOARD_ASM_INIT
-
-/*
- * Boot flags
- *
- * BOOTFLAG_COLD - Indicates a power-on boot
- * BOOTFLAG_WARM - Indicates a software reset
- */
-
-#define BOOTFLAG_COLD 0x01
-#define BOOTFLAG_WARM 0x02
-
-
#endif /* __CONFIG_H */
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_TEXT_BASE 0xfe000000
+
/*****************************************************************************
*
* These settings must match the way _your_ board is set up
#define CONFIG_SYS_PPMC_BOOT_LOW 1
/* What should the base address of the main FLASH be and how big is
- * it (in MBytes)? This must contain TEXT_BASE from board/ppmc8260/config.mk
+ * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/ppmc8260/config.mk
* The main FLASH is whichever is connected to *CS0. U-Boot expects
* this to be the SIMM.
*/
ORxG_TRLX |\
ORxG_EHTR)
#endif /* CONFIG_SYS_LED_BASE */
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define PHYS_FLASH_1 0xb0000000 /* Flash Bank #1 */
/* The following #defines are needed to get flash environment right */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 << 10)
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
*/
/* The following #defines are needed to get flash environment right */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 << 10)
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_405EP 1 /* Specifc 405EP support*/
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_SYS_FLASH_BASE 0xFFC00000
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
-#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE)
+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE)
/*
* For booting Linux, the board info and command line data
#ifdef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
/* the environment is located before u-boot */
-#define CONFIG_ENV_ADDR (TEXT_BASE - CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE - CONFIG_ENV_SECT_SIZE)
/* Address and size of Redundant Environment Sector */
#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR - CONFIG_ENV_SECT_SIZE)
#define CONFIG_RPXLITE 1 /* QUANTUM is the RPXlite clone */
#define CONFIG_RMU 1 /* The QUNATUM is based on our RMU */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_16X | MAMR_WLFA_16X | MAMR_TLFA_16X)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* BCSRx
*
#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 }
#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END (TEXT_BASE - 0x100000)
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
/* Address of u-boot image in Flash */
#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 }
#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END (TEXT_BASE - 0x100000)
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
/* Flash board support */
#define CONFIG_SYS_FLASH_BASE (0xA0000000)
#define CONFIG_460SX 1 /* ... PPC460 family */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
+#define CONFIG_SYS_TEXT_BASE 0xfffb0000
+
/*-----------------------------------------------------------------------
* Include common defines/options for all AMCC boards
*----------------------------------------------------------------------*/
#define CONFIG_RPXLITE 1 /* RMU is the RPXlite clone */
#define CONFIG_RMU 1
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
#else
#define CONFIG_SYS_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */
#endif
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
/*
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_ADDR ((TEXT_BASE) + 0x40000)
+#define CONFIG_ENV_ADDR ((CONFIG_SYS_TEXT_BASE) + 0x40000)
#define CONFIG_ENV_SECT_SIZE 0x40000 /* Total Size of Environment Sector */
#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE /* Used size for environment */
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_16X | MAMR_WLFA_16X | MAMR_TLFA_16X)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* BCSRx
*
#define CONFIG_RSD_PROTO 1 /* on a R&S Protocol Board */
#define CONFIG_CPM2 1 /* Has a CPM2 */
+#define CONFIG_SYS_TEXT_BASE 0xff000000
+
#define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */
/*
#define CONFIG_SYS_OR5_PRELIM (P2SZ_TO_AM(PHYS_DPRAM_SHARC_SIZE) | \
ORxG_ACS_DIV4)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#undef DEBUG_BOOTP_EXT /* Debug received vendor fields */
#undef CONFIG_LOGBUFFER /* External logbuffer support */
#define CONFIG_SYS_SBC_BOOT_LOW 1
/* What should the base address of the main FLASH be and how big is
- * it (in MBytes)? This must contain TEXT_BASE from board/sacsng/config.mk
+ * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/sacsng/config.mk
* The main FLASH is whichever is connected to *CS0.
*/
#define CONFIG_SYS_FLASH0_BASE 0x40000000
ORxG_EHTR)
#endif /* (defined(CONFIG_SYS_FLASH1_BASE) && defined(CONFIG_SYS_FLASH1_SIZE)) */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_SBC405 1 /* ...on a WR SBC405 board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
#define SPD_EEPROM_ADDRESS 0x50
#define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC8240 1
#define CONFIG_WRSBC8240 1
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 9600
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_SYS_EUMB_ADDR 0xFCE00000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*-----------------------------------------------------------------------
* PCI stuff
*-----------------------------------------------------------------------
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
/* Enable debug prints */
#undef DEBUG_BOOTP_EXT /* Debug received vendor fields */
#define CONFIG_SYS_SBC_BOOT_LOW 1
/* What should the base address of the main FLASH be and how big is
- * it (in MBytes)? This must contain TEXT_BASE from board/sbc8260/config.mk
+ * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/sbc8260/config.mk
* The main FLASH is whichever is connected to *CS0. U-Boot expects
* this to be the SIMM.
*/
ORxG_TRLX |\
ORxG_EHTR)
#endif /* CONFIG_SYS_LED_BASE */
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#ifndef __CONFIG_H
#define __CONFIG_H
-/*
- * Top level Makefile configuration choices
- */
-#ifdef CONFIG_MK_PCI
-#define CONFIG_PCI
-#endif
-
-#ifdef CONFIG_MK_66
-#define PCI_66M
-#endif
-
-#ifdef CONFIG_MK_33
-#define PCI_33M
-#endif
-
/*
* High Level Configuration Options
*/
#define CONFIG_MPC8349 1 /* MPC8349 specific */
#define CONFIG_SBC8349 1 /* WRS SBC8349 board specific */
+#define CONFIG_SYS_TEXT_BASE 0xFF800000
+
/* Don't enable PCI2 on sbc834x - it doesn't exist physically. */
#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
* physically empty. The board will automatically (i.e w/o jumpers)
* clock down to 33MHz if you insert a 33MHz PCI card.
*/
-#ifdef PCI_33M
+#ifdef CONFIG_PCI_33M
#define CONFIG_83XX_CLKIN 33000000 /* in Hz */
#else /* 66M */
#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
#endif
#ifndef CONFIG_SYS_CLK_FREQ
-#ifdef PCI_33M
+#ifdef CONFIG_PCI_33M
#define CONFIG_SYS_CLK_FREQ 33000000
#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_8X1
#else /* 66M */
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
/*
* Top level Makefile configuration choices
*/
-#ifdef CONFIG_MK_PCI
-#define CONFIG_PCI
+#ifdef CONFIG_PCI
#define CONFIG_PCI1
#endif
-#ifdef CONFIG_MK_66
+#ifdef CONFIG_66
#define CONFIG_SYS_CLK_DIV 1
#endif
-#ifdef CONFIG_MK_33
+#ifdef CONFIG_33
#define CONFIG_SYS_CLK_DIV 2
#endif
-#ifdef CONFIG_MK_PCIE
+#ifdef CONFIG_PCIE
#define CONFIG_PCIE1
#endif
#define CONFIG_MPC8548 1 /* MPC8548 specific */
#define CONFIG_SBC8548 1 /* SBC8548 board specific */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xfffa0000
+#endif
+
#undef CONFIG_RIO
#ifdef CONFIG_PCI
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
/*
* For soldered on flash, (128kB/sector) we use 2 sectors for u-boot and
- * one for env+bootpg (TEXT_BASE=0xfffa_0000, 384kB total). For SODIMM
+ * one for env+bootpg (CONFIG_SYS_TEXT_BASE=0xfffa_0000, 384kB total). For SODIMM
* flash (512kB/sector) we use 1 sector for u-boot, and one for env+bootpg
- * (TEXT_BASE=0xfff0_0000, 1MB total). This dynamically sets the right
+ * (CONFIG_SYS_TEXT_BASE=0xfff0_0000, 1MB total). This dynamically sets the right
* thing for MONITOR_LEN in both cases.
*/
-#define CONFIG_SYS_MONITOR_LEN (~TEXT_BASE + 1)
+#define CONFIG_SYS_MONITOR_LEN (~CONFIG_SYS_TEXT_BASE + 1)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
/* Serial Port */
*/
#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_SIZE 0x2000
-#if TEXT_BASE == 0xfff00000 /* Boot from 64MB SODIMM */
+#if CONFIG_SYS_TEXT_BASE == 0xfff00000 /* Boot from 64MB SODIMM */
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x80000)
#define CONFIG_ENV_SECT_SIZE 0x80000 /* 512K(one sector) for env */
-#elif TEXT_BASE == 0xfffa0000 /* Boot from 8MB soldered flash */
+#elif CONFIG_SYS_TEXT_BASE == 0xfffa0000 /* Boot from 8MB soldered flash */
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x40000)
#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */
#else
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
"netdev=eth0\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
- "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
- "erase " MK_STR(TEXT_BASE) " +$filesize; " \
- "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
- "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
- "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
"consoledev=ttyS0\0" \
"ramdiskaddr=2000000\0" \
"ramdiskfile=uRamdisk\0" \
/*
* Top level Makefile configuration choices
*/
-#ifdef CONFIG_MK_66
+#ifdef CONFIG_66
#define CONFIG_PCI_66
#endif
#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */
#define CONFIG_MPC85xx_REV1 1 /* MPC85xx Rev 1.0 chip */
+#define CONFIG_SYS_TEXT_BASE 0xfffc0000
+
#define CONFIG_CPM2 1 /* has CPM2 */
#define CONFIG_SBC8560 1 /* configuration for SBC8560 board */
#define CONFIG_SYS_FLASH_ERASE_TOUT 200000 /* Timeout for Flash Erase (in ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 50000 /* Timeout for Flash Write (in ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if 0
/* XXX This doesn't work and I don't want to fix it */
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MP 1 /* support multiple processors */
#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#ifdef RUN_DIAG
#define CONFIG_SYS_DIAG_ADDR 0xff800000
#endif
#undef CONFIG_SYS_FLASH_CHECKSUM
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */
#define CONFIG_FLASH_CFI_DRIVER
/* Map the last 1M of flash where we're running from reset */
#define CONFIG_SYS_DBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \
| BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT6U_EARLY (TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP)
+#define CONFIG_SYS_DBAT6U_EARLY (CONFIG_SYS_TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP)
#define CONFIG_SYS_IBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \
| BATL_MEMCOHERENCE)
#define CONFIG_SYS_IBAT6U_EARLY CONFIG_SYS_DBAT6U_EARLY
#define CONFIG_SYS_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_4xx 1
#define CONFIG_405GP 1
+#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r() */
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE 0xFFE00000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of U-Boot */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */
#define CONFIG_SYS_MONITOR_LEN (0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 KiB for malloc() */
/* Initial value of the stack pointern in internal SRAM */
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/* ################################################################################### */
/* These defines will be used in arch/powerpc/cpu/ppc4xx/cpu_init.c to setup external chip selects */
/* They are currently undefined cause they are initiaized in board/solidcard3/init.S */
#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_4xx 1 /* ... PPC4xx family */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+#endif
+
/*
* Include common defines/options for all AMCC eval boards
*/
/*
* Define this if you want support for video console with radeon 9200 pci card
- * Also set TEXT_BASE to 0xFFF80000 in board/amcc/sequoia/config.mk in this case
+ * Also set CONFIG_SYS_TEXT_BASE to 0xFFF80000 in board/amcc/sequoia/config.mk in this case
*/
#undef CONFIG_VIDEO
/* input clock of PLL: SMDK6400 has 12MHz input clock */
#define CONFIG_SYS_CLK_FREQ 12000000
-#if !defined(CONFIG_NAND_SPL) && (TEXT_BASE >= 0xc0000000)
+#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000)
#define CONFIG_ENABLE_MMU
#endif
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */
#define CONFIG_IDENT_STRING " for SMDKC100"
-#if !defined(CONFIG_NAND_SPL) && (TEXT_BASE >= 0xc0000000)
+#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000)
#define CONFIG_ENABLE_MMU
#endif
#define CONFIG_MPC8544 1
#define CONFIG_SOCRATES 1
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
+
#define CONFIG_PCI
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */
#define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port*/
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MPC8220 1
#define CONFIG_SORCERY 1 /* Sorcery board */
+#define CONFIG_SYS_TEXT_BASE 0xfff00000
+
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/* Input clock running at 60Mhz, read Hid1 for the CPU multiplier to
#define CONFIG_SYS_MPC8220_CLKIN 60000000 /* ... running at 60MHz */
#define CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER 8 /* VCO multiplier can't be read from any register */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*
* Serial console configuration
*/
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_SPC1920 1 /* SPC1920 board */
#define CONFIG_MPC885 1 /* MPC885 CPU */
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#define CONFIG_8xx_CONS_SMC1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 KB for monitor */
#ifdef CONFIG_BZIP2
#define CONFIG_SYS_BR5_PRELIM ((CONFIG_SYS_SPC1920_PLD_BASE & BR_BA_MSK) | BR_PS_8 | BR_V)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
* High Level Configuration Options
* (easy to change)
*/
-#if defined(CONFIG_MK_spear300)
+#if defined(CONFIG_spear300)
#define CONFIG_SPEAR3XX 1
#define CONFIG_SPEAR300 1
-#elif defined(CONFIG_MK_spear310)
+#elif defined(CONFIG_spear310)
#define CONFIG_SPEAR3XX 1
#define CONFIG_SPEAR310 1
-#elif defined(CONFIG_MK_spear320)
+#elif defined(CONFIG_spear320)
#define CONFIG_SPEAR3XX 1
#define CONFIG_SPEAR320 1
#endif
#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/*
#define CONFIG_TIMESTAMP /* display image timestamps */
-#if (TEXT_BASE == 0xFC000000) /* Boot low */
+#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) /* Boot low */
# define CONFIG_SYS_LOWBOOT 1
#endif
/*
* Flash configuration
*/
-#define CONFIG_SYS_FLASH_BASE TEXT_BASE /* 0xFC000000 */
+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE /* 0xFC000000 */
/* use CFI flash driver if no module variant is spezified */
#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_STXGP3 1 /* Silicon Tx GPPP board specific*/
#define CONFIG_MPC8560 1
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
+
#undef CONFIG_PCI /* pci ethernet support */
#define CONFIG_TSEC_ENET /* tsec ethernet support*/
#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
#define CONFIG_SYS_OR1_PRELIM 0xffff0ff7 /* 64K is enough */
#define CONFIG_SYS_LBC_LCLDEVS_BASE 0xfc000000 /* Base of localbus devices */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_STXSSA 1 /* Silicon Tx GPPP SSA board specific*/
#define CONFIG_MPC8560 1
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_PCI /* PCI ethernet support */
#define CONFIG_TSEC_ENET /* tsec ethernet support*/
#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
#define CONFIG_SYS_BR1_PRELIM 0xFB001801 /* 32-bit port */
#define CONFIG_SYS_OR1_PRELIM 0xFFFF0FF7 /* 64K is enough */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_MPC875 1 /* This is a MPC875 CPU */
#define CONFIG_STXXTC 1 /* ...on a STx XTc board */
+#define CONFIG_SYS_TEXT_BASE 0x40F00000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_LAST_STAGE_INIT /* needed to reset the damn phys */
/****************************************************************/
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
/* Custom configuration */
/* SC823,SC850,SC860SAR, FEL8xx-AT(823/850/860) */
/* SC85T,SC860T, FEL8xx-AT(855T/860T) */
#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
#define CONFIG_SYS_DOC_BASE 0x80000000
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_440 1
#define CONFIG_4xx 1 /* ... PPC4xx family */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
+#endif
+
#define CONFIG_HOSTNAME t3corp
/*
#define CONFIG_4xx 1 /* member of PPC4xx family */
#define CONFIG_TAIHU 1 /* on a taihu board */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
/*
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
/*
* Include common defines/options for all AMCC eval boards
*/
#define PHYS_FLASH_1 0xbfc00000 /* Flash Bank #1 */
/* The following #defines are needed to get flash environment right */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 << 10)
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
#define CONFIG_TNETV107X
#define CONFIG_TNETV107X_EVM
#define CONFIG_ARCH_CPU_INIT
-#define CONFIG_SYS_UBOOT_BASE TEXT_BASE
+#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_DISABLE_TCM
#define CONFIG_PERIPORT_REMAP
#define CONFIG_PERIPORT_BASE 0x2000000
#define CONFIG_UC100 1 /* ...on a UC100 module */
+#define CONFIG_SYS_TEXT_BASE 0x40700000
+
#define MPC8XX_FACT 4 /* Multiply by 4 */
#define MPC8XX_XIN 25000000 /* 25.0 MHz in */
#define CONFIG_8xx_GCLK_FREQ (MPC8XX_FACT * MPC8XX_XIN)
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* takes up to 10 msec */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_FEC_ENET 1 /* use FEC ethernet */
#define FEC_ENET
#define CONFIG_MII
#define CONFIG_UC101 1 /* UC101 board */
#define CONFIG_HOSTNAME uc101
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+#endif
+
#include "manroland/common.h"
#include "manroland/mpc5200-common.h"
#define CONFIG_MPC824X 1
#define CONFIG_MPC8245 1
#define CONFIG_UTX8245 1
+
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#define DEBUG 1
#define CONFIG_IDENT_STRING " [UTX5] "
#define CONFIG_SYS_EUMB_ADDR 0xFC000000
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
#endif /* __CONFIG_H */
#define CONFIG_MPC823 1 /* This is a MPC823 CPU */
#define CONFIG_V37 1 /* ...on a Marel V37 board */
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_LCD
#define CONFIG_SHARP_LQ084V1DG21
#undef CONFIG_LCD_LOGO
MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A12 | \
MAMR_GPL_A4DIS | MAMR_RLFA_4X | MAMR_WLFA_3X | MAMR_TLFA_16X)
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
#define CONFIG_V38B 1 /* ...on V38B board */
+
+#define CONFIG_SYS_TEXT_BASE 0xFF000000
+
#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ...running at 33.000000MHz */
#define CONFIG_RTC_PCF8563 1 /* has PCF8563 RTC */
#define CONFIG_SYS_XLB_PIPELINING 1 /* gives better performance */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/*
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10)
#define CONFIG_STACKSIZE (256 << 10)
#define CONFIG_SYS_MALLOC_LEN (1 << 20)
#define CONFIG_MPC8313 1
#define CONFIG_VE8313 1
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xfe000000
+#endif
+
#define CONFIG_PCI 1
#define CONFIG_FSL_ELBC 1
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_NETDEV eth0
#define CONFIG_HOSTNAME ve8313
#define CONFIG_VIRTLAB2 1 /* ...on a virtlab2 module */
#define CONFIG_TQM8xxL 1
+#define CONFIG_SYS_TEXT_BASE 0x40000000
+
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#define CONFIG_SYS_SMC_RXBUFLEN 128
#define CONFIG_SYS_MAXIDLE 10
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/* Map peripheral control registers on CS4 */
#define CONFIG_SYS_PERIPHERAL_BASE 0xA0000000
#define CONFIG_SYS_PERIPHERAL_OR_AM 0xFFFF8000 /* 32 kB address mask */
* esd vme8349 U-Boot configuration file
* Copyright (c) 2008, 2009 esd gmbh Hannover Germany
*
- * (C) Copyright 2006
+ * (C) Copyright 2006-2010
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* reinhard.arlt@esd-electronics.de
/*
* Top level Makefile configuration choices
*/
-#ifdef CONFIG_MK_caddy2
+#ifdef CONFIG_CADDY2
#define VME_CADDY2
#endif
#define CONFIG_MPC8349 1 /* MPC8349 specific */
#define CONFIG_VME8349 1 /* ESD VME8349 board specific */
+#define CONFIG_SYS_TEXT_BASE 0xFFF00000
+
#define CONFIG_MISC_INIT_R
#define CONFIG_PCI
/* Don't enable PCI2 on vme834x - it doesn't exist physically. */
#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
-#define PCI_66M
-#ifdef PCI_66M
+#define CONFIG_PCI_66M
+#ifdef CONFIG_PCI_66M
#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
#else
#define CONFIG_83XX_CLKIN 33000000 /* in Hz */
#endif
#ifndef CONFIG_SYS_CLK_FREQ
-#ifdef PCI_66M
+#ifdef CONFIG_PCI_66M
#define CONFIG_SYS_CLK_FREQ 66000000
#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1
#else
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase TO (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write TO (ms) */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#define CONFIG_405GP 1 /* This is a PPC405 CPU */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_WALNUT 1 /* ...on a WALNUT board */
- /* ...and on a SYCAMORE board */
+ /* ...or on a SYCAMORE board */
+
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
/*
* Include common defines/options for all AMCC eval boards
/*Mem Map*/
#define CONFIG_SYS_SDRAM_BASE 0x0
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 * 1024)
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+
/*
* Include common defines/options for all AMCC eval boards
*/
#define EXTCLK_50 50000000
#define EXTCLK_83 83333333
+#define CONFIG_SYS_TEXT_BASE 0xfffb0000
+
/*
* Include common defines/options for all AMCC eval boards
*/
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_405EP 1 /* Specifc 405EP support*/
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_SYS_TIME_POST 5000
#define CONFIG_SYS_TIME_FACTORY_RESET 10000
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
void do_fixup_by_compat_u32(void *fdt, const char *compat,
const char *prop, u32 val, int create);
int fdt_fixup_memory(void *blob, u64 start, u64 size);
+int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks);
void fdt_fixup_ethernet(void *fdt);
int fdt_find_and_setprop(void *fdt, const char *node, const char *prop,
const void *val, int len, int create);
char **of_flat_tree, ulong *of_size);
#endif
-#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
+#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
int boot_ramdisk_high (struct lmb *lmb, ulong rd_data, ulong rd_len,
ulong *initrd_start, ulong *initrd_end);
-
+#endif /* CONFIG_SYS_BOOT_RAMDISK_HIGH */
+#ifdef CONFIG_SYS_BOOT_GET_CMDLINE
int boot_get_cmdline (struct lmb *lmb, ulong *cmd_start, ulong *cmd_end,
ulong bootmap_base);
+#endif /* CONFIG_SYS_BOOT_GET_CMDLINE */
+#ifdef CONFIG_SYS_BOOT_GET_KBD
int boot_get_kbd (struct lmb *lmb, bd_t **kbd, ulong bootmap_base);
-#endif /* CONFIG_PPC || CONFIG_M68K */
+#endif /* CONFIG_SYS_BOOT_GET_KBD */
#endif /* !USE_HOSTCC */
/*******************************************************************/
#define PORT_PTS_ULPI (2 << 30)
#define PORT_PTS_SERIAL (3 << 30)
#define PORT_PTS_PTW (1 << 28)
+#define PORT_PFSC (1 << 24) /* Defined on Page 39-44 of the mpc5151 ERM */
+#define PORT_PTS_PHCD (1 << 23)
+#define PORT_PP (1 << 12)
+#define PORT_PR (1 << 8)
/* USBMODE Register bits */
#define CM_IDLE (0 << 0)
#define CM_RESERVED (1 << 0)
#define CM_DEVICE (2 << 0)
#define CM_HOST (3 << 0)
+#define ES_BE (1 << 2) /* Big Endian Select, default is LE */
#define USBMODE_RESERVED_2 (0 << 2)
#define SLOM (1 << 3)
#define SDIS (1 << 4)
#define PHY_CLK_VALID (1 << 17)
#define FSL_SOC_USB_PORTSC2 0x188
+
+/* OTG Status Control Register bits */
+#define FSL_SOC_USB_OTGSC 0x1a4
+#define CTRL_VBUS_DISCHARGE (0x1<<0)
+#define CTRL_VBUS_CHARGE (0x1<<1)
+#define CTRL_OTG_TERMINATION (0x1<<3)
+#define CTRL_DATA_PULSING (0x1<<4)
+#define CTRL_ID_PULL_EN (0x1<<5)
+#define HA_DATA_PULSE (0x1<<6)
+#define HA_BA (0x1<<7)
+#define STS_USB_ID (0x1<<8)
+#define STS_A_VBUS_VALID (0x1<<9)
+#define STS_A_SESSION_VALID (0x1<<10)
+#define STS_B_SESSION_VALID (0x1<<11)
+#define STS_B_SESSION_END (0x1<<12)
+#define STS_1MS_TOGGLE (0x1<<13)
+#define STS_DATA_PULSING (0x1<<14)
+#define INTSTS_USB_ID (0x1<<16)
+#define INTSTS_A_VBUS_VALID (0x1<<17)
+#define INTSTS_A_SESSION_VALID (0x1<<18)
+#define INTSTS_B_SESSION_VALID (0x1<<19)
+#define INTSTS_B_SESSION_END (0x1<<20)
+#define INTSTS_1MS (0x1<<21)
+#define INTSTS_DATA_PULSING (0x1<<22)
+#define INTR_USB_ID_EN (0x1<<24)
+#define INTR_A_VBUS_VALID_EN (0x1<<25)
+#define INTR_A_SESSION_VALID_EN (0x1<<26)
+#define INTR_B_SESSION_VALID_EN (0x1<<27)
+#define INTR_B_SESSION_END_EN (0x1<<28)
+#define INTR_1MS_TIMER_EN (0x1<<29)
+#define INTR_DATA_PULSING_EN (0x1<<30)
+#define INTSTS_MASK (0x00ff0000)
+
+/* USBCMD Bits of interest */
+#define EHCI_FSL_USBCMD_RST (1 << 1)
+#define EHCI_FSL_USBCMD_RS (1 << 0)
+
+#define INTERRUPT_ENABLE_BITS_MASK \
+ (INTR_USB_ID_EN | \
+ INTR_1MS_TIMER_EN | \
+ INTR_A_VBUS_VALID_EN | \
+ INTR_A_SESSION_VALID_EN | \
+ INTR_B_SESSION_VALID_EN | \
+ INTR_B_SESSION_END_EN | \
+ INTR_DATA_PULSING_EN)
+
+#define INTERRUPT_STATUS_BITS_MASK \
+ (INTSTS_USB_ID | \
+ INTR_1MS_TIMER_EN | \
+ INTSTS_A_VBUS_VALID | \
+ INTSTS_A_SESSION_VALID | \
+ INTSTS_B_SESSION_VALID | \
+ INTSTS_B_SESSION_END | \
+ INTSTS_DATA_PULSING)
+
#define FSL_SOC_USB_USBMODE 0x1a8
+
+#define USBGENCTRL 0x200 /* NOTE: big endian */
+#define GC_WU_INT_CLR (1 << 5) /* Wakeup int clear */
+#define GC_ULPI_SEL (1 << 4) /* ULPI i/f select (usb0 only)*/
+#define GC_PPP (1 << 3) /* Port Power Polarity */
+#define GC_PFP (1 << 2) /* Power Fault Polarity */
+#define GC_WU_ULPI_EN (1 << 1) /* Wakeup on ULPI event */
+#define GC_WU_IE (1 << 1) /* Wakeup interrupt enable */
+
+#define ISIPHYCTRL 0x204 /* NOTE: big endian */
+#define PHYCTRL_PHYE (1 << 4) /* On-chip UTMI PHY enable */
+#define PHYCTRL_BSENH (1 << 3) /* Bit Stuff Enable High */
+#define PHYCTRL_BSEN (1 << 2) /* Bit Stuff Enable */
+#define PHYCTRL_LSFE (1 << 1) /* Line State Filter Enable */
+#define PHYCTRL_PXE (1 << 0) /* PHY oscillator enable */
+
#define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */
#define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */
#define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */
#define MPC83XX_SCCR_USB_DRCM_01 0x00100000
#define MPC83XX_SCCR_USB_DRCM_10 0x00200000
-#if defined(CONFIG_MPC83xx)
-#define CONFIG_SYS_MPC8xxx_USB_ADDR CONFIG_SYS_MPC83xx_USB_ADDR
+#if defined(CONFIG_MPC83XX)
+#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC83xx_USB_ADDR
#elif defined(CONFIG_MPC85xx)
-#define CONFIG_SYS_MPC8xxx_USB_ADDR CONFIG_SYS_MPC85xx_USB_ADDR
+#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC85xx_USB_ADDR
+#elif defined(CONFIG_MPC512X)
+#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC512x_USB_ADDR
#endif
/*
* USB Registers
*/
struct usb_ehci {
- u8 res1[0x100];
+ u32 id; /* 0x000 - Identification register */
+ u32 hwgeneral; /* 0x004 - General hardware parameters */
+ u32 hwhost; /* 0x008 - Host hardware parameters */
+ u32 hwdevice; /* 0x00C - Device hardware parameters */
+ u32 hwtxbuf; /* 0x010 - TX buffer hardware parameters */
+ u32 hwrxbuf; /* 0x014 - RX buffer hardware parameters */
+ u8 res1[0x68];
+ u32 gptimer0_ld; /* 0x080 - General Purpose Timer 0 load value */
+ u32 gptimer0_ctrl; /* 0x084 - General Purpose Timer 0 control */
+ u32 gptimer1_ld; /* 0x088 - General Purpose Timer 1 load value */
+ u32 gptimer1_ctrl; /* 0x08C - General Purpose Timer 1 control */
+ u32 sbuscfg; /* 0x090 - System Bus Interface Control */
+ u8 res2[0x6C];
u16 caplength; /* 0x100 - Capability Register Length */
u16 hciversion; /* 0x102 - Host Interface Version */
u32 hcsparams; /* 0x104 - Host Structural Parameters */
u32 hccparams; /* 0x108 - Host Capability Parameters */
- u8 res2[0x14];
+ u8 res3[0x14];
u32 dciversion; /* 0x120 - Device Interface Version */
u32 dciparams; /* 0x124 - Device Controller Params */
- u8 res3[0x18];
+ u8 res4[0x18];
u32 usbcmd; /* 0x140 - USB Command */
u32 usbsts; /* 0x144 - USB Status */
u32 usbintr; /* 0x148 - USB Interrupt Enable */
u32 frindex; /* 0x14C - USB Frame Index */
- u8 res4[0x4];
+ u8 res5[0x4];
u32 perlistbase; /* 0x154 - Periodic List Base
- USB Device Address */
u32 ep_list_addr; /* 0x158 - Next Asynchronous List
- - Endpoint Address */
- u8 res5[0x4];
+ - End Point Address */
+ u8 res6[0x4];
u32 burstsize; /* 0x160 - Programmable Burst Size */
+#define FSL_EHCI_TXPBURST(X) ((X) << 8)
+#define FSL_EHCI_RXPBURST(X) (X)
u32 txfilltuning; /* 0x164 - Host TT Transmit
pre-buffer packet tuning */
- u8 res6[0x8];
+ u8 res7[0x8];
u32 ulpi_viewpoint; /* 0x170 - ULPI Reister Access */
- u8 res7[0xc];
+ u8 res8[0xc];
u32 config_flag; /* 0x180 - Configured Flag Register */
u32 portsc; /* 0x184 - Port status/control */
- u8 res8[0x20];
+ u8 res9[0x1C];
+ u32 otgsc; /* 0x1a4 - Oo-The-Go status and control */
u32 usbmode; /* 0x1a8 - USB Device Mode */
- u32 epsetupstat; /* 0x1ac - Endpoint Setup Status */
- u32 epprime; /* 0x1b0 - Endpoint Init Status */
- u32 epflush; /* 0x1b4 - Endpoint De-initlialize */
- u32 epstatus; /* 0x1b8 - Endpoint Status */
- u32 epcomplete; /* 0x1bc - Endpoint Complete */
- u32 epctrl0; /* 0x1c0 - Endpoint Control 0 */
- u32 epctrl1; /* 0x1c4 - Endpoint Control 1 */
- u32 epctrl2; /* 0x1c8 - Endpoint Control 2 */
- u32 epctrl3; /* 0x1cc - Endpoint Control 3 */
- u32 epctrl4; /* 0x1d0 - Endpoint Control 4 */
- u32 epctrl5; /* 0x1d4 - Endpoint Control 5 */
- u8 res9[0x228];
+ u32 epsetupstat; /* 0x1ac - End Point Setup Status */
+ u32 epprime; /* 0x1b0 - End Point Init Status */
+ u32 epflush; /* 0x1b4 - End Point De-initlialize */
+ u32 epstatus; /* 0x1b8 - End Point Status */
+ u32 epcomplete; /* 0x1bc - End Point Complete */
+ u32 epctrl0; /* 0x1c0 - End Point Control 0 */
+ u32 epctrl1; /* 0x1c4 - End Point Control 1 */
+ u32 epctrl2; /* 0x1c8 - End Point Control 2 */
+ u32 epctrl3; /* 0x1cc - End Point Control 3 */
+ u32 epctrl4; /* 0x1d0 - End Point Control 4 */
+ u32 epctrl5; /* 0x1d4 - End Point Control 5 */
+ u8 res10[0x28];
+ u32 usbgenctrl; /* 0x200 - USB General Control */
+ u32 isiphyctrl; /* 0x204 - On-Chip PHY Control */
+ u8 res11[0x1F8];
u32 snoop1; /* 0x400 - Snoop 1 */
u32 snoop2; /* 0x404 - Snoop 2 */
u32 age_cnt_limit; /* 0x408 - Age Count Threshold */
u32 prictrl; /* 0x40c - Priority Control */
u32 sictrl; /* 0x410 - System Interface Control */
- u8 res10[0xEC];
+ u8 res12[0xEC];
u32 control; /* 0x500 - Control */
- u8 res11[0xafc];
+ u8 res13[0xafc];
};
#endif /* _EHCI_FSL_H */
#
# Parameters: Target Architecture CPU Board [VENDOR] [SOC]
#
-# (C) 2002-2006 DENX Software Engineering, Wolfgang Denk <wd@denx.de>
+# (C) 2002-2010 DENX Software Engineering, Wolfgang Denk <wd@denx.de>
#
APPEND=no # Default: Create new config file
board=""
vendor=""
soc=""
+options=""
if [ \( $# -eq 2 \) -a \( "$1" = "-A" \) ] ; then
# Automatic mode
done
[ $# -lt 4 ] && exit 1
-[ $# -gt 6 ] && exit 1
+[ $# -gt 7 ] && exit 1
+# Strip all options and/or _config suffixes
CONFIG_NAME="${1%_config}"
-[ "${BOARD_NAME}" ] || BOARD_NAME="${CONFIG_NAME}"
+[ "${BOARD_NAME}" ] || BOARD_NAME="${1%_config}"
arch="$2"
cpu="$3"
fi
[ $# -gt 4 ] && [ "$5" != "-" ] && vendor="$5"
[ $# -gt 5 ] && [ "$6" != "-" ] && soc="$6"
+[ $# -gt 6 ] && [ "$7" != "-" ] && {
+ # check if we have a board config name in the options field
+ # the options field mave have a board config name and a list
+ # of options, both separated by a colon (':'); the options are
+ # separated by commas (',').
+ #
+ # Check for board name
+ tmp="${7%:*}"
+ if [ "$tmp" ] ; then
+ CONFIG_NAME="$tmp"
+ fi
+ # Check if we only have a colon...
+ if [ "${tmp}" != "$7" ] ; then
+ options=${7#*:}
+ TARGETS="`echo ${options} | sed 's:,: :g'` ${TARGETS}"
+ fi
+}
if [ "${ARCH}" -a "${ARCH}" != "${arch}" ]; then
echo "Failed: \$ARCH=${ARCH}, should be '${arch}' for ${BOARD_NAME}" 1>&2
exit 1
fi
-echo "Configuring for ${BOARD_NAME} board..."
+if [ "$options" ] ; then
+ echo "Configuring for ${BOARD_NAME} - Board: ${CONFIG_NAME}, Options: ${options}"
+else
+ echo "Configuring for ${BOARD_NAME} board..."
+fi
#
# Create link to architecture specific headers
echo "/* Automatically generated - do not edit */" >>config.h
for i in ${TARGETS} ; do
- echo "#define CONFIG_MK_${i} 1" >>config.h ;
+ i="`echo ${i} | sed '/=/ {s/=/\t/;q } ; { s/$/\t1/ }'`"
+ echo "#define CONFIG_${i}" >>config.h ;
done
cat << EOF >> config.h
include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
AFLAGS += -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_NAND_SPL
#
#
-# TEXT_BASE for SPL:
+# CONFIG_SYS_TEXT_BASE for SPL:
#
# On 4xx platforms the SPL is located at 0xfffff000...0xffffffff,
# in the last 4kBytes of memory space in cache.
# We will copy this SPL into internal SRAM in start.S. So we set
-# TEXT_BASE to starting address in internal SRAM here.
+# CONFIG_SYS_TEXT_BASE to starting address in internal SRAM here.
#
-TEXT_BASE = 0xf8004000
+CONFIG_SYS_TEXT_BASE = 0xf8004000
# PAD_TO used to generate a 16kByte binary needed for the combined image
-# -> PAD_TO = TEXT_BASE + 0x4000
+# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 0x4000
PAD_TO = 0xf8008000
ifeq ($(debug),1)
include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
AFLAGS += -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_NAND_SPL
#
#
-# TEXT_BASE for SPL:
+# CONFIG_SYS_TEXT_BASE for SPL:
#
# On 440EP(x) platforms the SPL is located at 0xfffff000...0xffffffff,
# in the last 4kBytes of memory space in cache.
# We will copy this SPL into instruction-cache in start.S. So we set
-# TEXT_BASE to starting address in i-cache here.
+# CONFIG_SYS_TEXT_BASE to starting address in i-cache here.
#
-TEXT_BASE = 0x00800000
+CONFIG_SYS_TEXT_BASE = 0x00800000
# PAD_TO used to generate a 16kByte binary needed for the combined image
-# -> PAD_TO = TEXT_BASE + 0x4000
+# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 0x4000
PAD_TO = 0x00804000
PLATFORM_CPPFLAGS += -DCONFIG_440=1
include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
AFLAGS += -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_NAND_SPL
#
#
-# TEXT_BASE for SPL:
+# CONFIG_SYS_TEXT_BASE for SPL:
#
# On 460EX platforms the SPL is located at 0xfffff000...0xffffffff,
# in the last 4kBytes of memory space in cache.
# We will copy this SPL into internal SRAM in start.S. So we set
-# TEXT_BASE to starting address in internal SRAM here.
+# CONFIG_SYS_TEXT_BASE to starting address in internal SRAM here.
#
-TEXT_BASE = 0xE3003000
+CONFIG_SYS_TEXT_BASE = 0xE3003000
# PAD_TO used to generate a 128kByte binary needed for the combined image
-# -> PAD_TO = TEXT_BASE + 0x20000
+# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 0x20000
PAD_TO = 0xE3023000
PLATFORM_CPPFLAGS += -DCONFIG_440=1
include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
AFLAGS += -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_NAND_SPL
#
#
-# TEXT_BASE for SPL:
+# CONFIG_SYS_TEXT_BASE for SPL:
#
# On 4xx platforms the SPL is located at 0xfffff000...0xffffffff,
# in the last 4kBytes of memory space in cache.
# We will copy this SPL into SDRAM since we can't access the NAND
# controller at CS0 while running from this location. So we set
-# TEXT_BASE to starting address in SDRAM here.
+# CONFIG_SYS_TEXT_BASE to starting address in SDRAM here.
#
-TEXT_BASE = 0x00800000
+CONFIG_SYS_TEXT_BASE = 0x00800000
# PAD_TO used to generate a 16kByte binary needed for the combined image
-# -> PAD_TO = TEXT_BASE + 0x4000
+# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 0x4000
PAD_TO = 0x00804000
ifeq ($(debug),1)
include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
AFLAGS += -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_NAND_SPL
#
#
-# TEXT_BASE for SPL:
+# CONFIG_SYS_TEXT_BASE for SPL:
#
# On 440EP(x) platforms the SPL is located at 0xfffff000...0xffffffff,
# in the last 4kBytes of memory space in cache.
# We will copy this SPL into internal SRAM in start.S. So we set
-# TEXT_BASE to starting address in internal SRAM here.
+# CONFIG_SYS_TEXT_BASE to starting address in internal SRAM here.
#
-TEXT_BASE = 0xE0013000
+CONFIG_SYS_TEXT_BASE = 0xE0013000
# PAD_TO used to generate a 16kByte binary needed for the combined image
-# -> PAD_TO = TEXT_BASE + 0x4000
+# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 0x4000
PAD_TO = 0xE0017000
PLATFORM_CPPFLAGS += -DCONFIG_440=1
#
NAND_SPL := y
-TEXT_BASE := 0xfff00000
+CONFIG_SYS_TEXT_BASE := 0xfff00000
PAD_TO := 0xfff04000
include $(TOPDIR)/config.mk
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
AFLAGS += -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_NAND_SPL
#
NAND_SPL := y
-TEXT_BASE := 0xfff00000
+CONFIG_SYS_TEXT_BASE := 0xfff00000
PAD_TO := 0xfff04000
include $(TOPDIR)/config.mk
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
AFLAGS += -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_NAND_SPL
#
NAND_SPL := y
-TEXT_BASE := 0xfff00000
+CONFIG_SYS_TEXT_BASE := 0xfff00000
PAD_TO := 0xfff01000
include $(TOPDIR)/config.mk
LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds
-LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
AFLAGS += -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_NAND_SPL
#
NAND_SPL := y
-TEXT_BASE := 0xfff00000
+CONFIG_SYS_TEXT_BASE := 0xfff00000
PAD_TO := 0xfff01000
include $(TOPDIR)/config.mk
LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds
-LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
AFLAGS += -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_NAND_SPL
include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
#
NAND_SPL := y
-TEXT_BASE := 0xfff00000
+CONFIG_SYS_TEXT_BASE := 0xfff00000
PAD_TO := 0xfff01000
include $(TOPDIR)/config.mk
LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds
-LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
AFLAGS += -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_NAND_SPL
include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
AFLAGS += -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_NAND_SPL
#
# Samsung S3C64xx Reference Platform (smdk6400) board
-# TEXT_BASE for SPL:
+# CONFIG_SYS_TEXT_BASE for SPL:
#
# On S3C64xx platforms the SPL is located in SRAM at 0.
#
-# TEXT_BASE = 0
+# CONFIG_SYS_TEXT_BASE = 0
include $(TOPDIR)/board/$(BOARDDIR)/config.mk
# PAD_TO used to generate a 4kByte binary needed for the combined image
-# -> PAD_TO = TEXT_BASE + 4096
-PAD_TO := $(shell expr $$[$(TEXT_BASE) + 4096])
+# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 4096
+PAD_TO := $(shell expr $$[$(CONFIG_SYS_TEXT_BASE) + 4096])
ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DDEBUG
#
NAND_SPL := y
-TEXT_BASE := 0xfff00000
+CONFIG_SYS_TEXT_BASE := 0xfff00000
include $(TOPDIR)/config.mk
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
AFLAGS += -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_NAND_SPL
#if defined(CONFIG_ARM) && !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
void board_init_f (ulong bootflag)
{
- relocate_code (TEXT_BASE - TOTAL_MALLOC_LEN, NULL, TEXT_BASE);
+ relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL, TEXT_BASE);
}
#endif
#if defined(CONFIG_ARM) && !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
void board_init_f (ulong bootflag)
{
- relocate_code (TEXT_BASE - TOTAL_MALLOC_LEN, NULL, TEXT_BASE);
+ relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL, TEXT_BASE);
}
#endif
include $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/config.mk
LDSCRIPT= $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/u-boot.onenand.lds
-LDFLAGS = -Bstatic -T $(onenandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+LDFLAGS = -Bstatic -T $(onenandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
AFLAGS += -DCONFIG_PRELOADER -DCONFIG_ONENAND_IPL
CFLAGS += -DCONFIG_PRELOADER -DCONFIG_ONENAND_IPL
OBJCFLAGS += --gap-fill=0x00
# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
# (mem base + reserved)
-TEXT_BASE = 0x00000000
+CONFIG_SYS_TEXT_BASE = 0x00000000
#endif
_TEXT_BASE:
- .word TEXT_BASE /* sdram load addr from config.mk */
+ .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
.globl lowlevel_init
lowlevel_init:
include $(TOPDIR)/config.mk
LDSCRIPT= $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/u-boot.onenand.lds
-LDFLAGS = -Bstatic -T $(onenandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+LDFLAGS = -Bstatic -T $(onenandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
AFLAGS += -DCONFIG_PRELOADER -DCONFIG_ONENAND_IPL
CFLAGS += -DCONFIG_PRELOADER -DCONFIG_ONENAND_IPL
OBJCFLAGS += --gap-fill=0x00
-TEXT_BASE = 0x5c03fc00
+CONFIG_SYS_TEXT_BASE = 0x5c03fc00
-idirafter $(OBJTREE)/include \
-I $(SRCTREE)/lib/libfdt \
-I $(SRCTREE)/tools \
- -DTEXT_BASE=$(TEXT_BASE) -DUSE_HOSTCC \
+ -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) \
+ -DUSE_HOSTCC \
-D__KERNEL_STRICT_NAMES
s/="\(.*\)"$/=\1/;
# Concatenate string values
s/" *"//g;
- # Wrap non-numeral values with quotes
- s/=\(.*\?[^0-9].*\)$/=\"\1\"/;
+ # Assume strings as default - add quotes around values
+ s/=\(..*\)/="\1"/;
+ # but remove again from decimal numbers
+ s/="\([0-9][0-9]*\)"/=\1/;
+ # ... and from hex numbers
+ s/="\(0[Xx][0-9a-fA-F][0-9a-fA-F]*\)"/=\1/;
# Change '1' and empty values to "y" (not perfect, but
# supports conditional compilation in the makefiles
s/=$/=y/;
projects / people / ms / u-boot.git / commitdiff
