arm: spear: Add BCH4 SW support to SPEAr600 x600 board

This board is equipped with a Micron NAND chip (MT29F1G08ABADAH4) that
needs 4-bit ECC. But the SPEAr600 only supports 1-bit HW ECC internally.
This patch enables the SW 4-bit BCH support for this board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Viresh Kumar <viresh.kumar@linaro.org>

diff --git a/include/configs/x600.h b/include/configs/x600.h
index 6a5738863ad9f1b9ba2b6aca246bce0897575c6b..f672485d69da9c122f02f8284a2eb42e0246b2a2 100644 (file)
--- a/include/configs/x600.h
+++ b/include/configs/x600.h
@@ -67,6 +67,8 @@
 #define CONFIG_MTD_ECC_SOFT
 #define CONFIG_SYS_FSMC_NAND_8BIT
 #define CONFIG_SYS_NAND_ONFI_DETECTION
+#define CONFIG_NAND_ECC_BCH
+#define CONFIG_BCH
 
 /* UBI/UBI config options */
 #define CONFIG_MTD_DEVICE