rockchip: enable boot0-hook for all Rockchip SoCs

Rockchip SoCs bootrom design is like this:
- First 2KB or 4KB internal memory is for bootrom stack and heap;
- Then the first 4-byte suppose to be a TAG like 'RK33';
- The the following memory address end with '0004' is the first
  instruction load and running by bootrom;

Let's use the boot0 hook to reserve the first 4-byte tag for all
the Rockchip SoCs.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Commit message taken from an older patch by:]
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 94ad80568446819a65586282dec35b0c4ac3e459..ca386decfe8603f7a3735b416b0de353ae7c25bf 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1130,6 +1130,7 @@ config ARCH_ROCKCHIP
        select DM_USB if USB
        select DM_PWM
        select DM_REGULATOR
+       select ENABLE_ARM_SOC_BOOT0_HOOK
        imply CMD_FASTBOOT
        imply FASTBOOT
        imply FAT_WRITE

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index d9b25d5de4e66647799569df0d4c35089949afde..31e9864c8da6940075e247b4097b2a6d88126182 100644 (file)
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -74,7 +74,6 @@ config ROCKCHIP_RK3368
        imply SPL_SEPARATE_BSS
        imply SPL_SERIAL_SUPPORT
        imply TPL_SERIAL_SUPPORT
-       select ENABLE_ARM_SOC_BOOT0_HOOK
        select DEBUG_UART_BOARD_INIT
        select SYS_NS16550
        help
@@ -112,7 +111,6 @@ config ROCKCHIP_RK3399
        select SPL_SEPARATE_BSS
        select SPL_SERIAL_SUPPORT
        select SPL_DRIVERS_MISC_SUPPORT
-       select ENABLE_ARM_SOC_BOOT0_HOOK
        select DEBUG_UART_BOARD_INIT
        help
          The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72