]> git.ipfire.org Git - people/ms/u-boot.git/commitdiff
common/board_f.c: change the macro name and remove it for PPC platforms
authorGong Qianyu <Qianyu.Gong@freescale.com>
Mon, 26 Oct 2015 11:47:42 +0000 (19:47 +0800)
committerYork Sun <yorksun@freescale.com>
Thu, 29 Oct 2015 17:33:58 +0000 (10:33 -0700)
For most PPC platforms, they will call the first get_clocks() in
init_sequence_f[] as they define CONFIG_PPC. CONFIG_SYS_FSL_CLK is
then defined to call the second get_clocks(), which should be
redundant for PPC.

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
43 files changed:
common/board_f.c
doc/README.fsl-clk [new file with mode: 0644]
include/configs/BSC9132QDS.h
include/configs/MPC8308RDB.h
include/configs/MPC837XEMDS.h
include/configs/MPC837XERDB.h
include/configs/MPC8536DS.h
include/configs/MPC8569MDS.h
include/configs/P1010RDB.h
include/configs/P1022DS.h
include/configs/P2041RDB.h
include/configs/T102xQDS.h
include/configs/T102xRDB.h
include/configs/T1040QDS.h
include/configs/T104xRDB.h
include/configs/T208xQDS.h
include/configs/T208xRDB.h
include/configs/T4240QDS.h
include/configs/T4240RDB.h
include/configs/UCP1020.h
include/configs/colibri_vf.h
include/configs/controlcenterd.h
include/configs/corenet_ds.h
include/configs/hrcon.h
include/configs/ls1021aqds.h
include/configs/ls1021atwr.h
include/configs/ls2085aqds.h
include/configs/ls2085ardb.h
include/configs/m53evk.h
include/configs/mx25pdk.h
include/configs/mx35pdk.h
include/configs/mx51evk.h
include/configs/mx53ard.h
include/configs/mx53evk.h
include/configs/mx53loco.h
include/configs/mx53smd.h
include/configs/mx6_common.h
include/configs/mx7_common.h
include/configs/p1_p2_rdb_pc.h
include/configs/p1_twr.h
include/configs/usbarmory.h
include/configs/vf610twr.h
include/configs/woodburn_common.h

index 486e828fe8a740e73fd32fce05b3d7ad26c522b9..7632041b73410bf776cbd8d11bc4a9749ca45a5d 100644 (file)
@@ -806,7 +806,7 @@ static init_fnc_t init_sequence_f[] = {
 #if defined(CONFIG_BOARD_POSTCLK_INIT)
        board_postclk_init,
 #endif
-#ifdef CONFIG_FSL_CLK
+#ifdef CONFIG_SYS_FSL_CLK
        get_clocks,
 #endif
 #ifdef CONFIG_M68K
diff --git a/doc/README.fsl-clk b/doc/README.fsl-clk
new file mode 100644 (file)
index 0000000..9e83c24
--- /dev/null
@@ -0,0 +1,6 @@
+Freescale system clock options
+
+       - CONFIG_SYS_FSL_CLK
+               Enable to call get_clocks() in board_init_f() for
+               non-PPC platforms and PCC 8xx platforms such as
+               TQM866M and TQM885D.
index a006dcebaaa83985079d04ab1ad87b64cf9312b4..54dcf3b9548de2086ef5aa597218ce313b0e587c 100644 (file)
@@ -17,7 +17,6 @@
 #define CONFIG_BSC9132
 #endif
 
-#define CONFIG_FSL_CLK
 #define CONFIG_MISC_INIT_R
 
 #ifdef CONFIG_SDCARD
index cfa59313111a98368f18cedd8120810c734725e8..551b72d15309cff788da6bfeb19d3776209f9ce5 100644 (file)
@@ -10,7 +10,6 @@
 #define __CONFIG_H
 
 #define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_FSL_CLK
 
 /*
  * High Level Configuration Options
index 990fc04e870a613ecc57746e7e4f084f4111edb4..7d1262d510c1f8672c6ab527674df002a21f1006 100644 (file)
@@ -9,7 +9,6 @@
 #define __CONFIG_H
 
 #define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_FSL_CLK
 
 /*
  * High Level Configuration Options
index fcc531b600108cc05477110fa42c5f74a8582224..ab68e63881badbcb1f48ba9de7233f84cb9ec4be 100644 (file)
@@ -16,7 +16,6 @@
 #define CONFIG_MPC837x         1 /* MPC837x CPU specific */
 #define CONFIG_MPC837XERDB     1
 #define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_FSL_CLK
 
 #define        CONFIG_SYS_TEXT_BASE    0xFE000000
 
index af8eb8c0d2e1436e57e25c96db90088c04a017cc..29c27fa9a75f2a8ca214fa4282b570a7e18c4226 100644 (file)
@@ -12,7 +12,6 @@
 #define __CONFIG_H
 
 #define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_FSL_CLK
 #include "../board/freescale/common/ics307_clk.h"
 
 #ifdef CONFIG_36BIT
index 9f784e0adb93054ba8cb7f977fdaf3c6bbd8bdf0..6f614b0cbe3d66975bcdedc762c1b2d6d179d8b0 100644 (file)
@@ -12,7 +12,6 @@
 
 #define CONFIG_DISPLAY_BOARDINFO
 
-#define CONFIG_FSL_CLK
 /* High Level Configuration Options */
 #define CONFIG_BOOKE           1       /* BOOKE */
 #define CONFIG_E500            1       /* BOOKE e500 family */
index 9e407303954451f17d8b6de6a3d1122c37efa033..81b085572dc9639a2f7abf98e22c0ea03b70feb2 100644 (file)
@@ -15,7 +15,6 @@
 #define CONFIG_PHYS_64BIT
 #endif
 #define        CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_FSL_CLK
 
 #define CONFIG_P1010
 #define CONFIG_E500                    /* BOOKE e500 family */
index c571fac666e29a51d2ae1448270aef6da8eec821..a9d825baf5dd76845d761b5643400c5c36420e41 100644 (file)
@@ -12,7 +12,6 @@
 #include "../board/freescale/common/ics307_clk.h"
 
 #define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_FSL_CLK
 
 #ifdef CONFIG_36BIT
 #define CONFIG_PHYS_64BIT
index 0cd990477b15631aaa97c56a75ecf880de8db242..2c4c8b5a026991125077c1787c5c0bf68d2cb17a 100644 (file)
@@ -15,7 +15,6 @@
 #define CONFIG_PHYS_64BIT
 #define CONFIG_DISPLAY_BOARDINFO
 #define CONFIG_PPC_P2041
-#define CONFIG_FSL_CLK
 
 #ifdef CONFIG_RAMBOOT_PBL
 #define CONFIG_RAMBOOT_TEXT_BASE       CONFIG_SYS_TEXT_BASE
index 4f22657703ddd66af42abb961b6c22c478042d35..52942edbd416986c3a37072a7a283668af5b546f 100644 (file)
@@ -20,7 +20,6 @@
 #define CONFIG_MP                      /* support multiple processors */
 #define CONFIG_PHYS_64BIT
 #define CONFIG_ENABLE_36BIT_PHYS
-#define CONFIG_FSL_CLK
 
 #ifdef CONFIG_PHYS_64BIT
 #define CONFIG_ADDR_MAP                1
index d412d0b2b7e799747047b699bdfc3c60f29a22ce..39fa5e2b1898493730c6398d3cbc7592efc2e27a 100644 (file)
@@ -20,7 +20,6 @@
 #define CONFIG_MP                      /* support multiple processors */
 #define CONFIG_PHYS_64BIT
 #define CONFIG_ENABLE_36BIT_PHYS
-#define CONFIG_FSL_CLK
 
 #ifdef CONFIG_PHYS_64BIT
 #define CONFIG_ADDR_MAP                1
index 18df2372a485a9e16ff87038d3a3e4c8c8e0555c..d8b86e6c5e6c9954a101b1fc148a658ce846e63c 100644 (file)
@@ -29,7 +29,6 @@
 #define CONFIG_T1040QDS
 #define CONFIG_PHYS_64BIT
 #define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_FSL_CLK
 
 #ifdef CONFIG_RAMBOOT_PBL
 #define CONFIG_RAMBOOT_TEXT_BASE       CONFIG_SYS_TEXT_BASE
index 20910156386040a5667a387688af804792916bd7..da2ccb831838deac3962a6915d47d379793a02c2 100644 (file)
@@ -13,7 +13,6 @@
 #define CONFIG_T104xRDB
 #define CONFIG_PHYS_64BIT
 #define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_FSL_CLK
 
 #define CONFIG_E500                    /* BOOKE e500 family */
 #include <asm/config_mpc85xx.h>
index d35b9d2d90169b175dbec5100cefff50d7f109de..a81f1e66f3fc95ff2bf1b53fcf413126824b9688 100644 (file)
@@ -13,7 +13,6 @@
 
 #define CONFIG_DISPLAY_BOARDINFO
 #define CONFIG_ICS307_REFCLK_HZ 25000000  /* ICS307 ref clk freq */
-#define CONFIG_FSL_CLK
 #define CONFIG_MMC
 #define CONFIG_USB_EHCI
 #if defined(CONFIG_PPC_T2080)
index c632b8e328fd0c312fdd023a3dc3f98778573c63..8b762346ac2679ae7001f593f3830ffb26bbffa0 100644 (file)
@@ -14,7 +14,6 @@
 #define CONFIG_DISPLAY_BOARDINFO
 #define CONFIG_T2080RDB
 #define CONFIG_ICS307_REFCLK_HZ 25000000  /* ICS307 ref clk freq */
-#define CONFIG_FSL_CLK
 #define CONFIG_MMC
 #define CONFIG_USB_EHCI
 #define CONFIG_FSL_SATA_V2
index dd8dd73f9867fc5c8eb680933a37dbabae9bc39b..4edb3cb91f35ddfaa08d5912259e4e402104693c 100644 (file)
@@ -12,7 +12,6 @@
 
 #define CONFIG_T4240QDS
 #define CONFIG_PHYS_64BIT
-#define CONFIG_FSL_CLK
 
 #define CONFIG_FSL_SATA_V2
 #define CONFIG_PCIE4
index 2c5f800cbd2d3a9579d46cbdf1b572ed2c792039..2e875d2fc1284d116756adf9632c8c1f826da742 100644 (file)
@@ -13,7 +13,6 @@
 #define CONFIG_T4240RDB
 #define CONFIG_PHYS_64BIT
 #define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_FSL_CLK
 
 #define CONFIG_FSL_SATA_V2
 #define CONFIG_PCIE4
index 0b609af2c90768ea6a6293c9ccf0d2308ab63639..861147377309b3215a9c67e2ac6657ed377db1bf 100644 (file)
@@ -15,7 +15,6 @@
 #define __CONFIG_H
 
 #define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_FSL_CLK
 
 #define CONFIG_FSL_ELBC
 #define CONFIG_PCI
index 9fa8f817f29b294edaa8eceb91e990fdef136401..7658e6136787c57dd73fe5a43f47037103ca2e36 100644 (file)
@@ -18,7 +18,7 @@
 #define CONFIG_SYS_THUMB_BUILD
 #define CONFIG_USE_ARCH_MEMCPY
 #define CONFIG_USE_ARCH_MEMSET
-#define CONFIG_FSL_CLK
+#define CONFIG_SYS_FSL_CLK
 
 #define CONFIG_ARCH_MISC_INIT
 #define CONFIG_DISPLAY_CPUINFO
index 77c2edcbb3c6d8862869a0477aabb130bb3ca0c6..600bb835cefca51fcaa26b2bfba3c1f2fbef58a3 100644 (file)
@@ -44,7 +44,6 @@
 #define CONFIG_P1022
 #define CONFIG_CONTROLCENTERD
 #define CONFIG_MP                      /* support multiple processors */
-#define CONFIG_FSL_CLK
 
 
 #define CONFIG_SYS_NO_FLASH
index 3c9a5291622c82296cf354bdabb12ee4bf7752e7..921021634df7347892a67cf8dfb53c4f353e3940 100644 (file)
@@ -11,7 +11,6 @@
 #define __CONFIG_H
 
 #define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_FSL_CLK
 
 #include "../board/freescale/common/ics307_clk.h"
 
index e2b9deba9e1e4f9564dc39a3eac8ade4b9cd2124..3cb279a9127f48b26a778ed89b9efcc8e456044f 100644 (file)
@@ -23,7 +23,6 @@
 #define CONFIG_IDENT_STRING    " hrcon 0.01"
 
 
-#define CONFIG_FSL_CLK
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_BOARD_EARLY_INIT_R
 #define CONFIG_LAST_STAGE_INIT
index 27c11c251efc743af5bc7410581b92da249a7adc..99753c3c1b72167757447748bdfdcf76075044ba 100644 (file)
@@ -11,7 +11,7 @@
 
 #define CONFIG_ARMV7_PSCI
 
-#define CONFIG_FSL_CLK
+#define CONFIG_SYS_FSL_CLK
 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
index 1d3754dde6f884474684949a50d70095c43f04c2..6af748d6ac27ff525eb9f618ea754dd7170b2169 100644 (file)
@@ -11,7 +11,7 @@
 
 #define CONFIG_ARMV7_PSCI
 
-#define CONFIG_FSL_CLK
+#define CONFIG_SYS_FSL_CLK
 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
index 4cfcf980941de22c28be165665f9bf7e4a652fef..406d0e6d47e5c018872bbdf38a721fbf9843427e 100644 (file)
@@ -16,7 +16,7 @@ unsigned long get_board_sys_clk(void);
 unsigned long get_board_ddr_clk(void);
 #endif
 
-#define CONFIG_FSL_CLK
+#define CONFIG_SYS_FSL_CLK
 #define CONFIG_SYS_CLK_FREQ            get_board_sys_clk()
 #define CONFIG_DDR_CLK_FREQ            get_board_ddr_clk()
 #define COUNTER_FREQUENCY_REAL         (CONFIG_SYS_CLK_FREQ/4)
index 9c5c5d3d3879b7bb42c4bac3f200aeb8bb0c94b7..f95d7b27320f329ef908eae30ee9a6b78ce529f2 100644 (file)
@@ -18,7 +18,7 @@
 unsigned long get_board_sys_clk(void);
 #endif
 
-#define CONFIG_FSL_CLK
+#define CONFIG_SYS_FSL_CLK
 #define CONFIG_SYS_CLK_FREQ            get_board_sys_clk()
 #define CONFIG_DDR_CLK_FREQ            133333333
 #define COUNTER_FREQUENCY_REAL         (CONFIG_SYS_CLK_FREQ/4)
index 152e295778aee1a75a889301d5ed7d65098d4e8f..fbaa6000bc860686789ed17098d3f26bf2e35fc6 100644 (file)
@@ -17,7 +17,7 @@
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_REVISION_TAG
 #define CONFIG_SYS_NO_FLASH
-#define CONFIG_FSL_CLK
+#define CONFIG_SYS_FSL_CLK
 
 #define CONFIG_FIT
 
index 0ee8e0d97cb95f96a5b6411ba5de641d8a4b4911..f1133026952b7ee685f7c297770e65e9343c5a0c 100644 (file)
@@ -14,7 +14,7 @@
 #define CONFIG_MX25
 #define CONFIG_SYS_TEXT_BASE           0x81200000
 #define CONFIG_MXC_GPIO
-#define CONFIG_FSL_CLK
+#define CONFIG_SYS_FSL_CLK
 
 #define CONFIG_SYS_TIMER_RATE          32768
 #define CONFIG_SYS_TIMER_COUNTER       \
index 41f518e49b0e33e85930ac631f23bb1fadef4faf..1b2f9529753e352cb73a6bc18d45876a844f0f95 100644 (file)
@@ -19,7 +19,7 @@
 #define CONFIG_MX35
 
 #define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_FSL_CLK
+#define CONFIG_SYS_FSL_CLK
 
 /* Set TEXT at the beginning of the NOR flash */
 #define CONFIG_SYS_TEXT_BASE   0xA0000000
index 35c9346638f693b57a58bf14b347fa770ae81fd8..32cd58ef442c07c296cd2aea4ec9ec939fc9bf67 100644 (file)
@@ -18,7 +18,7 @@
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
-#define CONFIG_FSL_CLK
+#define CONFIG_SYS_FSL_CLK
 #define CONFIG_SYS_TEXT_BASE   0x97800000
 
 #include <asm/arch/imx-regs.h>
index be37ce5342196e0595b88bd50412e4d3037d6f90..fdb4134b132f11147337e7aa1c7e10151b3f1ecc 100644 (file)
@@ -23,7 +23,7 @@
 #define CONFIG_INITRD_TAG
 #define CONFIG_REVISION_TAG
 
-#define CONFIG_FSL_CLK
+#define CONFIG_SYS_FSL_CLK
 
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
index 81af2486968fb3c0daf82f742e1e3f3715562986..37430f0a2a0d5ca087c43fa58e211473026c5693 100644 (file)
@@ -23,7 +23,7 @@
 #define CONFIG_INITRD_TAG
 #define CONFIG_REVISION_TAG
 
-#define CONFIG_FSL_CLK
+#define CONFIG_SYS_FSL_CLK
 
 #define CONFIG_OF_LIBFDT
 
index 53fb4f79ef17f8f583af9278b249e3adbb358e34..54d3e3edd52d12c77095839ca37b6968aa22f6f7 100644 (file)
@@ -22,7 +22,7 @@
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_INITRD_TAG
 
-#define CONFIG_FSL_CLK
+#define CONFIG_SYS_FSL_CLK
 
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN          (10 * 1024 * 1024)
index f5fcd838edda210b75f277c5956a9b7909b9584a..d915b883ce2b42a0a58aadb7a4883945bc64e7f9 100644 (file)
@@ -23,7 +23,7 @@
 #define CONFIG_INITRD_TAG
 #define CONFIG_REVISION_TAG
 
-#define CONFIG_FSL_CLK
+#define CONFIG_SYS_FSL_CLK
 
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
index ba1317838421ed1047c0d0e9a4f904c5df609423..29bfbde3c5c9bd64c830e874b13721ead0122ae9 100644 (file)
@@ -45,7 +45,7 @@
 
 #define CONFIG_DISPLAY_BOARDINFO
 #define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_FSL_CLK
+#define CONFIG_SYS_FSL_CLK
 
 /* ATAGs */
 #define CONFIG_CMDLINE_TAG
index 04468b94eefdc1e2b56435d243362e9de9d62a24..1b6edeeae5d88dd9935d57687d81f036fa33f4d6 100644 (file)
@@ -21,6 +21,7 @@
 #define CONFIG_MXC_GPT_HCLK
 #define CONFIG_SYSCOUNTER_TIMER
 #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
+#define CONFIG_SYS_FSL_CLK
 
 /* Enable iomux-lpsr support */
 #define CONFIG_IOMUX_LPSR
index 03eb185e16a57290bfe3738c4219e5e4bcca0741..433c4093361fa6a463410010dbf72ef484279b0f 100644 (file)
@@ -11,7 +11,6 @@
 #define __CONFIG_H
 
 #define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_FSL_CLK
 
 #ifdef CONFIG_36BIT
 #define CONFIG_PHYS_64BIT
index 46f5f0f70e5a5a4af0fc43841292bd659afbc0bf..d83daa02556700072051ece407bf22c2a4a77927 100644 (file)
@@ -11,7 +11,6 @@
 #define __CONFIG_H
 
 #define        CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_FSL_CLK
 #if defined(CONFIG_TWR_P1025)
 #define CONFIG_BOARDNAME "TWR-P1025"
 #define CONFIG_P1025
index 6735055a616fca6e62f24ae4e726bad9a1226c82..6f6666281abb6eea67081827fdd12ee6fff1071a 100644 (file)
@@ -14,7 +14,7 @@
 #define CONFIG_MX53
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_FSL_CLK
+#define CONFIG_SYS_FSL_CLK
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_OF_LIBFDT
 #define CONFIG_MXC_GPIO
index abd1e98d9bebd281273076a666dbde91c611d027..a3ea2e0a1fabe01e779ebb5eca9f1f1e05d28580 100644 (file)
@@ -15,7 +15,7 @@
 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_FSL_CLK
+#define CONFIG_SYS_FSL_CLK
 
 #define CONFIG_MACH_TYPE               4146
 
index e6f3e28fe1dae6c22dba57e18850644a6b79669a..2acebf1a56d8ff3f6a9477c154d5bce47f3fb162 100644 (file)
@@ -16,7 +16,7 @@
  /* High Level Configuration Options */
 #define CONFIG_MX35
 #define CONFIG_MX35_HCLK_FREQ  24000000
-#define CONFIG_FSL_CLK
+#define CONFIG_SYS_FSL_CLK
 
 #define CONFIG_SYS_DCACHE_OFF
 #define CONFIG_SYS_CACHELINE_SIZE      32