]> git.ipfire.org Git - people/ms/u-boot.git/commitdiff
Merge git://www.denx.de/git/u-boot-marvell
authorTom Rini <trini@konsulko.com>
Tue, 8 Aug 2017 21:05:33 +0000 (17:05 -0400)
committerTom Rini <trini@konsulko.com>
Tue, 8 Aug 2017 21:05:33 +0000 (17:05 -0400)
768 files changed:
README
arch/arm/Kconfig
arch/arm/include/asm/arch-bcmcygnus/configs.h
arch/arm/mach-mvebu/include/mach/config.h
arch/powerpc/include/asm/config.h
cmd/net.c
configs/10m50_defconfig
configs/3c120_defconfig
configs/B4420QDS_NAND_defconfig
configs/B4420QDS_SPIFLASH_defconfig
configs/B4420QDS_defconfig
configs/B4860QDS_NAND_defconfig
configs/B4860QDS_SECURE_BOOT_defconfig
configs/B4860QDS_SPIFLASH_defconfig
configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
configs/B4860QDS_defconfig
configs/BSC9131RDB_NAND_SYSCLK100_defconfig
configs/BSC9131RDB_NAND_defconfig
configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
configs/BSC9131RDB_SPIFLASH_defconfig
configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
configs/BSC9132QDS_NAND_DDRCLK100_defconfig
configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
configs/BSC9132QDS_NAND_DDRCLK133_defconfig
configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
configs/BSC9132QDS_NOR_DDRCLK100_defconfig
configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
configs/BSC9132QDS_NOR_DDRCLK133_defconfig
configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
configs/C29XPCIE_NAND_defconfig
configs/C29XPCIE_NOR_SECBOOT_defconfig
configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
configs/C29XPCIE_SPIFLASH_defconfig
configs/C29XPCIE_defconfig
configs/Cyrus_P5020_defconfig
configs/Cyrus_P5040_defconfig
configs/MPC8308RDB_defconfig
configs/MPC8313ERDB_33_defconfig
configs/MPC8313ERDB_66_defconfig
configs/MPC8313ERDB_NAND_33_defconfig
configs/MPC8313ERDB_NAND_66_defconfig
configs/MPC8315ERDB_defconfig
configs/MPC8349EMDS_defconfig
configs/MPC8349ITXGP_defconfig
configs/MPC8349ITX_LOWBOOT_defconfig
configs/MPC8349ITX_defconfig
configs/MPC837XEMDS_HOST_defconfig
configs/MPC837XEMDS_defconfig
configs/MPC837XERDB_defconfig
configs/MPC8536DS_36BIT_defconfig
configs/MPC8536DS_SDCARD_defconfig
configs/MPC8536DS_SPIFLASH_defconfig
configs/MPC8536DS_defconfig
configs/MPC8541CDS_defconfig
configs/MPC8541CDS_legacy_defconfig
configs/MPC8544DS_defconfig
configs/MPC8548CDS_36BIT_defconfig
configs/MPC8548CDS_defconfig
configs/MPC8548CDS_legacy_defconfig
configs/MPC8555CDS_defconfig
configs/MPC8555CDS_legacy_defconfig
configs/MPC8568MDS_defconfig
configs/MPC8572DS_36BIT_defconfig
configs/MPC8572DS_defconfig
configs/MPC8641HPCN_36BIT_defconfig
configs/MPC8641HPCN_defconfig
configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
configs/P1010RDB-PA_36BIT_NAND_defconfig
configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
configs/P1010RDB-PA_36BIT_NOR_defconfig
configs/P1010RDB-PA_36BIT_SDCARD_defconfig
configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
configs/P1010RDB-PA_NAND_SECBOOT_defconfig
configs/P1010RDB-PA_NAND_defconfig
configs/P1010RDB-PA_NOR_SECBOOT_defconfig
configs/P1010RDB-PA_NOR_defconfig
configs/P1010RDB-PA_SDCARD_defconfig
configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
configs/P1010RDB-PA_SPIFLASH_defconfig
configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
configs/P1010RDB-PB_36BIT_NAND_defconfig
configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
configs/P1010RDB-PB_36BIT_NOR_defconfig
configs/P1010RDB-PB_36BIT_SDCARD_defconfig
configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
configs/P1010RDB-PB_NAND_SECBOOT_defconfig
configs/P1010RDB-PB_NAND_defconfig
configs/P1010RDB-PB_NOR_SECBOOT_defconfig
configs/P1010RDB-PB_NOR_defconfig
configs/P1010RDB-PB_SDCARD_defconfig
configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
configs/P1010RDB-PB_SPIFLASH_defconfig
configs/P1020MBG-PC_36BIT_SDCARD_defconfig
configs/P1020MBG-PC_36BIT_defconfig
configs/P1020MBG-PC_SDCARD_defconfig
configs/P1020MBG-PC_defconfig
configs/P1020RDB-PC_36BIT_NAND_defconfig
configs/P1020RDB-PC_36BIT_SDCARD_defconfig
configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
configs/P1020RDB-PC_36BIT_defconfig
configs/P1020RDB-PC_NAND_defconfig
configs/P1020RDB-PC_SDCARD_defconfig
configs/P1020RDB-PC_SPIFLASH_defconfig
configs/P1020RDB-PC_defconfig
configs/P1020RDB-PD_NAND_defconfig
configs/P1020RDB-PD_SDCARD_defconfig
configs/P1020RDB-PD_SPIFLASH_defconfig
configs/P1020RDB-PD_defconfig
configs/P1020UTM-PC_36BIT_SDCARD_defconfig
configs/P1020UTM-PC_36BIT_defconfig
configs/P1020UTM-PC_SDCARD_defconfig
configs/P1020UTM-PC_defconfig
configs/P1021RDB-PC_36BIT_NAND_defconfig
configs/P1021RDB-PC_36BIT_SDCARD_defconfig
configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
configs/P1021RDB-PC_36BIT_defconfig
configs/P1021RDB-PC_NAND_defconfig
configs/P1021RDB-PC_SDCARD_defconfig
configs/P1021RDB-PC_SPIFLASH_defconfig
configs/P1021RDB-PC_defconfig
configs/P1022DS_36BIT_NAND_defconfig
configs/P1022DS_36BIT_SDCARD_defconfig
configs/P1022DS_36BIT_SPIFLASH_defconfig
configs/P1022DS_36BIT_defconfig
configs/P1022DS_NAND_defconfig
configs/P1022DS_SDCARD_defconfig
configs/P1022DS_SPIFLASH_defconfig
configs/P1022DS_defconfig
configs/P1023RDB_defconfig
configs/P1024RDB_36BIT_defconfig
configs/P1024RDB_NAND_defconfig
configs/P1024RDB_SDCARD_defconfig
configs/P1024RDB_SPIFLASH_defconfig
configs/P1024RDB_defconfig
configs/P1025RDB_36BIT_defconfig
configs/P1025RDB_NAND_defconfig
configs/P1025RDB_SDCARD_defconfig
configs/P1025RDB_SPIFLASH_defconfig
configs/P1025RDB_defconfig
configs/P2020RDB-PC_36BIT_NAND_defconfig
configs/P2020RDB-PC_36BIT_SDCARD_defconfig
configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
configs/P2020RDB-PC_36BIT_defconfig
configs/P2020RDB-PC_NAND_defconfig
configs/P2020RDB-PC_SDCARD_defconfig
configs/P2020RDB-PC_SPIFLASH_defconfig
configs/P2020RDB-PC_defconfig
configs/P2041RDB_NAND_defconfig
configs/P2041RDB_SDCARD_defconfig
configs/P2041RDB_SECURE_BOOT_defconfig
configs/P2041RDB_SPIFLASH_defconfig
configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
configs/P2041RDB_defconfig
configs/P3041DS_NAND_SECURE_BOOT_defconfig
configs/P3041DS_NAND_defconfig
configs/P3041DS_SDCARD_defconfig
configs/P3041DS_SECURE_BOOT_defconfig
configs/P3041DS_SPIFLASH_defconfig
configs/P3041DS_SRIO_PCIE_BOOT_defconfig
configs/P3041DS_defconfig
configs/P4080DS_SDCARD_defconfig
configs/P4080DS_SECURE_BOOT_defconfig
configs/P4080DS_SPIFLASH_defconfig
configs/P4080DS_SRIO_PCIE_BOOT_defconfig
configs/P4080DS_defconfig
configs/P5020DS_NAND_SECURE_BOOT_defconfig
configs/P5020DS_NAND_defconfig
configs/P5020DS_SDCARD_defconfig
configs/P5020DS_SECURE_BOOT_defconfig
configs/P5020DS_SPIFLASH_defconfig
configs/P5020DS_SRIO_PCIE_BOOT_defconfig
configs/P5020DS_defconfig
configs/P5040DS_NAND_SECURE_BOOT_defconfig
configs/P5040DS_NAND_defconfig
configs/P5040DS_SDCARD_defconfig
configs/P5040DS_SECURE_BOOT_defconfig
configs/P5040DS_SPIFLASH_defconfig
configs/P5040DS_defconfig
configs/T1023RDB_NAND_defconfig
configs/T1023RDB_SDCARD_defconfig
configs/T1023RDB_SECURE_BOOT_defconfig
configs/T1023RDB_SPIFLASH_defconfig
configs/T1023RDB_defconfig
configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
configs/T1024QDS_DDR4_defconfig
configs/T1024QDS_NAND_defconfig
configs/T1024QDS_SDCARD_defconfig
configs/T1024QDS_SECURE_BOOT_defconfig
configs/T1024QDS_SPIFLASH_defconfig
configs/T1024QDS_defconfig
configs/T1024RDB_NAND_defconfig
configs/T1024RDB_SDCARD_defconfig
configs/T1024RDB_SECURE_BOOT_defconfig
configs/T1024RDB_SPIFLASH_defconfig
configs/T1024RDB_defconfig
configs/T1040D4RDB_NAND_defconfig
configs/T1040D4RDB_SDCARD_defconfig
configs/T1040D4RDB_SECURE_BOOT_defconfig
configs/T1040D4RDB_SPIFLASH_defconfig
configs/T1040D4RDB_defconfig
configs/T1040QDS_DDR4_defconfig
configs/T1040QDS_SECURE_BOOT_defconfig
configs/T1040QDS_defconfig
configs/T1040RDB_NAND_defconfig
configs/T1040RDB_SDCARD_defconfig
configs/T1040RDB_SECURE_BOOT_defconfig
configs/T1040RDB_SPIFLASH_defconfig
configs/T1040RDB_defconfig
configs/T1042D4RDB_NAND_defconfig
configs/T1042D4RDB_SDCARD_defconfig
configs/T1042D4RDB_SECURE_BOOT_defconfig
configs/T1042D4RDB_SPIFLASH_defconfig
configs/T1042D4RDB_defconfig
configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
configs/T1042RDB_PI_NAND_defconfig
configs/T1042RDB_PI_SDCARD_defconfig
configs/T1042RDB_PI_SPIFLASH_defconfig
configs/T1042RDB_PI_defconfig
configs/T1042RDB_SECURE_BOOT_defconfig
configs/T1042RDB_defconfig
configs/T2080QDS_NAND_defconfig
configs/T2080QDS_SDCARD_defconfig
configs/T2080QDS_SECURE_BOOT_defconfig
configs/T2080QDS_SPIFLASH_defconfig
configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
configs/T2080QDS_defconfig
configs/T2080RDB_NAND_defconfig
configs/T2080RDB_SDCARD_defconfig
configs/T2080RDB_SECURE_BOOT_defconfig
configs/T2080RDB_SPIFLASH_defconfig
configs/T2080RDB_SRIO_PCIE_BOOT_defconfig
configs/T2080RDB_defconfig
configs/T2081QDS_NAND_defconfig
configs/T2081QDS_SDCARD_defconfig
configs/T2081QDS_SPIFLASH_defconfig
configs/T2081QDS_SRIO_PCIE_BOOT_defconfig
configs/T2081QDS_defconfig
configs/T4160QDS_NAND_defconfig
configs/T4160QDS_SDCARD_defconfig
configs/T4160QDS_SECURE_BOOT_defconfig
configs/T4160QDS_defconfig
configs/T4160RDB_defconfig
configs/T4240QDS_NAND_defconfig
configs/T4240QDS_SDCARD_defconfig
configs/T4240QDS_SECURE_BOOT_defconfig
configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
configs/T4240QDS_defconfig
configs/T4240RDB_SDCARD_defconfig
configs/T4240RDB_defconfig
configs/TQM834x_defconfig
configs/TWR-P1025_defconfig
configs/UCP1020_SPIFLASH_defconfig
configs/UCP1020_defconfig
configs/alt_defconfig
configs/am335x_baltos_defconfig
configs/am335x_boneblack_defconfig
configs/am335x_boneblack_vboot_defconfig
configs/am335x_evm_defconfig
configs/am335x_evm_nor_defconfig
configs/am335x_evm_norboot_defconfig
configs/am335x_evm_spiboot_defconfig
configs/am335x_evm_usbspl_defconfig
configs/am335x_hs_evm_defconfig
configs/am335x_igep003x_defconfig
configs/am335x_shc_defconfig
configs/am335x_shc_ict_defconfig
configs/am335x_shc_netboot_defconfig
configs/am335x_shc_prompt_defconfig
configs/am335x_shc_sdboot_defconfig
configs/am335x_shc_sdboot_prompt_defconfig
configs/am335x_sl50_defconfig
configs/am43xx_evm_defconfig
configs/am43xx_evm_ethboot_defconfig
configs/am43xx_evm_qspiboot_defconfig
configs/am43xx_evm_usbhost_boot_defconfig
configs/am43xx_hs_evm_defconfig
configs/am57xx_evm_defconfig
configs/am57xx_evm_nodt_defconfig
configs/am57xx_hs_evm_defconfig
configs/ap_sh4a_4a_defconfig
configs/apalis_imx6_defconfig
configs/apalis_imx6_nospl_com_defconfig
configs/apalis_imx6_nospl_it_defconfig
configs/aristainetos2_defconfig
configs/aristainetos2b_defconfig
configs/aristainetos_defconfig
configs/armadillo-800eva_defconfig
configs/axm_defconfig
configs/axs101_defconfig
configs/axs103_defconfig
configs/bcm28155_w1d_defconfig
configs/bcm911360_entphn-ns_defconfig
configs/bcm911360_entphn_defconfig
configs/bcm911360k_defconfig
configs/bcm958300k-ns_defconfig
configs/bcm958300k_defconfig
configs/bcm958305k_defconfig
configs/birdland_bav335a_defconfig
configs/birdland_bav335b_defconfig
configs/bk4r1_defconfig
configs/brppt1_mmc_defconfig
configs/brppt1_nand_defconfig
configs/brppt1_spi_defconfig
configs/brxre1_defconfig
configs/cgtqmx6eval_defconfig
configs/chiliboard_defconfig
configs/cl-som-am57x_defconfig
configs/clearfog_defconfig
configs/cm_fx6_defconfig
configs/cm_t335_defconfig
configs/cm_t43_defconfig
configs/colibri_imx6_defconfig
configs/colibri_imx6_nospl_defconfig
configs/colibri_imx7_defconfig
configs/colibri_vf_defconfig
configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
configs/controlcenterd_36BIT_SDCARD_defconfig
configs/controlcenterdc_defconfig
configs/corvus_defconfig
configs/db-88f6720_defconfig
configs/db-88f6820-amc_defconfig
configs/db-88f6820-gp_defconfig
configs/db-mv784mp-gp_defconfig
configs/devkit3250_defconfig
configs/dms-ba16-1g_defconfig
configs/dms-ba16_defconfig
configs/dra7xx_evm_defconfig
configs/dra7xx_hs_evm_defconfig
configs/draco_defconfig
configs/ds414_defconfig
configs/ecovec_defconfig
configs/espt_defconfig
configs/etamin_defconfig
configs/evb-rk3288_defconfig
configs/evb-rk3399_defconfig
configs/flea3_defconfig
configs/gose_defconfig
configs/gurnard_defconfig
configs/hrcon_defconfig
configs/hrcon_dh_defconfig
configs/ids8313_defconfig
configs/imx6q_logic_defconfig
configs/k2e_evm_defconfig
configs/k2e_hs_evm_defconfig
configs/k2g_evm_defconfig
configs/k2g_hs_evm_defconfig
configs/k2hk_evm_defconfig
configs/k2hk_hs_evm_defconfig
configs/k2l_evm_defconfig
configs/kmcoge4_defconfig
configs/kmlion1_defconfig
configs/koelsch_defconfig
configs/lager_defconfig
configs/liteboard_defconfig
configs/ls1021aiot_qspi_defconfig
configs/ls1021aiot_sdcard_defconfig
configs/ls1021aqds_ddr4_nor_defconfig
configs/ls1021aqds_ddr4_nor_lpuart_defconfig
configs/ls1021aqds_nand_defconfig
configs/ls1021aqds_nor_SECURE_BOOT_defconfig
configs/ls1021aqds_nor_defconfig
configs/ls1021aqds_nor_lpuart_defconfig
configs/ls1021aqds_qspi_defconfig
configs/ls1021aqds_sdcard_ifc_defconfig
configs/ls1021aqds_sdcard_qspi_defconfig
configs/ls1021atwr_nor_SECURE_BOOT_defconfig
configs/ls1021atwr_nor_defconfig
configs/ls1021atwr_nor_lpuart_defconfig
configs/ls1021atwr_qspi_defconfig
configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
configs/ls1021atwr_sdcard_ifc_defconfig
configs/ls1021atwr_sdcard_qspi_defconfig
configs/ls1043aqds_defconfig
configs/ls1043aqds_lpuart_defconfig
configs/ls1043aqds_nand_defconfig
configs/ls1043aqds_nor_ddr3_defconfig
configs/ls1043aqds_qspi_defconfig
configs/ls1043aqds_sdcard_ifc_defconfig
configs/ls1043aqds_sdcard_qspi_defconfig
configs/ls1043ardb_SECURE_BOOT_defconfig
configs/ls1043ardb_defconfig
configs/ls1043ardb_nand_SECURE_BOOT_defconfig
configs/ls1043ardb_nand_defconfig
configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
configs/ls1043ardb_sdcard_defconfig
configs/ls1046aqds_SECURE_BOOT_defconfig
configs/ls1046aqds_defconfig
configs/ls1046aqds_lpuart_defconfig
configs/ls1046aqds_nand_defconfig
configs/ls1046aqds_qspi_defconfig
configs/ls1046aqds_sdcard_ifc_defconfig
configs/ls1046aqds_sdcard_qspi_defconfig
configs/ls1046ardb_emmc_defconfig
configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
configs/ls1046ardb_qspi_defconfig
configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
configs/ls1046ardb_sdcard_defconfig
configs/ls2080aqds_SECURE_BOOT_defconfig
configs/ls2080aqds_defconfig
configs/ls2080aqds_nand_defconfig
configs/ls2080aqds_qspi_defconfig
configs/ls2080aqds_sdcard_defconfig
configs/ls2080ardb_SECURE_BOOT_defconfig
configs/ls2080ardb_defconfig
configs/ls2080ardb_nand_defconfig
configs/ls2081ardb_defconfig
configs/ls2088ardb_qspi_defconfig
configs/m53evk_defconfig
configs/marsboard_defconfig
configs/maxbcm_defconfig
configs/mccmon6_nor_defconfig
configs/mccmon6_sd_defconfig
configs/microblaze-generic_defconfig
configs/mpc8308_p1m_defconfig
configs/mvebu_db-88f3720_defconfig
configs/mvebu_db_armada8k_defconfig
configs/mvebu_espressobin-88f3720_defconfig
configs/mvebu_mcbin-88f8040_defconfig
configs/mx6cuboxi_defconfig
configs/mx6qsabrelite_defconfig
configs/mx6sabreauto_defconfig
configs/mx6sabresd_defconfig
configs/mx6slevk_defconfig
configs/mx6slevk_spinor_defconfig
configs/mx6slevk_spl_defconfig
configs/mx6sxsabreauto_defconfig
configs/mx6sxsabresd_defconfig
configs/mx6sxsabresd_spl_defconfig
configs/mx6ul_14x14_evk_defconfig
configs/mx6ul_9x9_evk_defconfig
configs/mx7dsabresd_defconfig
configs/mx7dsabresd_secure_defconfig
configs/nitrogen6dl2g_defconfig
configs/nitrogen6dl_defconfig
configs/nitrogen6q2g_defconfig
configs/nitrogen6q_defconfig
configs/nitrogen6s1g_defconfig
configs/nitrogen6s_defconfig
configs/novena_defconfig
configs/ot1200_defconfig
configs/ot1200_spl_defconfig
configs/pcm051_rev1_defconfig
configs/pcm051_rev3_defconfig
configs/pcm052_defconfig
configs/pcm058_defconfig
configs/pengwyn_defconfig
configs/pepper_defconfig
configs/pico-imx6ul_defconfig
configs/pico-imx7d_defconfig
configs/platinum_picon_defconfig
configs/platinum_titanium_defconfig
configs/porter_defconfig
configs/pxm2_defconfig
configs/r0p7734_defconfig
configs/r8a7795_salvator-x_defconfig
configs/r8a7796_salvator-x_defconfig
configs/rastaban_defconfig
configs/riotboard_defconfig
configs/rut_defconfig
configs/sbc8349_PCI_33_defconfig
configs/sbc8349_PCI_66_defconfig
configs/sbc8349_defconfig
configs/sbc8548_PCI_33_PCIE_defconfig
configs/sbc8548_PCI_33_defconfig
configs/sbc8548_PCI_66_PCIE_defconfig
configs/sbc8548_PCI_66_defconfig
configs/sbc8548_defconfig
configs/sbc8641d_defconfig
configs/sc_sps_1_defconfig
configs/secomx6quq7_defconfig
configs/sh7752evb_defconfig
configs/sh7753evb_defconfig
configs/sh7757lcr_defconfig
configs/sh7763rdp_defconfig
configs/silk_defconfig
configs/smartweb_defconfig
configs/socfpga_arria5_defconfig
configs/socfpga_cyclone5_defconfig
configs/socfpga_de0_nano_soc_defconfig
configs/socfpga_de10_nano_defconfig
configs/socfpga_de1_soc_defconfig
configs/socfpga_is1_defconfig
configs/socfpga_mcvevk_defconfig
configs/socfpga_sockit_defconfig
configs/socfpga_socrates_defconfig
configs/socfpga_sr1500_defconfig
configs/socfpga_vining_fpga_defconfig
configs/socrates_defconfig
configs/spear300_defconfig
configs/spear300_nand_defconfig
configs/spear300_usbtty_defconfig
configs/spear300_usbtty_nand_defconfig
configs/spear310_defconfig
configs/spear310_nand_defconfig
configs/spear310_pnor_defconfig
configs/spear310_usbtty_defconfig
configs/spear310_usbtty_nand_defconfig
configs/spear310_usbtty_pnor_defconfig
configs/spear320_defconfig
configs/spear320_nand_defconfig
configs/spear320_pnor_defconfig
configs/spear320_usbtty_defconfig
configs/spear320_usbtty_nand_defconfig
configs/spear320_usbtty_pnor_defconfig
configs/spear600_defconfig
configs/spear600_nand_defconfig
configs/spear600_usbtty_defconfig
configs/spear600_usbtty_nand_defconfig
configs/stout_defconfig
configs/strider_con_defconfig
configs/strider_con_dp_defconfig
configs/strider_cpu_defconfig
configs/strider_cpu_dp_defconfig
configs/stv0991_defconfig
configs/taurus_defconfig
configs/tb100_defconfig
configs/tbs2910_defconfig
configs/theadorable_debug_defconfig
configs/thuban_defconfig
configs/ti814x_evm_defconfig
configs/titanium_defconfig
configs/tplink_wdr4300_defconfig
configs/tqma6dl_mba6_mmc_defconfig
configs/tqma6dl_mba6_spi_defconfig
configs/tqma6q_mba6_mmc_defconfig
configs/tqma6q_mba6_spi_defconfig
configs/tqma6s_mba6_mmc_defconfig
configs/tqma6s_mba6_spi_defconfig
configs/tqma6s_wru4_mmc_defconfig
configs/ts4800_defconfig
configs/turris_omnia_defconfig
configs/udoo_defconfig
configs/udoo_neo_defconfig
configs/ve8313_defconfig
configs/vf610twr_defconfig
configs/vf610twr_nand_defconfig
configs/vining_2000_defconfig
configs/vme8349_defconfig
configs/wandboard_defconfig
configs/woodburn_defconfig
configs/woodburn_sd_defconfig
configs/work_92105_defconfig
configs/x600_defconfig
configs/xilinx_zynqmp_ep_defconfig
configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
configs/xilinx_zynqmp_zcu102_revA_defconfig
configs/xilinx_zynqmp_zcu102_revB_defconfig
configs/xpedite517x_defconfig
configs/xpedite520x_defconfig
configs/xpedite537x_defconfig
configs/xpedite550x_defconfig
configs/xpress_defconfig
configs/xpress_spl_defconfig
configs/zc5601_defconfig
drivers/net/Kconfig
drivers/net/ag7xxx.c
drivers/net/bcm-sf2-eth.h
drivers/net/phy/Kconfig
drivers/net/phy/Makefile
drivers/net/phy/broadcom.c
drivers/net/phy/fixed.c
drivers/net/phy/micrel_ksz8xxx.c [new file with mode: 0644]
drivers/net/phy/micrel_ksz90x1.c [moved from drivers/net/phy/micrel.c with 62% similarity]
drivers/net/phy/phy.c
drivers/usb/eth/r8152.c
drivers/video/Kconfig
drivers/video/Makefile
drivers/video/cfb_console.c
drivers/video/ct69000.c [deleted file]
drivers/video/l5f31188.c [deleted file]
drivers/video/rockchip/Makefile
drivers/video/rockchip/rk3288_mipi.c [new file with mode: 0644]
drivers/video/rockchip/rk3399_mipi.c [new file with mode: 0644]
drivers/video/rockchip/rk_mipi.c
drivers/video/rockchip/rk_mipi.h [new file with mode: 0644]
drivers/video/sed156x.c [deleted file]
drivers/video/sm501.c [deleted file]
include/config_phylib_all_drivers.h
include/configs/10m50_devboard.h
include/configs/3c120_devboard.h
include/configs/B4860QDS.h
include/configs/BSC9131RDB.h
include/configs/BSC9132QDS.h
include/configs/C29XPCIE.h
include/configs/MPC8349ITX.h
include/configs/MPC8536DS.h
include/configs/MPC8544DS.h
include/configs/MPC8548CDS.h
include/configs/MPC8572DS.h
include/configs/P1010RDB.h
include/configs/P1022DS.h
include/configs/P1023RDB.h
include/configs/P2041RDB.h
include/configs/T102xQDS.h
include/configs/T102xRDB.h
include/configs/T1040QDS.h
include/configs/T104xRDB.h
include/configs/T208xQDS.h
include/configs/T208xRDB.h
include/configs/T4240QDS.h
include/configs/T4240RDB.h
include/configs/UCP1020.h
include/configs/advantech_dms-ba16.h
include/configs/alt.h
include/configs/am335x_evm.h
include/configs/am335x_igep003x.h
include/configs/am335x_shc.h
include/configs/am335x_sl50.h
include/configs/am43xx_evm.h
include/configs/am57xx_evm.h
include/configs/ap_sh4a_4a.h
include/configs/apalis_imx6.h
include/configs/aristainetos-common.h
include/configs/aristainetos2.h
include/configs/aristainetos2b.h
include/configs/armadillo-800eva.h
include/configs/axs10x.h
include/configs/baltos.h
include/configs/bav335x.h
include/configs/bur_am335x_common.h
include/configs/cgtqmx6eval.h
include/configs/chiliboard.h
include/configs/cl-som-am57x.h
include/configs/cm_fx6.h
include/configs/cm_t335.h
include/configs/cm_t43.h
include/configs/colibri_imx6.h
include/configs/colibri_imx7.h
include/configs/colibri_vf.h
include/configs/controlcenterd.h
include/configs/corenet_ds.h
include/configs/corvus.h
include/configs/cyrus.h
include/configs/devkit3250.h
include/configs/dra7xx_evm.h
include/configs/draco.h
include/configs/ecovec.h
include/configs/embestmx6boards.h
include/configs/espt.h
include/configs/etamin.h
include/configs/flea3.h
include/configs/ge_bx50v3.h
include/configs/gose.h
include/configs/imx6_logic.h
include/configs/k2g_evm.h
include/configs/km/kmp204x-common.h
include/configs/koelsch.h
include/configs/lager.h
include/configs/liteboard.h
include/configs/ls1021aiot.h
include/configs/ls1021aqds.h
include/configs/ls1021atwr.h
include/configs/ls1043aqds.h
include/configs/ls1043ardb.h
include/configs/ls1046aqds.h
include/configs/ls1046ardb.h
include/configs/ls2080aqds.h
include/configs/ls2080ardb.h
include/configs/m53evk.h
include/configs/mccmon6.h
include/configs/microblaze-generic.h
include/configs/mvebu_armada-37xx.h
include/configs/mvebu_armada-8k.h
include/configs/mx6cuboxi.h
include/configs/mx6sabre_common.h
include/configs/mx6slevk.h
include/configs/mx6sxsabreauto.h
include/configs/mx6sxsabresd.h
include/configs/mx6ul_14x14_evk.h
include/configs/mx7dsabresd.h
include/configs/nitrogen6x.h
include/configs/novena.h
include/configs/nsa310s.h
include/configs/ot1200.h
include/configs/p1_p2_rdb_pc.h
include/configs/p1_twr.h
include/configs/pcm051.h
include/configs/pcm052.h
include/configs/pcm058.h
include/configs/pengwyn.h
include/configs/pepper.h
include/configs/pico-imx6ul.h
include/configs/pico-imx7d.h
include/configs/platinum.h
include/configs/platinum_titanium.h
include/configs/porter.h
include/configs/r0p7734.h
include/configs/rastaban.h
include/configs/s32v234evb.h
include/configs/salvator-x.h
include/configs/sama5d3xek.h
include/configs/sbc8548.h
include/configs/sc_sps_1.h
include/configs/secomx6quq7.h
include/configs/sh7752evb.h
include/configs/sh7753evb.h
include/configs/sh7757lcr.h
include/configs/sh7763rdp.h
include/configs/siemens-am33x-common.h
include/configs/silk.h
include/configs/smartweb.h
include/configs/snapper9g45.h
include/configs/socfpga_arria10_socdk.h
include/configs/socfpga_arria5_socdk.h
include/configs/socfpga_common.h
include/configs/socfpga_cyclone5_socdk.h
include/configs/socfpga_de0_nano_soc.h
include/configs/socfpga_de10_nano.h
include/configs/socfpga_de1_soc.h
include/configs/socfpga_is1.h
include/configs/socfpga_sockit.h
include/configs/socfpga_socrates.h
include/configs/socfpga_vining_fpga.h
include/configs/socrates.h
include/configs/spear-common.h
include/configs/stout.h
include/configs/stv0991.h
include/configs/sunxi-common.h
include/configs/t4qds.h
include/configs/taurus.h
include/configs/tb100.h
include/configs/tbs2910.h
include/configs/thuban.h
include/configs/ti814x_evm.h
include/configs/ti_armv7_keystone2.h
include/configs/titanium.h
include/configs/tplink_wdr4300.h
include/configs/tqma6.h
include/configs/tqma6_mba6.h
include/configs/ts4800.h
include/configs/udoo.h
include/configs/udoo_neo.h
include/configs/vf610twr.h
include/configs/vining_2000.h
include/configs/wandboard.h
include/configs/woodburn_common.h
include/configs/work_92105.h
include/configs/x600.h
include/configs/xilinx_zynqmp.h
include/configs/xpedite517x.h
include/configs/xpedite520x.h
include/configs/xpedite537x.h
include/configs/xpedite550x.h
include/configs/xpress.h
include/configs/zc5601.h
include/net.h
include/phy.h
include/sed156x.h [deleted file]
include/sm501.h [deleted file]
net/bootp.h
net/dns.h
net/net.c
net/net_rand.h
net/nfs.h
net/sntp.h
net/tftp.c
scripts/config_whitelist.txt

diff --git a/README b/README
index 1edf3dbbd83bbc38587a13b5529d3e12f3631895..3735916314db616e50754e1b7ac6be5f62206ab2 100644 (file)
--- a/README
+++ b/README
@@ -1627,11 +1627,6 @@ The following options need to be configured:
 
                The clock frequency of the MII bus
 
-               CONFIG_PHY_GIGE
-
-               If this option is set, support for speed/duplex
-               detection of gigabit PHY is included.
-
                CONFIG_PHY_RESET_DELAY
 
                Some PHY like Intel LXT971A need extra delay after
index 7f6ab4ac7e6e77238019e146bc1b571bbfc83446..9cfeedeebd95e02c042f5a503246027ce7084c3d 100644 (file)
@@ -523,6 +523,9 @@ config TARGET_BCMCYGNUS
        imply CMD_HASH
        imply FAT_WRITE
        imply HASH_VERIFY
+       imply NETDEVICES
+       imply BCM_SF2_ETH
+       imply BCM_SF2_ETH_GMAC
 
 config TARGET_BCMNSP
        bool "Support bcmnsp"
index af7f3bff57ac0287bcfc2c0eb1830cd15f81c9c7..92b1c5e2d671b54693a32d52716a688e8b9bf14b 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright 2014 Broadcom Corporation.
+ * Copyright 2014-2017 Broadcom.
  *
  * SPDX-License-Identifier:    GPL-2.0+
  */
 #define CONFIG_SYS_NS16550_COM3                0x18023000
 
 /* Ethernet */
-#define CONFIG_BCM_SF2_ETH
-#define CONFIG_BCM_SF2_ETH_GMAC
-
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_BROADCOM
 #define CONFIG_PHY_RESET_DELAY 10000 /* PHY reset delay in us*/
 
index 1b35e0802b240c19509dc2ae956049b1f228ae48..2dc9b1dea3032d53819f46df34e10dae6bf6a208 100644 (file)
 #define CONFIG_MII             /* expose smi ove miiphy interface */
 #if !defined(CONFIG_ARMADA_375)
 #define CONFIG_MVNETA          /* Enable Marvell Gbe Controller Driver */
-#define CONFIG_PHYLIB
 #endif
 #define CONFIG_ENV_OVERWRITE   /* ethaddr can be reprogrammed */
-#define CONFIG_PHY_GIGE                /* GbE speed/duplex detect */
 #define CONFIG_ARP_TIMEOUT     200
 #define CONFIG_NET_RETRY_COUNT 50
 #endif /* CONFIG_CMD_NET */
index eaa23d2edf468c279387049b95561ba1e018be9c..6aec815c712fc1acee3025a13ccbc180371e68ae 100644 (file)
 /* The TSEC driver uses the PHYLIB infrastructure */
 #ifndef CONFIG_PHYLIB
 #if defined(CONFIG_TSEC_ENET)
-#define CONFIG_PHYLIB
-
 #include <config_phylib_all_drivers.h>
 #endif /* TSEC_ENET */
 #endif /* !CONFIG_PHYLIB */
 
 /* The FMAN driver uses the PHYLIB infrastructure */
-#if defined(CONFIG_FMAN_ENET)
-#define CONFIG_PHYLIB
-#endif
 
 /* All PPC boards must swap IDE bytes */
 #define CONFIG_IDE_SWAP_IO
index df8b6c9b53f09e5dfb2aae6ce05ab871de22dab0..5e91d3ab8a19584bc404f8117518b5dbb20fbac5 100644 (file)
--- a/cmd/net.c
+++ b/cmd/net.c
@@ -42,7 +42,7 @@ U_BOOT_CMD(
 );
 
 #ifdef CONFIG_CMD_TFTPPUT
-int do_tftpput(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_tftpput(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
        return netboot_common(TFTPPUT, cmdtp, argc, argv);
 }
index 465edc5b50d34cd24ca5a57fdc9e4bc6351e0cc5..7cb9ffb135181bb75350fad5974cb4d8a62e718b 100644 (file)
@@ -27,6 +27,7 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_ALTERA_QSPI=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_ALTERA_TSE=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
index 601b0b5ef5af09973384b6429a339db7a26f707e..df744ea3d42a1474e318e9cd7e907f7c22aee9d0 100644 (file)
@@ -27,6 +27,7 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_ALTERA_TSE=y
 CONFIG_DM_SERIAL=y
 CONFIG_ALTERA_JTAG_UART=y
index e078adde44167c6214bf32be229b282cb417c502..16c34c01fd7e2c2b972c1595b4c2249cb1ff6d90 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index eb2154175897ac0f32b927a24a1170fac09efa32..e8fa408cdfe32696aaeb748d175e30a3e5c1eaa3 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 074e94d7a5f8cb99672b42954d2749cc119928ef..8389bb1d24869386d25765f4cbe5cfad5654e726 100644 (file)
@@ -23,7 +23,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index d90be54b90fb95aca8704d924ca91cd70fa7bd8f..4e30b98a684992e5a38bd947c60cd9b87e30d69f 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index e679d0a618bd24315af9e0f283bf482c8290e7f8..43bb4e56bacc51ba0a17571fa777e8f5b3875050 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index e66c7d0e4c673bafd3180956a580c7a9457d5648..925ff7808b135dd662efb090d2e05eec95d26ce2 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 21bcae4d84d73e95157df0298984c193e6e78443..f21c6ec673aea67b55872bb3ab6f3904ef2a38db 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_FSL_CAAM=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 2452337a90acb275ae6313767db943926d1103dd..3f2876c7c4fb0e02de707309e7d74ac5b10b8f38 100644 (file)
@@ -23,7 +23,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 12a242f185042f19b3cbc4ffb2c1721483e9394b..6e8ab27d3b849db5e665d094a58a458c7d421f33 100644 (file)
@@ -28,6 +28,7 @@ CONFIG_FSL_CAAM=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 6c823462c1bdc283629acae772cb52cb5b7ec9d2..577e3aee9f532e7b906ed4bf9f96e40f593db9b1 100644 (file)
@@ -28,6 +28,7 @@ CONFIG_FSL_CAAM=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 073317bad0b7a64104f2b5886a3a2c37d84c971b..7f6186d0240847d99c9660481399bc0825993780 100644 (file)
@@ -25,6 +25,7 @@ CONFIG_FSL_CAAM=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 49026c150bdb94c2294a3e27d79f9e54c03b3e74..f12677a977d5487fe330edff5c60e71e06fbbd92 100644 (file)
@@ -25,6 +25,7 @@ CONFIG_FSL_CAAM=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index aea470cfbee95322116836d518cdc9bc4a934acc..78f33206e16afb3850564f3af98e50807d001e8a 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index a40e9bbdfeffbb1ea2908a0ca8955ad535daabb1..801468ce287d9e74c4cc90f54da8d30d1f2cab76 100644 (file)
@@ -27,7 +27,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 51e19946d8ed6cdfb75e6c79ea198382e60f103e..f0c2c900b29c8643cce58a8043b002da87f8d42f 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 0e5a1c43cf9df7e9c6e02a7bbbb4e91dbab3d61d..08554ca2927ac78667b704d53017ecb1fde373ff 100644 (file)
@@ -27,7 +27,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index cea3cb44b873d308db5a1dd0d572a29968307bc8..c60040967c4292441981a743950ff8a12c7ba4ae 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index eeb28b184d57881b7e4d388bcc2787b82508e00f..9b64e7c6bb5c11c20aa3ec254caccf38a0bb1d2d 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index c5642abd904398bb23ca2b49ad189d09e1ebd691..e12dce4c49317054e90845468cb6fca309f86df4 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 98d92e70566b41908a82980e59c067c44ecba3a1..ffd88abd306a9df710439dded8d02633385e70dc 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index e8c548286b0565be025c9510cf57f0a055b25638..4e5d8de4f6039e6f66ba9b0139810cce8865ae09 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index d6cffb2082209e746e78a55a8b45393610ad31fc..039973efaa27b4184cabc97d5dc1c962561674cf 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 3afb011012d88a39b378f3d94870ab7fe232721f..8a5cb5d8cd714f349dbe27fddc982f7928a07e6d 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index ec389d0d78007407211518263ac457c1202b1e16..5c8d26c9e8825a013fe1ed5735a33256a2d4dcc6 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index c5d17bc51629f0cdcfe0b464d9959df2db288f39..0c620f4222055eb98438477ab5a0998509344a70 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index b8e90a2f3de10591cba2eae83bc7b2cd54109884..8a647a9c65c3498d65b6df8e64673b3da2c01d74 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index ba0772c07dd7bda53a002f1c68324fa7aca02ff0..07b70caec3cdd46dd7d1abd0f88e3329742e18ab 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 29e4f7b373886dfe7a87dc8150e3f3c04cf84151..340ccad82927c12671fa395060600116354db7e9 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index dcfbbf64f02b909835555bbab760d5b870c0c544..c1b4998ec24f5467ed4be3474443cbcc230bd875 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 99e2b33ac7719431a31efa04cafb72cace939527..13982c766c01d091800c6d4c0fc75c85e4b256a8 100644 (file)
@@ -22,7 +22,9 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 26544f4ab6160618e7c8bcee312060a85916a4ce..79dbde7b8a0eafef405be3b586f834068f4a3aca 100644 (file)
@@ -23,7 +23,9 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 96e5b34fa6f41b17acd54a5d17ea98451a3b7e9b..2f24800b0d5a48179d93e2ea8de09d6ba76c1950 100644 (file)
@@ -22,7 +22,9 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index cd6bffde3cc0a69f0c97b6ef3f01ca53261894f1..7daf1257484eb2047968a5a9e029f59d2d24560d 100644 (file)
@@ -21,7 +21,9 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 149fa4eb810b90cc8b9da5d3b79f33c02c6908cc..239a838875a0a8a4e49fa7478bb9be883896b94c 100644 (file)
@@ -24,6 +24,9 @@ CONFIG_CMD_DATE=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
index 23dbaee8623ac2a5c33c87e3efffe9e1cf07e159..ffdaa07a5a6555482b391df08a41cfdeb37ae202 100644 (file)
@@ -24,6 +24,9 @@ CONFIG_CMD_DATE=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
index 10ff9cf7caf37c292f6cd711b3405078f001b87d..ce131c11cdf9a0ff322e42def9485e46cf1168c8 100644 (file)
@@ -17,5 +17,6 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_DATE=y
 CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 13a4fde9177720c25e2ec8d89383162ab85c242b..c7f6ec29d3a13a1bed0b4ac192c5aa01a2dcd4aa 100644 (file)
@@ -18,5 +18,6 @@ CONFIG_CMD_DATE=y
 CONFIG_CMD_MTDPARTS=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index c1b5c85b5de052bbb124436f9ed01d097b8cf16a..c31e7951f49aff4811f2abbb76cf233152d27b03 100644 (file)
@@ -18,5 +18,6 @@ CONFIG_CMD_DATE=y
 CONFIG_CMD_MTDPARTS=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index e416ee36cea08018f6ebcb8d5bfdb300523335a1..66bc67cacf515b758cf6c10c5d1f171a324fad3e 100644 (file)
@@ -21,5 +21,6 @@ CONFIG_CMD_DATE=y
 CONFIG_CMD_MTDPARTS=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 787b23a7889e479262f1ca08b4485ff06c586d3b..e2491c92afc62a01742fa75a8db11304b23de82b 100644 (file)
@@ -21,5 +21,6 @@ CONFIG_CMD_DATE=y
 CONFIG_CMD_MTDPARTS=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 74d886cd6ea083d2c4a3dbd0e55e2e0cc7d539a4..b40b2c1bc2537461222f212cd87fd704264b5d12 100644 (file)
@@ -18,6 +18,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_MTDPARTS=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
index 8b27b271c3149545655b0de9f863932141cd7ccb..aaa4baeaf729ede3f69d5b6ee0c9ef2eab6ff232 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_DATE=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index fc672be7e910a5edcb526b17831b5712fc402698..862013a548b27c6d210e04df354759511d50be35 100644 (file)
@@ -15,5 +15,6 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_DATE=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index c7f093eaa7df4613153fcf79d8344e5a5329159c..4f76b88b2efe7da6116157ee776722bca4233881 100644 (file)
@@ -20,6 +20,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
index e508b3d388d6326ff32d01495f0234e8cf018499..9b9d5f9b1ad91b48c70f5954f38d793fda895076 100644 (file)
@@ -20,6 +20,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
index eb3b73596a200d73d7a8703590c3cd130334b2cf..9ad9e0d147be15bf7d966961739cf95f9a9ad536 100644 (file)
@@ -17,6 +17,7 @@ CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
index b32fb38d7ef71972eca49bddc3da28f3b9286c42..de46fe1fb27f8f6f09fc478a6eba0091d911c59d 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 0373e0e4338fbf43b437925323b97300bc150107..5ca6f37dc11a6d71a35ff0f87fa560e91a125ea9 100644 (file)
@@ -17,6 +17,7 @@ CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
index 1d40e2fb1d4e09646f607d76548244a99983651b..6940f3417930c88e8ddfc50fb13cec268aecc35b 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_SYS_FSL_DDR2=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 8fda7bc08c19b482975b1d414434c7cb10043c74..a6eb30eff6dc3bee36acebe825848006e583bdf9 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_SYS_FSL_DDR2=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index bdbb8c059f131b83ddeead55c0b2929d3cea2201..a5aa82e26b788161985d204ec2567fe60676e3a6 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_SYS_FSL_DDR2=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 65a1f9e2c7219efa79be669d29912d6c6153ef97..03498a8f4f728387a1550b4d738511442febf712 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_SYS_FSL_DDR2=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 2d4647a6c99ebe4f0bd92a04b9fb08d9c5f42f86..e0cd93515e12fab858afcc8e28107b0e77686703 100644 (file)
@@ -13,5 +13,6 @@ CONFIG_CMD_PING=y
 # CONFIG_CMD_HASH is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index cbf9eff85d7b16200c1313ccf96033af92e7b174..ef3c80390f59460f043e9af5766d30691d9f6405 100644 (file)
@@ -14,5 +14,6 @@ CONFIG_CMD_PING=y
 # CONFIG_CMD_HASH is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 8142cf267e22dd4f1d759d5d9b25d1a61c9431a9..3508e0a209763ec95a52c3560e69f2be5cf6bd58 100644 (file)
@@ -19,7 +19,9 @@ CONFIG_CMD_EXT2=y
 CONFIG_SCSI=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_RTL8139=y
 CONFIG_SYS_NS16550=y
index fd3b8d6ad282b7e2027bb59770d43bf2ff568a45..e5db13018923b2e108a639de9c9502ef20a1e926 100644 (file)
@@ -14,7 +14,9 @@ CONFIG_CMD_PING=y
 # CONFIG_CMD_HASH is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index e090a5b60f0156ee4c904dd5eb64ccf37dca11ca..bab25058f0ff2185febaa8f54019f1b30a9c28d9 100644 (file)
@@ -13,7 +13,9 @@ CONFIG_CMD_PING=y
 # CONFIG_CMD_HASH is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 4ea1b9da9243788e8229df64df18f09660f0d1da..d8daabc11a1e021f3f8bd8e711b4cd56a1b6dcff 100644 (file)
@@ -13,7 +13,9 @@ CONFIG_CMD_PING=y
 # CONFIG_CMD_HASH is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 8410fa4fb12f8379e5741f0ea64f6c43e9d6f379..cb37d9ac355ce49275f2487b324acf0807e5ff70 100644 (file)
@@ -13,5 +13,6 @@ CONFIG_CMD_PING=y
 # CONFIG_CMD_HASH is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 3ac6035e35f73babfb4cbb2212b558ff35235eac..a74024ce97fb893784c238a4fed10746f36148b5 100644 (file)
@@ -14,5 +14,6 @@ CONFIG_CMD_PING=y
 # CONFIG_CMD_HASH is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index b5fb4c282e9297f8a1c2654d7ff15ce321126120..4924bef0cc6e2ff59d36799400b407c0101f8c95 100644 (file)
@@ -15,5 +15,6 @@ CONFIG_CMD_PING=y
 # CONFIG_CMD_HASH is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 521badc5ad3049a33ad6884a3d5a427cb379432f..673d7ce4b6c7fa81ca915b0ca710dbbf35de3775 100644 (file)
@@ -19,7 +19,9 @@ CONFIG_CMD_EXT2=y
 CONFIG_SYS_FSL_DDR2=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
index 2821c8c40b1655feea061a100758674e3cac0809..c5599c98683169973b90080c8b9285e6d2ebdfb0 100644 (file)
@@ -18,7 +18,9 @@ CONFIG_CMD_EXT2=y
 CONFIG_SYS_FSL_DDR2=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
index 074c3338cf1d7b9f7b9119892eb6c7add8b0cad6..bf7179fd25f71191aca7d64e1936c8c38f5b051e 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_DOS_PARTITION=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_KEYBOARD=y
index aa2a4645474705c275d5894b5c68a764c46db8ba..11b2ed27a005041b24cb972cdddaea9c6d6fd925 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_DOS_PARTITION=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_KEYBOARD=y
index 28029b8a74cb8be15fc7072f5b4800018b58f6f4..95b39f07ec26c6941820a08439173af9c60e48f4 100644 (file)
@@ -26,7 +26,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 75f62d9d3d4495042d19c7b44cbb6aa9fe8b83e0..92840f5e6fe95b2c264c22fc85907c4702212e17 100644 (file)
@@ -36,7 +36,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index f9109e495a406c3d9161137ecaf42ba425c90fd7..794cc4c68cbcea61a1eed2f2d981bed17733affd 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index cc71f0405e6a94028c880d367357c2991c9007cb..3ef45a4f1f61ad2e194c216b50306a7460450715 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 1ff9d69d9c2ca232f7b410cecba476dbd4192b33..9818e7ce2b5eb0841c8b810f2e4d103c22973f02 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index a5cec4b8b1fdf53babeed344fd67b0116bc27bcc..152d8854d600b7d67de613960c1ebd62fcef5a15 100644 (file)
@@ -26,7 +26,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index a76a1ab02e73c71c1a4fefb04542f0ec2036827e..b1e8f026582bfcf2252f06378e0b2c4434bf3a9b 100644 (file)
@@ -35,7 +35,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index d720c229e22c3869628df74d0dc9fd7520d67da8..070acd74d0e9b4cd8f001640ce72cbeacc6e084e 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 744ebbd5309aa39dbdb696282b0905ef2be68941..6d776820d7386225415ab888171ac65e29e21f90 100644 (file)
@@ -35,7 +35,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index d473d6ddaa7ffb09188c8529ca71308f32e7db68..42266b93a70d2e72e0974b115523a7e4292611f5 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 24d7139a1bc5fa32a2b302e8cdb0bc84da193ab4..4a403b90c4b381bf090439cf01cd740134920355 100644 (file)
@@ -23,7 +23,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 4fe4186069f3f258e871d570aa653ad063de2059..2c9d661ef247d31fcc7898866754bf13441ab8f1 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index aa944310943733ea5cae30a1f86c03e03858e03a..223f15aaf9cdaa044fc90fd9e82ddc1e11f6f34d 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 1b8ba8fc6e6a853088d5ddcc763d364cad1b4d95..eba9cae18f876178c60c2dfa252849a6261359e1 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 137a9ff90b8fb8255ed81842a52533deee39281c..140e6bb4edde9d77c9b6357c58b2051890dcc941 100644 (file)
@@ -26,7 +26,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index c22bd10cee8d861d440e2d961bd9d0514efb11df..3ac7bdecb75d4b48aff2feb876471d8c56962569 100644 (file)
@@ -36,7 +36,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index d1c728b01ebf16bd823ba05ffe396eb976e25ed1..20bbac4bbd911f666bf9d59250845edf8fe35f33 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 6c7a3b11d9cd3dd370f302d6400c179395b17ffc..528be16121f9c02bc137eec4de3b2521729ec92d 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 6bf7344923eab07e3e87da4a5fa320d3e9fa2d92..ba83da3f8833646967b1612cfeab5a3b7ec3639f 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 2c1f471c61943ec64eb5d7e7af20ea20fd10b80a..5298c1304ba10d2c670d7c1fb736635753660754 100644 (file)
@@ -26,7 +26,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index b9dff3ef63d0a7bd723a74abb405950c782fa22d..1708e2e630b79b9bd72a97464b430f3ca77dd307 100644 (file)
@@ -35,7 +35,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 765e460d644dec04bbe5dc125d8dfba3c94525c1..4a3f65401de82b4296a47976ddaf3fcae49a3f53 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 27fa96ed7b3917496f4066bcb56b23a6272869cd..1fbd23adfec04618b8d899ca1d3158b1eecfea6f 100644 (file)
@@ -36,7 +36,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 76f28fd817f824e988f0ffb643484de09f336a81..f29114e5e1ed453889d1bdb0356eec6e4a6984d6 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index b2dc667fc6f2e4950f7b7313982f59df08c469d5..2c155956b8f160ba157404936f79291e7d1c0d1e 100644 (file)
@@ -23,7 +23,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index e671aa616bd6d1f68fb94d8db2e3b85f3662d603..39cc555353dedf4e7c4f46472c326b0c59b63bbc 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index a0c9a716ae282522ee9ea783f26faaf8c5614c7c..530256e97907a4c4ce642671bdfd78d203a78860 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index e7d9ed4540d760b3eac7503372227327d65b1cee..2c0b2ff2e037bf91f3012561d2fea7a5e2c75abc 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index a7d829d41a083e832ce6280e915ab46fceb024ae..d0379851650de9ccc7141991796dba032accbb8a 100644 (file)
@@ -31,7 +31,9 @@ CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 93a9ed4602507375507b0d50a34a2a192f7a10c6..8cb4b5a478317f58e7ea5d79f8a7195abf6410ef 100644 (file)
@@ -22,7 +22,9 @@ CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 16ed38c8f1cb56affd70830fba4edcb6f60e93c0..63bb57fd390ab323891b2648c15f0a35d1b21a50 100644 (file)
@@ -30,7 +30,9 @@ CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 65b1e9f50be449526d4a3abd09d8fc20903b732d..6a1777aea039cdddcf2e0f0f8b572097a8c87fd5 100644 (file)
@@ -21,7 +21,9 @@ CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 58723535b6c9b0e84d2a71e161436576b861b764..50aa9d285140b49b04d7d8698cd9976bb53bfd44 100644 (file)
@@ -35,7 +35,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index a8d81526d84c25ac267a4e64dbb43e90dfd612e5..a340ab2ecf1893c17d0adb3d968f7e3bc3791523 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 13ecc32126769917b85aef6c5da488dde708d67c..47582a349b6ca54fa7c846b1d645018e0c750c4b 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 32f10251ea79b0bc910f169cd96be579abac2751..85a3b2df60a7f3e0682a905baa7d9185a9763402 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 4ae11800ef418c924ffacf108941943584c31d97..fd4e41a357a6bdbc7d5a095d058470497e304277 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 1ee299f686cdbd47a725540aee4f7de316f23fa7..3dbbe135129f3651fbc58aa6e68dc476be26a80b 100644 (file)
@@ -32,7 +32,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index d97be67a38622fa46ebcc49c08f755cb5e541d2d..a4f5fda7ec132f600d6cce0cf953c0cedc8a10d9 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 5cbd2fc140f53389f7bffdd6007c9c55be8d2e3d..4861649a04536528efe844e25dab7894acf3ad52 100644 (file)
@@ -23,7 +23,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index d08904b93c2c44bdd0b07d17c94f8834ae077dcd..2ca1233f0b68db30aa5cd7ea15bdf3b557bb4f1b 100644 (file)
@@ -35,7 +35,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index bdbc5d66287b51997ebf0ea4aebf569dbc0498ca..29f15c58bbc265aa49fce3db07f3cfadd688a69a 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index f8a1a5889160475b2d84efcfefe31d06855b1257..1e6be967baa5f5d58430d35d3b3733a8db142b9a 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 5894dd13a16a1e37bb33694d6ea3e165464e4145..fc4ef855f890e08d919f113a606d828d3bcb7dbb 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 4e871ceeee393b42dd4a981cd9eb9008a4737f60..454d89b6c949f61771302cbae79c6db894a3a355 100644 (file)
@@ -31,7 +31,9 @@ CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 8abf174b54a736d349fe8ae3d782e667f8a094e4..17eca5711c18767467cd1d1f56754a7e457d8dc0 100644 (file)
@@ -22,7 +22,9 @@ CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 5992819ce946a2e718a0c08e1baf0fc657628c93..d937e8c3b253228035d98a55f5e29dbe1d547e8c 100644 (file)
@@ -30,7 +30,9 @@ CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 026a39dfa84882bb506509490574c31cdcbd6475..c1e74a39680bf820e7bd63332c2f0290f79bb547 100644 (file)
@@ -21,7 +21,9 @@ CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index c57949944c1ad75affe7533e87ab46dd555ac3fa..a79b686d7d8d478f8ba023b9e92ae4e4d30e93e0 100644 (file)
@@ -36,7 +36,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index f5e620b6e4d1b2749eae0299c9895a6580d224db..25010b854158b1542d2ea685538fb0ab08416c32 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 581a46bde9dd6b5546ad217074b78aabc2ef210d..1c55714e2e70ad5377ab5567c975f1cf21b6e0de 100644 (file)
@@ -35,7 +35,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index d8138f29553254f912ec1d8d6fd0ae67dd8940fa..3f15d8e230893360d19076820240aabff0e58b85 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 378fd8e485a9cda4f4e9dc48660b7ae5299be5e4..48f8c90dd1106692dbdbdbb06702768f473f07b5 100644 (file)
@@ -35,7 +35,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 9bd5df5babbba4178d7b7fd48125367ed3157350..fca77ab39a01ac774ddbe297035d00c675f925fd 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 306d610de17db8cb07cfb472b04e18859809b18c..ca4cb28b553896639d21a032751dbf60273db926 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 48565f1b96f005f2b1ce90438e79f4e126e38167..ca4973802738fb58b32b7390a77f1f7b7bd3eac9 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 964e5ae2bf401b028588e3e45bc0e3bf18e5cae9..0965cd7f24dfb13b3198fe4f648ce3e757860021 100644 (file)
@@ -35,7 +35,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 8e8374ca6760c64a81c314282d5aaf647cc24032..b029badd6d3cf82be678f863452f7f840700d360 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 1773550e5090a4243e5b32a861e255b8f24ec77f..9e88f292c8c9a8b326ca86f17977bfa982cfa98f 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index ce33485cfacee27921b13fd220522a022b785ef4..c534d3821566d4d3200a24d7b6f5e991c27b7837 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 9bf8db1408f2b480c9f550dc64a2398cf24b7359..1a1822f68645d44d35ed2b2110724e68a1450a26 100644 (file)
@@ -35,7 +35,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 8bcdc73de4e581e5a6f6b84ed493b952ea31f5de..a92a5f1740c5ace402d84a596db4b3e26082628c 100644 (file)
@@ -32,7 +32,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 5862c610a769e31fec6d690377af3e54edff24c4..66bd93ab616977b4174e9b39315c0b58626e4289 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 6c8fb0c9cb03259d6b2e5249d8e1f998ba878496..52f4c8d2596a49cb14c6ca1630d94b000857b868 100644 (file)
@@ -23,7 +23,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 4819a6912f8d6cf089345390715c5074c10869fb..84e89a119d22354f9db68ae88b47f5243ba28eee 100644 (file)
@@ -21,7 +21,9 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
index 08d0f771acb3b4e841617a1870eab84748eea46c..aa7b4539f37dab96eddd28e6334881fd7d860908 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 6a01a8557ca899b140d25bb23219a31dd53174eb..e007604470eea2285b29bdec20376661ea09e600 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index dee57c4daa565b74ae31946de9b0066c08c5853c..ed4b8556dc1a5aff30e9421562bc97d45d00d295 100644 (file)
@@ -32,7 +32,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 3f7604cb39ebbf6614b75a6e2887f92164edb0c5..bdb61d34e64ab0a494b9db3746ff1e3426a50b03 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index f0696d55efc14d2908b5260dd0364580552c6794..459030a0ffc34ffe3628b8b888bfac86babdd425 100644 (file)
@@ -23,7 +23,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 08b14fce0ca87339a22046a4129699a6118a2531..4a2ba1a71bc7b849d638a5cac1773abf5f2a79a3 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 747a8be68b4effef29b8c27a6cd699f5749975a4..28ba22a1ff6bb241fadd62ce005b211d501d65ed 100644 (file)
@@ -36,7 +36,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index e1af126a6d7ad5b82eb6e97a6269b74cabb595d9..45d344856bf4f45a8067332e918cd89dcd043546 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index cd240c3fe2826593bab891389370f84970cbfe75..fe12f10283ef85470b215b8ccaf4bc789a2f6865 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 044e825c1c71c50c052774fed38f25639714e461..66d306f32049add71c72c6eaeaf9d2e89f78d996 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index c342fc45c80956a75ec56576e343a7e947701b80..e470f3198c149386bbed6416ba9d203cdae58273 100644 (file)
@@ -37,7 +37,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 8e527814972b2baf51c57a6de37e66d4c894997e..d72a8f0a981355c4ff27e68c383221c0f53cad21 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 032c836a2880ced294ed0a34fb212b0a3f207431..b2e7c8c517419ed451b8ee95846195a0e740c4ad 100644 (file)
@@ -35,7 +35,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index a51b63100f69c95cfe66dc2e55f8ec4eac21642c..595c4721f1d4ab68de91135ef337104c30fb26e8 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 26a583aaae1eef82bfc42adabe594396fd663133..e1ce5912624e3e0b0f1069c2801c386060f216ba 100644 (file)
@@ -35,7 +35,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index e44651520481f9ec84abe8054bea57aea4bba299..d3069e1c2903989a5f109d90370c3c3b2792c902 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index c596b686da301bfeab7e4a660bf89fe416d60cb7..5bae5eefd735b4c4a1c8245585f0fdf7c5c09d5d 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 0430762acf7b3e6702d5fa895c952012196a2c7f..a16ef43b08087c78353c7fc677d501a2d763d5eb 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 8f1f3084d49045b404c3744188a547cf38bd7570..5e0ee668a63a0559cb69eb3894d03f1b9bbdc190 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 7419eaed4068eee2741764e67e78029d4303d5f9..4ff07aba83715ba484392c813f722e7efa3957d4 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 1bc514c882ac11e85671c0d227f2f990d3ca2e94..bd70cc528aa47e0098ceb2c55aa013a43c1d6d2e 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 76ee4d0377ff9c1fa09456483bc188de5d02c326..13a889f21f59daf36d738c36b9953e18b54cf3a8 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 8b5e4decd7bdc4d7d553611a737c2e3d27c93104..1edd5af7d547f972cd77fb1cdb362ae574473351 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_CMD_FAT=y
 CONFIG_FSL_CAAM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 7324279de6282a450e0dc245b6f3650196e36c05..f12e3886985874492a5601f6f3112e39a4f8fe98 100644 (file)
@@ -23,7 +23,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 1aad2a61e6693a3e4df248d9f0a24855c33f883e..1a43f200ea3c83352835dd7bf64f445c10761a3b 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 13d4ddfc4832760c78696c92cf7cddfec0dcf843..7c2acb93666555757ee17b28c2abf285a01699c5 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index d9d8b4f29c389891d10d1bc8bfd3afa810ca8abe..1cffa325fab65147df6e93f04e24311442e49029 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index c5766ce2f90dfd761a736463d538f1ccc31b2d1b..6c7a0c3b02eef226c0975e6e6c306fd59fcfac31 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 657abb39d249ca5d0dd9181ef841545290a06ada..961cce831c05afada5918b6e492eed6fe393b3f3 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 3ea5f5c163309229300cbfca3ef12a0a8f239b04..039da15ed961c9f0d8e3e22edd01d62c4fc316e2 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_CMD_FAT=y
 CONFIG_FSL_CAAM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index b248e980c2a195cc80318f9ad78b58f08822e031..ea89d9c99199b57f362cd00625d6c5da15d14fd5 100644 (file)
@@ -23,7 +23,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index c7aad06d05dc74ac6d46f03abf057fb2b3dac883..9922bbcce33b8ee0ec85f0456c715e83b2c73a1e 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 81b14dd9c37b830468de452daec88d13edcdd3e3..1083f8a53e5e453aa6151d79a53328d50a54be9e 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index e72def9260c8145526a1b415a7d0fbf84c3f1384..5e9bf977e03a704a6a8d71a1bacfe69823dd2ec2 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 5f7920011c7dd5a075ceef0a85e2e58887c7e761..2bf1299d2fad4aebda90b33f9c6caf7091deac54 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_CMD_FAT=y
 CONFIG_FSL_CAAM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index d3addc800d35f0e0c36681b0c7f6bd0030eb5e5a..71a6993bb893a20b541a47429326899b573a3bef 100644 (file)
@@ -23,7 +23,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index edff3c2f9381e7043b95b90965471f9c3b60aab5..7af118bca92e5c7a9da501b489f3c3dc817a0765 100644 (file)
@@ -26,7 +26,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 7f5bcbd5619fa356e8238d8dac4cd2d803049ffa..0c7aa23090916d96ee31bc1a9933e3367f136d1b 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 25868919c49ae537fa1352cc040e45a77203386c..71f2c8938c766a1240757a05dd3259fa77ad904d 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 2f4772ca0f154cea6b8528f0a45201b9fb3c29e8..91cfc65b1317d57715473963f20c4ac73978a31b 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 6993e7379ece5a99c0b3e808bba604bdcab9f75d..f3f5cb886372759b7be443d17fa72411931eac29 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 9ac5931a2ee6f694b3d3cf8f01bf9efe81f9c4d5..c2d7313800a39cebfd0c3e930515685af9c95298 100644 (file)
@@ -26,7 +26,9 @@ CONFIG_CMD_FAT=y
 CONFIG_FSL_CAAM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index ca7a8c9dfb567b72a0ff62a25d0d4827aaddb484..94995215f22a0eeb3a540f4719e2311b9df67779 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 71538ad463a6ce73032a39e37b6d7471eb316dcb..183344b6da3ca722e394d7f11dada6c1ff844341 100644 (file)
@@ -26,7 +26,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 37a5bbe9043258488b33b20eef970ffe7610235a..00d508ea020e8bebdf9fb0b5a4a4988ac2544adf 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 643bc8d9b2f1d73304b2896675b6512f4ba25116..86ea9314c13cd7175486a06dcc1cc87db65a2b14 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index de7881ebc6b50b3b8df8eefdb1ca8f785997a072..4a80242c95dffa46631babb58744dad5a40b5eaf 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 34df3af78367e507dad85d7048b84fe5b7909eb1..5793781f9404e1e0f1275fb32e7bfc4d1805ec9d 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 8253e0acf42bcc3acfc9300faf3f306f2c72ca09..13bfaf8a3e9f5c95a02464af1c88c6b8678aa01a 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index eca89cfc5a425ed14256372dc661c3d84aaa1d6b..805d397f3c21137a8dffab786c5891fec672d111 100644 (file)
@@ -38,7 +38,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 60477d3891f88ba4aefa9f1185b4bdc1084987cb..0b4d256062ffb912baaae564d807076d58bdafbc 100644 (file)
@@ -38,7 +38,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 92adbe8dc8ca964a662dab327b9851a24284726a..0c33a3d19253bb8286a171b2051bc916a8068779 100644 (file)
@@ -27,7 +27,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index d3d394152bcf4cbae7fa8e5000061f6c003444d6..0cb278daa33ee77ae44fa4d11c15fe387ff7a9ac 100644 (file)
@@ -39,7 +39,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 22dd2dc09dc74f22ded8e6aca8431ebb2d1281d7..da59c263e26b095817a77d75b38f3c5db427a029 100644 (file)
@@ -26,7 +26,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 19f1000657fbd4d5d60bfba575f2c3afe5f7e75f..e87b085519d62385e5cc0f4ba4c69f6b343e9fb7 100644 (file)
@@ -32,7 +32,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 6294ce3a25e6cd6adaba4e2c684dc5528a4a8bc7..454dbf6cc4563523cb1c5139d91e1a7297d6474b 100644 (file)
@@ -31,6 +31,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
index 82f4a401ae6d86520859b6eeddf500786d228f9a..d18068d730becde14ff807c1e0c63512e1e2a5d0 100644 (file)
@@ -42,7 +42,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 3d6fc500f72477c4b0dcb0770c1a48192f66edf2..729a49be8668eb1af1db0950ce008826caed1240 100644 (file)
@@ -42,7 +42,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index f1d04889ffb942f806e2d9b8937e404ee04f5a6f..402a9693ed20b29a96c3b3fba41f454e9e0a8a5b 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 04efc8dc9b488a37aaafcb74d1a70c6114073064..c669309f1d5cf3c26a853f25d6105c0c8023e575 100644 (file)
@@ -43,7 +43,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index ac7b316d526b311465f26c7fb9c2098afe82966a..f7af9d590e74eae6971ad56c48a53d6a2d1ee55d 100644 (file)
@@ -32,7 +32,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index e76d88acb5733f4d5370affc3288779df3ec2fd5..e06fcbd96b660243b407bb82a5c58981aa0cef22 100644 (file)
@@ -38,7 +38,9 @@ CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index ecf54d847bea3ddbcc128c92422a8acb91385e67..2b1b9a0f72ea6260e3514d1cb127fe8201f30ea7 100644 (file)
@@ -38,7 +38,9 @@ CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 968d8a8941213881a8d91c9257c020350299265e..b0d637c9803a0540af7c83e672ccebf19d6841ad 100644 (file)
@@ -29,7 +29,9 @@ CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index b481c8c9d6281ab605785246ef6a3781354a6e0f..e3d4b066d2f66cd9b0a06a148a4983294c1c3ecc 100644 (file)
@@ -39,7 +39,9 @@ CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 2cfcaedcd002f154b7c90d11118df3e6fba1fd9c..b2046ee1fd773e23607a54d1c0975a8b9d703bf0 100644 (file)
@@ -28,7 +28,9 @@ CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 010bc6cc897239bd4af8efe7f5149fc840857bc2..b6657869eb89bbcf0da7a2830d0d269a428c3916 100644 (file)
@@ -36,7 +36,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index f0cb20bfe89e7ad1ff4eedade93215c49bda483e..542216d99cfa5269a63fc92006ee1b7db350021a 100644 (file)
@@ -36,7 +36,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 47582578cf25f952584fe2b73419bf6ee3ce74b7..f761bec0b1d6782c0e4db469cd0ebf046ced89b5 100644 (file)
@@ -27,7 +27,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 8e7dd1d6ec7f45fa7da1c63e037355ac3496739f..2b45a4290048907446afdc9c6fc65a73c2bc0ec9 100644 (file)
@@ -37,7 +37,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 961b33ba08ac624cb178cf73443f6617bdcda39b..6dcfe7aa1a2f3f3be50040ffae29829682017f63 100644 (file)
@@ -26,7 +26,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 1e3d0b1c10faec43a94ead0f1b298e64011b1572..f0c0a5430acf64041adea216229c61f135aebb45 100644 (file)
@@ -32,7 +32,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index a75ee03bcf2ad3730e86c463c32145e78bd3e9f3..15f0a8318658c5edd978b147559406fe7fb3dc48 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 7521e72c45c1bab47f20e0aa6a2c1b83bac85bf6..643e1db7a1aef2161087c4464ae7c4ccf3936d8b 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 28277a2552e19c50a26b5ad7310c2948017211ba..21d060c0e11a5a803465c6f77468263a98994708 100644 (file)
@@ -37,7 +37,9 @@ CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index f4bef13ae6fb98f8e632cd83a6d1095812438dff..9e0562f4c1b10f30f8d4505dbe90f90b5b04f34b 100644 (file)
@@ -37,7 +37,9 @@ CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index f16834b85c5821e4b4f3168b7b9ab341fb7cbe11..72015c3b51b0065c4a9cff47cbd608abf265b4c3 100644 (file)
@@ -28,7 +28,9 @@ CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index f09f7b46dc46121cd7ba3a46bf1d5af19a857f5f..b52f9470038fafd1f4be07877b308e3752e7e04e 100644 (file)
@@ -38,7 +38,9 @@ CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 395a6cd18fd127ee204922a2f9b5f11d49840ae5..6ad61cba7d03971ae8355f456dc25d76ba30fe94 100644 (file)
@@ -27,7 +27,9 @@ CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index f83f43e00cef0bb9a5b705ff95902a7cc4760fd7..c02fc20693415d36db0a1f91b7890291962eab18 100644 (file)
@@ -38,7 +38,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 45949fdba595e64ea4996b23c4c29f99ba474c3b..7ef3af09db83629fe95a7be565c93b464461b2e1 100644 (file)
@@ -38,7 +38,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 4a94e30117fcc1ac6b73ebb983a91f3d62da1425..da143fb88bd5b16d1ff53dddce37da4aa12a2d89 100644 (file)
@@ -29,7 +29,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 6e6b6a12ad6dbae977e61f33b948ce663207b40c..52c5d711435b2510af94393cee6b68e3d1a15d6b 100644 (file)
@@ -39,7 +39,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 8daff4dc4231e0ae742527ff87be7e077eeb0479..47a614ff6a88ad8439070b39d0e7dcf9ecc82d4a 100644 (file)
@@ -28,7 +28,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 513bfd39ca5e35e4edad305f20042281630b952c..9a0fa3371710f7586c96479817f676c513ca71ff 100644 (file)
@@ -43,7 +43,9 @@ CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 0606e0c4552a77e663b23bf5fd2f8793ae1fead7..adae1bf4cc5e3d2b6d4b4fb84e14376cefb238d3 100644 (file)
@@ -40,7 +40,9 @@ CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 70ab39b5c68da134ed8a1c4219d523a652110cff..de3da631948554dd2902aed2ea02c333687bc3a3 100644 (file)
@@ -40,7 +40,9 @@ CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index ad88f279745cc037ce2ec52059a8341f2ab09e21..4784015bb499bcdb2c246cbcaf3f35c334536233 100644 (file)
@@ -41,7 +41,9 @@ CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 5c3cfc7e101d90a7e32358c2748e446090250bee..4c9b81693d89906a711cf5ee07dc11abbee609ac 100644 (file)
@@ -30,7 +30,9 @@ CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index cdea7857b68cc62f573394b21370496195273068..c5ad1b8d6ebe52c20cfa48c42eb35b2167be62a9 100644 (file)
@@ -27,7 +27,9 @@ CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 8ce7440505d66823d17fda061c751646717587e2..8e1e8be7278c9bb95d39ffcdc5640c8b32bd67eb 100644 (file)
@@ -26,7 +26,9 @@ CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index d39399d22cdf57b4a560a667730336b11e9dfc67..b429efb5cf8f969e2af2d104064b5743f28ec9ce 100644 (file)
@@ -35,7 +35,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index a6cda56c45e98a048416e470a86d70f1901672a9..9540e5054b171b40e9ea3860857de2398b6944cd 100644 (file)
@@ -35,7 +35,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index e1e8c7213587366a432bee81d497896ead06d9ad..6c24de3c3ec8cd22edb28e37ae6263b50f10d5ea 100644 (file)
@@ -26,7 +26,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 406715a64e1350565aab17a127b69c1c4444ffd2..46ad7193ea6fc5f31362b59f35f9cbe9a528689b 100644 (file)
@@ -36,7 +36,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 3044236b1a456888eee939bbb5f2e8ce5d5c3984..86cd734fb6a05a857a2f4e454028c8298f5db296 100644 (file)
@@ -26,7 +26,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 89def59ccf874d866bf1579a378ad7ee2082edf3..d48a9702b5dc6cc06ef31b74c311cfa8771156fe 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index a97a28f8f74cc47f476544b44735e36513900991..b985ccec788249f6d32bd780340b4f25bdef9d04 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 122f43baa94941c7647454c43e03908c90f616dd..800e9386ebb93bb62fc479dfc5d13dc7ce40fae3 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 5cc601deb77c9caddc8e4ab3dfb6920c17099722..dc91bbc2883de27228e07e1a544e1d68c5425574 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 63b2098658849b2465809d60385faf40bfa805b7..6e011f9f68835298e4ffb7f165ad25b20029f996 100644 (file)
@@ -35,7 +35,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 32feff18e051534ccf405f724bcc821ae7d03ada..88302288d5503f01e1139e132635597001bde2f8 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_CMD_FAT=y
 CONFIG_FSL_CAAM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 8822537863d662551f91cbcfbd0304d5fd804ecb..2673e0d047302b49b4280559e1bf80edf6f8d5b1 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index e1e0ef43719f06460899d7886ee1b725c3da3960..0e94c70d088dee345c8cd17621a19d552ec6e0d6 100644 (file)
@@ -35,7 +35,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 980d1e8e52cd4715037ef5b70033814f92e644da..e591d3790c905e64c6f5f1eab705ec7be5d41484 100644 (file)
@@ -35,7 +35,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index fc760dba302157b2544cd189662dd4594e2b7517..edcb29b2a60370eea26d3c0eadde200b23f1f700 100644 (file)
@@ -36,7 +36,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index a49aff5b3e7dc81a5bd24c3eec9d9d1976a3ed4a..a4b88702b07eea09c5914b02e2cc2dcb07a49c75 100644 (file)
@@ -26,7 +26,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 6fb091060088c0bfb48c57fc968b9411796173a4..d1905fe44690107dd2713cd52d1fcd0d14b0b077 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 605076e85e56dbb1b2cca761a3589bc6fb5cc14c..885ec05504a37f171773eb2ef424bb4b75a8662c 100644 (file)
@@ -32,7 +32,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index a5b0d41d80faaff442e2ea49eecd539c25636e58..5337f1a48d3fa94a0b21adaa7a0c72581a79b890 100644 (file)
@@ -32,7 +32,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index ea79cc2cb59dcd0adfbe6dd63ed8a1be0bfad6c8..50609219fdbf5a6f0d84a763cabeaf365be52a67 100644 (file)
@@ -23,7 +23,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 6caffd8468e5a14912a03bd99f99eb63820d15af..cecff55bd9fba9d21bcd24d68b78b8f9f2796cab 100644 (file)
@@ -22,7 +22,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index a1c60b2c6c9cbce5be70e0ab906ad5a86201d1e6..4c095466ca2d2dd0dd114652fc713d24c981f331 100644 (file)
@@ -22,7 +22,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index fe35461b8894996b59be8313f6c96daf8538308b..68bb9894e186b84d17371402010d12ff5dd68dd4 100644 (file)
@@ -32,7 +32,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index a7d681d8cf31301ed9aa93e0858beb2541cd6ea5..be4b1d871709f28e20b6b3e654992d799da2b0dd 100644 (file)
@@ -32,7 +32,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 3219b0c8b3c5160bd8e0e94f6a03f0a11802954e..3524d0b1598c54688cd2fae46d4ff0b7514985a6 100644 (file)
@@ -23,7 +23,9 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index b198ccf4a2fee396791428432b48ed31d82c13cd..ce1ad888da23e2f283ae8e614c21b78974e969b9 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_CMD_FAT=y
 CONFIG_FSL_CAAM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 96320769978c9624ab884bda3dd61391e478b75d..db6dfc94ac9c37d44510412f989ebe82c894bd86 100644 (file)
@@ -22,7 +22,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 98d6c7610155f5bcea709f1759d7b7e0fe8a825a..1390ce8950d0853742abad7ad61d0869699062c6 100644 (file)
@@ -32,7 +32,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 1c0aa913f0f4e9423ccc957df16b81cf6c2e863c..dad2001f323f4b31d9383f0215cfda9cbf889dfc 100644 (file)
@@ -22,7 +22,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index e31cacac7b4c10e545dbe696b30d683af8456ce3..9d4ea14afdbaf820a5cd2e33ced820a49e312497 100644 (file)
@@ -19,5 +19,6 @@ CONFIG_CMD_JFFS2=y
 CONFIG_CMD_MTDPARTS=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index e48b9bc3e9ecf6caf97369e8e58b60f5d23a17ac..e32a0600f4320085513db71e60cbdd946fa753f4 100644 (file)
@@ -22,7 +22,9 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 686137dc98810802bc5f5214e78623c471d3332a..68ef59a5173bd153be2326d67f404cc1cfc4e903 100644 (file)
@@ -32,7 +32,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index be0029673b7cc54b1dbdf7bcef2e63b4f4a3f65b..6999db3aa43ddecc299e39c7fe589a186f2d33d6 100644 (file)
@@ -32,7 +32,9 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 109b1abfe7b8ee3a4a97a77377fa123d67d9548a..a220003f775d790a87b01ce4688aa9c28c35b4ce 100644 (file)
@@ -24,6 +24,8 @@ CONFIG_CMD_FAT=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
 CONFIG_USB=y
index 705d47211e3e8fcfcec02d812e0e2abcfe745e02..180268ee69c808ed2c910f6b99f5b9e13d735c6f 100644 (file)
@@ -52,6 +52,7 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_ISO_PARTITION=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index ae2adb792a206ec46796ae17e422f48f8e52c44c..2c153a840b2930652760b9083917d6ca506bd0b6 100644 (file)
@@ -32,6 +32,7 @@ CONFIG_DFU_RAM=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index 3ff6220dfc220c4230fe77d63c7368dcc8071ae4..addfd09537931ead0bed203e45891f01e180d79d 100644 (file)
@@ -38,7 +38,9 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_SYS_NS16550=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
index b68857d7b7dd99f8a1de4e8dec8d20da8a3e17c2..82d5a97d6cf3f8bd648168b81d346a0baaf18c00 100644 (file)
@@ -36,7 +36,9 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_SYS_NS16550=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
index ebf155bfcaffcf66a74c640fe8139ed0c6c349bd..3fb220a8bcd0ea19189a0649e63d9a76fecabc8b 100644 (file)
@@ -29,6 +29,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index 73354f48be946282faf051eaab6d99881909327f..9f7247bcb4f17539b99793f40e9660384a7b6255 100644 (file)
@@ -26,6 +26,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index 35aaeff4e37c002d0f0d0845c400308cf1b00403..607ac07196af4ea97ff2d17582612038534bce30 100644 (file)
@@ -30,6 +30,7 @@ CONFIG_DFU_RAM=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index efc34ff2e8c519df0780aef3a4675fc56ea0213f..55c13da354c47c728bcf025a4534c1a9b6c65432 100644 (file)
@@ -32,6 +32,7 @@ CONFIG_DFU_RAM=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index 2b35c997fe569aeff81474920b44a52435deebe6..59306ba8c6b49a7cb88ad726d8dff9972aab1205 100644 (file)
@@ -39,7 +39,9 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_SYS_NS16550=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
index 2c628870e02858319db6df658f251e5f459bffa7..2ecd1d95a0635ee3740bc2aab6f59943e9cc7323 100644 (file)
@@ -52,6 +52,7 @@ CONFIG_ISO_PARTITION=y
 CONFIG_EFI_PARTITION=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
index 9b4802e4139a72f5cffbaa9ddb05c0f057a69f98..9361824e07885674ccd3e0f2785c75aea65348ec 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_DOS_PARTITION=y
 CONFIG_ISO_PARTITION=y
 # CONFIG_SPL_ISO_PARTITION is not set
 CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_FAT_WRITE=y
 CONFIG_LZO=y
index 637306d190980fc30d18e8d45a767e7e87595fb0..160e3690e77d0b7cdcb766d2e7e4869bd173dc25 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_DOS_PARTITION=y
 CONFIG_ISO_PARTITION=y
 # CONFIG_SPL_ISO_PARTITION is not set
 CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_FAT_WRITE=y
 CONFIG_LZO=y
index 5c0c91202267a0cea8513433c25220590eb22dd4..9eac46d13c5c980523792ec874cce3beeef3e191 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_DOS_PARTITION=y
 CONFIG_ISO_PARTITION=y
 # CONFIG_SPL_ISO_PARTITION is not set
 CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_FAT_WRITE=y
 CONFIG_LZO=y
index e5903de5db27b434b75bb357b957d10dcc8eedce..a6c6c57325e2e53825e902aabc1037ca2f759d8e 100644 (file)
@@ -37,6 +37,7 @@ CONFIG_DOS_PARTITION=y
 CONFIG_ISO_PARTITION=y
 # CONFIG_SPL_ISO_PARTITION is not set
 CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_FAT_WRITE=y
 CONFIG_LZO=y
index c8f7632f6c39c22e0c59badcaba64be0b4137116..2be46460fbab772df666d0ca937488a62e28bd2e 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_DOS_PARTITION=y
 CONFIG_ISO_PARTITION=y
 # CONFIG_SPL_ISO_PARTITION is not set
 CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_FAT_WRITE=y
 CONFIG_LZO=y
index c8f7632f6c39c22e0c59badcaba64be0b4137116..2be46460fbab772df666d0ca937488a62e28bd2e 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_DOS_PARTITION=y
 CONFIG_ISO_PARTITION=y
 # CONFIG_SPL_ISO_PARTITION is not set
 CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_FAT_WRITE=y
 CONFIG_LZO=y
index 5d5c68e0fabc02a901746234ee57e6c90ae94d5f..41dd2da37459e0d055d8817d237ea474ceb84cba 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_FAT_WRITE=y
 CONFIG_LZO=y
index e99ee80cef4c12e9dd7e193f84334b5190ffcc50..10a9b9e7e341cf86b3b6b84800cba72ca63a1db5 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
index 7a561fd746bc834e5a1df6fd0967443ce6c66135..cb6a0d35fc1e35de462ec8fe2fed14bf9c3509ba 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_DFU_SF=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
index eefad6cb7811808fbd55c1ce9faace479068222a..0130e6bc119fdaae93ead2af93a363cf2d122717 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_DFU_SF=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
index 90c0c8598845e3e81e7e1630dcfff2f54332e10f..b25a3ee0a51ae959b9fcaa328ba5dc8cff028786 100644 (file)
@@ -55,6 +55,8 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
index 6a4ae3360bd6047b19e48671906bb51e3824f221..0a6a9cd512891170836621cee0e5795621425b33 100644 (file)
@@ -46,6 +46,8 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
index 9cae0cb9f784aa6fd0d153e30c0ca6dd64802467..d5ea25e9339e79555aff5774cc830a18f40a74ec 100644 (file)
@@ -53,6 +53,7 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_PALMAS=y
 CONFIG_DM_REGULATOR=y
index 0a898ded4b6cdeb20913c92e3e50eeaa3cbeb06b..03bac803380536962f7d14f546a9c2013412676d 100644 (file)
@@ -48,6 +48,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
index 676fc50d42a732290c00940599af5dcfdec93234..91baa2b53e1c7236384daa6ea4eaa195614b0e85 100644 (file)
@@ -57,6 +57,7 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_PALMAS=y
 CONFIG_DM_REGULATOR=y
index 400cfd10a755793041e73d8bf0af5f3b4761a9a3..48c52ad4481d539924ecffcd4e1349afec15c110 100644 (file)
@@ -23,5 +23,6 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SCIF_CONSOLE=y
 CONFIG_USE_PRIVATE_LIBGCC=y
index 4d88e702003f8ce3587450437913660aeeeb2c29..38161d46a85572b45ffff490a4b0462921eb8770 100644 (file)
@@ -42,6 +42,10 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
index 5dbc96070ae23e0ee3b6cb5fa449d73fe8ff2cab..1a55c1aad4af638bc415dc32e9eaaca4e6e1f0e5 100644 (file)
@@ -35,6 +35,10 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
index e216781dcfe52195af2e6934b2d0fe7d66f6d218..b02dfc70068e6b3c6f047e9814de33dd26e5a955 100644 (file)
@@ -35,6 +35,10 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
index 8506207e366044e8be571c12cf2c6c78a8a5959f..347ab4b54c842436c3b29dd0f1632c9d19291c57 100644 (file)
@@ -37,6 +37,10 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 # CONFIG_VIDEO_SW_CURSOR is not set
index 678988de7db01ab81b4e058d09544b47b80af6de..aea2d8e938dd38fe2c433eeb560261e638d709f3 100644 (file)
@@ -37,6 +37,10 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 # CONFIG_VIDEO_SW_CURSOR is not set
index 17cc6645dc2f3bb2b6891355eff60b4a04cd13aa..c069d0fb9674eef398c62c475c305f75c021ad1b 100644 (file)
@@ -37,6 +37,8 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 # CONFIG_VIDEO_SW_CURSOR is not set
index 8b2448b1fcf84969fbda611000850a9de47ae493..cb5e150b9bc70ebd8a5a9990de0c0d9f6755d8f1 100644 (file)
@@ -27,5 +27,6 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 # CONFIG_MMC is not set
+CONFIG_PHYLIB=y
 CONFIG_SCIF_CONSOLE=y
 CONFIG_OF_LIBFDT=y
index b0e69e17f97c96329c8bbef69d88e08ea954b083..b99ddb9beda9d7f918511fcd97b9f0a8ee8f2a30 100644 (file)
@@ -37,4 +37,5 @@ CONFIG_OF_EMBED=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_USE_TINY_PRINTF=y
index 2d29d1d0c3b4cc7375029cd5b406ce7c05fa156b..8d363711032bb2d94712a0ca2ce0b97356490435 100644 (file)
@@ -28,6 +28,7 @@ CONFIG_DM=y
 CONFIG_MMC=y
 CONFIG_MMC_DW=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
index 1c4e973c2a365c93a233cdda26b61bd3453ed4ff..2ad37eeae1a0736a3d821fb368cf8a778c93b039 100644 (file)
@@ -28,6 +28,7 @@ CONFIG_DM=y
 CONFIG_MMC=y
 CONFIG_MMC_DW=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
index 374d58b52d0a06f1d7d2d34ba5257daacd303c2c..2dc7d1908249c6ddfd119eb8957d3ec4a434e5cd 100644 (file)
@@ -1,7 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
 CONFIG_TARGET_BCM28155_AP=y
-CONFIG_SYS_EXTRA_OPTIONS="BCM_SF2_ETH,BCM_SF2_ETH_GMAC"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
@@ -16,7 +15,6 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_FAT=y
@@ -34,3 +32,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation"
 CONFIG_G_DNL_VENDOR_NUM=0x18d1
 CONFIG_G_DNL_PRODUCT_NUM=0x0d02
+CONFIG_NETDEVICES=y
+CONFIG_BCM_SF2_ETH=y
+CONFIG_BCM_SF2_ETH_GMAC=y
index a32472b02050d6de026bf0a424820f4389cbbb12..8f76b09e48bda3bb27879e97c4262a2dae9f4ce9 100644 (file)
@@ -18,6 +18,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 # CONFIG_MMC is not set
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_SHA1=y
 CONFIG_SHA256=y
index c90c0c7f9c4d00a874ddc94aa1affe6867a18ad9..d450fba041577760a720bda810a8c1ce441896fa 100644 (file)
@@ -18,6 +18,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 # CONFIG_MMC is not set
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_SHA1=y
 CONFIG_SHA256=y
index 0ceb8eaf388373464f34f99d0282062670111283..f77f50ce4fc606536b22235a04c3055e56b3b8af 100644 (file)
@@ -18,6 +18,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 # CONFIG_MMC is not set
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_SHA1=y
 CONFIG_SHA256=y
index ac50b2e36a48d7726c83d5560c767a6c44fc2d6c..54f3acbf6e092df2d104f66ef46b46c68e2608b4 100644 (file)
@@ -18,6 +18,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 # CONFIG_MMC is not set
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_SHA1=y
 CONFIG_SHA256=y
index 0ceb8eaf388373464f34f99d0282062670111283..f77f50ce4fc606536b22235a04c3055e56b3b8af 100644 (file)
@@ -18,6 +18,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 # CONFIG_MMC is not set
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_SHA1=y
 CONFIG_SHA256=y
index 0ceb8eaf388373464f34f99d0282062670111283..f77f50ce4fc606536b22235a04c3055e56b3b8af 100644 (file)
@@ -18,6 +18,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 # CONFIG_MMC is not set
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_SHA1=y
 CONFIG_SHA256=y
index c5d15c629624b4370f911eb260ed2b4dbe4692ac..756f05f0375d109b645bc6a1b4bfb1730cdd3a10 100644 (file)
@@ -54,6 +54,7 @@ CONFIG_DFU_RAM=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index 31e077c3957f1c2312eb163497347d20ac36ccf4..6f30ac50a731f09d9b372948b10101969ead2354 100644 (file)
@@ -54,6 +54,7 @@ CONFIG_DFU_RAM=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index 539ed6ff3c86f5a57e460dba401098a601d89482..63b9514f929bee4a69000af87ac9565185adbd1a 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_DM_SERIAL=y
 CONFIG_FSL_LPUART=y
 CONFIG_DM_SPI=y
index 4aded169ca096f7e642285af8f45f9d23d9d1054..d0129fbaa1b8d73a532f2b3085ac2aba81a8258e 100644 (file)
@@ -51,6 +51,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_NETCONSOLE=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index e128fb40dbf6fed076362fd29490dcae52cb68ae..c39d27da06e737edcdf6d9927f2c13284f4a5c43 100644 (file)
@@ -52,6 +52,7 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_NETCONSOLE=y
 # CONFIG_MMC is not set
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index 1e156caae8bd4bdd7ed2d09336421c5a3f79db25..2227830802816089d322415e2e56d8778737f912 100644 (file)
@@ -60,6 +60,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index 3dac8a95333be658ae954cc4f049c48a546fdeef..f46695ad9b66cd24140c7c605f442fb52292ca3c 100644 (file)
@@ -52,6 +52,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_NETCONSOLE=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index e20e5f878fc90973d8c08cab2d9a3e9868122240..de61dd33a650569de9d77dd0f13676da34a683e2 100644 (file)
@@ -47,6 +47,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_SF=y
+CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
index 92816e6e8de7a2e70085d6781c46634c0faf491d..5257d7000e802779658aa441d0c7839080bc2b3e 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_DM_GPIO=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index 0d1f6141632f3897b17914b33378895ec1b9f004..415bc382cbab9760016f57b9eb18ba517cfb1a97 100644 (file)
@@ -50,6 +50,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
index 89c0976be227033c386bbcb2c1e609923dc88b5d..5f1c5ae8755783dd90e800d49fffa85f58fbd328 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_MV=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
 CONFIG_PCI=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
index 1a6cfc6f5e64f812fb9acb132f58f7cdc4185005..0facb9bd29dba0fd9ef09710c2f2be886012309f 100644 (file)
@@ -58,6 +58,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
index 7e411a961a97376d30a675293bf82548fccd7ecb..a88b2d81d5ab031e67974f552df67164446c9446 100644 (file)
@@ -52,6 +52,7 @@ CONFIG_LED_STATUS_BIT=64
 CONFIG_LED_STATUS_BOOT_ENABLE=y
 CONFIG_LED_STATUS_BOOT=0
 CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
index 6f10661ba3e8c5e3b2040a01175d88f21e01a98b..19d10b71db5d722605f4801afcf0c655158ead37 100644 (file)
@@ -64,6 +64,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
index a23975f858c30948b90ae22e72a17263d4eb773c..21e9f177f5e7e98664a13ade3f82d8dcc6ff6156 100644 (file)
@@ -42,6 +42,8 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
index bed38dc400c572754b5a66ed10ef72d2f0bb6637..e6d624a284ba174c910c5bda392a61dc1f80f3ec 100644 (file)
@@ -35,6 +35,8 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
index 7aa85d4afca75e2dacc853b5f926a56efa8209c5..8f069b7c2c226c3447cf24e92680b93f6474640c 100644 (file)
@@ -46,6 +46,8 @@ CONFIG_DFU_MMC=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX7=y
 CONFIG_DM_PMIC=y
index 5fac13d2209f24b310d928c45ddfe1b4fbf3677a..810a7e38c9390b215f61c1e194b5beb5f21029f9 100644 (file)
@@ -42,6 +42,8 @@ CONFIG_VYBRID_GPIO=y
 CONFIG_NAND_VF610_NFC=y
 CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES=y
 CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_DM_SERIAL=y
 CONFIG_FSL_LPUART=y
 CONFIG_DM_SPI=y
index 87d212a323050f4c5f22abeb5912ed32201488bc..d933179f1d7ddf6b85bc8bb2c6f9db27825b0016 100644 (file)
@@ -34,6 +34,7 @@ CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
 CONFIG_TPM_AUTH_SESSIONS=y
index ec98183391ecddb8d552def11278562fbd38b78c..c290e09b627366e85367a0fe626c6495a6696b55 100644 (file)
@@ -34,6 +34,7 @@ CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
 CONFIG_TPM_AUTH_SESSIONS=y
index 62c6546c2060c5e4f5c13e0bdc2b986329c3bd69..a36ff30e3b0e2f0d4cc5117bd4241445572738c3 100644 (file)
@@ -46,6 +46,8 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_MV=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
 CONFIG_DEBUG_UART_SHIFT=2
index 6b89abfb305d384e121ba0872fc4ead030b06e5f..cd0f99396dcdf25518e959f20ba72a2957656c8c 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_CLK_AT91=y
 CONFIG_AT91_UTMI=y
 CONFIG_DFU_NAND=y
 # CONFIG_MMC is not set
+CONFIG_PHYLIB=y
 # CONFIG_SPL_DM_SERIAL is not set
 CONFIG_ATMEL_USART=y
 CONFIG_USB=y
index d54d9c384bd08010b9af041a24925507ef25b44d..ab64826d3a8af7890193e6bb07b7fd2eeecbcf72 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_NAND_PXA3XX=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_GIGE=y
 CONFIG_MVPP2=y
 CONFIG_DEBUG_UART_BASE=0xf1012000
 CONFIG_DEBUG_UART_CLOCK=250000000
index 323871f68e273564f68a26ca60f4cb5ea87c89ab..2d2acd40cece7c5772490ec3e5df2143ee9448a5 100644 (file)
@@ -45,6 +45,8 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
 CONFIG_PCI=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=200000000
index 5f072c5e670dea5f549f110c0c20bffda597e7fe..dc73e299f116bcc8151e5231a67dec257e672962 100644 (file)
@@ -45,6 +45,8 @@ CONFIG_MMC_SDHCI_MV=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
 CONFIG_PCI=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
index 99533b9a8d3529a00142c663ab375900f4af7d88..bcd5e7765c17119bcbc6edb589cb2bb05e9a819c 100644 (file)
@@ -42,6 +42,8 @@ CONFIG_NAND_PXA3XX=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
 CONFIG_PCI=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
index 8b180f98118ec7c420fbe2cff9ad4a6d63654b9e..09fcdefee54ef67a704a3f648f4ea9b0315167f3 100644 (file)
@@ -30,6 +30,7 @@ CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
index 12c39ba1e6ab85798aab6af5101cc7bccf96fd6b..1069177a715901c6c565ea16073018351e6f0d1f 100644 (file)
@@ -32,6 +32,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
index dd3428e4ef9cf5139f8ad7985df2e2b031f441dc..e5efb218c33343c52d72cee769feea1fdb68e870 100644 (file)
@@ -31,6 +31,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
index 6987c35a4ed27171fe245f2210fac891f5748148..0c4452a1d1b0214759f8d0b3b2406b51317f388e 100644 (file)
@@ -60,7 +60,9 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_SPL_PHY=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_PALMAS=y
index 72c43f895424482201f81d7875e18761c1a1891b..75b77fa947fee1d9a80a2009042b56ea16ee6cf4 100644 (file)
@@ -63,7 +63,9 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_SPL_PHY=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_PALMAS=y
index fc275dab5823f81f5943a19f75911497359c939e..59ea33134e52f1653c856eaeed90c1b416554908 100644 (file)
@@ -57,6 +57,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index bde54b6bab8277ac138087f42edb0aca59f4ec52..6bccfb6dd8a1337e9c4df858140b4fe58ee22160 100644 (file)
@@ -35,6 +35,8 @@ CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
 CONFIG_PCI=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
index 532b22d3be2490fc9efe4d00103f854c7b9ecd65..d3ce6e6b75cc0d9fd570634c7330743b0ae66d6e 100644 (file)
@@ -27,6 +27,7 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SCIF_CONSOLE=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
index a41704ec967def787d7e5d6ab9406b4c51d498c9..b3a9b43f6d347d14a6df1a76c8c6926cff5f98df 100644 (file)
@@ -23,5 +23,6 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SCIF_CONSOLE=y
 CONFIG_USE_PRIVATE_LIBGCC=y
index 2c7286f13b8ac6888501a80f420c940b5749e3d6..d59ef1b00e67c60f67784fee832f820d06926686 100644 (file)
@@ -57,6 +57,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index 98addee484cae8bb88d9038743c4ca39fdc20577..a87ffb9abc8380924c370c2b88f7b533a55d8fde 100644 (file)
@@ -62,6 +62,11 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
index 6081411105d26d93a34b87f76e9c59b386a55b9e..55757d2f7326c707d5565ab7fe6a25016d15d381 100644 (file)
@@ -66,6 +66,7 @@ CONFIG_USB_STORAGE=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
 CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
index ae7f6a49d7ee3fec41aeb120f931c9ad72d7edf4..11cd196cbd8dad2d9fffbb390f5a88649b45cb72 100644 (file)
@@ -19,6 +19,8 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_MTDPARTS=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_OF_LIBFDT=y
 CONFIG_FDT_FIXUP_PARTITIONS=y
 # CONFIG_EFI_LOADER is not set
index 12b768ca392d8f5e6781c7867bda591fa6871764..4427f727225c73bacd36f6475edbe5fadc03a509 100644 (file)
@@ -24,6 +24,8 @@ CONFIG_CMD_FAT=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
 CONFIG_USB=y
index c32c4a8e8dfbd6f280ef7dec207d8398e689cde1..e8d1a8447fb86f5f863378dee93d15898e4dcd31 100644 (file)
@@ -22,6 +22,7 @@ CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
+CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
index 10dbb7db823e6bd7b163f55e447b9434785a6c8c..646a3143815ed417ce754121c6ce61b575246000 100644 (file)
@@ -24,5 +24,6 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_DOS_PARTITION=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 48456b2974260d1d5b8054b88f7787087cf4abf7..b9751a07c6363e1d2b26516064bab7c6efc9fa36 100644 (file)
@@ -22,5 +22,6 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_DOS_PARTITION=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index b2013e1119681edbf93b7c390d8d66fcbaf4e766..4553efdcfbe52f7d856bfccb5485528944160353 100644 (file)
@@ -29,6 +29,7 @@ CONFIG_CMD_JFFS2=y
 CONFIG_CMD_UBI=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 0870ae42815b808f69494e1cdcaaf7a18377a136..526a9f3fd90ffc3eda3f2797ddaf36dc34c19c1a 100644 (file)
@@ -33,6 +33,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_SYS_I2C_MXC=y
 # CONFIG_DM_MMC_OPS is not set
 CONFIG_NAND_MXS=y
+CONFIG_PHYLIB=y
 CONFIG_FEC_MXC=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
index b3763e47a049e8d62004bc9f6aa6037f950a120e..d0189d2d42630b8d4195e4e4257222c485d5b953 100644 (file)
@@ -38,6 +38,7 @@ CONFIG_TI_AEMIF=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
index b8bd57c68cca739d0b0564eb9c0f28394ee970e0..477221c12495f18562f1bc8bdf02b7e957fba102 100644 (file)
@@ -27,6 +27,7 @@ CONFIG_TI_AEMIF=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
index 1eed60576cddf0bec52c45a54c674d649a14fe72..0065d34fcd093794b372b35a84fd357851d2efd4 100644 (file)
@@ -39,6 +39,8 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_DM_ETH=y
 CONFIG_REMOTEPROC_TI_POWER=y
 CONFIG_DM_SERIAL=y
index 51c701ed902dd1b2947609b50dc68c593a19c9ae..98b972581881578a24e196bfd70af22497118ce9 100644 (file)
@@ -27,6 +27,8 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_DM_ETH=y
 CONFIG_REMOTEPROC_TI_POWER=y
 CONFIG_DM_SERIAL=y
index 59cd9ef186159d37b51220f9e8e9ee63aa184bd8..02e100718f3d50399cd1fce9829349f052bbdc7f 100644 (file)
@@ -38,6 +38,7 @@ CONFIG_TI_AEMIF=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
index a85f0292454a425eb3904e7d3ee7d9b05799b430..696368f4f315cf1c029ad286fa2f1f93827e0243 100644 (file)
@@ -27,6 +27,7 @@ CONFIG_TI_AEMIF=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
index db45fe166c833e1e32ab706f1e79f54e20ac645b..76ae9b73997af8a062373d1d4c0fdac472d93769 100644 (file)
@@ -38,6 +38,7 @@ CONFIG_TI_AEMIF=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
index 564c5ae3adec9351f21d3d824c551d84dc23fa01..854b4d2850fc6b7e541d03b47001cd79e00f552e 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_DOS_PARTITION=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index 4b25ade380ada85a891940bffde0b75392568c24..c01d2af1a838fb07f1007f9331804b75bb468a11 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_DOS_PARTITION=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
index e6eef3f731448e59840639b42e26875a7320a6c8..b8cede2525c7d317b7d8a65c29d1712eb51ec6c5 100644 (file)
@@ -24,6 +24,8 @@ CONFIG_CMD_FAT=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
 CONFIG_USB=y
index ca4f73d04f6f3b1e389d99ea82eb16d78a461cc7..5d2e99d969783dd120bd748b540c1377fdeee291 100644 (file)
@@ -24,6 +24,8 @@ CONFIG_CMD_FAT=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
 CONFIG_USB=y
index 2be4819bcbf580a43a70da3026018b1b73cb175e..b69d519f46741532ee657e38e915ce582faee22a 100644 (file)
@@ -28,5 +28,6 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_OF_LIBFDT=y
index ed8681a71ed5b038418dd984ec74b8e93a52513f..dee026977ebcc9aee6d308ed90c8085144a62a4e 100644 (file)
@@ -12,7 +12,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index b1d1fad766623dcf90ea2ab21e33f999da6bba2d..1b5da4b51543e6f5aebe229e02411467d630fee2 100644 (file)
@@ -16,7 +16,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 4dfe58e69e10a29dd99f9b754c2c075789f1b838..bb03f935f18308c528b5e39c1ceb82fc03e1300f 100644 (file)
@@ -32,7 +32,9 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index f23511f07481448938b201efae5c3f74d15cf964..1cf0dc0e127916de793d8ad5b6f8476a8cda2eb9 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index f5bbd1d5dc5e8ecd6970dd089b117e942dbf8184..69551e78e859736a0cd9b97092113adee89d7189 100644 (file)
@@ -48,7 +48,9 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 794a591de9734d3dc613a09e3ca6f3d8146be45f..093b10938764347b3ca67117e23ad235015af43b 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index a11daca52190146548f2c68fcecfd9bd491f48f3..5171f2731fb3b37dc0a604bad8fdfc2c44f80894 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index cac1ba4896353710c7a1910ea13675ae70742162..ba3dccabc7e84621b305c1f6e5667e16c8b09b63 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index b776ea0d9052701b26bca0080df631919ecea761..eaa6397e2ab778beb43d024a628825d70d4c038f 100644 (file)
@@ -37,7 +37,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index df3fe93b45bf2e020f524de4e321968091ac6bea..12d30f1da2a373d69ac0739b36c0d79c4c68e507 100644 (file)
@@ -46,7 +46,9 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index ae55f00bb8a98d9aa84e99db63460bf8663dbbeb..13ab20a2a7ad3a9ffa8978bc976179a69aa380a7 100644 (file)
@@ -48,7 +48,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index c8cb2153bfdf6dec0a7dfaf780d44f4c92ed994f..a7c9ae16e75f34f6f6a2abd108976da2378baf2e 100644 (file)
@@ -31,7 +31,9 @@ CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 29d6ea19a6161f1a662adefd331846d3fd11fd8e..02b3030e81237298e6790adb16304d81e612b935 100644 (file)
@@ -31,7 +31,9 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index bbc73ad27fba0c5749bf65e4fd40bdf6fa2be9ab..24573d0848107e113da4c82768e2240d217cc984 100644 (file)
@@ -32,7 +32,9 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 7fcb1e3a56c88fbf6dfd242b29a734c0d54c5aa1..27e1dcf3f09ddcf4adeda8ba0d66f4c70f155bae 100644 (file)
@@ -37,7 +37,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 8689fa73368748037e7964f6932b7473577d6e4f..4e99c6976ac4cf3afc430e39e4c273e1cf0375d4 100644 (file)
@@ -46,7 +46,9 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_SPL_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 86473652764f75b57dc45f0135e1ae332455055c..9baf6543ddd633c6e2a0cd65dc2a02dc8ddcd076 100644 (file)
@@ -44,7 +44,9 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index b254f3b909ab8129400be48ffb7600693fca51a1..abdfb66f62f39c7913a94df8b8b11f09f92556b1 100644 (file)
@@ -48,7 +48,9 @@ CONFIG_FSL_CAAM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 4ce071ca02eeccc5e3c1bf99f270c51da406ab8d..147c2ae61d8b867238d4c08fd4dab1571b7e8dcd 100644 (file)
@@ -29,6 +29,7 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index 0d9cdbcc2fb8370d0c883880a30af5a851ede369..73ed2aa339da6fdffc2fe651b7bf3fe73a1da040 100644 (file)
@@ -30,6 +30,7 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index 598d6f781c447cc7ed1c02188502e49d8b76e14f..1223a8e8bf2a0947d996aa353867a19883bf1165 100644 (file)
@@ -44,6 +44,7 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index 5d0e0b7fe443145cddc60e1d62c3d5a148b3025b..c0bdb79ff434d7808237d32bdb632d6a9bb147b1 100644 (file)
@@ -30,6 +30,7 @@ CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index 4ffd150af2bed61fefd528a050a8a7a128e5ee28..8d1bd11cbf2bc0602c71a08b2f81b44c5f956dd0 100644 (file)
@@ -30,6 +30,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index 445366af3569e9977aae7769cd37388f1dd34a08..2765cc6d467a9009dfd7d4840fb26b2396540c11 100644 (file)
@@ -44,6 +44,7 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index af065530f2737b1ec5b77503ea0ee3702aa86dd3..a2e6aa7e34d52531fd963638f7f5b41c82b3666b 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index c7077fc809c21c920ce1ecfb335b258580a94fe4..216ed16b46e4101c4c2ad78e022c07a69d9628a9 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index a551867ef2a2409b6130ed0c52e133dc5ff97698..2639876c342b786bd6f66a12bb5ffdce79c5d57d 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index d694436df9e31218ebfc1e1415d0e7bf4fca3adf..df140073766e7235cd45facc1974ece1e87110aa 100644 (file)
@@ -41,7 +41,9 @@ CONFIG_DM=y
 CONFIG_SPL_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index dd6762d40a398de69c6ffe151b79a17e057d5820..5a372a93dedd1e7a4fc297e2463bdc1b963a2dfd 100644 (file)
@@ -40,7 +40,9 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index a96cc568326c3af30e45a6bd7e5a819d4c0d65fc..8791642c06dec6117d464ce372a9562c14aa35f9 100644 (file)
@@ -41,7 +41,9 @@ CONFIG_DM=y
 CONFIG_SPL_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 1b18179d43855be518265fabe64d8d1cf0616c45..ffea119b079015841bf0b8f2682e07f1166f33e0 100644 (file)
@@ -40,7 +40,9 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 08637e236fdd982c82a4cef71b5cdc391aac01d9..d6cc64d61ba572bc65df971d6d2871eda8d43d4b 100644 (file)
@@ -27,6 +27,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index 94d0ea90aeaf5e222fed533b62a941066ed47fee..2daff11c4bf42a1b2e5960a7daef9e7f38c7043f 100644 (file)
@@ -28,6 +28,7 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index 6fc5d6edb8d30ffdc4a0021697cdcc0f5e115267..c07df3a8d1f4038207239d90502bc79919a81630 100644 (file)
@@ -29,6 +29,7 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_DM_SERIAL=y
 CONFIG_FSL_LPUART=y
 CONFIG_DM_SPI=y
index 802c69c0adc95f1901e27257b3b1c2484a915732..2bf7e0e82522b88b36d0518219b04c1c0b8a032b 100644 (file)
@@ -34,6 +34,7 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index c47be08437c767c50af1660b37c3d8e823f24154..321a3f418faa7578f784bf2e0597c0e00d9d02eb 100644 (file)
@@ -28,6 +28,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index f93854ac8feb831bceee016967706d61e137068a..bd7525e65a3277e714b4ce3fd14ed5eb49e01a1e 100644 (file)
@@ -35,6 +35,7 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index 62a9b2eaaf4c41611aedfefa242f7e4d31aae328..6e965eb86bb8dc4a68439672c00462039b1df21a 100644 (file)
@@ -34,6 +34,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index a315ac1b24c1b3bded0c55facaf84dd713d1c806..cc1046ce8186571548b4ff16380bc7da10fdf7a9 100644 (file)
@@ -31,7 +31,9 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 6d40587eeef3d93b7f3db726dca90e20f7808516..bc0b2941b2f3f8c67f653bb7e3d2afbe37298ca6 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_CMD_USB=y
 CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 1dc74debe72482d1902a939a342c7886ca7406b6..98a88c4f0ef8ca99cb4ae34c2ddc56476323f88c 100644 (file)
@@ -26,7 +26,9 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 9fdc4379ccc73c95357f43ed4e248b9561967dc5..ed9d44531d835b1eaf83d4b6d46e1613668f69e9 100644 (file)
@@ -32,7 +32,9 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_SPL_DM=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 16cb8f1f006d3062dd99a33c5e1513e3e174dad5..8b244264b4b9405d0a26d0b626bc8cf5de19b0e1 100644 (file)
@@ -32,7 +32,9 @@ CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index a784d7aac1e4cb16a21b2ecbd08aea588142f73e..aace6b4c2fece4eb7498e321175f59f6f22ec2a9 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 0cb377adf762fade1494551d04a39a646bcc80f8..d8d2f4ac233a1571dbaf11336c0555fb548a0e33 100644 (file)
@@ -26,7 +26,9 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 1cae676adc0c647b627965fb60d39194815a2b50..76e571b70f0ab463d0d258dc1f4ac18a91051397 100644 (file)
@@ -37,7 +37,9 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index a4b22e4cad0e10fcf2fd825e2802d7c265f32060..5560d1a4fd058f25bf31981321e058a1305d3d8c 100644 (file)
@@ -27,7 +27,9 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 798f3bddac4d978f7c43d618441b6c0b5de9084e..55fc51fbacdf83fb226ae4c697ed865e7de80d80 100644 (file)
@@ -34,7 +34,9 @@ CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index a3d4322344bd4c3a7a1861241b05709f36a7c519..b035e57062db737ab2b0a5e3bfbec60b3bb8f413 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index fe4bb27992351cb4a23000e5941f0b529140acc9..ad63173e1b230ac57fde5a65817b11c029062e2c 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 243fcc8dc530e11bf28dfbe9c661bdfa4d5079e4..dc8c84778b1a49949694464c32940facb71726de 100644 (file)
@@ -33,7 +33,9 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 21fce98af771dfa2960c32b1366fafc3d81aa8a0..7b8718e8dcb324cbd99bb51329a3777c290d338c 100644 (file)
@@ -25,7 +25,9 @@ CONFIG_DM=y
 CONFIG_SCSI=y
 CONFIG_FSL_CAAM=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index 4addbaf7dfba0dd7af6cc49dac4287e65a0a146b..860e9c601c24727d36602a3e5eb064a1e3ce9e1c 100644 (file)
@@ -24,7 +24,9 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index eb9ee548824a2d6b7ef7252911d0c89813067593..061c5883ba262c4b351f2fec5bfc306f4161c4fa 100644 (file)
@@ -38,6 +38,8 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 # CONFIG_VIDEO_SW_CURSOR is not set
index 080815d77d9a9114a7e7eca70c932fa804935742..54b8d7e58a643518f81d341fe97ce676d91038f2 100644 (file)
@@ -21,6 +21,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_DM_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
index 81d6c9215798f348440017f616f776767857d7e6..ec4b47ce599aedd38a191934c4423f306849d69a 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
 CONFIG_DEBUG_UART_SHIFT=2
index 449804b43d58f9a0182ccb4e221cf2b1380f7a6a..93e582e20964cf0497db8d7a372be03bc6a81990 100644 (file)
@@ -34,6 +34,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_DM_THERMAL=y
 CONFIG_USB=y
 CONFIG_OF_LIBFDT=y
index 653f2588dbb0ef1200d68135b8b6b8ca89431b57..5a75292a457aad603933bcd69e2c423b541e360f 100644 (file)
@@ -35,6 +35,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_DM_THERMAL=y
 CONFIG_USB=y
 CONFIG_OF_LIBFDT=y
index 3d84cf24aa7580d391b2d947241ecf6251c59a1d..12dcd007670855047766cfa2f85c0a5d4f098e8b 100644 (file)
@@ -36,6 +36,8 @@ CONFIG_OF_EMBED=y
 CONFIG_NETCONSOLE=y
 CONFIG_SPL_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_XILINX_AXIEMAC=y
 CONFIG_XILINX_EMACLITE=y
index 0dcdd3bcbe4b722c588c21c5aefd6cce92392cca..93031800d0cca975d9640f3d31f75d0a8f5ec4ba 100644 (file)
@@ -13,5 +13,6 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index f0b196abd7ade83ee54d35fa531c806f9daccf58..aa4bf2ada61ecdf3f31c8e3a64436c72cc4bc179 100644 (file)
@@ -51,6 +51,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
 CONFIG_MVEBU_COMPHY_SUPPORT=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ARMADA_37XX=y
index 7f4ee052d34477cb7421fc496290b35a07471d42..67ce751b340138ec2378be9682b3e76ba354fe13 100644 (file)
@@ -50,6 +50,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_GIGE=y
 CONFIG_MVPP2=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index beaa1cf6924179ea0b27b80625b45e37b43dbfe3..66dcac99a757c9892b127b087926088bf79585ca 100644 (file)
@@ -49,6 +49,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
 CONFIG_MVEBU_COMPHY_SUPPORT=y
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DEBUG_MVEBU_A3700_UART=y
index b533f736c5678aef6bee617c6211dea6ce82e774..92763c927919ca82c8b587865584b5ee5853c164 100644 (file)
@@ -54,6 +54,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_PCIE_DW_MVEBU=y
index f0b6679ece6d88f2f142bdaf4c04f6e518889f62..766a12c1d1cc5b006542d17311c07fe4b9b31f6c 100644 (file)
@@ -29,6 +29,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 # CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DM=y
+CONFIG_PHYLIB=y
 CONFIG_DM_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
index 47c2b15e1c093bfa972a9a0a6771ece089b8de5e..873199261ea9ecf044213c4eac7d2d5f03773ece 100644 (file)
@@ -35,6 +35,10 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_DM_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
index e834eb1e88db3b07d33cd5d923821f4b5f9754d9..98327942c93b24342659468039a91e74ec3efb5f 100644 (file)
@@ -44,6 +44,7 @@ CONFIG_DFU_MMC=y
 CONFIG_DFU_SF=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
index 627bf523d6e46f1c31cc8a7dc35d5a74dadc6c7a..e42e9c88cd173ed2190838a776c56ce13f3922b6 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_PCI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
index 5676da10d6d76763936c884f557c53f6dbdee578..63867deb5264a593fddb276c07a5fe0004e77c6b 100644 (file)
@@ -35,6 +35,7 @@ CONFIG_DM_MMC=y
 # CONFIG_DM_MMC_OPS is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_DM_PMIC=y
index 9260677950f33f38b5585ff46c7003db05a044ce..e4dd692ceada432bdd8fe5ce18997a5d0e429947 100644 (file)
@@ -36,6 +36,7 @@ CONFIG_DM_MMC=y
 # CONFIG_DM_MMC_OPS is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_DM_PMIC=y
index a241adedc51a012cb4bfa0dda8b1f95f7895ab5d..215bde61f6d9aa8efe6d593c4d14a97c7edad2d0 100644 (file)
@@ -36,6 +36,7 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_DM_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
index a9e94c2c2656279a7af39bd8979810636c8ff930..84dcbbe7bede921d4c60219e669b61da80913449 100644 (file)
@@ -38,6 +38,7 @@ CONFIG_DM_MMC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_DM_PMIC=y
index 2522eb770b77b3c053653bc412efb2e482646010..ed38c68448e1a81207a15d5ebfcc935fcd23e5eb 100644 (file)
@@ -29,6 +29,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_PHYLIB=y
 CONFIG_PCI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
index 90daa96a366340c7e97258e981ea0cc2f09fd54a..93108a3545d1047d36d8a102a31e8d643bf0f5f9 100644 (file)
@@ -38,6 +38,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_PCI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
index 87419cdbfebca4db857834025cd2433774521bfe..11e6018230eded567a63ce37a58f945332b38d29 100644 (file)
@@ -39,6 +39,8 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
index c58f6dca1e27d68bf241d6fab886f3ba1cbf8878..a512ea96cb2282409492245e00e088e1433105c0 100644 (file)
@@ -39,6 +39,8 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
index dfe55ac59e553710797c0fb2f65ce1e37c8f0a9f..a5e3b1865535e32aa079f591f06d2196c6ef3f99 100644 (file)
@@ -48,6 +48,7 @@ CONFIG_DM_MMC=y
 # CONFIG_DM_MMC_OPS is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_PHYLIB=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX7=y
 CONFIG_DM_PMIC=y
index c678e7558ac1cfff9d5e37b00e336bc84c0cbbe9..4e53cd813ddf1e978a6c4eb5b91a9eb70712dc0b 100644 (file)
@@ -50,6 +50,7 @@ CONFIG_DM_MMC=y
 # CONFIG_DM_MMC_OPS is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_PHYLIB=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX7=y
 CONFIG_DM_PMIC=y
index 9b8914bf18db0c0b1ca39f8e32744c2d27f37cfa..3b476ca211388f7098acc75c5a03a69d03d74751 100644 (file)
@@ -33,6 +33,10 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
index 21a8f3ad3acf7778133a2585b1a286da1e17813a..51a94f09db26481875087cb1dd38be01aa1063f9 100644 (file)
@@ -33,6 +33,10 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
index 5c112547907ba0568e9fdc80f9b570da776fffda..2e37a92a460e25c9bbb655577e7055e6dbc1c498 100644 (file)
@@ -34,6 +34,10 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
index 33c9cdbc868390dc9b293fcc47d0f4d31706a974..b432b95a7368db6c48f2b066297baa8b6c50642f 100644 (file)
@@ -34,6 +34,10 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
index 944afc58e5ae2ebc39dea8606a0af42b4232c465..4e39e09c73fce7a7c2183d27ea69d6890e0fd639 100644 (file)
@@ -33,6 +33,10 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
index e8c19687b9c75d379932e1811bb7c5cbf1ee822d..436574425f11f827d034316960fc091eecbe3c60 100644 (file)
@@ -33,6 +33,10 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
index 23c186b21a0ffd542b09076d3ae4527db8741379..9ffffe010b5ca7d2584eb170a80a6b59cefa2822 100644 (file)
@@ -34,6 +34,10 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_EXT4_WRITE=y
 # CONFIG_SPL_PARTITION_UUIDS is not set
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_PCI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
index 3ae27da0d4e768cb5ee779b149aa52f985f09177..8d40e521200c311333f93f5d24c8b78ecc3c4777 100644 (file)
@@ -30,6 +30,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_DM_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
index 50be46849e1c8708fa44686337afec99131ac540..34331ca372cabbdb4cde2e929e31399a1b109891 100644 (file)
@@ -38,6 +38,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_DM_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
index 6571876f240ee4eeb5443a1b39ae7d2c3fd88771..3e6121636dc87605cfefe6bb8b9cc2d6ffbb6c15 100644 (file)
@@ -52,6 +52,7 @@ CONFIG_EFI_PARTITION=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index a622359f243216107898acdf2a304498e3fdd438..f921a9d0ec191cee3852dc5fb1b690c26a62ce6a 100644 (file)
@@ -52,6 +52,7 @@ CONFIG_EFI_PARTITION=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index 0307ec1316b74e50b0432b5013988a75b565512a..201d2aeefa7e71d13dae2ddebb9bf94d0c92959d 100644 (file)
@@ -28,5 +28,7 @@ CONFIG_DM_GPIO=y
 CONFIG_VYBRID_GPIO=y
 CONFIG_NAND_VF610_NFC=y
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_DM_SERIAL=y
 CONFIG_FSL_LPUART=y
index 0be4cd2cb5141aea410f51f6b1105a03418b816e..8fa5bfbf1eedb2f48d090b5496d0ccf1baeb07e8 100644 (file)
@@ -49,5 +49,9 @@ CONFIG_DM=y
 CONFIG_MTD=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_DM_THERMAL=y
 CONFIG_OF_LIBFDT=y
index 27b3b0b307b3ac4423ca3b70dd73caa7d60f11e7..aca3f46dd32f6c264b41da4eeaa53c435ca2776f 100644 (file)
@@ -53,6 +53,7 @@ CONFIG_CMD_DIAG=y
 CONFIG_ISO_PARTITION=y
 CONFIG_EFI_PARTITION=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index 106be0d391d6bbda909692e4da2afe1f327c8e6a..a7e057499acb874ec08e3789ed3fa10a03bcf721 100644 (file)
@@ -40,6 +40,10 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_ISO_PARTITION=y
 CONFIG_EFI_PARTITION=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_SYS_NS16550=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
index f19b2fea84a5ea27584bb756f6c8e97e4e357d3b..19f8fc4b78761384a90c5bb0a4b8d5de8350610e 100644 (file)
@@ -27,6 +27,8 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_DFU_MMC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
index f011b5c253bb6630cc2d5c1bae9bd17371ed69cc..02d990bf6b99c9a9697f7224d9937df49d867681 100644 (file)
@@ -22,6 +22,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
+CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_MXC_USB_OTG_HACTIVE=y
index 0ec84804427f5b13324b9f39ba1471d1a1b35d32..dba4cfb37869b7084476a73f95c4ca89a566879a 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
+CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_OF_LIBFDT=y
index 8e93e17229b1ca85b52e8651c460e84d7c54e6ef..93967ed50f18b1b852cae445fcd9fab68c4db6f2 100644 (file)
@@ -40,6 +40,10 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_OF_LIBFDT=y
index e90fbf1137409c3590dcaf4945f9d204fb307f29..6fbcffae8eb12c381b3df19da511d36afba9b772 100644 (file)
@@ -24,6 +24,8 @@ CONFIG_CMD_FAT=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
 CONFIG_USB=y
index f999561553dc488fee429281a67818c92f83bc83..5877f93cb070b358e023d9af30eafab032d82260 100644 (file)
@@ -61,6 +61,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index 91b36058bc7035c0d6f69debf148b3ad87317987..4389a5152fb496ea8d2239ad50393c42f48c3f68 100644 (file)
@@ -23,5 +23,6 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SCIF_CONSOLE=y
 CONFIG_USE_PRIVATE_LIBGCC=y
index 1a11099e0c40384aeb7aa3d5e01526c3145b765e..127a4ed31f23a3795a3c4ec4323136b93701b1a2 100644 (file)
@@ -20,6 +20,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CLK=y
 CONFIG_CLK_RENESAS=y
 CONFIG_SH_SDHI=y
+CONFIG_PHY_MICREL=y
 CONFIG_DM_ETH=y
 CONFIG_RENESAS_RAVB=y
 CONFIG_SCIF_CONSOLE=y
index 2c8e7ddb999fc698bbb5c55b122c7532b18ff73a..2cf54b393821e064b531d196092e59f97331fb31 100644 (file)
@@ -21,6 +21,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CLK=y
 CONFIG_CLK_RENESAS=y
 CONFIG_SH_SDHI=y
+CONFIG_PHY_MICREL=y
 CONFIG_DM_ETH=y
 CONFIG_RENESAS_RAVB=y
 CONFIG_SCIF_CONSOLE=y
index 600417d062b898d1af2b389a08acfc5af5f57f7d..a6deb7dd14368caf430a7911e99f5d19feb73d7f 100644 (file)
@@ -57,6 +57,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index fb9e9b0fc3ea503bcd7f0fa5e5954183dd9193c6..04b265336abac195e5e98ace8ff72008d245d304 100644 (file)
@@ -21,6 +21,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
 CONFIG_DM_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
index 27c14e15101210410eb7a4d4833f73992059e930..fb4153c31bc46d17f337e9a11ddf2718585eebd0 100644 (file)
@@ -62,6 +62,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index a79908ae019aad3b6f643733acb238894518d4e8..80789f08ad020c278b8b740374ae397d0bffcdeb 100644 (file)
@@ -12,5 +12,6 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 0d43ba425ac6f8662fc65c01b3e3e74343003283..abfedbea58553494584718e2e88c572aef549b24 100644 (file)
@@ -12,5 +12,6 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 5dd16034cf296ff1e517e9ec753e7f905d373bd1..77955185433b4ca2dffffa642dbf54d6b5a83f26 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 6348f7d2e49b1d75cd12c81177372a2d125c05ee..f351271f7d5969159692171d1b0a912bf6b0ce54 100644 (file)
@@ -17,5 +17,6 @@ CONFIG_CMD_PING=y
 # CONFIG_CMD_IRQ is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index acb3092b7c26ba3820f8cb74bb8f1b667fba428d..c30a1d22bcd3339fdb7e5f988fb79e83c103a50b 100644 (file)
@@ -17,5 +17,6 @@ CONFIG_CMD_PING=y
 # CONFIG_CMD_IRQ is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 195d472e6726b26000628e85ed02d3b7351e7fa4..edd030951fdda9a89cdfaa243a961cafdff9bed8 100644 (file)
@@ -17,5 +17,6 @@ CONFIG_CMD_PING=y
 # CONFIG_CMD_IRQ is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index c107213d8c398d668eea2551eec709638aa30678..8d9a47cc644d3ff374a736a846dd713e2f34e1c8 100644 (file)
@@ -17,5 +17,6 @@ CONFIG_CMD_PING=y
 # CONFIG_CMD_IRQ is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 185825efc941d2ca321a40a1a69b474d90aaa45e..c31ee2ea978e64fb81b630a53848fc50ea08236e 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_CMD_PING=y
 # CONFIG_CMD_IRQ is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 200500f2f646483a9b505489184b9ff02cafb352..7174e0059f17e0c91dba7b5a394f12091f22aabb 100644 (file)
@@ -12,5 +12,6 @@ CONFIG_CMD_PING=y
 CONFIG_DOS_PARTITION=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 43204210f40153539b8aa3b4ecb83d4066d95ff4..44c5f51b8dbbdf8e9b76e2eaf2b162ee29f7d454 100644 (file)
@@ -24,6 +24,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MMC_MXS=y
+CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
index f06f32214d0483be0dcfa6098d27485a2d9f4c07..060f463c51830a727ce8d38c061e8a889b2edc57 100644 (file)
@@ -23,4 +23,8 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_OF_LIBFDT=y
index 124757353bf41c8f85f6969eaf759993289bfee2..1449e30351ad6e46abff0092683f0abc84186c64 100644 (file)
@@ -29,6 +29,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_MAC_PARTITION=y
 CONFIG_DOS_PARTITION=y
 CONFIG_MMC=y
+CONFIG_PHYLIB=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
index 68e0c5cdfb59ca8ad9635a0a1586db83d7a88b7c..7ba7e0c1ec5bdf24d981eb98a67d7d1390064541 100644 (file)
@@ -28,6 +28,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_MAC_PARTITION=y
 CONFIG_DOS_PARTITION=y
 CONFIG_MMC=y
+CONFIG_PHYLIB=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
index d43c0184e462de58313dea99d3b2f104e1be4d6d..a1ffd2a91e71934b0cc2e88595d3415a4cb1c503 100644 (file)
@@ -29,6 +29,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_MAC_PARTITION=y
 CONFIG_DOS_PARTITION=y
 CONFIG_MMC=y
+CONFIG_PHYLIB=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SCIF_CONSOLE=y
index 32cc565b5e821e820cad7bd8bca390533ecbcc24..d5348f828a67a7475b7f3e43dd7d961edc26c35c 100644 (file)
@@ -24,5 +24,6 @@ CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_JFFS2=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SCIF_CONSOLE=y
 CONFIG_USE_PRIVATE_LIBGCC=y
index d2d20b9b96f6d12b2b92d19582272863e530ffab..f25eb9dcb4eeb004defa16c5fdde24fa02dad2d9 100644 (file)
@@ -24,6 +24,8 @@ CONFIG_CMD_FAT=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
 CONFIG_USB=y
index dd83b75095f3d622226e434e60cc80275ce9479f..1db2acc7e7daa7854dccac557cd0be8e1c582765 100644 (file)
@@ -41,6 +41,7 @@ CONFIG_CLK=y
 CONFIG_CLK_AT91=y
 CONFIG_DFU_NAND=y
 # CONFIG_MMC is not set
+CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_GADGET=y
index c0cbd72417e9ff1c4cc931b3e8651970e8a452d4..fc60f1d17104ebe985b094cd5b1376baa21e5286 100644 (file)
@@ -52,6 +52,8 @@ CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
index 45bed87b93879f609fe86f8f4679f43bd5b4b061..e69d768b79d64a3818337cbe781b18cf7127cb52 100644 (file)
@@ -52,6 +52,8 @@ CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
index f56e45e7275f44bff82d8b54ffcf019529a6d727..fbb8f1208fbbe210290e432c55e27fde521f7d1b 100644 (file)
@@ -46,6 +46,8 @@ CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
index 2e7a6339fb89760266a8b9ec9746f4e1d19822df..5de9c172db70d06d2f87db6c9cef0dba8a5900bd 100644 (file)
@@ -44,6 +44,8 @@ CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
index a121a07790ded80b0a0f548971a073fcd23e6f5e..0fe0cad27354f48428e9b9502b0dd4079f5ced7a 100644 (file)
@@ -45,6 +45,8 @@ CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
index 9b9b929e02d45332b322d5d0cbf0d29c21ce7a00..7d3e6533391c2734ca7693c8dfebc8ec953fb590 100644 (file)
@@ -43,6 +43,8 @@ CONFIG_SYS_I2C_DW=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
index c7faa96f82d373cc7885f450285f178eb09c88fb..3e0469ff1494ed66432ec093c820fb7a39345b49 100644 (file)
@@ -46,6 +46,7 @@ CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
 CONFIG_CADENCE_QSPI=y
index 493048e945b45beac4d63bcdabfaf33b90ad2c4e..d8efb6f5ef773aff9b2262808e99c37e999b57e7 100644 (file)
@@ -52,6 +52,8 @@ CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
index a26be88b8a5270a84a841683c490ccc3b8337a0c..a338bbd64de4649ac074019c80d8f60a11fd8311 100644 (file)
@@ -52,6 +52,8 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
index 8ee049812f98eade98da54ef06c81363ad6be41c..65fbc9fa4e7e804de805bdfb410759d09acc00f2 100644 (file)
@@ -52,6 +52,7 @@ CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
 CONFIG_CADENCE_QSPI=y
index 5f4c3025469cf3589e234427daf698603a4f98f6..359c6c14b2b71d0e7d462a9c2f0178aa3cb0c201 100644 (file)
@@ -67,6 +67,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
index 4c55b8f33ecf95927dfd55e0770dcadc1f5d3570..d5294f33a8f83952f16fa6789a17e3381a3cd1ce 100644 (file)
@@ -27,6 +27,7 @@ CONFIG_CMD_EXT2=y
 # CONFIG_CMD_IRQ is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 # CONFIG_USB_EHCI_HCD is not set
index 7c32b71bfb8dd935c6a4553427b04ac011725ef4..4814aa81948ee4e7397ecc59459b6e060fedbdbd 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index 7e15f150cfd0a8598afffe7d6232d2ae4909994e..42a7434fc898afa0c69a837b15d4cbd8f9f46a7a 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index 28c594d741b8e3c1402ff5330e91d0338fce7a47..c5d476102b1b9b9a499973b3d099daa848fb8aa3 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index bcd6abc815c522175ad90ec664cde02295fb7e71..035a5921604760ae7f6b5eebbae08ea1047f0743 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index 8dbc8a6ffc517e7676289b3d2e0c9c30e33d013a..2a2efd99aaf0a57da20960aac39781ed132e06f4 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index 9a9c959cd011fdfa85f0a41d054406c55847ea3a..f38f8b49cbc7ca45b612fbe8818f78d386a6927d 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index d1955f08ff4d4a31ee7f880a8b55912cbb7c6c99..6aad21ce0a6b78327eb00cbac86204695db0df01 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index 8eae19a483c689a9818e63c21b43560aa830a434..5de447b9d86c44b75a95f70b17dd6adf216d6a64 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index b3640a96731b932999e34a1b56536b461bfd30f8..ed2b7b0e6593667f5febfb9ff62605385418e09f 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index d31c28309fbbcc059a553f2f209bdaefc7f19307..e595e7bcc07f0ccae2f668fdf5294402fcf04b47 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index 6caf3f69923ae2c0c0e1b93025b7723038c868e9..abe0e8d06bf2476eb13fc07f094f1eed8166c7b3 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index 649a5db72739434b0ec22801dd7c09df73fd7aee..afecca361426527512f39a89f74beee31c2f9523 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index e1874bcb0ea18794e6048c1c896f210e2d2308a8..ba5a247e02a5d77835d7885b3378a760f6bf570d 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index cf26003268234a6784ddbb0b5bebab8f50962a85..cf6b3c9745e3d056b8269b3b3bc8bcef2351f4b6 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index 9e7822c11321cd9bc9564dd07b1630c7bd497523..f9ab39f095e20a188ad3e54b31f5eefce2a534d8 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index 578067845d0ed0fcedf4fb97bd585235b2bb591d..8aae75caeb9526e38d0e1a8066387927c9208fec 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index 00c9776d22ac5b16bd7bfe79bd1685f8af2eddcb..f12d03e5cad71c54827b0b40b238a41380c43667 100644 (file)
@@ -19,4 +19,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index 3b9500818e84b943d48a6449f4c93c69f812a44f..4d348d404a0ebebdb67ba0c958e8089156323e56 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index 4e8339340b6e45013e8264e708d21f6b5939e051..c923582f027d7345f13865fb0b069731646a2b61 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index 718cfa7e5bbaddd86b19d9fc86a5752bbef1c4c7..ffbd4013de4eaaaeb9498eb1dcc2eb7b109c820c 100644 (file)
@@ -16,4 +16,5 @@ CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
index bee7401d7994ac7f3c1f1f48ff0b927fb263bb09..ec2bec932678d07099da21385d9571888572ebe7 100644 (file)
@@ -24,6 +24,8 @@ CONFIG_CMD_FAT=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
 CONFIG_USB=y
index d293d39d7ba615be37f9f85003dde07c34fd8c16..68a38e0ba9a534f1fd9bf852029f4f7280c01602 100644 (file)
@@ -25,5 +25,6 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_DOS_PARTITION=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index e0040e9e3878351d82c9b5afd22746e798d905f8..3adae55b798dbcbba282e1248285168b7ef64162 100644 (file)
@@ -25,5 +25,6 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_DOS_PARTITION=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 7d372ffac7c63e1570992c03f59f2a8bb51319b8..5d620c575e492ca41b10df20525de62770f7ed0b 100644 (file)
@@ -25,5 +25,6 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_DOS_PARTITION=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 5d304b3f8b72db98106c8001d15cb0e2faec2e12..7bba84ac991a592beeb9d87f3ff16da5b4c8dc99 100644 (file)
@@ -25,5 +25,6 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_DOS_PARTITION=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 69406966ebe63ffabdc5b256d77bddc19d4deeb8..f03e6597c1a77cd45f858d55e2846b290a529eeb 100644 (file)
@@ -23,6 +23,7 @@ CONFIG_OF_CONTROL=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_MICREL=y
 CONFIG_NETDEVICES=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_CADENCE_QSPI=y
index 177b198e6f0724bdd9085340edbf53689b7ee6dc..09cd284eda93aa28c1917c5681aa4a32eb85fe08 100644 (file)
@@ -46,6 +46,7 @@ CONFIG_DFU_NAND=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
index 011c8762c96e526d648d46b33af035ba0fc261ee..5b3c84bd5c7bce12477368c9d9352249b6fe66b0 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_OF_EMBED=y
 CONFIG_DM=y
 CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
index 15531e4ac3bb36f654daf5593213fabc4d23d5ff..a6783e036cb243b661214111067caf25a0402def 100644 (file)
@@ -36,6 +36,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_EFI_PARTITION=y
 CONFIG_DM=y
+CONFIG_PHYLIB=y
 CONFIG_PCI=y
 CONFIG_DM_THERMAL=y
 CONFIG_USB=y
index 4d079292b3947b976c1c5002f121ead28bb83b8a..375b8e9aa7052a2c3ae7a53520d794cc2d3a9170 100644 (file)
@@ -50,6 +50,8 @@ CONFIG_DM_GPIO=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
 CONFIG_PCI=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
index c523b040aeda6806f80ba230678e95d3d4452551..07793c0fc6a72a750e695756c73e8e05262958af 100644 (file)
@@ -57,6 +57,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
index d314e50c7176eb6e4600bfc67745ae9766deb8fa..442af05ab7aea0b4dc4ddd98f96c249df232eaf3 100644 (file)
@@ -32,5 +32,6 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 64ab5597530760cabf01bc5454a1a8140b062c3a..85d1fab2df8973f235be721f2c05dac71af30d82 100644 (file)
@@ -28,6 +28,10 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_OF_LIBFDT=y
index 3caa1d4897e4d119cdc6afac66c8bd20a5fd39f3..2469d0b54231cc1fa4830de9ed11b325cc4a3e55 100644 (file)
@@ -35,6 +35,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_DATAFLASH=y
 CONFIG_SPI_FLASH_MTD=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_AG7XXX=y
 CONFIG_PINCTRL=y
 CONFIG_DM_SERIAL=y
index 4e918a875dc28e3540f069245bfde8d223eaed30..50cc1fe2a71c56aa60cf17e7752aa01a6cc7827f 100644 (file)
@@ -31,6 +31,10 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_OF_LIBFDT=y
index 35b26a3bfb519316b68d3cc587a104d08964765d..40e4987d4765b1be852cd9b93e8065d99ac51c46 100644 (file)
@@ -32,6 +32,10 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_OF_LIBFDT=y
index 75a88747dd067e28325e152f59e8afb3438b5a9e..faa608aff35544c57eb2928a00d13be60958515d 100644 (file)
@@ -30,6 +30,10 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_OF_LIBFDT=y
index e2738097f14b8858b22e540ad1435571a1bda5d3..a9e400bb296fb50869f06bb0cb1c32dd010cff77 100644 (file)
@@ -31,6 +31,10 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_OF_LIBFDT=y
index ba5525b10ba70cf4872e826c229aefb54f3d1f8a..09cfdcc533a2a5e41ae005ec35f69db536814e1e 100644 (file)
@@ -31,6 +31,10 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_OF_LIBFDT=y
index dac174d136ce8b389ba4bfda6daedd86f8b8ecf8..8ef0bf0f9de6a662fd7eb416c9559b552fcabfc4 100644 (file)
@@ -32,6 +32,10 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_OF_LIBFDT=y
index 8cde18baee814d14d163fe4147f3536e2f696496..21505373520c9b25426b960322a2e27dfb20aec8 100644 (file)
@@ -53,6 +53,7 @@ CONFIG_LED_STATUS_BIT5=5
 CONFIG_LED_STATUS_STATE5=2
 CONFIG_LED_STATUS_CMD=y
 CONFIG_PCA9551_LED=y
+CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_OF_LIBFDT=y
index 41ff4d530f52018ccdc1016bac76f808b42cd5b8..58156c4fb6c9bca4600b6a7bcc99ba5fbdd1bdd3 100644 (file)
@@ -14,4 +14,5 @@ CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_FAT=y
+CONFIG_PHYLIB=y
 CONFIG_OF_LIBFDT=y
index 2eb3d84972fee872ae6774f3d0ec30fa93a235b1..6012499339f24ac655d2fb9596b84596c1f8f326 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_MISC=y
 CONFIG_ATSHA204A=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_MV=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
 CONFIG_DEBUG_UART_SHIFT=2
index 794e00c414d7fbb8b2326a61211509d8d019f781..0e32fb82abed763819635d4d90fecc61686bf668 100644 (file)
@@ -31,5 +31,9 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_DM=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
 CONFIG_DM_THERMAL=y
 CONFIG_OF_LIBFDT=y
index ecc03fcaa90d98922e93d7c8e0df69a815b92095..70b32b783261308d3e38950ca3e6b2f5d2ec1bc2 100644 (file)
@@ -23,4 +23,6 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_EXT4_WRITE=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_OF_LIBFDT=y
index 5d601d950b67ac612a417398358d5fd8400308aa..9a9d593f013e6e041dc74ba786d3db051d0af249 100644 (file)
@@ -14,5 +14,6 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index f7f10a82b2fd7db831f93baef2e02c4d2fae3f1e..5f2fefda7103fe7705ef154d32fb7df3b7440776 100644 (file)
@@ -27,5 +27,7 @@ CONFIG_VYBRID_GPIO=y
 CONFIG_NAND_VF610_NFC=y
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_DM_SERIAL=y
 CONFIG_FSL_LPUART=y
index 1f884c54f179344f80e82a7e15cce20b77a14827..2454f32479afa179dc49eff17baf3d80279892ec 100644 (file)
@@ -27,5 +27,7 @@ CONFIG_VYBRID_GPIO=y
 CONFIG_NAND_VF610_NFC=y
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
 CONFIG_DM_SERIAL=y
 CONFIG_FSL_LPUART=y
index 0099cabc823632e8267917d3b707500439e5067f..c54cfe34e26a559d714b93c21b1599f13b3011a9 100644 (file)
@@ -27,6 +27,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_EFI_PARTITION=y
+CONFIG_PHYLIB=y
 CONFIG_PCI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
index 244dc7e34f7b08d4e4fde6d49087a4a7f44c0ff1..b1769933a0dde81bc06738f89ed39a41f991a187 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_DATE=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_BAUDRATE=9600
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 68916a4230b11265e5882cf9df397da7637e2039..fdc135bbe4a7fd5b118daa6a6af5d132cde27108 100644 (file)
@@ -30,6 +30,7 @@ CONFIG_CMD_SATA=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DM=y
+CONFIG_PHYLIB=y
 CONFIG_DM_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
index c09f41f102ece6eb942258ad8e05821e4c6b2a7a..5e4a73c8b1deaae9883c8743b2b124d137a878d0 100644 (file)
@@ -23,3 +23,5 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_EFI_PARTITION=y
 # CONFIG_PARTITION_UUIDS is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
index eabe725fd22b41bfe345b21527c1a5c2cfd66e34..458e97cacc039844918346e08f082d1b514a4a56 100644 (file)
@@ -34,3 +34,5 @@ CONFIG_EFI_PARTITION=y
 # CONFIG_PARTITION_UUIDS is not set
 # CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
index ba2474c3a94bbd0601e4f69cedefb97f275bacfe..8e7f6c864d77776f264bd0a0b487265f2b032285 100644 (file)
@@ -31,5 +31,6 @@ CONFIG_DM=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_PHYLIB=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
index d46289179f82f60d0d767d996c59840ee4b20792..98b18806b5c9b09cc29470f5258f31a379dc25a3 100644 (file)
@@ -36,6 +36,8 @@ CONFIG_CMD_UBI=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_NETDEVICES=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_USB=y
index d3ae3ec57a8dabd664a31406f71b250dcf900e09..44f71ac29fde73a60c3c57b2654d9c6b46fdc4b0 100644 (file)
@@ -63,6 +63,7 @@ CONFIG_NAND_ARASAN=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_BASE=0xff000000
index 8c4931f20df00fd8dd8407add0cd9495fdc81da6..dacdee35f91c5d20a7bf0fa0aba5043796100db4 100644 (file)
@@ -54,6 +54,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_BASE=0xff000000
index c4d8c970751f8ce2aeacd85357220de3d01a24b9..14dc5bac8a62aff01e32ae17ab53c2b6b1cabb62 100644 (file)
@@ -53,6 +53,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_BASE=0xff000000
index 8d0752a275426af665afcdbcabf1cd7c5faa5da7..b7ed38c7e21a98117963236a74ac410387f1f211 100644 (file)
@@ -41,6 +41,7 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_BASE=0xff000000
index fc14459d3c569dedd36220b54998e3b1f3975ac1..072155d2a9199da45d5dbd439a9d6bd989c0b442 100644 (file)
@@ -56,6 +56,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_BASE=0xff000000
index bc9b14e2fbaf60f3b763da5821c5f20704b7d173..7db5a8e3c4e438302ad4d33fd69b0bda40d711e1 100644 (file)
@@ -56,6 +56,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_BASE=0xff000000
index aff3bf0640915162e2254ba4ad849108303eaad2..7b1f2b5f1436a07f783bab0750b4c7b37f8a21e3 100644 (file)
@@ -22,5 +22,6 @@ CONFIG_CMD_IRQ=y
 CONFIG_DS4510=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 0a705f80b741f7a929743fe7b9319e801e08643e..003a8e996f5bb7aaa9ec3cb2509977cecc2c2c65 100644 (file)
@@ -23,5 +23,6 @@ CONFIG_CMD_JFFS2=y
 # CONFIG_CMD_IRQ is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 45fe128a557a9ed19f2e0bef68e9985364d6ce13..9d17e005a96482bed37e4732ca4637b31e19c044 100644 (file)
@@ -24,5 +24,6 @@ CONFIG_SYS_FSL_DDR2=y
 CONFIG_DS4510=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
index 63ce8b23932e7bb9710d4dae352e2a6970685614..af56226abece304e16f80a9fe0153c089b7a2434 100644 (file)
@@ -23,6 +23,7 @@ CONFIG_CMD_JFFS2=y
 # CONFIG_CMD_IRQ is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
index 1954815bcc6758094af6988c93215a2e23e2f0fc..6718cd392e1ef52c5be2da3bd78807f6e1ac10a2 100644 (file)
@@ -22,6 +22,7 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_OF_LIBFDT=y
index 99917256897b7f899b5575469b4113fff77b626e..817a2240d7ff96ed5740ff76ad4df29cb119c964 100644 (file)
@@ -32,6 +32,7 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_OF_LIBFDT=y
index 8b7b4a976e99d80d60593033089ab66aab8de5b7..501898ac43545941ae17a4c0572bdcee3387b54c 100644 (file)
@@ -27,4 +27,5 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
 CONFIG_OF_LIBFDT=y
index 736aab2e6e6df20e65b589787917bcc7e626794a..5ceea44c60535c0ddae59bd663fdae7f39cf2478 100644 (file)
@@ -47,6 +47,30 @@ config ALTERA_TSE
          Please find details on the "Triple-Speed Ethernet MegaCore Function
          Resource Center" of Altera.
 
+config BCM_SF2_ETH
+       bool "Broadcom SF2 (Starfighter2) Ethernet support"
+       select PHYLIB
+       help
+         This is an abstract framework which provides a generic interface
+         to MAC and DMA management for multiple Broadcom SoCs such as
+         Cygnus, NSP and bcm28155_ap platforms.
+
+config BCM_SF2_ETH_DEFAULT_PORT
+       int "Broadcom SF2 (Starfighter2) Ethernet default port number"
+       depends on BCM_SF2_ETH
+       default 0
+       help
+         Default port number for the Starfighter2 ethernet driver.
+
+config BCM_SF2_ETH_GMAC
+       bool "Broadcom SF2 (Starfighter2) GMAC Ethernet support"
+       depends on BCM_SF2_ETH
+       help
+         This flag enables the ethernet support for Broadcom platforms with
+         GMAC such as Cygnus. This driver is based on the framework provided
+         by the BCM_SF2_ETH driver.
+         Say Y to any bcmcygnus based platforms.
+
 config DWC_ETH_QOS
        bool "Synopsys DWC Ethernet QOS device support"
        depends on DM_ETH
index cf60d114756458feb0a92c21694d42aab2bbb717..00e6806892ad2e418de6939a2db9180f6cd1777a 100644 (file)
@@ -26,6 +26,7 @@ enum ag7xxx_model {
        AG7XXX_MODEL_AG934X,
 };
 
+/* MAC Configuration 1 */
 #define AG7XXX_ETH_CFG1                                0x00
 #define AG7XXX_ETH_CFG1_SOFT_RST               BIT(31)
 #define AG7XXX_ETH_CFG1_RX_RST                 BIT(19)
@@ -34,6 +35,7 @@ enum ag7xxx_model {
 #define AG7XXX_ETH_CFG1_RX_EN                  BIT(2)
 #define AG7XXX_ETH_CFG1_TX_EN                  BIT(0)
 
+/* MAC Configuration 2 */
 #define AG7XXX_ETH_CFG2                                0x04
 #define AG7XXX_ETH_CFG2_IF_1000                        BIT(9)
 #define AG7XXX_ETH_CFG2_IF_10_100              BIT(8)
@@ -43,26 +45,34 @@ enum ag7xxx_model {
 #define AG7XXX_ETH_CFG2_PAD_CRC_EN             BIT(2)
 #define AG7XXX_ETH_CFG2_FDX                    BIT(0)
 
+/* MII Configuration */
 #define AG7XXX_ETH_MII_MGMT_CFG                        0x20
 #define AG7XXX_ETH_MII_MGMT_CFG_RESET          BIT(31)
 
+/* MII Command */
 #define AG7XXX_ETH_MII_MGMT_CMD                        0x24
 #define AG7XXX_ETH_MII_MGMT_CMD_READ           0x1
 
+/* MII Address */
 #define AG7XXX_ETH_MII_MGMT_ADDRESS            0x28
 #define AG7XXX_ETH_MII_MGMT_ADDRESS_SHIFT      8
 
+/* MII Control */
 #define AG7XXX_ETH_MII_MGMT_CTRL               0x2c
 
+/* MII Status */
 #define AG7XXX_ETH_MII_MGMT_STATUS             0x30
 
+/* MII Indicators */
 #define AG7XXX_ETH_MII_MGMT_IND                        0x34
 #define AG7XXX_ETH_MII_MGMT_IND_INVALID                BIT(2)
 #define AG7XXX_ETH_MII_MGMT_IND_BUSY           BIT(0)
 
+/* STA Address 1 & 2 */
 #define AG7XXX_ETH_ADDR1                       0x40
 #define AG7XXX_ETH_ADDR2                       0x44
 
+/* ETH Configuration 0 - 5 */
 #define AG7XXX_ETH_FIFO_CFG_0                  0x48
 #define AG7XXX_ETH_FIFO_CFG_1                  0x4c
 #define AG7XXX_ETH_FIFO_CFG_2                  0x50
@@ -70,18 +80,24 @@ enum ag7xxx_model {
 #define AG7XXX_ETH_FIFO_CFG_4                  0x58
 #define AG7XXX_ETH_FIFO_CFG_5                  0x5c
 
+/* DMA Transfer Control for Queue 0 */
 #define AG7XXX_ETH_DMA_TX_CTRL                 0x180
 #define AG7XXX_ETH_DMA_TX_CTRL_TXE             BIT(0)
 
+/* Descriptor Address for Queue 0 Tx */
 #define AG7XXX_ETH_DMA_TX_DESC                 0x184
 
+/* DMA Tx Status */
 #define AG7XXX_ETH_DMA_TX_STATUS               0x188
 
+/* Rx Control */
 #define AG7XXX_ETH_DMA_RX_CTRL                 0x18c
 #define AG7XXX_ETH_DMA_RX_CTRL_RXE             BIT(0)
 
+/* Pointer to Rx Descriptor */
 #define AG7XXX_ETH_DMA_RX_DESC                 0x190
 
+/* Rx Status */
 #define AG7XXX_ETH_DMA_RX_STATUS               0x194
 
 /* Custom register at 0x18070000 */
@@ -269,18 +285,33 @@ static int ag7xxx_switch_reg_write(struct mii_dev *bus, int reg, u32 val)
        return 0;
 }
 
-static u16 ag7xxx_mdio_rw(struct mii_dev *bus, int addr, int reg, u32 val)
+static int ag7xxx_mdio_rw(struct mii_dev *bus, int addr, int reg, u32 val)
 {
        u32 data;
+       unsigned long start;
+       int ret;
+       /* No idea if this is long enough or too long */
+       int timeout_ms = 1000;
 
        /* Dummy read followed by PHY read/write command. */
-       ag7xxx_switch_reg_read(bus, 0x98, &data);
+       ret = ag7xxx_switch_reg_read(bus, 0x98, &data);
+       if (ret < 0)
+               return ret;
        data = val | (reg << 16) | (addr << 21) | BIT(30) | BIT(31);
-       ag7xxx_switch_reg_write(bus, 0x98, data);
+       ret = ag7xxx_switch_reg_write(bus, 0x98, data);
+       if (ret < 0)
+               return ret;
+
+       start = get_timer(0);
 
        /* Wait for operation to finish */
        do {
-               ag7xxx_switch_reg_read(bus, 0x98, &data);
+               ret = ag7xxx_switch_reg_read(bus, 0x98, &data);
+               if (ret < 0)
+                       return ret;
+
+               if (get_timer(start) > timeout_ms)
+                       return -ETIMEDOUT;
        } while (data & BIT(31));
 
        return data & 0xffff;
@@ -294,7 +325,11 @@ static int ag7xxx_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
 static int ag7xxx_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
                             u16 val)
 {
-       ag7xxx_mdio_rw(bus, addr, reg, val);
+       int ret;
+
+       ret = ag7xxx_mdio_rw(bus, addr, reg, val);
+       if (ret < 0)
+               return ret;
        return 0;
 }
 
index c4e2e01003432efaf2eda169aacdb158040b56a8..efeff15a01b3d46c8f88948b64e3d9741d8cba9d 100644 (file)
@@ -20,8 +20,6 @@
 /* Support 2 Ethernet ports now */
 #define BCM_ETH_MAX_PORT_NUM   2
 
-#define CONFIG_BCM_SF2_ETH_DEFAULT_PORT        0
-
 enum {
        MAC_DMA_TX = 1,
        MAC_DMA_RX = 2
index 0230852244ffded76673f154833e69fad3b78794..4d02d8bb19a953420a1dc50cfe00cb405554c401 100644 (file)
@@ -67,38 +67,40 @@ config PHY_MICREL
 if PHY_MICREL
 
 config PHY_MICREL_KSZ9021
-       bool "Micrel KSZ9021 family support"
+       bool
        select PHY_GIGE
-       help
-         Enable support for the Micrel KSZ9021 GbE PHY family.  If
-         enabled, the extended register read/write for KSZ9021 PHYs
-         is supported through the 'mdio' command and any RGMII signal
-         delays configured in the device tree will be applied to the
-         PHY during initialisation.
-
-         Note that the KSZ9021 uses the same part number os the
-         KSZ8921BL, so enabling this option disables support for the
-         KSZ8721BL.
+       select PHY_MICREL_KSZ90X1
 
 config PHY_MICREL_KSZ9031
-       bool "Micrel KSZ9031 family support"
+       bool
+       select PHY_GIGE
+       select PHY_MICREL_KSZ90X1
+
+config PHY_MICREL_KSZ90X1
+       bool "Micrel KSZ90x1 family support"
        select PHY_GIGE
        help
-         Enable support for the Micrel KSZ9031 GbE PHY family.  If
-         enabled, the extended register read/write for KSZ9021 PHYs
+         Enable support for the Micrel KSZ9021 and KSZ9031 GbE PHYs. If
+         enabled, the extended register read/write for KSZ90x1 PHYs
          is supported through the 'mdio' command and any RGMII signal
          delays configured in the device tree will be applied to the
-         PHY during initialisatioin.
+         PHY during initialization.
 
-endif # PHY_MICREL
+         This should not be enabled at the same time with PHY_MICREL_KSZ8XXX
+         as the KSZ9021 and KS8721 share the same ID.
 
-config PHY_MICREL_KSZ9021
-       bool "Micrel KSZ9021 Ethernet PHYs support"
-       depends on PHY_MICREL
+config PHY_MICREL_KSZ8XXX
+       bool "Micrel KSZ8xxx family support"
+       default y if !PHY_MICREL_KSZ90X1
        help
-          KSZ9021 is a completely integrated triple speed (10Base-T/100Base-TX/1000Base-T)
-         Ethernet Physical Layer Transceiver for transmission and reception of data over
-         standard CAT-5 unshielded twisted pair (UTP) cable.
+         Enable support for the 8000 series GbE PHYs manufactured by Micrel
+         (now a part of Microchip). This includes drivers for the KSZ804,
+         KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, and KSZ8721.
+
+         This should not be enabled at the same time with PHY_MICREL_KSZ90X1
+         as the KSZ9021 and KS8721 share the same ID.
+
+endif # PHY_MICREL
 
 config PHY_MSCC
        bool "Microsemi Corp Ethernet PHYs support"
index 88c00a5cd3568ea534917c715f7f87437689e490..54f32f606be3fed7b65f81c5155de843afcddb0c 100644 (file)
@@ -19,7 +19,8 @@ obj-$(CONFIG_PHY_DAVICOM) += davicom.o
 obj-$(CONFIG_PHY_ET1011C) += et1011c.o
 obj-$(CONFIG_PHY_LXT) += lxt.o
 obj-$(CONFIG_PHY_MARVELL) += marvell.o
-obj-$(CONFIG_PHY_MICREL) += micrel.o
+obj-$(CONFIG_PHY_MICREL_KSZ8XXX) += micrel_ksz8xxx.o
+obj-$(CONFIG_PHY_MICREL_KSZ90X1) += micrel_ksz90x1.o
 obj-$(CONFIG_PHY_NATSEMI) += natsemi.o
 obj-$(CONFIG_PHY_REALTEK) += realtek.o
 obj-$(CONFIG_PHY_SMSC) += smsc.o
index 9871cc3edd7c4df6f688bff425a73814fe8eaa85..e4afa90dca02e7c6c620f9dfbeaa56c16322ec83 100644 (file)
 #define MIIM_BCM54XX_EXP_SEL_SSD       0x0e00  /* Secondary SerDes select */
 #define MIIM_BCM54XX_EXP_SEL_ER                0x0f00  /* Expansion register select */
 
+#define MIIM_BCM_AUXCNTL_SHDWSEL_MISC  0x0007
+#define MIIM_BCM_AUXCNTL_ACTL_SMDSP_EN 0x0800
+
+#define MIIM_BCM_CHANNEL_WIDTH    0x2000
+
+static void bcm_phy_write_misc(struct phy_device *phydev,
+                              u16 reg, u16 chl, u16 value)
+{
+       int reg_val;
+
+       phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL,
+                 MIIM_BCM_AUXCNTL_SHDWSEL_MISC);
+
+       reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL);
+       reg_val |= MIIM_BCM_AUXCNTL_ACTL_SMDSP_EN;
+       phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL, reg_val);
+
+       reg_val = (chl * MIIM_BCM_CHANNEL_WIDTH) | reg;
+       phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_SEL, reg_val);
+
+       phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA, value);
+}
+
 /* Broadcom BCM5461S */
 static int bcm5461_config(struct phy_device *phydev)
 {
@@ -152,11 +175,50 @@ static int bcm_cygnus_startup(struct phy_device *phydev)
        return genphy_parse_link(phydev);
 }
 
+static void bcm_cygnus_afe(struct phy_device *phydev)
+{
+       /* ensures smdspclk is enabled */
+       phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL, 0x0c30);
+
+       /* AFE_VDAC_ICTRL_0 bit 7:4 Iq=1100 for 1g 10bt, normal modes */
+       bcm_phy_write_misc(phydev, 0x39, 0x01, 0xA7C8);
+
+       /* AFE_HPF_TRIM_OTHERS bit11=1, short cascode for all modes*/
+       bcm_phy_write_misc(phydev, 0x3A, 0x00, 0x0803);
+
+       /* AFE_TX_CONFIG_1 bit 7:4 Iq=1100 for test modes */
+       bcm_phy_write_misc(phydev, 0x3A, 0x01, 0xA740);
+
+       /* AFE TEMPSEN_OTHERS rcal_HT, rcal_LT 10000 */
+       bcm_phy_write_misc(phydev, 0x3A, 0x03, 0x8400);
+
+       /* AFE_FUTURE_RSV bit 2:0 rccal <2:0>=100 */
+       bcm_phy_write_misc(phydev, 0x3B, 0x00, 0x0004);
+
+       /* Adjust bias current trim to overcome digital offSet */
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1E, 0x02);
+
+       /* make rcal=100, since rdb default is 000 */
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x00B1);
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x15, 0x0010);
+
+       /* CORE_EXPB0, Reset R_CAL/RC_CAL Engine */
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x00B0);
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x15, 0x0010);
+
+       /* CORE_EXPB0, Disable Reset R_CAL/RC_CAL Engine */
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x00B0);
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x15, 0x0000);
+}
+
 static int bcm_cygnus_config(struct phy_device *phydev)
 {
        genphy_config_aneg(phydev);
-
        phy_reset(phydev);
+       /* AFE settings for PHY stability */
+       bcm_cygnus_afe(phydev);
+       /* Forcing aneg after applying the AFE settings */
+       genphy_restart_aneg(phydev);
 
        return 0;
 }
index df8235645ef65526ea7e152098c123c384ed4048..e8e9099cb5fe04611c22fa1f86fe51523da84623 100644 (file)
@@ -34,7 +34,6 @@ int fixedphy_probe(struct phy_device *phydev)
        memset(priv, 0, sizeof(*priv));
 
        phydev->priv = priv;
-       phydev->addr = 0;
 
        priv->link_speed = val;
        priv->duplex = fdtdec_get_bool(gd->fdt_blob, ofnode, "full-duplex");
diff --git a/drivers/net/phy/micrel_ksz8xxx.c b/drivers/net/phy/micrel_ksz8xxx.c
new file mode 100644 (file)
index 0000000..ec628bb
--- /dev/null
@@ -0,0 +1,200 @@
+/*
+ * Micrel PHY drivers
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ *
+ * Copyright 2010-2011 Freescale Semiconductor, Inc.
+ * author Andy Fleming
+ * (C) 2012 NetModule AG, David Andrey, added KSZ9031
+ */
+#include <config.h>
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <micrel.h>
+#include <phy.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct phy_driver KSZ804_driver = {
+       .name = "Micrel KSZ804",
+       .uid = 0x221510,
+       .mask = 0xfffff0,
+       .features = PHY_BASIC_FEATURES,
+       .config = &genphy_config,
+       .startup = &genphy_startup,
+       .shutdown = &genphy_shutdown,
+};
+
+#define MII_KSZPHY_OMSO                0x16
+#define KSZPHY_OMSO_B_CAST_OFF (1 << 9)
+
+static int ksz_genconfig_bcastoff(struct phy_device *phydev)
+{
+       int ret;
+
+       ret = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZPHY_OMSO);
+       if (ret < 0)
+               return ret;
+
+       ret = phy_write(phydev, MDIO_DEVAD_NONE, MII_KSZPHY_OMSO,
+                       ret | KSZPHY_OMSO_B_CAST_OFF);
+       if (ret < 0)
+               return ret;
+
+       return genphy_config(phydev);
+}
+
+static struct phy_driver KSZ8031_driver = {
+       .name = "Micrel KSZ8021/KSZ8031",
+       .uid = 0x221550,
+       .mask = 0xfffff0,
+       .features = PHY_BASIC_FEATURES,
+       .config = &ksz_genconfig_bcastoff,
+       .startup = &genphy_startup,
+       .shutdown = &genphy_shutdown,
+};
+
+/**
+ * KSZ8051
+ */
+#define MII_KSZ8051_PHY_OMSO                   0x16
+#define MII_KSZ8051_PHY_OMSO_NAND_TREE_ON      (1 << 5)
+
+static int ksz8051_config(struct phy_device *phydev)
+{
+       unsigned val;
+
+       /* Disable NAND-tree */
+       val = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ8051_PHY_OMSO);
+       val &= ~MII_KSZ8051_PHY_OMSO_NAND_TREE_ON;
+       phy_write(phydev, MDIO_DEVAD_NONE, MII_KSZ8051_PHY_OMSO, val);
+
+       return genphy_config(phydev);
+}
+
+static struct phy_driver KSZ8051_driver = {
+       .name = "Micrel KSZ8051",
+       .uid = 0x221550,
+       .mask = 0xfffff0,
+       .features = PHY_BASIC_FEATURES,
+       .config = &ksz8051_config,
+       .startup = &genphy_startup,
+       .shutdown = &genphy_shutdown,
+};
+
+static struct phy_driver KSZ8081_driver = {
+       .name = "Micrel KSZ8081",
+       .uid = 0x221560,
+       .mask = 0xfffff0,
+       .features = PHY_BASIC_FEATURES,
+       .config = &ksz_genconfig_bcastoff,
+       .startup = &genphy_startup,
+       .shutdown = &genphy_shutdown,
+};
+
+/**
+ * KSZ8895
+ */
+
+static unsigned short smireg_to_phy(unsigned short reg)
+{
+       return ((reg & 0xc0) >> 3) + 0x06 + ((reg & 0x20) >> 5);
+}
+
+static unsigned short smireg_to_reg(unsigned short reg)
+{
+       return reg & 0x1F;
+}
+
+static void ksz8895_write_smireg(struct phy_device *phydev, int smireg, int val)
+{
+       phydev->bus->write(phydev->bus, smireg_to_phy(smireg), MDIO_DEVAD_NONE,
+                                               smireg_to_reg(smireg), val);
+}
+
+#if 0
+static int ksz8895_read_smireg(struct phy_device *phydev, int smireg)
+{
+       return phydev->bus->read(phydev->bus, smireg_to_phy(smireg),
+                                       MDIO_DEVAD_NONE, smireg_to_reg(smireg));
+}
+#endif
+
+int ksz8895_config(struct phy_device *phydev)
+{
+       /* we are connected directly to the switch without
+        * dedicated PHY. SCONF1 == 001 */
+       phydev->link = 1;
+       phydev->duplex = DUPLEX_FULL;
+       phydev->speed = SPEED_100;
+
+       /* Force the switch to start */
+       ksz8895_write_smireg(phydev, 1, 1);
+
+       return 0;
+}
+
+static int ksz8895_startup(struct phy_device *phydev)
+{
+       return 0;
+}
+
+static struct phy_driver ksz8895_driver = {
+       .name = "Micrel KSZ8895/KSZ8864",
+       .uid  = 0x221450,
+       .mask = 0xffffe1,
+       .features = PHY_BASIC_FEATURES,
+       .config   = &ksz8895_config,
+       .startup  = &ksz8895_startup,
+       .shutdown = &genphy_shutdown,
+};
+
+/* Micrel used the exact same part number for the KSZ9021. */
+static struct phy_driver KS8721_driver = {
+       .name = "Micrel KS8721BL",
+       .uid = 0x221610,
+       .mask = 0xfffff0,
+       .features = PHY_BASIC_FEATURES,
+       .config = &genphy_config,
+       .startup = &genphy_startup,
+       .shutdown = &genphy_shutdown,
+};
+
+int ksz886x_config(struct phy_device *phydev)
+{
+       /* we are connected directly to the switch without
+        * dedicated PHY. */
+       phydev->link = 1;
+       phydev->duplex = DUPLEX_FULL;
+       phydev->speed = SPEED_100;
+       return 0;
+}
+
+static int ksz886x_startup(struct phy_device *phydev)
+{
+       return 0;
+}
+
+static struct phy_driver ksz886x_driver = {
+       .name = "Micrel KSZ886x Switch",
+       .uid  = 0x00221430,
+       .mask = 0xfffff0,
+       .features = PHY_BASIC_FEATURES,
+       .config = &ksz886x_config,
+       .startup = &ksz886x_startup,
+       .shutdown = &genphy_shutdown,
+};
+
+int phy_micrel_ksz8xxx_init(void)
+{
+       phy_register(&KSZ804_driver);
+       phy_register(&KSZ8031_driver);
+       phy_register(&KSZ8051_driver);
+       phy_register(&KSZ8081_driver);
+       phy_register(&KS8721_driver);
+       phy_register(&ksz8895_driver);
+       phy_register(&ksz886x_driver);
+       return 0;
+}
similarity index 62%
rename from drivers/net/phy/micrel.c
rename to drivers/net/phy/micrel_ksz90x1.c
index 0e4a4ebcc603370ce66845e507979e1aa0f7424e..20f8a551963cee8c4efc2c7c46fa97e244f6ec06 100644 (file)
@@ -6,6 +6,8 @@
  * Copyright 2010-2011 Freescale Semiconductor, Inc.
  * author Andy Fleming
  * (C) 2012 NetModule AG, David Andrey, added KSZ9031
+ * (C) Copyright 2017 Adaptrum, Inc.
+ * Written by Alexandru Gagniuc <alex.g@adaptrum.com> for Adaptrum, Inc.
  */
 #include <config.h>
 #include <common.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static struct phy_driver KSZ804_driver = {
-       .name = "Micrel KSZ804",
-       .uid = 0x221510,
-       .mask = 0xfffff0,
-       .features = PHY_BASIC_FEATURES,
-       .config = &genphy_config,
-       .startup = &genphy_startup,
-       .shutdown = &genphy_shutdown,
-};
-
-#define MII_KSZPHY_OMSO                0x16
-#define KSZPHY_OMSO_B_CAST_OFF (1 << 9)
-
-static int ksz_genconfig_bcastoff(struct phy_device *phydev)
-{
-       int ret;
-
-       ret = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZPHY_OMSO);
-       if (ret < 0)
-               return ret;
-
-       ret = phy_write(phydev, MDIO_DEVAD_NONE, MII_KSZPHY_OMSO,
-                       ret | KSZPHY_OMSO_B_CAST_OFF);
-       if (ret < 0)
-               return ret;
-
-       return genphy_config(phydev);
-}
-
-static struct phy_driver KSZ8031_driver = {
-       .name = "Micrel KSZ8021/KSZ8031",
-       .uid = 0x221550,
-       .mask = 0xfffff0,
-       .features = PHY_BASIC_FEATURES,
-       .config = &ksz_genconfig_bcastoff,
-       .startup = &genphy_startup,
-       .shutdown = &genphy_shutdown,
-};
-
-/**
- * KSZ8051
- */
-#define MII_KSZ8051_PHY_OMSO                   0x16
-#define MII_KSZ8051_PHY_OMSO_NAND_TREE_ON      (1 << 5)
-
-static int ksz8051_config(struct phy_device *phydev)
-{
-       unsigned val;
-
-       /* Disable NAND-tree */
-       val = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ8051_PHY_OMSO);
-       val &= ~MII_KSZ8051_PHY_OMSO_NAND_TREE_ON;
-       phy_write(phydev, MDIO_DEVAD_NONE, MII_KSZ8051_PHY_OMSO, val);
-
-       return genphy_config(phydev);
-}
-
-static struct phy_driver KSZ8051_driver = {
-       .name = "Micrel KSZ8051",
-       .uid = 0x221550,
-       .mask = 0xfffff0,
-       .features = PHY_BASIC_FEATURES,
-       .config = &ksz8051_config,
-       .startup = &genphy_startup,
-       .shutdown = &genphy_shutdown,
-};
-
-static struct phy_driver KSZ8081_driver = {
-       .name = "Micrel KSZ8081",
-       .uid = 0x221560,
-       .mask = 0xfffff0,
-       .features = PHY_BASIC_FEATURES,
-       .config = &ksz_genconfig_bcastoff,
-       .startup = &genphy_startup,
-       .shutdown = &genphy_shutdown,
-};
-
-/**
- * KSZ8895
- */
-
-static unsigned short smireg_to_phy(unsigned short reg)
-{
-       return ((reg & 0xc0) >> 3) + 0x06 + ((reg & 0x20) >> 5);
-}
-
-static unsigned short smireg_to_reg(unsigned short reg)
-{
-       return reg & 0x1F;
-}
-
-static void ksz8895_write_smireg(struct phy_device *phydev, int smireg, int val)
-{
-       phydev->bus->write(phydev->bus, smireg_to_phy(smireg), MDIO_DEVAD_NONE,
-                                               smireg_to_reg(smireg), val);
-}
-
-#if 0
-static int ksz8895_read_smireg(struct phy_device *phydev, int smireg)
-{
-       return phydev->bus->read(phydev->bus, smireg_to_phy(smireg),
-                                       MDIO_DEVAD_NONE, smireg_to_reg(smireg));
-}
-#endif
-
-int ksz8895_config(struct phy_device *phydev)
-{
-       /* we are connected directly to the switch without
-        * dedicated PHY. SCONF1 == 001 */
-       phydev->link = 1;
-       phydev->duplex = DUPLEX_FULL;
-       phydev->speed = SPEED_100;
-
-       /* Force the switch to start */
-       ksz8895_write_smireg(phydev, 1, 1);
-
-       return 0;
-}
-
-static int ksz8895_startup(struct phy_device *phydev)
-{
-       return 0;
-}
-
-static struct phy_driver ksz8895_driver = {
-       .name = "Micrel KSZ8895/KSZ8864",
-       .uid  = 0x221450,
-       .mask = 0xffffe1,
-       .features = PHY_BASIC_FEATURES,
-       .config   = &ksz8895_config,
-       .startup  = &ksz8895_startup,
-       .shutdown = &genphy_shutdown,
-};
-
-#ifndef CONFIG_PHY_MICREL_KSZ9021
-/*
- * I can't believe Micrel used the exact same part number
- * for the KSZ9021. Shame Micrel, Shame!
- */
-static struct phy_driver KS8721_driver = {
-       .name = "Micrel KS8721BL",
-       .uid = 0x221610,
-       .mask = 0xfffff0,
-       .features = PHY_BASIC_FEATURES,
-       .config = &genphy_config,
-       .startup = &genphy_startup,
-       .shutdown = &genphy_shutdown,
-};
-#endif
-
-
 /*
  * KSZ9021 - KSZ9031 common
  */
@@ -178,6 +29,19 @@ static struct phy_driver KS8721_driver = {
 #define MIIM_KSZ90xx_PHYCTL_10         (1 << 4)
 #define MIIM_KSZ90xx_PHYCTL_DUPLEX     (1 << 3)
 
+/* KSZ9021 PHY Registers */
+#define MII_KSZ9021_EXTENDED_CTRL      0x0b
+#define MII_KSZ9021_EXTENDED_DATAW     0x0c
+#define MII_KSZ9021_EXTENDED_DATAR     0x0d
+
+#define CTRL1000_PREFER_MASTER         (1 << 10)
+#define CTRL1000_CONFIG_MASTER         (1 << 11)
+#define CTRL1000_MANUAL_CONFIG         (1 << 12)
+
+/* KSZ9031 PHY Registers */
+#define MII_KSZ9031_MMD_ACCES_CTRL     0x0d
+#define MII_KSZ9031_MMD_REG_DATA       0x0e
+
 static int ksz90xx_startup(struct phy_device *phydev)
 {
        unsigned phy_ctl;
@@ -204,7 +68,6 @@ static int ksz90xx_startup(struct phy_device *phydev)
 }
 
 /* Common OF config bits for KSZ9021 and KSZ9031 */
-#if defined(CONFIG_PHY_MICREL_KSZ9021) || defined(CONFIG_PHY_MICREL_KSZ9031)
 #ifdef CONFIG_DM_ETH
 struct ksz90x1_reg_field {
        const char      *name;
@@ -230,6 +93,19 @@ static const struct ksz90x1_reg_field ksz90x1_txd_grp[] = {
        { "txd2-skew-ps", 4, 8, 0x7 }, { "txd3-skew-ps", 4, 12, 0x7 },
 };
 
+static const struct ksz90x1_reg_field ksz9021_clk_grp[] = {
+       { "txen-skew-ps", 4, 0, 0x7 }, { "txc-skew-ps", 4, 4, 0x7 },
+       { "rxdv-skew-ps", 4, 8, 0x7 }, { "rxc-skew-ps", 4, 12, 0x7 },
+};
+
+static const struct ksz90x1_reg_field ksz9031_ctl_grp[] = {
+       { "txen-skew-ps", 4, 0, 0x7 }, { "rxdv-skew-ps", 4, 4, 0x7 }
+};
+
+static const struct ksz90x1_reg_field ksz9031_clk_grp[] = {
+       { "rxc-skew-ps", 5, 0, 0xf }, { "txc-skew-ps", 5, 5, 0xf }
+};
+
 static int ksz90x1_of_config_group(struct phy_device *phydev,
                                   struct ksz90x1_ofcfg *ofcfg)
 {
@@ -267,29 +143,6 @@ static int ksz90x1_of_config_group(struct phy_device *phydev,
 
        return drv->writeext(phydev, 0, ofcfg->devad, ofcfg->reg, regval);
 }
-#endif
-#endif
-
-#ifdef CONFIG_PHY_MICREL_KSZ9021
-/*
- * KSZ9021
- */
-
-/* PHY Registers */
-#define MII_KSZ9021_EXTENDED_CTRL      0x0b
-#define MII_KSZ9021_EXTENDED_DATAW     0x0c
-#define MII_KSZ9021_EXTENDED_DATAR     0x0d
-
-#define CTRL1000_PREFER_MASTER         (1 << 10)
-#define CTRL1000_CONFIG_MASTER         (1 << 11)
-#define CTRL1000_MANUAL_CONFIG         (1 << 12)
-
-#if defined(CONFIG_DM_ETH) && (defined(CONFIG_PHY_MICREL_KSZ9021) || \
-                              defined(CONFIG_PHY_MICREL_KSZ9031))
-static const struct ksz90x1_reg_field ksz9021_clk_grp[] = {
-       { "txen-skew-ps", 4, 0, 0x7 }, { "txc-skew-ps", 4, 4, 0x7 },
-       { "rxdv-skew-ps", 4, 8, 0x7 }, { "rxc-skew-ps", 4, 12, 0x7 },
-};
 
 static int ksz9021_of_config(struct phy_device *phydev)
 {
@@ -308,20 +161,69 @@ static int ksz9021_of_config(struct phy_device *phydev)
 
        return 0;
 }
-#else
+
+static int ksz9031_of_config(struct phy_device *phydev)
+{
+       struct ksz90x1_ofcfg ofcfg[] = {
+               { MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW, 2, ksz9031_ctl_grp, 2 },
+               { MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, 2, ksz90x1_rxd_grp, 4 },
+               { MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, 2, ksz90x1_txd_grp, 4 },
+               { MII_KSZ9031_EXT_RGMII_CLOCK_SKEW, 2, ksz9031_clk_grp, 2 },
+       };
+       int i, ret = 0;
+
+       for (i = 0; i < ARRAY_SIZE(ofcfg); i++) {
+               ret = ksz90x1_of_config_group(phydev, &(ofcfg[i]));
+               if (ret)
+                       return ret;
+       }
+
+       return 0;
+}
+
+static int ksz9031_center_flp_timing(struct phy_device *phydev)
+{
+       struct phy_driver *drv = phydev->drv;
+       int ret = 0;
+
+       if (!drv || !drv->writeext)
+               return -EOPNOTSUPP;
+
+       ret = drv->writeext(phydev, 0, 0, MII_KSZ9031_FLP_BURST_TX_LO, 0x1A80);
+       if (ret)
+               return ret;
+
+       ret = drv->writeext(phydev, 0, 0, MII_KSZ9031_FLP_BURST_TX_HI, 0x6);
+       return ret;
+}
+
+#else /* !CONFIG_DM_ETH */
 static int ksz9021_of_config(struct phy_device *phydev)
 {
        return 0;
 }
+
+static int ksz9031_of_config(struct phy_device *phydev)
+{
+       return 0;
+}
+
+static int ksz9031_center_flp_timing(struct phy_device *phydev)
+{
+       return 0;
+}
 #endif
 
+/*
+ * KSZ9021
+ */
 int ksz9021_phy_extended_write(struct phy_device *phydev, int regnum, u16 val)
 {
        /* extended registers */
        phy_write(phydev, MDIO_DEVAD_NONE,
-               MII_KSZ9021_EXTENDED_CTRL, regnum | 0x8000);
+                 MII_KSZ9021_EXTENDED_CTRL, regnum | 0x8000);
        return phy_write(phydev, MDIO_DEVAD_NONE,
-               MII_KSZ9021_EXTENDED_DATAW, val);
+                        MII_KSZ9021_EXTENDED_DATAW, val);
 }
 
 int ksz9021_phy_extended_read(struct phy_device *phydev, int regnum)
@@ -333,23 +235,22 @@ int ksz9021_phy_extended_read(struct phy_device *phydev, int regnum)
 
 
 static int ksz9021_phy_extread(struct phy_device *phydev, int addr, int devaddr,
-                             int regnum)
+                              int regnum)
 {
        return ksz9021_phy_extended_read(phydev, regnum);
 }
 
 static int ksz9021_phy_extwrite(struct phy_device *phydev, int addr,
-                              int devaddr, int regnum, u16 val)
+                               int devaddr, int regnum, u16 val)
 {
        return ksz9021_phy_extended_write(phydev, regnum, val);
 }
 
-/* Micrel ksz9021 */
 static int ksz9021_config(struct phy_device *phydev)
 {
        unsigned ctrl1000 = 0;
        const unsigned master = CTRL1000_PREFER_MASTER |
-                       CTRL1000_CONFIG_MASTER | CTRL1000_MANUAL_CONFIG;
+       CTRL1000_CONFIG_MASTER | CTRL1000_MANUAL_CONFIG;
        unsigned features = phydev->drv->features;
        int ret;
 
@@ -359,13 +260,14 @@ static int ksz9021_config(struct phy_device *phydev)
 
        if (getenv("disable_giga"))
                features &= ~(SUPPORTED_1000baseT_Half |
-                               SUPPORTED_1000baseT_Full);
+               SUPPORTED_1000baseT_Full);
        /* force master mode for 1000BaseT due to chip errata */
        if (features & SUPPORTED_1000baseT_Half)
                ctrl1000 |= ADVERTISE_1000HALF | master;
        if (features & SUPPORTED_1000baseT_Full)
                ctrl1000 |= ADVERTISE_1000FULL | master;
-       phydev->advertising = phydev->supported = features;
+       phydev->advertising = features;
+       phydev->supported = features;
        phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, ctrl1000);
        genphy_config_aneg(phydev);
        genphy_restart_aneg(phydev);
@@ -383,68 +285,10 @@ static struct phy_driver ksz9021_driver = {
        .writeext = &ksz9021_phy_extwrite,
        .readext = &ksz9021_phy_extread,
 };
-#endif
 
-/**
+/*
  * KSZ9031
  */
-/* PHY Registers */
-#define MII_KSZ9031_MMD_ACCES_CTRL     0x0d
-#define MII_KSZ9031_MMD_REG_DATA       0x0e
-
-#if defined(CONFIG_DM_ETH) && (defined(CONFIG_PHY_MICREL_KSZ9021) || \
-                              defined(CONFIG_PHY_MICREL_KSZ9031))
-static const struct ksz90x1_reg_field ksz9031_ctl_grp[] =
-       { { "txen-skew-ps", 4, 0, 0x7 }, { "rxdv-skew-ps", 4, 4, 0x7 } };
-static const struct ksz90x1_reg_field ksz9031_clk_grp[] =
-       { { "rxc-skew-ps", 5, 0, 0xf }, { "txc-skew-ps", 5, 5, 0xf } };
-
-static int ksz9031_of_config(struct phy_device *phydev)
-{
-       struct ksz90x1_ofcfg ofcfg[] = {
-               { MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW, 2, ksz9031_ctl_grp, 2 },
-               { MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, 2, ksz90x1_rxd_grp, 4 },
-               { MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, 2, ksz90x1_txd_grp, 4 },
-               { MII_KSZ9031_EXT_RGMII_CLOCK_SKEW, 2, ksz9031_clk_grp, 2 },
-       };
-       int i, ret = 0;
-
-       for (i = 0; i < ARRAY_SIZE(ofcfg); i++) {
-               ret = ksz90x1_of_config_group(phydev, &(ofcfg[i]));
-               if (ret)
-                       return ret;
-       }
-
-       return 0;
-}
-
-static int ksz9031_center_flp_timing(struct phy_device *phydev)
-{
-       struct phy_driver *drv = phydev->drv;
-       int ret = 0;
-
-       if (!drv || !drv->writeext)
-               return -EOPNOTSUPP;
-
-       ret = drv->writeext(phydev, 0, 0, MII_KSZ9031_FLP_BURST_TX_LO, 0x1A80);
-       if (ret)
-               return ret;
-
-       ret = drv->writeext(phydev, 0, 0, MII_KSZ9031_FLP_BURST_TX_HI, 0x6);
-       return ret;
-}
-#else
-static int ksz9031_of_config(struct phy_device *phydev)
-{
-       return 0;
-}
-static int ksz9031_center_flp_timing(struct phy_device *phydev)
-{
-       return 0;
-}
-#endif
-
-/* Accessors to extended registers*/
 int ksz9031_phy_extended_write(struct phy_device *phydev,
                               int devaddr, int regnum, u16 mode, u16 val)
 {
@@ -459,7 +303,7 @@ int ksz9031_phy_extended_write(struct phy_device *phydev,
                  MII_KSZ9031_MMD_ACCES_CTRL, (mode | devaddr));
        /*write the value*/
        return  phy_write(phydev, MDIO_DEVAD_NONE,
-               MII_KSZ9031_MMD_REG_DATA, val);
+                         MII_KSZ9031_MMD_REG_DATA, val);
 }
 
 int ksz9031_phy_extended_read(struct phy_device *phydev, int devaddr,
@@ -479,24 +323,52 @@ static int ksz9031_phy_extread(struct phy_device *phydev, int addr, int devaddr,
 {
        return ksz9031_phy_extended_read(phydev, devaddr, regnum,
                                         MII_KSZ9031_MOD_DATA_NO_POST_INC);
-};
+}
 
 static int ksz9031_phy_extwrite(struct phy_device *phydev, int addr,
                                int devaddr, int regnum, u16 val)
 {
        return ksz9031_phy_extended_write(phydev, devaddr, regnum,
-                                        MII_KSZ9031_MOD_DATA_POST_INC_RW, val);
-};
+                                         MII_KSZ9031_MOD_DATA_POST_INC_RW, val);
+}
 
 static int ksz9031_config(struct phy_device *phydev)
 {
        int ret;
+
        ret = ksz9031_of_config(phydev);
        if (ret)
                return ret;
        ret = ksz9031_center_flp_timing(phydev);
        if (ret)
                return ret;
+
+       /* add an option to disable the gigabit feature of this PHY */
+       if (getenv("disable_giga")) {
+               unsigned features;
+               unsigned bmcr;
+
+               /* disable speed 1000 in features supported by the PHY */
+               features = phydev->drv->features;
+               features &= ~(SUPPORTED_1000baseT_Half |
+                               SUPPORTED_1000baseT_Full);
+               phydev->advertising = phydev->supported = features;
+
+               /* disable speed 1000 in Basic Control Register */
+               bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
+               bmcr &= ~(1 << 6);
+               phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, bmcr);
+
+               /* disable speed 1000 in 1000Base-T Control Register */
+               phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 0);
+
+               /* start autoneg */
+               genphy_config_aneg(phydev);
+               genphy_restart_aneg(phydev);
+
+               return 0;
+       }
+
        return genphy_config(phydev);
 }
 
@@ -512,44 +384,9 @@ static struct phy_driver ksz9031_driver = {
        .readext = &ksz9031_phy_extread,
 };
 
-int ksz886x_config(struct phy_device *phydev)
-{
-       /* we are connected directly to the switch without
-        * dedicated PHY. */
-       phydev->link = 1;
-       phydev->duplex = DUPLEX_FULL;
-       phydev->speed = SPEED_100;
-       return 0;
-}
-
-static int ksz886x_startup(struct phy_device *phydev)
+int phy_micrel_ksz90x1_init(void)
 {
-       return 0;
-}
-
-static struct phy_driver ksz886x_driver = {
-       .name = "Micrel KSZ886x Switch",
-       .uid  = 0x00221430,
-       .mask = 0xfffff0,
-       .features = PHY_BASIC_FEATURES,
-       .config = &ksz886x_config,
-       .startup = &ksz886x_startup,
-       .shutdown = &genphy_shutdown,
-};
-
-int phy_micrel_init(void)
-{
-       phy_register(&KSZ804_driver);
-       phy_register(&KSZ8031_driver);
-       phy_register(&KSZ8051_driver);
-       phy_register(&KSZ8081_driver);
-#ifdef CONFIG_PHY_MICREL_KSZ9021
        phy_register(&ksz9021_driver);
-#else
-       phy_register(&KS8721_driver);
-#endif
        phy_register(&ksz9031_driver);
-       phy_register(&ksz8895_driver);
-       phy_register(&ksz886x_driver);
        return 0;
 }
index 97e0bc022bdce0fd0b6479e1b166ebf836831f37..5be51d73ce623cc7e8f66c7ab7171e781f68bc49 100644 (file)
@@ -488,8 +488,11 @@ int phy_init(void)
 #ifdef CONFIG_PHY_MARVELL
        phy_marvell_init();
 #endif
-#ifdef CONFIG_PHY_MICREL
-       phy_micrel_init();
+#ifdef CONFIG_PHY_MICREL_KSZ8XXX
+       phy_micrel_ksz8xxx_init();
+#endif
+#ifdef CONFIG_PHY_MICREL_KSZ90X1
+       phy_micrel_ksz90x1_init();
 #endif
 #ifdef CONFIG_PHY_NATSEMI
        phy_natsemi_init();
index ed441f32433a2defd053e3d79ab40942ce67d04f..e09351b0d231d726d87e5a631177ca9aea75e4f4 100644 (file)
@@ -26,7 +26,7 @@ struct r8152_dongle {
        unsigned short product;
 };
 
-static const struct r8152_dongle const r8152_dongles[] = {
+static const struct r8152_dongle r8152_dongles[] = {
        /* Realtek */
        { 0x0bda, 0x8050 },
        { 0x0bda, 0x8152 },
@@ -59,7 +59,7 @@ struct r8152_version {
        bool           gmii;
 };
 
-static const struct r8152_version const r8152_versions[] = {
+static const struct r8152_version r8152_versions[] = {
        { 0x4c00, RTL_VER_01, 0 },
        { 0x4c10, RTL_VER_02, 0 },
        { 0x5c00, RTL_VER_03, 1 },
index 61dfed8c06360f243bc5ff32c20e0fbc6ba1e58f..082cc4a528be58169d9d5b6f2d63d8d3ef2a663c 100644 (file)
@@ -562,36 +562,9 @@ config CONSOLE_SCROLL_LINES
          console jump but can help speed up operation when scrolling
          is slow.
 
-config VIDEO_CT69000
-       bool "Enable Chips & Technologies 69000 video driver"
-       depends on VIDEO
-       help
-         This enables a frame buffer driver for the Chips & Technologies
-         ct69000, a fairly old graphics device (circa 2000) which is used
-         on some hardware. It operates over the ISA bus, and supports
-         some acceleration features.
-
-         For the CT69000 and SMI_LYNXEM drivers, videomode is
-               selected via environment 'videomode'. Two different ways
-               are possible:
-               - "videomode=num"   'num' is a standard LiLo mode numbers.
-               Following standard modes are supported  (* is default):
-
-                     Colors    640x480 800x600 1024x768 1152x864 1280x1024
-               -------------+---------------------------------------------
-                     8 bits |  0x301*  0x303    0x305    0x161     0x307
-                    15 bits |  0x310   0x313    0x316    0x162     0x319
-                    16 bits |  0x311   0x314    0x317    0x163     0x31A
-                    24 bits |  0x312   0x315    0x318      ?       0x31B
-               -------------+---------------------------------------------
-               (i.e. setenv videomode 317; saveenv; reset;)
-
-               - "videomode=bootargs" all the video parameters are parsed
-               from the bootargs. (See drivers/video/videomodes.c)
-
 config SYS_CONSOLE_BG_COL
        hex "Background colour"
-       depends on CFB_CONSOLE || VIDEO_CT69000
+       depends on CFB_CONSOLE
        default 0x00
        help
          Defines the background colour for the console. The value is from
@@ -602,7 +575,7 @@ config SYS_CONSOLE_BG_COL
 
 config SYS_CONSOLE_FG_COL
        hex "Foreground colour"
-       depends on CFB_CONSOLE || VIDEO_CT69000
+       depends on CFB_CONSOLE
        default 0xa0
        help
          Defines the foreground colour for the console. The value is from
index ac5371f2aecc1535ec51d9d8efc5cb37f340bab9..5cf8909295c73c22ca9b171d72bd7634fc45c57b 100644 (file)
@@ -28,16 +28,13 @@ obj-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o
 obj-$(CONFIG_CFB_CONSOLE) += cfb_console.o
 obj-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o
 obj-$(CONFIG_VIDEO_FSL_DCU_FB) += fsl_dcu_fb.o videomodes.o
-obj-$(CONFIG_L5F31188) += l5f31188.o
 obj-$(CONFIG_PXA_LCD) += pxa_lcd.o
 obj-$(CONFIG_SCF0403_LCD) += scf0403_lcd.o
 obj-$(CONFIG_S6E8AX0) += s6e8ax0.o
 obj-$(CONFIG_S6E63D6) += s6e63d6.o
 obj-$(CONFIG_LD9040) += ld9040.o
-obj-$(CONFIG_SED156X) += sed156x.o
 obj-$(CONFIG_VIDEO_BCM2835) += bcm2835.o
 obj-$(CONFIG_VIDEO_COREBOOT) += coreboot.o
-obj-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o
 obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
 obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
 obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
@@ -49,7 +46,6 @@ obj-$(CONFIG_VIDEO_MVEBU) += mvebu_lcd.o
 obj-$(CONFIG_VIDEO_MXS) += mxsfb.o videomodes.o
 obj-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o
 obj-$(CONFIG_VIDEO_SANDBOX_SDL) += sandbox_sdl.o
-obj-$(CONFIG_VIDEO_SM501) += sm501.o
 obj-$(CONFIG_VIDEO_TEGRA20) += tegra.o
 obj-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o
 obj-$(CONFIG_VIDEO_VESA) += vesa.o
index f54802052ed54e5bb562509f877f7ac21a5ed435..b6fc7e145b42cba79fa321d04ee09502361f1c43 100644 (file)
 #include <video.h>
 #include <linux/compiler.h>
 
-/*
- * Defines for the CT69000 driver
- */
-#ifdef CONFIG_VIDEO_CT69000
-
-#define VIDEO_FB_LITTLE_ENDIAN
-#define VIDEO_HW_RECTFILL
-#define VIDEO_HW_BITBLT
-#endif
-
 #if defined(CONFIG_VIDEO_MXS)
 #define VIDEO_FB_16BPP_WORD_SWAP
 #endif
diff --git a/drivers/video/ct69000.c b/drivers/video/ct69000.c
deleted file mode 100644 (file)
index a74e4e6..0000000
+++ /dev/null
@@ -1,1168 +0,0 @@
-/* ported from ctfb.c (linux kernel):
- * Created in Jan - July 2000 by Thomas Höhenleitner <th@visuelle-maschinen.de>
- *
- * Ported to U-Boot:
- * (C) Copyright 2002 Denis Peter, MPL AG Switzerland
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#include <common.h>
-
-#ifdef CONFIG_VIDEO
-
-#include <pci.h>
-#include <video_fb.h>
-#include "videomodes.h"
-
-/* debug */
-#undef VGA_DEBUG
-#undef VGA_DUMP_REG
-#ifdef VGA_DEBUG
-#undef _DEBUG
-#define _DEBUG  1
-#else
-#undef _DEBUG
-#define _DEBUG  0
-#endif
-
-/* Macros */
-#ifndef min
-#define min( a, b ) ( ( a ) < ( b ) ) ? ( a ) : ( b )
-#endif
-#ifndef max
-#define max( a, b ) ( ( a ) > ( b ) ) ? ( a ) : ( b )
-#endif
-#ifdef minmax
-#error "term minmax already used."
-#endif
-#define minmax( a, x, b ) max( ( a ), min( ( x ), ( b ) ) )
-#define N_ELTS( x ) ( sizeof( x ) / sizeof( x[ 0 ] ) )
-
-/* CT Register Offsets */
-#define CT_AR_O                        0x3c0   /* Index and Data write port of the attribute Registers */
-#define CT_GR_O                        0x3ce   /* Index port of the Graphic Controller Registers */
-#define CT_SR_O                        0x3c4   /* Index port of the Sequencer Controller */
-#define CT_CR_O                        0x3d4   /* Index port of the CRT Controller */
-#define CT_XR_O                        0x3d6   /* Extended Register index */
-#define CT_MSR_W_O             0x3c2   /* Misc. Output Register (write only) */
-#define CT_LUT_MASK_O          0x3c6   /* Color Palette Mask */
-#define CT_LUT_START_O         0x3c8   /* Color Palette Write Mode Index */
-#define CT_LUT_RGB_O           0x3c9   /* Color Palette Data Port */
-#define CT_STATUS_REG0_O       0x3c2   /* Status Register 0 (read only) */
-#define CT_STATUS_REG1_O       0x3da   /* Input Status Register 1 (read only) */
-
-#define CT_FP_O                        0x3d0   /* Index port of the Flat panel Registers */
-#define CT_MR_O                        0x3d2   /* Index Port of the Multimedia Extension */
-
-/* defines for the memory mapped registers */
-#define BR00_o         0x400000        /* Source and Destination Span Register */
-#define BR01_o         0x400004        /* Pattern/Source Expansion Background Color & Transparency Key Register */
-#define BR02_o         0x400008        /* Pattern/Source Expansion Foreground Color Register */
-#define BR03_o         0x40000C        /* Monochrome Source Control Register */
-#define BR04_o         0x400010        /* BitBLT Control Register */
-#define BR05_o         0x400014        /* Pattern Address Registe */
-#define BR06_o         0x400018        /* Source Address Register */
-#define BR07_o         0x40001C        /* Destination Address Register */
-#define BR08_o         0x400020        /* Destination Width & Height Register */
-#define BR09_o         0x400024        /* Source Expansion Background Color & Transparency Key Register */
-#define BR0A_o         0x400028        /* Source Expansion Foreground Color Register */
-
-#define CURSOR_SIZE    0x1000  /* in KByte for HW Cursor */
-#define PATTERN_ADR    (pGD->dprBase + CURSOR_SIZE)    /* pattern Memory after Cursor Memory */
-#define PATTERN_SIZE   8*8*4   /* 4 Bytes per Pixel 8 x 8 Pixel */
-#define ACCELMEMORY    (CURSOR_SIZE + PATTERN_SIZE)    /* reserved Memory for BITBlt and hw cursor */
-
-/* Some Mode definitions */
-#define FB_SYNC_HOR_HIGH_ACT   1       /* horizontal sync high active  */
-#define FB_SYNC_VERT_HIGH_ACT  2       /* vertical sync high active    */
-#define FB_SYNC_EXT            4       /* external sync                */
-#define FB_SYNC_COMP_HIGH_ACT  8       /* composite sync high active   */
-#define FB_SYNC_BROADCAST      16      /* broadcast video timings      */
-                                       /* vtotal = 144d/288n/576i => PAL  */
-                                       /* vtotal = 121d/242n/484i => NTSC */
-#define FB_SYNC_ON_GREEN       32      /* sync on green */
-
-#define FB_VMODE_NONINTERLACED  0      /* non interlaced */
-#define FB_VMODE_INTERLACED    1       /* interlaced   */
-#define FB_VMODE_DOUBLE                2       /* double scan */
-#define FB_VMODE_MASK          255
-
-#define FB_VMODE_YWRAP         256     /* ywrap instead of panning     */
-#define FB_VMODE_SMOOTH_XPAN   512     /* smooth xpan possible (internally used) */
-#define FB_VMODE_CONUPDATE     512     /* don't update x/yoffset       */
-
-#define text                   0
-#define fntwidth               8
-
-/* table for VGA Initialization  */
-typedef struct {
-       const unsigned char reg;
-       const unsigned char val;
-} CT_CFG_TABLE;
-
-/* this table provides some basic initialisations such as Memory Clock etc */
-static CT_CFG_TABLE xreg[] = {
-       {0x09, 0x01},           /* CRT Controller Extensions Enable */
-       {0x0A, 0x02},           /* Frame Buffer Mapping */
-       {0x0B, 0x01},           /* PCI Write Burst support */
-       {0x20, 0x00},           /* BitBLT Configuration */
-       {0x40, 0x03},           /* Memory Access Control */
-       {0x60, 0x00},           /* Video Pin Control */
-       {0x61, 0x00},           /* DPMS Synch control */
-       {0x62, 0x00},           /* GPIO Pin Control */
-       {0x63, 0xBD},           /* GPIO Pin Data */
-       {0x67, 0x00},           /* Pin Tri-State */
-       {0x80, 0x80},           /* Pixel Pipeline Config 0 register */
-       {0xA0, 0x00},           /* Cursor 1 Control Reg */
-       {0xA1, 0x00},           /* Cursor 1 Vertical Extension Reg */
-       {0xA2, 0x00},           /* Cursor 1 Base Address Low */
-       {0xA3, 0x00},           /* Cursor 1 Base Address High */
-       {0xA4, 0x00},           /* Cursor 1 X-Position Low */
-       {0xA5, 0x00},           /* Cursor 1 X-Position High */
-       {0xA6, 0x00},           /* Cursor 1 Y-Position Low */
-       {0xA7, 0x00},           /* Cursor 1 Y-Position High */
-       {0xA8, 0x00},           /* Cursor 2 Control Reg */
-       {0xA9, 0x00},           /* Cursor 2 Vertical Extension Reg */
-       {0xAA, 0x00},           /* Cursor 2 Base Address Low */
-       {0xAB, 0x00},           /* Cursor 2 Base Address High */
-       {0xAC, 0x00},           /* Cursor 2 X-Position Low */
-       {0xAD, 0x00},           /* Cursor 2 X-Position High */
-       {0xAE, 0x00},           /* Cursor 2 Y-Position Low */
-       {0xAF, 0x00},           /* Cursor 2 Y-Position High */
-       {0xC0, 0x7D},           /* Dot Clock 0 VCO M-Divisor */
-       {0xC1, 0x07},           /* Dot Clock 0 VCO N-Divisor */
-       {0xC3, 0x34},           /* Dot Clock 0 Divisor select */
-       {0xC4, 0x55},           /* Dot Clock 1 VCO M-Divisor */
-       {0xC5, 0x09},           /* Dot Clock 1 VCO N-Divisor */
-       {0xC7, 0x24},           /* Dot Clock 1 Divisor select */
-       {0xC8, 0x7D},           /* Dot Clock 2 VCO M-Divisor */
-       {0xC9, 0x07},           /* Dot Clock 2 VCO N-Divisor */
-       {0xCB, 0x34},           /* Dot Clock 2 Divisor select */
-       {0xCC, 0x38},           /* Memory Clock 0 VCO M-Divisor */
-       {0xCD, 0x03},           /* Memory Clock 0 VCO N-Divisor */
-       {0xCE, 0x90},           /* Memory Clock 0 Divisor select */
-       {0xCF, 0x06},           /* Clock Config */
-       {0xD0, 0x0F},           /* Power Down */
-       {0xD1, 0x01},           /* Power Down BitBLT */
-       {0xFF, 0xFF}            /* end of table */
-};
-/* Clock Config:
- * =============
- *
- * PD Registers:
- * -------------
- * Bit2 and Bit4..6 are used for the Loop Divisor and Post Divisor.
- * They are encoded as follows:
- *
- * +---+--------------+
- * | 2 | Loop Divisor |
- * +---+--------------+
- * | 1 | 1            |
- * +---+--------------+
- * | 0 | 4            |
- * +---+--------------+
- * Note: The Memory Clock does not have a Loop Divisor.
- * +---+---+---+--------------+
- * | 6 | 5 | 4 | Post Divisor |
- * +---+---+---+--------------+
- * | 0 | 0 | 0 | 1            |
- * +---+---+---+--------------+
- * | 0 | 0 | 1 | 2            |
- * +---+---+---+--------------+
- * | 0 | 1 | 0 | 4            |
- * +---+---+---+--------------+
- * | 0 | 1 | 1 | 8            |
- * +---+---+---+--------------+
- * | 1 | 0 | 0 | 16           |
- * +---+---+---+--------------+
- * | 1 | 0 | 1 | 32           |
- * +---+---+---+--------------+
- * | 1 | 1 | X | reserved     |
- * +---+---+---+--------------+
- *
- * All other bits are reserved in these registers.
- *
- * Clock VCO M Registers:
- * ----------------------
- * These Registers contain the M Value -2.
- *
- * Clock VCO N Registers:
- * ----------------------
- * These Registers contain the N Value -2.
- *
- * Formulas:
- * ---------
- * Fvco = (Fref * Loop Divisor * M/N), whereas 100MHz < Fvco < 220MHz
- * Fout = Fvco / Post Divisor
- *
- * Dot Clk0 (default 25MHz):
- * -------------------------
- * Fvco = 14.318 * 127 / 9 = 202.045MHz
- * Fout = 202.045MHz / 8 = 25.25MHz
- * Post Divisor = 8
- * Loop Divisor = 1
- * XRC0 = (M - 2) = 125 = 0x7D
- * XRC1 = (N - 2) = 7   = 0x07
- * XRC3 =                 0x34
- *
- * Dot Clk1 (default 28MHz):
- * -------------------------
- * Fvco = 14.318 * 87 / 11 = 113.24MHz
- * Fout = 113.24MHz / 4 = 28.31MHz
- * Post Divisor = 4
- * Loop Divisor = 1
- * XRC4 = (M - 2) = 85 = 0x55
- * XRC5 = (N - 2) = 9  = 0x09
- * XRC7 =                0x24
- *
- * Dot Clk2 (variable for extended modes set to 25MHz):
- * ----------------------------------------------------
- * Fvco = 14.318 * 127 / 9 = 202.045MHz
- * Fout = 202.045MHz / 8 = 25.25MHz
- * Post Divisor = 8
- * Loop Divisor = 1
- * XRC8 = (M - 2) = 125 = 0x7D
- * XRC9 = (N - 2) = 7   = 0x07
- * XRCB =                 0x34
- *
- * Memory Clk for most modes >50MHz:
- * ----------------------------------
- * Fvco = 14.318 * 58 / 5 = 166MHz
- * Fout = 166MHz / 2      = 83MHz
- * Post Divisor = 2
- * XRCC = (M - 2) = 57  = 0x38
- * XRCD = (N - 2) = 3   = 0x03
- * XRCE =                 0x90
- *
- * Note Bit7 enables the clock source from the VCO
- *
- */
-
-/*******************************************************************
- * Chips struct
- *******************************************************************/
-struct ctfb_chips_properties {
-       int device_id;          /* PCI Device ID */
-       unsigned long max_mem;  /* memory for frame buffer */
-       int vld_set;            /* value of VLD if bit2 in clock control is set */
-       int vld_not_set;        /* value of VLD if bit2 in clock control is set */
-       int mn_diff;            /* difference between M/N Value + mn_diff = M/N Register */
-       int mn_min;             /* min value of M/N Value */
-       int mn_max;             /* max value of M/N Value */
-       int vco_min;            /* VCO Min in MHz */
-       int vco_max;            /* VCO Max in MHz */
-};
-
-static const struct ctfb_chips_properties chips[] = {
-       {PCI_DEVICE_ID_CT_69000, 0x200000, 1, 4, -2, 3, 257, 100, 220},
-       {PCI_DEVICE_ID_CT_65555, 0x100000, 16, 4, 0, 1, 255, 48, 220},  /* NOT TESTED */
-       {0, 0, 0, 0, 0, 0, 0, 0, 0}     /* Terminator */
-};
-
-/*
- * The Graphic Device
- */
-GraphicDevice ctfb;
-
-/*******************************************************************************
-*
-* Low Level Routines
-*/
-
-/*******************************************************************************
-*
-* Read CT ISA register
-*/
-#ifdef VGA_DEBUG
-static unsigned char
-ctRead (unsigned short index)
-{
-       GraphicDevice *pGD = (GraphicDevice *) & ctfb;
-       if (index == CT_AR_O)
-               /* synch the Flip Flop */
-               in8 (pGD->isaBase + CT_STATUS_REG1_O);
-
-       return (in8 (pGD->isaBase + index));
-}
-#endif
-/*******************************************************************************
-*
-* Write CT ISA register
-*/
-static void
-ctWrite (unsigned short index, unsigned char val)
-{
-       GraphicDevice *pGD = (GraphicDevice *) & ctfb;
-
-       out8 ((pGD->isaBase + index), val);
-}
-
-/*******************************************************************************
-*
-* Read CT ISA register indexed
-*/
-static unsigned char
-ctRead_i (unsigned short index, char reg)
-{
-       GraphicDevice *pGD = (GraphicDevice *) & ctfb;
-       if (index == CT_AR_O)
-               /* synch the Flip Flop */
-               in8 (pGD->isaBase + CT_STATUS_REG1_O);
-       out8 ((pGD->isaBase + index), reg);
-       return (in8 (pGD->isaBase + index + 1));
-}
-
-/*******************************************************************************
-*
-* Write CT ISA register indexed
-*/
-static void
-ctWrite_i (unsigned short index, char reg, char val)
-{
-       GraphicDevice *pGD = (GraphicDevice *) & ctfb;
-       if (index == CT_AR_O) {
-               /* synch the Flip Flop */
-               in8 (pGD->isaBase + CT_STATUS_REG1_O);
-               out8 ((pGD->isaBase + index), reg);
-               out8 ((pGD->isaBase + index), val);
-       } else {
-               out8 ((pGD->isaBase + index), reg);
-               out8 ((pGD->isaBase + index + 1), val);
-       }
-}
-
-/*******************************************************************************
-*
-* Write a table of CT ISA register
-*/
-static void
-ctLoadRegs (unsigned short index, CT_CFG_TABLE * regTab)
-{
-       while (regTab->reg != 0xFF) {
-               ctWrite_i (index, regTab->reg, regTab->val);
-               regTab++;
-       }
-}
-
-/*****************************************************************************/
-static void
-SetArRegs (void)
-{
-       int i, tmp;
-
-       for (i = 0; i < 0x10; i++)
-               ctWrite_i (CT_AR_O, i, i);
-       if (text)
-               tmp = 0x04;
-       else
-               tmp = 0x41;
-
-       ctWrite_i (CT_AR_O, 0x10, tmp); /* Mode Control Register */
-       ctWrite_i (CT_AR_O, 0x11, 0x00);        /* Overscan Color Register */
-       ctWrite_i (CT_AR_O, 0x12, 0x0f);        /* Memory Plane Enable Register */
-       if (fntwidth == 9)
-               tmp = 0x08;
-       else
-               tmp = 0x00;
-       ctWrite_i (CT_AR_O, 0x13, tmp); /* Horizontal Pixel Panning */
-       ctWrite_i (CT_AR_O, 0x14, 0x00);        /* Color Select Register    */
-       ctWrite (CT_AR_O, 0x20);        /* enable video             */
-}
-
-/*****************************************************************************/
-static void
-SetGrRegs (void)
-{                              /* Set Graphics Mode */
-       int i;
-
-       for (i = 0; i < 0x05; i++)
-               ctWrite_i (CT_GR_O, i, 0);
-       if (text) {
-               ctWrite_i (CT_GR_O, 0x05, 0x10);
-               ctWrite_i (CT_GR_O, 0x06, 0x02);
-       } else {
-               ctWrite_i (CT_GR_O, 0x05, 0x40);
-               ctWrite_i (CT_GR_O, 0x06, 0x05);
-       }
-       ctWrite_i (CT_GR_O, 0x07, 0x0f);
-       ctWrite_i (CT_GR_O, 0x08, 0xff);
-}
-
-/*****************************************************************************/
-static void
-SetSrRegs (void)
-{
-       int tmp = 0;
-
-       ctWrite_i (CT_SR_O, 0x00, 0x00);        /* reset */
-       /*rr( sr, 0x01, tmp );
-          if( fntwidth == 8 ) tmp |= 0x01; else tmp &= ~0x01;
-          wr( sr, 0x01, tmp );  */
-       if (fntwidth == 8)
-               ctWrite_i (CT_SR_O, 0x01, 0x01);        /* Clocking Mode Register */
-       else
-               ctWrite_i (CT_SR_O, 0x01, 0x00);        /* Clocking Mode Register */
-       ctWrite_i (CT_SR_O, 0x02, 0x0f);        /* Enable CPU wr access to given memory plane */
-       ctWrite_i (CT_SR_O, 0x03, 0x00);        /* Character Map Select Register */
-       if (text)
-               tmp = 0x02;
-       else
-               tmp = 0x0e;
-       ctWrite_i (CT_SR_O, 0x04, tmp); /* Enable CPU accesses to the rest of the 256KB
-                                          total VGA memory beyond the first 64KB and set
-                                          fb mapping mode. */
-       ctWrite_i (CT_SR_O, 0x00, 0x03);        /* enable */
-}
-
-/*****************************************************************************/
-static void
-SetBitsPerPixelIntoXrRegs (int bpp)
-{
-       unsigned int n = (bpp >> 3), tmp;       /* only for 15, 8, 16, 24 bpp */
-       static char md[4] = { 0x04, 0x02, 0x05, 0x06 }; /* DisplayColorMode */
-       static char off[4] = { ~0x20, ~0x30, ~0x20, ~0x10 };    /* mask */
-       static char on[4] = { 0x10, 0x00, 0x10, 0x20 }; /* mask */
-       if (bpp == 15)
-               n = 0;
-       tmp = ctRead_i (CT_XR_O, 0x20);
-       tmp &= off[n];
-       tmp |= on[n];
-       ctWrite_i (CT_XR_O, 0x20, tmp); /* BitBLT Configuration */
-       ctWrite_i (CT_XR_O, 0x81, md[n]);
-}
-
-/*****************************************************************************/
-static void
-SetCrRegs (struct ctfb_res_modes *var, int bits_per_pixel)
-{                              /* he -le-   ht|0    hd -ri- hs     -h-      he */
-       unsigned char cr[0x7a];
-       int i, tmp;
-       unsigned int hd, hs, he, ht, hbe;       /* Horizontal.  */
-       unsigned int vd, vs, ve, vt;    /* vertical */
-       unsigned int bpp, wd, dblscan, interlaced, bcast, CrtHalfLine;
-       unsigned int CompSyncCharClkDelay, CompSyncPixelClkDelay;
-       unsigned int NTSC_PAL_HorizontalPulseWidth, BlDelayCtrl;
-       unsigned int HorizontalEqualizationPulses;
-       unsigned int HorizontalSerration1Start, HorizontalSerration2Start;
-
-       const int LineCompare = 0x3ff;
-       unsigned int TextScanLines = 1; /* this is in fact a vertical zoom factor   */
-       unsigned int RAMDAC_BlankPedestalEnable = 0;    /* 1=en-, 0=disable, see XR82 */
-
-       hd = (var->xres) / 8;   /* HDisp.  */
-       hs = (var->xres + var->right_margin) / 8;       /* HsStrt  */
-       he = (var->xres + var->right_margin + var->hsync_len) / 8;      /* HsEnd   */
-       ht = (var->left_margin + var->xres + var->right_margin + var->hsync_len) / 8;   /* HTotal  */
-       hbe = ht - 1;           /* HBlankEnable todo docu wants ht here, but it does not work */
-       /* ve -up-  vt|0    vd -lo- vs     -v-      ve */
-       vd = var->yres;         /* VDisplay   */
-       vs = var->yres + var->lower_margin;     /* VSyncStart */
-       ve = var->yres + var->lower_margin + var->vsync_len;    /* VSyncEnd */
-       vt = var->upper_margin + var->yres + var->lower_margin + var->vsync_len;        /* VTotal  */
-       bpp = bits_per_pixel;
-       dblscan = (var->vmode & FB_VMODE_DOUBLE) ? 1 : 0;
-       interlaced = var->vmode & FB_VMODE_INTERLACED;
-       bcast = var->sync & FB_SYNC_BROADCAST;
-       CrtHalfLine = bcast ? (hd >> 1) : 0;
-       BlDelayCtrl = bcast ? 1 : 0;
-       CompSyncCharClkDelay = 0;       /* 2 bit */
-       CompSyncPixelClkDelay = 0;      /* 3 bit */
-       if (bcast) {
-               NTSC_PAL_HorizontalPulseWidth = 7;      /*( var->hsync_len >> 1 ) + 1 */
-               HorizontalEqualizationPulses = 0;       /* inverse value */
-               HorizontalSerration1Start = 31; /* ( ht >> 1 ) */
-               HorizontalSerration2Start = 89; /* ( ht >> 1 ) */
-       } else {
-               NTSC_PAL_HorizontalPulseWidth = 0;
-               /* 4 bit: hsync pulse width = ( ( CR74[4:0] - CR74[5] )
-                * / 2 ) + 1 --> CR74[4:0] = 2*(hs-1) + CR74[5] */
-               HorizontalEqualizationPulses = 1;       /* inverse value */
-               HorizontalSerration1Start = 0;  /* ( ht >> 1 ) */
-               HorizontalSerration2Start = 0;  /* ( ht >> 1 ) */
-       }
-
-       if (bpp == 15)
-               bpp = 16;
-       wd = var->xres * bpp / 64;      /* double words per line */
-       if (interlaced) {       /* we divide all vertical timings, exept vd */
-               vs >>= 1;
-               ve >>= 1;
-               vt >>= 1;
-       }
-       memset (cr, 0, sizeof (cr));
-       cr[0x00] = 0xff & (ht - 5);
-       cr[0x01] = hd - 1;      /* soll:4f ist 59 */
-       cr[0x02] = hd;
-       cr[0x03] = (hbe & 0x1F) | 0x80; /* hd + ht - hd  */
-       cr[0x04] = hs;
-       cr[0x05] = ((hbe & 0x20) << 2) | (he & 0x1f);
-       cr[0x06] = (vt - 2) & 0xFF;
-       cr[0x30] = (vt - 2) >> 8;
-       cr[0x07] = ((vt & 0x100) >> 8)
-           | ((vd & 0x100) >> 7)
-           | ((vs & 0x100) >> 6)
-           | ((vs & 0x100) >> 5)
-           | ((LineCompare & 0x100) >> 4)
-           | ((vt & 0x200) >> 4)
-           | ((vd & 0x200) >> 3)
-           | ((vs & 0x200) >> 2);
-       cr[0x08] = 0x00;
-       cr[0x09] = (dblscan << 7)
-           | ((LineCompare & 0x200) >> 3)
-           | ((vs & 0x200) >> 4)
-           | (TextScanLines - 1);
-       cr[0x10] = vs & 0xff;   /* VSyncPulseStart */
-       cr[0x32] = (vs & 0xf00) >> 8;   /* VSyncPulseStart */
-       cr[0x11] = (ve & 0x0f); /* | 0x20;      */
-       cr[0x12] = (vd - 1) & 0xff;     /* LineCount  */
-       cr[0x31] = ((vd - 1) & 0xf00) >> 8;     /* LineCount */
-       cr[0x13] = wd & 0xff;
-       cr[0x41] = (wd & 0xf00) >> 8;
-       cr[0x15] = vs & 0xff;
-       cr[0x33] = (vs & 0xf00) >> 8;
-       cr[0x38] = (0x100 & (ht - 5)) >> 8;
-       cr[0x3C] = 0xc0 & hbe;
-       cr[0x16] = (vt - 1) & 0xff;     /* vbe - docu wants vt here, */
-       cr[0x17] = 0xe3;        /* but it does not work */
-       cr[0x18] = 0xff & LineCompare;
-       cr[0x22] = 0xff;        /* todo? */
-       cr[0x70] = interlaced ? (0x80 | CrtHalfLine) : 0x00;    /* check:0xa6  */
-       cr[0x71] = 0x80 | (RAMDAC_BlankPedestalEnable << 6)
-           | (BlDelayCtrl << 5)
-           | ((0x03 & CompSyncCharClkDelay) << 3)
-           | (0x07 & CompSyncPixelClkDelay);   /* todo: see XR82 */
-       cr[0x72] = HorizontalSerration1Start;
-       cr[0x73] = HorizontalSerration2Start;
-       cr[0x74] = (HorizontalEqualizationPulses << 5)
-           | NTSC_PAL_HorizontalPulseWidth;
-       /* todo: ct69000 has also 0x75-79 */
-       /* now set the registers */
-       for (i = 0; i <= 0x0d; i++) {   /*CR00 .. CR0D */
-               ctWrite_i (CT_CR_O, i, cr[i]);
-       }
-       for (i = 0x10; i <= 0x18; i++) {        /*CR10 .. CR18 */
-               ctWrite_i (CT_CR_O, i, cr[i]);
-       }
-       i = 0x22;               /*CR22 */
-       ctWrite_i (CT_CR_O, i, cr[i]);
-       for (i = 0x30; i <= 0x33; i++) {        /*CR30 .. CR33 */
-               ctWrite_i (CT_CR_O, i, cr[i]);
-       }
-       i = 0x38;               /*CR38 */
-       ctWrite_i (CT_CR_O, i, cr[i]);
-       i = 0x3C;               /*CR3C */
-       ctWrite_i (CT_CR_O, i, cr[i]);
-       for (i = 0x40; i <= 0x41; i++) {        /*CR40 .. CR41 */
-               ctWrite_i (CT_CR_O, i, cr[i]);
-       }
-       for (i = 0x70; i <= 0x74; i++) {        /*CR70 .. CR74 */
-               ctWrite_i (CT_CR_O, i, cr[i]);
-       }
-       tmp = ctRead_i (CT_CR_O, 0x40);
-       tmp &= 0x0f;
-       tmp |= 0x80;
-       ctWrite_i (CT_CR_O, 0x40, tmp); /* StartAddressEnable */
-}
-
-/* pixelclock control */
-
-/*****************************************************************************
- We have a rational number p/q and need an m/n which is very close to p/q
- but has m and n within mnmin and mnmax. We have no floating point in the
- kernel. We can use long long without divide. And we have time to compute...
-******************************************************************************/
-static unsigned int
-FindBestPQFittingMN (unsigned int p, unsigned int q, unsigned int mnmin,
-                    unsigned int mnmax, unsigned int *pm, unsigned int *pn)
-{
-       /* this code is not for general purpose usable but good for our number ranges */
-       unsigned int n = mnmin, m = 0;
-       long long int L = 0, P = p, Q = q, H = P >> 1;
-       long long int D = 0x7ffffffffffffffLL;
-       for (n = mnmin; n <= mnmax; n++) {
-               m = mnmin;      /* p/q ~ m/n -> p*n ~ m*q -> p*n-x*q ~ 0 */
-               L = P * n - m * Q;      /* n * vco - m * fref should be near 0 */
-               while (L > 0 && m < mnmax) {
-                       L -= q; /* difference is greater as 0 subtract fref */
-                       m++;    /* and increment m */
-               }
-               /* difference is less or equal than 0 or m > maximum */
-               if (m > mnmax)
-                       break;  /* no solution: if we increase n we get the same situation */
-               /* L is <= 0 now */
-               if (-L > H && m > mnmin) {      /* if difference > the half fref */
-                       L += q; /* we take the situation before */
-                       m--;    /* because its closer to 0 */
-               }
-               L = (L < 0) ? -L : +L;  /* absolute value */
-               if (D < L)      /* if last difference was better take next n */
-                       continue;
-               D = L;
-               *pm = m;
-               *pn = n;        /*  keep improved data */
-               if (D == 0)
-                       break;  /* best result we can get */
-       }
-       return (unsigned int) (0xffffffff & D);
-}
-
-/* that is the hardware < 69000 we have to manage
- +---------+  +-------------------+  +----------------------+  +--+
- | REFCLK  |__|NTSC Divisor Select|__|FVCO Reference Divisor|__|÷N|__
- | 14.3MHz |  |(NTSCDS) (÷1, Ã·5)  |  |Select (RDS) (÷1, Ã·4) |  |  |  |
- +---------+  +-------------------+  +----------------------+  +--+  |
-  ___________________________________________________________________|
- |
- |                                    fvco                      fout
- | +--------+  +------------+  +-----+     +-------------------+   +----+
- +-| Phase  |__|Charge Pump |__| VCO |_____|Post Divisor (PD)  |___|CLK |--->
- +-| Detect |  |& Filter VCO|  |     |  |  |÷1, 2, 4, 8, 16, 32|   |    |
- | +--------+  +------------+  +-----+  |  +-------------------+   +----+
- |                                      |
- |    +--+   +---------------+          |
- |____|÷M|___|VCO Loop Divide|__________|
-      |  |   |(VLD)(÷4, Ã·16) |
-      +--+   +---------------+
-****************************************************************************
-  that is the hardware >= 69000 we have to manage
- +---------+  +--+
- | REFCLK  |__|÷N|__
- | 14.3MHz |  |  |  |
- +---------+  +--+  |
-  __________________|
- |
- |                                    fvco                      fout
- | +--------+  +------------+  +-----+     +-------------------+   +----+
- +-| Phase  |__|Charge Pump |__| VCO |_____|Post Divisor (PD)  |___|CLK |--->
- +-| Detect |  |& Filter VCO|  |     |  |  |÷1, 2, 4, 8, 16, 32|   |    |
- | +--------+  +------------+  +-----+  |  +-------------------+   +----+
- |                                      |
- |    +--+   +---------------+          |
- |____|÷M|___|VCO Loop Divide|__________|
-      |  |   |(VLD)(÷1, Ã·4)  |
-      +--+   +---------------+
-
-
-*/
-
-#define VIDEO_FREF 14318180;   /* Hz  */
-/*****************************************************************************/
-static int
-ReadPixClckFromXrRegsBack (struct ctfb_chips_properties *param)
-{
-       unsigned int m, n, vld, pd, PD, fref, xr_cb, i, pixclock;
-       i = 0;
-       pixclock = -1;
-       fref = VIDEO_FREF;
-       m = ctRead_i (CT_XR_O, 0xc8);
-       n = ctRead_i (CT_XR_O, 0xc9);
-       m -= param->mn_diff;
-       n -= param->mn_diff;
-       xr_cb = ctRead_i (CT_XR_O, 0xcb);
-       PD = (0x70 & xr_cb) >> 4;
-       pd = 1;
-       for (i = 0; i < PD; i++) {
-               pd *= 2;
-       }
-       vld = (0x04 & xr_cb) ? param->vld_set : param->vld_not_set;
-       if (n * vld * m) {
-               unsigned long long p = 1000000000000LL * pd * n;
-               unsigned long long q = (long long) fref * vld * m;
-               while ((p > 0xffffffffLL) || (q > 0xffffffffLL)) {
-                       p >>= 1;        /* can't divide with long long so we scale down */
-                       q >>= 1;
-               }
-               pixclock = (unsigned) p / (unsigned) q;
-       } else
-               printf ("Invalid data in xr regs.\n");
-       return pixclock;
-}
-
-/*****************************************************************************/
-static void
-FindAndSetPllParamIntoXrRegs (unsigned int pixelclock,
-                             struct ctfb_chips_properties *param)
-{
-       unsigned int m, n, vld, pd, PD, fref, xr_cb;
-       unsigned int fvcomin, fvcomax, pclckmin, pclckmax, pclk;
-       unsigned int pfreq, fvco, new_pixclock;
-       unsigned int D,nback,mback;
-
-       fref = VIDEO_FREF;
-       pd = 1;
-       PD = 0;
-       fvcomin = param->vco_min;
-       fvcomax = param->vco_max;       /* MHz */
-       pclckmin = 1000000 / fvcomax + 1;       /*   4546 */
-       pclckmax = 32000000 / fvcomin - 1;      /* 666665 */
-       pclk = minmax (pclckmin, pixelclock, pclckmax); /* ps pp */
-       pfreq = 250 * (4000000000U / pclk);
-       fvco = pfreq;           /* Hz */
-       new_pixclock = 0;
-       while (fvco < fvcomin * 1000000) {
-               /* double VCO starting with the pixelclock frequency
-                * as long as it is lower than the minimal VCO frequency */
-               fvco *= 2;
-               pd *= 2;
-               PD++;
-       }
-       /* fvco is exactly pd * pixelclock and higher than the ninmal VCO frequency */
-       /* first try */
-       vld = param->vld_set;
-       D=FindBestPQFittingMN (fvco / vld, fref, param->mn_min, param->mn_max, &m, &n); /* rds = 1 */
-       mback=m;
-       nback=n;
-       /* second try */
-       vld = param->vld_not_set;
-       if(D<FindBestPQFittingMN (fvco / vld, fref, param->mn_min, param->mn_max, &m, &n)) {    /* rds = 1 */
-               /* first try was better */
-               m=mback;
-               n=nback;
-               vld = param->vld_set;
-       }
-       m += param->mn_diff;
-       n += param->mn_diff;
-       debug("VCO %d, pd %d, m %d n %d vld %d\n", fvco, pd, m, n, vld);
-       xr_cb = ((0x7 & PD) << 4) | (vld == param->vld_set ? 0x04 : 0);
-       /* All four of the registers used for dot clock 2 (XRC8 - XRCB) must be
-        * written, and in order from XRC8 to XRCB, before the hardware will
-        * update the synthesizer s settings.
-        */
-       ctWrite_i (CT_XR_O, 0xc8, m);
-       ctWrite_i (CT_XR_O, 0xc9, n);   /* xrca does not exist in CT69000 and CT69030 */
-       ctWrite_i (CT_XR_O, 0xca, 0);   /* because of a hw bug I guess, but we write */
-       ctWrite_i (CT_XR_O, 0xcb, xr_cb);       /* 0 to it for savety */
-       new_pixclock = ReadPixClckFromXrRegsBack (param);
-       debug("pixelclock.set = %d, pixelclock.real = %d\n",
-               pixelclock, new_pixclock);
-}
-
-/*****************************************************************************/
-static void
-SetMsrRegs (struct ctfb_res_modes *mode)
-{
-       unsigned char h_synch_high, v_synch_high;
-
-       h_synch_high = (mode->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 0x40;  /* horizontal Synch High active */
-       v_synch_high = (mode->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 0x80; /* vertical Synch High active */
-       ctWrite (CT_MSR_W_O, (h_synch_high | v_synch_high | 0x29));
-       /* upper64K==0x20, CLC2select==0x08, RAMenable==0x02!(todo), CGA==0x01
-        * Selects the upper 64KB page.Bit5=1
-        * CLK2 (left reserved in standard VGA) Bit3|2=1|0
-        * Disables CPU access to frame buffer. Bit1=0
-        * Sets the I/O address decode for ST01, FCR, and all CR registers
-        * to the 3Dx I/O address range (CGA emulation). Bit0=1
-        */
-}
-
-/************************************************************************************/
-#ifdef VGA_DUMP_REG
-
-static void
-ctDispRegs (unsigned short index, int from, int to)
-{
-       unsigned char status;
-       int i;
-
-       for (i = from; i < to; i++) {
-               status = ctRead_i (index, i);
-               printf ("%02X: is %02X\n", i, status);
-       }
-}
-
-void
-video_dump_reg (void)
-{
-       int i;
-
-       printf ("Extended Regs:\n");
-       ctDispRegs (CT_XR_O, 0, 0xC);
-       ctDispRegs (CT_XR_O, 0xe, 0xf);
-       ctDispRegs (CT_XR_O, 0x20, 0x21);
-       ctDispRegs (CT_XR_O, 0x40, 0x50);
-       ctDispRegs (CT_XR_O, 0x60, 0x64);
-       ctDispRegs (CT_XR_O, 0x67, 0x68);
-       ctDispRegs (CT_XR_O, 0x70, 0x72);
-       ctDispRegs (CT_XR_O, 0x80, 0x83);
-       ctDispRegs (CT_XR_O, 0xA0, 0xB0);
-       ctDispRegs (CT_XR_O, 0xC0, 0xD3);
-       printf ("Sequencer Regs:\n");
-       ctDispRegs (CT_SR_O, 0, 0x8);
-       printf ("Graphic Regs:\n");
-       ctDispRegs (CT_GR_O, 0, 0x9);
-       printf ("CRT Regs:\n");
-       ctDispRegs (CT_CR_O, 0, 0x19);
-       ctDispRegs (CT_CR_O, 0x22, 0x23);
-       ctDispRegs (CT_CR_O, 0x30, 0x34);
-       ctDispRegs (CT_CR_O, 0x38, 0x39);
-       ctDispRegs (CT_CR_O, 0x3C, 0x3D);
-       ctDispRegs (CT_CR_O, 0x40, 0x42);
-       ctDispRegs (CT_CR_O, 0x70, 0x80);
-       /* don't display the attributes */
-}
-
-#endif
-
-/***************************************************************
- * Wait for BitBlt ready
- */
-static int
-video_wait_bitblt (unsigned long addr)
-{
-       unsigned long br04;
-       int i = 0;
-       br04 = in32r (addr);
-       while (br04 & 0x80000000) {
-               udelay (1);
-               br04 = in32r (addr);
-               if (i++ > 1000000) {
-                       printf ("ERROR Timeout %lx\n", br04);
-                       return 1;
-               }
-       }
-       return 0;
-}
-
-/***************************************************************
- * Set up BitBlt Registrs
- */
-static void
-SetDrawingEngine (int bits_per_pixel)
-{
-       unsigned long br04, br00;
-       unsigned char tmp;
-
-       GraphicDevice *pGD = (GraphicDevice *) & ctfb;
-
-       tmp = ctRead_i (CT_XR_O, 0x20); /* BitBLT Configuration */
-       tmp |= 0x02;            /* reset BitBLT */
-       ctWrite_i (CT_XR_O, 0x20, tmp); /* BitBLT Configuration */
-       udelay (10);
-       tmp &= 0xfd;            /* release reset BitBLT */
-       ctWrite_i (CT_XR_O, 0x20, tmp); /* BitBLT Configuration */
-       video_wait_bitblt (pGD->pciBase + BR04_o);
-
-       /* set pattern Address */
-       out32r (pGD->pciBase + BR05_o, PATTERN_ADR & 0x003ffff8);
-       br04 = 0;
-       if (bits_per_pixel == 1) {
-               br04 |= 0x00040000;     /* monochome Pattern */
-               br04 |= 0x00001000;     /* monochome source */
-       }
-       br00 = ((pGD->winSizeX * pGD->gdfBytesPP) << 16) + (pGD->winSizeX * pGD->gdfBytesPP);   /* bytes per scanline */
-       out32r (pGD->pciBase + BR00_o, br00);   /* */
-       out32r (pGD->pciBase + BR08_o, (10 << 16) + 10);        /* dummy */
-       out32r (pGD->pciBase + BR04_o, br04);   /* write all 0 */
-       out32r (pGD->pciBase + BR07_o, 0);      /* destination */
-       video_wait_bitblt (pGD->pciBase + BR04_o);
-}
-
-/****************************************************************************
-* supported Video Chips
-*/
-static struct pci_device_id supported[] = {
-       {PCI_VENDOR_ID_CT, PCI_DEVICE_ID_CT_69000},
-       {}
-};
-
-/*******************************************************************************
-*
-* Init video chip
-*/
-void *
-video_hw_init (void)
-{
-       GraphicDevice *pGD = (GraphicDevice *) & ctfb;
-       unsigned short device_id;
-       pci_dev_t devbusfn;
-       int videomode;
-       unsigned long t1, hsynch, vsynch;
-       unsigned int pci_mem_base, *vm;
-       int tmp, i, bits_per_pixel;
-       char *penv;
-       struct ctfb_res_modes *res_mode;
-       struct ctfb_res_modes var_mode;
-       struct ctfb_chips_properties *chips_param;
-       /* Search for video chip */
-
-       if ((devbusfn = pci_find_devices (supported, 0)) < 0) {
-#ifdef CONFIG_VIDEO_ONBOARD
-               printf ("Video: Controller not found !\n");
-#endif
-               return (NULL);
-       }
-
-       /* PCI setup */
-       pci_write_config_dword (devbusfn, PCI_COMMAND,
-                               (PCI_COMMAND_MEMORY | PCI_COMMAND_IO));
-       pci_read_config_word (devbusfn, PCI_DEVICE_ID, &device_id);
-       pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, &pci_mem_base);
-       pci_mem_base = pci_mem_to_phys (devbusfn, pci_mem_base);
-
-       /* get chips params */
-       for (chips_param = (struct ctfb_chips_properties *) &chips[0];
-            chips_param->device_id != 0; chips_param++) {
-               if (chips_param->device_id == device_id)
-                       break;
-       }
-       if (chips_param->device_id == 0) {
-#ifdef CONFIG_VIDEO_ONBOARD
-               printf ("Video: controller 0x%X not supported\n", device_id);
-#endif
-               return NULL;
-       }
-       /* supported Video controller found */
-       printf ("Video: ");
-
-       tmp = 0;
-       videomode = 0x301;
-       /* get video mode via environment */
-       if ((penv = getenv ("videomode")) != NULL) {
-               /* deceide if it is a string */
-               if (penv[0] <= '9') {
-                       videomode = (int) simple_strtoul (penv, NULL, 16);
-                       tmp = 1;
-               }
-       } else {
-               tmp = 1;
-       }
-       if (tmp) {
-               /* parameter are vesa modes */
-               /* search params */
-               for (i = 0; i < VESA_MODES_COUNT; i++) {
-                       if (vesa_modes[i].vesanr == videomode)
-                               break;
-               }
-               if (i == VESA_MODES_COUNT) {
-                       printf ("no VESA Mode found, switching to mode 0x301 ");
-                       i = 0;
-               }
-               res_mode =
-                   (struct ctfb_res_modes *) &res_mode_init[vesa_modes[i].
-                                                            resindex];
-               bits_per_pixel = vesa_modes[i].bits_per_pixel;
-       } else {
-
-               res_mode = (struct ctfb_res_modes *) &var_mode;
-               bits_per_pixel = video_get_params (res_mode, penv);
-       }
-
-       /* calculate available color depth for controller memory */
-       if (bits_per_pixel == 15)
-               tmp = 2;
-       else
-               tmp = bits_per_pixel >> 3;      /* /8 */
-       if (((chips_param->max_mem -
-             ACCELMEMORY) / (res_mode->xres * res_mode->yres)) < tmp) {
-               tmp =
-                   ((chips_param->max_mem -
-                     ACCELMEMORY) / (res_mode->xres * res_mode->yres));
-               if (tmp == 0) {
-                       printf
-                           ("No matching videomode found .-> reduce resolution\n");
-                       return NULL;
-               } else {
-                       printf ("Switching back to %d Bits per Pixel ",
-                               tmp << 3);
-                       bits_per_pixel = tmp << 3;
-               }
-       }
-
-       /* calculate hsynch and vsynch freq (info only) */
-       t1 = (res_mode->left_margin + res_mode->xres +
-             res_mode->right_margin + res_mode->hsync_len) / 8;
-       t1 *= 8;
-       t1 *= res_mode->pixclock;
-       t1 /= 1000;
-       hsynch = 1000000000L / t1;
-       t1 *=
-           (res_mode->upper_margin + res_mode->yres +
-            res_mode->lower_margin + res_mode->vsync_len);
-       t1 /= 1000;
-       vsynch = 1000000000L / t1;
-
-       /* fill in Graphic device struct */
-       sprintf (pGD->modeIdent, "%dx%dx%d %ldkHz %ldHz", res_mode->xres,
-                res_mode->yres, bits_per_pixel, (hsynch / 1000),
-                (vsynch / 1000));
-       printf ("%s\n", pGD->modeIdent);
-       pGD->winSizeX = res_mode->xres;
-       pGD->winSizeY = res_mode->yres;
-       pGD->plnSizeX = res_mode->xres;
-       pGD->plnSizeY = res_mode->yres;
-       switch (bits_per_pixel) {
-       case 8:
-               pGD->gdfBytesPP = 1;
-               pGD->gdfIndex = GDF__8BIT_INDEX;
-               break;
-       case 15:
-               pGD->gdfBytesPP = 2;
-               pGD->gdfIndex = GDF_15BIT_555RGB;
-               break;
-       case 16:
-               pGD->gdfBytesPP = 2;
-               pGD->gdfIndex = GDF_16BIT_565RGB;
-               break;
-       case 24:
-               pGD->gdfBytesPP = 3;
-               pGD->gdfIndex = GDF_24BIT_888RGB;
-               break;
-       }
-       pGD->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
-       pGD->pciBase = pci_mem_base;
-       pGD->frameAdrs = pci_mem_base;
-       pGD->memSize = chips_param->max_mem;
-       /* Cursor Start Address */
-       pGD->dprBase =
-           (pGD->winSizeX * pGD->winSizeY * pGD->gdfBytesPP) + pci_mem_base;
-       if ((pGD->dprBase & 0x0fff) != 0) {
-               /* allign it */
-               pGD->dprBase &= 0xfffff000;
-               pGD->dprBase += 0x00001000;
-       }
-       debug("Cursor Start %x Pattern Start %x\n", pGD->dprBase,
-               PATTERN_ADR);
-       pGD->vprBase = pci_mem_base;    /* Dummy */
-       pGD->cprBase = pci_mem_base;    /* Dummy */
-       /* set up Hardware */
-
-       ctWrite (CT_MSR_W_O, 0x01);
-
-       /* set the extended Registers */
-       ctLoadRegs (CT_XR_O, xreg);
-       /* set atribute registers */
-       SetArRegs ();
-       /* set Graphics register */
-       SetGrRegs ();
-       /* set sequencer */
-       SetSrRegs ();
-
-       /* set msr */
-       SetMsrRegs (res_mode);
-
-       /* set CRT Registers */
-       SetCrRegs (res_mode, bits_per_pixel);
-       /* set color mode */
-       SetBitsPerPixelIntoXrRegs (bits_per_pixel);
-
-       /* set PLL */
-       FindAndSetPllParamIntoXrRegs (res_mode->pixclock, chips_param);
-
-       ctWrite_i (CT_SR_O, 0, 0x03);   /* clear synchronous reset */
-       /* Clear video memory */
-       i = pGD->memSize / 4;
-       vm = (unsigned int *) pGD->pciBase;
-       while (i--)
-               *vm++ = 0;
-       SetDrawingEngine (bits_per_pixel);
-#ifdef VGA_DUMP_REG
-       video_dump_reg ();
-#endif
-
-       return ((void *) &ctfb);
-}
-
- /*******************************************************************************
-*
-* Set a RGB color in the LUT (8 bit index)
-*/
-void
-video_set_lut (unsigned int index,     /* color number */
-              unsigned char r, /* red */
-              unsigned char g, /* green */
-              unsigned char b  /* blue */
-    )
-{
-
-       ctWrite (CT_LUT_MASK_O, 0xff);
-
-       ctWrite (CT_LUT_START_O, (char) index);
-
-       ctWrite (CT_LUT_RGB_O, r);      /* red */
-       ctWrite (CT_LUT_RGB_O, g);      /* green */
-       ctWrite (CT_LUT_RGB_O, b);      /* blue */
-       udelay (1);
-       ctWrite (CT_LUT_MASK_O, 0xff);
-}
-
-/*******************************************************************************
-*
-* Drawing engine fill on screen region
-*/
-void
-video_hw_rectfill (unsigned int bpp,   /* bytes per pixel */
-                  unsigned int dst_x,  /* dest pos x */
-                  unsigned int dst_y,  /* dest pos y */
-                  unsigned int dim_x,  /* frame width */
-                  unsigned int dim_y,  /* frame height */
-                  unsigned int color   /* fill color */
-    )
-{
-       GraphicDevice *pGD = (GraphicDevice *) & ctfb;
-       unsigned long *p, br04;
-
-       video_wait_bitblt (pGD->pciBase + BR04_o);
-
-       p = (unsigned long *) PATTERN_ADR;
-       dim_x *= bpp;
-       if (bpp == 3)
-               bpp++;          /* 24Bit needs a 32bit pattern */
-       memset (p, color, (bpp * sizeof (unsigned char) * 8 * 8));      /* 8 x 8 pattern data */
-       out32r (pGD->pciBase + BR07_o, ((pGD->winSizeX * dst_y) + dst_x) * pGD->gdfBytesPP);    /* destination */
-       br04 = in32r (pGD->pciBase + BR04_o) & 0xffffff00;
-       br04 |= 0xF0;           /* write Pattern P -> D */
-       out32r (pGD->pciBase + BR04_o, br04);   /* */
-       out32r (pGD->pciBase + BR08_o, (dim_y << 16) + dim_x);  /* starts the BITBlt */
-       video_wait_bitblt (pGD->pciBase + BR04_o);
-}
-
-/*******************************************************************************
-*
-* Drawing engine bitblt with screen region
-*/
-void
-video_hw_bitblt (unsigned int bpp,     /* bytes per pixel */
-                unsigned int src_x,    /* source pos x */
-                unsigned int src_y,    /* source pos y */
-                unsigned int dst_x,    /* dest pos x */
-                unsigned int dst_y,    /* dest pos y */
-                unsigned int dim_x,    /* frame width */
-                unsigned int dim_y     /* frame height */
-    )
-{
-       GraphicDevice *pGD = (GraphicDevice *) & ctfb;
-       unsigned long br04;
-
-       br04 = in32r (pGD->pciBase + BR04_o);
-
-       /* to prevent data corruption due to overlap, we have to
-        * find out if, and how the frames overlaps */
-       if (src_x < dst_x) {
-               /* src is more left than dest
-                * the frame may overlap -> start from right to left */
-               br04 |= 0x00000100;     /* set bit 8 */
-               src_x += dim_x;
-               dst_x += dim_x;
-       } else {
-               br04 &= 0xfffffeff;     /* clear bit 8 left to right */
-       }
-       if (src_y < dst_y) {
-               /* src is higher than dst
-                * the frame may overlap => start from bottom */
-               br04 |= 0x00000200;     /* set bit 9 */
-               src_y += dim_y;
-               dst_y += dim_y;
-       } else {
-               br04 &= 0xfffffdff;     /* clear bit 9 top to bottom */
-       }
-       dim_x *= bpp;
-       out32r (pGD->pciBase + BR06_o, ((pGD->winSizeX * src_y) + src_x) * pGD->gdfBytesPP);    /* source */
-       out32r (pGD->pciBase + BR07_o, ((pGD->winSizeX * dst_y) + dst_x) * pGD->gdfBytesPP);    /* destination */
-       br04 &= 0xffffff00;
-       br04 |= 0x000000CC;     /* S -> D */
-       out32r (pGD->pciBase + BR04_o, br04);   /* */
-       out32r (pGD->pciBase + BR08_o, (dim_y << 16) + dim_x);  /* start the BITBlt */
-       video_wait_bitblt (pGD->pciBase + BR04_o);
-}
-#endif                         /* CONFIG_VIDEO */
diff --git a/drivers/video/l5f31188.c b/drivers/video/l5f31188.c
deleted file mode 100644 (file)
index 3312dcf..0000000
+++ /dev/null
@@ -1,192 +0,0 @@
-/*
- * Copyright (c) 2013 Samsung Electronics Co., Ltd. All rights reserved.
- * Hyungwon Hwang <human.hwang@samsung.com>
- *
- * SPDX-License-Identifier:      GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/mipi_dsim.h>
-
-#define SCAN_FROM_LEFT_TO_RIGHT 0
-#define SCAN_FROM_RIGHT_TO_LEFT 1
-#define SCAN_FROM_TOP_TO_BOTTOM 0
-#define SCAN_FROM_BOTTOM_TO_TOP 1
-
-static void l5f31188_sleep_in(struct mipi_dsim_device *dev,
-               struct mipi_dsim_master_ops *ops)
-{
-       ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x10, 0x00);
-}
-
-static void l5f31188_sleep_out(struct mipi_dsim_device *dev,
-               struct mipi_dsim_master_ops *ops)
-{
-       ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x11, 0x00);
-}
-
-static void l5f31188_set_gamma(struct mipi_dsim_device *dev,
-               struct mipi_dsim_master_ops *ops)
-{
-       ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x26, 0x00);
-}
-
-static void l5f31188_display_off(struct mipi_dsim_device *dev,
-               struct mipi_dsim_master_ops *ops)
-{
-       ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x28, 0x00);
-}
-
-static void l5f31188_display_on(struct mipi_dsim_device *dev,
-               struct mipi_dsim_master_ops *ops)
-{
-       ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x29, 0x00);
-}
-
-static void l5f31188_ctl_memory_access(struct mipi_dsim_device *dev,
-               struct mipi_dsim_master_ops *ops,
-               int h_direction, int v_direction)
-{
-       ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x36,
-                       (((h_direction & 0x1) << 1) | (v_direction & 0x1)));
-}
-
-static void l5f31188_set_pixel_format(struct mipi_dsim_device *dev,
-               struct mipi_dsim_master_ops *ops)
-{
-       ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x3A, 0x70);
-}
-
-static void l5f31188_write_disbv(struct mipi_dsim_device *dev,
-               struct mipi_dsim_master_ops *ops, unsigned int brightness)
-{
-       ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x51, brightness);
-}
-
-static void l5f31188_write_ctrld(struct mipi_dsim_device *dev,
-               struct mipi_dsim_master_ops *ops)
-{
-       ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x53, 0x2C);
-}
-
-static void l5f31188_write_cabc(struct mipi_dsim_device *dev,
-               struct mipi_dsim_master_ops *ops,
-                       unsigned int wm_mode)
-{
-       ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x55, wm_mode);
-}
-
-static void l5f31188_write_cabcmb(struct mipi_dsim_device *dev,
-               struct mipi_dsim_master_ops *ops, unsigned int min_brightness)
-{
-       ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x5E,
-                       min_brightness);
-}
-
-static void l5f31188_set_extension(struct mipi_dsim_device *dev,
-               struct mipi_dsim_master_ops *ops)
-{
-       const unsigned char data_to_send[] = {
-               0xB9, 0xFF, 0x83, 0x94
-       };
-
-       ops->cmd_write(dev, MIPI_DSI_DCS_LONG_WRITE,
-                       (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
-}
-
-static void l5f31188_set_dgc_lut(struct mipi_dsim_device *dev,
-               struct mipi_dsim_master_ops *ops)
-{
-       const unsigned char data_to_send[] = {
-               0xC1, 0x01, 0x00, 0x04, 0x0E, 0x18, 0x1E, 0x26,
-               0x2F, 0x36, 0x3E, 0x47, 0x4E, 0x56, 0x5D, 0x65,
-               0x6D, 0x75, 0x7D, 0x84, 0x8C, 0x94, 0x9C, 0xA4,
-               0xAD, 0xB5, 0xBD, 0xC5, 0xCC, 0xD4, 0xDE, 0xE5,
-               0xEE, 0xF7, 0xFF, 0x3F, 0x9A, 0xCE, 0xD4, 0x21,
-               0xA1, 0x26, 0x54, 0x00, 0x00, 0x04, 0x0E, 0x19,
-               0x1F, 0x27, 0x30, 0x37, 0x40, 0x48, 0x50, 0x58,
-               0x60, 0x67, 0x6F, 0x77, 0x7F, 0x87, 0x8F, 0x97,
-               0x9F, 0xA7, 0xB0, 0xB8, 0xC0, 0xC8, 0xCE, 0xD8,
-               0xE0, 0xE7, 0xF0, 0xF7, 0xFF, 0x3C, 0xEB, 0xFD,
-               0x2F, 0x66, 0xA8, 0x2C, 0x46, 0x00, 0x00, 0x04,
-               0x0E, 0x18, 0x1E, 0x26, 0x30, 0x38, 0x41, 0x4A,
-               0x52, 0x5A, 0x62, 0x6B, 0x73, 0x7B, 0x83, 0x8C,
-               0x94, 0x9C, 0xA5, 0xAD, 0xB6, 0xBD, 0xC5, 0xCC,
-               0xD4, 0xDD, 0xE3, 0xEB, 0xF2, 0xF9, 0xFF, 0x3F,
-               0xA4, 0x8A, 0x8F, 0xC7, 0x33, 0xF5, 0xE9, 0x00
-       };
-       ops->cmd_write(dev, MIPI_DSI_DCS_LONG_WRITE,
-                       (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
-}
-
-static void l5f31188_set_tcon(struct mipi_dsim_device *dev,
-               struct mipi_dsim_master_ops *ops)
-{
-       const unsigned char data_to_send[] = {
-               0xC7, 0x00, 0x20
-       };
-       ops->cmd_write(dev, MIPI_DSI_DCS_LONG_WRITE,
-                       (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
-}
-
-static void l5f31188_set_ptba(struct mipi_dsim_device *dev,
-               struct mipi_dsim_master_ops *ops)
-{
-       const unsigned char data_to_send[] = {
-               0xBF, 0x06, 0x10
-       };
-       ops->cmd_write(dev, MIPI_DSI_DCS_LONG_WRITE,
-                       (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
-}
-
-static void l5f31188_set_eco(struct mipi_dsim_device *dev,
-               struct mipi_dsim_master_ops *ops)
-{
-       ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0xC6, 0x0C);
-}
-
-static int l5f31188_panel_init(struct mipi_dsim_device *dev)
-{
-       struct mipi_dsim_master_ops *ops = dev->master_ops;
-
-       l5f31188_set_extension(dev, ops);
-       l5f31188_set_dgc_lut(dev, ops);
-
-       l5f31188_set_eco(dev, ops);
-       l5f31188_set_tcon(dev, ops);
-       l5f31188_set_ptba(dev, ops);
-       l5f31188_set_gamma(dev, ops);
-       l5f31188_ctl_memory_access(dev, ops,
-                       SCAN_FROM_LEFT_TO_RIGHT, SCAN_FROM_TOP_TO_BOTTOM);
-       l5f31188_set_pixel_format(dev, ops);
-       l5f31188_write_disbv(dev, ops, 0xFF);
-       l5f31188_write_ctrld(dev, ops);
-       l5f31188_write_cabc(dev, ops, 0x0);
-       l5f31188_write_cabcmb(dev, ops, 0x0);
-
-       l5f31188_sleep_out(dev, ops);
-
-       /* 120 msec */
-       udelay(120 * 1000);
-
-       return 0;
-}
-
-static void l5f31188_display_enable(struct mipi_dsim_device *dev)
-{
-       struct mipi_dsim_master_ops *ops = dev->master_ops;
-       l5f31188_display_on(dev, ops);
-}
-
-static struct mipi_dsim_lcd_driver l5f31188_dsim_ddi_driver = {
-       .name = "l5f31188",
-       .id = -1,
-
-       .mipi_panel_init = l5f31188_panel_init,
-       .mipi_display_on = l5f31188_display_enable,
-};
-
-void l5f31188_init(void)
-{
-       exynos_mipi_dsi_register_lcd_driver(&l5f31188_dsim_ddi_driver);
-}
index 872dc0f6534a67549f7555a4ff8612b9ef6097bd..800500327c882d55a98234148bb935c32e68b5ba 100644 (file)
@@ -14,5 +14,7 @@ obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o
 obj-hdmi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_hdmi.o
 obj-hdmi-$(CONFIG_ROCKCHIP_RK3399) += rk3399_hdmi.o
 obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o $(obj-hdmi-y)
-obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o
+obj-mipi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_mipi.o
+obj-mipi-$(CONFIG_ROCKCHIP_RK3399) += rk3399_mipi.o
+obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o $(obj-mipi-y)
 endif
diff --git a/drivers/video/rockchip/rk3288_mipi.c b/drivers/video/rockchip/rk3288_mipi.c
new file mode 100644 (file)
index 0000000..953b47f
--- /dev/null
@@ -0,0 +1,191 @@
+/*
+ * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Eric Gao <eric.gao@rock-chips.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <display.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <panel.h>
+#include <regmap.h>
+#include "rk_mipi.h"
+#include <syscon.h>
+#include <asm/gpio.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <dm/uclass-internal.h>
+#include <linux/kernel.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3288.h>
+#include <asm/arch/grf_rk3288.h>
+#include <asm/arch/rockchip_mipi_dsi.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define MHz 1000000
+
+/* Select mipi dsi source, big or little vop */
+static int rk_mipi_dsi_source_select(struct udevice *dev)
+{
+       struct rk_mipi_priv *priv = dev_get_priv(dev);
+       struct rk3288_grf *grf = priv->grf;
+       struct display_plat *disp_uc_plat = dev_get_uclass_platdata(dev);
+
+       /* Select the video source */
+       switch (disp_uc_plat->source_id) {
+       case VOP_B:
+               rk_clrsetreg(&grf->soc_con6, RK3288_DSI0_LCDC_SEL_MASK,
+                            RK3288_DSI0_LCDC_SEL_BIG
+                            << RK3288_DSI0_LCDC_SEL_SHIFT);
+               break;
+       case VOP_L:
+               rk_clrsetreg(&grf->soc_con6, RK3288_DSI0_LCDC_SEL_MASK,
+                            RK3288_DSI0_LCDC_SEL_LIT
+                            << RK3288_DSI0_LCDC_SEL_SHIFT);
+               break;
+       default:
+               debug("%s: Invalid VOP id\n", __func__);
+               return -EINVAL;
+       }
+
+       return 0;
+}
+
+/* Setup mipi dphy working mode */
+static void rk_mipi_dphy_mode_set(struct udevice *dev)
+{
+       struct rk_mipi_priv *priv = dev_get_priv(dev);
+       struct rk3288_grf *grf = priv->grf;
+       int val;
+
+       /* Set Controller as TX mode */
+       val = RK3288_DPHY_TX0_RXMODE_DIS << RK3288_DPHY_TX0_RXMODE_SHIFT;
+       rk_clrsetreg(&grf->soc_con8, RK3288_DPHY_TX0_RXMODE_MASK, val);
+
+       /* Exit tx stop mode */
+       val |= RK3288_DPHY_TX0_TXSTOPMODE_EN
+                       << RK3288_DPHY_TX0_TXSTOPMODE_SHIFT;
+       rk_clrsetreg(&grf->soc_con8,
+                    RK3288_DPHY_TX0_TXSTOPMODE_MASK, val);
+
+       /* Disable turnequest */
+       val |= RK3288_DPHY_TX0_TURNREQUEST_EN
+               << RK3288_DPHY_TX0_TURNREQUEST_SHIFT;
+       rk_clrsetreg(&grf->soc_con8,
+                    RK3288_DPHY_TX0_TURNREQUEST_MASK, val);
+}
+
+/*
+ * This function is called by rk_display_init() using rk_mipi_dsi_enable() and
+ * rk_mipi_phy_enable() to initialize mipi controller and dphy. If success,
+ * enable backlight.
+ */
+static int rk_mipi_enable(struct udevice *dev, int panel_bpp,
+                         const struct display_timing *timing)
+{
+       int ret;
+       struct rk_mipi_priv *priv = dev_get_priv(dev);
+
+       /* Fill the mipi controller parameter */
+       priv->ref_clk = 24 * MHz;
+       priv->sys_clk = priv->ref_clk;
+       priv->pix_clk = timing->pixelclock.typ;
+       priv->phy_clk = priv->pix_clk * 6;
+       priv->txbyte_clk = priv->phy_clk / 8;
+       priv->txesc_clk = 20 * MHz;
+
+       /* Select vop port, big or little */
+       rk_mipi_dsi_source_select(dev);
+
+       /* Set mipi dphy work mode */
+       rk_mipi_dphy_mode_set(dev);
+
+       /* Config  and enable mipi dsi according to timing */
+       ret = rk_mipi_dsi_enable(dev, timing);
+       if (ret) {
+               debug("%s: rk_mipi_dsi_enable() failed (err=%d)\n",
+                     __func__, ret);
+               return ret;
+       }
+
+       /* Config and enable mipi phy */
+       ret = rk_mipi_phy_enable(dev);
+       if (ret) {
+               debug("%s: rk_mipi_phy_enable() failed (err=%d)\n",
+                     __func__, ret);
+               return ret;
+       }
+
+       /* Enable backlight */
+       ret = panel_enable_backlight(priv->panel);
+       if (ret) {
+               debug("%s: panel_enable_backlight() failed (err=%d)\n",
+                     __func__, ret);
+               return ret;
+       }
+
+       return 0;
+}
+
+static int rk_mipi_ofdata_to_platdata(struct udevice *dev)
+{
+       struct rk_mipi_priv *priv = dev_get_priv(dev);
+
+       priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+       if (IS_ERR(priv->grf)) {
+               debug("%s: Get syscon grf failed (ret=%p)\n",
+                     __func__, priv->grf);
+               return  -ENXIO;
+       }
+       priv->regs = dev_read_addr(dev);
+       if (priv->regs == FDT_ADDR_T_NONE) {
+               debug("%s: Get MIPI dsi address failed (ret=%lu)\n", __func__,
+                     priv->regs);
+               return  -ENXIO;
+       }
+
+       return 0;
+}
+
+/*
+ * Probe function: check panel existence and readingit's timing. Then config
+ * mipi dsi controller and enable it according to the timing parameter.
+ */
+static int rk_mipi_probe(struct udevice *dev)
+{
+       int ret;
+       struct rk_mipi_priv *priv = dev_get_priv(dev);
+
+       ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "rockchip,panel",
+                                          &priv->panel);
+       if (ret) {
+               debug("%s: Can not find panel (err=%d)\n", __func__, ret);
+               return ret;
+       }
+
+       return 0;
+}
+
+static const struct dm_display_ops rk_mipi_dsi_ops = {
+       .read_timing = rk_mipi_read_timing,
+       .enable = rk_mipi_enable,
+};
+
+static const struct udevice_id rk_mipi_dsi_ids[] = {
+       { .compatible = "rockchip,rk3288_mipi_dsi" },
+       { }
+};
+
+U_BOOT_DRIVER(rk_mipi_dsi) = {
+       .name   = "rk_mipi_dsi",
+       .id     = UCLASS_DISPLAY,
+       .of_match = rk_mipi_dsi_ids,
+       .ofdata_to_platdata = rk_mipi_ofdata_to_platdata,
+       .probe  = rk_mipi_probe,
+       .ops    = &rk_mipi_dsi_ops,
+       .priv_auto_alloc_size   = sizeof(struct rk_mipi_priv),
+};
diff --git a/drivers/video/rockchip/rk3399_mipi.c b/drivers/video/rockchip/rk3399_mipi.c
new file mode 100644 (file)
index 0000000..9ef202b
--- /dev/null
@@ -0,0 +1,182 @@
+/*
+ * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Eric Gao <eric.gao@rock-chips.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <display.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <panel.h>
+#include <regmap.h>
+#include "rk_mipi.h"
+#include <syscon.h>
+#include <asm/gpio.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <dm/uclass-internal.h>
+#include <linux/kernel.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3399.h>
+#include <asm/arch/grf_rk3399.h>
+#include <asm/arch/rockchip_mipi_dsi.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Select mipi dsi source, big or little vop */
+static int rk_mipi_dsi_source_select(struct udevice *dev)
+{
+       struct rk_mipi_priv *priv = dev_get_priv(dev);
+       struct rk3399_grf_regs *grf = priv->grf;
+       struct display_plat *disp_uc_plat = dev_get_uclass_platdata(dev);
+
+       /* Select the video source */
+       switch (disp_uc_plat->source_id) {
+       case VOP_B:
+               rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK,
+                            GRF_DSI0_VOP_SEL_B << GRF_DSI0_VOP_SEL_SHIFT);
+               break;
+       case VOP_L:
+               rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK,
+                            GRF_DSI0_VOP_SEL_L << GRF_DSI0_VOP_SEL_SHIFT);
+               break;
+       default:
+               debug("%s: Invalid VOP id\n", __func__);
+               return -EINVAL;
+       }
+
+       return 0;
+}
+
+/* Setup mipi dphy working mode */
+static void rk_mipi_dphy_mode_set(struct udevice *dev)
+{
+       struct rk_mipi_priv *priv = dev_get_priv(dev);
+       struct rk3399_grf_regs *grf = priv->grf;
+       int val;
+
+       /* Set Controller as TX mode */
+       val = GRF_DPHY_TX0_RXMODE_DIS << GRF_DPHY_TX0_RXMODE_SHIFT;
+       rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_RXMODE_MASK, val);
+
+       /* Exit tx stop mode */
+       val |= GRF_DPHY_TX0_TXSTOPMODE_DIS << GRF_DPHY_TX0_TXSTOPMODE_SHIFT;
+       rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TXSTOPMODE_MASK, val);
+
+       /* Disable turnequest */
+       val |= GRF_DPHY_TX0_TURNREQUEST_DIS << GRF_DPHY_TX0_TURNREQUEST_SHIFT;
+       rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TURNREQUEST_MASK, val);
+}
+
+/*
+ * This function is called by rk_display_init() using rk_mipi_dsi_enable() and
+ * rk_mipi_phy_enable() to initialize mipi controller and dphy. If success,
+ * enable backlight.
+ */
+static int rk_display_enable(struct udevice *dev, int panel_bpp,
+                         const struct display_timing *timing)
+{
+       int ret;
+       struct rk_mipi_priv *priv = dev_get_priv(dev);
+
+       /* Fill the mipi controller parameter */
+       priv->ref_clk = 24 * MHz;
+       priv->sys_clk = priv->ref_clk;
+       priv->pix_clk = timing->pixelclock.typ;
+       priv->phy_clk = priv->pix_clk * 6;
+       priv->txbyte_clk = priv->phy_clk / 8;
+       priv->txesc_clk = 20 * MHz;
+
+       /* Select vop port, big or little */
+       rk_mipi_dsi_source_select(dev);
+
+       /* Set mipi dphy work mode */
+       rk_mipi_dphy_mode_set(dev);
+
+       /* Config  and enable mipi dsi according to timing */
+       ret = rk_mipi_dsi_enable(dev, timing);
+       if (ret) {
+               debug("%s: rk_mipi_dsi_enable() failed (err=%d)\n",
+                     __func__, ret);
+               return ret;
+       }
+
+       /* Config and enable mipi phy */
+       ret = rk_mipi_phy_enable(dev);
+       if (ret) {
+               debug("%s: rk_mipi_phy_enable() failed (err=%d)\n",
+                     __func__, ret);
+               return ret;
+       }
+
+       /* Enable backlight */
+       ret = panel_enable_backlight(priv->panel);
+       if (ret) {
+               debug("%s: panel_enable_backlight() failed (err=%d)\n",
+                     __func__, ret);
+               return ret;
+       }
+
+       return 0;
+}
+
+static int rk_mipi_ofdata_to_platdata(struct udevice *dev)
+{
+       struct rk_mipi_priv *priv = dev_get_priv(dev);
+
+       priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+       if (priv->grf <= 0) {
+               debug("%s: Get syscon grf failed (ret=%p)\n",
+                     __func__, priv->grf);
+               return  -ENXIO;
+       }
+       priv->regs = dev_read_addr(dev);
+       if (priv->regs == FDT_ADDR_T_NONE) {
+               debug("%s: Get MIPI dsi address failed\n", __func__);
+               return  -ENXIO;
+       }
+
+       return 0;
+}
+
+/*
+ * Probe function: check panel existence and readingit's timing. Then config
+ * mipi dsi controller and enable it according to the timing parameter.
+ */
+static int rk_mipi_probe(struct udevice *dev)
+{
+       int ret;
+       struct rk_mipi_priv *priv = dev_get_priv(dev);
+
+       ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "rockchip,panel",
+                                          &priv->panel);
+       if (ret) {
+               debug("%s: Can not find panel (err=%d)\n", __func__, ret);
+               return ret;
+       }
+
+       return 0;
+}
+
+static const struct dm_display_ops rk_mipi_dsi_ops = {
+       .read_timing = rk_mipi_read_timing,
+       .enable = rk_display_enable,
+};
+
+static const struct udevice_id rk_mipi_dsi_ids[] = {
+       { .compatible = "rockchip,rk3399_mipi_dsi" },
+       { }
+};
+
+U_BOOT_DRIVER(rk_mipi_dsi) = {
+       .name   = "rk_mipi_dsi",
+       .id     = UCLASS_DISPLAY,
+       .of_match = rk_mipi_dsi_ids,
+       .ofdata_to_platdata = rk_mipi_ofdata_to_platdata,
+       .probe  = rk_mipi_probe,
+       .ops    = &rk_mipi_dsi_ops,
+       .priv_auto_alloc_size   = sizeof(struct rk_mipi_priv),
+};
index 1199a30c1a5a0f0b78c7b9ddad6742a2b597b6b7..d5377558a10445fe1f182ed0e81d02ec9bea2fda 100644 (file)
@@ -12,6 +12,7 @@
 #include <fdtdec.h>
 #include <panel.h>
 #include <regmap.h>
+#include "rk_mipi.h"
 #include <syscon.h>
 #include <asm/gpio.h>
 #include <asm/hardware.h>
 #include <asm/arch/cru_rk3399.h>
 #include <asm/arch/grf_rk3399.h>
 #include <asm/arch/rockchip_mipi_dsi.h>
-#include <dt-bindings/clock/rk3288-cru.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/*
- * Private information for rk mipi
- *
- * @regs: mipi controller address
- * @grf: GRF register
- * @panel: panel assined by device tree
- * @ref_clk: reference clock for mipi dsi pll
- * @sysclk: config clock for mipi dsi register
- * @pix_clk: pixel clock for vop->dsi data transmission
- * @phy_clk: mipi dphy output clock
- * @txbyte_clk: clock for dsi->dphy high speed data transmission
- * @txesc_clk: clock for tx esc mode
- */
-struct rk_mipi_priv {
-       uintptr_t regs;
-       struct rk3399_grf_regs *grf;
-       struct udevice *panel;
-       struct mipi_dsi *dsi;
-       u32 ref_clk;
-       u32 sys_clk;
-       u32 pix_clk;
-       u32 phy_clk;
-       u32 txbyte_clk;
-       u32 txesc_clk;
-};
-
-static int rk_mipi_read_timing(struct udevice *dev,
-                              struct display_timing *timing)
+int rk_mipi_read_timing(struct udevice *dev,
+                       struct display_timing *timing)
 {
        int ret;
 
@@ -102,46 +76,18 @@ static void rk_mipi_dsi_write(uintptr_t regs, u32 reg, u32 val)
        writel(dat, addr);
 }
 
-static int rk_mipi_dsi_enable(struct udevice *dev,
-                             const struct display_timing *timing)
+int rk_mipi_dsi_enable(struct udevice *dev,
+                      const struct display_timing *timing)
 {
        int node, timing_node;
        int val;
        struct rk_mipi_priv *priv = dev_get_priv(dev);
        uintptr_t regs = priv->regs;
-       struct display_plat *disp_uc_plat = dev_get_uclass_platdata(dev);
        u32 txbyte_clk = priv->txbyte_clk;
        u32 txesc_clk = priv->txesc_clk;
 
        txesc_clk = txbyte_clk/(txbyte_clk/txesc_clk + 1);
 
-       /* Select the video source */
-       switch (disp_uc_plat->source_id) {
-       case VOP_B:
-               rk_clrsetreg(&priv->grf->soc_con20, GRF_DSI0_VOP_SEL_MASK,
-                            GRF_DSI0_VOP_SEL_B << GRF_DSI0_VOP_SEL_SHIFT);
-                break;
-       case VOP_L:
-               rk_clrsetreg(&priv->grf->soc_con20, GRF_DSI0_VOP_SEL_MASK,
-                            GRF_DSI0_VOP_SEL_L << GRF_DSI0_VOP_SEL_SHIFT);
-                break;
-       default:
-                debug("%s: Invalid VOP id\n", __func__);
-                return -EINVAL;
-       }
-
-       /* Set Controller as TX mode */
-       val = GRF_DPHY_TX0_RXMODE_DIS << GRF_DPHY_TX0_RXMODE_SHIFT;
-       rk_clrsetreg(&priv->grf->soc_con22, GRF_DPHY_TX0_RXMODE_MASK, val);
-
-       /* Exit tx stop mode */
-       val |= GRF_DPHY_TX0_TXSTOPMODE_DIS << GRF_DPHY_TX0_TXSTOPMODE_SHIFT;
-       rk_clrsetreg(&priv->grf->soc_con22, GRF_DPHY_TX0_TXSTOPMODE_MASK, val);
-
-       /* Disable turnequest */
-       val |= GRF_DPHY_TX0_TURNREQUEST_DIS << GRF_DPHY_TX0_TURNREQUEST_SHIFT;
-       rk_clrsetreg(&priv->grf->soc_con22, GRF_DPHY_TX0_TURNREQUEST_MASK, val);
-
        /* Set Display timing parameter */
        rk_mipi_dsi_write(regs, VID_HSA_TIME, timing->hsync_len.typ);
        rk_mipi_dsi_write(regs, VID_HBP_TIME, timing->hback_porch.typ);
@@ -249,7 +195,7 @@ static void rk_mipi_phy_write(uintptr_t regs, unsigned char test_code,
  * fsfreqrang value ,cap ,lpf and so on according to the given pix clk rate,
  * and then enable phy.
  */
-static int rk_mipi_phy_enable(struct udevice *dev)
+int rk_mipi_phy_enable(struct udevice *dev)
 {
        int i;
        struct rk_mipi_priv *priv = dev_get_priv(dev);
@@ -385,107 +331,3 @@ static int rk_mipi_phy_enable(struct udevice *dev)
        return 0;
 }
 
-/*
- * This function is called by rk_display_init() using rk_mipi_dsi_enable() and
- * rk_mipi_phy_enable() to initialize mipi controller and dphy. If success,
- * enable backlight.
- */
-static int rk_display_enable(struct udevice *dev, int panel_bpp,
-                         const struct display_timing *timing)
-{
-       int ret;
-       struct rk_mipi_priv *priv = dev_get_priv(dev);
-
-       /* Fill the mipi controller parameter */
-       priv->ref_clk = 24 * MHz;
-       priv->sys_clk = priv->ref_clk;
-       priv->pix_clk = timing->pixelclock.typ;
-       priv->phy_clk = priv->pix_clk * 6;
-       priv->txbyte_clk = priv->phy_clk / 8;
-       priv->txesc_clk = 20 * MHz;
-
-       /* Config  and enable mipi dsi according to timing */
-       ret = rk_mipi_dsi_enable(dev, timing);
-       if (ret) {
-               debug("%s: rk_mipi_dsi_enable() failed (err=%d)\n",
-                     __func__, ret);
-               return ret;
-       }
-
-       /* Config and enable mipi phy */
-       ret = rk_mipi_phy_enable(dev);
-       if (ret) {
-               debug("%s: rk_mipi_phy_enable() failed (err=%d)\n",
-                     __func__, ret);
-               return ret;
-       }
-
-       /* Enable backlight */
-       ret = panel_enable_backlight(priv->panel);
-       if (ret) {
-               debug("%s: panel_enable_backlight() failed (err=%d)\n",
-                     __func__, ret);
-               return ret;
-       }
-
-       return 0;
-}
-
-static int rk_mipi_ofdata_to_platdata(struct udevice *dev)
-{
-       struct rk_mipi_priv *priv = dev_get_priv(dev);
-
-       priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-       if (priv->grf <= 0) {
-               debug("%s: Get syscon grf failed (ret=%p)\n",
-                     __func__, priv->grf);
-               return  -ENXIO;
-       }
-       priv->regs = devfdt_get_addr(dev);
-       if (priv->regs <= 0) {
-               debug("%s: Get MIPI dsi address failed (ret=%lu)\n", __func__,
-                     priv->regs);
-               return  -ENXIO;
-       }
-
-       return 0;
-}
-
-/*
- * Probe function: check panel existence and readingit's timing. Then config
- * mipi dsi controller and enable it according to the timing parameter.
- */
-static int rk_mipi_probe(struct udevice *dev)
-{
-       int ret;
-       struct rk_mipi_priv *priv = dev_get_priv(dev);
-
-       ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "rockchip,panel",
-                                          &priv->panel);
-       if (ret) {
-               debug("%s: Can not find panel (err=%d)\n", __func__, ret);
-               return ret;
-       }
-
-       return 0;
-}
-
-static const struct dm_display_ops rk_mipi_dsi_ops = {
-       .read_timing = rk_mipi_read_timing,
-       .enable = rk_display_enable,
-};
-
-static const struct udevice_id rk_mipi_dsi_ids[] = {
-       { .compatible = "rockchip,rk3399_mipi_dsi" },
-       { }
-};
-
-U_BOOT_DRIVER(rk_mipi_dsi) = {
-       .name   = "rk_mipi_dsi",
-       .id     = UCLASS_DISPLAY,
-       .of_match = rk_mipi_dsi_ids,
-       .ofdata_to_platdata = rk_mipi_ofdata_to_platdata,
-       .probe  = rk_mipi_probe,
-       .ops    = &rk_mipi_dsi_ops,
-       .priv_auto_alloc_size   = sizeof(struct rk_mipi_priv),
-};
diff --git a/drivers/video/rockchip/rk_mipi.h b/drivers/video/rockchip/rk_mipi.h
new file mode 100644 (file)
index 0000000..de6ac52
--- /dev/null
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Eric Gao <eric.gao@rock-chips.com>
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __RK_MIPI_H
+#define __RK_MIPI_H
+
+struct rk_mipi_priv {
+       uintptr_t regs;
+       void *grf;
+       struct udevice *panel;
+       struct mipi_dsi *dsi;
+       u32 ref_clk;
+       u32 sys_clk;
+       u32 pix_clk;
+       u32 phy_clk;
+       u32 txbyte_clk;
+       u32 txesc_clk;
+};
+
+int rk_mipi_read_timing(struct udevice *dev,
+                              struct display_timing *timing);
+
+int rk_mipi_dsi_enable(struct udevice *dev,
+                             const struct display_timing *timing);
+
+int rk_mipi_phy_enable(struct udevice *dev);
+
+
+#endif
diff --git a/drivers/video/sed156x.c b/drivers/video/sed156x.c
deleted file mode 100644 (file)
index 2c906ec..0000000
+++ /dev/null
@@ -1,546 +0,0 @@
-/*
- * (C) Copyright 2003
- *
- * Pantelis Antoniou <panto@intracom.gr>
- * Intracom S.A.
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#include <common.h>
-#include <watchdog.h>
-
-#include <sed156x.h>
-
-/* configure according to the selected display */
-#if defined(CONFIG_SED156X_PG12864Q)
-#define LCD_WIDTH      128
-#define LCD_HEIGHT     64
-#define LCD_LINES      64
-#define LCD_PAGES      9
-#define LCD_COLUMNS    132
-#else
-#error Unsupported SED156x configuration
-#endif
-
-/* include the font data */
-#include <video_font.h>
-
-#if VIDEO_FONT_WIDTH != 8 || VIDEO_FONT_HEIGHT != 16
-#error Expecting VIDEO_FONT_WIDTH == 8 && VIDEO_FONT_HEIGHT == 16
-#endif
-
-#define LCD_BYTE_WIDTH         (LCD_WIDTH / 8)
-#define VIDEO_FONT_BYTE_WIDTH  (VIDEO_FONT_WIDTH / 8)
-
-#define LCD_TEXT_WIDTH (LCD_WIDTH / VIDEO_FONT_WIDTH)
-#define LCD_TEXT_HEIGHT (LCD_HEIGHT / VIDEO_FONT_HEIGHT)
-
-#define LCD_BYTE_LINESZ                (LCD_BYTE_WIDTH * VIDEO_FONT_HEIGHT)
-
-const int sed156x_text_width = LCD_TEXT_WIDTH;
-const int sed156x_text_height = LCD_TEXT_HEIGHT;
-
-/**************************************************************************************/
-
-#define SED156X_SPI_RXD() (SED156X_SPI_RXD_PORT & SED156X_SPI_RXD_MASK)
-
-#define SED156X_SPI_TXD(x) \
-       do { \
-               if (x) \
-                       SED156X_SPI_TXD_PORT |=  SED156X_SPI_TXD_MASK; \
-               else \
-                       SED156X_SPI_TXD_PORT &= ~SED156X_SPI_TXD_MASK; \
-       } while(0)
-
-#define SED156X_SPI_CLK(x) \
-       do { \
-               if (x) \
-                       SED156X_SPI_CLK_PORT |=  SED156X_SPI_CLK_MASK; \
-               else \
-                       SED156X_SPI_CLK_PORT &= ~SED156X_SPI_CLK_MASK; \
-       } while(0)
-
-#define SED156X_SPI_CLK_TOGGLE() (SED156X_SPI_CLK_PORT ^= SED156X_SPI_CLK_MASK)
-
-#define SED156X_SPI_BIT_DELAY() /* no delay */
-
-#define SED156X_CS(x) \
-       do { \
-               if (x) \
-                       SED156X_CS_PORT |=  SED156X_CS_MASK; \
-               else \
-                       SED156X_CS_PORT &= ~SED156X_CS_MASK; \
-       } while(0)
-
-#define SED156X_A0(x) \
-       do { \
-               if (x) \
-                       SED156X_A0_PORT |=  SED156X_A0_MASK; \
-               else \
-                       SED156X_A0_PORT &= ~SED156X_A0_MASK; \
-       } while(0)
-
-/**************************************************************************************/
-
-/*** LCD Commands ***/
-
-#define LCD_ON         0xAF    /* Display ON                                         */
-#define LCD_OFF                0xAE    /* Display OFF                                        */
-#define LCD_LADDR      0x40    /* Display start line set + (6-bit) address           */
-#define LCD_PADDR      0xB0    /* Page address set + (4-bit) page                    */
-#define LCD_CADRH      0x10    /* Column address set upper + (4-bit) column hi       */
-#define LCD_CADRL      0x00    /* Column address set lower + (4-bit) column lo       */
-#define LCD_ADC_NRM    0xA0    /* ADC select Normal                                  */
-#define LCD_ADC_REV    0xA1    /* ADC select Reverse                                 */
-#define LCD_DSP_NRM    0xA6    /* LCD display Normal                                 */
-#define LCD_DSP_REV    0xA7    /* LCD display Reverse                                */
-#define LCD_DPT_NRM    0xA4    /* Display all points Normal                          */
-#define LCD_DPT_ALL    0xA5    /* Display all points ON                              */
-#define LCD_BIAS9      0xA2    /* LCD bias set 1/9                                   */
-#define LCD_BIAS7      0xA3    /* LCD bias set 1/7                                   */
-#define LCD_CAINC      0xE0    /* Read/modify/write                                  */
-#define LCD_CAEND      0xEE    /* End                                                */
-#define LCD_RESET      0xE2    /* Reset                                              */
-#define LCD_C_NRM      0xC0    /* Common output mode select Normal direction         */
-#define LCD_C_RVS      0xC8    /* Common output mode select Reverse direction        */
-#define LCD_PWRMD      0x28    /* Power control set + (3-bit) mode                   */
-#define LCD_RESRT      0x20    /* V5 v. reg. int. resistor ratio set + (3-bit) ratio */
-#define LCD_EVSET      0x81    /* Electronic volume mode set + byte = (6-bit) volume */
-#define LCD_SIOFF      0xAC    /* Static indicator OFF                               */
-#define LCD_SION       0xAD    /* Static indicator ON + byte = (2-bit) mode          */
-#define LCD_NOP                0xE3    /* NOP                                                */
-#define LCD_TEST       0xF0    /* Test/Test mode reset (Note: *DO NOT USE*)          */
-
-/*-------------------------------------------------------------------------------
-  Compound commands
-  -------------------------------------------------------------------------------
-  Command      Description                     Commands
-  ----------   ------------------------        -------------------------------------
-  POWS_ON      POWER SAVER ON command          LCD_OFF, LCD_D_ALL
-  POWS_OFF     POWER SAVER OFF command         LCD_D_NRM
-  SLEEPON      SLEEP mode                      LCD_SIOFF, POWS_ON
-  SLEEPOFF     SLEEP mode cancel               LCD_D_NRM, LCD_SION, LCD_SIS_???
-  STDBYON      STAND BY mode                   LCD_SION, POWS_ON
-  STDBYOFF     STAND BY mode cancel            LCD_D_NRM
-  -------------------------------------------------------------------------------*/
-
-/*** LCD various parameters ***/
-#define LCD_PPB                8       /* Pixels per byte (display is B/W, 1 bit per pixel) */
-
-/*** LCD Status byte masks ***/
-#define LCD_S_BUSY     0x80    /* Status Read - BUSY mask   */
-#define LCD_S_ADC      0x40    /* Status Read - ADC mask    */
-#define LCD_S_ONOFF    0x20    /* Status Read - ON/OFF mask */
-#define LCD_S_RESET    0x10    /* Status Read - RESET mask  */
-
-/*** LCD commands parameter masks ***/
-#define LCD_M_LADDR    0x3F    /* Display start line (6-bit) address mask           */
-#define LCD_M_PADDR    0x0F    /* Page address (4-bit) page mask                    */
-#define LCD_M_CADRH    0x0F    /* Column address upper (4-bit) column hi mask       */
-#define LCD_M_CADRL    0x0F    /* Column address lower (4-bit) column lo mask       */
-#define LCD_M_PWRMD    0x07    /* Power control (3-bit) mode mask                   */
-#define LCD_M_RESRT    0x07    /* V5 v. reg. int. resistor ratio (3-bit) ratio mask */
-#define LCD_M_EVSET    0x3F    /* Electronic volume mode byte (6-bit) volume mask   */
-#define LCD_M_SION     0x03    /* Static indicator ON (2-bit) mode mask             */
-
-/*** LCD Power control cirquits control masks ***/
-#define LCD_PWRBSTR    0x04    /* Power control mode - Booster cirquit ON           */
-#define LCD_PWRVREG    0x02    /* Power control mode - Voltage regulator cirquit ON */
-#define LCD_PWRVFOL    0x01    /* Power control mode - Voltage follower cirquit ON  */
-
-/*** LCD Static indicator states ***/
-#define LCD_SIS_OFF    0x00    /* Static indicator register set - OFF state             */
-#define LCD_SIS_BL     0x01    /* Static indicator register set - 1s blink state        */
-#define LCD_SIS_RBL    0x02    /* Static indicator register set - .5s rapid blink state */
-#define LCD_SIS_ON     0x03    /* Static indicator register set - constantly on state   */
-
-/*** LCD functions special parameters (commands) ***/
-#define LCD_PREVP      0x80    /* Page number for moving to previous */
-#define LCD_NEXTP      0x81    /* or next page */
-#define LCD_ERR_P      0xFF    /* Error in page number */
-
-/*** LCD initialization settings ***/
-#define LCD_BIAS       LCD_BIAS9       /* Bias: 1/9                  */
-#define LCD_ADCMODE    LCD_ADC_NRM     /* ADC mode: normal           */
-#define LCD_COMDIR     LCD_C_NRM       /* Common output mode: normal */
-#define LCD_RRATIO     0               /* Resistor ratio: 0          */
-#define LCD_CNTRST     0x1C            /* electronic volume: 1Ch     */
-#define LCD_POWERM     (LCD_PWRBSTR | LCD_PWRVREG | LCD_PWRVFOL)       /* Power mode: All on */
-
-/**************************************************************************************/
-
-static inline unsigned int sed156x_transfer(unsigned int val)
-{
-       unsigned int rx;
-       int b;
-
-       rx = 0; b = 8;
-       while (--b >= 0) {
-               SED156X_SPI_TXD(val & 0x80);
-               val <<= 1;
-               SED156X_SPI_CLK_TOGGLE();
-               SED156X_SPI_BIT_DELAY();
-               rx <<= 1;
-               if (SED156X_SPI_RXD())
-                       rx |= 1;
-               SED156X_SPI_CLK_TOGGLE();
-               SED156X_SPI_BIT_DELAY();
-       }
-
-       return rx;
-}
-
-unsigned int sed156x_data_transfer(unsigned int val)
-{
-       unsigned int rx;
-
-       SED156X_SPI_CLK(1);
-       SED156X_CS(0);
-       SED156X_A0(1);
-
-       rx = sed156x_transfer(val);
-
-       SED156X_CS(1);
-
-       return rx;
-}
-
-void sed156x_data_block_transfer(const u8 *p, int size)
-{
-       SED156X_SPI_CLK(1);
-       SED156X_CS(0);
-       SED156X_A0(1);
-
-       while (--size >= 0)
-               sed156x_transfer(*p++);
-
-       SED156X_CS(1);
-}
-
-unsigned int sed156x_cmd_transfer(unsigned int val)
-{
-       unsigned int rx;
-
-       SED156X_SPI_CLK(1);
-       SED156X_CS(0);
-       SED156X_A0(0);
-
-       rx = sed156x_transfer(val);
-
-       SED156X_CS(1);
-       SED156X_A0(1);
-
-       return rx;
-}
-
-/******************************************************************************/
-
-static u8 hw_screen[LCD_PAGES][LCD_COLUMNS];
-static u8 last_hw_screen[LCD_PAGES][LCD_COLUMNS];
-static u8 sw_screen[LCD_BYTE_WIDTH * LCD_HEIGHT];
-
-void sed156x_sync(void)
-{
-       int i, j, last_page;
-       u8 *d;
-       const u8 *s, *e, *b, *r;
-       u8 v0, v1, v2, v3, v4, v5, v6, v7;
-
-       /* copy and rotate sw_screen to hw_screen */
-       for (i = 0; i < LCD_HEIGHT / 8; i++) {
-
-               d = &hw_screen[i][0];
-               s = &sw_screen[LCD_BYTE_WIDTH * 8 * i + LCD_BYTE_WIDTH - 1];
-
-               for (j = 0; j < LCD_WIDTH / 8; j++) {
-
-                       v0 = s[0 * LCD_BYTE_WIDTH];
-                       v1 = s[1 * LCD_BYTE_WIDTH];
-                       v2 = s[2 * LCD_BYTE_WIDTH];
-                       v3 = s[3 * LCD_BYTE_WIDTH];
-                       v4 = s[4 * LCD_BYTE_WIDTH];
-                       v5 = s[5 * LCD_BYTE_WIDTH];
-                       v6 = s[6 * LCD_BYTE_WIDTH];
-                       v7 = s[7 * LCD_BYTE_WIDTH];
-
-                       d[0] =  ((v7 & 0x01) << 7) |
-                               ((v6 & 0x01) << 6) |
-                               ((v5 & 0x01) << 5) |
-                               ((v4 & 0x01) << 4) |
-                               ((v3 & 0x01) << 3) |
-                               ((v2 & 0x01) << 2) |
-                               ((v1 & 0x01) << 1) |
-                                (v0 & 0x01)       ;
-
-                       d[1] =  ((v7 & 0x02) << 6) |
-                               ((v6 & 0x02) << 5) |
-                               ((v5 & 0x02) << 4) |
-                               ((v4 & 0x02) << 3) |
-                               ((v3 & 0x02) << 2) |
-                               ((v2 & 0x02) << 1) |
-                               ((v1 & 0x02) << 0) |
-                               ((v0 & 0x02) >> 1) ;
-
-                       d[2] =  ((v7 & 0x04) << 5) |
-                               ((v6 & 0x04) << 4) |
-                               ((v5 & 0x04) << 3) |
-                               ((v4 & 0x04) << 2) |
-                               ((v3 & 0x04) << 1) |
-                                (v2 & 0x04)       |
-                               ((v1 & 0x04) >> 1) |
-                               ((v0 & 0x04) >> 2) ;
-
-                       d[3] =  ((v7 & 0x08) << 4) |
-                               ((v6 & 0x08) << 3) |
-                               ((v5 & 0x08) << 2) |
-                               ((v4 & 0x08) << 1) |
-                                (v3 & 0x08)       |
-                               ((v2 & 0x08) >> 1) |
-                               ((v1 & 0x08) >> 2) |
-                               ((v0 & 0x08) >> 3) ;
-
-                       d[4] =  ((v7 & 0x10) << 3) |
-                               ((v6 & 0x10) << 2) |
-                               ((v5 & 0x10) << 1) |
-                                (v4 & 0x10)       |
-                               ((v3 & 0x10) >> 1) |
-                               ((v2 & 0x10) >> 2) |
-                               ((v1 & 0x10) >> 3) |
-                               ((v0 & 0x10) >> 4) ;
-
-                       d[5] =  ((v7 & 0x20) << 2) |
-                               ((v6 & 0x20) << 1) |
-                                (v5 & 0x20)       |
-                               ((v4 & 0x20) >> 1) |
-                               ((v3 & 0x20) >> 2) |
-                               ((v2 & 0x20) >> 3) |
-                               ((v1 & 0x20) >> 4) |
-                               ((v0 & 0x20) >> 5) ;
-
-                       d[6] =  ((v7 & 0x40) << 1) |
-                                (v6 & 0x40)       |
-                               ((v5 & 0x40) >> 1) |
-                               ((v4 & 0x40) >> 2) |
-                               ((v3 & 0x40) >> 3) |
-                               ((v2 & 0x40) >> 4) |
-                               ((v1 & 0x40) >> 5) |
-                               ((v0 & 0x40) >> 6) ;
-
-                       d[7] =   (v7 & 0x80)       |
-                               ((v6 & 0x80) >> 1) |
-                               ((v5 & 0x80) >> 2) |
-                               ((v4 & 0x80) >> 3) |
-                               ((v3 & 0x80) >> 4) |
-                               ((v2 & 0x80) >> 5) |
-                               ((v1 & 0x80) >> 6) |
-                               ((v0 & 0x80) >> 7) ;
-
-                       d += 8;
-                       s--;
-               }
-       }
-
-       /* and now output only the differences */
-       for (i = 0; i < LCD_PAGES; i++) {
-
-               b = &hw_screen[i][0];
-               e = &hw_screen[i][LCD_COLUMNS];
-
-               d = &last_hw_screen[i][0];
-               s = b;
-
-               last_page = -1;
-
-               /* update only the differences */
-               do {
-                       while (s < e && *s == *d) {
-                               s++;
-                               d++;
-                       }
-                       if (s == e)
-                               break;
-                       r = s;
-                       while (s < e && *s != *d)
-                               *d++ = *s++;
-
-                       j = r - b;
-
-                       if (i != last_page) {
-                               sed156x_cmd_transfer(LCD_PADDR | i);
-                               last_page = i;
-                       }
-
-                       sed156x_cmd_transfer(LCD_CADRH | ((j >> 4) & 0x0F));
-                       sed156x_cmd_transfer(LCD_CADRL | (j & 0x0F));
-                       sed156x_data_block_transfer(r, s - r);
-
-               } while (s < e);
-       }
-
-/********
-       for (i = 0; i < LCD_PAGES; i++) {
-               sed156x_cmd_transfer(LCD_PADDR | i);
-               sed156x_cmd_transfer(LCD_CADRH | 0);
-               sed156x_cmd_transfer(LCD_CADRL | 0);
-               sed156x_data_block_transfer(&hw_screen[i][0], LCD_COLUMNS);
-       }
-       memcpy(last_hw_screen, hw_screen, sizeof(last_hw_screen));
-********/
-}
-
-void sed156x_clear(void)
-{
-       memset(sw_screen, 0, sizeof(sw_screen));
-}
-
-void sed156x_output_at(int x, int y, const char *str, int size)
-{
-       int i, j;
-       u8 *p;
-       const u8 *s;
-
-       if ((unsigned int)y >= LCD_TEXT_HEIGHT || (unsigned int)x >= LCD_TEXT_WIDTH)
-               return;
-
-       p = &sw_screen[y * VIDEO_FONT_HEIGHT * LCD_BYTE_WIDTH + x * VIDEO_FONT_BYTE_WIDTH];
-
-       while (--size >= 0) {
-
-               s = &video_fontdata[((int)*str++ & 0xff) * VIDEO_FONT_BYTE_WIDTH * VIDEO_FONT_HEIGHT];
-               for (i = 0; i < VIDEO_FONT_HEIGHT; i++) {
-                       for (j = 0; j < VIDEO_FONT_BYTE_WIDTH; j++)
-                               *p++ = *s++;
-                       p += LCD_BYTE_WIDTH - VIDEO_FONT_BYTE_WIDTH;
-               }
-               p -= (LCD_BYTE_LINESZ - VIDEO_FONT_BYTE_WIDTH);
-
-               if (x >= LCD_TEXT_WIDTH)
-                       break;
-               x++;
-       }
-}
-
-void sed156x_reverse_at(int x, int y, int size)
-{
-       int i, j;
-       u8 *p;
-
-       if ((unsigned int)y >= LCD_TEXT_HEIGHT || (unsigned int)x >= LCD_TEXT_WIDTH)
-               return;
-
-       p = &sw_screen[y * VIDEO_FONT_HEIGHT * LCD_BYTE_WIDTH + x * VIDEO_FONT_BYTE_WIDTH];
-
-       while (--size >= 0) {
-
-               for (i = 0; i < VIDEO_FONT_HEIGHT; i++) {
-                       for (j = 0; j < VIDEO_FONT_BYTE_WIDTH; j++, p++)
-                               *p = ~*p;
-                       p += LCD_BYTE_WIDTH - VIDEO_FONT_BYTE_WIDTH;
-               }
-               p -= (LCD_BYTE_LINESZ - VIDEO_FONT_BYTE_WIDTH);
-
-               if (x >= LCD_TEXT_WIDTH)
-                       break;
-               x++;
-       }
-}
-
-void sed156x_scroll_line(void)
-{
-       memmove(&sw_screen[0],
-                       &sw_screen[LCD_BYTE_LINESZ],
-                       LCD_BYTE_WIDTH * (LCD_HEIGHT - VIDEO_FONT_HEIGHT));
-}
-
-void sed156x_scroll(int dx, int dy)
-{
-       u8 *p1 = NULL, *p2 = NULL, *p3 = NULL;  /* pacify gcc */
-       int adx, ady, i, sz;
-
-       adx = dx > 0 ? dx : -dx;
-       ady = dy > 0 ? dy : -dy;
-
-       /* overscroll? erase everything */
-       if (adx >= LCD_TEXT_WIDTH || ady >= LCD_TEXT_HEIGHT) {
-               memset(sw_screen, 0, sizeof(sw_screen));
-               return;
-       }
-
-       sz = LCD_BYTE_LINESZ * ady;
-       if (dy > 0) {
-               p1 = &sw_screen[0];
-               p2 = &sw_screen[sz];
-               p3 = &sw_screen[LCD_BYTE_WIDTH * LCD_HEIGHT - sz];
-       } else if (dy < 0) {
-               p1 = &sw_screen[sz];
-               p2 = &sw_screen[0];
-               p3 = &sw_screen[0];
-       }
-
-       if (ady > 0) {
-               memmove(p1, p2, LCD_BYTE_WIDTH * LCD_HEIGHT - sz);
-               memset(p3, 0, sz);
-       }
-
-       sz = VIDEO_FONT_BYTE_WIDTH * adx;
-       if (dx > 0) {
-               p1 = &sw_screen[0];
-               p2 = &sw_screen[0] + sz;
-               p3 = &sw_screen[0] + LCD_BYTE_WIDTH - sz;
-       } else if (dx < 0) {
-               p1 = &sw_screen[0] + sz;
-               p2 = &sw_screen[0];
-               p3 = &sw_screen[0];
-       }
-
-       /* xscroll */
-       if (adx > 0) {
-               for (i = 0; i < LCD_HEIGHT; i++) {
-                       memmove(p1, p2, LCD_BYTE_WIDTH - sz);
-                       memset(p3, 0, sz);
-                       p1 += LCD_BYTE_WIDTH;
-                       p2 += LCD_BYTE_WIDTH;
-                       p3 += LCD_BYTE_WIDTH;
-               }
-       }
-}
-
-void sed156x_init(void)
-{
-       int i;
-
-       SED156X_CS(1);
-       SED156X_A0(1);
-
-       /* Send initialization commands to the LCD */
-       sed156x_cmd_transfer(LCD_OFF);                  /* Turn display OFF       */
-       sed156x_cmd_transfer(LCD_BIAS);                 /* set the LCD Bias,      */
-       sed156x_cmd_transfer(LCD_ADCMODE);              /* ADC mode,              */
-       sed156x_cmd_transfer(LCD_COMDIR);               /* common output mode,    */
-       sed156x_cmd_transfer(LCD_RESRT | LCD_RRATIO);   /* resistor ratio,        */
-       sed156x_cmd_transfer(LCD_EVSET);                /* electronic volume,     */
-       sed156x_cmd_transfer(LCD_CNTRST);
-       sed156x_cmd_transfer(LCD_PWRMD | LCD_POWERM);   /* and power mode         */
-       sed156x_cmd_transfer(LCD_PADDR | 0);            /* cursor home            */
-       sed156x_cmd_transfer(LCD_CADRH | 0);
-       sed156x_cmd_transfer(LCD_CADRL | 0);
-       sed156x_cmd_transfer(LCD_LADDR | 0);            /* and display start line */
-       sed156x_cmd_transfer(LCD_DSP_NRM);              /* LCD display Normal     */
-
-       /* clear everything */
-       memset(sw_screen, 0, sizeof(sw_screen));
-       memset(hw_screen, 0, sizeof(hw_screen));
-       memset(last_hw_screen, 0, sizeof(last_hw_screen));
-
-       for (i = 0; i < LCD_PAGES; i++) {
-               sed156x_cmd_transfer(LCD_PADDR | i);
-               sed156x_cmd_transfer(LCD_CADRH | 0);
-               sed156x_cmd_transfer(LCD_CADRL | 0);
-               sed156x_data_block_transfer(&hw_screen[i][0], LCD_COLUMNS);
-       }
-
-       sed156x_clear();
-       sed156x_sync();
-       sed156x_cmd_transfer(LCD_ON);                   /* Turn display ON        */
-}
diff --git a/drivers/video/sm501.c b/drivers/video/sm501.c
deleted file mode 100644 (file)
index a468bd9..0000000
+++ /dev/null
@@ -1,225 +0,0 @@
-/*
- * (C) Copyright 2002
- * Stäubli Faverges - <www.staubli.com>
- * Pierre AUBERT  p.aubert@staubli.com
- *
- * (C) Copyright 2005
- * Martin Krause TQ-Systems GmbH martin.krause@tqs.de
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-/*
- * Basic video support for SMI SM501 "Voyager" graphic controller
- */
-
-#include <common.h>
-
-#include <asm/io.h>
-#include <pci.h>
-#include <video_fb.h>
-#include <sm501.h>
-
-#define read8(ptrReg)                \
-    *(volatile unsigned char *)(sm501.isaBase + ptrReg)
-
-#define write8(ptrReg,value) \
-    *(volatile unsigned char *)(sm501.isaBase + ptrReg) = value
-
-#define read16(ptrReg) \
-    (*(volatile unsigned short *)(sm501.isaBase + ptrReg))
-
-#define write16(ptrReg,value) \
-    (*(volatile unsigned short *)(sm501.isaBase + ptrReg) = value)
-
-#define read32(ptrReg) \
-    (*(volatile unsigned int *)(sm501.isaBase + ptrReg))
-
-#define write32(ptrReg, value) \
-    (*(volatile unsigned int *)(sm501.isaBase + ptrReg) = value)
-
-GraphicDevice sm501;
-
-void write_be32(int off, unsigned int val)
-{
-       out_be32((unsigned __iomem *)(sm501.isaBase + off), val);
-}
-
-void write_le32(int off, unsigned int val)
-{
-       out_le32((unsigned __iomem *)(sm501.isaBase + off), val);
-}
-
-void (*write_reg32)(int off, unsigned int val) = write_be32;
-
-/*-----------------------------------------------------------------------------
- * SmiSetRegs --
- *-----------------------------------------------------------------------------
- */
-static void SmiSetRegs (void)
-{
-       /*
-        * The content of the chipset register depends on the board (clocks,
-        * ...)
-        */
-       const SMI_REGS *preg = board_get_regs ();
-       while (preg->Index) {
-               write_reg32 (preg->Index, preg->Value);
-               /*
-                * Insert a delay between
-                */
-               udelay (1000);
-               preg ++;
-       }
-}
-
-#ifdef CONFIG_VIDEO_SM501_PCI
-static struct pci_device_id sm501_pci_tbl[] = {
-       { PCI_VENDOR_ID_SMI, PCI_DEVICE_ID_SMI_501 },
-       {}
-};
-#endif
-
-/*
- * We do not enforce board code to provide empty/unused
- * functions for this driver and define weak default
- * functions here.
- */
-unsigned int __board_video_init (void)
-{
-       return 0;
-}
-
-unsigned int board_video_init (void)
-                       __attribute__((weak, alias("__board_video_init")));
-
-unsigned int __board_video_get_fb (void)
-{
-       return 0;
-}
-
-unsigned int board_video_get_fb (void)
-                       __attribute__((weak, alias("__board_video_get_fb")));
-
-void __board_validate_screen (unsigned int base)
-{
-}
-
-void board_validate_screen (unsigned int base)
-                       __attribute__((weak, alias("__board_validate_screen")));
-
-/*-----------------------------------------------------------------------------
- * video_hw_init --
- *-----------------------------------------------------------------------------
- */
-void *video_hw_init (void)
-{
-#ifdef CONFIG_VIDEO_SM501_PCI
-       unsigned int pci_mem_base, pci_mmio_base;
-       unsigned int id;
-       unsigned short device_id;
-       pci_dev_t devbusfn;
-       int mem;
-#endif
-       unsigned int *vm, i;
-
-       memset (&sm501, 0, sizeof (GraphicDevice));
-
-#ifdef CONFIG_VIDEO_SM501_PCI
-       printf("Video: ");
-
-       /* Look for SM501/SM502 chips */
-       devbusfn = pci_find_devices(sm501_pci_tbl, 0);
-       if (devbusfn < 0) {
-               printf ("PCI Controller not found.\n");
-               goto not_pci;
-       }
-
-       /* Setup */
-       pci_write_config_dword (devbusfn, PCI_COMMAND,
-                               (PCI_COMMAND_MEMORY | PCI_COMMAND_IO));
-       pci_read_config_word (devbusfn, PCI_DEVICE_ID, &device_id);
-       pci_read_config_dword (devbusfn, PCI_REVISION_ID, &id);
-       pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, &pci_mem_base);
-       pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_1, &pci_mmio_base);
-       sm501.frameAdrs = pci_mem_to_phys (devbusfn, pci_mem_base);
-       sm501.isaBase = pci_mem_to_phys (devbusfn, pci_mmio_base);
-
-       if (sm501.isaBase)
-               write_reg32 = write_le32;
-
-       mem = in_le32 ((unsigned __iomem *)(sm501.isaBase + 0x10));
-       mem = (mem & 0x0000e000) >> 13;
-       switch (mem) {
-       case 1:
-               mem = 8;
-               break;
-       case 2:
-               mem = 16;
-               break;
-       case 3:
-               mem = 32;
-               break;
-       case 4:
-               mem = 64;
-               break;
-       case 5:
-               mem = 2;
-               break;
-       case 0:
-       default:
-               mem = 4;
-       }
-       printf ("PCI SM50%d %d MB\n", ((id & 0xff) == 0xC0) ? 2 : 1, mem);
-not_pci:
-#endif
-       /*
-        * Initialization of the access to the graphic chipset Retreive base
-        * address of the chipset (see board/RPXClassic/eccx.c)
-        */
-       if (!sm501.isaBase) {
-               sm501.isaBase = board_video_init ();
-               if (!sm501.isaBase)
-                       return NULL;
-       }
-
-       if (!sm501.frameAdrs) {
-               sm501.frameAdrs = board_video_get_fb ();
-               if (!sm501.frameAdrs)
-                       return NULL;
-       }
-
-       sm501.winSizeX = board_get_width ();
-       sm501.winSizeY = board_get_height ();
-
-#if defined(CONFIG_VIDEO_SM501_8BPP)
-       sm501.gdfIndex = GDF__8BIT_INDEX;
-       sm501.gdfBytesPP = 1;
-
-#elif defined(CONFIG_VIDEO_SM501_16BPP)
-       sm501.gdfIndex = GDF_16BIT_565RGB;
-       sm501.gdfBytesPP = 2;
-
-#elif defined(CONFIG_VIDEO_SM501_32BPP)
-       sm501.gdfIndex = GDF_32BIT_X888RGB;
-       sm501.gdfBytesPP = 4;
-#else
-#error Unsupported SM501 BPP
-#endif
-
-       sm501.memSize = sm501.winSizeX * sm501.winSizeY * sm501.gdfBytesPP;
-
-       /* Load Smi registers */
-       SmiSetRegs ();
-
-       /* (see board/RPXClassic/RPXClassic.c) */
-       board_validate_screen (sm501.isaBase);
-
-       /* Clear video memory */
-       i = sm501.memSize/4;
-       vm = (unsigned int *)sm501.frameAdrs;
-       while(i--)
-               *vm++ = 0;
-
-       return (&sm501);
-}
index 12828c67e364bb7c4686db1abb8f890a3f79f518..496ef58db0f7df4143fd0640b095e3fad633b134 100644 (file)
@@ -16,7 +16,6 @@
 
 #define CONFIG_PHY_VITESSE
 #define CONFIG_PHY_MARVELL
-#define CONFIG_PHY_MICREL
 #define CONFIG_PHY_BROADCOM
 #define CONFIG_PHY_DAVICOM
 #define CONFIG_PHY_REALTEK
index d05cc613d07c5b59949e1360868ddb7739a06fa0..892ceff5e6402099f63b3d29cfd4b8c803250c04 100644 (file)
@@ -30,7 +30,6 @@
  * NET options
  */
 #define CONFIG_SYS_RX_ETH_BUFFER       0
-#define CONFIG_PHY_GIGE
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 #define CONFIG_PHY_MARVELL
 
index 0d3794dd06a446613eb841fbb2f64d3cfbd80944..3869d9065c777c9420a53bb09da543a94c970728 100644 (file)
@@ -33,7 +33,6 @@
  * NET options
  */
 #define CONFIG_SYS_RX_ETH_BUFFER       0
-#define CONFIG_PHY_GIGE
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 #define CONFIG_PHY_MARVELL
 
index 4ec65759b58d03551b1d20eb5f80ab2234fff87f..90296cdb3eef484de87c6dc981f5054637d8558a 100644 (file)
@@ -679,7 +679,6 @@ unsigned long get_board_ddr_clk(void);
 
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 
 #define CONFIG_SYS_FSL_B4860QDS_XFI_ERR
index a7c97a3b79c48b46a8652c3f6269f8c8e04fb104..57d4bed89a4fba56d3a1f9dc92664e732f518c18 100644 (file)
@@ -258,8 +258,6 @@ extern unsigned long get_sdram_size(void);
 
 #define CONFIG_ETHPRIME                "eTSEC1"
 
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
-
 #endif /* CONFIG_TSEC_ENET */
 
 /*
index b0a3cf8e47e510cba71a2a1d181fd9c429aedb04..04a505398a5d3525228f401f5ee1a1c429d2c933 100644 (file)
@@ -457,8 +457,6 @@ combinations. this should be removed later
 
 #define CONFIG_ETHPRIME                "eTSEC1"
 
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
-
 /* TBI PHY configuration for SGMII mode */
 #define CONFIG_TSEC_TBICR_SETTINGS ( \
                TBICR_PHY_RESET \
index 050847b4aa8b8e21f4948d2e044a7c814003f109..962bf4aa4cbb1191d398ae430276272d2bf98dcd 100644 (file)
 #define TSEC2_FLAGS            (TSEC_GIGABIT | TSEC_REDUCED)
 
 #define CONFIG_ETHPRIME                "eTSEC1"
-
-#define CONFIG_PHY_GIGE
 #endif /* CONFIG_TSEC_ENET */
 
 /*
index 221c35cf51b41834134c75e016412d3ddd34c25a..cb83d07494da3ab486477108d3ca416522854d8f 100644 (file)
@@ -419,7 +419,6 @@ boards, we say we have two, but don't display a message if we find only one. */
 #ifdef CONFIG_TSEC_ENET
 
 #define CONFIG_MII
-#define CONFIG_PHY_GIGE                /* In case CONFIG_CMD_MII is specified */
 
 #define CONFIG_TSEC1
 
index 38a2ca146c967fff01f14f32786247c60879a3a9..6b9c25f0c994ac49664bd2f811bcc4bf0c6a1a2f 100644 (file)
 
 #define CONFIG_ETHPRIME                "eTSEC1"
 
-#define CONFIG_PHY_GIGE                1       /* Include GbE speed/duplex detection */
-
 #endif /* CONFIG_TSEC_ENET */
 
 /*
index b4f4c4e32bc8cb0fe5c3ee709fe5b19f711362db..12bcb02e5f5b4d311b01ad3a36f924ca6b793f2f 100644 (file)
@@ -318,8 +318,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define TSEC3_PHYIDX           0
 
 #define CONFIG_ETHPRIME                "eTSEC1"
-
-#define CONFIG_PHY_GIGE                1       /* Include GbE speed/duplex detection */
 #endif /* CONFIG_TSEC_ENET */
 
 /*
index b41543688b8031e661da4904317be82f46597f17..c18bf6744db4bb796a433f02f2002c7db0d4c2bb 100644 (file)
@@ -432,7 +432,6 @@ extern unsigned long get_clock_freq(void);
 
 /* Options are: eTSEC[0-3] */
 #define CONFIG_ETHPRIME                "eTSEC0"
-#define CONFIG_PHY_GIGE                1       /* Include GbE speed/duplex detection */
 #endif /* CONFIG_TSEC_ENET */
 
 /*
index 906270222a12055afc0070399b73ab2139d0d584..49c6e7fdeed9bc6f824753b022a97b564f1bb03e 100644 (file)
 #define TSEC4_PHYIDX           0
 
 #define CONFIG_ETHPRIME                "eTSEC1"
-
-#define CONFIG_PHY_GIGE                1       /* Include GbE speed/duplex detection */
 #endif /* CONFIG_TSEC_ENET */
 
 /*
index 08288ccf358e1b6fcff863e4f5ff23d736bc5f85..2dee5ac01c4ded1ff85828ba233614fce10fa257 100644 (file)
@@ -629,8 +629,6 @@ extern unsigned long get_sdram_size(void);
 
 #define CONFIG_ETHPRIME                "eTSEC1"
 
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
-
 /* TBI PHY configuration for SGMII mode */
 #define CONFIG_TSEC_TBICR_SETTINGS ( \
                TBICR_PHY_RESET \
index a1035d6794766f4d4ce147df6e5c3cfc3b63757f..0fab00f069fa307e9e1e7b43ea86bbc427442bb7 100644 (file)
 #define TSEC2_PHYIDX           0
 
 #define CONFIG_ETHPRIME                "eTSEC1"
-
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 
 /*
index 75d1efd12741062c5352d25b5174f3c3eeab8904..3cc50339549f2635b029afdcdf3e02235d129830 100644 (file)
@@ -317,7 +317,6 @@ extern unsigned long get_clock_freq(void);
 
 /* For FM */
 #define CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
index 7c139bbcd186224656c419c8965cb230dd18d100..ef7563d4158c66412393b1cecd02d632675e67e4 100644 (file)
@@ -558,7 +558,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_TBIPA_VALUE 8
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 
 /*
index 163ec10cfbff9520685399228bded42c8a64364c..767cd229a85c58a7df64cfa1069f2f69722e4540 100644 (file)
@@ -743,7 +743,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC4"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 
 /*
index cdd459e197c38d335e1d075f67867303a7c0947a..9c575a9b96ba623f0f320110d24b88c990f4944d 100644 (file)
@@ -755,7 +755,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC4"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 
 /*
index 0a848b644040def3b6b2cd1c0d46918f16e28d91..8bf32cd9f33911b0102d03f3e3a01d5a1a7adc76 100644 (file)
@@ -617,7 +617,6 @@ unsigned long get_board_ddr_clk(void);
 
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 
 /* Enable VSC9953 L2 Switch driver */
index 13efcb9e360effff0d01b3fb9c57c95da8a46ea8..49e88b23c8035005b475a50eda2712da5ee88b88 100644 (file)
@@ -753,7 +753,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
 
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC4"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 
 /*
index 1e4a49e8866c9812adc8d23e420b5a9a8d232ef2..f6b8f0b4dc2d1e151438d6b36670749abc0a97dd 100644 (file)
@@ -672,7 +672,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC3"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 
 /*
index ecce5163a1848381fc44654424fc5dbaab0b2d61..6ab7a126ccb6737cc88a910c89dca5ac4f61397c 100644 (file)
@@ -622,7 +622,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC3"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 
 /*
index e041ea0abdd172537f4209ff165e0e8cec224fbc..885dc776eb96def8fe58a7db0ab7bd8747e104d3 100644 (file)
@@ -485,7 +485,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 
 /*
index f4f025a3be8915c39fd62e727f3bcf35cc07c42b..4a2ed6a40758794362144858deeb4891b75ebf49 100644 (file)
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 
 /*
@@ -667,7 +666,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 
 /*
index 6fd3fa471259bae444c6b69de6f44256dd747881..56c1f2878d165969ae87a25d67d7492c4144efd8 100644 (file)
 
 #if defined(CONFIG_TSEC_ENET)
 
-#if defined(CONFIG_UCP1020_REV_1_2)
-#define CONFIG_PHY_MICREL_KSZ9021
-#elif defined(CONFIG_UCP1020_REV_1_3)
-#define CONFIG_PHY_MICREL_KSZ9031
+#if defined(CONFIG_UCP1020_REV_1_2) || defined(CONFIG_UCP1020_REV_1_3)
 #else
 #error "UCP1020 module revision is not defined !!!"
 #endif
 #define TSEC2_PHYIDX   0
 #define TSEC3_PHYIDX   0
 
-#define CONFIG_PHY_GIGE        1       /* Include GbE speed/duplex detection */
-
 #endif
 
 #define CONFIG_HOSTNAME                UCP1020
index 22a4e69be580020131acd78c8b9e0b63bf0b0835..6d40eb4854e82dff0d586ecebbc4a65a4b067949 100644 (file)
@@ -71,7 +71,6 @@
 #define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_ETHPRIME                "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         4
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 
 /* Serial Flash */
index a61814ef009d2e8f4443e29d6ea231c3434b74d5..35518da6257581d5f742c4336d3c42586c96df25 100644 (file)
@@ -51,8 +51,6 @@
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
index 2a2e2ba0a94347d1cf2e5eed4e40cd40fb520fe5..fbab610d7a7f07a84cf9664aacf414670a8f7458 100644 (file)
 #define CONFIG_SF_DEFAULT_SPEED                24000000
 
 /* Network. */
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC
 /* Enable Atheros phy driver */
 #define CONFIG_PHY_ATHEROS
index 4721b42f9ef7cd8b27f413f3f5b58a3f5c6aa1eb..3d3d5e730b415cf98ffba5870e732f3fcf24d69b 100644 (file)
 #define CONFIG_CONS_INDEX              1
 
 /* Ethernet support */
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC
 
 /* NAND support */
index f3b7767a9724bbc5e2281e4dd3cfd45afa104562..121beef679a37c4e028c5a48ff36992f7e520337 100644 (file)
 #define CONFIG_BOOTP_SUBNETMASK
 #define CONFIG_NET_RETRY_COUNT         10
 #define CONFIG_NET_MULTI
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ADDR                        0
 #define CONFIG_PHY_SMSC
 
index 75f9befcfd0a6e3378fa62b266f82ff72ce37e6e..13ff2b277aebc76825c63b8dea00b0148c3c92fe 100644 (file)
 #endif
 
 /* Network. */
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC
 
 #endif /* ! __CONFIG_AM335X_SL50_H */
index 44691676da88600240de12bae87095dfdb9c1267..4f3b605a968ae4be9174ea13ef9aa494161a2f40 100644 (file)
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_SUBNETMASK
 #define CONFIG_NET_RETRY_COUNT         10
-#define CONFIG_PHY_GIGE
 #endif
 
 #define CONFIG_DRIVER_TI_CPSW
-#define CONFIG_PHYLIB
 #define PHY_ANEG_TIMEOUT       8000 /* PHY needs longer aneg time at 1G */
 
 #define CONFIG_SYS_RX_ETH_BUFFER       64
index 9976686bd812f61d949177cbfb60264cfe80fc2f..9f07bba0c8985565a6709f938dd3c069b5fb7360 100644 (file)
@@ -84,8 +84,6 @@
 #define CONFIG_NET_RETRY_COUNT         10
 #define CONFIG_DRIVER_TI_CPSW          /* Driver for IP block */
 #define CONFIG_MII                     /* Required in net/eth.c */
-#define CONFIG_PHY_GIGE                        /* per-board part of CPSW */
-#define CONFIG_PHYLIB
 #define PHY_ANEG_TIMEOUT       8000    /* PHY needs longer aneg time at 1G */
 
 #define CONFIG_SUPPORT_EMMC_BOOT
index adc7d1feba9b1131837ace3b1726aec13061382b..cbf7782267396443965d94e4b6a4236efb994f06 100644 (file)
@@ -29,8 +29,6 @@
 #define CONFIG_SH_ETHER_PHY_ADDR (0x0)
 #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII)
 #define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL 1
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
index 4a12ac8ca3747a761b0dff66d6e60cce42197f1c..16af141a81d7e0eb8704319b9def2f743fc8af22 100644 (file)
@@ -86,9 +86,6 @@
 #define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_ETHPRIME                        "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         6
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9031
 #define CONFIG_IP_DEFRAG
 #define CONFIG_TFTP_BLOCKSIZE          4096
 #define CONFIG_TFTP_TSIZE
index 6ad956f03c30f929bbaa94ffd680c7bd95e7a157..1c28fcf0a7c32be535a975156a647b14d44bed11 100644 (file)
@@ -32,9 +32,6 @@
 #define CONFIG_ETHPRIME                        "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         0
 
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-
 #define CONFIG_SPI_FLASH_MTD
 #define CONFIG_MXC_SPI
 #define CONFIG_SF_DEFAULT_SPEED                20000000
index 30abafc0ae513ac83ef2e7e40098c35d13844f6a..9cd40a761647cc5d95c7c6a23d784049228c62ae 100644 (file)
@@ -20,7 +20,6 @@
 #define CONSOLE_DEV    "ttymxc1"
 
 #define CONFIG_FEC_XCV_TYPE            RGMII
-#define CONFIG_PHY_MICREL_KSZ9031
 
 #define CONFIG_SF_DEFAULT_BUS          3
 #define CONFIG_SF_DEFAULT_CS           1
index 7a4751451558ff5eb5408d0b4922506c97eb9eab..a680e762d710ec87aa0fd839276671f55132f112 100644 (file)
@@ -20,7 +20,6 @@
 #define CONSOLE_DEV    "ttymxc1"
 
 #define CONFIG_FEC_XCV_TYPE            RGMII
-#define CONFIG_PHY_MICREL_KSZ9031
 
 #define CONFIG_SF_DEFAULT_BUS          0
 #define CONFIG_SF_DEFAULT_CS           0
index 643b26b4880ae8675ff366cc956c5125fd0d0e11..3b8a250f872c7d9baae7019d2b584d206eb3848b 100644 (file)
 #define CONFIG_SH_ETHER_BASE_ADDR      0xe9a00000
 #define CONFIG_SH_ETHER_SH7734_MII     (0x01)
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
index 07b53b1fcf8cc4a9e597466c9a4ad8fc8c7ea417..e1a30b7e7142ca24a8cc58087a9872c4a0ef78e4 100644 (file)
@@ -55,7 +55,6 @@
  * Ethernet PHY configuration
  */
 #define CONFIG_MII
-#define CONFIG_PHY_GIGE
 
 /*
  * USB 1.1 configuration
index aba7208c5aa96f972945ced1e4a9090f57dbc057..598352b3ce797702e10c02139d79bd267f3d4a49 100644 (file)
 #endif
 
 /* Network. */
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ADDR                        0
 #define CONFIG_PHY_SMSC
 #define CONFIG_MII
index fafab8ea9783f996dd6112ff9a13601908f31d95..6beb347a8b89d29149c33e9d92f177076644949f 100644 (file)
@@ -521,8 +521,6 @@ DEFAULT_LINUX_BOOT_ENV \
 #define CONFIG_SF_DEFAULT_SPEED                24000000
 
 /* Network. */
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC
 
 /*
index 8d0e0ea793cabd51315bd5571ab462f6f61c5325..b8c531ec29445645fc34044af86132d69a3424dc 100644 (file)
@@ -31,7 +31,6 @@
 /* Network defines */
 #define CONFIG_DRIVER_TI_CPSW          /* Driver for IP block */
 #define CONFIG_MII                     /* Required in net/eth.c */
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_NATSEMI
 
 /*
index b36cbb967933a04c66b5d97c8ae1e90d99ea7963..4996a89520a3c3479f2a98f48e345cb505d78546 100644 (file)
 #define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_ETHPRIME                        "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         6
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 
 /* Command definition */
index 82be3a1afb2e8d341350a50f6a385510541a6a7f..581ab7cd50e92ea43338ee622384d26df9974f2a 100644 (file)
 #endif
 
 /* Network. */
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC
 
 #endif /* ! __CONFIG_CHILIBOARD_H */
index 120ac02e0662776430868eea31f5a3f5594e4662..4010354edf1ffd94d238bd42c92fde1d80d269f8 100644 (file)
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_BOOTP_GATEWAY
-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_ATHEROS
-#define CONFIG_PHYLIB
 #define CONFIG_SYS_RX_ETH_BUFFER       64
 #define PHY_ANEG_TIMEOUT               8000
 
index e2c43b1f40acf4f12ff43069302d728dc5b4e5d0..4f45be1bdbdb550d247cad5f0d779350996596ed 100644 (file)
 #define CONFIG_FEC_MXC_PHYADDR         0
 #define CONFIG_FEC_XCV_TYPE            RGMII
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 #define CONFIG_MII
 #define CONFIG_ETHPRIME                        "FEC0"
index ed7bb1d21c99a0beb714a39d33f9ce568f88d31e..6bcc63ab0cc69bb23c628cc92d0f8045e4804471 100644 (file)
 #define CONFIG_SPL_LDSCRIPT            "arch/arm/mach-omap2/u-boot-spl.lds"
 
 /* Network. */
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 
 /* NAND support */
index 7a61107294ffe68eccdd2bd72030a920d8c1868a..4c261f8e74af62f7c51eb66e8683d16b2ba4940f 100644 (file)
@@ -53,9 +53,7 @@
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_NET_MULTI
-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_ATHEROS
-#define CONFIG_PHYLIB
 #define CONFIG_SYS_RX_ETH_BUFFER       64
 
 /* USB support */
index 5f7386737a06ff50ae3bdd254294b8ed385b4f21..fca72f42b3ac020d99abbc636ac471a0c558be45 100644 (file)
@@ -72,8 +72,6 @@
 #define CONFIG_FEC_XCV_TYPE            RMII
 #define CONFIG_ETHPRIME                        "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         1
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 #define CONFIG_IP_DEFRAG
 #define CONFIG_TFTP_BLOCKSIZE          16352
 #define CONFIG_TFTP_TSIZE
index 4baa0383b8f61d9925981d4e328a90a4eec90bae..30a2d1286b838c82679234b87f21751938be7181 100644 (file)
@@ -32,8 +32,6 @@
 #define CONFIG_ETHPRIME                 "FEC"
 #define CONFIG_FEC_MXC_PHYADDR          0
 
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 #define CONFIG_IP_DEFRAG
 #define CONFIG_TFTP_BLOCKSIZE          16352
 #define CONFIG_TFTP_TSIZE
index 15a06384f41c53402c660300a7f426d7e76ac014..cc1f919f67ee3f4c20d04ea4f468b976a4cd528d 100644 (file)
@@ -66,8 +66,6 @@
 #define IMX_FEC_BASE                   ENET1_BASE_ADDR
 #define CONFIG_FEC_XCV_TYPE            RMII
 #define CONFIG_FEC_MXC_PHYADDR          0
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 
 #define CONFIG_IPADDR          192.168.10.2
 #define CONFIG_NETMASK         255.255.255.0
index 1ac416260eab225c72fa7909ff8346c72ec86233..08def6251acb3e93b320a85ae21afeaf33b45c7e 100644 (file)
 
 #define CONFIG_ETHPRIME                "eTSEC1"
 
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
-
 /*
  * USB
  */
index 77a997b111849b314bd7d3e5dd52c4e1956019ff..668dd060a72d286198c827e85d7ef76553724ac0 100644 (file)
 #define CONFIG_SYS_TBIPA_VALUE 8
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 
 /*
index e255a8b473a4432cd7141f635af8c46ab620eaa7..881960200b0c74447f72a1079cfffce5f7b58e9d 100644 (file)
@@ -84,7 +84,6 @@
 
 /* Ethernet */
 #define CONFIG_MACB
-#define CONFIG_PHYLIB
 #define CONFIG_RMII
 #define CONFIG_NET_RETRY_COUNT         20
 #define CONFIG_AT91_WANTS_COMMON_PHY
index ddbaf327d8ce92c9af791b8f9c34c32cc3324d1c..cdabbac561b6526282f8346564a64ac09c573b1a 100644 (file)
 
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
 #endif
 
 #ifdef CONFIG_PCI
 #define CONFIG_SYS_TBIPA_VALUE 8
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC4"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 
 /*
index f1a5c6c90a9e011972b4f312eac45ad3e1f345e8..6124867c6ee8994448203c5b7aa6fea7aacec87b 100644 (file)
@@ -73,7 +73,6 @@
 #define CONFIG_RMII
 #define CONFIG_PHY_SMSC
 #define CONFIG_LPC32XX_ETH
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ADDR                        0x1F
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 
index b5091513f7f575e8c99fa66090cd7cc52d51bf35..1a58c6ef24f27563b4287cb319c4f87eddc26b77 100644 (file)
 #define CONFIG_NET_RETRY_COUNT         10
 #define CONFIG_DRIVER_TI_CPSW          /* Driver for IP block */
 #define CONFIG_MII                     /* Required in net/eth.c */
-#define CONFIG_PHY_GIGE                        /* per-board part of CPSW */
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_TI
 
 /* SPI */
index ba6a43062a6301651f4e73c8e30c22a31902609e..2d8cf935cadcf951b6de6a459b9d5aa3ed111eda 100644 (file)
@@ -40,7 +40,6 @@
 #define EEPROM_ADDR_CHIP 0x120
 
 #undef CONFIG_MII
-#undef CONFIG_PHY_GIGE
 #define CONFIG_PHY_SMSC
 
 #define CONFIG_FACTORYSET
index 2471277c68b8725f93504a053778688862b2fdc5..fe56c8f22e1efc7f805e10c6c733459cd7d2c14b 100644 (file)
@@ -53,7 +53,6 @@
 #define CONFIG_SH_ETHER_USE_PORT (0)
 #define CONFIG_SH_ETHER_PHY_ADDR (0x1f)
 #define CONFIG_PHY_SMSC 1
-#define CONFIG_PHYLIB
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
index 61f0c95d550e28f6cdadbf7111358f957cd628c0..d1dec80f8f6204a8af2c5d6cfb2c6e0b6ebabe2d 100644 (file)
@@ -51,7 +51,6 @@
 #define CONFIG_ETHPRIME                        "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         4
 
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 
 #ifdef CONFIG_CMD_SF
index 07f327532ba04267ee1d8867cd642912f6201ebc..b9538f35d8501e6c8d57f931b3e506ba38ebe702 100644 (file)
@@ -91,7 +91,6 @@
 #define CONFIG_SH_ETHER 1
 #define CONFIG_SH_ETHER_USE_PORT (1)
 #define CONFIG_SH_ETHER_PHY_ADDR (0x00)
-#define CONFIG_PHYLIB
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
index 1662dbf1971bed0c94aedf32064891c76cb65b1a..c9584ad71c92f4b2b07ab9c9ce4649b7c6e85920 100644 (file)
@@ -98,7 +98,6 @@
 #define EEPROM_ADDR_CHIP 0x120
 
 #undef CONFIG_MII
-#undef CONFIG_PHY_GIGE
 #define CONFIG_PHY_SMSC
 
 #define CONFIG_FACTORYSET
index 584a2b4fb087c9bd7bd98a6e87b953faaf1b9200..5e5d04474b1240aa326b7dcfc59887e8d420d0ff 100644 (file)
@@ -77,8 +77,6 @@
  */
 #define CONFIG_FEC_MXC
 #define IMX_FEC_BASE   FEC_BASE_ADDR
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 #define CONFIG_FEC_MXC_PHYADDR 0x1
 
 #define CONFIG_MII
index 5e04dd24f4862dace362d755eca2e5d731656205..cc2b78677c484ace2c748d005a7eb2e6ef684ebc 100644 (file)
@@ -94,7 +94,6 @@
 #define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_ETHPRIME                "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         4
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 #endif
 
index 067e86d41cf0ffb08b1f7efc14d11f6ba5e78423..610ba1a7ac596b39af470a0d9fef50e48f1c315e 100644 (file)
@@ -50,8 +50,6 @@
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 #define CONFIG_SH_ETHER_ALIGNE_SIZE    64
index f56618af865e73c8a45c056515117188a0fb4577..c1e9f5d04214152b7f10781ab81894d721697977 100644 (file)
@@ -30,7 +30,6 @@
 #define CONFIG_FEC_XCV_TYPE            RMII
 #define CONFIG_ETHPRIME                "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         0
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC
 
 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
index 7a201b03614897d2afbb11355e2340be0d6c4d95..6341609858715079b38a9f686cfe6bd0a80a2566 100644 (file)
@@ -84,7 +84,6 @@
 #define CONFIG_KSNET_NETCP_V1_5
 #define CONFIG_KSNET_CPSW_NUM_PORTS    2
 #define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
-#define CONFIG_PHY_MICREL
 #define PHY_ANEG_TIMEOUT       10000 /* PHY needs longer aneg time */
 
 #define CONFIG_ENV_SIZE                        (256 << 10)  /* 256 KiB */
index 3c66f8a1707c9ce3516c81ff42fa0a1eb315c682..be4a2d0191fa4c063ac3c1154cdb5d03fe8dd310 100644 (file)
@@ -346,9 +346,7 @@ int get_scl(void);
 /* RGMII (FM1@DTESC5) is used as debug itf, it's the only one configured */
 #define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR 0x11
 #define CONFIG_SYS_TBIPA_VALUE 8
-#define CONFIG_PHYLIB          /* recommended PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC5"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 
 /*
  * Environment
index 988b747cbc93a4ff0fc1f42567d29cd0e494b2cc..b9214d2f3484b68b378af9763d030b6c398000db 100644 (file)
@@ -50,8 +50,6 @@
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64
index 73ea9ac828df7b08f035e8eb064a762963bc42f6..291b03c50bd0272794a1c9f9b73ad1629a8dda09 100644 (file)
@@ -51,8 +51,6 @@
 #define CONFIG_SH_ETHER_ALIGNE_SIZE    64
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
index 76ee91042da095aaeba0c0efd43f1a1a8e24257b..2cad644640a888308c0883dd750a1a51464fab6f 100644 (file)
 #define CONFIG_FEC_XCV_TYPE            RMII
 #define CONFIG_ETHPRIME                        "FEC"
 
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC
 #endif
 
index 58f893f4fdd575ca82044e34cd35c8b06a72e5cb..56a0754e13f8a8f05e3da58d5d170b7dca5e45d3 100644 (file)
 
 #define CONFIG_ETHPRIME                        "eTSEC2"
 
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 
 #define CONFIG_HAS_ETH0
index bd05b45f70b93c8d27e538b77586125f6ea77c4f..56f8c0305ad429e5c6c6fdbed9aef0633af32207 100644 (file)
@@ -456,8 +456,6 @@ unsigned long get_board_ddr_clk(void);
 
 #define CONFIG_ETHPRIME                        "eTSEC1"
 
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_REALTEK
 
 #define CONFIG_HAS_ETH0
index 98e902e0c61703a4f4097011dd4dc9b6102ccaeb..af499238b44981e9082b51e6cd9bb3aaa1ced2f7 100644 (file)
 
 #define CONFIG_ETHPRIME                        "eTSEC1"
 
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 
 #define CONFIG_HAS_ETH0
index 2d58b3b268b1df7abca510474a74eebe612f98ac..af58e614f56ec8b2592712d0d3e14dfa9bd70d43 100644 (file)
@@ -50,7 +50,6 @@ unsigned long get_board_ddr_clk(void);
 
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_VITESSE
 #define CONFIG_PHY_REALTEK
 #define CONFIG_PHYLIB_10G
index 937fd930eee3a9d4ace3e34db7cd4fb2f32e2be1..a4162a61b9a04c2222c2eec93816de6d752e4f36 100644 (file)
 #define AQR105_IRQ_MASK                        0x40000000
 
 #ifdef CONFIG_NET
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #define CONFIG_PHY_VITESSE
 #define CONFIG_PHY_REALTEK
 #endif
index 9dc74b4f095eea88d7257cca8a29139997b20d81..ef2f47c2612f94f9bd9c728571db6ba1f44e2c93 100644 (file)
@@ -70,7 +70,6 @@ unsigned long get_board_ddr_clk(void);
 
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_VITESSE
 #define CONFIG_PHY_REALTEK
 #define CONFIG_PHYLIB_10G
index 3d3dfb1f8f70ae1a4531d13f82fca81cc9279981..b9f27bbe5149c8f9f0fbeaacaf8dba5b0efdcd80 100644 (file)
 #ifndef SPL_NO_FMAN
 
 #ifdef CONFIG_NET
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #define CONFIG_PHY_REALTEK
 #endif
 
index 6b943cdb321ecda82bbc6ee2c554ee67965fe2e7..1801eca53f826a60498dd32612b0daf79102a0f9 100644 (file)
@@ -406,7 +406,6 @@ unsigned long get_board_ddr_clk(void);
 
 #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 #define CONFIG_FSL_MEMAC
-#define        CONFIG_PHYLIB
 #define CONFIG_PHYLIB_10G
 #define CONFIG_PHY_VITESSE
 #define CONFIG_PHY_REALTEK
@@ -435,7 +434,6 @@ unsigned long get_board_ddr_clk(void);
 
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "DPMAC1@xgmii"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 
 #endif
 
index b86726fc0e357bfc3f0f627194530b9948af06e0..de67e1d16e853595f1530605ba891a25edb55092 100644 (file)
@@ -468,7 +468,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_PHYLIB_10G
 #define CONFIG_PHY_AQUANTIA
 #define CONFIG_PHY_CORTINA
-#define CONFIG_PHYLIB
 #define        CONFIG_SYS_CORTINA_FW_IN_NOR
 #ifdef CONFIG_QSPI_BOOT
 #define CONFIG_CORTINA_FW_ADDR         0x20980000
@@ -489,7 +488,6 @@ unsigned long get_board_sys_clk(void);
 
 #define CONFIG_MII
 #define CONFIG_ETHPRIME                "DPMAC1@xgmii"
-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_AQUANTIA
 #endif
 
index 138525b3dde9cb01e4c9d1d539be800ba2e0dd3c..2f7efc75115dd65f38e7c22ba032c36dee17d5b9 100644 (file)
 #define CONFIG_MII
 #define CONFIG_DISCOVER_PHY
 #define CONFIG_FEC_XCV_TYPE            RMII
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 #define CONFIG_ETHPRIME                        "FEC0"
 #endif
 
index a4c103503fc31550dcb2eb37efd7d1cfeeb3a821..7ea983991a3d300728bbed6aa6a18f744fd7e938 100644 (file)
 #define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_ETHPRIME                        "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         1
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9031
 
 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 #define CONFIG_EXTRA_ENV_SETTINGS \
index aa007e2819b5e45b8b7cfce407e4d62260ea0d98..4f77b8eb9e3b13876f2f0d361762a4bcf5e8b7af 100644 (file)
 
 #if defined(CONFIG_XILINX_AXIEMAC)
 # define CONFIG_MII            1
-# define CONFIG_PHY_GIGE       1
 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN       1
 # define CONFIG_PHY_ATHEROS    1
 # define CONFIG_PHY_BROADCOM   1
 # define CONFIG_PHY_DAVICOM    1
 # define CONFIG_PHY_LXT                1
 # define CONFIG_PHY_MARVELL    1
-# define CONFIG_PHY_MICREL     1
-# define CONFIG_PHY_MICREL_KSZ9021
 # define CONFIG_PHY_NATSEMI    1
 # define CONFIG_PHY_REALTEK    1
 # define CONFIG_PHY_VITESSE    1
index 1307d215ed878e4856ddd412b8887c0974165d73..71975ed542480bb71c8e28a5bbfa57fd254406e5 100644 (file)
@@ -88,7 +88,6 @@
  */
 #define CONFIG_MVNETA          /* Enable Marvell Gbe Controller Driver */
 #define CONFIG_ENV_OVERWRITE   /* ethaddr can be reprogrammed */
-#define CONFIG_PHY_GIGE                /* GbE speed/duplex detect */
 #define CONFIG_ARP_TIMEOUT     200
 #define CONFIG_NET_RETRY_COUNT 50
 #define CONFIG_PHY_MARVELL
index 86ae19c9fbe10ff56f1f3897eb713b139fd047a3..d93a15f69114de0e13a127f60b2a092c57ce973a 100644 (file)
@@ -93,7 +93,6 @@
  * Ethernet Driver configuration
  */
 #define CONFIG_ENV_OVERWRITE   /* ethaddr can be reprogrammed */
-#define CONFIG_PHY_GIGE                /* GbE speed/duplex detect */
 #define CONFIG_ARP_TIMEOUT     200
 #define CONFIG_NET_RETRY_COUNT 50
 
index 32e898e05c2267c3360efbc9063d18a342e1c6b3..5930f591cbd0c0814e5bcac20783418c9f040067 100644 (file)
@@ -37,7 +37,6 @@
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_MXC_PHYADDR         0
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 
 /* Framebuffer */
index b3638d5caef2a4335265375d3f39ff9344386f28..b849eea48998acce457efaa5ed3a0c8030e68fcc 100644 (file)
@@ -28,7 +28,6 @@
 #define CONFIG_ETHPRIME                        "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         1
 
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 
 #ifdef CONFIG_CMD_SF
index 98797b07c1b96ee2d37061eb0aaf821e79a6265a..cd9f0b04c29ef38b853b998cb179a00d5d1c3afd 100644 (file)
@@ -39,7 +39,6 @@
 #define CONFIG_FEC_XCV_TYPE            RMII
 #define CONFIG_FEC_MXC_PHYADDR         0
 
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
index 060ebd77e1af52c9483603c252c95b778fedc619..e377c0ffa907f97b7c07b98c1cf60cdaf38f5378 100644 (file)
 #define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_ETHPRIME                 "FEC"
 
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 
 #ifdef CONFIG_CMD_USB
index 319fed4ebcbcaa8f87cce85d0914a4448d32df86..2c0a799c7c7f09f43dde8404e32a83c42a1a41c9 100644 (file)
 #define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_ETHPRIME                 "FEC"
 
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 
 #ifdef CONFIG_CMD_USB
index c9b7e7b473d363d41fb2cf305ff7260d4031a747..47379ca1885592a08f5cf53b082a7399ffe77711 100644 (file)
 #define CONFIG_FEC_XCV_TYPE            RMII
 #endif
 #define CONFIG_ETHPRIME                        "FEC"
-
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 #endif
 
 #define CONFIG_IMX_THERMAL
index d4dd0b330defe0b03e59dd854046608d7d3a3e93..fec7e81e7482f8161dde31e925c1b3a2fa688ab0 100644 (file)
@@ -26,7 +26,6 @@
 #define CONFIG_ETHPRIME                 "FEC"
 #define CONFIG_FEC_MXC_PHYADDR          0
 
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_BROADCOM
 /* ENET1 */
 #define IMX_FEC_BASE                   ENET_IPS_BASE_ADDR
index a1a0cdaf2e6244769bc60abc5d5307c21e2c19f9..bc17b516e4fecafb141a67d71fd4062423dff37b 100644 (file)
@@ -65,9 +65,6 @@
 #define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_ETHPRIME                        "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         6
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
 
 /* USB Configs */
 #define CONFIG_USB_HOST_ETHER
index 2bba741ac376769fb45c19ce24094fcbcaa891e2..c3005e7a15d542a0b3ad2ad162ae2605c26dff71 100644 (file)
@@ -72,9 +72,6 @@
 #define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_ETHPRIME                        "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         0x7
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
 #define CONFIG_ARP_TIMEOUT             200UL
 #endif
 
index 2342f7452f583fa230b8a28ef8589923fb61f5e8..896c32996ce0abf763d5ee1b6ff1f68d780eeba7 100644 (file)
@@ -70,7 +70,6 @@
 #define CONFIG_NET_MULTI
 #define CONFIG_MVGBE_PORTS     {1, 0}  /* enable port 0 only */
 #define CONFIG_PHY_BASE_ADR    1
-#define CONFIG_PHY_GIGE
 #define CONFIG_RESET_PHY_R
 #endif /* CONFIG_CMD_NET */
 
index 373c2d5ca2715b3ae5cda124246017fe353dbc86..8ca6f62850327c23e003ee3f945e986bf36dde29 100644 (file)
@@ -82,7 +82,6 @@
 #define CONFIG_FEC_XCV_TYPE             MII100
 #define CONFIG_ETHPRIME                 "FEC"
 #define CONFIG_FEC_MXC_PHYADDR          0x5
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC
 
 #ifndef CONFIG_SPL
index 6eae41c7e50a13ab38cb3e292e18351c7c06ff4a..5c8277908fca70927acb4dc12d74f01989b2f772 100644 (file)
 
 #define CONFIG_ETHPRIME        "eTSEC1"
 
-#define CONFIG_PHY_GIGE        1       /* Include GbE speed/duplex detection */
-
 #define CONFIG_HAS_ETH0
 #define CONFIG_HAS_ETH1
 #define CONFIG_HAS_ETH2
index d5f576946329cd87d906d61b7c31eb10f9a41ae7..df0b6082ec1e052aeceb72fc8a5ee4aa719537c5 100644 (file)
@@ -295,8 +295,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_ETHPRIME        "eTSEC1"
 
-#define CONFIG_PHY_GIGE        1       /* Include GbE speed/duplex detection */
-
 #define CONFIG_HAS_ETH0
 #define CONFIG_HAS_ETH1
 #undef CONFIG_HAS_ETH2
index ce80e7ecbc87f1de8f91c1473b1707ea7ef0e5eb..112f9b8285cc58aebed8ac8ee6e71e5c5651a5a9 100644 (file)
 #define CONFIG_USB_ETH_RNDIS
 #endif /* CONFIG_USB_MUSB_GADGET */
 
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC
 
 #endif /* ! __CONFIG_PCM051_H */
index 71c5078cc797744115e2aa427d6c183d71170d22..b4b60ac865b46ba82eb272e32f9ac9914b84c1ef 100644 (file)
@@ -61,8 +61,6 @@
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_XCV_TYPE            RMII
 #define CONFIG_FEC_MXC_PHYADDR          0
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 
 /* QSPI Configs*/
 
index e3a84ed06123548252def70264be2dff2e99d48f..2c1221d0854fc772fba4ec13fc582049d3854fb9 100644 (file)
 #define CONFIG_ETHPRIME                        "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         3
 
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_KSZ9031
-
 /* SPI Flash */
 #define CONFIG_MXC_SPI
 #define CONFIG_SF_DEFAULT_BUS          0
index dbe0ddd7852b9549937bc831354fcf441b443714..a76bbce9ff3ceb4f01d03950a45f81cf3ed0ac2c 100644 (file)
 #define CONFIG_NET_MULTI
 
 /* Network */
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_RESET       1
 #define CONFIG_PHY_NATSEMI
 #define CONFIG_PHY_REALTEK
index ff3cd74ac314a8fa4b1c3739b84ad0441d3fc6a4..1a6981a52e57ca1466b0736f788e5e7f34219903 100644 (file)
 #define CONFIG_SYS_NS16550_COM1                0x44e09000
 
 /* Ethernet support */
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ADDR                        0
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
 #define CONFIG_PHY_RESET_DELAY 1000
 
 /* SPL */
index 7b44752e551c7976dc3974203718d48cee136527..5cb507f0c07a384e74bf6523a1ef3a5f248dbedf 100644 (file)
@@ -21,8 +21,6 @@
 #define IMX_FEC_BASE                   ENET2_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR         0x1
 #define CONFIG_FEC_XCV_TYPE            RMII
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN          (35 * SZ_1M) /* Increase due to DFU */
index e623f48fa26bb905ce1785b1a0efde43ea338f16..793ba78c7b450715181dc4664f6a687da7200e7a 100644 (file)
@@ -25,7 +25,6 @@
 #define CONFIG_ETHPRIME                        "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         1
 
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 
 /* ENET1 */
index 1cdab00e3bec525728bfc02495037d743817a585..4801cb22babd0f4d215c560dc28f05293473ec06 100644 (file)
@@ -40,8 +40,6 @@
 #define CONFIG_MII
 #define IMX_FEC_BASE                           ENET_BASE_ADDR
 
-#define CONFIG_PHYLIB
-
 /* USB config */
 #define CONFIG_MXC_USB_PORT                    1
 #define CONFIG_MXC_USB_PORTSC                  (PORT_PTS_UTMI | PORT_PTS_PTW)
index ccb6441871b08a618a472a648d125f15f2baefcb..69406a4b65eed8b49cec3ee3b51f268b3e179695 100644 (file)
@@ -20,8 +20,6 @@
 #define CONFIG_FEC_XCV_TYPE                    RGMII
 #define CONFIG_FEC_MXC_PHYADDR                 4
 
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
 #define CONFIG_PHY_RESET_DELAY                 1000
 
 #define CONFIG_HOSTNAME                                titanium
index fa1fff98296e8cf932c287c9a0d5aac9da80d49f..451d9dd66f1e3224fbbfecefc1dfcef1b110f546 100644 (file)
@@ -52,8 +52,6 @@
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
 #define CONFIG_SH_ETHER_ALIGNE_SIZE    64
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
index d79aa21c9e6feff4d99a89d4500cf17beb40ebf4..2b04521240f291488b4fa7dd94b3ffae218c3e4e 100644 (file)
@@ -27,7 +27,6 @@
 #define CONFIG_SH_ETHER 1
 #define CONFIG_SH_ETHER_USE_PORT (0)
 #define CONFIG_SH_ETHER_PHY_ADDR (0x0)
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC 1
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
index 0820f6fc7a3fbce01dfeb1348627ff5ac904e973..721f94c5c92f13672faa497647d32356313ed90f 100644 (file)
@@ -44,7 +44,6 @@
 #define EEPROM_ADDR_CHIP 0x120
 
 #undef CONFIG_MII
-#undef CONFIG_PHY_GIGE
 #define CONFIG_PHY_SMSC
 
 #define CONFIG_FACTORYSET
index c8877718b4070394e6becb6f2534871c81c94bf3..381082c98407d387acc0efcacfdf06e80f050490 100644 (file)
@@ -93,8 +93,6 @@
 #define IMX_FEC_BASE            ENET_BASE_ADDR
 #define CONFIG_FEC_XCV_TYPE     RMII
 #define CONFIG_FEC_MXC_PHYADDR  0
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 #endif
 
 #if 0                          /* Disable until the FLASH will be implemented */
index f8bfe96781e57ebdcf22a52153e6b80b193d8987..5bf5731029b5651a2d1f7b111c4e0555d757de83 100644 (file)
@@ -26,7 +26,6 @@
 
 /* Ethernet RAVB */
 #define CONFIG_NET_MULTI
-#define CONFIG_PHY_MICREL
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
index 83b527c0de5c28d636fa1fe15258c72036515f1a..d10dc3e2cb0c83c98b3d04618d621d99d9e46a33 100644 (file)
@@ -85,8 +85,6 @@
 #define CONFIG_PMECC_CAP               4
 #define CONFIG_PMECC_SECTOR_SIZE       512
 
-#define CONFIG_PHY_MICREL_KSZ9021
-
 /* USB */
 
 #ifdef CONFIG_CMD_USB
index cf9809df49de97794caefb07ae6af000051fa8de..abac950db4805f1db5fdb4645507367540c76e37 100644 (file)
 
 /* Options are: eTSEC[0-3] */
 #define CONFIG_ETHPRIME                "eTSEC0"
-#define CONFIG_PHY_GIGE                1       /* Include GbE speed/duplex detection */
 #endif /* CONFIG_TSEC_ENET */
 
 /*
index f7aeb640f60d0a29ed22d5276b5ac7af55625cba..efed670edc0beed2a68e4c0f4c4b7641d1618b28 100644 (file)
@@ -33,7 +33,6 @@
 /* FEC Ethernet on SoC */
 #ifdef CONFIG_CMD_NET
 #define CONFIG_FEC_MXC
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC
 #endif
 
index c90626fa23f22d1a495c606f1e85da515718b973..c3a4961b0d83763e29245a007319edf3129a6e94 100644 (file)
@@ -33,8 +33,6 @@
 #define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_ETHPRIME                        "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         6
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 
 #define CONFIG_EXTRA_ENV_SETTINGS                                      \
        "netdev=eth0\0"                                                 \
index 39e8244b2524bc6ddbff8dbb5ed22a27bf7974d7..dd3a5fb9dfc99c93c1f14282b54b94b10862d500 100644 (file)
@@ -60,7 +60,6 @@
 #define CONFIG_SH_ETHER_PHY_ADDR       18
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK        1
 #define CONFIG_SH_ETHER_USE_GETHER     1
-#define CONFIG_PHYLIB
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
index 24ec0768afa1c46947e9047e282cfb2ccc102abe..c53cd175fb7559f2ff6cd7530ff227a49ed15181 100644 (file)
@@ -60,7 +60,6 @@
 #define CONFIG_SH_ETHER_PHY_ADDR       18
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK        1
 #define CONFIG_SH_ETHER_USE_GETHER     1
-#define CONFIG_PHYLIB
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
index e5084adfccb0eff11b03b2ad7835b0e6a52098b2..8ec4cd4430654da8d5a6b32d0c5b9f8b400ad507 100644 (file)
@@ -60,7 +60,6 @@
 #define CONFIG_SH_ETHER_USE_PORT       0
 #define CONFIG_SH_ETHER_PHY_ADDR       1
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK        1
-#define CONFIG_PHYLIB
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
index 74bd9fc29ab2fbf6230ff65fe76b07e39cf932e7..3876e071e2181ce6119c3a70e38b5e6bef2a78be 100644 (file)
@@ -91,7 +91,6 @@
 #define CONFIG_SH_ETHER 1
 #define CONFIG_SH_ETHER_USE_PORT (1)
 #define CONFIG_SH_ETHER_PHY_ADDR (0x01)
-#define CONFIG_PHYLIB
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
index 5a5bf7ac5aeae229e8548bb712c5cbd49fb64067..22215fefc0c5aec5e5640b9b6a84405f93ac1e5b 100644 (file)
 
 #define CONFIG_DRIVER_TI_CPSW
 #define CONFIG_MII
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
 #define CONFIG_BOOTP_DNS2
index 238783b4c44514654aa3b041ae2b86910aec1fc4..0384325cb5b2a4097cc4fd66f5effb6b2c880572 100644 (file)
@@ -52,8 +52,6 @@
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
 #define CONFIG_SH_ETHER_ALIGNE_SIZE    64
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
index cc83b98348f320e78408789290226f3635a8794c..a80d2902b40f45ab2359e7a3beda10137b2d32b1 100644 (file)
  *
  */
 #define CONFIG_MACB
-#define CONFIG_PHYLIB
 #define CONFIG_USB_HOST_ETHER
 #define CONFIG_USB_ETHER_ASIX
 #define CONFIG_USB_ETHER_MCS7830
index 13977cb9a68a97c20e99cef8b41e54817adea52c..91a681ac33e61d1ecd63eadd389ee107ab6168aa 100644 (file)
@@ -52,7 +52,6 @@
 
 /* Ethernet */
 #define CONFIG_MACB
-#define CONFIG_PHYLIB
 #define CONFIG_RMII
 #define CONFIG_NET_RETRY_COUNT         20
 #define CONFIG_RESET_PHY_R
index 55850bd1b39c81ef70277fb28212c152ae4d62fc..b30b44d123ae80f2b0ea05795eed110366c6f8d3 100644 (file)
 #define PHYS_SDRAM_1_SIZE              0x40000000
 
 /* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9031
-#endif
 
 /*
  * U-Boot environment configurations
index 9f83858bd18079d0f13956eba11c82b94db5539d..6b6d54b97b1a571e06391d3aeacf5736219fc683 100644 (file)
 #define CONFIG_SYS_LOAD_ADDR   CONFIG_LOADADDR
 
 /* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
-#endif
 
 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
index 2c23ae50734645a3b7235e64f18aad8b01121b70..175b01ef84a9f12565b3d29529b30cbdcb9becd8 100644 (file)
@@ -97,7 +97,6 @@
 #define CONFIG_DW_ALTDESCRIPTOR
 #define CONFIG_MII
 #define CONFIG_AUTONEG_TIMEOUT         (15 * CONFIG_SYS_HZ)
-#define CONFIG_PHY_GIGE
 #endif
 
 /*
index 86b4a9dfb80e117a57c12fbb55b563a25c2e589b..018a0c3bb48a494de01937740f620f26fa30521b 100644 (file)
 #define CONFIG_SYS_LOAD_ADDR   CONFIG_LOADADDR
 
 /* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
-#endif
 
 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
index 6516c45acf1870be603f18e8fa072bdd6fab4d05..275ed7ffebbdbbc8dafc14cc4e3e14e5bb918cc1 100644 (file)
 #define CONFIG_SYS_LOAD_ADDR   CONFIG_LOADADDR
 
 /* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9031
-#endif
 
 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
index 04be2b1689c7f746bf0ebd2bfaccf11859bbbb8b..bb50fcf1ff02600d06404a7e9bfd9e9c30696aee 100644 (file)
 #define CONFIG_SYS_LOAD_ADDR   CONFIG_LOADADDR
 
 /* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9031
-#endif
 
 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
index 9405083b3e028fcda07288b9fe568cd267465c7f..05975c9bde4b458d877543dbdd8eb5c6b9953b2a 100644 (file)
 #define CONFIG_SYS_LOAD_ADDR   CONFIG_LOADADDR
 
 /* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
-#endif
 
 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
index febb8f7fcc35487714a7147574e97d492114f7c8..6d12aedc1d6aefc53a22e3b2fa67ec8f3d895a9d 100644 (file)
@@ -25,8 +25,6 @@
 #define CONFIG_ARP_TIMEOUT             500UL
 
 /* PHY */
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
 #endif
 
 /* The rest of the configuration is shared */
index 57de60ecfa8cf4199c7f21f14f8e0f6b1e6948e6..b4f31c42c5083fe20af894095e044d6d13e2cc5e 100644 (file)
 #define CONFIG_SYS_LOAD_ADDR   CONFIG_LOADADDR
 
 /* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
-#endif
 
 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
index 6b6cb6aa14f63d32523ec61ea431fa677c715580..ebb9ac588d7b270b158d2ba38ee24c4317b8ab1c 100644 (file)
 #define CONFIG_SYS_LOAD_ADDR   CONFIG_LOADADDR
 
 /* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
-#endif
 
 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
index a86043f339e39e838ec688da27a688e6aa69a4ee..b54097cde77ca1d5579854d859e0528df0775276 100644 (file)
@@ -41,8 +41,6 @@
 #if defined(CONFIG_CMD_NET)
 #define CONFIG_BOOTP_SEND_HOSTNAME
 /* PHY */
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
 #endif
 
 /* Extra Environment */
index 406a985b606d4cb147bef6fa02726242fc0c71ba..5b8fa3a08cdcb1362c843fff24fe79cf977691c2 100644 (file)
 
 /* Options are: TSEC[0,1] */
 #define CONFIG_ETHPRIME                "TSEC0"
-#define CONFIG_PHY_GIGE                1       /* Include GbE speed/duplex detection */
 
 #define CONFIG_HAS_ETH0
 #define CONFIG_HAS_ETH1
index 83060e71a6a339c2bd89adbbea54af3021cd5d07..49fdf9cdb742ceaa4d539ee843f7ae57e5a40ada 100644 (file)
@@ -17,7 +17,6 @@
 /* Ethernet driver configuration */
 #define CONFIG_MII
 #define CONFIG_PHY_RESET_DELAY                 10000           /* in usec */
-#define CONFIG_PHY_GIGE                        /* Include GbE speed/duplex detection */
 
 /* USBD driver configuration */
 #if defined(CONFIG_SPEAR_USBTTY)
index 3b8806d065f6671d5a92148411b66dc3b669c326..9422c042f3b71796200a31afb0b22b5f75fa27ee 100644 (file)
@@ -55,8 +55,6 @@
 #define CONFIG_SH_ETHER_ALIGNE_SIZE    64
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
index 0ac262e09549c458b0f10b1f9c5092865527e522..3b5831d46e6a657b90d2123925b68803f5ba8857 100644 (file)
@@ -49,7 +49,6 @@
 
 #define CONFIG_MII
 #define CONFIG_DW_ALTDESCRIPTOR
-#define CONFIG_PHY_MICREL
 
 /* Command support defines */
 #define CONFIG_PHY_RESET_DELAY                 10000           /* in usec */
index 681c91cf46dcb089a88849bce861927c8b37e5bc..07c7ffd7f204d855b720a0bbb4416c03888392a4 100644 (file)
@@ -296,11 +296,9 @@ extern int soft_i2c_gpio_scl;
 #ifdef CONFIG_SUNXI_EMAC
 #define CONFIG_PHY_ADDR                1
 #define CONFIG_MII                     /* MII PHY management           */
-#define CONFIG_PHYLIB
 #endif
 
 #ifdef CONFIG_SUNXI_GMAC
-#define CONFIG_PHY_GIGE                        /* GMAC can use gigabit PHY     */
 #define CONFIG_PHY_ADDR                1
 #define CONFIG_MII                     /* MII PHY management           */
 #define CONFIG_PHY_REALTEK
index 6d8c78f76b0d58579cceb4670d3a1766477039ee..99c0602503e38af3cfcb4da3dde5b84fbd4531b0 100644 (file)
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 
 /*
index 7e1c58fdd322cdd760af53689d152250d01d1861..5a7ef75ae928f2dcd0e3f74590ed60b5a0719a54 100644 (file)
@@ -87,7 +87,6 @@
 
 /* Ethernet */
 #define CONFIG_MACB
-#define CONFIG_PHYLIB
 #define CONFIG_RMII
 #define CONFIG_AT91_WANTS_COMMON_PHY
 
index 67b5774a096d9949fd69aa91ee5adf88f94be63c..546f2d3a4ba13790e558879cbe14aa6d55ffcd95 100644 (file)
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_CLK         166666666
 
-/*
- * Ethernet PHY configuration
- */
-#define CONFIG_PHY_GIGE
-
 /*
  * Even though the board houses Realtek RTL8211E PHY
  * corresponding PHY driver (drivers/net/phy/realtek.c) behaves unexpectedly.
index 4baccdc1e977c91260e72869036190ca797b4dfb..5271b5cf44691375c965fa558f78e68f0096b7f2 100644 (file)
@@ -59,7 +59,6 @@
 #define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_ETHPRIME                        "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         4
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 
 /* Framebuffer */
index cea84acd03c1c92f009a6f9aeb9c2e9340ba75dc..23f4dbfe46661986cc66e9a73e9a18896ad08d9d 100644 (file)
@@ -37,7 +37,6 @@
 #define EEPROM_ADDR_CHIP 0x120
 
 #undef CONFIG_MII
-#undef CONFIG_PHY_GIGE
 #define CONFIG_PHY_SMSC
 
 #define CONFIG_FACTORYSET
index b5f817749cbcdaba47ad8cf3127538b7f1b887de..4d9ec790fd94a64dab4d6ea69d723e044efbe6c8 100644 (file)
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_SUBNETMASK
 #define CONFIG_NET_RETRY_COUNT         10
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ET1011C
 #define CONFIG_PHY_ET1011C_TX_CLK_FIX
 
index 26290ef1b278cee1c10645f7ac0d6a308dddfe2d..03e28fc39b4066244ffd73ee9df524ee9f261a01 100644 (file)
@@ -97,7 +97,6 @@
 #endif
 
 /* Network Configuration */
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_MARVELL
 #define CONFIG_MII
 #define CONFIG_BOOTP_DEFAULT
index 606da4a8543b869ca05c66ab72d27d7b7fd9b3c3..3fb63f30146d38d4aed974d9b2fd3c8011766171 100644 (file)
@@ -45,9 +45,6 @@
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_MXC_PHYADDR         4
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
 
 /* USB Configs */
 #define CONFIG_MXC_USB_PORT    1
index a03ad67af0112227ae85ce2d79d248ac45b6c816..b670cc409afb6f596391ad2bb2a94923791cdb5f 100644 (file)
@@ -65,6 +65,5 @@
 #define CONFIG_CMD_MEMTEST
 
 #define CONFIG_CMD_MII
-#define CONFIG_PHY_GIGE
 
 #endif  /* __CONFIG_H */
index b5b71570d1424c31269018d7303ec6f32853c964..8cc0018943d12a9958ae8a7b3ba2ae319423e103 100644 (file)
@@ -81,7 +81,6 @@
 
 #define CONFIG_FEC_MXC
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
-#define CONFIG_PHYLIB
 #define CONFIG_MII
 
 #define CONFIG_ARP_TIMEOUT             200UL
index 69e907933954bf820ef41f457d0748d172db8ea9..9c7e5a48788322e7fd3d538586bce44b111eadb8 100644 (file)
@@ -14,8 +14,6 @@
 #define CONFIG_ETHPRIME                        "FEC"
 
 #define CONFIG_FEC_MXC_PHYADDR         0x03
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_KSZ9031
 
 #define CONFIG_MXC_UART_BASE           UART2_BASE
 #define CONSOLE_DEV            "ttymxc1"
index 959db5fdb237d842411ddd8b313d39fb46cf223f..0219376f10cd25c3cb0c390c93b64817cc609ead 100644 (file)
@@ -61,7 +61,6 @@
  * Eth Configs
  */
 #define CONFIG_MII
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC
 
 #define CONFIG_FEC_MXC
index d3fa5d71c19b91470f052ab43836a3b05ab7060d..26a1a6f9b348307c2cb49d1f4039d80e602978f9 100644 (file)
@@ -41,9 +41,6 @@
 #define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_ETHPRIME                 "FEC"
 #define CONFIG_FEC_MXC_PHYADDR          6
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9031
 
 #define CONFIG_SYS_MEMTEST_START       0x10000000
 #define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
index 60b76edd1fcab5c1f2eccbc15f42d24daedd5a4b..9b0a20d3ad4b22a600ff72c29141ca45f83c18ee 100644 (file)
 #define CONFIG_FEC_XCV_TYPE             RMII
 #define CONFIG_ETHPRIME                 "FEC0"
 
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-
 #endif                         /* __CONFIG_H */
index 04abe1e355b34f6854805f44994a6c679a1a7fdd..6aaa4d1a28e303b449cb98a4f842d6821273e818 100644 (file)
@@ -59,8 +59,6 @@
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_XCV_TYPE            RMII
 #define CONFIG_FEC_MXC_PHYADDR          0
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 
 /* QSPI Configs*/
 
index 0fed7f37ca388e2c527840cc7178c648f51a1688..77da9e5e854766a34124cf1fa0ae5c12918ec6df 100644 (file)
@@ -72,7 +72,6 @@
 #define CONFIG_FEC_XCV_TYPE             RMII
 #define CONFIG_ETHPRIME                 "FEC"
 
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 
 #ifdef CONFIG_CMD_USB
index a8a48a597f0af262b4500100571acea539ac4f45..ed25f420d00b6e71820aa707e84d510f9f8986e3 100644 (file)
@@ -60,7 +60,6 @@
 #define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_ETHPRIME                        "FEC"
 #define CONFIG_FEC_MXC_PHYADDR         1
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 
 /* Framebuffer */
index dc8008c13545ef38f3797b982e16e266667daf62..f3eba9c66dbdf053f2ae28629a80e3ebef099402 100644 (file)
@@ -88,8 +88,6 @@
  */
 #define CONFIG_FEC_MXC
 #define IMX_FEC_BASE   FEC_BASE_ADDR
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 #define CONFIG_FEC_MXC_PHYADDR 0x1
 
 #define CONFIG_MII
index 0ac7b85f4b58b8ab9a199b3fc7ae501fe917ee72..f7a3df103d7a61e3d766ab0f29d6bac67817be28 100644 (file)
@@ -57,7 +57,6 @@
 
 #define CONFIG_PHY_SMSC
 #define CONFIG_LPC32XX_ETH
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_ADDR 0
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 /* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */
index a8435d8b0147d8bb9bf950b5dd618d512196270c..18167a8a3c0407336cfe97db446df4c22ad022c2 100644 (file)
@@ -74,9 +74,6 @@
 #define CONFIG_MII
 #define CONFIG_PHY_RESET_DELAY                 10000           /* in usec */
 #define CONFIG_PHY_ADDR                0       /* PHY address */
-#define CONFIG_PHY_GIGE                        /* Include GbE speed/duplex detection */
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9031
 
 #define CONFIG_SPEAR_GPIO
 
index 363c2924f0a88703442659b4dba3c2b21250c40d..77d7899deff42ed387eb88de0b717ade80e6d3c5 100644 (file)
 # define CONFIG_PHY_MARVELL
 # define CONFIG_PHY_NATSEMI
 # define CONFIG_PHY_TI
-# define CONFIG_PHY_GIGE
 # define CONFIG_PHY_VITESSE
 # define CONFIG_PHY_REALTEK
 # define PHY_ANEG_TIMEOUT       20000
index c21c944b29a437761f66e3f1a7187a3664f06e34..478ca50a89423d88b3dfde6526913ac0bf52d18f 100644 (file)
@@ -304,7 +304,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  * Networking options
  */
 #define CONFIG_TSEC_ENET               /* tsec ethernet support */
-#define CONFIG_PHY_GIGE                1       /* Include GbE speed/duplex detection */
 #define CONFIG_MII             1       /* MII PHY management */
 #define CONFIG_ETHPRIME                "eTSEC1"
 
index eb801542ebf858501042f2a7ed5e856b742f4a94..f54971ee286b7258587584c96a227b5fe1e93207 100644 (file)
  * Networking options
  */
 #define CONFIG_TSEC_ENET               /* tsec ethernet support */
-#define CONFIG_PHY_GIGE                1       /* Include GbE speed/duplex detection */
 #define CONFIG_MII             1       /* MII PHY management */
 #define CONFIG_ETHPRIME                "eTSEC1"
 
index bc423136ba982bc622c3cc5c88b6d15691f99589..c32b63d171ec73710f0416eec74696cd54818c4e 100644 (file)
@@ -304,7 +304,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
  * Networking options
  */
 #define CONFIG_TSEC_ENET               /* tsec ethernet support */
-#define CONFIG_PHY_GIGE                1       /* Include GbE speed/duplex detection */
 #define CONFIG_TSEC_TBI
 #define CONFIG_MII             1       /* MII PHY management */
 #define CONFIG_MII_DEFAULT_TSEC        1       /* Allow unregistered phys */
index 13be539db3f40869a32c5820fbdedb32934538a4..7b0a0c6793bf7ce196509033e0879e668f116a57 100644 (file)
@@ -290,7 +290,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
  * Networking options
  */
 #define CONFIG_TSEC_ENET               /* tsec ethernet support */
-#define CONFIG_PHY_GIGE                1       /* Include GbE speed/duplex detection */
 #define CONFIG_TSEC_TBI
 #define CONFIG_MII             1       /* MII PHY management */
 #define CONFIG_MII_DEFAULT_TSEC        1       /* Allow unregistered phys */
index 629e3df641e4f93ac60157a008ea6c3204af8c37..fdb504d9d990fddf9730f6fee4085e73377a9b4b 100644 (file)
@@ -75,7 +75,6 @@
 #define CONFIG_FEC_MXC_PHYADDR          0x0
 #define CONFIG_FEC_XCV_TYPE             RMII
 #define CONFIG_ETHPRIME                        "FEC"
-#define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC
 
 #define CONFIG_IMX_THERMAL
index 61c6a60b54c90aa97dada5203416588960466421..f71cdfbdd3cbbb46a1b48024e845e131ced8625c 100644 (file)
@@ -25,7 +25,6 @@
 #define CONFIG_FEC_XCV_TYPE                    RGMII
 #define CONFIG_ETHPRIME                                "FEC"
 #define CONFIG_FEC_MXC_PHYADDR                 0x10
-#define CONFIG_PHYLIB
 #define CONFIG_FEC_FIXED_SPEED                 1000 /* No autoneg, fix Gb */
 
 #endif                         /*__EL6Q_CONFIG_H */
index 2eaa88224c9050755330e67a57ae7b541cfaa3fa..e1269486ad9cf11562c5aa432a33527f894ce325 100644 (file)
@@ -308,7 +308,7 @@ struct ethernet_hdr {
        u8              et_dest[ARP_HLEN];      /* Destination node     */
        u8              et_src[ARP_HLEN];       /* Source node          */
        u16             et_protlen;             /* Protocol or length   */
-};
+} __attribute__((packed));
 
 /* Ethernet header size */
 #define ETHER_HDR_SIZE (sizeof(struct ethernet_hdr))
@@ -326,7 +326,7 @@ struct e802_hdr {
        u8              et_snap2;
        u8              et_snap3;
        u16             et_prot;                /* 802 protocol         */
-};
+} __attribute__((packed));
 
 /* 802 + SNAP + ethernet header size */
 #define E802_HDR_SIZE  (sizeof(struct e802_hdr))
@@ -340,7 +340,7 @@ struct vlan_ethernet_hdr {
        u16             vet_vlan_type;          /* PROT_VLAN            */
        u16             vet_tag;                /* TAG of VLAN          */
        u16             vet_type;               /* protocol type        */
-};
+} __attribute__((packed));
 
 /* VLAN Ethernet header size */
 #define VLAN_ETHER_HDR_SIZE    (sizeof(struct vlan_ethernet_hdr))
@@ -369,7 +369,7 @@ struct ip_hdr {
        u16             ip_sum;         /* checksum                     */
        struct in_addr  ip_src;         /* Source IP address            */
        struct in_addr  ip_dst;         /* Destination IP address       */
-};
+} __attribute__((packed));
 
 #define IP_OFFS                0x1fff /* ip offset *= 8 */
 #define IP_FLAGS       0xe000 /* first 3 bits */
@@ -397,7 +397,7 @@ struct ip_udp_hdr {
        u16             udp_dst;        /* UDP destination port         */
        u16             udp_len;        /* Length of UDP packet         */
        u16             udp_xsum;       /* Checksum                     */
-};
+} __attribute__((packed));
 
 #define IP_UDP_HDR_SIZE                (sizeof(struct ip_udp_hdr))
 #define UDP_HDR_SIZE           (IP_UDP_HDR_SIZE - IP_HDR_SIZE)
@@ -435,7 +435,7 @@ struct arp_hdr {
        u8              ar_tha[];       /* Target hardware address      */
        u8              ar_tpa[];       /* Target protocol address      */
 #endif /* 0 */
-};
+} __attribute__((packed));
 
 #define ARP_HDR_SIZE   (8+20)          /* Size assuming ethernet       */
 
@@ -470,7 +470,7 @@ struct icmp_hdr {
                } frag;
                u8 data[0];
        } un;
-};
+} __attribute__((packed));
 
 #define ICMP_HDR_SIZE          (sizeof(struct icmp_hdr))
 #define IP_ICMP_HDR_SIZE       (IP_HDR_SIZE + ICMP_HDR_SIZE)
index 4f2094bdf0b58f116d597c4ddbc47dfa610d4e4b..a0b1f12317f317ca808bf1e2e27ea2b307715135 100644 (file)
@@ -266,7 +266,8 @@ int phy_davicom_init(void);
 int phy_et1011c_init(void);
 int phy_lxt_init(void);
 int phy_marvell_init(void);
-int phy_micrel_init(void);
+int phy_micrel_ksz8xxx_init(void);
+int phy_micrel_ksz90x1_init(void);
 int phy_natsemi_init(void);
 int phy_realtek_init(void);
 int phy_smsc_init(void);
diff --git a/include/sed156x.h b/include/sed156x.h
deleted file mode 100644 (file)
index 4e24e01..0000000
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * (C) Copyright 2004
- *
- * Pantelis Antoniou <panto@intracom.gr>
- * Intracom S.A.
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-/* Video support for Epson SED156x chipset(s) */
-
-#ifndef SED156X_H
-#define SED156X_H
-
-void sed156x_init(void);
-void sed156x_clear(void);
-void sed156x_output_at(int x, int y, const char *str, int size);
-void sed156x_reverse_at(int x, int y, int size);
-void sed156x_sync(void);
-void sed156x_scroll(int dx, int dy);
-
-/* export display */
-extern const int sed156x_text_width;
-extern const int sed156x_text_height;
-
-#endif /* SED156X_H */
diff --git a/include/sm501.h b/include/sm501.h
deleted file mode 100644 (file)
index 34ce350..0000000
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * (C) Copyright 2002
- * Stäubli Faverges - <www.staubli.com>
- * Pierre AUBERT  p.aubert@staubli.com
- *
- * (C) Copyright 2005
- * Martin Krause TQ-Systems GmbH martin.krause@tqs.de
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-/*
- * Basic video support for SMI SM501 "Voyager" graphic controller
- */
-
-#ifndef _SM501_H_
-#define _SM501_H_
-
-#define PCI_VENDOR_SM          0x126f
-#define PCI_DEVICE_SM501       0x0501
-
-typedef struct {
-       unsigned int Index;
-       unsigned int Value;
-} SMI_REGS;
-
-/* Board specific functions                                                  */
-unsigned int board_video_init (void);
-void board_validate_screen (unsigned int base);
-const SMI_REGS *board_get_regs (void);
-int board_get_width (void);
-int board_get_height (void);
-unsigned int board_video_get_fb (void);
-
-#endif /* _SM501_H_ */
index fcb0a64e6143c550e101e0fd7597a56804e1ef32..567340ec5d4a250498c7c8bdf30675552ab5b831 100644 (file)
@@ -49,7 +49,7 @@ struct bootp_hdr {
        char            bp_sname[64];   /* Server host name             */
        char            bp_file[128];   /* Boot file name               */
        char            bp_vend[OPT_FIELD_SIZE]; /* Vendor information  */
-};
+} __attribute__((packed));
 
 #define BOOTP_HDR_SIZE sizeof(struct bootp_hdr)
 
index c4e96afa0621d783482f8f04865d6f576d5460bf..c55a5c1b04660ab4bf49a73d26a71f1005f2e2b3 100644 (file)
--- a/net/dns.h
+++ b/net/dns.h
@@ -29,7 +29,7 @@ struct header {
        uint16_t        nauth;          /* Authority PRs */
        uint16_t        nother;         /* Other PRs */
        unsigned char   data[1];        /* Data, variable length */
-};
+} __attribute__((packed));
 
 void dns_start(void);          /* Begin DNS */
 
index 6e678770fa9dc7dbdbe6039173622c39d28a0107..2268890ab54e7bd6ac0ef104212570f4b45b3402 100644 (file)
--- a/net/net.c
+++ b/net/net.c
@@ -489,7 +489,7 @@ restart:
                        cdp_start();
                        break;
 #endif
-#if defined(CONFIG_NETCONSOLE) && !(CONFIG_SPL_BUILD)
+#if defined(CONFIG_NETCONSOLE) && !defined(CONFIG_SPL_BUILD)
                case NETCONS:
                        nc_start();
                        break;
@@ -1258,7 +1258,7 @@ void net_process_received_packet(uchar *in_packet, int len)
                }
 #endif
 
-#if defined(CONFIG_NETCONSOLE) && !(CONFIG_SPL_BUILD)
+#if defined(CONFIG_NETCONSOLE) && !defined(CONFIG_SPL_BUILD)
                nc_input_packet((uchar *)ip + IP_UDP_HDR_SIZE,
                                src_ip,
                                ntohs(ip->udp_dst),
index ba9d0642cf231ab2ed14c162f2c7fb975f315574..4bf9bd817e5f6fa3df21ebfc14101cf1e30f66af 100644 (file)
  */
 static inline unsigned int seed_mac(void)
 {
-       unsigned char enetaddr[6];
+       unsigned char enetaddr[ARP_HLEN];
        unsigned int seed;
 
        /* get our mac */
-       eth_getenv_enetaddr("ethaddr", enetaddr);
+       memcpy(enetaddr, eth_get_ethaddr(), ARP_HLEN);
 
        seed = enetaddr[5];
        seed ^= enetaddr[4] << 8;
index 45da246aa1e1bfa6ad8d7b267ab0a41fde8e231d..70a1a6d554be81390ac330a473c33be88baa32f0 100644 (file)
--- a/net/nfs.h
+++ b/net/nfs.h
@@ -79,7 +79,7 @@ struct rpc_t {
                        uint32_t data[NFS_READ_SIZE];
                } reply;
        } u;
-};
+} __attribute__((packed));
 void nfs_start(void);  /* Begin NFS */
 
 
index 6a9c6bb82fb9bbfe2235a232b29569ce2b85c113..c38bceed3f6a2044a91b970ada43eb2ef95d5889 100644 (file)
@@ -51,7 +51,7 @@ struct sntp_pkt_t {
        unsigned long long originate_timestamp;
        unsigned long long receive_timestamp;
        unsigned long long transmit_timestamp;
-};
+} __attribute__((packed));
 
 void sntp_start(void); /* Begin SNTP */
 
index ced45ec1f1f4aa836670115a8be30bf2e507b291..61e1671068039f2be225e5a8b0af9164237fbaa9 100644 (file)
@@ -742,8 +742,8 @@ void tftp_start(enum proto_t protocol)
                        (net_ip.s_addr >> 16) & 0xFF,
                        (net_ip.s_addr >> 24) & 0xFF);
 
-               strncpy(tftp_filename, default_filename, MAX_LEN);
-               tftp_filename[MAX_LEN - 1] = 0;
+               strncpy(tftp_filename, default_filename, DEFAULT_NAME_LEN);
+               tftp_filename[DEFAULT_NAME_LEN - 1] = 0;
 
                printf("*** Warning: no boot file name; using '%s'\n",
                       tftp_filename);
index 3b5c17a9825dcf2f31a9a3479694e0dcfe16a6da..2dacf7961a1f884cd41577bc6d296aa5fe8dba1d 100644 (file)
@@ -157,9 +157,6 @@ CONFIG_BCH_CONST_PARAMS
 CONFIG_BCH_CONST_T
 CONFIG_BCM2835_GPIO
 CONFIG_BCM283X_MU_SERIAL
-CONFIG_BCM_SF2_ETH
-CONFIG_BCM_SF2_ETH_DEFAULT_PORT
-CONFIG_BCM_SF2_ETH_GMAC
 CONFIG_BIOSEMU
 CONFIG_BITBANGMII_MULTI
 CONFIG_BL1_OFFSET
@@ -5204,7 +5201,6 @@ CONFIG_VIDEO_MXS
 CONFIG_VIDEO_MXS_MODE_SYSTEM
 CONFIG_VIDEO_OMAP3
 CONFIG_VIDEO_ONBOARD
-CONFIG_VIDEO_SM501_PCI
 CONFIG_VIDEO_STD_TIMINGS
 CONFIG_VIDEO_SUNXI
 CONFIG_VIDEO_VCXK