]> git.ipfire.org Git - people/ms/u-boot.git/commitdiff
Converted all 85xx boards to use a common FSL I2C driver.
authorJon Loeliger <jdl@freescale.com>
Fri, 20 Oct 2006 20:50:15 +0000 (15:50 -0500)
committerJon Loeliger <jdl@freescale.com>
Fri, 20 Oct 2006 20:50:15 +0000 (15:50 -0500)
Introduced COFIG_FSL_I2C to select the common FSL I2C driver.
And removed hard i2c path from a few u-boot.lds scipts too.
Minor whitespace cleanups along the way.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
19 files changed:
board/mpc8560ads/u-boot.lds
board/sbc8560/u-boot.lds
board/stxgp3/u-boot.lds
cpu/mpc85xx/Makefile
cpu/mpc85xx/i2c.c [deleted file]
drivers/fsl_i2c.c
include/configs/MPC8540ADS.h
include/configs/MPC8540EVAL.h
include/configs/MPC8541CDS.h
include/configs/MPC8548CDS.h
include/configs/MPC8555CDS.h
include/configs/MPC8560ADS.h
include/configs/MPC8641HPCN.h
include/configs/PM854.h
include/configs/PM856.h
include/configs/SBC8540.h
include/configs/TQM85xx.h
include/configs/sbc8560.h
include/configs/stxgp3.h

index 8dcee1f1015af2b5e91c0966bbb96bc3dd74d190..726a153f98fb9e3fe3e09f8531f69370b8282fdd 100644 (file)
@@ -74,7 +74,6 @@ SECTIONS
     cpu/mpc85xx/cpu_init.o (.text)
     cpu/mpc85xx/cpu.o (.text)
     cpu/mpc85xx/speed.o (.text)
-    cpu/mpc85xx/i2c.o (.text)
     cpu/mpc85xx/spd_sdram.o (.text)
     common/dlmalloc.o (.text)
     lib_generic/crc32.o (.text)
index 48e19fe2a2212645caf8ba34b3f74bfc5f685e22..048ac26b4b75250a66c7b43e4de11012923e7079 100644 (file)
@@ -77,7 +77,6 @@ SECTIONS
     cpu/mpc85xx/cpu_init.o (.text)
     cpu/mpc85xx/cpu.o (.text)
     cpu/mpc85xx/speed.o (.text)
-    cpu/mpc85xx/i2c.o (.text)
     cpu/mpc85xx/spd_sdram.o (.text)
     common/dlmalloc.o (.text)
     lib_generic/crc32.o (.text)
index 3bc615021dc7506fde5497cc33df8cbe603fa04e..1bbf20ae29fb78e078a0497f6e366861cf3ba17b 100644 (file)
@@ -79,7 +79,6 @@ SECTIONS
     cpu/mpc85xx/cpu_init.o (.text)
     cpu/mpc85xx/cpu.o (.text)
     cpu/mpc85xx/speed.o (.text)
-    cpu/mpc85xx/i2c.o (.text)
     cpu/mpc85xx/spd_sdram.o (.text)
     common/dlmalloc.o (.text)
     lib_generic/crc32.o (.text)
index 7b32305dc4cef81ecf3bf59d4cd21b3a6e057061..ff67dcdd353f67f9af4365f61e8b605a85d2fe77 100644 (file)
@@ -30,7 +30,7 @@ LIB   = $(obj)lib$(CPU).a
 
 START  = start.o resetvec.o
 COBJS  = traps.o cpu.o cpu_init.o speed.o interrupts.o \
-         pci.o serial_scc.o commproc.o ether_fcc.o i2c.o spd_sdram.o
+         pci.o serial_scc.o commproc.o ether_fcc.o spd_sdram.o
 
 SRCS   := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/mpc85xx/i2c.c b/cpu/mpc85xx/i2c.c
deleted file mode 100644 (file)
index 32dcf5d..0000000
+++ /dev/null
@@ -1,265 +0,0 @@
-/*
- * (C) Copyright 2003,Motorola Inc.
- * Xianghua Xiao <x.xiao@motorola.com>
- * Adapted for Motorola 85xx chip.
- *
- * (C) Copyright 2003
- * Gleb Natapov <gnatapov@mrv.com>
- * Some bits are taken from linux driver writen by adrian@humboldt.co.uk
- *
- * Hardware I2C driver for MPC107 PCI bridge.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <asm/io.h>
-
-#ifdef CONFIG_HARD_I2C
-#include <i2c.h>
-
-#define TIMEOUT (CFG_HZ/4)
-
-#define I2C_Addr ((u8 *)(CFG_CCSRBAR + 0x3000))
-
-#define I2CADR  &I2C_Addr[0]
-#define I2CFDR  &I2C_Addr[4]
-#define I2CCCR  &I2C_Addr[8]
-#define I2CCSR  &I2C_Addr[12]
-#define I2CCDR  &I2C_Addr[16]
-#define I2CDFSRR &I2C_Addr[20]
-
-#define I2C_READ  1
-#define I2C_WRITE 0
-
-void
-i2c_init(int speed, int slaveadd)
-{
-       /* stop I2C controller */
-       writeb(0x0, I2CCCR);
-
-       /* set clock */
-       writeb(0x3f, I2CFDR);
-
-       /* set default filter */
-       writeb(0x10,I2CDFSRR);
-
-       /* write slave address */
-       writeb(slaveadd, I2CADR);
-
-       /* clear status register */
-       writeb(0x0, I2CCSR);
-
-       /* start I2C controller */
-       writeb(MPC85xx_I2CCR_MEN, I2CCCR);
-}
-
-static __inline__ int
-i2c_wait4bus (void)
-{
-       ulong timeval = get_timer (0);
-
-       while (readb(I2CCSR) & MPC85xx_I2CSR_MBB) {
-               if (get_timer (timeval) > TIMEOUT) {
-                       return -1;
-               }
-       }
-
-  return 0;
-}
-
-static __inline__ int
-i2c_wait (int write)
-{
-       u32 csr;
-       ulong timeval = get_timer (0);
-
-       do {
-               csr = readb(I2CCSR);
-
-               if (!(csr & MPC85xx_I2CSR_MIF))
-                       continue;
-
-               writeb(0x0, I2CCSR);
-
-               if (csr & MPC85xx_I2CSR_MAL) {
-                       debug("i2c_wait: MAL\n");
-                       return -1;
-               }
-
-               if (!(csr & MPC85xx_I2CSR_MCF)) {
-                       debug("i2c_wait: unfinished\n");
-                       return -1;
-               }
-
-               if (write == I2C_WRITE && (csr & MPC85xx_I2CSR_RXAK)) {
-                       debug("i2c_wait: No RXACK\n");
-                       return -1;
-               }
-
-               return 0;
-       } while (get_timer (timeval) < TIMEOUT);
-
-       debug("i2c_wait: timed out\n");
-       return -1;
-}
-
-static __inline__ int
-i2c_write_addr (u8 dev, u8 dir, int rsta)
-{
-       writeb(MPC85xx_I2CCR_MEN | MPC85xx_I2CCR_MSTA | MPC85xx_I2CCR_MTX |
-              (rsta?MPC85xx_I2CCR_RSTA:0),
-              I2CCCR);
-
-       writeb((dev << 1) | dir, I2CCDR);
-
-       if (i2c_wait (I2C_WRITE) < 0)
-               return 0;
-
-       return 1;
-}
-
-static __inline__ int
-__i2c_write (u8 *data, int length)
-{
-       int i;
-
-       writeb(MPC85xx_I2CCR_MEN | MPC85xx_I2CCR_MSTA | MPC85xx_I2CCR_MTX,
-              I2CCCR);
-
-       for (i=0; i < length; i++) {
-               writeb(data[i], I2CCDR);
-
-               if (i2c_wait (I2C_WRITE) < 0)
-                       break;
-       }
-
-       return i;
-}
-
-static __inline__ int
-__i2c_read (u8 *data, int length)
-{
-       int i;
-
-       writeb(MPC85xx_I2CCR_MEN | MPC85xx_I2CCR_MSTA |
-              ((length == 1) ? MPC85xx_I2CCR_TXAK : 0),
-              I2CCCR);
-
-       /* dummy read */
-       readb(I2CCDR);
-
-       for (i=0; i < length; i++) {
-               if (i2c_wait (I2C_READ) < 0)
-                       break;
-
-               /* Generate ack on last next to last byte */
-               if (i == length - 2)
-                       writeb(MPC85xx_I2CCR_MEN | MPC85xx_I2CCR_MSTA |
-                              MPC85xx_I2CCR_TXAK,
-                              I2CCCR);
-
-               /* Generate stop on last byte */
-               if (i == length - 1)
-                       writeb(MPC85xx_I2CCR_MEN | MPC85xx_I2CCR_TXAK, I2CCCR);
-
-               data[i] = readb(I2CCDR);
-       }
-
-       return i;
-}
-
-int
-i2c_read (u8 dev, uint addr, int alen, u8 *data, int length)
-{
-       int i = 0;
-       u8 *a = (u8*)&addr;
-
-       if (i2c_wait4bus () < 0)
-               goto exit;
-
-       if (i2c_write_addr (dev, I2C_WRITE, 0) == 0)
-               goto exit;
-
-       if (__i2c_write (&a[4 - alen], alen) != alen)
-               goto exit;
-
-       if (i2c_write_addr (dev, I2C_READ, 1) == 0)
-               goto exit;
-
-       i = __i2c_read (data, length);
-
- exit:
-       writeb(MPC85xx_I2CCR_MEN, I2CCCR);
-
-       return !(i == length);
-}
-
-int
-i2c_write (u8 dev, uint addr, int alen, u8 *data, int length)
-{
-       int i = 0;
-       u8 *a = (u8*)&addr;
-
-       if (i2c_wait4bus () < 0)
-               goto exit;
-
-       if (i2c_write_addr (dev, I2C_WRITE, 0) == 0)
-               goto exit;
-
-       if (__i2c_write (&a[4 - alen], alen) != alen)
-               goto exit;
-
-       i = __i2c_write (data, length);
-
- exit:
-       writeb(MPC85xx_I2CCR_MEN, I2CCCR);
-
-       return !(i == length);
-}
-
-int i2c_probe (uchar chip)
-{
-       int tmp;
-
-       /*
-        * Try to read the first location of the chip.  The underlying
-        * driver doesn't appear to support sending just the chip address
-        * and looking for an <ACK> back.
-        */
-       udelay(10000);
-       return i2c_read (chip, 0, 1, (uchar *)&tmp, 1);
-}
-
-uchar i2c_reg_read (uchar i2c_addr, uchar reg)
-{
-       uchar buf[1];
-
-       i2c_read (i2c_addr, reg, 1, buf, 1);
-
-       return (buf[0]);
-}
-
-void i2c_reg_write (uchar i2c_addr, uchar reg, uchar val)
-{
-       i2c_write (i2c_addr, reg, 1, &val, 1);
-}
-
-#endif /* CONFIG_HARD_I2C */
index af191915e37f780085bae62edc15813c30ba8784..65c27439e36a4c320dd7989ea06dc9b96ac0b1d7 100644 (file)
 
 #include <common.h>
 
+#ifdef CONFIG_FSL_I2C
 #ifdef CONFIG_HARD_I2C
 
 #include <command.h>
+#include <i2c.h>               /* Functional interface */
+
 #include <asm/io.h>
-#include <asm/fsl_i2c.h>
+#include <asm/fsl_i2c.h>       /* HW definitions */
 
 #define I2C_TIMEOUT    (CFG_HZ / 4)
 #define I2C            ((struct fsl_i2c *)(CFG_IMMR + CFG_I2C_OFFSET))
@@ -32,7 +35,7 @@ void
 i2c_init(int speed, int slaveadd)
 {
        /* stop I2C controller */
-       writeb(0x0 , &I2C->cr);
+       writeb(0x0, &I2C->cr);
 
        /* set clock */
        writeb(0x3f, &I2C->fdr);
@@ -53,7 +56,7 @@ i2c_init(int speed, int slaveadd)
 static __inline__ int
 i2c_wait4bus(void)
 {
-       ulong timeval = get_timer (0);
+       ulong timeval = get_timer(0);
 
        while (readb(&I2C->sr) & I2C_SR_MBB) {
                if (get_timer(timeval) > I2C_TIMEOUT) {
@@ -235,3 +238,4 @@ i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
 }
 
 #endif /* CONFIG_HARD_I2C */
+#endif /* CONFIG_FSL_I2C */
index 31ffbaf15b40cea42ab6d41a96d5a1b553a15c31..74a84f4e86ab259c8477c9cc4a064a20c09297dd 100644 (file)
 #define CFG_64BIT_VSPRINTF     1
 #define CFG_64BIT_STRTOUL      1
 
-/* I2C */
-#define  CONFIG_HARD_I2C               /* I2C with hardware support*/
+/*
+ * I2C
+ */
+#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
+#define CONFIG_HARD_I2C                /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address */
 #define CFG_I2C_SLAVE          0x7F
 #define CFG_I2C_NOPROBES        {0x69} /* Don't probe these addrs */
+#define CFG_I2C_OFFSET         0x3000
 
 /* RapidIO MMU */
 #define CFG_RIO_MEM_BASE       0xc0000000      /* base address */
index 1af923103ff49d87706db32b6842f9af16cf3669..418a3a38e683c1fbb1b047a6c5fa0aae38454f48 100644 (file)
 #define CFG_PROMPT_HUSH_PS2 "> "
 #endif
 
-/* I2C */
-#define  CONFIG_HARD_I2C               /* I2C with hardware support*/
+/*
+ * I2C
+ */
+#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
+#define CONFIG_HARD_I2C                /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged               */
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address  */
 #define CFG_I2C_SLAVE          0x7F
 #define CFG_I2C_NOPROBES        {0x69} /* Don't probe these addrs */
+#define CFG_I2C_OFFSET         0x3000
 
 /* General PCI */
 #define CFG_PCI_MEM_BASE       0x80000000
index 2b87f1bd6a982074d79e58752d4697f4fc99d3e8..db389cfe676255598816e957c01205055548491f 100644 (file)
@@ -320,13 +320,17 @@ extern unsigned long get_clock_freq(void);
 #define OF_TBCLK               (bd->bi_busfreq / 8)
 #define OF_STDOUT_PATH         "/soc8541@e0000000/serial@4600"
 
-/* I2C */
-#define CONFIG_HARD_I2C                        /* I2C with hardware support */
+/*
+ * I2C
+ */
+#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
+#define CONFIG_HARD_I2C                /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address */
 #define CFG_I2C_EEPROM_ADDR    0x57
 #define CFG_I2C_SLAVE          0x7F
 #define CFG_I2C_NOPROBES        {0x69} /* Don't probe these addrs */
+#define CFG_I2C_OFFSET         0x3000
 
 /*
  * General PCI
index 03ab976d118646bb81d3a581caf5e829c248640f..be8f93ffb8d78e7a6be0640362a90c68dc69e614 100644 (file)
@@ -326,13 +326,17 @@ extern unsigned long get_clock_freq(void);
 #define OF_TBCLK               (bd->bi_busfreq / 8)
 #define OF_STDOUT_PATH         "/soc8548@e0000000/serial@4600"
 
-/* I2C */
-#define CONFIG_HARD_I2C                        /* I2C with hardware support */
+/*
+ * I2C
+ */
+#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
+#define CONFIG_HARD_I2C                /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address */
 #define CFG_I2C_EEPROM_ADDR    0x57
 #define CFG_I2C_SLAVE          0x7F
 #define CFG_I2C_NOPROBES        {0x69} /* Don't probe these addrs */
+#define CFG_I2C_OFFSET         0x3000
 
 /*
  * General PCI
index 771a9d3b95084c6417c178f80533921313a02649..4c8b4e73f3b32f267a0df0df8b022e28d9d31c45 100644 (file)
@@ -320,13 +320,17 @@ extern unsigned long get_clock_freq(void);
 #define OF_TBCLK               (bd->bi_busfreq / 8)
 #define OF_STDOUT_PATH         "/soc8555@e0000000/serial@4600"
 
-/* I2C */
-#define CONFIG_HARD_I2C                        /* I2C with hardware support */
+/*
+ * I2C
+ */
+#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
+#define CONFIG_HARD_I2C                /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address */
 #define CFG_I2C_EEPROM_ADDR    0x57
 #define CFG_I2C_SLAVE          0x7F
 #define CFG_I2C_NOPROBES        {0x69} /* Don't probe these addrs */
+#define CFG_I2C_OFFSET         0x3000
 
 /*
  * General PCI
index 1c684f2fd105738cc47a056e72cde82dba815f76..835bf5cb64e6a27613c396e044403031a6d4a9db 100644 (file)
 #define OF_TBCLK               (bd->bi_busfreq / 8)
 #define OF_STDOUT_PATH         "/soc8560@e0000000/serial@4500"
 
-/* I2C */
-#define  CONFIG_HARD_I2C               /* I2C with hardware support*/
+/*
+ * I2C
+ */
+#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
+#define CONFIG_HARD_I2C                /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address */
 #define CFG_I2C_SLAVE          0x7F
 #define CFG_I2C_NOPROBES        {0x69} /* Don't probe these addrs */
+#define CFG_I2C_OFFSET         0x3000
 
 /* RapidIO MMU */
 #define CFG_RIO_MEM_BASE       0xc0000000      /* base address */
index 81bb7cf134d3288b5da8918f327e248b9b4f8623..246ac7f316fb4e2ad13e3ebbaeb2eeb53b1650ee 100644 (file)
 /*
  * I2C
  */
-#define  CONFIG_HARD_I2C               /* I2C with hardware support*/
+#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
+#define CONFIG_HARD_I2C                /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address */
 #define CFG_I2C_SLAVE          0x7F
-#define CFG_I2C_OFFSET         0x3100
 #define CFG_I2C_NOPROBES        {0x69} /* Don't probe these addrs */
+#define CFG_I2C_OFFSET         0x3100
 
 /*
  * RapidIO MMU
index da011867717078cd02d61359576724ab3da3f613..4fb54402b1b6d5c051ecd2bc0ad8918ee55cac8f 100644 (file)
 #define CFG_PROMPT_HUSH_PS2 "> "
 #endif
 
-/* I2C */
-#define         CONFIG_HARD_I2C                /* I2C with hardware support*/
+/*
+ * I2C
+ */
+#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
+#define CONFIG_HARD_I2C                /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address */
 #define CFG_I2C_SLAVE          0x7F
 #define CFG_I2C_NOPROBES       {0x69}  /* Don't probe these addrs */
+#define CFG_I2C_OFFSET         0x3000
 
 /*
  * EEPROM configuration
index 4d834878ee03a6abe395544c5574dbbb1ea8fa0e..87ab93487354dc11e78c117d992429dd218d027b 100644 (file)
 #define CFG_PROMPT_HUSH_PS2 "> "
 #endif
 
-/* I2C */
-#define  CONFIG_HARD_I2C               /* I2C with hardware support*/
+/*
+ * I2C
+ */
+#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
+#define CONFIG_HARD_I2C                /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address */
 #define CFG_I2C_SLAVE          0x7F
 #define CFG_I2C_NOPROBES        {0x69} /* Don't probe these addrs */
+#define CFG_I2C_OFFSET         0x3000
 
 /*
  * EEPROM configuration
index 0451b208197006d8dd0f574d939f8268517c6f65..f8e3397a3f069cd523ca3764b309b07218237974 100644 (file)
 #define CFG_PROMPT_HUSH_PS2 "> "
 #endif
 
-/* I2C */
-#define         CONFIG_HARD_I2C                /* I2C with hardware support*/
+/*
+ * I2C
+ */
+#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
+#define CONFIG_HARD_I2C                /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address  */
 #define CFG_I2C_SLAVE          0x7F
 #define CFG_I2C_NOPROBES       {0x69}  /* Don't probe these addrs */
+#define CFG_I2C_OFFSET         0x3000
 
 #define CFG_PCI_MEM_BASE       0xC0000000
 #define CFG_PCI_MEM_PHYS       0xC0000000
index bc3b9aa1d0a3483230eaba5d375d3b68884c3c7a..cce4624904824b2016dbceeeffe97c2729ad2d06 100644 (file)
 #define CFG_PROMPT_HUSH_PS2 "> "
 #endif
 
-/* I2C */
+
+/*
+ * I2C
+ */
+#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
 #define CONFIG_HARD_I2C                        /* I2C with hardware support    */
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged               */
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address  */
 #define CFG_I2C_SLAVE          0x7F
 #define CFG_I2C_NOPROBES       {0x48}  /* Don't probe these addrs      */
+#define CFG_I2C_OFFSET         0x3000
 
 /* I2C RTC */
 #define CONFIG_RTC_DS1337              /* Use ds1337 rtc via i2c       */
index 5a434dc767b7937f53cc17c020263358ea7ee76e..6e4fdb2498e3bb8d8a21082a6b48b1709f0b14c9 100644 (file)
 #define CFG_PROMPT_HUSH_PS2 "> "
 #endif
 
-/* I2C */
-#define         CONFIG_HARD_I2C                /* I2C with hardware support*/
+/*
+ * I2C
+ */
+#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
+#define CONFIG_HARD_I2C                /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address  */
 #define CFG_I2C_SLAVE          0x7F
 #define CFG_I2C_NOPROBES       {0x69}  /* Don't probe these addrs */
+#define CFG_I2C_OFFSET         0x3000
 
 #define CFG_PCI_MEM_BASE       0xC0000000
 #define CFG_PCI_MEM_PHYS       0xC0000000
index e218597db01e4280b0caabfa53de5acb90c0b992..625cf20144f97b0e8d01912c65b9bffdf23f0a61 100644 (file)
 #define CFG_PROMPT_HUSH_PS2 "> "
 #endif
 
-/* I2C */
-#define  CONFIG_HARD_I2C               /* I2C with hardware support*/
+/*
+ * I2C
+ */
+#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
+#define CONFIG_HARD_I2C                /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address  */
 #define CFG_I2C_SLAVE          0x7F
 /* I did the 'if 0' so we could keep the syntax above if ever needed. */
 #undef CFG_I2C_NOPROBES
 #endif
+#define CFG_I2C_OFFSET         0x3000
 
 /* RapdIO Map configuration, mapped 1:1.
 */