Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx

diff --git a/Makefile b/Makefile
index f80e5113ca00f8bcab0c8225515629e4dc211d85..38ade50104794d42aed379dfdd94c9791f82fcd8 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1232,9 +1232,11 @@ G2000_config:    unconfig
        @$(MKCONFIG) $(@:_config=) ppc ppc4xx g2000
 
 hcu4_config:   unconfig
+       @mkdir -p $(obj)board/netstal/common
        @$(MKCONFIG) $(@:_config=) ppc ppc4xx hcu4 netstal
 
 hcu5_config:   unconfig
+       @mkdir -p $(obj)board/netstal/common
        @$(MKCONFIG) $(@:_config=) ppc ppc4xx hcu5 netstal
 
 HH405_config:  unconfig

diff --git a/board/netstal/hcu4/Makefile b/board/netstal/hcu4/Makefile
index b13d9d446fb923b7540c6835ff64ef036445bd13..3d1d65d35ea9aa240fcf390fada809a15fd4fe05 100644 (file)
--- a/board/netstal/hcu4/Makefile
+++ b/board/netstal/hcu4/Makefile
@@ -1,5 +1,5 @@
 #
-# (C) Copyright 2007 Netstal Maschinen AG
+# (C) Copyright 2007-2008 Netstal Maschinen AG
 # Niklaus Giger (ng@netstal.com)
 #
 # This program is free software; you can redistribute it and/or
@@ -22,18 +22,14 @@ include $(TOPDIR)/config.mk
 
 LIB    = $(obj)lib$(BOARD).a
 
-vpath fixed_sdram.c ../common
-vpath hcu_flash.c ../common
-vpath nm_bsp.c ../common
-
 # NOBJS : Netstal common objects
-NOBJS  = ../common/fixed_sdram.o ../common/hcu_flash.o ../common/nm_bsp.o
+NOBJS  = fixed_sdram.o hcu_flash.o nm_bsp.o
 COBJS  = $(BOARD).o
 SOBJS  =
 
-SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(NOBJS:.o=.c)
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(addprefix ../common/,$(NOBJS:.o=.c))
 OBJS   := $(addprefix $(obj),$(COBJS))
-NOBJS  := $(addprefix $(obj),$(NOBJS))
+NOBJS  := $(addprefix $(obj)../common/,$(NOBJS))
 SOBJS  := $(addprefix $(obj),$(SOBJS))
 
 $(LIB):        $(OBJS) $(SOBJS) $(NOBJS)

diff --git a/board/netstal/hcu5/Makefile b/board/netstal/hcu5/Makefile
index 9f248a441d7074bf5a25ecb3aa98ba3f4f2ae5f5..349c653e7f39d534a78d0038a6d2b9f5453c8a21 100644 (file)
--- a/board/netstal/hcu5/Makefile
+++ b/board/netstal/hcu5/Makefile
@@ -1,5 +1,5 @@
 #
-# (C) Copyright 2007 Netstal Maschinen AG
+# (C) Copyright 2007-2008 Netstal Maschinen AG
 # Niklaus Giger (ng@netstal.com)
 #
 # This program is free software; you can redistribute it and/or
@@ -22,17 +22,15 @@ include $(TOPDIR)/config.mk
 
 LIB    = $(obj)lib$(BOARD).a
 
-vpath hcu_flash.c ../common
-vpath nm_bsp.c ../common
 
 # NOBJS : Netstal common objects
-NOBJS  = ../common/hcu_flash.o ../common/nm_bsp.o
+NOBJS  = hcu_flash.o nm_bsp.o
 COBJS  = $(BOARD).o sdram.o
 SOBJS  = init.o
 
-SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(NOBJS:.o=.c)
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(addprefix ../common/,$(NOBJS:.o=.c))
 OBJS   := $(addprefix $(obj),$(COBJS))
-NOBJS  := $(addprefix $(obj),$(NOBJS))
+NOBJS  := $(addprefix $(obj)../common/,$(NOBJS))
 SOBJS  := $(addprefix $(obj),$(SOBJS))
 
 $(LIB):        $(OBJS) $(SOBJS) $(NOBJS)

diff --git a/board/pcs440ep/pcs440ep.c b/board/pcs440ep/pcs440ep.c
index 90e99d3dca88997256219823c58777cb1c533829..96adbc915d397af073d66f35ffc461713c8ae719 100644 (file)
--- a/board/pcs440ep/pcs440ep.c
+++ b/board/pcs440ep/pcs440ep.c
@@ -175,7 +175,7 @@ int board_early_init_f(void)
         *-------------------------------------------------------------------*/
        mfsdr(sdr_pci0, reg);
        mtsdr(sdr_pci0, 0x80000000 | reg);      /* PCI arbiter enabled */
-       mtsdr(sdr_pfc0, 0x00000100);    /* Pin function: enable GPIO49-63 */
+       mtsdr(sdr_pfc0, 0x00000000);    /* Pin function: enable GPIO49-63 */
        mtsdr(sdr_pfc1, 0x00048000);    /* Pin function: UART0 has 4 pins, select IRQ5 */
 
        return 0;

diff --git a/cpu/ppc4xx/denali_spd_ddr2.c b/cpu/ppc4xx/denali_spd_ddr2.c
index 825bc2139c75bd05ff42aabff2e684f93d9757f9..60f89c97fc804fdb2e03ff4f320b0bd3b8a9c47e 100644 (file)
--- a/cpu/ppc4xx/denali_spd_ddr2.c
+++ b/cpu/ppc4xx/denali_spd_ddr2.c
@@ -3,7 +3,7 @@
  * This SPD SDRAM detection code supports AMCC PPC44x CPUs with a Denali-core
  * DDR2 controller, specifically the 440EPx/GRx.
  *
- * (C) Copyright 2007
+ * (C) Copyright 2007-2008
  * Larry Johnson, lrj@acm.org.
  *
  * Based primarily on cpu/ppc4xx/4xx_spd_ddr2.c, which is...
@@ -77,10 +77,10 @@
  * memory.
  *
  * If at some time this restriction doesn't apply anymore, just define
- * CFG_ENABLE_SDRAM_CACHE in the board config file and this code should setup
+ * CONFIG_4xx_DCACHE in the board config file and this code should setup
  * everything correctly.
  */
-#if defined(CFG_ENABLE_SDRAM_CACHE)
+#if defined(CONFIG_4xx_DCACHE)
 #define MY_TLB_WORD2_I_ENABLE  0                       /* enable caching on SDRAM */
 #else
 #define MY_TLB_WORD2_I_ENABLE  TLB_WORD2_I_ENABLE      /* disable caching on SDRAM */

diff --git a/cpu/ppc4xx/ndfc.c b/cpu/ppc4xx/ndfc.c
index ec1b38cffa35177a18959c502e9a6e348bbd0a97..9e2229daf998d388107cee21d686215f2deaacf2 100644 (file)
--- a/cpu/ppc4xx/ndfc.c
+++ b/cpu/ppc4xx/ndfc.c
@@ -121,8 +121,8 @@ static int ndfc_calculate_ecc(struct mtd_info *mtdinfo,
 
        /* The NDFC uses Smart Media (SMC) bytes order
         */
-       ecc_code[0] = p[2];
-       ecc_code[1] = p[1];
+       ecc_code[0] = p[1];
+       ecc_code[1] = p[2];
        ecc_code[2] = p[3];
 
        return 0;

diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index c29c87bfd041aa7c4e4218e7aec0098202d26bdd..d8df67b0da2f1f69d48f0f84f3ef6b4ef36864e6 100644 (file)
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -110,6 +110,10 @@
 # endif
 #endif /* CFG_INIT_DCACHE_CS */
 
+#if (defined(CFG_INIT_RAM_DCACHE) && (CFG_INIT_RAM_END > (4 << 10)))
+#error Only 4k of init-ram is supported - please adjust CFG_INIT_RAM_END!
+#endif
+
 #define function_prolog(func_name)     .text; \
                                        .align 2; \
                                        .globl func_name; \

diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h
index d66f4bd449b5498b388c181cc1ce6aa20901003c..07fc23e5e73724780c21bbe9c6e580287e145704 100644 (file)
--- a/include/configs/pcs440ep.h
+++ b/include/configs/pcs440ep.h
@@ -66,7 +66,7 @@
  *----------------------------------------------------------------------*/
 #define CFG_INIT_RAM_DCACHE    1               /* d-cache as init ram  */
 #define CFG_INIT_RAM_ADDR      0x70000000              /* DCache       */
-#define CFG_INIT_RAM_END       (8 << 10)
+#define CFG_INIT_RAM_END       (4 << 10)
 #define CFG_GBL_DATA_SIZE      256                     /* num bytes initial data*/
 #define CFG_GBL_DATA_OFFSET    (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 #define CFG_INIT_SP_OFFSET     CFG_GBL_DATA_OFFSET

diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h
index a8eeff989c347fe5972350af349a3580755e89a4..4c86bc53cf8253c32b30d71776d9273a08b1183f 100644 (file)
--- a/include/configs/yosemite.h
+++ b/include/configs/yosemite.h
@@ -75,7 +75,7 @@
  *----------------------------------------------------------------------*/
 #define CFG_INIT_RAM_DCACHE    1               /* d-cache as init ram  */
 #define CFG_INIT_RAM_ADDR      0x70000000              /* DCache       */
-#define CFG_INIT_RAM_END       (8 << 10)
+#define CFG_INIT_RAM_END       (4 << 10)
 #define CFG_GBL_DATA_SIZE      256                     /* num bytes initial data*/
 #define CFG_GBL_DATA_OFFSET    (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 #define CFG_INIT_SP_OFFSET     CFG_GBL_DATA_OFFSET