board/bsc9131rdb: Update IFC timings for NAND flash

Current IFC timings for NAND flash are not able to support existing
K9F1G08U0B and new K9F1G08U0D flash.

so Update the timings to support both.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>

diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index 948394eddddbe7041c6da447e58449eb329d2fe2..1d06c509b83fa46dde8ca747be6fcec801a83c17 100644 (file)
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -181,18 +181,18 @@ extern unsigned long get_sdram_size(void);
                                | CSOR_NAND_PB(64))     /*Pages Per Block = 64*/
 
 /* NAND Flash Timing Params */
-#define CONFIG_SYS_NAND_FTIM0          (FTIM0_NAND_TCCST(0x08)  \
-                                       | FTIM0_NAND_TWP(0x06)   \
-                                       | FTIM0_NAND_TWCHT(0x03) \
+#define CONFIG_SYS_NAND_FTIM0          (FTIM0_NAND_TCCST(0x03)  \
+                                       | FTIM0_NAND_TWP(0x05)   \
+                                       | FTIM0_NAND_TWCHT(0x02) \
                                        | FTIM0_NAND_TWH(0x04))
-#define CONFIG_SYS_NAND_FTIM1          (FTIM1_NAND_TADLE(0x18) \
-                                       | FTIM1_NAND_TWBE(0x23) \
-                                       | FTIM1_NAND_TRR(0x08)  \
+#define CONFIG_SYS_NAND_FTIM1          (FTIM1_NAND_TADLE(0x1C) \
+                                       | FTIM1_NAND_TWBE(0x1E) \
+                                       | FTIM1_NAND_TRR(0x07)  \
                                        | FTIM1_NAND_TRP(0x05))
 #define CONFIG_SYS_NAND_FTIM2          (FTIM2_NAND_TRAD(0x08)  \
                                        | FTIM2_NAND_TREH(0x04) \
-                                       | FTIM2_NAND_TWHRE(0x3f))
-#define CONFIG_SYS_NAND_FTIM3          FTIM3_NAND_TWW(0x22)
+                                       | FTIM2_NAND_TWHRE(0x11))
+#define CONFIG_SYS_NAND_FTIM3          FTIM3_NAND_TWW(0x04)
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 #define CONFIG_SYS_MAX_NAND_DEVICE     1