spi: tegra: Use GENMASK

Replace numeric mask hexcodes with GENMASK macro
in tegra*.c

Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tom Warren <twarren@nvidia.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>

diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c
index d9edd118a9a9287fd8584a216f91a1140baee908..98a062c63d4a8c6479eec6a8674a56b3d259d5fe 100644 (file)
--- a/drivers/spi/tegra114_spi.c
+++ b/drivers/spi/tegra114_spi.c
@@ -35,9 +35,9 @@ DECLARE_GLOBAL_DATA_PTR;
 /* COMMAND1 */
 #define SPI_CMD1_GO                    BIT(31)
 #define SPI_CMD1_M_S                   BIT(30)
-#define SPI_CMD1_MODE_MASK             0x3
+#define SPI_CMD1_MODE_MASK             GENMASK(1, 0)
 #define SPI_CMD1_MODE_SHIFT            28
-#define SPI_CMD1_CS_SEL_MASK           0x3
+#define SPI_CMD1_CS_SEL_MASK           GENMASK(1, 0)
 #define SPI_CMD1_CS_SEL_SHIFT          26
 #define SPI_CMD1_CS_POL_INACTIVE3      BIT(25)
 #define SPI_CMD1_CS_POL_INACTIVE2      BIT(24)
@@ -45,7 +45,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SPI_CMD1_CS_POL_INACTIVE0      BIT(22)
 #define SPI_CMD1_CS_SW_HW              BIT(21)
 #define SPI_CMD1_CS_SW_VAL             BIT(20)
-#define SPI_CMD1_IDLE_SDA_MASK         0x3
+#define SPI_CMD1_IDLE_SDA_MASK         GENMASK(1, 0)
 #define SPI_CMD1_IDLE_SDA_SHIFT                18
 #define SPI_CMD1_BIDIR                 BIT(17)
 #define SPI_CMD1_LSBI_FE               BIT(16)
@@ -55,14 +55,14 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SPI_CMD1_RX_EN                 BIT(12)
 #define SPI_CMD1_TX_EN                 BIT(11)
 #define SPI_CMD1_PACKED                        BIT(5)
-#define SPI_CMD1_BIT_LEN_MASK          0x1F
+#define SPI_CMD1_BIT_LEN_MASK          GENMASK(4, 0)
 #define SPI_CMD1_BIT_LEN_SHIFT         0
 
 /* COMMAND2 */
 #define SPI_CMD2_TX_CLK_TAP_DELAY      BIT(6)
-#define SPI_CMD2_TX_CLK_TAP_DELAY_MASK (0x3F << 6)
+#define SPI_CMD2_TX_CLK_TAP_DELAY_MASK GENMASK(11, 6)
 #define SPI_CMD2_RX_CLK_TAP_DELAY      BIT(0)
-#define SPI_CMD2_RX_CLK_TAP_DELAY_MASK (0x3F << 0)
+#define SPI_CMD2_RX_CLK_TAP_DELAY_MASK GENMASK(5, 0)
 
 /* TRANSFER STATUS */
 #define SPI_XFER_STS_RDY               BIT(30)

diff --git a/drivers/spi/tegra20_sflash.c b/drivers/spi/tegra20_sflash.c
index 5dc196b0d10f662a5c5d034ea040dc3571b9df22..6888a96139a797ecb8482d22be17c017180ce56e 100644 (file)
--- a/drivers/spi/tegra20_sflash.c
+++ b/drivers/spi/tegra20_sflash.c
@@ -37,7 +37,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SPI_CMD_CS1_EN                 BIT(6)
 #define SPI_CMD_CS0_EN                 BIT(5)
 #define SPI_CMD_BIT_LENGTH             BIT(4)
-#define SPI_CMD_BIT_LENGTH_MASK                0x0000001F
+#define SPI_CMD_BIT_LENGTH_MASK                GENMASK(4, 0)
 
 #define SPI_STAT_BSY                   BIT(31)
 #define SPI_STAT_RDY                   BIT(30)

diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c
index d1abac20a119f32bd90b2d0a4c0a6559021680cd..43054f1a644d493c2ce17f7cfbd12bcf588ba9fb 100644 (file)
--- a/drivers/spi/tegra20_slink.c
+++ b/drivers/spi/tegra20_slink.c
@@ -46,13 +46,13 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SLINK_CMD_CS_VAL               BIT(12)
 #define SLINK_CMD_CS_SOFT              BIT(11)
 #define SLINK_CMD_BIT_LENGTH           BIT(4)
-#define SLINK_CMD_BIT_LENGTH_MASK      0x0000001F
+#define SLINK_CMD_BIT_LENGTH_MASK      GENMASK(4, 0)
 /* COMMAND2 */
 #define SLINK_CMD2_TXEN                        BIT(30)
 #define SLINK_CMD2_RXEN                        BIT(31)
 #define SLINK_CMD2_SS_EN               BIT(18)
 #define SLINK_CMD2_SS_EN_SHIFT         18
-#define SLINK_CMD2_SS_EN_MASK          0x000C0000
+#define SLINK_CMD2_SS_EN_MASK          GENMASK(19, 18)
 #define SLINK_CMD2_CS_ACTIVE_BETWEEN   BIT(17)
 /* STATUS */
 #define SLINK_STAT_BSY                 BIT(31)