]> git.ipfire.org Git - people/ms/u-boot.git/commitdiff
powerpc/p3060: remove all references to RCW bits EC1_EXT, EC2_EXT, and EC3
authorTimur Tabi <timur@freescale.com>
Thu, 13 Oct 2011 20:33:20 +0000 (15:33 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Fri, 14 Oct 2011 04:38:10 +0000 (23:38 -0500)
The EC1_EXT, EC2_EXT, and EC3 bits in the RCW don't officially exist on the
P3060 and should always be set to zero.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/cpu/mpc85xx/p3060_serdes.c
arch/powerpc/include/asm/immap_85xx.h
drivers/net/fm/p3060.c

index 6387276babd7a779423490824117269d9cf87fdf..e720dcf6bd324233cd8bc6ff1c0d40e1d2457182 100644 (file)
@@ -83,8 +83,6 @@ void soc_serdes_init(void)
        ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
        u32 devdisr2 = in_be32(&gur->devdisr2);
        u32 rcwsr11 = in_be32(&gur->rcwsr[11]);
-       u32 rcwsr13 = in_be32(&gur->rcwsr[13]);
-       u32 ec1_ext, ec2_ext;
 
        /* NOTE: Leave FM1-1,FM1-2 alone for MDIO access */
 
@@ -116,23 +114,5 @@ void soc_serdes_init(void)
                devdisr2 &= ~FSL_CORENET_DEVDISR2_DTSEC2_1;
        }
 
-       ec1_ext = rcwsr13 & FSL_CORENET_RCWSR13_EC1_EXT;
-       if (ec1_ext) {
-               if ((ec1_ext == FSL_CORENET_RCWSR13_EC1_EXT_FM1_DTSEC4_RGMII) ||
-                       (ec1_ext == FSL_CORENET_RCWSR13_EC1_EXT_FM1_DTSEC4_MII))
-                       devdisr2 &= ~FSL_CORENET_DEVDISR2_DTSEC1_4;
-       }
-
-       ec2_ext = rcwsr13 & FSL_CORENET_RCWSR13_EC2_EXT;
-       if (ec2_ext) {
-               if ((ec2_ext == FSL_CORENET_RCWSR13_EC2_EXT_FM2_DTSEC4_RGMII) ||
-                       (ec2_ext == FSL_CORENET_RCWSR13_EC2_EXT_FM2_DTSEC4_MII))
-                       devdisr2 &= ~FSL_CORENET_DEVDISR2_DTSEC2_4;
-       }
-
-       if ((rcwsr13 & FSL_CORENET_RCWSR13_EC3) ==
-               FSL_CORENET_RCWSR13_EC3_FM2_DTSEC4_MII)
-               devdisr2 &= ~FSL_CORENET_DEVDISR2_DTSEC2_4;
-
        out_be32(&gur->devdisr2, devdisr2);
 }
index a29fe35cd30bc519493cc5cee3013f31f821d519..1bbf9867af53849edcab25e0db8d547d6f77c579 100644 (file)
@@ -1708,16 +1708,6 @@ typedef struct ccsr_gur {
 #define FSL_CORENET_RCWSR11_EC2_FM1_DTSEC2             0x00080000
 #define FSL_CORENET_RCWSR11_EC2_USB2                   0x00100000
 #endif
-#if defined(CONFIG_PPC_P3060)
-#define FSL_CORENET_RCWSR13_EC1_EXT                    0x1c000000
-#define FSL_CORENET_RCWSR13_EC1_EXT_FM1_DTSEC4_RGMII   0x04000000
-#define FSL_CORENET_RCWSR13_EC1_EXT_FM1_DTSEC4_MII     0x08000000
-#define FSL_CORENET_RCWSR13_EC2_EXT                    0x01c00000
-#define FSL_CORENET_RCWSR13_EC2_EXT_FM2_DTSEC4_RGMII   0x00400000
-#define FSL_CORENET_RCWSR13_EC2_EXT_FM2_DTSEC4_MII     0x00800000
-#define FSL_CORENET_RCWSR13_EC3                                0x00380000
-#define FSL_CORENET_RCWSR13_EC3_FM2_DTSEC4_MII         0x00100000
-#endif
 #if defined(CONFIG_PPC_P2040) || defined(CONFIG_PPC_P2041) \
        || defined(CONFIG_PPC_P3041) || defined(CONFIG_PPC_P5020)
 #define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC4_RGMII       0x00000000
index b25bca7cc374a212e10ebcc4b90b894892c36f0b..176e1d292cfe21bca0b52854ab6ec8781752dfc1 100644 (file)
@@ -52,7 +52,6 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
 {
        ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
        u32 rcwsr11 = in_be32(&gur->rcwsr[11]);
-       u32 rcwsr13 = in_be32(&gur->rcwsr[13]);
 
        if (is_device_disabled(port))
                return PHY_INTERFACE_MODE_NONE;
@@ -70,22 +69,6 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
                FSL_CORENET_RCWSR11_EC2_FM2_DTSEC1))
                return PHY_INTERFACE_MODE_RGMII;
 
-       if ((port == FM1_DTSEC4) && ((rcwsr13 & FSL_CORENET_RCWSR13_EC1_EXT) ==
-               FSL_CORENET_RCWSR13_EC1_EXT_FM1_DTSEC4_RGMII))
-               return PHY_INTERFACE_MODE_RGMII;
-
-       if ((port == FM1_DTSEC4) && ((rcwsr13 & FSL_CORENET_RCWSR13_EC1_EXT) ==
-               FSL_CORENET_RCWSR13_EC1_EXT_FM1_DTSEC4_MII))
-               return PHY_INTERFACE_MODE_MII;
-
-       if ((port == FM2_DTSEC4) && ((rcwsr13 & FSL_CORENET_RCWSR13_EC2_EXT) ==
-               FSL_CORENET_RCWSR13_EC2_EXT_FM2_DTSEC4_RGMII))
-               return PHY_INTERFACE_MODE_RGMII;
-
-       if ((port == FM2_DTSEC4) && ((rcwsr13 & FSL_CORENET_RCWSR13_EC2_EXT) ==
-               FSL_CORENET_RCWSR13_EC2_EXT_FM2_DTSEC4_MII))
-               return PHY_INTERFACE_MODE_MII;
-
        switch (port) {
        case FM1_DTSEC1:
        case FM1_DTSEC2: