]> git.ipfire.org Git - people/ms/u-boot.git/commitdiff
powerpc: T1024RDB: Remove macro CONFIG_T1024RDB
authorYork Sun <york.sun@nxp.com>
Wed, 28 Dec 2016 16:43:34 +0000 (08:43 -0800)
committerTom Rini <trini@konsulko.com>
Thu, 5 Jan 2017 00:40:24 +0000 (19:40 -0500)
Use TARGET_T1024RDB from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Get missing hunk in board/freescale/t102xrdb/ddr.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
board/freescale/t102xrdb/Makefile
board/freescale/t102xrdb/ddr.c
board/freescale/t102xrdb/eth_t102xrdb.c
board/freescale/t102xrdb/t102xrdb.c
configs/T1024RDB_NAND_defconfig
configs/T1024RDB_SDCARD_defconfig
configs/T1024RDB_SECURE_BOOT_defconfig
configs/T1024RDB_SPIFLASH_defconfig
configs/T1024RDB_defconfig
include/configs/T102xRDB.h
scripts/config_whitelist.txt

index 64528656aca8bd821093ebec25c93370682532f7..ddeb44f36e221e708e675ca41fa59947432b66e7 100644 (file)
@@ -8,7 +8,7 @@ ifdef CONFIG_SPL_BUILD
 obj-y  += spl.o
 else
 obj-y   += t102xrdb.o
-obj-$(CONFIG_T1024RDB)   += cpld.o
+obj-$(CONFIG_TARGET_T1024RDB)   += cpld.o
 obj-y   += eth_t102xrdb.o
 obj-$(CONFIG_PCI)       += pci.o
 endif
index c09199fb0366dfdb61f10978f9751be8d76eb098..e66657869c206706664af8a81834e459db8fe4a3 100644 (file)
@@ -140,7 +140,7 @@ found:
        popts->wrlvl_ctl_2 = 0x07070606;
        popts->half_strength_driver_enable = 1;
        popts->cpo_sample = 0x43;
-#elif defined(CONFIG_T1024RDB)
+#elif defined(CONFIG_TARGET_T1024RDB)
        /* optimize cpo for erratum A-009942 */
        popts->cpo_sample = 0x52;
 #endif
index dadfaf173915898256b41aac6cbd49f4c344c7d0..c06d1b8e0ea4fc77884614e909ddbbc4cc104d11 100644 (file)
@@ -58,7 +58,7 @@ int board_eth_init(bd_t *bis)
        fm_info_set_phy_address(FM1_DTSEC4, RGMII_PHY1_ADDR);
 
        switch (srds_s1) {
-#ifdef CONFIG_T1024RDB
+#ifdef CONFIG_TARGET_T1024RDB
        case 0x95:
                /* set the on-board RGMII2  PHY */
                fm_info_set_phy_address(FM1_DTSEC3, RGMII_PHY2_ADDR);
@@ -94,7 +94,7 @@ int board_eth_init(bd_t *bis)
                case PHY_INTERFACE_MODE_SGMII:
 #if defined(CONFIG_TARGET_T1023RDB)
                        dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME);
-#elif defined(CONFIG_T1024RDB)
+#elif defined(CONFIG_TARGET_T1024RDB)
                        dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME);
 #endif
                        fm_info_set_mdio(i, dev);
@@ -128,7 +128,7 @@ int board_eth_init(bd_t *bis)
 void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
                              enum fm_port port, int offset)
 {
-#if defined(CONFIG_T1024RDB)
+#if defined(CONFIG_TARGET_T1024RDB)
        if (((fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII_2500) ||
             (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII)) &&
                        (port == FM1_DTSEC3)) {
index 317472619f350ba60a30ab37b23a8b70e06435f2..56f7c1a90992e83529a12911c4668d2f130f5b75 100644 (file)
@@ -17,7 +17,7 @@
 #include <asm/fsl_liodn.h>
 #include <fm_eth.h>
 #include "t102xrdb.h"
-#ifdef CONFIG_T1024RDB
+#ifdef CONFIG_TARGET_T1024RDB
 #include "cpld.h"
 #elif defined(CONFIG_TARGET_T1023RDB)
 #include <i2c.h>
@@ -51,7 +51,7 @@ int checkboard(void)
        srds_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT;
 
        printf("Board: %sRDB, ", cpu->name);
-#if defined(CONFIG_T1024RDB)
+#if defined(CONFIG_TARGET_T1024RDB)
        printf("Board rev: 0x%02x CPLD ver: 0x%02x, ",
               CPLD_READ(hw_ver), CPLD_READ(sw_ver));
 #elif defined(CONFIG_TARGET_T1023RDB)
@@ -63,7 +63,7 @@ int checkboard(void)
        puts("SD/MMC\n");
 #elif CONFIG_SPIFLASH
        puts("SPI\n");
-#elif defined(CONFIG_T1024RDB)
+#elif defined(CONFIG_TARGET_T1024RDB)
        u8 reg;
 
        reg = CPLD_READ(flash_csr);
@@ -91,7 +91,7 @@ int checkboard(void)
        return 0;
 }
 
-#ifdef CONFIG_T1024RDB
+#ifdef CONFIG_TARGET_T1024RDB
 static void board_mux_lane(void)
 {
        ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
@@ -150,7 +150,7 @@ int board_early_init_r(void)
                0, flash_esel, BOOKE_PAGESZ_256M, 1);
 #endif
 
-#ifdef CONFIG_T1024RDB
+#ifdef CONFIG_TARGET_T1024RDB
        board_mux_lane();
 #endif
 
index 96a6b653b19eb825f70bab8efe04e7d2ba67f3b5..d6ad422803df9dfb9fe2b8868ef50f803a3a4f69 100644 (file)
@@ -12,7 +12,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
index c6fdb22611ceb5f80f5b3f54b7524c0546189838..8ef312f5d4dd2218716b05420f347941e01bfbcd 100644 (file)
@@ -12,7 +12,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
index f138dd5577975617b661386013cfa50401bf6490..736becfe3ed779f2edfef47f1db8bb93502a17a0 100644 (file)
@@ -7,7 +7,6 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="T1024RDB"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
index bce2a599b5a30388c89f3db076fc42544a45a378..b8dc3162841e5f22a413fcc3016b0a470385d839 100644 (file)
@@ -13,7 +13,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
index 0aef7574dab3493b745c506239b96b578d9ee327..3ba1e3550a03d083a328be4120b39778025faddb 100644 (file)
@@ -5,7 +5,6 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="T1024RDB"
 CONFIG_BOOTDELAY=10
 CONFIG_SILENT_CONSOLE=y
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
index ed157ba26af61fc4296db6b10c46f06e061b055e..37bc506937b44598326e9d30e63bef0789708faa 100644 (file)
@@ -60,7 +60,7 @@
 #define CONFIG_SYS_NAND_U_BOOT_START   0x30000000
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    (256 << 10)
 #define CONFIG_SYS_LDSCRIPT    "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
-#if defined(CONFIG_T1024RDB)
+#if defined(CONFIG_TARGET_T1024RDB)
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_nand_rcw.cfg
 #elif defined(CONFIG_TARGET_T1023RDB)
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_nand_rcw.cfg
@@ -79,7 +79,7 @@
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #endif
-#if defined(CONFIG_T1024RDB)
+#if defined(CONFIG_TARGET_T1024RDB)
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_spi_rcw.cfg
 #elif defined(CONFIG_TARGET_T1023RDB)
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_spi_rcw.cfg
@@ -98,7 +98,7 @@
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #endif
-#if defined(CONFIG_T1024RDB)
+#if defined(CONFIG_TARGET_T1024RDB)
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_sd_rcw.cfg
 #elif defined(CONFIG_TARGET_T1023RDB)
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_sd_rcw.cfg
 #define CONFIG_ENV_SPI_MODE            0
 #define CONFIG_ENV_SIZE                        0x2000          /* 8KB */
 #define CONFIG_ENV_OFFSET              0x100000        /* 1MB */
-#if defined(CONFIG_T1024RDB)
+#if defined(CONFIG_TARGET_T1024RDB)
 #define CONFIG_ENV_SECT_SIZE           0x10000
 #elif defined(CONFIG_TARGET_T1023RDB)
 #define CONFIG_ENV_SECT_SIZE           0x40000
 #define CONFIG_SYS_EXTRA_ENV_RELOC
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_SIZE                        0x2000
-#if defined(CONFIG_T1024RDB)
+#if defined(CONFIG_TARGET_T1024RDB)
 #define CONFIG_ENV_OFFSET              (2 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_TARGET_T1023RDB)
 #define CONFIG_ENV_OFFSET              (10 * CONFIG_SYS_NAND_BLOCK_SIZE)
@@ -271,7 +271,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 #define CONFIG_FSL_DDR_INTERACTIVE
-#if defined(CONFIG_T1024RDB)
+#if defined(CONFIG_TARGET_T1024RDB)
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_FSL_DDR3
 #define CONFIG_SYS_SPD_BUS_NUM 0
@@ -301,7 +301,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_NOR_AMASK   IFC_AMASK(128*1024*1024)
 
 /* NOR Flash Timing Params */
-#if defined(CONFIG_T1024RDB)
+#if defined(CONFIG_TARGET_T1024RDB)
 #define CONFIG_SYS_NOR_CSOR    CSOR_NAND_TRHZ_80
 #elif defined(CONFIG_TARGET_T1023RDB)
 #define CONFIG_SYS_NOR_CSOR    (CSOR_NOR_ADM_SHIFT(0) | \
@@ -330,7 +330,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS}
 
-#ifdef CONFIG_T1024RDB
+#ifdef CONFIG_TARGET_T1024RDB
 /* CPLD on IFC */
 #define CONFIG_SYS_CPLD_BASE           0xffdf0000
 #define CONFIG_SYS_CPLD_BASE_PHYS      (0xf00000000ull | CONFIG_SYS_CPLD_BASE)
@@ -369,7 +369,7 @@ unsigned long get_board_ddr_clk(void);
                                | CSPR_V)
 #define CONFIG_SYS_NAND_AMASK  IFC_AMASK(64*1024)
 
-#if defined(CONFIG_T1024RDB)
+#if defined(CONFIG_TARGET_T1024RDB)
 #define CONFIG_SYS_NAND_CSOR   (CSOR_NAND_ECC_ENC_EN   /* ECC on encode */ \
                                | CSOR_NAND_ECC_DEC_EN  /* ECC on decode */ \
                                | CSOR_NAND_ECC_MODE_4  /* 4-bit ECC */ \
@@ -706,7 +706,7 @@ unsigned long get_board_ddr_clk(void);
 
 #define CONFIG_SYS_DPAA_FMAN
 
-#ifdef CONFIG_T1024RDB
+#ifdef CONFIG_TARGET_T1024RDB
 #define CONFIG_QE
 #define CONFIG_U_QE
 #endif
@@ -730,7 +730,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_QE_FW_ADDR          (512 * 0x920)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#if defined(CONFIG_T1024RDB)
+#if defined(CONFIG_TARGET_T1024RDB)
 #define CONFIG_SYS_FMAN_FW_ADDR                (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #define CONFIG_SYS_QE_FW_ADDR          (4 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_TARGET_T1023RDB)
@@ -761,7 +761,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_PHYLIB_10G
 #define CONFIG_PHY_REALTEK
 #define CONFIG_PHY_AQUANTIA
-#if defined(CONFIG_T1024RDB)
+#if defined(CONFIG_TARGET_T1024RDB)
 #define RGMII_PHY1_ADDR                0x2
 #define RGMII_PHY2_ADDR                0x6
 #define SGMII_AQR_PHY_ADDR     0x2
index 4f9fb97abbda68a64dccd13d2d68cb22a7c80d56..17c365ca4432a7c55ec6d93315ca228b6fafae77 100644 (file)
@@ -7792,7 +7792,6 @@ CONFIG_SYS_XWAY_EBU_BOOTCFG
 CONFIG_SYS_ZYNQ_QSPI_WAIT
 CONFIG_SYS_ZYNQ_SPI_WAIT
 CONFIG_SYS_i2C_FSL
-CONFIG_T1024RDB
 CONFIG_T1040QDS
 CONFIG_T2080QDS
 CONFIG_T2080RDB