]> git.ipfire.org Git - people/ms/u-boot.git/commitdiff
ARM: tegra: add I2C controllers to Tegra186 DT
authorBryan Wu <pengw@nvidia.com>
Wed, 27 Jul 2016 21:48:21 +0000 (15:48 -0600)
committerTom Warren <twarren@nvidia.com>
Thu, 4 Aug 2016 20:36:59 +0000 (13:36 -0700)
Tegra186 has 8 I2C controllers including BPMP I2C. This patch adds the
other 7 generic controllers to Tegra186's DT.

Signed-off-by: Bryan Wu <pengw@nvidia.com>
(swarren, fixed DT node sort order, tweak patch description)
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/dts/tegra186.dtsi

index c296c2f202f74dbeebbfc0d127912895ff2d6997..d9e7f0351f57c5512943e7bf150dbd20175d807a 100644 (file)
                status = "disabled";
        };
 
+       gen1_i2c: i2c@3160000 {
+               compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+               reg = <0x0 0x3160000 0x0 0x100>;
+               interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&bpmp TEGRA186_CLK_I2C1>;
+               clock-names = "i2c";
+               resets = <&bpmp TEGRA186_RESET_I2C1>;
+               reset-names = "i2c";
+               status = "disabled";
+       };
+
+       cam_i2c: i2c@3180000 {
+               compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+               reg = <0x0 0x3180000 0x0 0x100>;
+               interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&bpmp TEGRA186_CLK_I2C3>;
+               clock-names = "i2c";
+               resets = <&bpmp TEGRA186_RESET_I2C3>;
+               reset-names = "i2c";
+               status = "disabled";
+       };
+
+       dp_aux_ch1_i2c: i2c@3190000 {
+               compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+               reg = <0x0 0x3190000 0x0 0x100>;
+               interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&bpmp TEGRA186_CLK_I2C4>;
+               clock-names = "i2c";
+               resets = <&bpmp TEGRA186_RESET_I2C4>;
+               reset-names = "i2c";
+               status = "disabled";
+       };
+
+       dp_aux_ch0_i2c: i2c@31b0000 {
+               compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+               reg = <0x0 0x31b0000 0x0 0x100>;
+               interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&bpmp TEGRA186_CLK_I2C6>;
+               clock-names = "i2c";
+               resets = <&bpmp TEGRA186_RESET_I2C6>;
+               reset-names = "i2c";
+               status = "disabled";
+       };
+
+       gen7_i2c: i2c@31c0000 {
+               compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+               reg = <0x0 0x31c0000 0x0 0x100>;
+               interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&bpmp TEGRA186_CLK_I2C7>;
+               clock-names = "i2c";
+               resets = <&bpmp TEGRA186_RESET_I2C7>;
+               reset-names = "i2c";
+               status = "disabled";
+       };
+
+       gen9_i2c: i2c@31e0000 {
+               compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+               reg = <0x0 0x31e0000 0x0 0x100>;
+               interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&bpmp TEGRA186_CLK_I2C9>;
+               clock-names = "i2c";
+               resets = <&bpmp TEGRA186_RESET_I2C9>;
+               reset-names = "i2c";
+               status = "disabled";
+       };
+
        sdhci@3400000 {
                compatible = "nvidia,tegra186-sdhci";
                reg = <0x0 0x03400000 0x0 0x200>;
                #mbox-cells = <2>;
        };
 
+       gen2_i2c: i2c@c240000 {
+               compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+               reg = <0x0 0xc240000 0x0 0x100>;
+               interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&bpmp TEGRA186_CLK_I2C2>;
+               clock-names = "i2c";
+               resets = <&bpmp TEGRA186_RESET_I2C2>;
+               reset-names = "i2c";
+               status = "disabled";
+       };
+
+       gen8_i2c: i2c@c250000 {
+               compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+               reg = <0x0 0xc250000 0x0 0x100>;
+               interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&bpmp TEGRA186_CLK_I2C8>;
+               clock-names = "i2c";
+               resets = <&bpmp TEGRA186_RESET_I2C8>;
+               reset-names = "i2c";
+               status = "disabled";
+       };
+
        gpio_aon: gpio@c2f0000 {
                compatible = "nvidia,tegra186-gpio-aon";
                reg-names = "security", "gpio";