Enable the hash verify command (hash -v). This adds to code
size a little.
- CONFIG_SHA1 - support SHA1 hashing
- CONFIG_SHA256 - support SHA256 hashing
+ CONFIG_SHA1 - This option enables support of hashing using SHA1
+ algorithm. The hash is calculated in software.
+ CONFIG_SHA256 - This option enables support of hashing using
+ SHA256 algorithm. The hash is calculated in software.
+ CONFIG_SHA_HW_ACCEL - This option enables hardware acceleration
+ for SHA1/SHA256 hashing.
+ This affects the 'hash' command and also the
+ hash_lookup_algo() function.
+ CONFIG_SHA_PROG_HW_ACCEL - This option enables
+ hardware-acceleration for SHA1/SHA256 progressive hashing.
+ Data can be streamed in a block at a time and the hashing
+ is performed in hardware.
Note: There is also a sha1sum command, which should perhaps
be deprecated in favour of 'hash sha1'.
CONFIG_FIT_SIGNATURE
This option enables signature verification of FIT uImages,
- using a hash signed and verified using RSA. See
- doc/uImage.FIT/signature.txt for more details.
+ using a hash signed and verified using RSA. If
+ CONFIG_SHA_PROG_HW_ACCEL is defined, i.e support for progressive
+ hashing is available using hardware, RSA library will use it.
+ See doc/uImage.FIT/signature.txt for more details.
WARNING: When relying on signed FIT images with required
signature check the legacy image format is default
If defined, specified the chip address of the EEPROM device.
The default address is zero.
+ - CONFIG_SYS_I2C_EEPROM_BUS:
+ If defined, specified the i2c bus of the EEPROM device.
+
- CONFIG_SYS_EEPROM_PAGE_WRITE_BITS:
If defined, the number of bits used to address bytes in a
single page in the EEPROM device. A 64 byte page, for example
- CONFIG_FSL_DDR_INTERACTIVE
Enable interactive DDR debugging. See doc/README.fsl-ddr.
+ - CONFIG_FSL_DDR_SYNC_REFRESH
+ Enable sync of refresh for multiple controllers.
+
- CONFIG_SYS_83XX_DDR_USES_CS0
Only for 83xx systems. If specified, then DDR should
be configured using CS0 and CS1 instead of CS2 and CS3.
bool "Support integratorcp_cm920t"
select CPU_ARM920T
- config TARGET_A320EVB
- bool "Support a320evb"
- select CPU_ARM920T
-
- config TARGET_AT91RM9200EK
- bool "Support at91rm9200ek"
- select CPU_ARM920T
-
- config TARGET_EB_CPUX9K2
- bool "Support eb_cpux9k2"
- select CPU_ARM920T
-
- config TARGET_CPUAT91
- bool "Support cpuat91"
- select CPU_ARM920T
+ config ARCH_AT91
+ bool "Atmel AT91"
config TARGET_EDB93XX
bool "Support edb93xx"
bool "Support scb9328"
select CPU_ARM920T
- config TARGET_CM4008
- bool "Support cm4008"
- select CPU_ARM920T
-
- config TARGET_CM41XX
- bool "Support cm41xx"
- select CPU_ARM920T
-
config TARGET_VCMA9
bool "Support VCMA9"
select CPU_ARM920T
bool "Support gplugd"
select CPU_ARM926EJS
- config TARGET_AFEB9260
- bool "Support afeb9260"
- select CPU_ARM926EJS
-
- config TARGET_AT91SAM9260EK
- bool "Support at91sam9260ek"
- select CPU_ARM926EJS
-
- config TARGET_AT91SAM9261EK
- bool "Support at91sam9261ek"
- select CPU_ARM926EJS
-
- config TARGET_AT91SAM9263EK
- bool "Support at91sam9263ek"
- select CPU_ARM926EJS
-
- config TARGET_AT91SAM9M10G45EK
- bool "Support at91sam9m10g45ek"
- select CPU_ARM926EJS
-
- config TARGET_AT91SAM9N12EK
- bool "Support at91sam9n12ek"
- select CPU_ARM926EJS
-
- config TARGET_AT91SAM9RLEK
- bool "Support at91sam9rlek"
- select CPU_ARM926EJS
-
- config TARGET_AT91SAM9X5EK
- bool "Support at91sam9x5ek"
- select CPU_ARM926EJS
-
- config TARGET_SNAPPER9260
- bool "Support snapper9260"
- select CPU_ARM926EJS
-
- config TARGET_VL_MA2SC
- bool "Support vl_ma2sc"
- select CPU_ARM926EJS
-
- config TARGET_SBC35_A9G20
- bool "Support sbc35_a9g20"
- select CPU_ARM926EJS
-
- config TARGET_TNY_A9260
- bool "Support tny_a9260"
- select CPU_ARM926EJS
-
- config TARGET_USB_A9263
- bool "Support usb_a9263"
- select CPU_ARM926EJS
-
- config TARGET_ETHERNUT5
- bool "Support ethernut5"
- select CPU_ARM926EJS
-
- config TARGET_MEESC
- bool "Support meesc"
- select CPU_ARM926EJS
-
- config TARGET_OTC570
- bool "Support otc570"
- select CPU_ARM926EJS
-
- config TARGET_CPU9260
- bool "Support cpu9260"
- select CPU_ARM926EJS
-
- config TARGET_PM9261
- bool "Support pm9261"
- select CPU_ARM926EJS
-
- config TARGET_PM9263
- bool "Support pm9263"
- select CPU_ARM926EJS
-
- config TARGET_PM9G45
- bool "Support pm9g45"
- select CPU_ARM926EJS
-
- config TARGET_CORVUS
- select SUPPORT_SPL
- bool "Support corvus"
- select CPU_ARM926EJS
-
- config TARGET_TAURUS
- select SUPPORT_SPL
- bool "Support taurus"
- select CPU_ARM926EJS
-
- config TARGET_STAMP9G20
- bool "Support stamp9g20"
- select CPU_ARM926EJS
-
config ARCH_DAVINCI
bool "TI DaVinci"
select CPU_ARM926EJS
bool "Support devkit3250"
select CPU_ARM926EJS
- config TARGET_JADECPU
- bool "Support jadecpu"
- select CPU_ARM926EJS
-
config TARGET_MX25PDK
bool "Support mx25pdk"
select CPU_ARM926EJS
bool "Marvell Orion"
select CPU_ARM926EJS
- config TARGET_DKB
- bool "Support dkb"
- select CPU_ARM926EJS
-
config TARGET_SPEAR300
bool "Support spear300"
select CPU_ARM926EJS
bool "Support rpi"
select CPU_ARM1176
- config TARGET_TNETV107X_EVM
- bool "Support tnetv107x_evm"
- select CPU_ARM1176
+ config TARGET_RPI_2
+ bool "Support rpi_2"
+ select CPU_V7
config TARGET_INTEGRATORAP_CM946ES
bool "Support integratorap_cm946es"
select CPU_V7
select SUPPORT_SPL
- config TARGET_SAMA5D3_XPLAINED
- bool "Support sama5d3_xplained"
- select CPU_V7
- select SUPPORT_SPL
-
- config TARGET_SAMA5D3XEK
- bool "Support sama5d3xek"
- select CPU_V7
- select SUPPORT_SPL
-
- config TARGET_SAMA5D4_XPLAINED
- bool "Support sama5d4_xplained"
- select CPU_V7
- select SUPPORT_SPL
-
- config TARGET_SAMA5D4EK
- bool "Support sama5d4ek"
- select CPU_V7
- select SUPPORT_SPL
-
config TARGET_BCM28155_AP
bool "Support bcm28155_ap"
select CPU_V7
bool "Support wandboard"
select CPU_V7
+config TARGET_WARP
+ bool "Support WaRP"
+ select CPU_V7
+
config TARGET_TITANIUM
bool "Support titanium"
select CPU_V7
bool "NVIDIA Tegra"
select SUPPORT_SPL
select SPL
- select OF_CONTROL if !SPL_BUILD
- select CPU_ARM720T if SPL_BUILD
- select CPU_V7 if !SPL_BUILD
+ select OF_CONTROL
+ select CPU_V7
config TARGET_VEXPRESS64_AEMV8A
bool "Support vexpress_aemv8a"
select CPU_V7
select SUPPORT_SPL
select SPL
- select OF_CONTROL if !SPL_BUILD
+ select OF_CONTROL
endchoice
- source "arch/arm/cpu/arm926ejs/davinci/Kconfig"
+ source "arch/arm/mach-at91/Kconfig"
+
+ source "arch/arm/mach-davinci/Kconfig"
+
+ source "arch/arm/cpu/arm1176/bcm2835/Kconfig"
source "arch/arm/cpu/armv7/exynos/Kconfig"
- source "arch/arm/cpu/armv7/highbank/Kconfig"
+ source "arch/arm/mach-highbank/Kconfig"
- source "arch/arm/cpu/armv7/keystone/Kconfig"
+ source "arch/arm/mach-keystone/Kconfig"
- source "arch/arm/cpu/arm926ejs/kirkwood/Kconfig"
+ source "arch/arm/mach-kirkwood/Kconfig"
- source "arch/arm/cpu/arm926ejs/nomadik/Kconfig"
+ source "arch/arm/mach-nomadik/Kconfig"
source "arch/arm/cpu/armv7/omap3/Kconfig"
source "arch/arm/cpu/armv7/omap5/Kconfig"
- source "arch/arm/cpu/arm926ejs/orion5x/Kconfig"
+ source "arch/arm/mach-orion5x/Kconfig"
source "arch/arm/cpu/armv7/rmobile/Kconfig"
source "arch/arm/cpu/armv7/s5pc1xx/Kconfig"
- source "arch/arm/cpu/armv7/tegra-common/Kconfig"
+ source "arch/arm/mach-tegra/Kconfig"
source "arch/arm/cpu/armv7/uniphier/Kconfig"
- source "arch/arm/cpu/arm926ejs/versatile/Kconfig"
+ source "arch/arm/mach-versatile/Kconfig"
source "arch/arm/cpu/armv7/zynq/Kconfig"
source "board/aristainetos/Kconfig"
source "board/BuR/kwb/Kconfig"
source "board/BuR/tseries/Kconfig"
- source "board/BuS/eb_cpux9k2/Kconfig"
- source "board/BuS/vl_ma2sc/Kconfig"
source "board/CarMediaLab/flea3/Kconfig"
source "board/Marvell/aspenite/Kconfig"
source "board/Marvell/db-mv784mp-gp/Kconfig"
- source "board/Marvell/dkb/Kconfig"
source "board/Marvell/gplugd/Kconfig"
- source "board/afeb9260/Kconfig"
source "board/altera/socfpga/Kconfig"
source "board/armadeus/apf27/Kconfig"
source "board/armltd/integrator/Kconfig"
source "board/armltd/vexpress/Kconfig"
source "board/armltd/vexpress64/Kconfig"
- source "board/atmel/at91rm9200ek/Kconfig"
- source "board/atmel/at91sam9260ek/Kconfig"
- source "board/atmel/at91sam9261ek/Kconfig"
- source "board/atmel/at91sam9263ek/Kconfig"
- source "board/atmel/at91sam9m10g45ek/Kconfig"
- source "board/atmel/at91sam9n12ek/Kconfig"
- source "board/atmel/at91sam9rlek/Kconfig"
- source "board/atmel/at91sam9x5ek/Kconfig"
- source "board/atmel/sama5d3_xplained/Kconfig"
- source "board/atmel/sama5d3xek/Kconfig"
- source "board/atmel/sama5d4_xplained/Kconfig"
- source "board/atmel/sama5d4ek/Kconfig"
source "board/bachmann/ot1200/Kconfig"
source "board/balloon3/Kconfig"
source "board/barco/platinum/Kconfig"
source "board/barco/titanium/Kconfig"
source "board/bluegiga/apx4devkit/Kconfig"
- source "board/bluewater/snapper9260/Kconfig"
source "board/boundary/nitrogen6x/Kconfig"
source "board/broadcom/bcm28155_ap/Kconfig"
source "board/broadcom/bcmcygnus/Kconfig"
source "board/broadcom/bcmnsp/Kconfig"
- source "board/calao/sbc35_a9g20/Kconfig"
- source "board/calao/tny_a9260/Kconfig"
- source "board/calao/usb_a9263/Kconfig"
source "board/cirrus/edb93xx/Kconfig"
- source "board/cm4008/Kconfig"
- source "board/cm41xx/Kconfig"
source "board/compulab/cm_t335/Kconfig"
source "board/compulab/cm_fx6/Kconfig"
source "board/congatec/cgtqmx6eval/Kconfig"
source "board/davedenx/qong/Kconfig"
source "board/denx/m28evk/Kconfig"
source "board/denx/m53evk/Kconfig"
- source "board/egnite/ethernut5/Kconfig"
source "board/embest/mx6boards/Kconfig"
- source "board/esd/meesc/Kconfig"
- source "board/esd/otc570/Kconfig"
source "board/esg/ima3-mx53/Kconfig"
- source "board/eukrea/cpu9260/Kconfig"
- source "board/eukrea/cpuat91/Kconfig"
- source "board/faraday/a320evb/Kconfig"
source "board/freescale/ls2085a/Kconfig"
source "board/freescale/ls1021aqds/Kconfig"
source "board/freescale/ls1021atwr/Kconfig"
source "board/ppcag/bg0900/Kconfig"
source "board/pxa255_idp/Kconfig"
source "board/raspberrypi/rpi/Kconfig"
- source "board/ronetix/pm9261/Kconfig"
- source "board/ronetix/pm9263/Kconfig"
- source "board/ronetix/pm9g45/Kconfig"
+ source "board/raspberrypi/rpi_2/Kconfig"
source "board/samsung/smdk2410/Kconfig"
source "board/sandisk/sansa_fuze_plus/Kconfig"
source "board/scb9328/Kconfig"
source "board/schulercontrol/sc_sps_1/Kconfig"
- source "board/siemens/corvus/Kconfig"
source "board/siemens/draco/Kconfig"
source "board/siemens/pxm2/Kconfig"
source "board/siemens/rut/Kconfig"
- source "board/siemens/taurus/Kconfig"
source "board/silica/pengwyn/Kconfig"
source "board/solidrun/hummingboard/Kconfig"
source "board/spear/spear300/Kconfig"
source "board/st-ericsson/u8500/Kconfig"
source "board/st/stv0991/Kconfig"
source "board/sunxi/Kconfig"
- source "board/syteco/jadecpu/Kconfig"
source "board/syteco/zmx25/Kconfig"
- source "board/taskit/stamp9g20/Kconfig"
source "board/tbs/tbs2910/Kconfig"
source "board/ti/am335x/Kconfig"
source "board/ti/am43xx/Kconfig"
source "board/ti/ti814x/Kconfig"
source "board/ti/ti816x/Kconfig"
- source "board/ti/tnetv107xevm/Kconfig"
source "board/timll/devkit3250/Kconfig"
source "board/toradex/colibri_pxa270/Kconfig"
source "board/tqc/tqma6/Kconfig"
source "board/udoo/Kconfig"
source "board/vpac270/Kconfig"
source "board/wandboard/Kconfig"
+source "board/warp/Kconfig"
source "board/woodburn/Kconfig"
source "board/xaeniax/Kconfig"
source "board/zipitz2/Kconfig"
uint fevt; /* Force event register */
uint admaes; /* ADMA error status register */
uint adsaddr; /* ADMA system address register */
- char reserved2[160]; /* reserved */
+ char reserved2[100]; /* reserved */
+ uint vendorspec; /* Vendor Specific register */
+ char reserved3[59]; /* reserved */
uint hostver; /* Host controller version register */
- char reserved3[4]; /* reserved */
- uint dmaerraddr; /* DMA error address register */
char reserved4[4]; /* reserved */
- uint dmaerrattr; /* DMA error attribute register */
+ uint dmaerraddr; /* DMA error address register */
char reserved5[4]; /* reserved */
+ uint dmaerrattr; /* DMA error attribute register */
+ char reserved6[4]; /* reserved */
uint hostcapblt2; /* Host controller capabilities register 2 */
- char reserved6[8]; /* reserved */
+ char reserved7[8]; /* reserved */
uint tcr; /* Tuning control register */
- char reserved7[28]; /* reserved */
+ char reserved8[28]; /* reserved */
uint sddirctl; /* SD direction control register */
- char reserved8[712]; /* reserved */
+ char reserved9[712]; /* reserved */
uint scr; /* eSDHC control register */
};
esdhc_write32(®s->cmdarg, cmd->cmdarg);
#if defined(CONFIG_FSL_USDHC)
esdhc_write32(®s->mixctrl,
- (esdhc_read32(®s->mixctrl) & 0xFFFFFF80) | (xfertyp & 0x7F));
+ (esdhc_read32(®s->mixctrl) & 0xFFFFFF80) | (xfertyp & 0x7F)
+ | (mmc->ddr_mode ? XFERTYP_DDREN : 0));
esdhc_write32(®s->xfertyp, xfertyp & 0xFFFF0000);
#else
esdhc_write32(®s->xfertyp, xfertyp);
goto out;
}
+ /* Switch voltage to 1.8V if CMD11 succeeded */
+ if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V) {
+ esdhc_setbits32(®s->vendorspec, ESDHC_VENDORSPEC_VSELECT);
+
+ printf("Run CMD11 1.8V switch\n");
+ /* Sleep for 5 ms - max time for card to switch to 1.8V */
+ udelay(5000);
+ }
+
/* Workaround for ESDHC errata ENGcm03648 */
if (!data && (cmd->resp_type & MMC_RSP_BUSY)) {
int timeout = 2500;
while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTD))
;
}
+
+ /* If this was CMD11, then notify that power cycle is needed */
+ if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V)
+ printf("CMD11 to switch to 1.8V mode failed, card requires power cycle.\n");
}
esdhc_write32(®s->irqstat, -1);
if ((sdhc_clk / (div * pre_div)) <= clock)
break;
- pre_div >>= 1;
+ pre_div >>= mmc->ddr_mode ? 2 : 1;
div -= 1;
clk = (pre_div << 8) | (div << 4);
/* Set timout to the maximum value */
esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16);
+#ifdef CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT
+ esdhc_setbits32(®s->vendorspec, ESDHC_VENDORSPEC_VSELECT);
+#endif
+
return 0;
}
}
cfg->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | MMC_MODE_HC;
+ #ifdef CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
+ cfg->cfg.host_caps |= MMC_MODE_DDR_52MHz;
+ #endif
if (cfg->max_bus_width > 0) {
if (cfg->max_bus_width < 8)
#define XFERTYP_RSPTYP_48_BUSY 0x00030000
#define XFERTYP_MSBSEL 0x00000020
#define XFERTYP_DTDSEL 0x00000010
+ #define XFERTYP_DDREN 0x00000008
#define XFERTYP_AC12EN 0x00000004
#define XFERTYP_BCEN 0x00000002
#define XFERTYP_DMAEN 0x00000001
#define ESDHC_HOSTCAPBLT_DMAS 0x00400000
#define ESDHC_HOSTCAPBLT_HSS 0x00200000
+#define ESDHC_VENDORSPEC_VSELECT 0x00000002 /* Use 1.8V */
+
struct fsl_esdhc_cfg {
u32 esdhc_base;
u32 sdhc_clk;
#include <linux/compiler.h>
#include <part.h>
- #define SD_VERSION_SD 0x20000
- #define SD_VERSION_3 (SD_VERSION_SD | 0x300)
- #define SD_VERSION_2 (SD_VERSION_SD | 0x200)
- #define SD_VERSION_1_0 (SD_VERSION_SD | 0x100)
- #define SD_VERSION_1_10 (SD_VERSION_SD | 0x10a)
- #define MMC_VERSION_MMC 0x10000
- #define MMC_VERSION_UNKNOWN (MMC_VERSION_MMC)
- #define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x102)
- #define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x104)
- #define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x202)
- #define MMC_VERSION_3 (MMC_VERSION_MMC | 0x300)
- #define MMC_VERSION_4 (MMC_VERSION_MMC | 0x400)
- #define MMC_VERSION_4_1 (MMC_VERSION_MMC | 0x401)
- #define MMC_VERSION_4_2 (MMC_VERSION_MMC | 0x402)
- #define MMC_VERSION_4_3 (MMC_VERSION_MMC | 0x403)
- #define MMC_VERSION_4_41 (MMC_VERSION_MMC | 0x429)
- #define MMC_VERSION_4_5 (MMC_VERSION_MMC | 0x405)
- #define MMC_VERSION_5_0 (MMC_VERSION_MMC | 0x500)
+ /* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */
+ #define SD_VERSION_SD (1U << 31)
+ #define MMC_VERSION_MMC (1U << 30)
+
+ #define MAKE_SDMMC_VERSION(a, b, c) \
+ ((((u32)(a)) << 16) | ((u32)(b) << 8) | (u32)(c))
+ #define MAKE_SD_VERSION(a, b, c) \
+ (SD_VERSION_SD | MAKE_SDMMC_VERSION(a, b, c))
+ #define MAKE_MMC_VERSION(a, b, c) \
+ (MMC_VERSION_MMC | MAKE_SDMMC_VERSION(a, b, c))
+
+ #define EXTRACT_SDMMC_MAJOR_VERSION(x) \
+ (((u32)(x) >> 16) & 0xff)
+ #define EXTRACT_SDMMC_MINOR_VERSION(x) \
+ (((u32)(x) >> 8) & 0xff)
+ #define EXTRACT_SDMMC_CHANGE_VERSION(x) \
+ ((u32)(x) & 0xff)
+
+ #define SD_VERSION_3 MAKE_SD_VERSION(3, 0, 0)
+ #define SD_VERSION_2 MAKE_SD_VERSION(2, 0, 0)
+ #define SD_VERSION_1_0 MAKE_SD_VERSION(1, 0, 0)
+ #define SD_VERSION_1_10 MAKE_SD_VERSION(1, 10, 0)
+
+ #define MMC_VERSION_UNKNOWN MAKE_MMC_VERSION(0, 0, 0)
+ #define MMC_VERSION_1_2 MAKE_MMC_VERSION(1, 2, 0)
+ #define MMC_VERSION_1_4 MAKE_MMC_VERSION(1, 4, 0)
+ #define MMC_VERSION_2_2 MAKE_MMC_VERSION(2, 2, 0)
+ #define MMC_VERSION_3 MAKE_MMC_VERSION(3, 0, 0)
+ #define MMC_VERSION_4 MAKE_MMC_VERSION(4, 0, 0)
+ #define MMC_VERSION_4_1 MAKE_MMC_VERSION(4, 1, 0)
+ #define MMC_VERSION_4_2 MAKE_MMC_VERSION(4, 2, 0)
+ #define MMC_VERSION_4_3 MAKE_MMC_VERSION(4, 3, 0)
+ #define MMC_VERSION_4_41 MAKE_MMC_VERSION(4, 4, 1)
+ #define MMC_VERSION_4_5 MAKE_MMC_VERSION(4, 5, 0)
+ #define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0)
#define MMC_MODE_HS (1 << 0)
#define MMC_MODE_HS_52MHz (1 << 1)
#define SD_DATA_4BIT 0x00040000
- #define IS_SD(x) (x->version & SD_VERSION_SD)
+ #define IS_SD(x) ((x)->version & SD_VERSION_SD)
+ #define IS_MMC(x) ((x)->version & SD_VERSION_MMC)
#define MMC_DATA_READ 1
#define MMC_DATA_WRITE 2
#define SD_CMD_SEND_RELATIVE_ADDR 3
#define SD_CMD_SWITCH_FUNC 6
#define SD_CMD_SEND_IF_COND 8
+#define SD_CMD_SWITCH_UHS18V 11
#define SD_CMD_APP_SET_BUS_WIDTH 6
#define SD_CMD_ERASE_WR_BLK_START 32