1 From: Bruce Chang<BruceChang@via.com.tw>
2 Subject: add Via chrome9 drm support
4 Signed-off-by: Bruce Chang<BruceChang@via.com.tw>
5 Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
7 Automatically created from "patches.drivers/add-via-chrome9-drm-support.patch" by xen-port-patches.py
9 --- sle11-2009-10-08.orig/drivers/gpu/drm/via_chrome9/via_chrome9_dma.c 2009-01-16 09:39:39.000000000 +0100
10 +++ sle11-2009-10-08/drivers/gpu/drm/via_chrome9/via_chrome9_dma.c 2009-10-08 12:19:47.000000000 +0200
11 @@ -135,10 +135,17 @@ void via_chrome9_dma_init_inv(struct drm
13 } while (sr6f & 0x80);
15 - for (i = 0; i < entries; i++)
16 - writel(page_to_pfn(vmalloc_to_page(
17 - (void *)addrlinear + PAGE_SIZE * i)) &
18 - 0x3fffffff, pGARTTable + i + alignedoffset);
19 + for (i = 0; i < entries; i++) {
22 + pfn = vmalloc_to_pfn((void *)addrlinear
25 + pfn = pfn_to_mfn(pfn);
27 + writel(pfn & 0x3fffffff,
28 + pGARTTable + i + alignedoffset);
32 SetMMIORegisterU8(dev_priv->mmio->handle, 0x83c5, sr6f);
33 @@ -270,10 +277,15 @@ AllocAndBindPCIEMemory(struct drm_via_ch
37 - for (i = 0; i < entries; i++)
39 - (vmalloc_to_page((void *) addrlinear + PAGE_SIZE * i)) &
40 - 0x3fffffff, pGARTTable + i + alignedoffset);
41 + for (i = 0; i < entries; i++) {
44 + pfn = vmalloc_to_pfn((void *)addrlinear + PAGE_SIZE * i);
46 + pfn = pfn_to_mfn(pfn);
48 + writel(pfn & 0x3fffffff, pGARTTable + i + alignedoffset);
52 SetMMIORegisterU8(dev_priv->mmio->handle, 0x83c5, sr6f);