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[gdb/symtab] Work around PR gas/29517, dwarf2 case
[thirdparty/binutils-gdb.git] / bfd / elf32-cr16.c
CommitLineData
3d3d428f 1/* BFD back-end for National Semiconductor's CR16 ELF
fd67aa11 2 Copyright (C) 2007-2024 Free Software Foundation, Inc.
3d3d428f
NC
3 Written by M R Swami Reddy.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
3d3d428f
NC
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software Foundation,
19 Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20
21#include "sysdep.h"
22#include "bfd.h"
23#include "bfdlink.h"
24#include "libbfd.h"
25#include "libiberty.h"
26#include "elf-bfd.h"
27#include "elf/cr16.h"
ca05ca5e 28#include "elf32-cr16.h"
3d3d428f 29
99706f30
SR
30/* The cr16 linker needs to keep track of the number of relocs that
31 it decides to copy in check_relocs for each symbol. This is so
32 that it can discard PC relative relocs if it doesn't need them when
33 linking with -Bsymbolic. We store the information in a field
34 extending the regular ELF linker hash table. */
35
4dfe6ac6
NC
36struct elf32_cr16_link_hash_entry
37{
99706f30
SR
38 /* The basic elf link hash table entry. */
39 struct elf_link_hash_entry root;
40
41 /* For function symbols, the number of times this function is
42 called directly (ie by name). */
43 unsigned int direct_calls;
44
45 /* For function symbols, the size of this function's stack
46 (if <= 255 bytes). We stuff this into "call" instructions
47 to this target when it's valid and profitable to do so.
48
49 This does not include stack allocated by movm! */
50 unsigned char stack_size;
51
52 /* For function symbols, arguments (if any) for movm instruction
53 in the prologue. We stuff this value into "call" instructions
54 to the target when it's valid and profitable to do so. */
55 unsigned char movm_args;
56
57 /* For function symbols, the amount of stack space that would be allocated
58 by the movm instruction. This is redundant with movm_args, but we
59 add it to the hash table to avoid computing it over and over. */
60 unsigned char movm_stack_size;
61
62/* Used to mark functions which have had redundant parts of their
63 prologue deleted. */
64#define CR16_DELETED_PROLOGUE_BYTES 0x1
65 unsigned char flags;
66
67 /* Calculated value. */
68 bfd_vma value;
69};
70
3d3d428f
NC
71/* cr16_reloc_map array maps BFD relocation enum into a CRGAS relocation type. */
72
73struct cr16_reloc_map
74{
75 bfd_reloc_code_real_type bfd_reloc_enum; /* BFD relocation enum. */
07d6d2b8 76 unsigned short cr16_reloc_type; /* CR16 relocation type. */
3d3d428f
NC
77};
78
79static const struct cr16_reloc_map cr16_reloc_map[R_CR16_MAX] =
80{
07d6d2b8
AM
81 {BFD_RELOC_NONE, R_CR16_NONE},
82 {BFD_RELOC_CR16_NUM8, R_CR16_NUM8},
3d3d428f
NC
83 {BFD_RELOC_CR16_NUM16, R_CR16_NUM16},
84 {BFD_RELOC_CR16_NUM32, R_CR16_NUM32},
85 {BFD_RELOC_CR16_NUM32a, R_CR16_NUM32a},
86 {BFD_RELOC_CR16_REGREL4, R_CR16_REGREL4},
87 {BFD_RELOC_CR16_REGREL4a, R_CR16_REGREL4a},
88 {BFD_RELOC_CR16_REGREL14, R_CR16_REGREL14},
89 {BFD_RELOC_CR16_REGREL14a, R_CR16_REGREL14a},
90 {BFD_RELOC_CR16_REGREL16, R_CR16_REGREL16},
91 {BFD_RELOC_CR16_REGREL20, R_CR16_REGREL20},
92 {BFD_RELOC_CR16_REGREL20a, R_CR16_REGREL20a},
93 {BFD_RELOC_CR16_ABS20, R_CR16_ABS20},
94 {BFD_RELOC_CR16_ABS24, R_CR16_ABS24},
07d6d2b8
AM
95 {BFD_RELOC_CR16_IMM4, R_CR16_IMM4},
96 {BFD_RELOC_CR16_IMM8, R_CR16_IMM8},
3d3d428f
NC
97 {BFD_RELOC_CR16_IMM16, R_CR16_IMM16},
98 {BFD_RELOC_CR16_IMM20, R_CR16_IMM20},
99 {BFD_RELOC_CR16_IMM24, R_CR16_IMM24},
100 {BFD_RELOC_CR16_IMM32, R_CR16_IMM32},
101 {BFD_RELOC_CR16_IMM32a, R_CR16_IMM32a},
102 {BFD_RELOC_CR16_DISP4, R_CR16_DISP4},
103 {BFD_RELOC_CR16_DISP8, R_CR16_DISP8},
104 {BFD_RELOC_CR16_DISP16, R_CR16_DISP16},
105 {BFD_RELOC_CR16_DISP24, R_CR16_DISP24},
7fac7ff4
NC
106 {BFD_RELOC_CR16_DISP24a, R_CR16_DISP24a},
107 {BFD_RELOC_CR16_SWITCH8, R_CR16_SWITCH8},
108 {BFD_RELOC_CR16_SWITCH16, R_CR16_SWITCH16},
99706f30
SR
109 {BFD_RELOC_CR16_SWITCH32, R_CR16_SWITCH32},
110 {BFD_RELOC_CR16_GOT_REGREL20, R_CR16_GOT_REGREL20},
111 {BFD_RELOC_CR16_GOTC_REGREL20, R_CR16_GOTC_REGREL20},
112 {BFD_RELOC_CR16_GLOB_DAT, R_CR16_GLOB_DAT}
3d3d428f
NC
113};
114
115static reloc_howto_type cr16_elf_howto_table[] =
116{
07d6d2b8
AM
117 HOWTO (R_CR16_NONE, /* type */
118 0, /* rightshift */
c94cb026 119 0, /* size */
07d6d2b8 120 0, /* bitsize */
0a1b45a2 121 false, /* pc_relative */
07d6d2b8
AM
122 0, /* bitpos */
123 complain_overflow_dont, /* complain_on_overflow */
124 bfd_elf_generic_reloc, /* special_function */
125 "R_CR16_NONE", /* name */
0a1b45a2 126 false, /* partial_inplace */
07d6d2b8
AM
127 0, /* src_mask */
128 0, /* dst_mask */
0a1b45a2 129 false), /* pcrel_offset */
07d6d2b8
AM
130
131 HOWTO (R_CR16_NUM8, /* type */
132 0, /* rightshift */
c94cb026 133 1, /* size */
07d6d2b8 134 8, /* bitsize */
0a1b45a2 135 false, /* pc_relative */
07d6d2b8
AM
136 0, /* bitpos */
137 complain_overflow_bitfield,/* complain_on_overflow */
138 bfd_elf_generic_reloc, /* special_function */
139 "R_CR16_NUM8", /* name */
0a1b45a2 140 false, /* partial_inplace */
07d6d2b8
AM
141 0x0, /* src_mask */
142 0xff, /* dst_mask */
0a1b45a2 143 false), /* pcrel_offset */
07d6d2b8
AM
144
145 HOWTO (R_CR16_NUM16, /* type */
146 0, /* rightshift */
c94cb026 147 2, /* size */
07d6d2b8 148 16, /* bitsize */
0a1b45a2 149 false, /* pc_relative */
07d6d2b8
AM
150 0, /* bitpos */
151 complain_overflow_bitfield,/* complain_on_overflow */
152 bfd_elf_generic_reloc, /* special_function */
153 "R_CR16_NUM16", /* name */
0a1b45a2 154 false, /* partial_inplace */
07d6d2b8
AM
155 0x0, /* src_mask */
156 0xffff, /* dst_mask */
0a1b45a2 157 false), /* pcrel_offset */
07d6d2b8
AM
158
159 HOWTO (R_CR16_NUM32, /* type */
160 0, /* rightshift */
c94cb026 161 4, /* size */
07d6d2b8 162 32, /* bitsize */
0a1b45a2 163 false, /* pc_relative */
07d6d2b8
AM
164 0, /* bitpos */
165 complain_overflow_bitfield,/* complain_on_overflow */
166 bfd_elf_generic_reloc, /* special_function */
167 "R_CR16_NUM32", /* name */
0a1b45a2 168 false, /* partial_inplace */
07d6d2b8
AM
169 0x0, /* src_mask */
170 0xffffffff, /* dst_mask */
0a1b45a2 171 false), /* pcrel_offset */
07d6d2b8
AM
172
173 HOWTO (R_CR16_NUM32a, /* type */
174 1, /* rightshift */
c94cb026 175 4, /* size */
07d6d2b8 176 32, /* bitsize */
0a1b45a2 177 false, /* pc_relative */
07d6d2b8
AM
178 0, /* bitpos */
179 complain_overflow_bitfield,/* complain_on_overflow */
180 bfd_elf_generic_reloc, /* special_function */
181 "R_CR16_NUM32a", /* name */
0a1b45a2 182 false, /* partial_inplace */
07d6d2b8
AM
183 0x0, /* src_mask */
184 0xffffffff, /* dst_mask */
0a1b45a2 185 false), /* pcrel_offset */
07d6d2b8
AM
186
187 HOWTO (R_CR16_REGREL4, /* type */
188 0, /* rightshift */
c94cb026 189 1, /* size */
07d6d2b8 190 4, /* bitsize */
0a1b45a2 191 false, /* pc_relative */
07d6d2b8
AM
192 0, /* bitpos */
193 complain_overflow_bitfield,/* complain_on_overflow */
194 bfd_elf_generic_reloc, /* special_function */
195 "R_CR16_REGREL4", /* name */
0a1b45a2 196 false, /* partial_inplace */
07d6d2b8
AM
197 0x0, /* src_mask */
198 0xf, /* dst_mask */
0a1b45a2 199 false), /* pcrel_offset */
07d6d2b8
AM
200
201 HOWTO (R_CR16_REGREL4a, /* type */
202 0, /* rightshift */
c94cb026 203 1, /* size */
07d6d2b8 204 4, /* bitsize */
0a1b45a2 205 false, /* pc_relative */
07d6d2b8
AM
206 0, /* bitpos */
207 complain_overflow_bitfield,/* complain_on_overflow */
208 bfd_elf_generic_reloc, /* special_function */
209 "R_CR16_REGREL4a", /* name */
0a1b45a2 210 false, /* partial_inplace */
07d6d2b8
AM
211 0x0, /* src_mask */
212 0xf, /* dst_mask */
0a1b45a2 213 false), /* pcrel_offset */
07d6d2b8
AM
214
215 HOWTO (R_CR16_REGREL14, /* type */
216 0, /* rightshift */
c94cb026 217 2, /* size */
07d6d2b8 218 14, /* bitsize */
0a1b45a2 219 false, /* pc_relative */
07d6d2b8
AM
220 0, /* bitpos */
221 complain_overflow_bitfield,/* complain_on_overflow */
222 bfd_elf_generic_reloc, /* special_function */
223 "R_CR16_REGREL14", /* name */
0a1b45a2 224 false, /* partial_inplace */
07d6d2b8
AM
225 0x0, /* src_mask */
226 0x3fff, /* dst_mask */
0a1b45a2 227 false), /* pcrel_offset */
07d6d2b8
AM
228
229 HOWTO (R_CR16_REGREL14a, /* type */
230 0, /* rightshift */
c94cb026 231 2, /* size */
07d6d2b8 232 14, /* bitsize */
0a1b45a2 233 false, /* pc_relative */
07d6d2b8
AM
234 0, /* bitpos */
235 complain_overflow_bitfield,/* complain_on_overflow */
236 bfd_elf_generic_reloc, /* special_function */
237 "R_CR16_REGREL14a", /* name */
0a1b45a2 238 false, /* partial_inplace */
07d6d2b8
AM
239 0x0, /* src_mask */
240 0x3fff, /* dst_mask */
0a1b45a2 241 false), /* pcrel_offset */
07d6d2b8
AM
242
243 HOWTO (R_CR16_REGREL16, /* type */
244 0, /* rightshift */
c94cb026 245 2, /* size */
07d6d2b8 246 16, /* bitsize */
0a1b45a2 247 false, /* pc_relative */
07d6d2b8
AM
248 0, /* bitpos */
249 complain_overflow_bitfield,/* complain_on_overflow */
250 bfd_elf_generic_reloc, /* special_function */
251 "R_CR16_REGREL16", /* name */
0a1b45a2 252 false, /* partial_inplace */
07d6d2b8
AM
253 0x0, /* src_mask */
254 0xffff, /* dst_mask */
0a1b45a2 255 false), /* pcrel_offset */
07d6d2b8
AM
256
257 HOWTO (R_CR16_REGREL20, /* type */
258 0, /* rightshift */
c94cb026 259 4, /* size */
07d6d2b8 260 20, /* bitsize */
0a1b45a2 261 false, /* pc_relative */
07d6d2b8
AM
262 0, /* bitpos */
263 complain_overflow_bitfield,/* complain_on_overflow */
264 bfd_elf_generic_reloc, /* special_function */
265 "R_CR16_REGREL20", /* name */
0a1b45a2 266 false, /* partial_inplace */
07d6d2b8
AM
267 0x0, /* src_mask */
268 0xfffff, /* dst_mask */
0a1b45a2 269 false), /* pcrel_offset */
07d6d2b8
AM
270
271 HOWTO (R_CR16_REGREL20a, /* type */
272 0, /* rightshift */
c94cb026 273 4, /* size */
07d6d2b8 274 20, /* bitsize */
0a1b45a2 275 false, /* pc_relative */
07d6d2b8
AM
276 0, /* bitpos */
277 complain_overflow_bitfield,/* complain_on_overflow */
278 bfd_elf_generic_reloc, /* special_function */
279 "R_CR16_REGREL20a", /* name */
0a1b45a2 280 false, /* partial_inplace */
07d6d2b8
AM
281 0x0, /* src_mask */
282 0xfffff, /* dst_mask */
0a1b45a2 283 false), /* pcrel_offset */
07d6d2b8
AM
284
285 HOWTO (R_CR16_ABS20, /* type */
286 0, /* rightshift */
c94cb026 287 4, /* size */
07d6d2b8 288 20, /* bitsize */
0a1b45a2 289 false, /* pc_relative */
07d6d2b8
AM
290 0, /* bitpos */
291 complain_overflow_bitfield,/* complain_on_overflow */
292 bfd_elf_generic_reloc, /* special_function */
293 "R_CR16_ABS20", /* name */
0a1b45a2 294 false, /* partial_inplace */
07d6d2b8
AM
295 0x0, /* src_mask */
296 0xfffff, /* dst_mask */
0a1b45a2 297 false), /* pcrel_offset */
07d6d2b8
AM
298
299 HOWTO (R_CR16_ABS24, /* type */
300 0, /* rightshift */
c94cb026 301 4, /* size */
07d6d2b8 302 24, /* bitsize */
0a1b45a2 303 false, /* pc_relative */
07d6d2b8
AM
304 0, /* bitpos */
305 complain_overflow_bitfield,/* complain_on_overflow */
306 bfd_elf_generic_reloc, /* special_function */
307 "R_CR16_ABS24", /* name */
0a1b45a2 308 false, /* partial_inplace */
07d6d2b8
AM
309 0x0, /* src_mask */
310 0xffffff, /* dst_mask */
0a1b45a2 311 false), /* pcrel_offset */
07d6d2b8
AM
312
313 HOWTO (R_CR16_IMM4, /* type */
314 0, /* rightshift */
c94cb026 315 1, /* size */
07d6d2b8 316 4, /* bitsize */
0a1b45a2 317 false, /* pc_relative */
07d6d2b8
AM
318 0, /* bitpos */
319 complain_overflow_bitfield,/* complain_on_overflow */
320 bfd_elf_generic_reloc, /* special_function */
321 "R_CR16_IMM4", /* name */
0a1b45a2 322 false, /* partial_inplace */
07d6d2b8
AM
323 0x0, /* src_mask */
324 0xf, /* dst_mask */
0a1b45a2 325 false), /* pcrel_offset */
07d6d2b8
AM
326
327 HOWTO (R_CR16_IMM8, /* type */
328 0, /* rightshift */
c94cb026 329 1, /* size */
07d6d2b8 330 8, /* bitsize */
0a1b45a2 331 false, /* pc_relative */
07d6d2b8
AM
332 0, /* bitpos */
333 complain_overflow_bitfield,/* complain_on_overflow */
334 bfd_elf_generic_reloc, /* special_function */
335 "R_CR16_IMM8", /* name */
0a1b45a2 336 false, /* partial_inplace */
07d6d2b8
AM
337 0x0, /* src_mask */
338 0xff, /* dst_mask */
0a1b45a2 339 false), /* pcrel_offset */
07d6d2b8
AM
340
341 HOWTO (R_CR16_IMM16, /* type */
342 0, /* rightshift */
c94cb026 343 2, /* size */
07d6d2b8 344 16, /* bitsize */
0a1b45a2 345 false, /* pc_relative */
07d6d2b8
AM
346 0, /* bitpos */
347 complain_overflow_bitfield,/* complain_on_overflow */
348 bfd_elf_generic_reloc, /* special_function */
349 "R_CR16_IMM16", /* name */
0a1b45a2 350 false, /* partial_inplace */
07d6d2b8
AM
351 0x0, /* src_mask */
352 0xffff, /* dst_mask */
0a1b45a2 353 false), /* pcrel_offset */
07d6d2b8
AM
354
355 HOWTO (R_CR16_IMM20, /* type */
356 0, /* rightshift */
c94cb026 357 4, /* size */
07d6d2b8 358 20, /* bitsize */
0a1b45a2 359 false, /* pc_relative */
07d6d2b8
AM
360 0, /* bitpos */
361 complain_overflow_bitfield,/* complain_on_overflow */
362 bfd_elf_generic_reloc, /* special_function */
363 "R_CR16_IMM20", /* name */
0a1b45a2 364 false, /* partial_inplace */
07d6d2b8
AM
365 0x0, /* src_mask */
366 0xfffff, /* dst_mask */
0a1b45a2 367 false), /* pcrel_offset */
07d6d2b8
AM
368
369 HOWTO (R_CR16_IMM24, /* type */
370 0, /* rightshift */
c94cb026 371 4, /* size */
07d6d2b8 372 24, /* bitsize */
0a1b45a2 373 false, /* pc_relative */
07d6d2b8
AM
374 0, /* bitpos */
375 complain_overflow_bitfield,/* complain_on_overflow */
376 bfd_elf_generic_reloc, /* special_function */
377 "R_CR16_IMM24", /* name */
0a1b45a2 378 false, /* partial_inplace */
07d6d2b8
AM
379 0x0, /* src_mask */
380 0xffffff, /* dst_mask */
0a1b45a2 381 false), /* pcrel_offset */
07d6d2b8
AM
382
383 HOWTO (R_CR16_IMM32, /* type */
384 0, /* rightshift */
c94cb026 385 4, /* size */
07d6d2b8 386 32, /* bitsize */
0a1b45a2 387 false, /* pc_relative */
07d6d2b8
AM
388 0, /* bitpos */
389 complain_overflow_bitfield,/* complain_on_overflow */
390 bfd_elf_generic_reloc, /* special_function */
391 "R_CR16_IMM32", /* name */
0a1b45a2 392 false, /* partial_inplace */
07d6d2b8
AM
393 0x0, /* src_mask */
394 0xffffffff, /* dst_mask */
0a1b45a2 395 false), /* pcrel_offset */
07d6d2b8
AM
396
397 HOWTO (R_CR16_IMM32a, /* type */
398 1, /* rightshift */
c94cb026 399 4, /* size */
07d6d2b8 400 32, /* bitsize */
0a1b45a2 401 false, /* pc_relative */
07d6d2b8
AM
402 0, /* bitpos */
403 complain_overflow_bitfield,/* complain_on_overflow */
404 bfd_elf_generic_reloc, /* special_function */
405 "R_CR16_IMM32a", /* name */
0a1b45a2 406 false, /* partial_inplace */
07d6d2b8
AM
407 0x0, /* src_mask */
408 0xffffffff, /* dst_mask */
0a1b45a2 409 false), /* pcrel_offset */
07d6d2b8
AM
410
411 HOWTO (R_CR16_DISP4, /* type */
412 1, /* rightshift */
c94cb026 413 1, /* size */
07d6d2b8 414 4, /* bitsize */
0a1b45a2 415 true, /* pc_relative */
07d6d2b8
AM
416 0, /* bitpos */
417 complain_overflow_unsigned, /* complain_on_overflow */
418 bfd_elf_generic_reloc, /* special_function */
419 "R_CR16_DISP4", /* name */
0a1b45a2 420 false, /* partial_inplace */
07d6d2b8
AM
421 0x0, /* src_mask */
422 0xf, /* dst_mask */
0a1b45a2 423 false), /* pcrel_offset */
07d6d2b8
AM
424
425 HOWTO (R_CR16_DISP8, /* type */
426 1, /* rightshift */
c94cb026 427 1, /* size */
07d6d2b8 428 8, /* bitsize */
0a1b45a2 429 true, /* pc_relative */
07d6d2b8
AM
430 0, /* bitpos */
431 complain_overflow_unsigned, /* complain_on_overflow */
432 bfd_elf_generic_reloc, /* special_function */
433 "R_CR16_DISP8", /* name */
0a1b45a2 434 false, /* partial_inplace */
07d6d2b8
AM
435 0x0, /* src_mask */
436 0x1ff, /* dst_mask */
0a1b45a2 437 false), /* pcrel_offset */
07d6d2b8
AM
438
439 HOWTO (R_CR16_DISP16, /* type */
440 0, /* rightshift REVIITS: To sync with WinIDEA*/
c94cb026 441 2, /* size */
07d6d2b8 442 16, /* bitsize */
0a1b45a2 443 true, /* pc_relative */
07d6d2b8
AM
444 0, /* bitpos */
445 complain_overflow_unsigned, /* complain_on_overflow */
446 bfd_elf_generic_reloc, /* special_function */
447 "R_CR16_DISP16", /* name */
0a1b45a2 448 false, /* partial_inplace */
07d6d2b8
AM
449 0x0, /* src_mask */
450 0x1ffff, /* dst_mask */
0a1b45a2 451 false), /* pcrel_offset */
3d3d428f
NC
452 /* REVISIT: DISP24 should be left-shift by 2 as per ISA doc
453 but its not done, to sync with WinIDEA and CR16 4.1 tools */
07d6d2b8
AM
454 HOWTO (R_CR16_DISP24, /* type */
455 0, /* rightshift */
c94cb026 456 4, /* size */
07d6d2b8 457 24, /* bitsize */
0a1b45a2 458 true, /* pc_relative */
07d6d2b8
AM
459 0, /* bitpos */
460 complain_overflow_unsigned, /* complain_on_overflow */
461 bfd_elf_generic_reloc, /* special_function */
462 "R_CR16_DISP24", /* name */
0a1b45a2 463 false, /* partial_inplace */
07d6d2b8
AM
464 0x0, /* src_mask */
465 0x1ffffff, /* dst_mask */
0a1b45a2 466 false), /* pcrel_offset */
07d6d2b8
AM
467
468 HOWTO (R_CR16_DISP24a, /* type */
469 0, /* rightshift */
c94cb026 470 4, /* size */
07d6d2b8 471 24, /* bitsize */
0a1b45a2 472 true, /* pc_relative */
07d6d2b8
AM
473 0, /* bitpos */
474 complain_overflow_unsigned, /* complain_on_overflow */
475 bfd_elf_generic_reloc, /* special_function */
476 "R_CR16_DISP24a", /* name */
0a1b45a2 477 false, /* partial_inplace */
07d6d2b8
AM
478 0x0, /* src_mask */
479 0xffffff, /* dst_mask */
0a1b45a2 480 false), /* pcrel_offset */
7fac7ff4
NC
481
482 /* An 8 bit switch table entry. This is generated for an expression
483 such as ``.byte L1 - L2''. The offset holds the difference
484 between the reloc address and L2. */
07d6d2b8
AM
485 HOWTO (R_CR16_SWITCH8, /* type */
486 0, /* rightshift */
c94cb026 487 1, /* size */
07d6d2b8 488 8, /* bitsize */
0a1b45a2 489 false, /* pc_relative */
07d6d2b8
AM
490 0, /* bitpos */
491 complain_overflow_unsigned, /* complain_on_overflow */
492 bfd_elf_generic_reloc, /* special_function */
493 "R_CR16_SWITCH8", /* name */
0a1b45a2 494 false, /* partial_inplace */
07d6d2b8
AM
495 0x0, /* src_mask */
496 0xff, /* dst_mask */
0a1b45a2 497 true), /* pcrel_offset */
7fac7ff4
NC
498
499 /* A 16 bit switch table entry. This is generated for an expression
500 such as ``.word L1 - L2''. The offset holds the difference
501 between the reloc address and L2. */
07d6d2b8
AM
502 HOWTO (R_CR16_SWITCH16, /* type */
503 0, /* rightshift */
c94cb026 504 2, /* size */
07d6d2b8 505 16, /* bitsize */
0a1b45a2 506 false, /* pc_relative */
07d6d2b8
AM
507 0, /* bitpos */
508 complain_overflow_unsigned, /* complain_on_overflow */
509 bfd_elf_generic_reloc, /* special_function */
510 "R_CR16_SWITCH16", /* name */
0a1b45a2 511 false, /* partial_inplace */
07d6d2b8
AM
512 0x0, /* src_mask */
513 0xffff, /* dst_mask */
0a1b45a2 514 true), /* pcrel_offset */
7fac7ff4
NC
515
516 /* A 32 bit switch table entry. This is generated for an expression
517 such as ``.long L1 - L2''. The offset holds the difference
518 between the reloc address and L2. */
07d6d2b8
AM
519 HOWTO (R_CR16_SWITCH32, /* type */
520 0, /* rightshift */
c94cb026 521 4, /* size */
07d6d2b8 522 32, /* bitsize */
0a1b45a2 523 false, /* pc_relative */
07d6d2b8
AM
524 0, /* bitpos */
525 complain_overflow_unsigned, /* complain_on_overflow */
526 bfd_elf_generic_reloc, /* special_function */
527 "R_CR16_SWITCH32", /* name */
0a1b45a2 528 false, /* partial_inplace */
07d6d2b8
AM
529 0x0, /* src_mask */
530 0xffffffff, /* dst_mask */
0a1b45a2 531 true), /* pcrel_offset */
07d6d2b8
AM
532
533 HOWTO (R_CR16_GOT_REGREL20, /* type */
534 0, /* rightshift */
c94cb026 535 4, /* size */
07d6d2b8 536 20, /* bitsize */
0a1b45a2 537 false, /* pc_relative */
07d6d2b8
AM
538 0, /* bitpos */
539 complain_overflow_bitfield,/* complain_on_overflow */
540 bfd_elf_generic_reloc, /* special_function */
541 "R_CR16_GOT_REGREL20", /* name */
0a1b45a2 542 true, /* partial_inplace */
07d6d2b8
AM
543 0x0, /* src_mask */
544 0xfffff, /* dst_mask */
0a1b45a2 545 false), /* pcrel_offset */
07d6d2b8
AM
546
547 HOWTO (R_CR16_GOTC_REGREL20, /* type */
548 0, /* rightshift */
c94cb026 549 4, /* size */
07d6d2b8 550 20, /* bitsize */
0a1b45a2 551 false, /* pc_relative */
07d6d2b8
AM
552 0, /* bitpos */
553 complain_overflow_bitfield,/* complain_on_overflow */
554 bfd_elf_generic_reloc, /* special_function */
555 "R_CR16_GOTC_REGREL20", /* name */
0a1b45a2 556 true, /* partial_inplace */
07d6d2b8
AM
557 0x0, /* src_mask */
558 0xfffff, /* dst_mask */
0a1b45a2 559 false), /* pcrel_offset */
07d6d2b8
AM
560
561 HOWTO (R_CR16_GLOB_DAT, /* type */
562 0, /* rightshift */
c94cb026 563 4, /* size */
07d6d2b8 564 32, /* bitsize */
0a1b45a2 565 false, /* pc_relative */
07d6d2b8
AM
566 0, /* bitpos */
567 complain_overflow_unsigned, /* complain_on_overflow */
568 bfd_elf_generic_reloc, /* special_function */
569 "R_CR16_GLOB_DAT", /* name */
0a1b45a2 570 false, /* partial_inplace */
07d6d2b8
AM
571 0x0, /* src_mask */
572 0xffffffff, /* dst_mask */
0a1b45a2 573 true) /* pcrel_offset */
3d3d428f
NC
574};
575
99706f30
SR
576
577/* Create the GOT section. */
578
0a1b45a2 579static bool
99706f30
SR
580_bfd_cr16_elf_create_got_section (bfd * abfd, struct bfd_link_info * info)
581{
582 flagword flags;
583 asection * s;
584 struct elf_link_hash_entry * h;
585 const struct elf_backend_data * bed = get_elf_backend_data (abfd);
ce558b89 586 struct elf_link_hash_table *htab = elf_hash_table (info);
99706f30
SR
587 int ptralign;
588
589 /* This function may be called more than once. */
ce558b89 590 if (htab->sgot != NULL)
0a1b45a2 591 return true;
99706f30
SR
592
593 switch (bed->s->arch_size)
594 {
595 case 16:
596 ptralign = 1;
597 break;
598
599 case 32:
600 ptralign = 2;
601 break;
602
603 default:
604 bfd_set_error (bfd_error_bad_value);
0a1b45a2 605 return false;
99706f30
SR
606 }
607
608 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
07d6d2b8 609 | SEC_LINKER_CREATED);
99706f30 610
3d4d4302 611 s = bfd_make_section_anyway_with_flags (abfd, ".got", flags);
ce558b89 612 htab->sgot= s;
99706f30 613 if (s == NULL
fd361982 614 || !bfd_set_section_alignment (s, ptralign))
0a1b45a2 615 return false;
99706f30
SR
616
617 if (bed->want_got_plt)
618 {
3d4d4302 619 s = bfd_make_section_anyway_with_flags (abfd, ".got.plt", flags);
ce558b89 620 htab->sgotplt = s;
99706f30 621 if (s == NULL
fd361982 622 || !bfd_set_section_alignment (s, ptralign))
0a1b45a2 623 return false;
99706f30
SR
624 }
625
626 /* Define the symbol _GLOBAL_OFFSET_TABLE_ at the start of the .got
627 (or .got.plt) section. We don't do this in the linker script
628 because we don't want to define the symbol if we are not creating
629 a global offset table. */
630 h = _bfd_elf_define_linkage_sym (abfd, info, s, "_GLOBAL_OFFSET_TABLE_");
ce558b89 631 htab->hgot = h;
99706f30 632 if (h == NULL)
0a1b45a2 633 return false;
99706f30
SR
634
635 /* The first bit of the global offset table is the header. */
636 s->size += bed->got_header_size;
637
0a1b45a2 638 return true;
99706f30
SR
639}
640
641
3d3d428f
NC
642/* Retrieve a howto ptr using a BFD reloc_code. */
643
644static reloc_howto_type *
0aa13fee 645elf_cr16_reloc_type_lookup (bfd *abfd,
07d6d2b8 646 bfd_reloc_code_real_type code)
3d3d428f
NC
647{
648 unsigned int i;
649
650 for (i = 0; i < R_CR16_MAX; i++)
651 if (code == cr16_reloc_map[i].bfd_reloc_enum)
652 return &cr16_elf_howto_table[cr16_reloc_map[i].cr16_reloc_type];
653
0aa13fee
AM
654 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
655 abfd, code);
3d3d428f
NC
656 return NULL;
657}
658
659static reloc_howto_type *
660elf_cr16_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
07d6d2b8 661 const char *r_name)
3d3d428f
NC
662{
663 unsigned int i;
664
665 for (i = 0; ARRAY_SIZE (cr16_elf_howto_table); i++)
666 if (cr16_elf_howto_table[i].name != NULL
07d6d2b8 667 && strcasecmp (cr16_elf_howto_table[i].name, r_name) == 0)
3d3d428f
NC
668 return cr16_elf_howto_table + i;
669
670 return NULL;
671}
672
673/* Retrieve a howto ptr using an internal relocation entry. */
674
0a1b45a2 675static bool
0aa13fee 676elf_cr16_info_to_howto (bfd *abfd, arelent *cache_ptr,
07d6d2b8 677 Elf_Internal_Rela *dst)
3d3d428f
NC
678{
679 unsigned int r_type = ELF32_R_TYPE (dst->r_info);
680
cd21f5da
NC
681 if (r_type >= R_CR16_MAX)
682 {
695344c0 683 /* xgettext:c-format */
0aa13fee 684 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
4eca0228 685 abfd, r_type);
cd21f5da 686 bfd_set_error (bfd_error_bad_value);
0a1b45a2 687 return false;
cd21f5da 688 }
99706f30 689 cache_ptr->howto = cr16_elf_howto_table + r_type;
0a1b45a2 690 return true;
99706f30
SR
691}
692
693/* Look through the relocs for a section during the first phase.
694 Since we don't do .gots or .plts, we just need to consider the
695 virtual table relocs for gc. */
696
0a1b45a2 697static bool
99706f30 698cr16_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, asection *sec,
07d6d2b8 699 const Elf_Internal_Rela *relocs)
99706f30
SR
700{
701 Elf_Internal_Shdr *symtab_hdr;
702 Elf_Internal_Sym * isymbuf = NULL;
9bc8e54b 703 struct elf_link_hash_entry **sym_hashes;
99706f30
SR
704 const Elf_Internal_Rela *rel;
705 const Elf_Internal_Rela *rel_end;
706 bfd * dynobj;
707 bfd_vma * local_got_offsets;
708 asection * sgot;
709 asection * srelgot;
710
711 sgot = NULL;
712 srelgot = NULL;
0a1b45a2 713 bool result = false;
99706f30 714
0e1862bb 715 if (bfd_link_relocatable (info))
0a1b45a2 716 return true;
99706f30
SR
717
718 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
719 sym_hashes = elf_sym_hashes (abfd);
99706f30
SR
720
721 dynobj = elf_hash_table (info)->dynobj;
722 local_got_offsets = elf_local_got_offsets (abfd);
723 rel_end = relocs + sec->reloc_count;
724 for (rel = relocs; rel < rel_end; rel++)
725 {
726 struct elf_link_hash_entry *h;
727 unsigned long r_symndx;
728
729 r_symndx = ELF32_R_SYM (rel->r_info);
730 if (r_symndx < symtab_hdr->sh_info)
07d6d2b8 731 h = NULL;
99706f30 732 else
07d6d2b8
AM
733 {
734 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
735 while (h->root.type == bfd_link_hash_indirect
736 || h->root.type == bfd_link_hash_warning)
737 h = (struct elf_link_hash_entry *) h->root.u.i.link;
738 }
99706f30
SR
739
740 /* Some relocs require a global offset table. */
741 if (dynobj == NULL)
07d6d2b8
AM
742 {
743 switch (ELF32_R_TYPE (rel->r_info))
744 {
745 case R_CR16_GOT_REGREL20:
746 case R_CR16_GOTC_REGREL20:
747 elf_hash_table (info)->dynobj = dynobj = abfd;
748 if (! _bfd_cr16_elf_create_got_section (dynobj, info))
749 goto fail;
750 break;
751
752 default:
753 break;
754 }
755 }
99706f30
SR
756
757 switch (ELF32_R_TYPE (rel->r_info))
07d6d2b8
AM
758 {
759 case R_CR16_GOT_REGREL20:
760 case R_CR16_GOTC_REGREL20:
761 /* This symbol requires a global offset table entry. */
99706f30 762
ce558b89
AM
763 sgot = elf_hash_table (info)->sgot;
764 srelgot = elf_hash_table (info)->srelgot;
765 BFD_ASSERT (sgot != NULL && srelgot != NULL);
99706f30 766
07d6d2b8
AM
767 if (h != NULL)
768 {
769 if (h->got.offset != (bfd_vma) -1)
770 /* We have already allocated space in the .got. */
771 break;
772
773 h->got.offset = sgot->size;
774
775 /* Make sure this symbol is output as a dynamic symbol. */
776 if (h->dynindx == -1)
777 {
778 if (! bfd_elf_link_record_dynamic_symbol (info, h))
779 goto fail;
780 }
781
782 srelgot->size += sizeof (Elf32_External_Rela);
783 }
784 else
785 {
786 /* This is a global offset table entry for a local
787 symbol. */
788 if (local_got_offsets == NULL)
789 {
790 size_t size;
791 unsigned int i;
792
793 size = symtab_hdr->sh_info * sizeof (bfd_vma);
794 local_got_offsets = (bfd_vma *) bfd_alloc (abfd, size);
795
796 if (local_got_offsets == NULL)
797 goto fail;
798
799 elf_local_got_offsets (abfd) = local_got_offsets;
800
801 for (i = 0; i < symtab_hdr->sh_info; i++)
802 local_got_offsets[i] = (bfd_vma) -1;
803 }
804
805 if (local_got_offsets[r_symndx] != (bfd_vma) -1)
806 /* We have already allocated space in the .got. */
807 break;
808
809 local_got_offsets[r_symndx] = sgot->size;
810
811 if (bfd_link_executable (info))
812 /* If we are generating a shared object, we need to
813 output a R_CR16_RELATIVE reloc so that the dynamic
814 linker can adjust this GOT entry. */
815 srelgot->size += sizeof (Elf32_External_Rela);
816 }
817
818 sgot->size += 4;
819 break;
820
821 }
99706f30
SR
822 }
823
0a1b45a2 824 result = true;
c9594989
AM
825 fail:
826 free (isymbuf);
99706f30
SR
827
828 return result;
3d3d428f
NC
829}
830
831/* Perform a relocation as part of a final link. */
832
833static bfd_reloc_status_type
834cr16_elf_final_link_relocate (reloc_howto_type *howto,
07d6d2b8
AM
835 bfd *input_bfd,
836 bfd *output_bfd ATTRIBUTE_UNUSED,
837 asection *input_section,
838 bfd_byte *contents,
839 bfd_vma offset,
840 bfd_vma Rvalue,
841 bfd_vma addend,
842 struct elf_link_hash_entry * h,
843 unsigned long symndx ATTRIBUTE_UNUSED,
844 struct bfd_link_info *info ATTRIBUTE_UNUSED,
845 asection *sec ATTRIBUTE_UNUSED,
846 int is_local ATTRIBUTE_UNUSED)
3d3d428f
NC
847{
848 unsigned short r_type = howto->type;
849 bfd_byte *hit_data = contents + offset;
850 bfd_vma reloc_bits, check, Rvalue1;
99706f30 851
3d3d428f
NC
852 switch (r_type)
853 {
db75b8f7
AM
854 case R_CR16_IMM4:
855 case R_CR16_IMM20:
856 case R_CR16_ABS20:
857 break;
858
859 case R_CR16_IMM8:
860 case R_CR16_IMM16:
861 case R_CR16_IMM32:
862 case R_CR16_IMM32a:
863 case R_CR16_REGREL4:
864 case R_CR16_REGREL4a:
865 case R_CR16_REGREL14:
866 case R_CR16_REGREL14a:
867 case R_CR16_REGREL16:
868 case R_CR16_REGREL20:
869 case R_CR16_REGREL20a:
870 case R_CR16_GOT_REGREL20:
871 case R_CR16_GOTC_REGREL20:
872 case R_CR16_ABS24:
873 case R_CR16_DISP16:
874 case R_CR16_DISP24:
875 /* 'hit_data' is relative to the start of the instruction, not the
876 relocation offset. Advance it to account for the exact offset. */
877 hit_data += 2;
878 break;
879
880 case R_CR16_NONE:
881 return bfd_reloc_ok;
882 break;
883
884 case R_CR16_DISP4:
885 if (is_local)
07d6d2b8 886 Rvalue += -1;
db75b8f7 887 break;
7fac7ff4 888
db75b8f7
AM
889 case R_CR16_DISP8:
890 case R_CR16_DISP24a:
891 if (is_local)
07d6d2b8 892 Rvalue -= -1;
db75b8f7 893 break;
7fac7ff4 894
db75b8f7
AM
895 case R_CR16_SWITCH8:
896 case R_CR16_SWITCH16:
897 case R_CR16_SWITCH32:
898 /* We only care about the addend, where the difference between
899 expressions is kept. */
900 Rvalue = 0;
68ffbac6 901
db75b8f7
AM
902 default:
903 break;
3d3d428f
NC
904 }
905
906 if (howto->pc_relative)
907 {
908 /* Subtract the address of the section containing the location. */
909 Rvalue -= (input_section->output_section->vma
07d6d2b8 910 + input_section->output_offset);
3d3d428f
NC
911 /* Subtract the position of the location within the section. */
912 Rvalue -= offset;
913 }
914
915 /* Add in supplied addend. */
916 Rvalue += addend;
917
918 /* Complain if the bitfield overflows, whether it is considered
919 as signed or unsigned. */
920 check = Rvalue >> howto->rightshift;
921
34d8e6d0 922 reloc_bits = ((bfd_vma) 1 << (howto->bitsize - 1) << 1) - 1;
3d3d428f 923
99706f30
SR
924 /* For GOT and GOTC relocs no boundary checks applied. */
925 if (!((r_type == R_CR16_GOT_REGREL20)
db75b8f7 926 || (r_type == R_CR16_GOTC_REGREL20)))
3d3d428f 927 {
99706f30 928 if (((bfd_vma) check & ~reloc_bits) != 0
07d6d2b8 929 && (((bfd_vma) check & ~reloc_bits)
db75b8f7 930 != (-(bfd_vma) 1 & ~reloc_bits)))
07d6d2b8
AM
931 {
932 /* The above right shift is incorrect for a signed
933 value. See if turning on the upper bits fixes the
934 overflow. */
935 if (howto->rightshift && (bfd_signed_vma) Rvalue < 0)
936 {
db75b8f7
AM
937 check |= ((bfd_vma) -1
938 & ~((bfd_vma) -1 >> howto->rightshift));
07d6d2b8
AM
939
940 if (((bfd_vma) check & ~reloc_bits)
941 != (-(bfd_vma) 1 & ~reloc_bits))
db75b8f7 942 return bfd_reloc_overflow;
07d6d2b8
AM
943 }
944 else
945 return bfd_reloc_overflow;
946 }
3d3d428f 947
99706f30
SR
948 /* Drop unwanted bits from the value we are relocating to. */
949 Rvalue >>= (bfd_vma) howto->rightshift;
3d3d428f 950
99706f30
SR
951 /* Apply dst_mask to select only relocatable part of the insn. */
952 Rvalue &= howto->dst_mask;
953 }
3d3d428f 954
57698478 955 switch (bfd_get_reloc_size (howto))
3d3d428f 956 {
57698478 957 case 1:
db75b8f7
AM
958 if (r_type == R_CR16_DISP8)
959 {
960 Rvalue1 = bfd_get_16 (input_bfd, hit_data);
961 Rvalue = ((Rvalue1 & 0xf000) | ((Rvalue << 4) & 0xf00)
962 | (Rvalue1 & 0x00f0) | (Rvalue & 0xf));
963 bfd_put_16 (input_bfd, Rvalue, hit_data);
964 }
965 else if (r_type == R_CR16_IMM4)
966 {
967 Rvalue1 = bfd_get_16 (input_bfd, hit_data);
968 Rvalue = (((Rvalue1 & 0xff) << 8) | ((Rvalue << 4) & 0xf0)
969 | ((Rvalue1 & 0x0f00) >> 8));
970 bfd_put_16 (input_bfd, Rvalue, hit_data);
971 }
972 else if (r_type == R_CR16_DISP4)
973 {
974 Rvalue1 = bfd_get_16 (input_bfd, hit_data);
975 Rvalue = (Rvalue1 | ((Rvalue & 0xf) << 4));
976 bfd_put_16 (input_bfd, Rvalue, hit_data);
977 }
978 else
979 {
980 bfd_put_8 (input_bfd, (unsigned char) Rvalue, hit_data);
981 }
982 break;
983
57698478 984 case 2:
db75b8f7
AM
985 if (r_type == R_CR16_DISP16)
986 {
987 Rvalue |= (bfd_get_16 (input_bfd, hit_data));
988 Rvalue = ((Rvalue & 0xfffe) | ((Rvalue >> 16) & 0x1));
989 }
990 if (r_type == R_CR16_IMM16)
991 {
992 Rvalue1 = bfd_get_16 (input_bfd, hit_data);
993
994 Rvalue1 = (Rvalue1 ^ 0x8000) - 0x8000;
995 Rvalue += Rvalue1;
07d6d2b8 996
db75b8f7
AM
997 /* Check for range. */
998 if (Rvalue > 0xffff)
999 return bfd_reloc_overflow;
1000 }
07d6d2b8 1001
db75b8f7
AM
1002 bfd_put_16 (input_bfd, Rvalue, hit_data);
1003 break;
3d3d428f 1004
57698478 1005 case 4:
db75b8f7
AM
1006 if ((r_type == R_CR16_ABS20) || (r_type == R_CR16_IMM20))
1007 {
1008 Rvalue1 = (bfd_get_16 (input_bfd, hit_data + 2)
1009 | (((bfd_get_16 (input_bfd, hit_data) & 0xf) << 16)));
07d6d2b8 1010
db75b8f7
AM
1011 Rvalue1 = (Rvalue1 ^ 0x80000) - 0x80000;
1012 Rvalue += Rvalue1;
07d6d2b8 1013
db75b8f7
AM
1014 /* Check for range. */
1015 if (Rvalue > 0xfffff)
1016 return bfd_reloc_overflow;
07d6d2b8 1017
db75b8f7
AM
1018 bfd_put_16 (input_bfd, ((bfd_get_16 (input_bfd, hit_data) & 0xfff0)
1019 | ((Rvalue >> 16) & 0xf)), hit_data);
1020 bfd_put_16 (input_bfd, (Rvalue) & 0xffff, hit_data + 2);
1021 }
1022 else if (r_type == R_CR16_GOT_REGREL20)
1023 {
1024 asection *sgot = elf_hash_table (info)->sgot;
1025 bfd_vma off;
1026
1027 if (h != NULL)
1028 {
1029 off = h->got.offset;
1030 BFD_ASSERT (off != (bfd_vma) -1);
1031
1032 if (! elf_hash_table (info)->dynamic_sections_created
1033 || SYMBOL_REFERENCES_LOCAL (info, h))
1034 /* This is actually a static link, or it is a
1035 -Bsymbolic link and the symbol is defined
1036 locally, or the symbol was forced to be local
1037 because of a version file. We must initialize
1038 this entry in the global offset table.
1039 When doing a dynamic link, we create a .rela.got
1040 relocation entry to initialize the value. This
1041 is done in the finish_dynamic_symbol routine. */
1042 bfd_put_32 (output_bfd, Rvalue, sgot->contents + off);
1043 }
1044 else
1045 {
1046 off = elf_local_got_offsets (input_bfd)[symndx];
1047 bfd_put_32 (output_bfd, Rvalue, sgot->contents + off);
1048 }
1049
1050 Rvalue = sgot->output_offset + off;
1051 Rvalue += addend;
1052
1053 /* REVISIT: if ((long) Rvalue > 0xffffff ||
1054 (long) Rvalue < -0x800000). */
1055 if (Rvalue > 0xffffff)
1056 return bfd_reloc_overflow;
07d6d2b8 1057
07d6d2b8 1058
db75b8f7
AM
1059 bfd_put_16 (input_bfd, (bfd_get_16 (input_bfd, hit_data))
1060 | (((Rvalue >> 16) & 0xf) << 8), hit_data);
1061 bfd_put_16 (input_bfd, (Rvalue) & 0xffff, hit_data + 2);
07d6d2b8 1062
db75b8f7
AM
1063 }
1064 else if (r_type == R_CR16_GOTC_REGREL20)
1065 {
1066 asection *sgot = elf_hash_table (info)->sgot;
1067 bfd_vma off;
1068
1069 if (h != NULL)
1070 {
1071 off = h->got.offset;
1072 BFD_ASSERT (off != (bfd_vma) -1);
1073
1074 Rvalue >>= 1; /* For code symbols. */
1075
1076 if (! elf_hash_table (info)->dynamic_sections_created
1077 || SYMBOL_REFERENCES_LOCAL (info, h))
1078 /* This is actually a static link, or it is a
1079 -Bsymbolic link and the symbol is defined
1080 locally, or the symbol was forced to be local
1081 because of a version file. We must initialize
1082 this entry in the global offset table.
1083 When doing a dynamic link, we create a .rela.got
1084 relocation entry to initialize the value. This
1085 is done in the finish_dynamic_symbol routine. */
1086 bfd_put_32 (output_bfd, Rvalue, sgot->contents + off);
1087 }
1088 else
1089 {
1090 off = elf_local_got_offsets (input_bfd)[symndx];
1091 Rvalue >>= 1;
1092 bfd_put_32 (output_bfd, Rvalue, sgot->contents + off);
1093 }
07d6d2b8 1094
db75b8f7
AM
1095 Rvalue = sgot->output_offset + off;
1096 Rvalue += addend;
07d6d2b8 1097
db75b8f7
AM
1098 /* Check if any value in DISP. */
1099 Rvalue1 = bfd_get_32 (input_bfd, hit_data);
1100 Rvalue1 = ((Rvalue1 >> 16) | ((Rvalue1 & 0xfff) >> 8 << 16));
07d6d2b8 1101
db75b8f7
AM
1102 Rvalue1 = (Rvalue1 ^ 0x80000) - 0x80000;
1103 Rvalue += Rvalue1;
07d6d2b8 1104
db75b8f7
AM
1105 /* Check for range. */
1106 /* REVISIT: if ((long) Rvalue > 0xffffff
1107 || (long) Rvalue < -0x800000). */
1108 if (Rvalue > 0xffffff)
1109 return bfd_reloc_overflow;
07d6d2b8 1110
db75b8f7
AM
1111 bfd_put_16 (input_bfd, (bfd_get_16 (input_bfd, hit_data))
1112 | (((Rvalue >> 16) & 0xf) << 8), hit_data);
1113 bfd_put_16 (input_bfd, (Rvalue) & 0xffff, hit_data + 2);
1114 }
1115 else
1116 {
1117 if (r_type == R_CR16_ABS24)
1118 {
1119 Rvalue1 = bfd_get_32 (input_bfd, hit_data);
1120 Rvalue1 = ((Rvalue1 >> 16)
1121 | ((Rvalue1 & 0xfff) >> 8 << 16)
1122 | ((Rvalue1 & 0xf) << 20));
07d6d2b8 1123
db75b8f7
AM
1124 Rvalue1 = (Rvalue1 ^ 0x800000) - 0x800000;
1125 Rvalue += Rvalue1;
07d6d2b8 1126
db75b8f7
AM
1127 /* Check for Range. */
1128 if (Rvalue > 0xffffff)
1129 return bfd_reloc_overflow;
07d6d2b8 1130
db75b8f7
AM
1131 Rvalue = ((((Rvalue >> 20) & 0xf) | (((Rvalue >> 16) & 0xf)<<8)
1132 | (bfd_get_32 (input_bfd, hit_data) & 0xf0f0))
1133 | ((Rvalue & 0xffff) << 16));
1134 }
1135 else if (r_type == R_CR16_DISP24)
1136 {
1137 Rvalue = ((((Rvalue >> 20)& 0xf) | (((Rvalue >>16) & 0xf)<<8)
1138 | (bfd_get_16 (input_bfd, hit_data)))
1139 | (((Rvalue & 0xfffe) | ((Rvalue >> 24) & 0x1)) << 16));
1140 }
1141 else if ((r_type == R_CR16_IMM32) || (r_type == R_CR16_IMM32a))
1142 {
1143 Rvalue1 = bfd_get_32 (input_bfd, hit_data);
1144 Rvalue1 = (((Rvalue1 >> 16) & 0xffff)
1145 | ((Rvalue1 & 0xffff) << 16));
07d6d2b8 1146
db75b8f7
AM
1147 Rvalue1 = (Rvalue1 ^ 0x80000000) - 0x80000000;
1148 Rvalue += Rvalue1;
07d6d2b8 1149
db75b8f7
AM
1150 /* Check for range. */
1151 if (Rvalue > 0xffffffff)
1152 return bfd_reloc_overflow;
07d6d2b8 1153
db75b8f7
AM
1154 Rvalue = (((Rvalue >> 16) & 0xffff) | (Rvalue & 0xffff) << 16);
1155 }
1156 else if (r_type == R_CR16_DISP24a)
1157 {
1158 Rvalue = (((Rvalue & 0xfffffe) | (Rvalue >> 23)));
1159 Rvalue = (((Rvalue >> 16) & 0xff) | ((Rvalue & 0xffff) << 16)
1160 | bfd_get_32 (input_bfd, hit_data));
1161 }
1162 else if ((r_type == R_CR16_REGREL20)
1163 || (r_type == R_CR16_REGREL20a))
1164 {
1165 Rvalue1 = bfd_get_32 (input_bfd, hit_data);
1166 Rvalue1 = (((Rvalue1 >> 16) & 0xffff)
1167 | ((Rvalue1 & 0xfff) >> 8 << 16));
07d6d2b8 1168
db75b8f7
AM
1169 Rvalue1 = (Rvalue1 ^ 0x80000) - 0x80000;
1170 Rvalue += Rvalue1;
07d6d2b8
AM
1171
1172 /* Check for range. */
db75b8f7
AM
1173 if (Rvalue > 0xfffff)
1174 return bfd_reloc_overflow;
1175
1176 Rvalue = (((((Rvalue >> 20) & 0xf) | (((Rvalue >> 16) & 0xf) << 8)
1177 | ((Rvalue & 0xffff) << 16)))
1178 | (bfd_get_32 (input_bfd, hit_data) & 0xf0ff));
1179
1180 }
1181 else if (r_type == R_CR16_NUM32)
1182 {
1183 Rvalue1 = (bfd_get_32 (input_bfd, hit_data));
1184
1185 Rvalue1 = (Rvalue1 ^ 0x80000000) - 0x80000000;
1186 Rvalue += Rvalue1;
1187
1188 /* Check for Range. */
1189 if (Rvalue > 0xffffffff)
1190 return bfd_reloc_overflow;
1191 }
1192
1193 bfd_put_32 (input_bfd, Rvalue, hit_data);
1194 }
1195 break;
1196
1197 default:
1198 return bfd_reloc_notsupported;
3d3d428f
NC
1199 }
1200
1201 return bfd_reloc_ok;
1202}
1203
1204/* Delete some bytes from a section while relaxing. */
1205
0a1b45a2 1206static bool
3d3d428f 1207elf32_cr16_relax_delete_bytes (struct bfd_link_info *link_info, bfd *abfd,
07d6d2b8 1208 asection *sec, bfd_vma addr, int count)
3d3d428f
NC
1209{
1210 Elf_Internal_Shdr *symtab_hdr;
1211 unsigned int sec_shndx;
1212 bfd_byte *contents;
1213 Elf_Internal_Rela *irel, *irelend;
3d3d428f
NC
1214 bfd_vma toaddr;
1215 Elf_Internal_Sym *isym;
1216 Elf_Internal_Sym *isymend;
1217 struct elf_link_hash_entry **sym_hashes;
1218 struct elf_link_hash_entry **end_hashes;
1219 struct elf_link_hash_entry **start_hashes;
1220 unsigned int symcount;
1221
1222 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1223
1224 contents = elf_section_data (sec)->this_hdr.contents;
1225
3d3d428f
NC
1226 toaddr = sec->size;
1227
1228 irel = elf_section_data (sec)->relocs;
1229 irelend = irel + sec->reloc_count;
1230
1231 /* Actually delete the bytes. */
1232 memmove (contents + addr, contents + addr + count,
07d6d2b8 1233 (size_t) (toaddr - addr - count));
3d3d428f
NC
1234 sec->size -= count;
1235
1236 /* Adjust all the relocs. */
1237 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1238 /* Get the new reloc address. */
1239 if ((irel->r_offset > addr && irel->r_offset < toaddr))
db75b8f7 1240 irel->r_offset -= count;
3d3d428f
NC
1241
1242 /* Adjust the local symbols defined in this section. */
1243 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1244 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1245 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
1246 {
1247 if (isym->st_shndx == sec_shndx
07d6d2b8
AM
1248 && isym->st_value > addr
1249 && isym->st_value < toaddr)
1250 {
1251 /* Adjust the addend of SWITCH relocations in this section,
1252 which reference this local symbol. */
99706f30 1253#if 0
07d6d2b8
AM
1254 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1255 {
1256 unsigned long r_symndx;
1257 Elf_Internal_Sym *rsym;
1258 bfd_vma addsym, subsym;
1259
1260 /* Skip if not a SWITCH relocation. */
1261 if (ELF32_R_TYPE (irel->r_info) != (int) R_CR16_SWITCH8
1262 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_SWITCH16
1263 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_SWITCH32)
db75b8f7 1264 continue;
07d6d2b8
AM
1265
1266 r_symndx = ELF32_R_SYM (irel->r_info);
1267 rsym = (Elf_Internal_Sym *) symtab_hdr->contents + r_symndx;
1268
1269 /* Skip if not the local adjusted symbol. */
1270 if (rsym != isym)
1271 continue;
1272
1273 addsym = isym->st_value;
1274 subsym = addsym - irel->r_addend;
1275
1276 /* Fix the addend only when -->> (addsym > addr >= subsym). */
1277 if (subsym <= addr)
1278 irel->r_addend -= count;
1279 else
1280 continue;
1281 }
99706f30 1282#endif
3d3d428f 1283
07d6d2b8
AM
1284 isym->st_value -= count;
1285 }
3d3d428f
NC
1286 }
1287
1288 /* Now adjust the global symbols defined in this section. */
1289 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
db75b8f7 1290 - symtab_hdr->sh_info);
3d3d428f
NC
1291 sym_hashes = start_hashes = elf_sym_hashes (abfd);
1292 end_hashes = sym_hashes + symcount;
1293
1294 for (; sym_hashes < end_hashes; sym_hashes++)
1295 {
1296 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1297
1298 /* The '--wrap SYMBOL' option is causing a pain when the object file,
07d6d2b8
AM
1299 containing the definition of __wrap_SYMBOL, includes a direct
1300 call to SYMBOL as well. Since both __wrap_SYMBOL and SYMBOL reference
1301 the same symbol (which is __wrap_SYMBOL), but still exist as two
1302 different symbols in 'sym_hashes', we don't want to adjust
1303 the global symbol __wrap_SYMBOL twice.
1304 This check is only relevant when symbols are being wrapped. */
3d3d428f 1305 if (link_info->wrap_hash != NULL)
07d6d2b8
AM
1306 {
1307 struct elf_link_hash_entry **cur_sym_hashes;
1308
1309 /* Loop only over the symbols whom been already checked. */
1310 for (cur_sym_hashes = start_hashes; cur_sym_hashes < sym_hashes;
1311 cur_sym_hashes++)
1312 /* If the current symbol is identical to 'sym_hash', that means
1313 the symbol was already adjusted (or at least checked). */
1314 if (*cur_sym_hashes == sym_hash)
1315 break;
1316
1317 /* Don't adjust the symbol again. */
1318 if (cur_sym_hashes < sym_hashes)
1319 continue;
1320 }
3d3d428f
NC
1321
1322 if ((sym_hash->root.type == bfd_link_hash_defined
db75b8f7 1323 || sym_hash->root.type == bfd_link_hash_defweak)
07d6d2b8
AM
1324 && sym_hash->root.u.def.section == sec
1325 && sym_hash->root.u.def.value > addr
1326 && sym_hash->root.u.def.value < toaddr)
1327 sym_hash->root.u.def.value -= count;
3d3d428f
NC
1328 }
1329
0a1b45a2 1330 return true;
3d3d428f
NC
1331}
1332
1333/* Relocate a CR16 ELF section. */
1334
0f684201 1335static int
3d3d428f 1336elf32_cr16_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
07d6d2b8
AM
1337 bfd *input_bfd, asection *input_section,
1338 bfd_byte *contents, Elf_Internal_Rela *relocs,
1339 Elf_Internal_Sym *local_syms,
1340 asection **local_sections)
3d3d428f
NC
1341{
1342 Elf_Internal_Shdr *symtab_hdr;
1343 struct elf_link_hash_entry **sym_hashes;
1344 Elf_Internal_Rela *rel, *relend;
1345
3d3d428f
NC
1346 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1347 sym_hashes = elf_sym_hashes (input_bfd);
1348
1349 rel = relocs;
1350 relend = relocs + input_section->reloc_count;
1351 for (; rel < relend; rel++)
1352 {
1353 int r_type;
1354 reloc_howto_type *howto;
1355 unsigned long r_symndx;
1356 Elf_Internal_Sym *sym;
1357 asection *sec;
1358 struct elf_link_hash_entry *h;
1359 bfd_vma relocation;
1360 bfd_reloc_status_type r;
1361
1362 r_symndx = ELF32_R_SYM (rel->r_info);
1363 r_type = ELF32_R_TYPE (rel->r_info);
1364 howto = cr16_elf_howto_table + (r_type);
1365
1366 h = NULL;
1367 sym = NULL;
1368 sec = NULL;
1369 if (r_symndx < symtab_hdr->sh_info)
07d6d2b8
AM
1370 {
1371 sym = local_syms + r_symndx;
1372 sec = local_sections[r_symndx];
1373 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
1374 }
3d3d428f 1375 else
07d6d2b8 1376 {
0a1b45a2 1377 bool unresolved_reloc, warned, ignored;
3d3d428f 1378
07d6d2b8
AM
1379 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
1380 r_symndx, symtab_hdr, sym_hashes,
1381 h, sec, relocation,
1382 unresolved_reloc, warned, ignored);
1383 }
3d3d428f 1384
dbaa2011 1385 if (sec != NULL && discarded_section (sec))
e4067dbb 1386 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 1387 rel, 1, relend, howto, 0, contents);
1004c3e1 1388
0e1862bb 1389 if (bfd_link_relocatable (info))
07d6d2b8 1390 continue;
1004c3e1 1391
3d3d428f 1392 r = cr16_elf_final_link_relocate (howto, input_bfd, output_bfd,
07d6d2b8
AM
1393 input_section,
1394 contents, rel->r_offset,
1395 relocation, rel->r_addend,
1396 (struct elf_link_hash_entry *) h,
1397 r_symndx,
1398 info, sec, h == NULL);
3d3d428f
NC
1399
1400 if (r != bfd_reloc_ok)
07d6d2b8
AM
1401 {
1402 const char *name;
1403 const char *msg = NULL;
1404
1405 if (h != NULL)
1406 name = h->root.root.string;
1407 else
1408 {
1409 name = (bfd_elf_string_from_elf_section
1410 (input_bfd, symtab_hdr->sh_link, sym->st_name));
1411 if (name == NULL || *name == '\0')
fd361982 1412 name = bfd_section_name (sec);
07d6d2b8
AM
1413 }
1414
1415 switch (r)
1416 {
db75b8f7
AM
1417 case bfd_reloc_overflow:
1418 (*info->callbacks->reloc_overflow)
1419 (info, (h ? &h->root : NULL), name, howto->name,
1420 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
1421 break;
1422
1423 case bfd_reloc_undefined:
1424 (*info->callbacks->undefined_symbol)
0a1b45a2 1425 (info, name, input_bfd, input_section, rel->r_offset, true);
db75b8f7
AM
1426 break;
1427
1428 case bfd_reloc_outofrange:
1429 msg = _("internal error: out of range error");
1430 goto common_error;
1431
1432 case bfd_reloc_notsupported:
1433 msg = _("internal error: unsupported relocation error");
1434 goto common_error;
1435
1436 case bfd_reloc_dangerous:
1437 msg = _("internal error: dangerous error");
1438 goto common_error;
1439
1440 default:
1441 msg = _("internal error: unknown error");
1442 /* Fall through. */
1443
1444 common_error:
1445 (*info->callbacks->warning) (info, msg, name, input_bfd,
1446 input_section, rel->r_offset);
1447 break;
07d6d2b8
AM
1448 }
1449 }
3d3d428f
NC
1450 }
1451
0a1b45a2 1452 return true;
3d3d428f
NC
1453}
1454
1455/* This is a version of bfd_generic_get_relocated_section_contents
1456 which uses elf32_cr16_relocate_section. */
1457
1458static bfd_byte *
1459elf32_cr16_get_relocated_section_contents (bfd *output_bfd,
07d6d2b8
AM
1460 struct bfd_link_info *link_info,
1461 struct bfd_link_order *link_order,
1462 bfd_byte *data,
0a1b45a2 1463 bool relocatable,
07d6d2b8 1464 asymbol **symbols)
3d3d428f
NC
1465{
1466 Elf_Internal_Shdr *symtab_hdr;
1467 asection *input_section = link_order->u.indirect.section;
1468 bfd *input_bfd = input_section->owner;
1469 asection **sections = NULL;
1470 Elf_Internal_Rela *internal_relocs = NULL;
1471 Elf_Internal_Sym *isymbuf = NULL;
1472
1473 /* We only need to handle the case of relaxing, or of having a
1474 particular set of section contents, specially. */
1475 if (relocatable
1476 || elf_section_data (input_section)->this_hdr.contents == NULL)
1477 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
07d6d2b8
AM
1478 link_order, data,
1479 relocatable,
1480 symbols);
3d3d428f
NC
1481
1482 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1483
56ba7527
AM
1484 bfd_byte *orig_data = data;
1485 if (data == NULL)
1486 {
1487 data = bfd_malloc (input_section->size);
1488 if (data == NULL)
1489 return NULL;
1490 }
3d3d428f 1491 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
07d6d2b8 1492 (size_t) input_section->size);
3d3d428f
NC
1493
1494 if ((input_section->flags & SEC_RELOC) != 0
1495 && input_section->reloc_count > 0)
1496 {
1497 Elf_Internal_Sym *isym;
1498 Elf_Internal_Sym *isymend;
1499 asection **secpp;
1500 bfd_size_type amt;
1501
1502 internal_relocs = _bfd_elf_link_read_relocs (input_bfd, input_section,
0a1b45a2 1503 NULL, NULL, false);
3d3d428f 1504 if (internal_relocs == NULL)
07d6d2b8 1505 goto error_return;
3d3d428f
NC
1506
1507 if (symtab_hdr->sh_info != 0)
07d6d2b8
AM
1508 {
1509 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1510 if (isymbuf == NULL)
1511 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
1512 symtab_hdr->sh_info, 0,
1513 NULL, NULL, NULL);
1514 if (isymbuf == NULL)
1515 goto error_return;
1516 }
3d3d428f
NC
1517
1518 amt = symtab_hdr->sh_info;
1519 amt *= sizeof (asection *);
1520 sections = bfd_malloc (amt);
1521 if (sections == NULL && amt != 0)
07d6d2b8 1522 goto error_return;
3d3d428f
NC
1523
1524 isymend = isymbuf + symtab_hdr->sh_info;
1525 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
07d6d2b8
AM
1526 {
1527 asection *isec;
3d3d428f 1528
07d6d2b8
AM
1529 if (isym->st_shndx == SHN_UNDEF)
1530 isec = bfd_und_section_ptr;
1531 else if (isym->st_shndx == SHN_ABS)
1532 isec = bfd_abs_section_ptr;
1533 else if (isym->st_shndx == SHN_COMMON)
1534 isec = bfd_com_section_ptr;
1535 else
1536 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
3d3d428f 1537
07d6d2b8
AM
1538 *secpp = isec;
1539 }
3d3d428f
NC
1540
1541 if (! elf32_cr16_relocate_section (output_bfd, link_info, input_bfd,
db75b8f7
AM
1542 input_section, data, internal_relocs,
1543 isymbuf, sections))
07d6d2b8 1544 goto error_return;
3d3d428f 1545
c9594989
AM
1546 free (sections);
1547 if (symtab_hdr->contents != (unsigned char *) isymbuf)
07d6d2b8 1548 free (isymbuf);
3d3d428f 1549 if (elf_section_data (input_section)->relocs != internal_relocs)
07d6d2b8 1550 free (internal_relocs);
3d3d428f
NC
1551 }
1552
1553 return data;
1554
1555 error_return:
c9594989
AM
1556 free (sections);
1557 if (symtab_hdr->contents != (unsigned char *) isymbuf)
3d3d428f 1558 free (isymbuf);
c9594989 1559 if (elf_section_data (input_section)->relocs != internal_relocs)
3d3d428f 1560 free (internal_relocs);
56ba7527
AM
1561 if (orig_data == NULL)
1562 free (data);
3d3d428f
NC
1563 return NULL;
1564}
1565
99706f30
SR
1566/* Assorted hash table functions. */
1567
1568/* Initialize an entry in the link hash table. */
1569
1570/* Create an entry in an CR16 ELF linker hash table. */
1571
1572static struct bfd_hash_entry *
1573elf32_cr16_link_hash_newfunc (struct bfd_hash_entry *entry,
07d6d2b8
AM
1574 struct bfd_hash_table *table,
1575 const char *string)
99706f30
SR
1576{
1577 struct elf32_cr16_link_hash_entry *ret =
1578 (struct elf32_cr16_link_hash_entry *) entry;
1579
1580 /* Allocate the structure if it has not already been allocated by a
1581 subclass. */
1582 if (ret == (struct elf32_cr16_link_hash_entry *) NULL)
1583 ret = ((struct elf32_cr16_link_hash_entry *)
07d6d2b8
AM
1584 bfd_hash_allocate (table,
1585 sizeof (struct elf32_cr16_link_hash_entry)));
99706f30
SR
1586 if (ret == (struct elf32_cr16_link_hash_entry *) NULL)
1587 return (struct bfd_hash_entry *) ret;
1588
1589 /* Call the allocation method of the superclass. */
1590 ret = ((struct elf32_cr16_link_hash_entry *)
07d6d2b8
AM
1591 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
1592 table, string));
99706f30
SR
1593 if (ret != (struct elf32_cr16_link_hash_entry *) NULL)
1594 {
1595 ret->direct_calls = 0;
1596 ret->stack_size = 0;
1597 ret->movm_args = 0;
1598 ret->movm_stack_size = 0;
1599 ret->flags = 0;
1600 ret->value = 0;
1601 }
1602
1603 return (struct bfd_hash_entry *) ret;
1604}
1605
1606/* Create an cr16 ELF linker hash table. */
1607
1608static struct bfd_link_hash_table *
1609elf32_cr16_link_hash_table_create (bfd *abfd)
1610{
4dfe6ac6 1611 struct elf_link_hash_table *ret;
986f0783 1612 size_t amt = sizeof (struct elf_link_hash_table);
99706f30 1613
7bf52ea2 1614 ret = (struct elf_link_hash_table *) bfd_zmalloc (amt);
4dfe6ac6 1615 if (ret == (struct elf_link_hash_table *) NULL)
99706f30
SR
1616 return NULL;
1617
4dfe6ac6 1618 if (!_bfd_elf_link_hash_table_init (ret, abfd,
07d6d2b8
AM
1619 elf32_cr16_link_hash_newfunc,
1620 sizeof (struct elf32_cr16_link_hash_entry),
4dfe6ac6 1621 GENERIC_ELF_DATA))
99706f30
SR
1622 {
1623 free (ret);
1624 return NULL;
1625 }
1626
4dfe6ac6 1627 return &ret->root;
99706f30
SR
1628}
1629
99706f30
SR
1630static unsigned long
1631elf_cr16_mach (flagword flags)
1632{
1633 switch (flags)
1634 {
db75b8f7
AM
1635 case EM_CR16:
1636 default:
99706f30
SR
1637 return bfd_mach_cr16;
1638 }
1639}
1640
1641/* The final processing done just before writing out a CR16 ELF object
1642 file. This gets the CR16 architecture right based on the machine
1643 number. */
1644
0a1b45a2 1645static bool
cc364be6 1646_bfd_cr16_elf_final_write_processing (bfd *abfd)
99706f30
SR
1647{
1648 unsigned long val;
1649 switch (bfd_get_mach (abfd))
1650 {
db75b8f7
AM
1651 default:
1652 case bfd_mach_cr16:
1653 val = EM_CR16;
1654 break;
99706f30 1655 }
cc364be6
AM
1656 elf_elfheader (abfd)->e_flags |= val;
1657 return _bfd_elf_final_write_processing (abfd);
99706f30
SR
1658}
1659
1660
0a1b45a2 1661static bool
99706f30
SR
1662_bfd_cr16_elf_object_p (bfd *abfd)
1663{
1664 bfd_default_set_arch_mach (abfd, bfd_arch_cr16,
07d6d2b8 1665 elf_cr16_mach (elf_elfheader (abfd)->e_flags));
0a1b45a2 1666 return true;
99706f30
SR
1667}
1668
1669/* Merge backend specific data from an object file to the output
1670 object file when linking. */
1671
0a1b45a2 1672static bool
50e03d47 1673_bfd_cr16_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
99706f30 1674{
50e03d47
AM
1675 bfd *obfd = info->output_bfd;
1676
99706f30
SR
1677 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
1678 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
0a1b45a2 1679 return true;
99706f30
SR
1680
1681 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
1682 && bfd_get_mach (obfd) < bfd_get_mach (ibfd))
1683 {
1684 if (! bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
07d6d2b8 1685 bfd_get_mach (ibfd)))
0a1b45a2 1686 return false;
db75b8f7 1687 }
99706f30 1688
0a1b45a2 1689 return true;
99706f30
SR
1690}
1691
1692
3d3d428f
NC
1693/* This function handles relaxing for the CR16.
1694
1695 There's quite a few relaxing opportunites available on the CR16:
1696
07d6d2b8
AM
1697 * bcond:24 -> bcond:16 1 byte
1698 * bcond:16 -> bcond:8 1 byte
1699 * arithmetic imm32 -> arithmetic imm20 12 bits
1700 * arithmetic imm20/imm16 -> arithmetic imm4 12/16 bits
3d3d428f
NC
1701
1702 Symbol- and reloc-reading infrastructure copied from elf-m10200.c. */
1703
0a1b45a2 1704static bool
3d3d428f 1705elf32_cr16_relax_section (bfd *abfd, asection *sec,
0a1b45a2 1706 struct bfd_link_info *link_info, bool *again)
3d3d428f
NC
1707{
1708 Elf_Internal_Shdr *symtab_hdr;
1709 Elf_Internal_Rela *internal_relocs;
1710 Elf_Internal_Rela *irel, *irelend;
1711 bfd_byte *contents = NULL;
1712 Elf_Internal_Sym *isymbuf = NULL;
1713
1714 /* Assume nothing changes. */
0a1b45a2 1715 *again = false;
3d3d428f
NC
1716
1717 /* We don't have to do anything for a relocatable link, if
1718 this section does not have relocs, or if this is not a
1719 code section. */
0e1862bb 1720 if (bfd_link_relocatable (link_info)
3d3d428f 1721 || sec->reloc_count == 0
3a574cce
AM
1722 || (sec->flags & SEC_RELOC) == 0
1723 || (sec->flags & SEC_HAS_CONTENTS) == 0
3d3d428f 1724 || (sec->flags & SEC_CODE) == 0)
0a1b45a2 1725 return true;
3d3d428f
NC
1726
1727 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1728
1729 /* Get a copy of the native relocations. */
1730 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
07d6d2b8 1731 link_info->keep_memory);
3d3d428f
NC
1732 if (internal_relocs == NULL)
1733 goto error_return;
1734
1735 /* Walk through them looking for relaxing opportunities. */
1736 irelend = internal_relocs + sec->reloc_count;
1737 for (irel = internal_relocs; irel < irelend; irel++)
1738 {
1739 bfd_vma symval;
1740
1741 /* If this isn't something that can be relaxed, then ignore
07d6d2b8 1742 this reloc. */
3d3d428f 1743 if (ELF32_R_TYPE (irel->r_info) != (int) R_CR16_DISP16
07d6d2b8
AM
1744 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_DISP24
1745 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_IMM32
1746 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_IMM20
1747 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_IMM16)
1748 continue;
3d3d428f
NC
1749
1750 /* Get the section contents if we haven't done so already. */
1751 if (contents == NULL)
07d6d2b8
AM
1752 {
1753 /* Get cached copy if it exists. */
1754 if (elf_section_data (sec)->this_hdr.contents != NULL)
1755 contents = elf_section_data (sec)->this_hdr.contents;
1756 /* Go get them off disk. */
1757 else if (!bfd_malloc_and_get_section (abfd, sec, &contents))
1758 goto error_return;
1759 }
3d3d428f
NC
1760
1761 /* Read this BFD's local symbols if we haven't done so already. */
1762 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
07d6d2b8
AM
1763 {
1764 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1765 if (isymbuf == NULL)
1766 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
1767 symtab_hdr->sh_info, 0,
1768 NULL, NULL, NULL);
1769 if (isymbuf == NULL)
1770 goto error_return;
1771 }
3d3d428f
NC
1772
1773 /* Get the value of the symbol referred to by the reloc. */
1774 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
07d6d2b8
AM
1775 {
1776 /* A local symbol. */
1777 Elf_Internal_Sym *isym;
1778 asection *sym_sec;
1779
1780 isym = isymbuf + ELF32_R_SYM (irel->r_info);
1781 if (isym->st_shndx == SHN_UNDEF)
1782 sym_sec = bfd_und_section_ptr;
1783 else if (isym->st_shndx == SHN_ABS)
1784 sym_sec = bfd_abs_section_ptr;
1785 else if (isym->st_shndx == SHN_COMMON)
1786 sym_sec = bfd_com_section_ptr;
1787 else
1788 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
1789 symval = (isym->st_value
1790 + sym_sec->output_section->vma
1791 + sym_sec->output_offset);
1792 }
3d3d428f 1793 else
07d6d2b8
AM
1794 {
1795 unsigned long indx;
1796 struct elf_link_hash_entry *h;
1797
1798 /* An external symbol. */
1799 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
1800 h = elf_sym_hashes (abfd)[indx];
1801 BFD_ASSERT (h != NULL);
1802
1803 if (h->root.type != bfd_link_hash_defined
1804 && h->root.type != bfd_link_hash_defweak)
1805 /* This appears to be a reference to an undefined
1806 symbol. Just ignore it--it will be caught by the
1807 regular reloc processing. */
1808 continue;
1809
1810 symval = (h->root.u.def.value
1811 + h->root.u.def.section->output_section->vma
1812 + h->root.u.def.section->output_offset);
1813 }
3d3d428f
NC
1814
1815 /* For simplicity of coding, we are going to modify the section
07d6d2b8
AM
1816 contents, the section relocs, and the BFD symbol table. We
1817 must tell the rest of the code not to free up this
1818 information. It would be possible to instead create a table
1819 of changes which have to be made, as is done in coff-mips.c;
1820 that would be more work, but would require less memory when
1821 the linker is run. */
3d3d428f
NC
1822
1823 /* Try to turn a 24 branch/call into a 16bit relative
07d6d2b8 1824 branch/call. */
3d3d428f 1825 if (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_DISP24)
07d6d2b8
AM
1826 {
1827 bfd_vma value = symval;
1828
1829 /* Deal with pc-relative gunk. */
1830 value -= (sec->output_section->vma + sec->output_offset);
1831 value -= irel->r_offset;
1832 value += irel->r_addend;
1833
1834 /* See if the value will fit in 16 bits, note the high value is
1835 0xfffe + 2 as the target will be two bytes closer if we are
1836 able to relax. */
1837 if ((long) value < 0x10000 && (long) value > -0x10002)
1838 {
1839 unsigned int code;
1840
1841 /* Get the opcode. */
db75b8f7
AM
1842 code = (unsigned int) bfd_get_32 (abfd,
1843 contents + irel->r_offset);
07d6d2b8
AM
1844
1845 /* Verify it's a 'bcond' and fix the opcode. */
1846 if ((code & 0xffff) == 0x0010)
db75b8f7
AM
1847 bfd_put_16 (abfd, 0x1800 | ((0xf & (code >> 20)) << 4),
1848 contents + irel->r_offset);
07d6d2b8
AM
1849 else
1850 continue;
1851
1852 /* Note that we've changed the relocs, section contents, etc. */
1853 elf_section_data (sec)->relocs = internal_relocs;
1854 elf_section_data (sec)->this_hdr.contents = contents;
1855 symtab_hdr->contents = (unsigned char *) isymbuf;
1856
1857 /* Fix the relocation's type. */
1858 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1859 R_CR16_DISP16);
1860
1861 /* Delete two bytes of data. */
1862 if (!elf32_cr16_relax_delete_bytes (link_info, abfd, sec,
db75b8f7 1863 irel->r_offset + 2, 2))
07d6d2b8
AM
1864 goto error_return;
1865
1866 /* That will change things, so, we should relax again.
1867 Note that this is not required, and it may be slow. */
0a1b45a2 1868 *again = true;
07d6d2b8
AM
1869 }
1870 }
3d3d428f 1871
99706f30 1872 /* Try to turn a 16bit pc-relative branch into an
07d6d2b8 1873 8bit pc-relative branch. */
3d3d428f 1874 if (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_DISP16)
07d6d2b8
AM
1875 {
1876 bfd_vma value = symval;
1877
1878 /* Deal with pc-relative gunk. */
1879 value -= (sec->output_section->vma + sec->output_offset);
1880 value -= irel->r_offset;
1881 value += irel->r_addend;
1882
1883 /* See if the value will fit in 8 bits, note the high value is
1884 0xfc + 2 as the target will be two bytes closer if we are
1885 able to relax. */
1886 /*if ((long) value < 0x1fa && (long) value > -0x100) REVISIT:range */
1887 if ((long) value < 0xfa && (long) value > -0x100)
1888 {
1889 unsigned short code;
1890
1891 /* Get the opcode. */
db75b8f7 1892 code = bfd_get_16 (abfd, contents + irel->r_offset);
07d6d2b8
AM
1893
1894 /* Verify it's a 'bcond' and fix the opcode. */
1895 if ((code & 0xff0f) == 0x1800)
1896 bfd_put_16 (abfd, (code & 0xf0f0), contents + irel->r_offset);
1897 else
1898 continue;
1899
1900 /* Note that we've changed the relocs, section contents, etc. */
1901 elf_section_data (sec)->relocs = internal_relocs;
1902 elf_section_data (sec)->this_hdr.contents = contents;
1903 symtab_hdr->contents = (unsigned char *) isymbuf;
1904
1905 /* Fix the relocation's type. */
1906 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1907 R_CR16_DISP8);
1908
1909 /* Delete two bytes of data. */
1910 if (!elf32_cr16_relax_delete_bytes (link_info, abfd, sec,
db75b8f7 1911 irel->r_offset + 2, 2))
07d6d2b8
AM
1912 goto error_return;
1913
1914 /* That will change things, so, we should relax again.
1915 Note that this is not required, and it may be slow. */
0a1b45a2 1916 *again = true;
07d6d2b8
AM
1917 }
1918 }
3d3d428f 1919
99706f30 1920 /* Try to turn a 32-bit IMM address into a 20/16-bit IMM address */
3d3d428f 1921 if (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_IMM32)
07d6d2b8
AM
1922 {
1923 bfd_vma value = symval;
1924 unsigned short is_add_mov = 0;
1925 bfd_vma value1 = 0;
1926
1927 /* Get the existing value from the mcode */
db75b8f7
AM
1928 value1 = bfd_get_32 (abfd, contents + irel->r_offset + 2);
1929 value1 = (value1 >> 16) | ((value1 & 0xffff) << 16);
07d6d2b8
AM
1930
1931 /* See if the value will fit in 20 bits. */
1932 if ((long) (value + value1) < 0xfffff && (long) (value + value1) > 0)
1933 {
1934 unsigned short code;
1935
1936 /* Get the opcode. */
db75b8f7 1937 code = bfd_get_16 (abfd, contents + irel->r_offset);
07d6d2b8
AM
1938
1939 /* Verify it's a 'arithmetic ADDD or MOVD instruction'.
1940 For ADDD and MOVD only, convert to IMM32 -> IMM20. */
1941
1942 if (((code & 0xfff0) == 0x0070) || ((code & 0xfff0) == 0x0020))
db75b8f7 1943 is_add_mov = 1;
07d6d2b8
AM
1944
1945 if (is_add_mov)
1946 {
1947 /* Note that we've changed the relocs, section contents,
1948 etc. */
1949 elf_section_data (sec)->relocs = internal_relocs;
1950 elf_section_data (sec)->this_hdr.contents = contents;
1951 symtab_hdr->contents = (unsigned char *) isymbuf;
1952
1953 /* Fix the opcode. */
1954 if ((code & 0xfff0) == 0x0070) /* For movd. */
1955 bfd_put_8 (abfd, 0x05, contents + irel->r_offset + 1);
1956 else /* code == 0x0020 for addd. */
1957 bfd_put_8 (abfd, 0x04, contents + irel->r_offset + 1);
1958
1959 bfd_put_8 (abfd, (code & 0xf) << 4, contents + irel->r_offset);
1960
1961 /* If existing value is nagavive adjust approriately
1962 place the 16-20bits (ie 4 bit) in new opcode,
1963 as the 0xffffxxxx, the higher 2 byte values removed. */
1964 if (value1 & 0x80000000)
db75b8f7
AM
1965 bfd_put_8 (abfd,
1966 (0x0f | (bfd_get_8 (abfd,
1967 contents + irel->r_offset))),
1968 contents + irel->r_offset);
07d6d2b8 1969 else
db75b8f7
AM
1970 bfd_put_8 (abfd,
1971 (((value1 >> 16) & 0xf)
1972 | (bfd_get_8 (abfd,
1973 contents + irel->r_offset))),
1974 contents + irel->r_offset);
07d6d2b8
AM
1975
1976 /* Fix the relocation's type. */
1977 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1978 R_CR16_IMM20);
1979
1980 /* Delete two bytes of data. */
1981 if (!elf32_cr16_relax_delete_bytes (link_info, abfd, sec,
1982 irel->r_offset + 2, 2))
1983 goto error_return;
1984
1985 /* That will change things, so, we should relax again.
1986 Note that this is not required, and it may be slow. */
0a1b45a2 1987 *again = true;
07d6d2b8
AM
1988 }
1989 }
1990
1991 /* See if the value will fit in 16 bits. */
1992 if ((!is_add_mov)
1993 && ((long)(value + value1) < 0x7fff && (long)(value + value1) > 0))
1994 {
1995 unsigned short code;
1996
1997 /* Get the opcode. */
db75b8f7 1998 code = bfd_get_16 (abfd, contents + irel->r_offset);
07d6d2b8
AM
1999
2000 /* Note that we've changed the relocs, section contents, etc. */
2001 elf_section_data (sec)->relocs = internal_relocs;
2002 elf_section_data (sec)->this_hdr.contents = contents;
2003 symtab_hdr->contents = (unsigned char *) isymbuf;
2004
2005 /* Fix the opcode. */
2006 if ((code & 0xf0) == 0x70) /* For movd. */
2007 bfd_put_8 (abfd, 0x54, contents + irel->r_offset + 1);
2008 else if ((code & 0xf0) == 0x20) /* For addd. */
2009 bfd_put_8 (abfd, 0x60, contents + irel->r_offset + 1);
2010 else if ((code & 0xf0) == 0x90) /* For cmpd. */
2011 bfd_put_8 (abfd, 0x56, contents + irel->r_offset + 1);
2012 else
2013 continue;
2014
2015 bfd_put_8 (abfd, 0xb0 | (code & 0xf), contents + irel->r_offset);
2016
2017 /* If existing value is nagavive adjust approriately
2018 place the 12-16bits (ie 4 bit) in new opcode,
2019 as the 0xfffffxxx, the higher 2 byte values removed. */
2020 if (value1 & 0x80000000)
db75b8f7
AM
2021 bfd_put_8 (abfd,
2022 (0x0f | (bfd_get_8 (abfd,
2023 contents + irel->r_offset))),
2024 contents + irel->r_offset);
07d6d2b8
AM
2025 else
2026 bfd_put_16 (abfd, value1, contents + irel->r_offset + 2);
2027
2028
2029 /* Fix the relocation's type. */
2030 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
2031 R_CR16_IMM16);
2032
2033 /* Delete two bytes of data. */
2034 if (!elf32_cr16_relax_delete_bytes (link_info, abfd, sec,
2035 irel->r_offset + 2, 2))
2036 goto error_return;
2037
2038 /* That will change things, so, we should relax again.
2039 Note that this is not required, and it may be slow. */
0a1b45a2 2040 *again = true;
07d6d2b8
AM
2041 }
2042 }
7fac7ff4 2043
99706f30
SR
2044#if 0
2045 /* Try to turn a 16bit immediate address into a 4bit
07d6d2b8 2046 immediate address. */
68ffbac6 2047 if ((ELF32_R_TYPE (irel->r_info) == (int) R_CR16_IMM20)
07d6d2b8
AM
2048 || (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_IMM16))
2049 {
2050 bfd_vma value = symval;
2051 bfd_vma value1 = 0;
2052
2053 /* Get the existing value from the mcode */
2054 value1 = ((bfd_get_16 (abfd, contents + irel->r_offset + 2) & 0xffff));
2055
2056 if (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_IMM20)
2057 {
db75b8f7
AM
2058 value1 |= ((bfd_get_16 (abfd, contents + irel->r_offset + 1)
2059 & 0xf000) << 0x4);
07d6d2b8
AM
2060 }
2061
2062 /* See if the value will fit in 4 bits. */
2063 if ((((long) (value + value1)) < 0xf)
2064 && (((long) (value + value1)) > 0))
2065 {
2066 unsigned short code;
2067
2068 /* Get the opcode. */
db75b8f7 2069 code = bfd_get_16 (abfd, contents + irel->r_offset);
07d6d2b8
AM
2070
2071 /* Note that we've changed the relocs, section contents, etc. */
2072 elf_section_data (sec)->relocs = internal_relocs;
2073 elf_section_data (sec)->this_hdr.contents = contents;
2074 symtab_hdr->contents = (unsigned char *) isymbuf;
2075
2076 /* Fix the opcode. */
2077 if (((code & 0x0f00) == 0x0400) || ((code & 0x0f00) == 0x0500))
2078 {
2079 if ((code & 0x0f00) == 0x0400) /* For movd imm20. */
2080 bfd_put_8 (abfd, 0x60, contents + irel->r_offset);
2081 else /* For addd imm20. */
2082 bfd_put_8 (abfd, 0x54, contents + irel->r_offset);
db75b8f7
AM
2083 bfd_put_8 (abfd, (code & 0xf0) >> 4,
2084 contents + irel->r_offset + 1);
07d6d2b8
AM
2085 }
2086 else
2087 {
2088 if ((code & 0xfff0) == 0x56b0) /* For cmpd imm16. */
2089 bfd_put_8 (abfd, 0x56, contents + irel->r_offset);
2090 else if ((code & 0xfff0) == 0x54b0) /* For movd imm16. */
2091 bfd_put_8 (abfd, 0x54, contents + irel->r_offset);
2092 else if ((code & 0xfff0) == 0x58b0) /* For movb imm16. */
2093 bfd_put_8 (abfd, 0x58, contents + irel->r_offset);
2094 else if ((code & 0xfff0) == 0x5Ab0) /* For movw imm16. */
2095 bfd_put_8 (abfd, 0x5A, contents + irel->r_offset);
2096 else if ((code & 0xfff0) == 0x60b0) /* For addd imm16. */
2097 bfd_put_8 (abfd, 0x60, contents + irel->r_offset);
2098 else if ((code & 0xfff0) == 0x30b0) /* For addb imm16. */
2099 bfd_put_8 (abfd, 0x30, contents + irel->r_offset);
2100 else if ((code & 0xfff0) == 0x2Cb0) /* For addub imm16. */
2101 bfd_put_8 (abfd, 0x2C, contents + irel->r_offset);
2102 else if ((code & 0xfff0) == 0x32b0) /* For adduw imm16. */
2103 bfd_put_8 (abfd, 0x32, contents + irel->r_offset);
2104 else if ((code & 0xfff0) == 0x38b0) /* For subb imm16. */
2105 bfd_put_8 (abfd, 0x38, contents + irel->r_offset);
2106 else if ((code & 0xfff0) == 0x3Cb0) /* For subcb imm16. */
2107 bfd_put_8 (abfd, 0x3C, contents + irel->r_offset);
2108 else if ((code & 0xfff0) == 0x3Fb0) /* For subcw imm16. */
2109 bfd_put_8 (abfd, 0x3F, contents + irel->r_offset);
2110 else if ((code & 0xfff0) == 0x3Ab0) /* For subw imm16. */
2111 bfd_put_8 (abfd, 0x3A, contents + irel->r_offset);
2112 else if ((code & 0xfff0) == 0x50b0) /* For cmpb imm16. */
2113 bfd_put_8 (abfd, 0x50, contents + irel->r_offset);
2114 else if ((code & 0xfff0) == 0x52b0) /* For cmpw imm16. */
2115 bfd_put_8 (abfd, 0x52, contents + irel->r_offset);
2116 else
2117 continue;
2118
2119 bfd_put_8 (abfd, (code & 0xf), contents + irel->r_offset + 1);
2120 }
2121
2122 /* Fix the relocation's type. */
2123 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
2124 R_CR16_IMM4);
2125
2126 /* Delete two bytes of data. */
2127 if (!elf32_cr16_relax_delete_bytes (link_info, abfd, sec,
2128 irel->r_offset + 2, 2))
2129 goto error_return;
2130
2131 /* That will change things, so, we should relax again.
2132 Note that this is not required, and it may be slow. */
0a1b45a2 2133 *again = true;
07d6d2b8
AM
2134 }
2135 }
99706f30 2136#endif
3d3d428f
NC
2137 }
2138
2139 if (isymbuf != NULL
2140 && symtab_hdr->contents != (unsigned char *) isymbuf)
2141 {
2142 if (! link_info->keep_memory)
07d6d2b8 2143 free (isymbuf);
3d3d428f 2144 else
db75b8f7
AM
2145 /* Cache the symbols for elf_link_input_bfd. */
2146 symtab_hdr->contents = (unsigned char *) isymbuf;
3d3d428f
NC
2147 }
2148
2149 if (contents != NULL
2150 && elf_section_data (sec)->this_hdr.contents != contents)
2151 {
2152 if (! link_info->keep_memory)
07d6d2b8 2153 free (contents);
3d3d428f 2154 else
db75b8f7
AM
2155 /* Cache the section contents for elf_link_input_bfd. */
2156 elf_section_data (sec)->this_hdr.contents = contents;
68ffbac6 2157
3d3d428f
NC
2158 }
2159
c9594989 2160 if (elf_section_data (sec)->relocs != internal_relocs)
3d3d428f
NC
2161 free (internal_relocs);
2162
0a1b45a2 2163 return true;
3d3d428f
NC
2164
2165 error_return:
c9594989 2166 if (symtab_hdr->contents != (unsigned char *) isymbuf)
3d3d428f 2167 free (isymbuf);
c9594989 2168 if (elf_section_data (sec)->this_hdr.contents != contents)
3d3d428f 2169 free (contents);
c9594989 2170 if (elf_section_data (sec)->relocs != internal_relocs)
3d3d428f
NC
2171 free (internal_relocs);
2172
0a1b45a2 2173 return false;
3d3d428f
NC
2174}
2175
2176static asection *
2177elf32_cr16_gc_mark_hook (asection *sec,
07d6d2b8
AM
2178 struct bfd_link_info *info,
2179 Elf_Internal_Rela *rel,
2180 struct elf_link_hash_entry *h,
2181 Elf_Internal_Sym *sym)
3d3d428f 2182{
fb34365b 2183 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
3d3d428f
NC
2184}
2185
99706f30
SR
2186/* Create dynamic sections when linking against a dynamic object. */
2187
0a1b45a2 2188static bool
99706f30
SR
2189_bfd_cr16_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
2190{
2191 flagword flags;
2192 asection * s;
2193 const struct elf_backend_data * bed = get_elf_backend_data (abfd);
ce558b89 2194 struct elf_link_hash_table *htab = elf_hash_table (info);
99706f30
SR
2195 int ptralign = 0;
2196
2197 switch (bed->s->arch_size)
2198 {
2199 case 16:
2200 ptralign = 1;
2201 break;
2202
2203 case 32:
2204 ptralign = 2;
2205 break;
2206
2207 default:
2208 bfd_set_error (bfd_error_bad_value);
0a1b45a2 2209 return false;
99706f30
SR
2210 }
2211
2212 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
2213 .rel[a].bss sections. */
2214
2215 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
07d6d2b8 2216 | SEC_LINKER_CREATED);
99706f30 2217
3d4d4302
AM
2218 s = bfd_make_section_anyway_with_flags (abfd,
2219 (bed->default_use_rela_p
2220 ? ".rela.plt" : ".rel.plt"),
2221 flags | SEC_READONLY);
ce558b89 2222 htab->srelplt = s;
99706f30 2223 if (s == NULL
fd361982 2224 || !bfd_set_section_alignment (s, ptralign))
0a1b45a2 2225 return false;
99706f30
SR
2226
2227 if (! _bfd_cr16_elf_create_got_section (abfd, info))
0a1b45a2 2228 return false;
99706f30 2229
99706f30
SR
2230 if (bed->want_dynbss)
2231 {
2232 /* The .dynbss section is a place to put symbols which are defined
07d6d2b8
AM
2233 by dynamic objects, are referenced by regular objects, and are
2234 not functions. We must allocate space for them in the process
2235 image and use a R_*_COPY reloc to tell the dynamic linker to
2236 initialize them at run time. The linker script puts the .dynbss
2237 section into the .bss section of the final image. */
3d4d4302
AM
2238 s = bfd_make_section_anyway_with_flags (abfd, ".dynbss",
2239 SEC_ALLOC | SEC_LINKER_CREATED);
99706f30 2240 if (s == NULL)
0a1b45a2 2241 return false;
99706f30
SR
2242
2243 /* The .rel[a].bss section holds copy relocs. This section is not
07d6d2b8
AM
2244 normally needed. We need to create it here, though, so that the
2245 linker will map it to an output section. We can't just create it
2246 only if we need it, because we will not know whether we need it
2247 until we have seen all the input files, and the first time the
2248 main linker code calls BFD after examining all the input files
2249 (size_dynamic_sections) the input sections have already been
2250 mapped to the output sections. If the section turns out not to
2251 be needed, we can discard it later. We will never need this
2252 section when generating a shared object, since they do not use
2253 copy relocs. */
0e1862bb 2254 if (! bfd_link_executable (info))
07d6d2b8
AM
2255 {
2256 s = bfd_make_section_anyway_with_flags (abfd,
3d4d4302
AM
2257 (bed->default_use_rela_p
2258 ? ".rela.bss" : ".rel.bss"),
2259 flags | SEC_READONLY);
07d6d2b8 2260 if (s == NULL
fd361982 2261 || !bfd_set_section_alignment (s, ptralign))
0a1b45a2 2262 return false;
07d6d2b8 2263 }
99706f30
SR
2264 }
2265
0a1b45a2 2266 return true;
99706f30
SR
2267}
2268\f
2269/* Adjust a symbol defined by a dynamic object and referenced by a
2270 regular object. The current definition is in some section of the
2271 dynamic object, but we're not including those sections. We have to
2272 change the definition to something the rest of the link can
2273 understand. */
2274
0a1b45a2 2275static bool
99706f30 2276_bfd_cr16_elf_adjust_dynamic_symbol (struct bfd_link_info * info,
07d6d2b8 2277 struct elf_link_hash_entry * h)
99706f30
SR
2278{
2279 bfd * dynobj;
2280 asection * s;
2281
2282 dynobj = elf_hash_table (info)->dynobj;
2283
2284 /* Make sure we know what is going on here. */
2285 BFD_ASSERT (dynobj != NULL
07d6d2b8
AM
2286 && (h->needs_plt
2287 || h->is_weakalias
2288 || (h->def_dynamic
2289 && h->ref_regular
2290 && !h->def_regular)));
99706f30
SR
2291
2292 /* If this is a function, put it in the procedure linkage table. We
2293 will fill in the contents of the procedure linkage table later,
2294 when we know the address of the .got section. */
2295 if (h->type == STT_FUNC
2296 || h->needs_plt)
2297 {
0e1862bb 2298 if (! bfd_link_executable (info)
07d6d2b8
AM
2299 && !h->def_dynamic
2300 && !h->ref_dynamic)
2301 {
2302 /* This case can occur if we saw a PLT reloc in an input
2303 file, but the symbol was never referred to by a dynamic
2304 object. In such a case, we don't actually need to build
2305 a procedure linkage table, and we can just do a REL32
2306 reloc instead. */
2307 BFD_ASSERT (h->needs_plt);
0a1b45a2 2308 return true;
07d6d2b8 2309 }
99706f30
SR
2310
2311 /* Make sure this symbol is output as a dynamic symbol. */
2312 if (h->dynindx == -1)
07d6d2b8
AM
2313 {
2314 if (! bfd_elf_link_record_dynamic_symbol (info, h))
0a1b45a2 2315 return false;
07d6d2b8 2316 }
99706f30
SR
2317
2318 /* We also need to make an entry in the .got.plt section, which
07d6d2b8 2319 will be placed in the .got section by the linker script. */
99706f30 2320
ce558b89 2321 s = elf_hash_table (info)->sgotplt;
99706f30
SR
2322 BFD_ASSERT (s != NULL);
2323 s->size += 4;
2324
2325 /* We also need to make an entry in the .rela.plt section. */
2326
ce558b89 2327 s = elf_hash_table (info)->srelplt;
99706f30
SR
2328 BFD_ASSERT (s != NULL);
2329 s->size += sizeof (Elf32_External_Rela);
2330
0a1b45a2 2331 return true;
99706f30
SR
2332 }
2333
2334 /* If this is a weak symbol, and there is a real definition, the
2335 processor independent code will have arranged for us to see the
2336 real definition first, and we can just use the same value. */
60d67dc8 2337 if (h->is_weakalias)
99706f30 2338 {
60d67dc8
AM
2339 struct elf_link_hash_entry *def = weakdef (h);
2340 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
2341 h->root.u.def.section = def->root.u.def.section;
2342 h->root.u.def.value = def->root.u.def.value;
0a1b45a2 2343 return true;
99706f30
SR
2344 }
2345
2346 /* This is a reference to a symbol defined by a dynamic object which
2347 is not a function. */
2348
2349 /* If we are creating a shared library, we must presume that the
2350 only references to the symbol are via the global offset table.
2351 For such cases we need not do anything here; the relocations will
2352 be handled correctly by relocate_section. */
0e1862bb 2353 if (bfd_link_executable (info))
0a1b45a2 2354 return true;
99706f30
SR
2355
2356 /* If there are no references to this symbol that do not use the
2357 GOT, we don't need to generate a copy reloc. */
2358 if (!h->non_got_ref)
0a1b45a2 2359 return true;
99706f30 2360
99706f30
SR
2361 /* We must allocate the symbol in our .dynbss section, which will
2362 become part of the .bss section of the executable. There will be
2363 an entry for this symbol in the .dynsym section. The dynamic
2364 object will contain position independent code, so all references
2365 from the dynamic object to this symbol will go through the global
2366 offset table. The dynamic linker will use the .dynsym entry to
2367 determine the address it must put in the global offset table, so
2368 both the dynamic object and the regular object will refer to the
2369 same memory location for the variable. */
2370
3d4d4302 2371 s = bfd_get_linker_section (dynobj, ".dynbss");
99706f30
SR
2372 BFD_ASSERT (s != NULL);
2373
2374 /* We must generate a R_CR16_COPY reloc to tell the dynamic linker to
2375 copy the initial value out of the dynamic object and into the
2376 runtime process image. We need to remember the offset into the
2377 .rela.bss section we are going to use. */
1d7e9d18 2378 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
99706f30
SR
2379 {
2380 asection * srel;
2381
3d4d4302 2382 srel = bfd_get_linker_section (dynobj, ".rela.bss");
99706f30
SR
2383 BFD_ASSERT (srel != NULL);
2384 srel->size += sizeof (Elf32_External_Rela);
2385 h->needs_copy = 1;
2386 }
2387
6cabe1ea 2388 return _bfd_elf_adjust_dynamic_copy (info, h, s);
99706f30
SR
2389}
2390
2391/* Set the sizes of the dynamic sections. */
2392
0a1b45a2 2393static bool
af969b14
AM
2394_bfd_cr16_elf_late_size_sections (bfd * output_bfd,
2395 struct bfd_link_info * info)
99706f30
SR
2396{
2397 bfd * dynobj;
2398 asection * s;
0a1b45a2 2399 bool relocs;
99706f30
SR
2400
2401 dynobj = elf_hash_table (info)->dynobj;
af969b14
AM
2402 if (dynobj == NULL)
2403 return true;
99706f30
SR
2404
2405 if (elf_hash_table (info)->dynamic_sections_created)
2406 {
2407 /* Set the contents of the .interp section to the interpreter. */
9b8b325a 2408 if (bfd_link_executable (info) && !info->nointerp)
07d6d2b8 2409 {
99706f30 2410#if 0
07d6d2b8
AM
2411 s = bfd_get_linker_section (dynobj, ".interp");
2412 BFD_ASSERT (s != NULL);
2413 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
2414 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
99706f30 2415#endif
07d6d2b8 2416 }
99706f30
SR
2417 }
2418 else
2419 {
2420 /* We may have created entries in the .rela.got section.
07d6d2b8
AM
2421 However, if we are not creating the dynamic sections, we will
2422 not actually use these entries. Reset the size of .rela.got,
2423 which will cause it to get stripped from the output file
2424 below. */
ce558b89 2425 s = elf_hash_table (info)->srelgot;
99706f30 2426 if (s != NULL)
07d6d2b8 2427 s->size = 0;
99706f30
SR
2428 }
2429
2430 /* The check_relocs and adjust_dynamic_symbol entry points have
2431 determined the sizes of the various dynamic sections. Allocate
2432 memory for them. */
0a1b45a2 2433 relocs = false;
99706f30
SR
2434 for (s = dynobj->sections; s != NULL; s = s->next)
2435 {
2436 const char * name;
2437
2438 if ((s->flags & SEC_LINKER_CREATED) == 0)
07d6d2b8 2439 continue;
99706f30
SR
2440
2441 /* It's OK to base decisions on the section name, because none
07d6d2b8 2442 of the dynobj section names depend upon the input files. */
fd361982 2443 name = bfd_section_name (s);
99706f30
SR
2444
2445 if (strcmp (name, ".plt") == 0)
07d6d2b8
AM
2446 {
2447 /* Remember whether there is a PLT. */
3084d7a2 2448 ;
07d6d2b8 2449 }
08dedd66 2450 else if (startswith (name, ".rela"))
07d6d2b8
AM
2451 {
2452 if (s->size != 0)
2453 {
07d6d2b8
AM
2454 /* Remember whether there are any reloc sections other
2455 than .rela.plt. */
2456 if (strcmp (name, ".rela.plt") != 0)
0a1b45a2 2457 relocs = true;
07d6d2b8
AM
2458
2459 /* We use the reloc_count field as a counter if we need
2460 to copy relocs into the output file. */
2461 s->reloc_count = 0;
2462 }
2463 }
08dedd66 2464 else if (! startswith (name, ".got")
07d6d2b8
AM
2465 && strcmp (name, ".dynbss") != 0)
2466 /* It's not one of our sections, so don't allocate space. */
2467 continue;
99706f30
SR
2468
2469 if (s->size == 0)
07d6d2b8
AM
2470 {
2471 /* If we don't need this section, strip it from the
2472 output file. This is mostly to handle .rela.bss and
2473 .rela.plt. We must create both sections in
2474 create_dynamic_sections, because they must be created
2475 before the linker maps input sections to output
2476 sections. The linker does that before
2477 adjust_dynamic_symbol is called, and it is that
2478 function which decides whether anything needs to go
2479 into these sections. */
2480 s->flags |= SEC_EXCLUDE;
2481 continue;
2482 }
2483
db75b8f7
AM
2484 if ((s->flags & SEC_HAS_CONTENTS) == 0)
2485 continue;
99706f30
SR
2486
2487 /* Allocate memory for the section contents. We use bfd_zalloc
07d6d2b8
AM
2488 here in case unused entries are not reclaimed before the
2489 section's contents are written out. This should not happen,
2490 but this way if it does, we get a R_CR16_NONE reloc
2491 instead of garbage. */
99706f30
SR
2492 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
2493 if (s->contents == NULL)
0a1b45a2 2494 return false;
99706f30
SR
2495 }
2496
3084d7a2 2497 return _bfd_elf_add_dynamic_tags (output_bfd, info, relocs);
99706f30
SR
2498}
2499
2500/* Finish up dynamic symbol handling. We set the contents of various
2501 dynamic sections here. */
2502
0a1b45a2 2503static bool
99706f30 2504_bfd_cr16_elf_finish_dynamic_symbol (bfd * output_bfd,
07d6d2b8
AM
2505 struct bfd_link_info * info,
2506 struct elf_link_hash_entry * h,
2507 Elf_Internal_Sym * sym)
99706f30
SR
2508{
2509 bfd * dynobj;
2510
2511 dynobj = elf_hash_table (info)->dynobj;
2512
2513 if (h->got.offset != (bfd_vma) -1)
2514 {
07d6d2b8
AM
2515 asection * sgot;
2516 asection * srel;
99706f30
SR
2517 Elf_Internal_Rela rel;
2518
2519 /* This symbol has an entry in the global offset table. Set it up. */
2520
ce558b89
AM
2521 sgot = elf_hash_table (info)->sgot;
2522 srel = elf_hash_table (info)->srelgot;
99706f30
SR
2523 BFD_ASSERT (sgot != NULL && srel != NULL);
2524
2525 rel.r_offset = (sgot->output_section->vma
07d6d2b8
AM
2526 + sgot->output_offset
2527 + (h->got.offset & ~1));
99706f30
SR
2528
2529 /* If this is a -Bsymbolic link, and the symbol is defined
07d6d2b8
AM
2530 locally, we just want to emit a RELATIVE reloc. Likewise if
2531 the symbol was forced to be local because of a version file.
2532 The entry in the global offset table will already have been
2533 initialized in the relocate_section function. */
0e1862bb 2534 if (bfd_link_executable (info)
07d6d2b8
AM
2535 && (info->symbolic || h->dynindx == -1)
2536 && h->def_regular)
2537 {
2538 rel.r_info = ELF32_R_INFO (0, R_CR16_GOT_REGREL20);
2539 rel.r_addend = (h->root.u.def.value
2540 + h->root.u.def.section->output_section->vma
2541 + h->root.u.def.section->output_offset);
2542 }
99706f30 2543 else
07d6d2b8
AM
2544 {
2545 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + h->got.offset);
2546 rel.r_info = ELF32_R_INFO (h->dynindx, R_CR16_GOT_REGREL20);
2547 rel.r_addend = 0;
2548 }
99706f30
SR
2549
2550 bfd_elf32_swap_reloca_out (output_bfd, &rel,
07d6d2b8
AM
2551 (bfd_byte *) ((Elf32_External_Rela *) srel->contents
2552 + srel->reloc_count));
99706f30
SR
2553 ++ srel->reloc_count;
2554 }
2555
2556 if (h->needs_copy)
2557 {
07d6d2b8 2558 asection * s;
99706f30
SR
2559 Elf_Internal_Rela rel;
2560
2561 /* This symbol needs a copy reloc. Set it up. */
2562 BFD_ASSERT (h->dynindx != -1
07d6d2b8
AM
2563 && (h->root.type == bfd_link_hash_defined
2564 || h->root.type == bfd_link_hash_defweak));
99706f30 2565
3d4d4302 2566 s = bfd_get_linker_section (dynobj, ".rela.bss");
99706f30
SR
2567 BFD_ASSERT (s != NULL);
2568
2569 rel.r_offset = (h->root.u.def.value
07d6d2b8
AM
2570 + h->root.u.def.section->output_section->vma
2571 + h->root.u.def.section->output_offset);
99706f30
SR
2572 rel.r_info = ELF32_R_INFO (h->dynindx, R_CR16_GOT_REGREL20);
2573 rel.r_addend = 0;
2574 bfd_elf32_swap_reloca_out (output_bfd, &rel,
07d6d2b8
AM
2575 (bfd_byte *) ((Elf32_External_Rela *) s->contents
2576 + s->reloc_count));
db75b8f7 2577 ++ s->reloc_count;
99706f30
SR
2578 }
2579
2580 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
9637f6ef 2581 if (h == elf_hash_table (info)->hdynamic
99706f30
SR
2582 || h == elf_hash_table (info)->hgot)
2583 sym->st_shndx = SHN_ABS;
2584
0a1b45a2 2585 return true;
99706f30
SR
2586}
2587
2588/* Finish up the dynamic sections. */
2589
0a1b45a2 2590static bool
99706f30 2591_bfd_cr16_elf_finish_dynamic_sections (bfd * output_bfd,
07d6d2b8 2592 struct bfd_link_info * info)
99706f30
SR
2593{
2594 bfd * dynobj;
2595 asection * sgot;
2596 asection * sdyn;
2597
2598 dynobj = elf_hash_table (info)->dynobj;
2599
ce558b89 2600 sgot = elf_hash_table (info)->sgotplt;
99706f30 2601 BFD_ASSERT (sgot != NULL);
3d4d4302 2602 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
99706f30
SR
2603
2604 if (elf_hash_table (info)->dynamic_sections_created)
2605 {
2606 Elf32_External_Dyn * dyncon;
2607 Elf32_External_Dyn * dynconend;
2608
2609 BFD_ASSERT (sdyn != NULL);
2610
2611 dyncon = (Elf32_External_Dyn *) sdyn->contents;
2612 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
2613
2614 for (; dyncon < dynconend; dyncon++)
07d6d2b8
AM
2615 {
2616 Elf_Internal_Dyn dyn;
2617 asection * s;
2618
2619 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
2620
2621 switch (dyn.d_tag)
2622 {
2623 default:
2624 break;
2625
2626 case DT_PLTGOT:
2627 s = elf_hash_table (info)->sgotplt;
2628 goto get_vma;
2629
2630 case DT_JMPREL:
2631 s = elf_hash_table (info)->srelplt;
2632 get_vma:
2633 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
2634 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
2635 break;
2636
2637 case DT_PLTRELSZ:
2638 s = elf_hash_table (info)->srelplt;
2639 dyn.d_un.d_val = s->size;
2640 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
2641 break;
2642 }
2643 }
99706f30
SR
2644
2645 }
2646
2647 /* Fill in the first three entries in the global offset table. */
2648 if (sgot->size > 0)
2649 {
2650 if (sdyn == NULL)
07d6d2b8 2651 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
99706f30 2652 else
07d6d2b8
AM
2653 bfd_put_32 (output_bfd,
2654 sdyn->output_section->vma + sdyn->output_offset,
2655 sgot->contents);
99706f30
SR
2656 }
2657
2658 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
2659
0a1b45a2 2660 return true;
99706f30
SR
2661}
2662
2663/* Given a .data.rel section and a .emreloc in-memory section, store
2664 relocation information into the .emreloc section which can be
2665 used at runtime to relocate the section. This is called by the
2666 linker when the --embedded-relocs switch is used. This is called
2667 after the add_symbols entry point has been called for all the
2668 objects, and before the final_link entry point is called. */
2669
0a1b45a2 2670bool
99706f30 2671bfd_cr16_elf32_create_embedded_relocs (bfd *abfd,
07d6d2b8
AM
2672 struct bfd_link_info *info,
2673 asection *datasec,
2674 asection *relsec,
2675 char **errmsg)
99706f30
SR
2676{
2677 Elf_Internal_Shdr *symtab_hdr;
2678 Elf_Internal_Sym *isymbuf = NULL;
2679 Elf_Internal_Rela *internal_relocs = NULL;
2680 Elf_Internal_Rela *irel, *irelend;
2681 bfd_byte *p;
2682 bfd_size_type amt;
2683
0e1862bb 2684 BFD_ASSERT (! bfd_link_relocatable (info));
99706f30
SR
2685
2686 *errmsg = NULL;
2687
2688 if (datasec->reloc_count == 0)
0a1b45a2 2689 return true;
99706f30
SR
2690
2691 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2692
2693 /* Get a copy of the native relocations. */
2694 internal_relocs = (_bfd_elf_link_read_relocs
07d6d2b8 2695 (abfd, datasec, NULL, NULL, info->keep_memory));
99706f30
SR
2696 if (internal_relocs == NULL)
2697 goto error_return;
2698
2699 amt = (bfd_size_type) datasec->reloc_count * 8;
2700 relsec->contents = (bfd_byte *) bfd_alloc (abfd, amt);
2701 if (relsec->contents == NULL)
2702 goto error_return;
2703
2704 p = relsec->contents;
2705
2706 irelend = internal_relocs + datasec->reloc_count;
2707 for (irel = internal_relocs; irel < irelend; irel++, p += 8)
2708 {
2709 asection *targetsec;
2710
2711 /* We are going to write a four byte longword into the runtime
db75b8f7
AM
2712 reloc section. The longword will be the address in the data
2713 section which must be relocated. It is followed by the name
2714 of the target section NUL-padded or truncated to 8
2715 characters. */
99706f30
SR
2716
2717 /* We can only relocate absolute longword relocs at run time. */
2718 if (!((ELF32_R_TYPE (irel->r_info) == (int) R_CR16_NUM32a)
db75b8f7 2719 || (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_NUM32)))
07d6d2b8 2720 {
0aa13fee 2721 *errmsg = _("unsupported relocation type");
07d6d2b8
AM
2722 bfd_set_error (bfd_error_bad_value);
2723 goto error_return;
2724 }
99706f30
SR
2725
2726 /* Get the target section referred to by the reloc. */
2727 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
07d6d2b8
AM
2728 {
2729 /* A local symbol. */
2730 Elf_Internal_Sym *isym;
2731
2732 /* Read this BFD's local symbols if we haven't done so already. */
2733 if (isymbuf == NULL)
2734 {
2735 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
2736 if (isymbuf == NULL)
2737 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
2738 symtab_hdr->sh_info, 0,
2739 NULL, NULL, NULL);
2740 if (isymbuf == NULL)
2741 goto error_return;
2742 }
2743
2744 isym = isymbuf + ELF32_R_SYM (irel->r_info);
2745 targetsec = bfd_section_from_elf_index (abfd, isym->st_shndx);
2746 }
99706f30 2747 else
07d6d2b8
AM
2748 {
2749 unsigned long indx;
2750 struct elf_link_hash_entry *h;
2751
2752 /* An external symbol. */
2753 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
2754 h = elf_sym_hashes (abfd)[indx];
2755 BFD_ASSERT (h != NULL);
2756 if (h->root.type == bfd_link_hash_defined
2757 || h->root.type == bfd_link_hash_defweak)
2758 targetsec = h->root.u.def.section;
2759 else
2760 targetsec = NULL;
2761 }
99706f30
SR
2762
2763 bfd_put_32 (abfd, irel->r_offset + datasec->output_offset, p);
2764 memset (p + 4, 0, 4);
2765 if ((ELF32_R_TYPE (irel->r_info) == (int) R_CR16_NUM32a)
07d6d2b8 2766 && (targetsec != NULL) )
db75b8f7 2767 strncpy ((char *) p + 4, targetsec->output_section->name, 4);
99706f30
SR
2768 }
2769
c9594989 2770 if (symtab_hdr->contents != (unsigned char *) isymbuf)
99706f30 2771 free (isymbuf);
c9594989 2772 if (elf_section_data (datasec)->relocs != internal_relocs)
99706f30 2773 free (internal_relocs);
0a1b45a2 2774 return true;
99706f30 2775
dc1e8a47 2776 error_return:
c9594989 2777 if (symtab_hdr->contents != (unsigned char *) isymbuf)
99706f30 2778 free (isymbuf);
c9594989 2779 if (elf_section_data (datasec)->relocs != internal_relocs)
99706f30 2780 free (internal_relocs);
0a1b45a2 2781 return false;
99706f30
SR
2782}
2783
2784
2785/* Classify relocation types, such that combreloc can sort them
2786 properly. */
2787
2788static enum elf_reloc_type_class
7e612e98
AM
2789_bfd_cr16_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
2790 const asection *rel_sec ATTRIBUTE_UNUSED,
2791 const Elf_Internal_Rela *rela)
99706f30
SR
2792{
2793 switch ((int) ELF32_R_TYPE (rela->r_info))
2794 {
2795 case R_CR16_GOT_REGREL20:
2796 case R_CR16_GOTC_REGREL20:
2797 return reloc_class_relative;
2798 default:
2799 return reloc_class_normal;
2800 }
2801}
2802
3d3d428f 2803/* Definitions for setting CR16 target vector. */
07d6d2b8
AM
2804#define TARGET_LITTLE_SYM cr16_elf32_vec
2805#define TARGET_LITTLE_NAME "elf32-cr16"
2806#define ELF_ARCH bfd_arch_cr16
2807#define ELF_MACHINE_CODE EM_CR16
2808#define ELF_MACHINE_ALT1 EM_CR16_OLD
2809#define ELF_MAXPAGESIZE 0x1
2810#define elf_symbol_leading_char '_'
2811
2812#define bfd_elf32_bfd_reloc_type_lookup elf_cr16_reloc_type_lookup
2813#define bfd_elf32_bfd_reloc_name_lookup elf_cr16_reloc_name_lookup
2814#define elf_info_to_howto elf_cr16_info_to_howto
f3185997 2815#define elf_info_to_howto_rel NULL
07d6d2b8
AM
2816#define elf_backend_relocate_section elf32_cr16_relocate_section
2817#define bfd_elf32_bfd_relax_section elf32_cr16_relax_section
3d3d428f 2818#define bfd_elf32_bfd_get_relocated_section_contents \
07d6d2b8
AM
2819 elf32_cr16_get_relocated_section_contents
2820#define elf_backend_gc_mark_hook elf32_cr16_gc_mark_hook
2821#define elf_backend_can_gc_sections 1
2822#define elf_backend_rela_normal 1
2823#define elf_backend_check_relocs cr16_elf_check_relocs
99706f30
SR
2824/* So we can set bits in e_flags. */
2825#define elf_backend_final_write_processing \
07d6d2b8
AM
2826 _bfd_cr16_elf_final_write_processing
2827#define elf_backend_object_p _bfd_cr16_elf_object_p
99706f30
SR
2828
2829#define bfd_elf32_bfd_merge_private_bfd_data \
07d6d2b8 2830 _bfd_cr16_elf_merge_private_bfd_data
99706f30
SR
2831
2832
2833#define bfd_elf32_bfd_link_hash_table_create \
07d6d2b8 2834 elf32_cr16_link_hash_table_create
99706f30
SR
2835
2836#define elf_backend_create_dynamic_sections \
07d6d2b8 2837 _bfd_cr16_elf_create_dynamic_sections
99706f30 2838#define elf_backend_adjust_dynamic_symbol \
07d6d2b8 2839 _bfd_cr16_elf_adjust_dynamic_symbol
af969b14
AM
2840#define elf_backend_late_size_sections \
2841 _bfd_cr16_elf_late_size_sections
d00dd7dc 2842#define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all
99706f30 2843#define elf_backend_finish_dynamic_symbol \
07d6d2b8 2844 _bfd_cr16_elf_finish_dynamic_symbol
99706f30 2845#define elf_backend_finish_dynamic_sections \
07d6d2b8 2846 _bfd_cr16_elf_finish_dynamic_sections
99706f30
SR
2847
2848#define elf_backend_reloc_type_class _bfd_cr16_elf_reloc_type_class
2849
2850
07d6d2b8
AM
2851#define elf_backend_want_got_plt 1
2852#define elf_backend_plt_readonly 1
2853#define elf_backend_want_plt_sym 0
2854#define elf_backend_got_header_size 12
64f52338 2855#define elf_backend_dtrel_excludes_plt 1
3d3d428f
NC
2856
2857#include "elf32-target.h"