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35c08157 1/* NDS32-specific support for 32-bit ELF.
fd67aa11 2 Copyright (C) 2012-2024 Free Software Foundation, Inc.
35c08157
KLC		 3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
1c8f6a4d 20 02110-1301, USA. */
35c08157
KLC		 21
22
23#include "sysdep.h"
24#include "bfd.h"
35c08157
KLC		 25#include "bfdlink.h"
26#include "libbfd.h"
27#include "elf-bfd.h"
28#include "libiberty.h"
35c08157
KLC		 29#include "elf/nds32.h"
30#include "opcode/nds32.h"
31#include "elf32-nds32.h"
32#include "opcode/cgen.h"
33#include "../opcodes/nds32-opc.h"
34
bb294208
AM		 35/* All users of this file have bfd_octets_per_byte (abfd, sec) == 1. */
36#define OCTETS_PER_BYTE(ABFD, SEC) 1
37
35c08157
KLC		 38/* Relocation HOWTO functions. */
39static bfd_reloc_status_type nds32_elf_ignore_reloc
40 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
41static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
42 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
43static bfd_reloc_status_type nds32_elf_hi20_reloc
44 (bfd *, arelent *, asymbol *, void *,
45 asection *, bfd *, char **);
46static bfd_reloc_status_type nds32_elf_lo12_reloc
47 (bfd *, arelent *, asymbol *, void *,
48 asection *, bfd *, char **);
49static bfd_reloc_status_type nds32_elf_generic_reloc
50 (bfd *, arelent *, asymbol *, void *,
51 asection *, bfd *, char **);
52static bfd_reloc_status_type nds32_elf_sda15_reloc
53 (bfd *, arelent *, asymbol *, void *,
54 asection *, bfd *, char **);
55
56/* Helper functions for HOWTO. */
57static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
58 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
59 asection *, bfd_vma, bfd_vma);
35c08157
KLC		 60
61/* Nds32 helper functions. */
35c08157 62static bfd_vma calculate_memory_address
fbaf61ad 63 (bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
0c4bd9d9 64static int nds32_get_section_contents (bfd *, asection *,
0a1b45a2 65 bfd_byte **, bool);
35c08157
KLC		 66static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
67 Elf_Internal_Sym **);
0a1b45a2 68static bool nds32_relax_fp_as_gp
35c08157
KLC		 69 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
70 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
71 Elf_Internal_Sym *isymbuf);
0a1b45a2 72static bool nds32_fag_remove_unused_fpbase
35c08157
KLC		 73 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
74 Elf_Internal_Rela *irelend);
75
76enum
77{
78 MACH_V1 = bfd_mach_n1h,
79 MACH_V2 = bfd_mach_n1h_v2,
80 MACH_V3 = bfd_mach_n1h_v3,
81 MACH_V3M = bfd_mach_n1h_v3m
82};
83
84#define MIN(a, b) ((a) > (b) ? (b) : (a))
85#define MAX(a, b) ((a) > (b) ? (a) : (b))
86
87/* The name of the dynamic interpreter. This is put in the .interp
88 section. */
89#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
90
fbaf61ad
NC		 91#define NDS32_GUARD_SEC_P(flags) ((flags) & SEC_ALLOC \
92 && (flags) & SEC_LOAD \
93 && (flags) & SEC_READONLY)
94
35c08157
KLC		 95/* The nop opcode we use. */
96#define NDS32_NOP32 0x40000009
97#define NDS32_NOP16 0x9200
98
99/* The size in bytes of an entry in the procedure linkage table. */
100#define PLT_ENTRY_SIZE 24
101#define PLT_HEADER_SIZE 24
102
103/* The first entry in a procedure linkage table are reserved,
104 and the initial contents are unimportant (we zero them out).
105 Subsequent entries look like this. */
07d6d2b8
AM		 106#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
107#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
108#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
109#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
110#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
35c08157
KLC		 111
112/* $ta is change to $r15 (from $r25). */
113#define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
07d6d2b8
AM		 114#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
115#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
116#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
117#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
118#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
119
120#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
121#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
122#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
123#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
124#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
35c08157
KLC		 125
126#define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
07d6d2b8
AM		 127#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
128#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
129#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
130#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
131#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
35c08157 132
1c8f6a4d
KLC		 133/* These are macros used to get the relocation accurate value. */
134#define ACCURATE_8BIT_S1 (0x100)
135#define ACCURATE_U9BIT_S1 (0x400)
136#define ACCURATE_12BIT_S1 (0x2000)
137#define ACCURATE_14BIT_S1 (0x4000)
138#define ACCURATE_19BIT (0x40000)
139
140/* These are macros used to get the relocation conservative value. */
141#define CONSERVATIVE_8BIT_S1 (0x100 - 4)
142#define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
143#define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
144#define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
145/* These must be more conservative because the address may be in
146 different segment. */
147#define CONSERVATIVE_15BIT (0x4000 - 0x1000)
148#define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
149#define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
150#define CONSERVATIVE_19BIT (0x40000 - 0x1000)
151#define CONSERVATIVE_20BIT (0x80000 - 0x1000)
152
35c08157
KLC		 153/* Size of small data/bss sections, used to calculate SDA_BASE. */
154static long got_size = 0;
155static int is_SDA_BASE_set = 0;
35c08157 156
35c08157
KLC		 157/* Convert ELF-VER in eflags to string for debugging purpose. */
158static const char *const nds32_elfver_strtab[] =
159{
160 "ELF-1.2",
161 "ELF-1.3",
162 "ELF-1.4",
163};
164
165/* The nds32 linker needs to keep track of the number of relocs that it
166 decides to copy in check_relocs for each symbol. This is so that
167 it can discard PC relative relocs if it doesn't need them when
168 linking with -Bsymbolic. We store the information in a field
169 extending the regular ELF linker hash table. */
170
171/* This structure keeps track of the number of PC relative relocs we
172 have copied for a given symbol. */
173
174struct elf_nds32_pcrel_relocs_copied
175{
176 /* Next section. */
177 struct elf_nds32_pcrel_relocs_copied *next;
178 /* A section in dynobj. */
179 asection *section;
180 /* Number of relocs copied in this section. */
181 bfd_size_type count;
182};
183
fbaf61ad
NC		 184enum elf_nds32_tls_type
185{
186 GOT_UNKNOWN = (0),
187 GOT_NORMAL = (1 << 0),
188 GOT_TLS_LE = (1 << 1),
189 GOT_TLS_IE = (1 << 2),
190 GOT_TLS_IEGP = (1 << 3),
191 GOT_TLS_LD = (1 << 4),
192 GOT_TLS_GD = (1 << 5),
193 GOT_TLS_DESC = (1 << 6),
194};
195
35c08157
KLC		 196/* Nds32 ELF linker hash entry. */
197
198struct elf_nds32_link_hash_entry
199{
200 struct elf_link_hash_entry root;
201
1c8f6a4d 202 /* For checking relocation type. */
fbaf61ad
NC		 203 enum elf_nds32_tls_type tls_type;
204
205 int offset_to_gp;
35c08157
KLC		 206};
207
208/* Get the nds32 ELF linker hash table from a link_info structure. */
209
210#define FP_BASE_NAME "_FP_BASE_"
211static int check_start_export_sym = 0;
35c08157 212
1c8f6a4d
KLC		 213/* The offset for executable tls relaxation. */
214#define TP_OFFSET 0x0
215
fbaf61ad
NC		 216typedef struct
217{
218 int min_id;
219 int max_id;
220 int count;
221 int bias;
222 int init;
223} elf32_nds32_relax_group_t;
224
1c8f6a4d
KLC		 225struct elf_nds32_obj_tdata
226{
227 struct elf_obj_tdata root;
228
229 /* tls_type for each local got entry. */
230 char *local_got_tls_type;
fbaf61ad
NC		 231
232 /* GOTPLT entries for TLS descriptors. */
233 bfd_vma *local_tlsdesc_gotent;
234
235 /* for R_NDS32_RELAX_GROUP handling. */
236 elf32_nds32_relax_group_t relax_group;
237
238 unsigned int hdr_size;
239 int* offset_to_gp;
1c8f6a4d
KLC		 240};
241
242#define elf_nds32_tdata(bfd) \
243 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
244
245#define elf32_nds32_local_got_tls_type(bfd) \
246 (elf_nds32_tdata (bfd)->local_got_tls_type)
247
fbaf61ad
NC		 248#define elf32_nds32_local_gp_offset(bfd) \
249 (elf_nds32_tdata (bfd)->offset_to_gp)
250
1c8f6a4d
KLC		 251#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
252
fbaf61ad
NC		 253#define elf32_nds32_relax_group_ptr(bfd) \
254 &(elf_nds32_tdata (bfd)->relax_group)
255
0a1b45a2 256static bool
1c8f6a4d
KLC		 257nds32_elf_mkobject (bfd *abfd)
258{
259 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
260 NDS32_ELF_DATA);
261}
262
35c08157 263/* Relocations used for relocation. */
fbaf61ad
NC		 264/* Define HOWTO2 (for relocation) and HOWTO3 (for relaxation) to
265 initialize array nds32_elf_howto_table in any order. The benefit
266 is that we can add any new relocations with any numbers and don't
267 need to fill the gap by lots of EMPTY_HOWTO. */
268#define HOWTO2(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
269 [C] = HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC)
270
35c08157
KLC		 271static reloc_howto_type nds32_elf_howto_table[] =
272{
273 /* This reloc does nothing. */
fbaf61ad
NC		 274 HOWTO2 (R_NDS32_NONE, /* type */
275 0, /* rightshift */
c94cb026 276 4, /* size */
fbaf61ad 277 32, /* bitsize */
0a1b45a2 278 false, /* pc_relative */
fbaf61ad
NC		 279 0, /* bitpos */
280 complain_overflow_bitfield,/* complain_on_overflow */
281 bfd_elf_generic_reloc, /* special_function */
282 "R_NDS32_NONE", /* name */
0a1b45a2 283 false, /* partial_inplace */
fbaf61ad
NC		 284 0, /* src_mask */
285 0, /* dst_mask */
0a1b45a2 286 false), /* pcrel_offset */
35c08157
KLC		 287
288 /* A 16 bit absolute relocation. */
fbaf61ad
NC		 289 HOWTO2 (R_NDS32_16, /* type */
290 0, /* rightshift */
c94cb026 291 2, /* size */
fbaf61ad 292 16, /* bitsize */
0a1b45a2 293 false, /* pc_relative */
fbaf61ad
NC		 294 0, /* bitpos */
295 complain_overflow_bitfield,/* complain_on_overflow */
296 nds32_elf_generic_reloc,/* special_function */
297 "R_NDS32_16", /* name */
0a1b45a2 298 false, /* partial_inplace */
fbaf61ad
NC		 299 0xffff, /* src_mask */
300 0xffff, /* dst_mask */
0a1b45a2 301 false), /* pcrel_offset */
35c08157
KLC		 302
303 /* A 32 bit absolute relocation. */
fbaf61ad
NC		 304 HOWTO2 (R_NDS32_32, /* type */
305 0, /* rightshift */
c94cb026 306 4, /* size */
fbaf61ad 307 32, /* bitsize */
0a1b45a2 308 false, /* pc_relative */
fbaf61ad
NC		 309 0, /* bitpos */
310 complain_overflow_bitfield,/* complain_on_overflow */
311 nds32_elf_generic_reloc,/* special_function */
312 "R_NDS32_32", /* name */
0a1b45a2 313 false, /* partial_inplace */
fbaf61ad
NC		 314 0xffffffff, /* src_mask */
315 0xffffffff, /* dst_mask */
0a1b45a2 316 false), /* pcrel_offset */
35c08157
KLC		 317
318 /* A 20 bit address. */
fbaf61ad
NC		 319 HOWTO2 (R_NDS32_20, /* type */
320 0, /* rightshift */
c94cb026 321 4, /* size */
fbaf61ad 322 20, /* bitsize */
0a1b45a2 323 false, /* pc_relative */
fbaf61ad
NC		 324 0, /* bitpos */
325 complain_overflow_unsigned,/* complain_on_overflow */
326 nds32_elf_generic_reloc,/* special_function */
327 "R_NDS32_20", /* name */
0a1b45a2 328 false, /* partial_inplace */
fbaf61ad
NC		 329 0xfffff, /* src_mask */
330 0xfffff, /* dst_mask */
0a1b45a2 331 false), /* pcrel_offset */
35c08157
KLC		 332
333 /* An PC Relative 9-bit relocation, shifted by 2.
334 This reloc is complicated because relocations are relative to pc & -4.
335 i.e. branches in the right insn slot use the address of the left insn
336 slot for pc. */
fbaf61ad 337 /* It's not clear whether this should have partial_inplace set or not.
35c08157
KLC		 338 Branch relaxing in the assembler can store the addend in the insn,
339 and if bfd_install_relocation gets called the addend may get added
340 again. */
fbaf61ad
NC		 341 HOWTO2 (R_NDS32_9_PCREL, /* type */
342 1, /* rightshift */
c94cb026 343 2, /* size */
fbaf61ad 344 8, /* bitsize */
0a1b45a2 345 true, /* pc_relative */
fbaf61ad
NC		 346 0, /* bitpos */
347 complain_overflow_signed,/* complain_on_overflow */
348 nds32_elf_9_pcrel_reloc,/* special_function */
349 "R_NDS32_9_PCREL", /* name */
0a1b45a2 350 false, /* partial_inplace */
fbaf61ad
NC		 351 0xff, /* src_mask */
352 0xff, /* dst_mask */
0a1b45a2 353 true), /* pcrel_offset */
35c08157
KLC		 354
355 /* A relative 15 bit relocation, right shifted by 1. */
fbaf61ad
NC		 356 HOWTO2 (R_NDS32_15_PCREL, /* type */
357 1, /* rightshift */
c94cb026 358 4, /* size */
fbaf61ad 359 14, /* bitsize */
0a1b45a2 360 true, /* pc_relative */
fbaf61ad
NC		 361 0, /* bitpos */
362 complain_overflow_signed,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_NDS32_15_PCREL", /* name */
0a1b45a2 365 false, /* partial_inplace */
fbaf61ad
NC		 366 0x3fff, /* src_mask */
367 0x3fff, /* dst_mask */
0a1b45a2 368 true), /* pcrel_offset */
35c08157
KLC		 369
370 /* A relative 17 bit relocation, right shifted by 1. */
fbaf61ad
NC		 371 HOWTO2 (R_NDS32_17_PCREL, /* type */
372 1, /* rightshift */
c94cb026 373 4, /* size */
fbaf61ad 374 16, /* bitsize */
0a1b45a2 375 true, /* pc_relative */
fbaf61ad
NC		 376 0, /* bitpos */
377 complain_overflow_signed,/* complain_on_overflow */
378 bfd_elf_generic_reloc, /* special_function */
379 "R_NDS32_17_PCREL", /* name */
0a1b45a2 380 false, /* partial_inplace */
fbaf61ad
NC		 381 0xffff, /* src_mask */
382 0xffff, /* dst_mask */
0a1b45a2 383 true), /* pcrel_offset */
35c08157
KLC		 384
385 /* A relative 25 bit relocation, right shifted by 1. */
fbaf61ad 386 /* It's not clear whether this should have partial_inplace set or not.
35c08157
KLC		 387 Branch relaxing in the assembler can store the addend in the insn,
388 and if bfd_install_relocation gets called the addend may get added
389 again. */
fbaf61ad
NC		 390 HOWTO2 (R_NDS32_25_PCREL, /* type */
391 1, /* rightshift */
c94cb026 392 4, /* size */
fbaf61ad 393 24, /* bitsize */
0a1b45a2 394 true, /* pc_relative */
fbaf61ad
NC		 395 0, /* bitpos */
396 complain_overflow_signed,/* complain_on_overflow */
397 bfd_elf_generic_reloc, /* special_function */
398 "R_NDS32_25_PCREL", /* name */
0a1b45a2 399 false, /* partial_inplace */
fbaf61ad
NC		 400 0xffffff, /* src_mask */
401 0xffffff, /* dst_mask */
0a1b45a2 402 true), /* pcrel_offset */
35c08157
KLC		 403
404 /* High 20 bits of address when lower 12 is or'd in. */
fbaf61ad
NC		 405 HOWTO2 (R_NDS32_HI20, /* type */
406 12, /* rightshift */
c94cb026 407 4, /* size */
fbaf61ad 408 20, /* bitsize */
0a1b45a2 409 false, /* pc_relative */
fbaf61ad
NC		 410 0, /* bitpos */
411 complain_overflow_dont,/* complain_on_overflow */
412 nds32_elf_hi20_reloc, /* special_function */
413 "R_NDS32_HI20", /* name */
0a1b45a2 414 false, /* partial_inplace */
fbaf61ad
NC		 415 0x000fffff, /* src_mask */
416 0x000fffff, /* dst_mask */
0a1b45a2 417 false), /* pcrel_offset */
35c08157
KLC		 418
419 /* Lower 12 bits of address. */
fbaf61ad
NC		 420 HOWTO2 (R_NDS32_LO12S3, /* type */
421 3, /* rightshift */
c94cb026 422 4, /* size */
fbaf61ad 423 9, /* bitsize */
0a1b45a2 424 false, /* pc_relative */
fbaf61ad
NC		 425 0, /* bitpos */
426 complain_overflow_dont,/* complain_on_overflow */
427 nds32_elf_lo12_reloc, /* special_function */
428 "R_NDS32_LO12S3", /* name */
0a1b45a2 429 false, /* partial_inplace */
fbaf61ad
NC		 430 0x000001ff, /* src_mask */
431 0x000001ff, /* dst_mask */
0a1b45a2 432 false), /* pcrel_offset */
35c08157
KLC		 433
434 /* Lower 12 bits of address. */
fbaf61ad
NC		 435 HOWTO2 (R_NDS32_LO12S2, /* type */
436 2, /* rightshift */
c94cb026 437 4, /* size */
fbaf61ad 438 10, /* bitsize */
0a1b45a2 439 false, /* pc_relative */
fbaf61ad
NC		 440 0, /* bitpos */
441 complain_overflow_dont,/* complain_on_overflow */
442 nds32_elf_lo12_reloc, /* special_function */
443 "R_NDS32_LO12S2", /* name */
0a1b45a2 444 false, /* partial_inplace */
fbaf61ad
NC		 445 0x000003ff, /* src_mask */
446 0x000003ff, /* dst_mask */
0a1b45a2 447 false), /* pcrel_offset */
35c08157
KLC		 448
449 /* Lower 12 bits of address. */
fbaf61ad
NC		 450 HOWTO2 (R_NDS32_LO12S1, /* type */
451 1, /* rightshift */
c94cb026 452 4, /* size */
fbaf61ad 453 11, /* bitsize */
0a1b45a2 454 false, /* pc_relative */
fbaf61ad
NC		 455 0, /* bitpos */
456 complain_overflow_dont,/* complain_on_overflow */
457 nds32_elf_lo12_reloc, /* special_function */
458 "R_NDS32_LO12S1", /* name */
0a1b45a2 459 false, /* partial_inplace */
fbaf61ad
NC		 460 0x000007ff, /* src_mask */
461 0x000007ff, /* dst_mask */
0a1b45a2 462 false), /* pcrel_offset */
35c08157
KLC		 463
464 /* Lower 12 bits of address. */
fbaf61ad
NC		 465 HOWTO2 (R_NDS32_LO12S0, /* type */
466 0, /* rightshift */
c94cb026 467 4, /* size */
fbaf61ad 468 12, /* bitsize */
0a1b45a2 469 false, /* pc_relative */
fbaf61ad
NC		 470 0, /* bitpos */
471 complain_overflow_dont,/* complain_on_overflow */
472 nds32_elf_lo12_reloc, /* special_function */
473 "R_NDS32_LO12S0", /* name */
0a1b45a2 474 false, /* partial_inplace */
fbaf61ad
NC		 475 0x00000fff, /* src_mask */
476 0x00000fff, /* dst_mask */
0a1b45a2 477 false), /* pcrel_offset */
35c08157
KLC		 478
479 /* Small data area 15 bits offset. */
fbaf61ad
NC		 480 HOWTO2 (R_NDS32_SDA15S3, /* type */
481 3, /* rightshift */
c94cb026 482 4, /* size */
fbaf61ad 483 15, /* bitsize */
0a1b45a2 484 false, /* pc_relative */
fbaf61ad
NC		 485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 nds32_elf_sda15_reloc, /* special_function */
488 "R_NDS32_SDA15S3", /* name */
0a1b45a2 489 false, /* partial_inplace */
fbaf61ad
NC		 490 0x00007fff, /* src_mask */
491 0x00007fff, /* dst_mask */
0a1b45a2 492 false), /* pcrel_offset */
35c08157
KLC		 493
494 /* Small data area 15 bits offset. */
fbaf61ad
NC		 495 HOWTO2 (R_NDS32_SDA15S2, /* type */
496 2, /* rightshift */
c94cb026 497 4, /* size */
fbaf61ad 498 15, /* bitsize */
0a1b45a2 499 false, /* pc_relative */
fbaf61ad
NC		 500 0, /* bitpos */
501 complain_overflow_signed,/* complain_on_overflow */
502 nds32_elf_sda15_reloc, /* special_function */
503 "R_NDS32_SDA15S2", /* name */
0a1b45a2 504 false, /* partial_inplace */
fbaf61ad
NC		 505 0x00007fff, /* src_mask */
506 0x00007fff, /* dst_mask */
0a1b45a2 507 false), /* pcrel_offset */
35c08157
KLC		 508
509 /* Small data area 15 bits offset. */
fbaf61ad
NC		 510 HOWTO2 (R_NDS32_SDA15S1, /* type */
511 1, /* rightshift */
c94cb026 512 4, /* size */
fbaf61ad 513 15, /* bitsize */
0a1b45a2 514 false, /* pc_relative */
fbaf61ad
NC		 515 0, /* bitpos */
516 complain_overflow_signed,/* complain_on_overflow */
517 nds32_elf_sda15_reloc, /* special_function */
518 "R_NDS32_SDA15S1", /* name */
0a1b45a2 519 false, /* partial_inplace */
fbaf61ad
NC		 520 0x00007fff, /* src_mask */
521 0x00007fff, /* dst_mask */
0a1b45a2 522 false), /* pcrel_offset */
35c08157
KLC		 523
524 /* Small data area 15 bits offset. */
fbaf61ad
NC		 525 HOWTO2 (R_NDS32_SDA15S0, /* type */
526 0, /* rightshift */
c94cb026 527 4, /* size */
fbaf61ad 528 15, /* bitsize */
0a1b45a2 529 false, /* pc_relative */
fbaf61ad
NC		 530 0, /* bitpos */
531 complain_overflow_signed,/* complain_on_overflow */
532 nds32_elf_sda15_reloc, /* special_function */
533 "R_NDS32_SDA15S0", /* name */
0a1b45a2 534 false, /* partial_inplace */
fbaf61ad
NC		 535 0x00007fff, /* src_mask */
536 0x00007fff, /* dst_mask */
0a1b45a2 537 false), /* pcrel_offset */
fbaf61ad
NC		 538
539 /* GNU extension to record C++ vtable hierarchy */
540 HOWTO2 (R_NDS32_GNU_VTINHERIT,/* type */
541 0, /* rightshift */
c94cb026 542 4, /* size */
fbaf61ad 543 0, /* bitsize */
0a1b45a2 544 false, /* pc_relative */
fbaf61ad
NC		 545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 NULL, /* special_function */
548 "R_NDS32_GNU_VTINHERIT",/* name */
0a1b45a2 549 false, /* partial_inplace */
fbaf61ad
NC		 550 0, /* src_mask */
551 0, /* dst_mask */
0a1b45a2 552 false), /* pcrel_offset */
fbaf61ad
NC		 553
554 /* GNU extension to record C++ vtable member usage */
555 HOWTO2 (R_NDS32_GNU_VTENTRY, /* type */
556 0, /* rightshift */
c94cb026 557 4, /* size */
fbaf61ad 558 0, /* bitsize */
0a1b45a2 559 false, /* pc_relative */
fbaf61ad
NC		 560 0, /* bitpos */
561 complain_overflow_dont,/* complain_on_overflow */
562 _bfd_elf_rel_vtable_reloc_fn,/* special_function */
563 "R_NDS32_GNU_VTENTRY", /* name */
0a1b45a2 564 false, /* partial_inplace */
fbaf61ad
NC		 565 0, /* src_mask */
566 0, /* dst_mask */
0a1b45a2 567 false), /* pcrel_offset */
35c08157
KLC		 568
569 /* A 16 bit absolute relocation. */
fbaf61ad
NC		 570 HOWTO2 (R_NDS32_16_RELA, /* type */
571 0, /* rightshift */
c94cb026 572 2, /* size */
fbaf61ad 573 16, /* bitsize */
0a1b45a2 574 false, /* pc_relative */
fbaf61ad
NC		 575 0, /* bitpos */
576 complain_overflow_bitfield,/* complain_on_overflow */
577 bfd_elf_generic_reloc, /* special_function */
578 "R_NDS32_16_RELA", /* name */
0a1b45a2 579 false, /* partial_inplace */
fbaf61ad
NC		 580 0xffff, /* src_mask */
581 0xffff, /* dst_mask */
0a1b45a2 582 false), /* pcrel_offset */
35c08157
KLC		 583
584 /* A 32 bit absolute relocation. */
fbaf61ad
NC		 585 HOWTO2 (R_NDS32_32_RELA, /* type */
586 0, /* rightshift */
c94cb026 587 4, /* size */
fbaf61ad 588 32, /* bitsize */
0a1b45a2 589 false, /* pc_relative */
fbaf61ad
NC		 590 0, /* bitpos */
591 complain_overflow_bitfield,/* complain_on_overflow */
592 bfd_elf_generic_reloc, /* special_function */
593 "R_NDS32_32_RELA", /* name */
0a1b45a2 594 false, /* partial_inplace */
fbaf61ad
NC		 595 0xffffffff, /* src_mask */
596 0xffffffff, /* dst_mask */
0a1b45a2 597 false), /* pcrel_offset */
35c08157
KLC		 598
599 /* A 20 bit address. */
fbaf61ad
NC		 600 HOWTO2 (R_NDS32_20_RELA, /* type */
601 0, /* rightshift */
c94cb026 602 4, /* size */
fbaf61ad 603 20, /* bitsize */
0a1b45a2 604 false, /* pc_relative */
fbaf61ad
NC		 605 0, /* bitpos */
606 complain_overflow_signed,/* complain_on_overflow */
607 bfd_elf_generic_reloc, /* special_function */
608 "R_NDS32_20_RELA", /* name */
0a1b45a2 609 false, /* partial_inplace */
fbaf61ad
NC		 610 0xfffff, /* src_mask */
611 0xfffff, /* dst_mask */
0a1b45a2 612 false), /* pcrel_offset */
fbaf61ad
NC		 613
614 HOWTO2 (R_NDS32_9_PCREL_RELA, /* type */
615 1, /* rightshift */
c94cb026 616 2, /* size */
fbaf61ad 617 8, /* bitsize */
0a1b45a2 618 true, /* pc_relative */
fbaf61ad
NC		 619 0, /* bitpos */
620 complain_overflow_signed,/* complain_on_overflow */
621 bfd_elf_generic_reloc, /* special_function */
622 "R_NDS32_9_PCREL_RELA",/* name */
0a1b45a2 623 false, /* partial_inplace */
fbaf61ad
NC		 624 0xff, /* src_mask */
625 0xff, /* dst_mask */
0a1b45a2 626 true), /* pcrel_offset */
35c08157
KLC		 627
628 /* A relative 15 bit relocation, right shifted by 1. */
fbaf61ad
NC		 629 HOWTO2 (R_NDS32_15_PCREL_RELA,/* type */
630 1, /* rightshift */
c94cb026 631 4, /* size */
fbaf61ad 632 14, /* bitsize */
0a1b45a2 633 true, /* pc_relative */
fbaf61ad
NC		 634 0, /* bitpos */
635 complain_overflow_signed,/* complain_on_overflow */
636 bfd_elf_generic_reloc, /* special_function */
637 "R_NDS32_15_PCREL_RELA",/* name */
0a1b45a2 638 false, /* partial_inplace */
fbaf61ad
NC		 639 0x3fff, /* src_mask */
640 0x3fff, /* dst_mask */
0a1b45a2 641 true), /* pcrel_offset */
35c08157
KLC		 642
643 /* A relative 17 bit relocation, right shifted by 1. */
fbaf61ad
NC		 644 HOWTO2 (R_NDS32_17_PCREL_RELA,/* type */
645 1, /* rightshift */
c94cb026 646 4, /* size */
fbaf61ad 647 16, /* bitsize */
0a1b45a2 648 true, /* pc_relative */
fbaf61ad
NC		 649 0, /* bitpos */
650 complain_overflow_signed,/* complain_on_overflow */
651 bfd_elf_generic_reloc, /* special_function */
652 "R_NDS32_17_PCREL_RELA",/* name */
0a1b45a2 653 false, /* partial_inplace */
fbaf61ad
NC		 654 0xffff, /* src_mask */
655 0xffff, /* dst_mask */
0a1b45a2 656 true), /* pcrel_offset */
35c08157
KLC		 657
658 /* A relative 25 bit relocation, right shifted by 2. */
fbaf61ad
NC		 659 HOWTO2 (R_NDS32_25_PCREL_RELA,/* type */
660 1, /* rightshift */
c94cb026 661 4, /* size */
fbaf61ad 662 24, /* bitsize */
0a1b45a2 663 true, /* pc_relative */
fbaf61ad
NC		 664 0, /* bitpos */
665 complain_overflow_signed,/* complain_on_overflow */
666 bfd_elf_generic_reloc, /* special_function */
667 "R_NDS32_25_PCREL_RELA",/* name */
0a1b45a2 668 false, /* partial_inplace */
fbaf61ad
NC		 669 0xffffff, /* src_mask */
670 0xffffff, /* dst_mask */
0a1b45a2 671 true), /* pcrel_offset */
35c08157
KLC		 672
673 /* High 20 bits of address when lower 16 is or'd in. */
fbaf61ad
NC		 674 HOWTO2 (R_NDS32_HI20_RELA, /* type */
675 12, /* rightshift */
c94cb026 676 4, /* size */
fbaf61ad 677 20, /* bitsize */
0a1b45a2 678 false, /* pc_relative */
fbaf61ad
NC		 679 0, /* bitpos */
680 complain_overflow_dont,/* complain_on_overflow */
681 bfd_elf_generic_reloc, /* special_function */
682 "R_NDS32_HI20_RELA", /* name */
0a1b45a2 683 false, /* partial_inplace */
fbaf61ad
NC		 684 0x000fffff, /* src_mask */
685 0x000fffff, /* dst_mask */
0a1b45a2 686 false), /* pcrel_offset */
35c08157
KLC		 687
688 /* Lower 12 bits of address. */
fbaf61ad
NC		 689 HOWTO2 (R_NDS32_LO12S3_RELA, /* type */
690 3, /* rightshift */
c94cb026 691 4, /* size */
fbaf61ad 692 9, /* bitsize */
0a1b45a2 693 false, /* pc_relative */
fbaf61ad
NC		 694 0, /* bitpos */
695 complain_overflow_dont,/* complain_on_overflow */
696 bfd_elf_generic_reloc, /* special_function */
697 "R_NDS32_LO12S3_RELA", /* name */
0a1b45a2 698 false, /* partial_inplace */
fbaf61ad
NC		 699 0x000001ff, /* src_mask */
700 0x000001ff, /* dst_mask */
0a1b45a2 701 false), /* pcrel_offset */
35c08157
KLC		 702
703 /* Lower 12 bits of address. */
fbaf61ad
NC		 704 HOWTO2 (R_NDS32_LO12S2_RELA, /* type */
705 2, /* rightshift */
c94cb026 706 4, /* size */
fbaf61ad 707 10, /* bitsize */
0a1b45a2 708 false, /* pc_relative */
fbaf61ad
NC		 709 0, /* bitpos */
710 complain_overflow_dont,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_NDS32_LO12S2_RELA", /* name */
0a1b45a2 713 false, /* partial_inplace */
fbaf61ad
NC		 714 0x000003ff, /* src_mask */
715 0x000003ff, /* dst_mask */
0a1b45a2 716 false), /* pcrel_offset */
35c08157
KLC		 717
718 /* Lower 12 bits of address. */
fbaf61ad
NC		 719 HOWTO2 (R_NDS32_LO12S1_RELA, /* type */
720 1, /* rightshift */
c94cb026 721 4, /* size */
fbaf61ad 722 11, /* bitsize */
0a1b45a2 723 false, /* pc_relative */
fbaf61ad
NC		 724 0, /* bitpos */
725 complain_overflow_dont,/* complain_on_overflow */
726 bfd_elf_generic_reloc, /* special_function */
727 "R_NDS32_LO12S1_RELA", /* name */
0a1b45a2 728 false, /* partial_inplace */
fbaf61ad
NC		 729 0x000007ff, /* src_mask */
730 0x000007ff, /* dst_mask */
0a1b45a2 731 false), /* pcrel_offset */
35c08157
KLC		 732
733 /* Lower 12 bits of address. */
fbaf61ad
NC		 734 HOWTO2 (R_NDS32_LO12S0_RELA, /* type */
735 0, /* rightshift */
c94cb026 736 4, /* size */
fbaf61ad 737 12, /* bitsize */
0a1b45a2 738 false, /* pc_relative */
fbaf61ad
NC		 739 0, /* bitpos */
740 complain_overflow_dont,/* complain_on_overflow */
741 bfd_elf_generic_reloc, /* special_function */
742 "R_NDS32_LO12S0_RELA", /* name */
0a1b45a2 743 false, /* partial_inplace */
fbaf61ad
NC		 744 0x00000fff, /* src_mask */
745 0x00000fff, /* dst_mask */
0a1b45a2 746 false), /* pcrel_offset */
35c08157
KLC		 747
748 /* Small data area 15 bits offset. */
fbaf61ad
NC		 749 HOWTO2 (R_NDS32_SDA15S3_RELA, /* type */
750 3, /* rightshift */
c94cb026 751 4, /* size */
fbaf61ad 752 15, /* bitsize */
0a1b45a2 753 false, /* pc_relative */
fbaf61ad
NC		 754 0, /* bitpos */
755 complain_overflow_signed,/* complain_on_overflow */
756 bfd_elf_generic_reloc, /* special_function */
757 "R_NDS32_SDA15S3_RELA",/* name */
0a1b45a2 758 false, /* partial_inplace */
fbaf61ad
NC		 759 0x00007fff, /* src_mask */
760 0x00007fff, /* dst_mask */
0a1b45a2 761 false), /* pcrel_offset */
35c08157
KLC		 762
763 /* Small data area 15 bits offset. */
fbaf61ad
NC		 764 HOWTO2 (R_NDS32_SDA15S2_RELA, /* type */
765 2, /* rightshift */
c94cb026 766 4, /* size */
fbaf61ad 767 15, /* bitsize */
0a1b45a2 768 false, /* pc_relative */
fbaf61ad
NC		 769 0, /* bitpos */
770 complain_overflow_signed,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_NDS32_SDA15S2_RELA",/* name */
0a1b45a2 773 false, /* partial_inplace */
fbaf61ad
NC		 774 0x00007fff, /* src_mask */
775 0x00007fff, /* dst_mask */
0a1b45a2 776 false), /* pcrel_offset */
fbaf61ad
NC		 777
778 HOWTO2 (R_NDS32_SDA15S1_RELA, /* type */
779 1, /* rightshift */
c94cb026 780 4, /* size */
fbaf61ad 781 15, /* bitsize */
0a1b45a2 782 false, /* pc_relative */
fbaf61ad
NC		 783 0, /* bitpos */
784 complain_overflow_signed,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_NDS32_SDA15S1_RELA",/* name */
0a1b45a2 787 false, /* partial_inplace */
fbaf61ad
NC		 788 0x00007fff, /* src_mask */
789 0x00007fff, /* dst_mask */
0a1b45a2 790 false), /* pcrel_offset */
fbaf61ad
NC		 791
792 HOWTO2 (R_NDS32_SDA15S0_RELA, /* type */
793 0, /* rightshift */
c94cb026 794 4, /* size */
fbaf61ad 795 15, /* bitsize */
0a1b45a2 796 false, /* pc_relative */
fbaf61ad
NC		 797 0, /* bitpos */
798 complain_overflow_signed,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_NDS32_SDA15S0_RELA",/* name */
0a1b45a2 801 false, /* partial_inplace */
fbaf61ad
NC		 802 0x00007fff, /* src_mask */
803 0x00007fff, /* dst_mask */
0a1b45a2 804 false), /* pcrel_offset */
fbaf61ad
NC		 805
806 /* GNU extension to record C++ vtable hierarchy */
807 HOWTO2 (R_NDS32_RELA_GNU_VTINHERIT,/* type */
808 0, /* rightshift */
c94cb026 809 4, /* size */
fbaf61ad 810 0, /* bitsize */
0a1b45a2 811 false, /* pc_relative */
fbaf61ad
NC		 812 0, /* bitpos */
813 complain_overflow_dont,/* complain_on_overflow */
814 NULL, /* special_function */
815 "R_NDS32_RELA_GNU_VTINHERIT",/* name */
0a1b45a2 816 false, /* partial_inplace */
fbaf61ad
NC		 817 0, /* src_mask */
818 0, /* dst_mask */
0a1b45a2 819 false), /* pcrel_offset */
fbaf61ad
NC		 820
821 /* GNU extension to record C++ vtable member usage */
822 HOWTO2 (R_NDS32_RELA_GNU_VTENTRY,/* type */
823 0, /* rightshift */
c94cb026 824 4, /* size */
fbaf61ad 825 0, /* bitsize */
0a1b45a2 826 false, /* pc_relative */
fbaf61ad
NC		 827 0, /* bitpos */
828 complain_overflow_dont,/* complain_on_overflow */
829 _bfd_elf_rel_vtable_reloc_fn,/* special_function */
830 "R_NDS32_RELA_GNU_VTENTRY",/* name */
0a1b45a2 831 false, /* partial_inplace */
fbaf61ad
NC		 832 0, /* src_mask */
833 0, /* dst_mask */
0a1b45a2 834 false), /* pcrel_offset */
35c08157
KLC		 835
836 /* Like R_NDS32_20, but referring to the GOT table entry for
837 the symbol. */
fbaf61ad
NC		 838 HOWTO2 (R_NDS32_GOT20, /* type */
839 0, /* rightshift */
c94cb026 840 4, /* size */
fbaf61ad 841 20, /* bitsize */
0a1b45a2 842 false, /* pc_relative */
fbaf61ad
NC		 843 0, /* bitpos */
844 complain_overflow_signed,/* complain_on_overflow */
845 bfd_elf_generic_reloc, /* special_function */
846 "R_NDS32_GOT20", /* name */
0a1b45a2 847 false, /* partial_inplace */
fbaf61ad
NC		 848 0xfffff, /* src_mask */
849 0xfffff, /* dst_mask */
0a1b45a2 850 false), /* pcrel_offset */
35c08157
KLC		 851
852 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
853 entry for the symbol. */
fbaf61ad
NC		 854 HOWTO2 (R_NDS32_25_PLTREL, /* type */
855 1, /* rightshift */
c94cb026 856 4, /* size */
fbaf61ad 857 24, /* bitsize */
0a1b45a2 858 true, /* pc_relative */
fbaf61ad
NC		 859 0, /* bitpos */
860 complain_overflow_signed,/* complain_on_overflow */
861 bfd_elf_generic_reloc, /* special_function */
862 "R_NDS32_25_PLTREL", /* name */
0a1b45a2 863 false, /* partial_inplace */
fbaf61ad
NC		 864 0xffffff, /* src_mask */
865 0xffffff, /* dst_mask */
0a1b45a2 866 true), /* pcrel_offset */
35c08157
KLC		 867
868 /* This is used only by the dynamic linker. The symbol should exist
869 both in the object being run and in some shared library. The
870 dynamic linker copies the data addressed by the symbol from the
871 shared library into the object, because the object being
872 run has to have the data at some particular address. */
fbaf61ad
NC		 873 HOWTO2 (R_NDS32_COPY, /* type */
874 0, /* rightshift */
c94cb026 875 4, /* size */
fbaf61ad 876 32, /* bitsize */
0a1b45a2 877 false, /* pc_relative */
fbaf61ad
NC		 878 0, /* bitpos */
879 complain_overflow_bitfield,/* complain_on_overflow */
880 bfd_elf_generic_reloc, /* special_function */
881 "R_NDS32_COPY", /* name */
0a1b45a2 882 false, /* partial_inplace */
fbaf61ad
NC		 883 0xffffffff, /* src_mask */
884 0xffffffff, /* dst_mask */
0a1b45a2 885 false), /* pcrel_offset */
35c08157
KLC		 886
887 /* Like R_NDS32_20, but used when setting global offset table
888 entries. */
fbaf61ad
NC		 889 HOWTO2 (R_NDS32_GLOB_DAT, /* type */
890 0, /* rightshift */
c94cb026 891 4, /* size */
fbaf61ad 892 32, /* bitsize */
0a1b45a2 893 false, /* pc_relative */
fbaf61ad
NC		 894 0, /* bitpos */
895 complain_overflow_bitfield,/* complain_on_overflow */
896 bfd_elf_generic_reloc, /* special_function */
897 "R_NDS32_GLOB_DAT", /* name */
0a1b45a2 898 false, /* partial_inplace */
fbaf61ad
NC		 899 0xffffffff, /* src_mask */
900 0xffffffff, /* dst_mask */
0a1b45a2 901 false), /* pcrel_offset */
35c08157
KLC		 902
903 /* Marks a procedure linkage table entry for a symbol. */
fbaf61ad
NC		 904 HOWTO2 (R_NDS32_JMP_SLOT, /* type */
905 0, /* rightshift */
c94cb026 906 4, /* size */
fbaf61ad 907 32, /* bitsize */
0a1b45a2 908 false, /* pc_relative */
fbaf61ad
NC		 909 0, /* bitpos */
910 complain_overflow_bitfield,/* complain_on_overflow */
911 bfd_elf_generic_reloc, /* special_function */
912 "R_NDS32_JMP_SLOT", /* name */
0a1b45a2 913 false, /* partial_inplace */
fbaf61ad
NC		 914 0xffffffff, /* src_mask */
915 0xffffffff, /* dst_mask */
0a1b45a2 916 false), /* pcrel_offset */
35c08157
KLC		 917
918 /* Used only by the dynamic linker. When the object is run, this
919 longword is set to the load address of the object, plus the
920 addend. */
fbaf61ad
NC		 921 HOWTO2 (R_NDS32_RELATIVE, /* type */
922 0, /* rightshift */
c94cb026 923 4, /* size */
fbaf61ad 924 32, /* bitsize */
0a1b45a2 925 false, /* pc_relative */
fbaf61ad
NC		 926 0, /* bitpos */
927 complain_overflow_bitfield,/* complain_on_overflow */
928 bfd_elf_generic_reloc, /* special_function */
929 "R_NDS32_RELATIVE", /* name */
0a1b45a2 930 false, /* partial_inplace */
fbaf61ad
NC		 931 0xffffffff, /* src_mask */
932 0xffffffff, /* dst_mask */
0a1b45a2 933 false), /* pcrel_offset */
fbaf61ad
NC		 934
935 HOWTO2 (R_NDS32_GOTOFF, /* type */
936 0, /* rightshift */
c94cb026 937 4, /* size */
fbaf61ad 938 20, /* bitsize */
0a1b45a2 939 false, /* pc_relative */
fbaf61ad
NC		 940 0, /* bitpos */
941 complain_overflow_signed,/* complain_on_overflow */
942 bfd_elf_generic_reloc, /* special_function */
943 "R_NDS32_GOTOFF", /* name */
0a1b45a2 944 false, /* partial_inplace */
fbaf61ad
NC		 945 0xfffff, /* src_mask */
946 0xfffff, /* dst_mask */
0a1b45a2 947 false), /* pcrel_offset */
35c08157
KLC		 948
949 /* An PC Relative 20-bit relocation used when setting PIC offset
950 table register. */
fbaf61ad
NC		 951 HOWTO2 (R_NDS32_GOTPC20, /* type */
952 0, /* rightshift */
c94cb026 953 4, /* size */
fbaf61ad 954 20, /* bitsize */
0a1b45a2 955 true, /* pc_relative */
fbaf61ad
NC		 956 0, /* bitpos */
957 complain_overflow_signed,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_NDS32_GOTPC20", /* name */
0a1b45a2 960 false, /* partial_inplace */
fbaf61ad
NC		 961 0xfffff, /* src_mask */
962 0xfffff, /* dst_mask */
0a1b45a2 963 true), /* pcrel_offset */
35c08157
KLC		 964
965 /* Like R_NDS32_HI20, but referring to the GOT table entry for
966 the symbol. */
fbaf61ad
NC		 967 HOWTO2 (R_NDS32_GOT_HI20, /* type */
968 12, /* rightshift */
c94cb026 969 4, /* size */
fbaf61ad 970 20, /* bitsize */
0a1b45a2 971 false, /* pc_relative */
fbaf61ad
NC		 972 0, /* bitpos */
973 complain_overflow_dont,/* complain_on_overflow */
974 bfd_elf_generic_reloc, /* special_function */
975 "R_NDS32_GOT_HI20", /* name */
0a1b45a2 976 false, /* partial_inplace */
fbaf61ad
NC		 977 0x000fffff, /* src_mask */
978 0x000fffff, /* dst_mask */
0a1b45a2 979 false), /* pcrel_offset */
c94cb026 980
fbaf61ad
NC		 981 HOWTO2 (R_NDS32_GOT_LO12, /* type */
982 0, /* rightshift */
c94cb026 983 4, /* size */
fbaf61ad 984 12, /* bitsize */
0a1b45a2 985 false, /* pc_relative */
fbaf61ad
NC		 986 0, /* bitpos */
987 complain_overflow_dont,/* complain_on_overflow */
988 bfd_elf_generic_reloc, /* special_function */
989 "R_NDS32_GOT_LO12", /* name */
0a1b45a2 990 false, /* partial_inplace */
fbaf61ad
NC		 991 0x00000fff, /* src_mask */
992 0x00000fff, /* dst_mask */
0a1b45a2 993 false), /* pcrel_offset */
35c08157
KLC		 994
995 /* An PC Relative relocation used when setting PIC offset table register.
996 Like R_NDS32_HI20, but referring to the GOT table entry for
997 the symbol. */
fbaf61ad
NC		 998 HOWTO2 (R_NDS32_GOTPC_HI20, /* type */
999 12, /* rightshift */
c94cb026 1000 4, /* size */
fbaf61ad 1001 20, /* bitsize */
0a1b45a2 1002 false, /* pc_relative */
fbaf61ad
NC		 1003 0, /* bitpos */
1004 complain_overflow_dont,/* complain_on_overflow */
1005 bfd_elf_generic_reloc, /* special_function */
1006 "R_NDS32_GOTPC_HI20", /* name */
0a1b45a2 1007 false, /* partial_inplace */
fbaf61ad
NC		 1008 0x000fffff, /* src_mask */
1009 0x000fffff, /* dst_mask */
0a1b45a2 1010 true), /* pcrel_offset */
c94cb026 1011
fbaf61ad
NC		 1012 HOWTO2 (R_NDS32_GOTPC_LO12, /* type */
1013 0, /* rightshift */
c94cb026 1014 4, /* size */
fbaf61ad 1015 12, /* bitsize */
0a1b45a2 1016 false, /* pc_relative */
fbaf61ad
NC		 1017 0, /* bitpos */
1018 complain_overflow_dont,/* complain_on_overflow */
1019 bfd_elf_generic_reloc, /* special_function */
1020 "R_NDS32_GOTPC_LO12", /* name */
0a1b45a2 1021 false, /* partial_inplace */
fbaf61ad
NC		 1022 0x00000fff, /* src_mask */
1023 0x00000fff, /* dst_mask */
0a1b45a2 1024 true), /* pcrel_offset */
fbaf61ad
NC		 1025
1026 HOWTO2 (R_NDS32_GOTOFF_HI20, /* type */
1027 12, /* rightshift */
c94cb026 1028 4, /* size */
fbaf61ad 1029 20, /* bitsize */
0a1b45a2 1030 false, /* pc_relative */
fbaf61ad
NC		 1031 0, /* bitpos */
1032 complain_overflow_dont,/* complain_on_overflow */
1033 bfd_elf_generic_reloc, /* special_function */
1034 "R_NDS32_GOTOFF_HI20", /* name */
0a1b45a2 1035 false, /* partial_inplace */
fbaf61ad
NC		 1036 0x000fffff, /* src_mask */
1037 0x000fffff, /* dst_mask */
0a1b45a2 1038 false), /* pcrel_offset */
c94cb026 1039
fbaf61ad
NC		 1040 HOWTO2 (R_NDS32_GOTOFF_LO12, /* type */
1041 0, /* rightshift */
c94cb026 1042 4, /* size */
fbaf61ad 1043 12, /* bitsize */
0a1b45a2 1044 false, /* pc_relative */
fbaf61ad
NC		 1045 0, /* bitpos */
1046 complain_overflow_dont,/* complain_on_overflow */
1047 bfd_elf_generic_reloc, /* special_function */
1048 "R_NDS32_GOTOFF_LO12", /* name */
0a1b45a2 1049 false, /* partial_inplace */
fbaf61ad
NC		 1050 0x00000fff, /* src_mask */
1051 0x00000fff, /* dst_mask */
0a1b45a2 1052 false), /* pcrel_offset */
35c08157
KLC		 1053
1054 /* Alignment hint for relaxable instruction. This is used with
1055 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1056 in order to make next label aligned on word boundary. */
fbaf61ad
NC		 1057 HOWTO2 (R_NDS32_INSN16, /* type */
1058 0, /* rightshift */
c94cb026 1059 4, /* size */
fbaf61ad 1060 32, /* bitsize */
0a1b45a2 1061 false, /* pc_relative */
fbaf61ad
NC		 1062 0, /* bitpos */
1063 complain_overflow_dont,/* complain_on_overflow */
1064 nds32_elf_ignore_reloc,/* special_function */
1065 "R_NDS32_INSN16", /* name */
0a1b45a2 1066 false, /* partial_inplace */
fbaf61ad
NC		 1067 0x00000fff, /* src_mask */
1068 0x00000fff, /* dst_mask */
0a1b45a2 1069 false), /* pcrel_offset */
35c08157
KLC		 1070
1071 /* Alignment hint for label. */
fbaf61ad
NC		 1072 HOWTO2 (R_NDS32_LABEL, /* type */
1073 0, /* rightshift */
c94cb026 1074 4, /* size */
fbaf61ad 1075 32, /* bitsize */
0a1b45a2 1076 false, /* pc_relative */
fbaf61ad
NC		 1077 0, /* bitpos */
1078 complain_overflow_dont,/* complain_on_overflow */
1079 nds32_elf_ignore_reloc,/* special_function */
1080 "R_NDS32_LABEL", /* name */
0a1b45a2 1081 false, /* partial_inplace */
fbaf61ad
NC		 1082 0xffffffff, /* src_mask */
1083 0xffffffff, /* dst_mask */
0a1b45a2 1084 false), /* pcrel_offset */
35c08157
KLC		 1085
1086 /* Relax hint for unconditional call sequence */
fbaf61ad
NC		 1087 HOWTO2 (R_NDS32_LONGCALL1, /* type */
1088 0, /* rightshift */
c94cb026 1089 4, /* size */
fbaf61ad 1090 32, /* bitsize */
0a1b45a2 1091 false, /* pc_relative */
fbaf61ad
NC		 1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 nds32_elf_ignore_reloc,/* special_function */
1095 "R_NDS32_LONGCALL1", /* name */
0a1b45a2 1096 false, /* partial_inplace */
fbaf61ad
NC		 1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
0a1b45a2 1099 false), /* pcrel_offset */
35c08157
KLC		 1100
1101 /* Relax hint for conditional call sequence. */
fbaf61ad
NC		 1102 HOWTO2 (R_NDS32_LONGCALL2, /* type */
1103 0, /* rightshift */
c94cb026 1104 4, /* size */
fbaf61ad 1105 32, /* bitsize */
0a1b45a2 1106 false, /* pc_relative */
fbaf61ad
NC		 1107 0, /* bitpos */
1108 complain_overflow_dont,/* complain_on_overflow */
1109 nds32_elf_ignore_reloc,/* special_function */
1110 "R_NDS32_LONGCALL2", /* name */
0a1b45a2 1111 false, /* partial_inplace */
fbaf61ad
NC		 1112 0xffffffff, /* src_mask */
1113 0xffffffff, /* dst_mask */
0a1b45a2 1114 false), /* pcrel_offset */
35c08157
KLC		 1115
1116 /* Relax hint for conditional call sequence. */
fbaf61ad
NC		 1117 HOWTO2 (R_NDS32_LONGCALL3, /* type */
1118 0, /* rightshift */
c94cb026 1119 4, /* size */
fbaf61ad 1120 32, /* bitsize */
0a1b45a2 1121 false, /* pc_relative */
fbaf61ad
NC		 1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 nds32_elf_ignore_reloc,/* special_function */
1125 "R_NDS32_LONGCALL3", /* name */
0a1b45a2 1126 false, /* partial_inplace */
fbaf61ad
NC		 1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
0a1b45a2 1129 false), /* pcrel_offset */
35c08157
KLC		 1130
1131 /* Relax hint for unconditional branch sequence. */
fbaf61ad
NC		 1132 HOWTO2 (R_NDS32_LONGJUMP1, /* type */
1133 0, /* rightshift */
c94cb026 1134 4, /* size */
fbaf61ad 1135 32, /* bitsize */
0a1b45a2 1136 false, /* pc_relative */
fbaf61ad
NC		 1137 0, /* bitpos */
1138 complain_overflow_dont,/* complain_on_overflow */
1139 nds32_elf_ignore_reloc,/* special_function */
1140 "R_NDS32_LONGJUMP1", /* name */
0a1b45a2 1141 false, /* partial_inplace */
fbaf61ad
NC		 1142 0xffffffff, /* src_mask */
1143 0xffffffff, /* dst_mask */
0a1b45a2 1144 false), /* pcrel_offset */
35c08157
KLC		 1145
1146 /* Relax hint for conditional branch sequence. */
fbaf61ad
NC		 1147 HOWTO2 (R_NDS32_LONGJUMP2, /* type */
1148 0, /* rightshift */
c94cb026 1149 4, /* size */
fbaf61ad 1150 32, /* bitsize */
0a1b45a2 1151 false, /* pc_relative */
fbaf61ad
NC		 1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 nds32_elf_ignore_reloc,/* special_function */
1155 "R_NDS32_LONGJUMP2", /* name */
0a1b45a2 1156 false, /* partial_inplace */
fbaf61ad
NC		 1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
0a1b45a2 1159 false), /* pcrel_offset */
35c08157
KLC		 1160
1161 /* Relax hint for conditional branch sequence. */
fbaf61ad
NC		 1162 HOWTO2 (R_NDS32_LONGJUMP3, /* type */
1163 0, /* rightshift */
c94cb026 1164 4, /* size */
fbaf61ad 1165 32, /* bitsize */
0a1b45a2 1166 false, /* pc_relative */
fbaf61ad
NC		 1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 nds32_elf_ignore_reloc,/* special_function */
1170 "R_NDS32_LONGJUMP3", /* name */
0a1b45a2 1171 false, /* partial_inplace */
fbaf61ad
NC		 1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
0a1b45a2 1174 false), /* pcrel_offset */
35c08157
KLC		 1175
1176 /* Relax hint for load/store sequence. */
fbaf61ad
NC		 1177 HOWTO2 (R_NDS32_LOADSTORE, /* type */
1178 0, /* rightshift */
c94cb026 1179 4, /* size */
fbaf61ad 1180 32, /* bitsize */
0a1b45a2 1181 false, /* pc_relative */
fbaf61ad
NC		 1182 0, /* bitpos */
1183 complain_overflow_dont,/* complain_on_overflow */
1184 nds32_elf_ignore_reloc,/* special_function */
1185 "R_NDS32_LOADSTORE", /* name */
0a1b45a2 1186 false, /* partial_inplace */
fbaf61ad
NC		 1187 0xffffffff, /* src_mask */
1188 0xffffffff, /* dst_mask */
0a1b45a2 1189 false), /* pcrel_offset */
35c08157
KLC		 1190
1191 /* Relax hint for load/store sequence. */
fbaf61ad
NC		 1192 HOWTO2 (R_NDS32_9_FIXED_RELA, /* type */
1193 0, /* rightshift */
c94cb026 1194 2, /* size */
fbaf61ad 1195 16, /* bitsize */
0a1b45a2 1196 false, /* pc_relative */
fbaf61ad
NC		 1197 0, /* bitpos */
1198 complain_overflow_dont,/* complain_on_overflow */
1199 nds32_elf_ignore_reloc,/* special_function */
1200 "R_NDS32_9_FIXED_RELA",/* name */
0a1b45a2 1201 false, /* partial_inplace */
fbaf61ad
NC		 1202 0x000000ff, /* src_mask */
1203 0x000000ff, /* dst_mask */
0a1b45a2 1204 false), /* pcrel_offset */
35c08157
KLC		 1205
1206 /* Relax hint for load/store sequence. */
fbaf61ad
NC		 1207 HOWTO2 (R_NDS32_15_FIXED_RELA,/* type */
1208 0, /* rightshift */
c94cb026 1209 4, /* size */
fbaf61ad 1210 32, /* bitsize */
0a1b45a2 1211 false, /* pc_relative */
fbaf61ad
NC		 1212 0, /* bitpos */
1213 complain_overflow_dont,/* complain_on_overflow */
1214 nds32_elf_ignore_reloc,/* special_function */
1215 "R_NDS32_15_FIXED_RELA",/* name */
0a1b45a2 1216 false, /* partial_inplace */
fbaf61ad
NC		 1217 0x00003fff, /* src_mask */
1218 0x00003fff, /* dst_mask */
0a1b45a2 1219 false), /* pcrel_offset */
35c08157
KLC		 1220
1221 /* Relax hint for load/store sequence. */
fbaf61ad
NC		 1222 HOWTO2 (R_NDS32_17_FIXED_RELA,/* type */
1223 0, /* rightshift */
c94cb026 1224 4, /* size */
fbaf61ad 1225 32, /* bitsize */
0a1b45a2 1226 false, /* pc_relative */
fbaf61ad
NC		 1227 0, /* bitpos */
1228 complain_overflow_dont,/* complain_on_overflow */
1229 nds32_elf_ignore_reloc,/* special_function */
1230 "R_NDS32_17_FIXED_RELA",/* name */
0a1b45a2 1231 false, /* partial_inplace */
fbaf61ad
NC		 1232 0x0000ffff, /* src_mask */
1233 0x0000ffff, /* dst_mask */
0a1b45a2 1234 false), /* pcrel_offset */
35c08157
KLC		 1235
1236 /* Relax hint for load/store sequence. */
fbaf61ad
NC		 1237 HOWTO2 (R_NDS32_25_FIXED_RELA,/* type */
1238 0, /* rightshift */
c94cb026 1239 4, /* size */
fbaf61ad 1240 32, /* bitsize */
0a1b45a2 1241 false, /* pc_relative */
fbaf61ad
NC		 1242 0, /* bitpos */
1243 complain_overflow_dont,/* complain_on_overflow */
1244 nds32_elf_ignore_reloc,/* special_function */
1245 "R_NDS32_25_FIXED_RELA",/* name */
0a1b45a2 1246 false, /* partial_inplace */
fbaf61ad
NC		 1247 0x00ffffff, /* src_mask */
1248 0x00ffffff, /* dst_mask */
0a1b45a2 1249 false), /* pcrel_offset */
35c08157
KLC		 1250
1251 /* High 20 bits of PLT symbol offset relative to PC. */
fbaf61ad
NC		 1252 HOWTO2 (R_NDS32_PLTREL_HI20, /* type */
1253 12, /* rightshift */
c94cb026 1254 4, /* size */
fbaf61ad 1255 20, /* bitsize */
0a1b45a2 1256 false, /* pc_relative */
fbaf61ad
NC		 1257 0, /* bitpos */
1258 complain_overflow_dont,/* complain_on_overflow */
1259 bfd_elf_generic_reloc, /* special_function */
1260 "R_NDS32_PLTREL_HI20", /* name */
0a1b45a2 1261 false, /* partial_inplace */
fbaf61ad
NC		 1262 0x000fffff, /* src_mask */
1263 0x000fffff, /* dst_mask */
0a1b45a2 1264 false), /* pcrel_offset */
35c08157
KLC		 1265
1266 /* Low 12 bits of PLT symbol offset relative to PC. */
fbaf61ad
NC		 1267 HOWTO2 (R_NDS32_PLTREL_LO12, /* type */
1268 0, /* rightshift */
c94cb026 1269 4, /* size */
fbaf61ad 1270 12, /* bitsize */
0a1b45a2 1271 false, /* pc_relative */
fbaf61ad
NC		 1272 0, /* bitpos */
1273 complain_overflow_dont,/* complain_on_overflow */
1274 bfd_elf_generic_reloc, /* special_function */
1275 "R_NDS32_PLTREL_LO12", /* name */
0a1b45a2 1276 false, /* partial_inplace */
fbaf61ad
NC		 1277 0x00000fff, /* src_mask */
1278 0x00000fff, /* dst_mask */
0a1b45a2 1279 false), /* pcrel_offset */
35c08157
KLC		 1280
1281 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
fbaf61ad
NC		 1282 HOWTO2 (R_NDS32_PLT_GOTREL_HI20, /* type */
1283 12, /* rightshift */
c94cb026 1284 4, /* size */
fbaf61ad 1285 20, /* bitsize */
0a1b45a2 1286 false, /* pc_relative */
fbaf61ad
NC		 1287 0, /* bitpos */
1288 complain_overflow_dont,/* complain_on_overflow */
1289 bfd_elf_generic_reloc, /* special_function */
1290 "R_NDS32_PLT_GOTREL_HI20",/* name */
0a1b45a2 1291 false, /* partial_inplace */
fbaf61ad
NC		 1292 0x000fffff, /* src_mask */
1293 0x000fffff, /* dst_mask */
0a1b45a2 1294 false), /* pcrel_offset */
35c08157
KLC		 1295
1296 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
fbaf61ad
NC		 1297 HOWTO2 (R_NDS32_PLT_GOTREL_LO12,/* type */
1298 0, /* rightshift */
c94cb026 1299 4, /* size */
fbaf61ad 1300 12, /* bitsize */
0a1b45a2 1301 false, /* pc_relative */
fbaf61ad
NC		 1302 0, /* bitpos */
1303 complain_overflow_dont,/* complain_on_overflow */
1304 bfd_elf_generic_reloc, /* special_function */
1305 "R_NDS32_PLT_GOTREL_LO12",/* name */
0a1b45a2 1306 false, /* partial_inplace */
fbaf61ad
NC		 1307 0x00000fff, /* src_mask */
1308 0x00000fff, /* dst_mask */
0a1b45a2 1309 false), /* pcrel_offset */
35c08157
KLC		 1310
1311 /* Small data area 12 bits offset. */
fbaf61ad
NC		 1312 HOWTO2 (R_NDS32_SDA12S2_DP_RELA,/* type */
1313 2, /* rightshift */
c94cb026 1314 4, /* size */
fbaf61ad 1315 12, /* bitsize */
0a1b45a2 1316 false, /* pc_relative */
fbaf61ad
NC		 1317 0, /* bitpos */
1318 complain_overflow_signed,/* complain_on_overflow */
1319 bfd_elf_generic_reloc, /* special_function */
1320 "R_NDS32_SDA12S2_DP_RELA",/* name */
0a1b45a2 1321 false, /* partial_inplace */
fbaf61ad
NC		 1322 0x00000fff, /* src_mask */
1323 0x00000fff, /* dst_mask */
0a1b45a2 1324 false), /* pcrel_offset */
35c08157
KLC		 1325
1326 /* Small data area 12 bits offset. */
fbaf61ad
NC		 1327 HOWTO2 (R_NDS32_SDA12S2_SP_RELA,/* type */
1328 2, /* rightshift */
c94cb026 1329 4, /* size */
fbaf61ad 1330 12, /* bitsize */
0a1b45a2 1331 false, /* pc_relative */
fbaf61ad
NC		 1332 0, /* bitpos */
1333 complain_overflow_signed,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_NDS32_SDA12S2_SP_RELA",/* name */
0a1b45a2 1336 false, /* partial_inplace */
fbaf61ad
NC		 1337 0x00000fff, /* src_mask */
1338 0x00000fff, /* dst_mask */
0a1b45a2 1339 false), /* pcrel_offset */
35c08157
KLC		 1340 /* Lower 12 bits of address. */
1341
fbaf61ad
NC		 1342 HOWTO2 (R_NDS32_LO12S2_DP_RELA, /* type */
1343 2, /* rightshift */
c94cb026 1344 4, /* size */
fbaf61ad 1345 10, /* bitsize */
0a1b45a2 1346 false, /* pc_relative */
fbaf61ad
NC		 1347 0, /* bitpos */
1348 complain_overflow_dont,/* complain_on_overflow */
1349 bfd_elf_generic_reloc, /* special_function */
1350 "R_NDS32_LO12S2_DP_RELA",/* name */
0a1b45a2 1351 false, /* partial_inplace */
fbaf61ad
NC		 1352 0x000003ff, /* src_mask */
1353 0x000003ff, /* dst_mask */
0a1b45a2 1354 false), /* pcrel_offset */
35c08157
KLC		 1355
1356 /* Lower 12 bits of address. */
fbaf61ad
NC		 1357 HOWTO2 (R_NDS32_LO12S2_SP_RELA,/* type */
1358 2, /* rightshift */
c94cb026 1359 4, /* size */
fbaf61ad 1360 10, /* bitsize */
0a1b45a2 1361 false, /* pc_relative */
fbaf61ad
NC		 1362 0, /* bitpos */
1363 complain_overflow_dont,/* complain_on_overflow */
1364 bfd_elf_generic_reloc, /* special_function */
1365 "R_NDS32_LO12S2_SP_RELA",/* name */
0a1b45a2 1366 false, /* partial_inplace */
fbaf61ad
NC		 1367 0x000003ff, /* src_mask */
1368 0x000003ff, /* dst_mask */
0a1b45a2 1369 false), /* pcrel_offset */
c94cb026 1370
35c08157 1371 /* Lower 12 bits of address. Special identity for or case. */
fbaf61ad
NC		 1372 HOWTO2 (R_NDS32_LO12S0_ORI_RELA,/* type */
1373 0, /* rightshift */
c94cb026 1374 4, /* size */
fbaf61ad 1375 12, /* bitsize */
0a1b45a2 1376 false, /* pc_relative */
fbaf61ad
NC		 1377 0, /* bitpos */
1378 complain_overflow_dont,/* complain_on_overflow */
1379 bfd_elf_generic_reloc, /* special_function */
1380 "R_NDS32_LO12S0_ORI_RELA",/* name */
0a1b45a2 1381 false, /* partial_inplace */
fbaf61ad
NC		 1382 0x00000fff, /* src_mask */
1383 0x00000fff, /* dst_mask */
0a1b45a2 1384 false), /* pcrel_offset */
c94cb026 1385
35c08157 1386 /* Small data area 19 bits offset. */
fbaf61ad
NC		 1387 HOWTO2 (R_NDS32_SDA16S3_RELA, /* type */
1388 3, /* rightshift */
c94cb026 1389 4, /* size */
fbaf61ad 1390 16, /* bitsize */
0a1b45a2 1391 false, /* pc_relative */
fbaf61ad
NC		 1392 0, /* bitpos */
1393 complain_overflow_signed,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_NDS32_SDA16S3_RELA",/* name */
0a1b45a2 1396 false, /* partial_inplace */
fbaf61ad
NC		 1397 0x0000ffff, /* src_mask */
1398 0x0000ffff, /* dst_mask */
0a1b45a2 1399 false), /* pcrel_offset */
35c08157
KLC		 1400
1401 /* Small data area 15 bits offset. */
fbaf61ad
NC		 1402 HOWTO2 (R_NDS32_SDA17S2_RELA, /* type */
1403 2, /* rightshift */
c94cb026 1404 4, /* size */
fbaf61ad 1405 17, /* bitsize */
0a1b45a2 1406 false, /* pc_relative */
fbaf61ad
NC		 1407 0, /* bitpos */
1408 complain_overflow_signed,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_NDS32_SDA17S2_RELA",/* name */
0a1b45a2 1411 false, /* partial_inplace */
fbaf61ad
NC		 1412 0x0001ffff, /* src_mask */
1413 0x0001ffff, /* dst_mask */
0a1b45a2 1414 false), /* pcrel_offset */
fbaf61ad
NC		 1415
1416 HOWTO2 (R_NDS32_SDA18S1_RELA, /* type */
1417 1, /* rightshift */
c94cb026 1418 4, /* size */
fbaf61ad 1419 18, /* bitsize */
0a1b45a2 1420 false, /* pc_relative */
fbaf61ad
NC		 1421 0, /* bitpos */
1422 complain_overflow_signed,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_NDS32_SDA18S1_RELA",/* name */
0a1b45a2 1425 false, /* partial_inplace */
fbaf61ad
NC		 1426 0x0003ffff, /* src_mask */
1427 0x0003ffff, /* dst_mask */
0a1b45a2 1428 false), /* pcrel_offset */
fbaf61ad
NC		 1429
1430 HOWTO2 (R_NDS32_SDA19S0_RELA, /* type */
1431 0, /* rightshift */
c94cb026 1432 4, /* size */
fbaf61ad 1433 19, /* bitsize */
0a1b45a2 1434 false, /* pc_relative */
fbaf61ad
NC		 1435 0, /* bitpos */
1436 complain_overflow_signed,/* complain_on_overflow */
1437 bfd_elf_generic_reloc, /* special_function */
1438 "R_NDS32_SDA19S0_RELA",/* name */
0a1b45a2 1439 false, /* partial_inplace */
fbaf61ad
NC		 1440 0x0007ffff, /* src_mask */
1441 0x0007ffff, /* dst_mask */
0a1b45a2 1442 false), /* pcrel_offset */
fbaf61ad
NC		 1443 HOWTO2 (R_NDS32_DWARF2_OP1_RELA,/* type */
1444 0, /* rightshift */
c94cb026 1445 1, /* size */
fbaf61ad 1446 8, /* bitsize */
0a1b45a2 1447 false, /* pc_relative */
fbaf61ad
NC		 1448 0, /* bitpos */
1449 complain_overflow_dont,/* complain_on_overflow */
1450 nds32_elf_ignore_reloc,/* special_function */
1451 "R_NDS32_DWARF2_OP1_RELA",/* name */
0a1b45a2 1452 false, /* partial_inplace */
fbaf61ad
NC		 1453 0xff, /* src_mask */
1454 0xff, /* dst_mask */
0a1b45a2 1455 false), /* pcrel_offset */
c94cb026 1456
fbaf61ad
NC		 1457 HOWTO2 (R_NDS32_DWARF2_OP2_RELA,/* type */
1458 0, /* rightshift */
c94cb026 1459 2, /* size */
fbaf61ad 1460 16, /* bitsize */
0a1b45a2 1461 false, /* pc_relative */
fbaf61ad
NC		 1462 0, /* bitpos */
1463 complain_overflow_dont,/* complain_on_overflow */
1464 nds32_elf_ignore_reloc,/* special_function */
1465 "R_NDS32_DWARF2_OP2_RELA",/* name */
0a1b45a2 1466 false, /* partial_inplace */
fbaf61ad
NC		 1467 0xffff, /* src_mask */
1468 0xffff, /* dst_mask */
0a1b45a2 1469 false), /* pcrel_offset */
c94cb026 1470
fbaf61ad
NC		 1471 HOWTO2 (R_NDS32_DWARF2_LEB_RELA,/* type */
1472 0, /* rightshift */
c94cb026 1473 4, /* size */
fbaf61ad 1474 32, /* bitsize */
0a1b45a2 1475 false, /* pc_relative */
fbaf61ad
NC		 1476 0, /* bitpos */
1477 complain_overflow_dont,/* complain_on_overflow */
1478 nds32_elf_ignore_reloc,/* special_function */
1479 "R_NDS32_DWARF2_LEB_RELA",/* name */
0a1b45a2 1480 false, /* partial_inplace */
fbaf61ad
NC		 1481 0xffffffff, /* src_mask */
1482 0xffffffff, /* dst_mask */
0a1b45a2 1483 false), /* pcrel_offset */
c94cb026 1484
fbaf61ad
NC		 1485 HOWTO2 (R_NDS32_UPDATE_TA_RELA,/* type */
1486 0, /* rightshift */
c94cb026 1487 2, /* size */
fbaf61ad 1488 16, /* bitsize */
0a1b45a2 1489 false, /* pc_relative */
fbaf61ad
NC		 1490 0, /* bitpos */
1491 complain_overflow_dont,/* complain_on_overflow */
1492 nds32_elf_ignore_reloc,/* special_function */
1493 "R_NDS32_UPDATE_TA_RELA",/* name */
0a1b45a2 1494 false, /* partial_inplace */
fbaf61ad
NC		 1495 0xffff, /* src_mask */
1496 0xffff, /* dst_mask */
0a1b45a2 1497 false), /* pcrel_offset */
c94cb026 1498
35c08157
KLC		 1499 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1500 entry for the symbol. */
fbaf61ad
NC		 1501 HOWTO2 (R_NDS32_9_PLTREL, /* type */
1502 1, /* rightshift */
c94cb026 1503 2, /* size */
fbaf61ad 1504 8, /* bitsize */
0a1b45a2 1505 true, /* pc_relative */
fbaf61ad
NC		 1506 0, /* bitpos */
1507 complain_overflow_signed,/* complain_on_overflow */
1508 bfd_elf_generic_reloc, /* special_function */
1509 "R_NDS32_9_PLTREL", /* name */
0a1b45a2 1510 false, /* partial_inplace */
fbaf61ad
NC		 1511 0xff, /* src_mask */
1512 0xff, /* dst_mask */
0a1b45a2 1513 true), /* pcrel_offset */
c94cb026 1514
35c08157 1515 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
fbaf61ad
NC		 1516 HOWTO2 (R_NDS32_PLT_GOTREL_LO20,/* type */
1517 0, /* rightshift */
c94cb026 1518 4, /* size */
fbaf61ad 1519 20, /* bitsize */
0a1b45a2 1520 false, /* pc_relative */
fbaf61ad
NC		 1521 0, /* bitpos */
1522 complain_overflow_dont,/* complain_on_overflow */
1523 bfd_elf_generic_reloc, /* special_function */
1524 "R_NDS32_PLT_GOTREL_LO20",/* name */
0a1b45a2 1525 false, /* partial_inplace */
fbaf61ad
NC		 1526 0x000fffff, /* src_mask */
1527 0x000fffff, /* dst_mask */
0a1b45a2 1528 false), /* pcrel_offset */
c94cb026 1529
fbaf61ad
NC		 1530 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1531 HOWTO2 (R_NDS32_PLT_GOTREL_LO15,/* type */
1532 0, /* rightshift */
c94cb026 1533 4, /* size */
fbaf61ad 1534 15, /* bitsize */
0a1b45a2 1535 false, /* pc_relative */
fbaf61ad
NC		 1536 0, /* bitpos */
1537 complain_overflow_dont,/* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_NDS32_PLT_GOTREL_LO15",/* name */
0a1b45a2 1540 false, /* partial_inplace */
fbaf61ad
NC		 1541 0x00007fff, /* src_mask */
1542 0x00007fff, /* dst_mask */
0a1b45a2 1543 false), /* pcrel_offset */
c94cb026 1544
35c08157 1545 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
fbaf61ad
NC		 1546 HOWTO2 (R_NDS32_PLT_GOTREL_LO19,/* type */
1547 0, /* rightshift */
c94cb026 1548 4, /* size */
fbaf61ad 1549 19, /* bitsize */
0a1b45a2 1550 false, /* pc_relative */
fbaf61ad
NC		 1551 0, /* bitpos */
1552 complain_overflow_dont,/* complain_on_overflow */
1553 bfd_elf_generic_reloc, /* special_function */
1554 "R_NDS32_PLT_GOTREL_LO19",/* name */
0a1b45a2 1555 false, /* partial_inplace */
fbaf61ad
NC		 1556 0x0007ffff, /* src_mask */
1557 0x0007ffff, /* dst_mask */
0a1b45a2 1558 false), /* pcrel_offset */
c94cb026 1559
fbaf61ad
NC		 1560 HOWTO2 (R_NDS32_GOT_LO15, /* type */
1561 0, /* rightshift */
c94cb026 1562 4, /* size */
fbaf61ad 1563 15, /* bitsize */
0a1b45a2 1564 false, /* pc_relative */
fbaf61ad
NC		 1565 0, /* bitpos */
1566 complain_overflow_dont,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_NDS32_GOT_LO15", /* name */
0a1b45a2 1569 false, /* partial_inplace */
fbaf61ad
NC		 1570 0x00007fff, /* src_mask */
1571 0x00007fff, /* dst_mask */
0a1b45a2 1572 false), /* pcrel_offset */
c94cb026 1573
fbaf61ad
NC		 1574 HOWTO2 (R_NDS32_GOT_LO19, /* type */
1575 0, /* rightshift */
c94cb026 1576 4, /* size */
fbaf61ad 1577 19, /* bitsize */
0a1b45a2 1578 false, /* pc_relative */
fbaf61ad
NC		 1579 0, /* bitpos */
1580 complain_overflow_dont,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_NDS32_GOT_LO19", /* name */
0a1b45a2 1583 false, /* partial_inplace */
fbaf61ad
NC		 1584 0x0007ffff, /* src_mask */
1585 0x0007ffff, /* dst_mask */
0a1b45a2 1586 false), /* pcrel_offset */
c94cb026 1587
fbaf61ad
NC		 1588 HOWTO2 (R_NDS32_GOTOFF_LO15, /* type */
1589 0, /* rightshift */
c94cb026 1590 4, /* size */
fbaf61ad 1591 15, /* bitsize */
0a1b45a2 1592 false, /* pc_relative */
fbaf61ad
NC		 1593 0, /* bitpos */
1594 complain_overflow_dont,/* complain_on_overflow */
1595 bfd_elf_generic_reloc, /* special_function */
1596 "R_NDS32_GOTOFF_LO15", /* name */
0a1b45a2 1597 false, /* partial_inplace */
fbaf61ad
NC		 1598 0x00007fff, /* src_mask */
1599 0x00007fff, /* dst_mask */
0a1b45a2 1600 false), /* pcrel_offset */
c94cb026 1601
fbaf61ad
NC		 1602 HOWTO2 (R_NDS32_GOTOFF_LO19, /* type */
1603 0, /* rightshift */
c94cb026 1604 4, /* size */
fbaf61ad 1605 19, /* bitsize */
0a1b45a2 1606 false, /* pc_relative */
fbaf61ad
NC		 1607 0, /* bitpos */
1608 complain_overflow_dont,/* complain_on_overflow */
1609 bfd_elf_generic_reloc, /* special_function */
1610 "R_NDS32_GOTOFF_LO19", /* name */
0a1b45a2 1611 false, /* partial_inplace */
fbaf61ad
NC		 1612 0x0007ffff, /* src_mask */
1613 0x0007ffff, /* dst_mask */
0a1b45a2 1614 false), /* pcrel_offset */
c94cb026 1615
35c08157 1616 /* GOT 15 bits offset. */
fbaf61ad
NC		 1617 HOWTO2 (R_NDS32_GOT15S2_RELA, /* type */
1618 2, /* rightshift */
c94cb026 1619 4, /* size */
fbaf61ad 1620 15, /* bitsize */
0a1b45a2 1621 false, /* pc_relative */
fbaf61ad
NC		 1622 0, /* bitpos */
1623 complain_overflow_signed,/* complain_on_overflow */
1624 bfd_elf_generic_reloc, /* special_function */
1625 "R_NDS32_GOT15S2_RELA",/* name */
0a1b45a2 1626 false, /* partial_inplace */
fbaf61ad
NC		 1627 0x00007fff, /* src_mask */
1628 0x00007fff, /* dst_mask */
0a1b45a2 1629 false), /* pcrel_offset */
c94cb026 1630
35c08157 1631 /* GOT 17 bits offset. */
fbaf61ad
NC		 1632 HOWTO2 (R_NDS32_GOT17S2_RELA, /* type */
1633 2, /* rightshift */
c94cb026 1634 4, /* size */
fbaf61ad 1635 17, /* bitsize */
0a1b45a2 1636 false, /* pc_relative */
fbaf61ad
NC		 1637 0, /* bitpos */
1638 complain_overflow_signed,/* complain_on_overflow */
1639 bfd_elf_generic_reloc, /* special_function */
1640 "R_NDS32_GOT17S2_RELA",/* name */
0a1b45a2 1641 false, /* partial_inplace */
fbaf61ad
NC		 1642 0x0001ffff, /* src_mask */
1643 0x0001ffff, /* dst_mask */
0a1b45a2 1644 false), /* pcrel_offset */
c94cb026 1645
35c08157 1646 /* A 5 bit address. */
fbaf61ad
NC		 1647 HOWTO2 (R_NDS32_5_RELA, /* type */
1648 0, /* rightshift */
c94cb026 1649 2, /* size */
fbaf61ad 1650 5, /* bitsize */
0a1b45a2 1651 false, /* pc_relative */
fbaf61ad
NC		 1652 0, /* bitpos */
1653 complain_overflow_signed,/* complain_on_overflow */
1654 bfd_elf_generic_reloc, /* special_function */
1655 "R_NDS32_5_RELA", /* name */
0a1b45a2 1656 false, /* partial_inplace */
fbaf61ad
NC		 1657 0x1f, /* src_mask */
1658 0x1f, /* dst_mask */
0a1b45a2 1659 false), /* pcrel_offset */
c94cb026 1660
fbaf61ad
NC		 1661 HOWTO2 (R_NDS32_10_UPCREL_RELA,/* type */
1662 1, /* rightshift */
c94cb026 1663 2, /* size */
fbaf61ad 1664 9, /* bitsize */
0a1b45a2 1665 true, /* pc_relative */
fbaf61ad
NC		 1666 0, /* bitpos */
1667 complain_overflow_unsigned,/* complain_on_overflow */
1668 bfd_elf_generic_reloc, /* special_function */
1669 "R_NDS32_10_UPCREL_RELA",/* name */
0a1b45a2 1670 false, /* partial_inplace */
fbaf61ad
NC		 1671 0x1ff, /* src_mask */
1672 0x1ff, /* dst_mask */
0a1b45a2 1673 true), /* pcrel_offset */
c94cb026 1674
fbaf61ad
NC		 1675 HOWTO2 (R_NDS32_SDA_FP7U2_RELA,/* type */
1676 2, /* rightshift */
c94cb026 1677 2, /* size */
fbaf61ad 1678 7, /* bitsize */
0a1b45a2 1679 false, /* pc_relative */
fbaf61ad
NC		 1680 0, /* bitpos */
1681 complain_overflow_unsigned,/* complain_on_overflow */
1682 bfd_elf_generic_reloc, /* special_function */
1683 "R_NDS32_SDA_FP7U2_RELA",/* name */
0a1b45a2 1684 false, /* partial_inplace */
fbaf61ad
NC		 1685 0x0000007f, /* src_mask */
1686 0x0000007f, /* dst_mask */
0a1b45a2 1687 false), /* pcrel_offset */
c94cb026 1688
fbaf61ad
NC		 1689 HOWTO2 (R_NDS32_WORD_9_PCREL_RELA,/* type */
1690 1, /* rightshift */
c94cb026 1691 4, /* size */
fbaf61ad 1692 8, /* bitsize */
0a1b45a2 1693 true, /* pc_relative */
fbaf61ad
NC		 1694 0, /* bitpos */
1695 complain_overflow_signed,/* complain_on_overflow */
1696 bfd_elf_generic_reloc, /* special_function */
1697 "R_NDS32_WORD_9_PCREL_RELA",/* name */
0a1b45a2 1698 false, /* partial_inplace */
fbaf61ad
NC		 1699 0xff, /* src_mask */
1700 0xff, /* dst_mask */
0a1b45a2 1701 true), /* pcrel_offset */
c94cb026 1702
fbaf61ad
NC		 1703 HOWTO2 (R_NDS32_25_ABS_RELA, /* type */
1704 1, /* rightshift */
c94cb026 1705 4, /* size */
fbaf61ad 1706 24, /* bitsize */
0a1b45a2 1707 false, /* pc_relative */
fbaf61ad
NC		 1708 0, /* bitpos */
1709 complain_overflow_dont,/* complain_on_overflow */
1710 bfd_elf_generic_reloc, /* special_function */
1711 "R_NDS32_25_ABS_RELA", /* name */
0a1b45a2 1712 false, /* partial_inplace */
fbaf61ad
NC		 1713 0xffffff, /* src_mask */
1714 0xffffff, /* dst_mask */
0a1b45a2 1715 false), /* pcrel_offset */
35c08157
KLC		 1716
1717 /* A relative 17 bit relocation for ifc, right shifted by 1. */
fbaf61ad
NC		 1718 HOWTO2 (R_NDS32_17IFC_PCREL_RELA,/* type */
1719 1, /* rightshift */
c94cb026 1720 4, /* size */
fbaf61ad 1721 16, /* bitsize */
0a1b45a2 1722 true, /* pc_relative */
fbaf61ad
NC		 1723 0, /* bitpos */
1724 complain_overflow_signed,/* complain_on_overflow */
1725 bfd_elf_generic_reloc, /* special_function */
1726 "R_NDS32_17IFC_PCREL_RELA",/* name */
0a1b45a2 1727 false, /* partial_inplace */
fbaf61ad
NC		 1728 0xffff, /* src_mask */
1729 0xffff, /* dst_mask */
0a1b45a2 1730 true), /* pcrel_offset */
35c08157
KLC		 1731
1732 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
fbaf61ad
NC		 1733 HOWTO2 (R_NDS32_10IFCU_PCREL_RELA,/* type */
1734 1, /* rightshift */
c94cb026 1735 2, /* size */
fbaf61ad 1736 9, /* bitsize */
0a1b45a2 1737 true, /* pc_relative */
fbaf61ad
NC		 1738 0, /* bitpos */
1739 complain_overflow_unsigned,/* complain_on_overflow */
1740 bfd_elf_generic_reloc, /* special_function */
1741 "R_NDS32_10IFCU_PCREL_RELA",/* name */
0a1b45a2 1742 false, /* partial_inplace */
fbaf61ad
NC		 1743 0x1ff, /* src_mask */
1744 0x1ff, /* dst_mask */
0a1b45a2 1745 true), /* pcrel_offset */
fbaf61ad
NC		 1746
1747 /* Like R_NDS32_HI20, but referring to the TLS LE entry for the symbol. */
1748 HOWTO2 (R_NDS32_TLS_LE_HI20, /* type */
1749 12, /* rightshift */
c94cb026 1750 4, /* size */
fbaf61ad 1751 20, /* bitsize */
0a1b45a2 1752 false, /* pc_relative */
fbaf61ad
NC		 1753 0, /* bitpos */
1754 complain_overflow_dont,/* complain_on_overflow */
1755 bfd_elf_generic_reloc, /* special_function */
1756 "R_NDS32_TLS_LE_HI20", /* name */
0a1b45a2 1757 false, /* partial_inplace */
fbaf61ad
NC		 1758 0x000fffff, /* src_mask */
1759 0x000fffff, /* dst_mask */
0a1b45a2 1760 false), /* pcrel_offset */
fbaf61ad
NC		 1761
1762 HOWTO2 (R_NDS32_TLS_LE_LO12, /* type */
1763 0, /* rightshift */
c94cb026 1764 4, /* size */
fbaf61ad 1765 12, /* bitsize */
0a1b45a2 1766 false, /* pc_relative */
fbaf61ad
NC		 1767 0, /* bitpos */
1768 complain_overflow_dont,/* complain_on_overflow */
1769 bfd_elf_generic_reloc, /* special_function */
1770 "R_NDS32_TLS_LE_LO12", /* name */
0a1b45a2 1771 false, /* partial_inplace */
fbaf61ad
NC		 1772 0x00000fff, /* src_mask */
1773 0x00000fff, /* dst_mask */
0a1b45a2 1774 false), /* pcrel_offset */
fbaf61ad
NC		 1775
1776 /* Like R_NDS32_HI20, but referring to the TLS IE entry for the symbol. */
1777 HOWTO2 (R_NDS32_TLS_IE_HI20, /* type */
1778 12, /* rightshift */
c94cb026 1779 4, /* size */
fbaf61ad 1780 20, /* bitsize */
0a1b45a2 1781 false, /* pc_relative */
fbaf61ad
NC		 1782 0, /* bitpos */
1783 complain_overflow_dont,/* complain_on_overflow */
1784 bfd_elf_generic_reloc, /* special_function */
1785 "R_NDS32_TLS_IE_HI20", /* name */
0a1b45a2 1786 false, /* partial_inplace */
fbaf61ad
NC		 1787 0x000fffff, /* src_mask */
1788 0x000fffff, /* dst_mask */
0a1b45a2 1789 false), /* pcrel_offset */
fbaf61ad
NC		 1790
1791 HOWTO2 (R_NDS32_TLS_IE_LO12S2,/* type */
1792 2, /* rightshift */
c94cb026 1793 4, /* size */
fbaf61ad 1794 10, /* bitsize */
0a1b45a2 1795 false, /* pc_relative */
fbaf61ad
NC		 1796 0, /* bitpos */
1797 complain_overflow_dont,/* complain_on_overflow */
1798 bfd_elf_generic_reloc, /* special_function */
1799 "R_NDS32_TLS_IE_LO12S2",/* name */
0a1b45a2 1800 false, /* partial_inplace */
fbaf61ad
NC		 1801 0x000003ff, /* src_mask */
1802 0x000003ff, /* dst_mask */
0a1b45a2 1803 false), /* pcrel_offset */
fbaf61ad
NC		 1804
1805 /* TLS LE TP offset relocation */
1806 HOWTO2 (R_NDS32_TLS_TPOFF, /* type */
1807 0, /* rightshift */
c94cb026 1808 4, /* size */
fbaf61ad 1809 32, /* bitsize */
0a1b45a2 1810 false, /* pc_relative */
fbaf61ad
NC		 1811 0, /* bitpos */
1812 complain_overflow_bitfield,/* complain_on_overflow */
1813 bfd_elf_generic_reloc, /* special_function */
1814 "R_NDS32_TLS_TPOFF", /* name */
0a1b45a2 1815 false, /* partial_inplace */
fbaf61ad
NC		 1816 0xffffffff, /* src_mask */
1817 0xffffffff, /* dst_mask */
0a1b45a2 1818 false), /* pcrel_offset */
fbaf61ad 1819
1c8f6a4d 1820 /* A 20 bit address. */
fbaf61ad
NC		 1821 HOWTO2 (R_NDS32_TLS_LE_20, /* type */
1822 0, /* rightshift */
c94cb026 1823 4, /* size */
fbaf61ad 1824 20, /* bitsize */
0a1b45a2 1825 false, /* pc_relative */
fbaf61ad
NC		 1826 0, /* bitpos */
1827 complain_overflow_signed,/* complain_on_overflow */
1828 bfd_elf_generic_reloc, /* special_function */
1829 "R_NDS32_TLS_LE_20", /* name */
0a1b45a2 1830 false, /* partial_inplace */
fbaf61ad
NC		 1831 0xfffff, /* src_mask */
1832 0xfffff, /* dst_mask */
0a1b45a2 1833 false), /* pcrel_offset */
fbaf61ad
NC		 1834
1835 HOWTO2 (R_NDS32_TLS_LE_15S0, /* type */
1836 0, /* rightshift */
c94cb026 1837 4, /* size */
fbaf61ad 1838 15, /* bitsize */
0a1b45a2 1839 false, /* pc_relative */
fbaf61ad
NC		 1840 0, /* bitpos */
1841 complain_overflow_signed,/* complain_on_overflow */
1842 bfd_elf_generic_reloc, /* special_function */
1843 "R_NDS32_TLS_LE_15S0", /* name */
0a1b45a2 1844 false, /* partial_inplace */
fbaf61ad
NC		 1845 0x7fff, /* src_mask */
1846 0x7fff, /* dst_mask */
0a1b45a2 1847 false), /* pcrel_offset */
c94cb026 1848
fbaf61ad
NC		 1849 HOWTO2 (R_NDS32_TLS_LE_15S1, /* type */
1850 1, /* rightshift */
c94cb026 1851 4, /* size */
fbaf61ad 1852 15, /* bitsize */
0a1b45a2 1853 false, /* pc_relative */
fbaf61ad
NC		 1854 0, /* bitpos */
1855 complain_overflow_signed,/* complain_on_overflow */
1856 bfd_elf_generic_reloc, /* special_function */
1857 "R_NDS32_TLS_LE_15S1", /* name */
0a1b45a2 1858 false, /* partial_inplace */
fbaf61ad
NC		 1859 0x7fff, /* src_mask */
1860 0x7fff, /* dst_mask */
0a1b45a2 1861 false), /* pcrel_offset */
c94cb026 1862
fbaf61ad
NC		 1863 HOWTO2 (R_NDS32_TLS_LE_15S2, /* type */
1864 2, /* rightshift */
c94cb026 1865 4, /* size */
fbaf61ad 1866 15, /* bitsize */
0a1b45a2 1867 false, /* pc_relative */
fbaf61ad
NC		 1868 0, /* bitpos */
1869 complain_overflow_signed,/* complain_on_overflow */
1870 bfd_elf_generic_reloc, /* special_function */
1871 "R_NDS32_TLS_LE_15S2", /* name */
0a1b45a2 1872 false, /* partial_inplace */
fbaf61ad
NC		 1873 0x7fff, /* src_mask */
1874 0x7fff, /* dst_mask */
0a1b45a2 1875 false), /* pcrel_offset */
1c8f6a4d
KLC		 1876
1877 /* Relax hint for unconditional call sequence */
fbaf61ad
NC		 1878 HOWTO2 (R_NDS32_LONGCALL4, /* type */
1879 0, /* rightshift */
c94cb026 1880 4, /* size */
fbaf61ad 1881 32, /* bitsize */
0a1b45a2 1882 false, /* pc_relative */
fbaf61ad
NC		 1883 0, /* bitpos */
1884 complain_overflow_dont,/* complain_on_overflow */
1885 nds32_elf_ignore_reloc,/* special_function */
1886 "R_NDS32_LONGCALL4", /* name */
0a1b45a2 1887 false, /* partial_inplace */
fbaf61ad
NC		 1888 0xffffffff, /* src_mask */
1889 0xffffffff, /* dst_mask */
0a1b45a2 1890 false), /* pcrel_offset */
1c8f6a4d
KLC		 1891
1892 /* Relax hint for conditional call sequence. */
fbaf61ad
NC		 1893 HOWTO2 (R_NDS32_LONGCALL5, /* type */
1894 0, /* rightshift */
c94cb026 1895 4, /* size */
fbaf61ad 1896 32, /* bitsize */
0a1b45a2 1897 false, /* pc_relative */
fbaf61ad
NC		 1898 0, /* bitpos */
1899 complain_overflow_dont,/* complain_on_overflow */
1900 nds32_elf_ignore_reloc,/* special_function */
1901 "R_NDS32_LONGCALL5", /* name */
0a1b45a2 1902 false, /* partial_inplace */
fbaf61ad
NC		 1903 0xffffffff, /* src_mask */
1904 0xffffffff, /* dst_mask */
0a1b45a2 1905 false), /* pcrel_offset */
1c8f6a4d
KLC		 1906
1907 /* Relax hint for conditional call sequence. */
fbaf61ad
NC		 1908 HOWTO2 (R_NDS32_LONGCALL6, /* type */
1909 0, /* rightshift */
c94cb026 1910 4, /* size */
fbaf61ad 1911 32, /* bitsize */
0a1b45a2 1912 false, /* pc_relative */
fbaf61ad
NC		 1913 0, /* bitpos */
1914 complain_overflow_dont,/* complain_on_overflow */
1915 nds32_elf_ignore_reloc,/* special_function */
1916 "R_NDS32_LONGCALL6", /* name */
0a1b45a2 1917 false, /* partial_inplace */
fbaf61ad
NC		 1918 0xffffffff, /* src_mask */
1919 0xffffffff, /* dst_mask */
0a1b45a2 1920 false), /* pcrel_offset */
1c8f6a4d
KLC		 1921
1922 /* Relax hint for unconditional branch sequence. */
fbaf61ad
NC		 1923 HOWTO2 (R_NDS32_LONGJUMP4, /* type */
1924 0, /* rightshift */
c94cb026 1925 4, /* size */
fbaf61ad 1926 32, /* bitsize */
0a1b45a2 1927 false, /* pc_relative */
fbaf61ad
NC		 1928 0, /* bitpos */
1929 complain_overflow_dont,/* complain_on_overflow */
1930 nds32_elf_ignore_reloc,/* special_function */
1931 "R_NDS32_LONGJUMP4", /* name */
0a1b45a2 1932 false, /* partial_inplace */
fbaf61ad
NC		 1933 0xffffffff, /* src_mask */
1934 0xffffffff, /* dst_mask */
0a1b45a2 1935 false), /* pcrel_offset */
1c8f6a4d
KLC		 1936
1937 /* Relax hint for conditional branch sequence. */
fbaf61ad
NC		 1938 HOWTO2 (R_NDS32_LONGJUMP5, /* type */
1939 0, /* rightshift */
c94cb026 1940 4, /* size */
fbaf61ad 1941 32, /* bitsize */
0a1b45a2 1942 false, /* pc_relative */
fbaf61ad
NC		 1943 0, /* bitpos */
1944 complain_overflow_dont,/* complain_on_overflow */
1945 nds32_elf_ignore_reloc,/* special_function */
1946 "R_NDS32_LONGJUMP5", /* name */
0a1b45a2 1947 false, /* partial_inplace */
fbaf61ad
NC		 1948 0xffffffff, /* src_mask */
1949 0xffffffff, /* dst_mask */
0a1b45a2 1950 false), /* pcrel_offset */
1c8f6a4d
KLC		 1951
1952 /* Relax hint for conditional branch sequence. */
fbaf61ad
NC		 1953 HOWTO2 (R_NDS32_LONGJUMP6, /* type */
1954 0, /* rightshift */
c94cb026 1955 4, /* size */
fbaf61ad 1956 32, /* bitsize */
0a1b45a2 1957 false, /* pc_relative */
fbaf61ad
NC		 1958 0, /* bitpos */
1959 complain_overflow_dont,/* complain_on_overflow */
1960 nds32_elf_ignore_reloc,/* special_function */
1961 "R_NDS32_LONGJUMP6", /* name */
0a1b45a2 1962 false, /* partial_inplace */
fbaf61ad
NC		 1963 0xffffffff, /* src_mask */
1964 0xffffffff, /* dst_mask */
0a1b45a2 1965 false), /* pcrel_offset */
1c8f6a4d
KLC		 1966
1967 /* Relax hint for conditional branch sequence. */
fbaf61ad
NC		 1968 HOWTO2 (R_NDS32_LONGJUMP7, /* type */
1969 0, /* rightshift */
c94cb026 1970 4, /* size */
fbaf61ad 1971 32, /* bitsize */
0a1b45a2 1972 false, /* pc_relative */
fbaf61ad
NC		 1973 0, /* bitpos */
1974 complain_overflow_dont,/* complain_on_overflow */
1975 nds32_elf_ignore_reloc,/* special_function */
1976 "R_NDS32_LONGJUMP7", /* name */
0a1b45a2 1977 false, /* partial_inplace */
fbaf61ad
NC		 1978 0xffffffff, /* src_mask */
1979 0xffffffff, /* dst_mask */
0a1b45a2 1980 false), /* pcrel_offset */
fbaf61ad 1981
a379e758
AM		 1982 EMPTY_HOWTO (114),
1983
fbaf61ad
NC		 1984 HOWTO2 (R_NDS32_TLS_IE_LO12, /* type */
1985 0, /* rightshift */
c94cb026 1986 4, /* size */
fbaf61ad 1987 12, /* bitsize */
0a1b45a2 1988 false, /* pc_relative */
fbaf61ad
NC		 1989 0, /* bitpos */
1990 complain_overflow_dont,/* complain_on_overflow */
1991 bfd_elf_generic_reloc, /* special_function */
1992 "R_NDS32_TLS_IE_LO12", /* name */
0a1b45a2 1993 false, /* partial_inplace */
fbaf61ad
NC		 1994 0x00000fff, /* src_mask */
1995 0x00000fff, /* dst_mask */
0a1b45a2 1996 false), /* pcrel_offset */
fbaf61ad
NC		 1997
1998 /* Like R_NDS32_HI20, but referring to the TLS IE (PIE)
1999 entry for the symbol. */
2000 HOWTO2 (R_NDS32_TLS_IEGP_HI20,/* type */
2001 12, /* rightshift */
c94cb026 2002 4, /* size */
fbaf61ad 2003 20, /* bitsize */
0a1b45a2 2004 false, /* pc_relative */
fbaf61ad
NC		 2005 0, /* bitpos */
2006 complain_overflow_dont,/* complain_on_overflow */
2007 bfd_elf_generic_reloc, /* special_function */
2008 "R_NDS32_TLS_IEGP_HI20",/* name */
0a1b45a2 2009 false, /* partial_inplace */
fbaf61ad
NC		 2010 0x000fffff, /* src_mask */
2011 0x000fffff, /* dst_mask */
0a1b45a2 2012 false), /* pcrel_offset */
fbaf61ad
NC		 2013
2014 HOWTO2 (R_NDS32_TLS_IEGP_LO12,/* type */
2015 0, /* rightshift */
c94cb026 2016 4, /* size */
fbaf61ad 2017 12, /* bitsize */
0a1b45a2 2018 false, /* pc_relative */
fbaf61ad
NC		 2019 0, /* bitpos */
2020 complain_overflow_dont,/* complain_on_overflow */
2021 bfd_elf_generic_reloc, /* special_function */
2022 "R_NDS32_TLS_IEGP_LO12",/* name */
0a1b45a2 2023 false, /* partial_inplace */
fbaf61ad
NC		 2024 0x00000fff, /* src_mask */
2025 0x00000fff, /* dst_mask */
0a1b45a2 2026 false), /* pcrel_offset */
fbaf61ad
NC		 2027
2028 HOWTO2 (R_NDS32_TLS_IEGP_LO12S2,/* type */
2029 2, /* rightshift */
c94cb026 2030 4, /* size */
fbaf61ad 2031 10, /* bitsize */
0a1b45a2 2032 false, /* pc_relative */
fbaf61ad
NC		 2033 0, /* bitpos */
2034 complain_overflow_dont,/* complain_on_overflow */
2035 bfd_elf_generic_reloc, /* special_function */
2036 "R_NDS32_TLS_IEGP_LO12S2",/* name */
0a1b45a2 2037 false, /* partial_inplace */
fbaf61ad
NC		 2038 0x000003ff, /* src_mask */
2039 0x000003ff, /* dst_mask */
0a1b45a2 2040 false), /* pcrel_offset */
fbaf61ad
NC		 2041
2042 /* TLS description relocation */
2043 HOWTO2 (R_NDS32_TLS_DESC, /* type */
2044 12, /* rightshift */
c94cb026 2045 4, /* size */
fbaf61ad 2046 20, /* bitsize */
0a1b45a2 2047 false, /* pc_relative */
fbaf61ad
NC		 2048 0, /* bitpos */
2049 complain_overflow_dont,/* complain_on_overflow */
2050 nds32_elf_hi20_reloc, /* special_function */
2051 "R_NDS32_TLS_DESC_HI20",/* name */
0a1b45a2 2052 false, /* partial_inplace */
fbaf61ad
NC		 2053 0x000fffff, /* src_mask */
2054 0x000fffff, /* dst_mask */
0a1b45a2 2055 false), /* pcrel_offset */
fbaf61ad
NC		 2056
2057 /* TLS GD/LD description offset high part. */
2058 HOWTO2 (R_NDS32_TLS_DESC_HI20,/* type */
2059 12, /* rightshift */
c94cb026 2060 4, /* size */
fbaf61ad 2061 20, /* bitsize */
0a1b45a2 2062 false, /* pc_relative */
fbaf61ad
NC		 2063 0, /* bitpos */
2064 complain_overflow_dont,/* complain_on_overflow */
2065 nds32_elf_hi20_reloc, /* special_function */
2066 "R_NDS32_TLS_DESC_HI20",/* name */
0a1b45a2 2067 false, /* partial_inplace */
fbaf61ad
NC		 2068 0x000fffff, /* src_mask */
2069 0x000fffff, /* dst_mask */
0a1b45a2 2070 false), /* pcrel_offset */
fbaf61ad
NC		 2071
2072 /* TLS GD/LD description offset low part. */
2073 HOWTO2 (R_NDS32_TLS_DESC_LO12,/* type */
2074 0, /* rightshift */
c94cb026 2075 4, /* size */
fbaf61ad 2076 12, /* bitsize */
0a1b45a2 2077 false, /* pc_relative */
fbaf61ad
NC		 2078 0, /* bitpos */
2079 complain_overflow_dont,/* complain_on_overflow */
2080 nds32_elf_lo12_reloc, /* special_function */
2081 "R_NDS32_TLS_DESC_LO12",/* name */
0a1b45a2 2082 false, /* partial_inplace */
fbaf61ad
NC		 2083 0x00000fff, /* src_mask */
2084 0x00000fff, /* dst_mask */
0a1b45a2 2085 false), /* pcrel_offset */
fbaf61ad
NC		 2086
2087 /* TLS GD/LD description offset set (movi). */
2088 HOWTO2 (R_NDS32_TLS_DESC_20, /* type */
2089 0, /* rightshift */
c94cb026 2090 4, /* size */
fbaf61ad 2091 20, /* bitsize */
0a1b45a2 2092 false, /* pc_relative */
fbaf61ad
NC		 2093 0, /* bitpos */
2094 complain_overflow_signed,/* complain_on_overflow */
2095 bfd_elf_generic_reloc, /* special_function */
2096 "R_NDS32_TLS_DESC_20", /* name */
0a1b45a2 2097 false, /* partial_inplace */
fbaf61ad
NC		 2098 0x000fffff, /* src_mask */
2099 0x000fffff, /* dst_mask */
0a1b45a2 2100 false), /* pcrel_offset */
fbaf61ad
NC		 2101
2102 /* TLS GD/LD description offset set (lwi.gp). */
2103 HOWTO2 (R_NDS32_TLS_DESC_SDA17S2,/* type */
2104 2, /* rightshift */
c94cb026 2105 4, /* size */
fbaf61ad 2106 17, /* bitsize */
0a1b45a2 2107 false, /* pc_relative */
fbaf61ad
NC		 2108 0, /* bitpos */
2109 complain_overflow_signed,/* complain_on_overflow */
2110 bfd_elf_generic_reloc, /* special_function */
2111 "R_NDS32_TLS_DESC_SDA17S2",/* name */
0a1b45a2 2112 false, /* partial_inplace */
fbaf61ad
NC		 2113 0x0001ffff, /* src_mask */
2114 0x0001ffff, /* dst_mask */
0a1b45a2 2115 false), /* pcrel_offset */
35c08157
KLC		 2116};
2117
2118/* Relocations used for relaxation. */
fbaf61ad
NC		 2119#define HOWTO3(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
2120 [C-R_NDS32_RELAX_ENTRY] = HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC)
2121
2122static reloc_howto_type nds32_elf_relax_howto_table[] = {
2123 HOWTO3 (R_NDS32_RELAX_ENTRY, /* type */
2124 0, /* rightshift */
c94cb026 2125 4, /* size */
fbaf61ad 2126 32, /* bitsize */
0a1b45a2 2127 false, /* pc_relative */
fbaf61ad
NC		 2128 0, /* bitpos */
2129 complain_overflow_dont,/* complain_on_overflow */
2130 nds32_elf_ignore_reloc,/* special_function */
2131 "R_NDS32_RELAX_ENTRY", /* name */
0a1b45a2 2132 false, /* partial_inplace */
fbaf61ad
NC		 2133 0xffffffff, /* src_mask */
2134 0xffffffff, /* dst_mask */
0a1b45a2 2135 false), /* pcrel_offset */
c94cb026 2136
fbaf61ad
NC		 2137 HOWTO3 (R_NDS32_GOT_SUFF, /* type */
2138 0, /* rightshift */
c94cb026 2139 4, /* size */
fbaf61ad 2140 32, /* bitsize */
0a1b45a2 2141 false, /* pc_relative */
fbaf61ad
NC		 2142 0, /* bitpos */
2143 complain_overflow_dont,/* complain_on_overflow */
2144 nds32_elf_ignore_reloc,/* special_function */
2145 "R_NDS32_GOT_SUFF", /* name */
0a1b45a2 2146 false, /* partial_inplace */
fbaf61ad
NC		 2147 0xffffffff, /* src_mask */
2148 0xffffffff, /* dst_mask */
0a1b45a2 2149 false), /* pcrel_offset */
c94cb026 2150
fbaf61ad
NC		 2151 HOWTO3 (R_NDS32_GOTOFF_SUFF, /* type */
2152 0, /* rightshift */
c94cb026 2153 4, /* size */
fbaf61ad 2154 32, /* bitsize */
0a1b45a2 2155 false, /* pc_relative */
fbaf61ad
NC		 2156 0, /* bitpos */
2157 complain_overflow_bitfield,/* complain_on_overflow */
2158 nds32_elf_ignore_reloc,/* special_function */
2159 "R_NDS32_GOTOFF_SUFF", /* name */
0a1b45a2 2160 false, /* partial_inplace */
fbaf61ad
NC		 2161 0xffffffff, /* src_mask */
2162 0xffffffff, /* dst_mask */
0a1b45a2 2163 false), /* pcrel_offset */
c94cb026 2164
fbaf61ad
NC		 2165 HOWTO3 (R_NDS32_PLT_GOT_SUFF, /* type */
2166 0, /* rightshift */
c94cb026 2167 4, /* size */
fbaf61ad 2168 32, /* bitsize */
0a1b45a2 2169 false, /* pc_relative */
fbaf61ad
NC		 2170 0, /* bitpos */
2171 complain_overflow_dont,/* complain_on_overflow */
2172 nds32_elf_ignore_reloc,/* special_function */
2173 "R_NDS32_PLT_GOT_SUFF",/* name */
0a1b45a2 2174 false, /* partial_inplace */
fbaf61ad
NC		 2175 0xffffffff, /* src_mask */
2176 0xffffffff, /* dst_mask */
0a1b45a2 2177 false), /* pcrel_offset */
c94cb026 2178
fbaf61ad
NC		 2179 HOWTO3 (R_NDS32_MULCALL_SUFF, /* type */
2180 0, /* rightshift */
c94cb026 2181 4, /* size */
fbaf61ad 2182 32, /* bitsize */
0a1b45a2 2183 false, /* pc_relative */
fbaf61ad
NC		 2184 0, /* bitpos */
2185 complain_overflow_dont,/* complain_on_overflow */
2186 nds32_elf_ignore_reloc,/* special_function */
2187 "R_NDS32_MULCALL_SUFF",/* name */
0a1b45a2 2188 false, /* partial_inplace */
fbaf61ad
NC		 2189 0xffffffff, /* src_mask */
2190 0xffffffff, /* dst_mask */
0a1b45a2 2191 false), /* pcrel_offset */
c94cb026 2192
fbaf61ad
NC		 2193 HOWTO3 (R_NDS32_PTR, /* type */
2194 0, /* rightshift */
c94cb026 2195 4, /* size */
fbaf61ad 2196 32, /* bitsize */
0a1b45a2 2197 false, /* pc_relative */
fbaf61ad
NC		 2198 0, /* bitpos */
2199 complain_overflow_dont,/* complain_on_overflow */
2200 nds32_elf_ignore_reloc,/* special_function */
2201 "R_NDS32_PTR", /* name */
0a1b45a2 2202 false, /* partial_inplace */
fbaf61ad
NC		 2203 0xffffffff, /* src_mask */
2204 0xffffffff, /* dst_mask */
0a1b45a2 2205 false), /* pcrel_offset */
c94cb026 2206
fbaf61ad
NC		 2207 HOWTO3 (R_NDS32_PTR_COUNT, /* type */
2208 0, /* rightshift */
c94cb026 2209 4, /* size */
fbaf61ad 2210 32, /* bitsize */
0a1b45a2 2211 false, /* pc_relative */
fbaf61ad
NC		 2212 0, /* bitpos */
2213 complain_overflow_dont,/* complain_on_overflow */
2214 nds32_elf_ignore_reloc,/* special_function */
2215 "R_NDS32_PTR_COUNT", /* name */
0a1b45a2 2216 false, /* partial_inplace */
fbaf61ad
NC		 2217 0xffffffff, /* src_mask */
2218 0xffffffff, /* dst_mask */
0a1b45a2 2219 false), /* pcrel_offset */
c94cb026 2220
fbaf61ad
NC		 2221 HOWTO3 (R_NDS32_PTR_RESOLVED, /* type */
2222 0, /* rightshift */
c94cb026 2223 4, /* size */
fbaf61ad 2224 32, /* bitsize */
0a1b45a2 2225 false, /* pc_relative */
fbaf61ad
NC		 2226 0, /* bitpos */
2227 complain_overflow_dont,/* complain_on_overflow */
2228 nds32_elf_ignore_reloc,/* special_function */
2229 "R_NDS32_PTR_RESOLVED",/* name */
0a1b45a2 2230 false, /* partial_inplace */
fbaf61ad
NC		 2231 0xffffffff, /* src_mask */
2232 0xffffffff, /* dst_mask */
0a1b45a2 2233 false), /* pcrel_offset */
c94cb026 2234
fbaf61ad
NC		 2235 HOWTO3 (R_NDS32_PLTBLOCK, /* type */
2236 0, /* rightshift */
c94cb026 2237 4, /* size */
fbaf61ad 2238 32, /* bitsize */
0a1b45a2 2239 false, /* pc_relative */
fbaf61ad
NC		 2240 0, /* bitpos */
2241 complain_overflow_dont,/* complain_on_overflow */
2242 nds32_elf_ignore_reloc,/* special_function */
2243 "R_NDS32_PLTBLOCK", /* name */
0a1b45a2 2244 false, /* partial_inplace */
fbaf61ad
NC		 2245 0xffffffff, /* src_mask */
2246 0xffffffff, /* dst_mask */
0a1b45a2 2247 false), /* pcrel_offset */
c94cb026 2248
fbaf61ad
NC		 2249 HOWTO3 (R_NDS32_RELAX_REGION_BEGIN,/* type */
2250 0, /* rightshift */
c94cb026 2251 4, /* size */
fbaf61ad 2252 32, /* bitsize */
0a1b45a2 2253 false, /* pc_relative */
fbaf61ad
NC		 2254 0, /* bitpos */
2255 complain_overflow_dont,/* complain_on_overflow */
2256 nds32_elf_ignore_reloc,/* special_function */
2257 "R_NDS32_RELAX_REGION_BEGIN",/* name */
0a1b45a2 2258 false, /* partial_inplace */
fbaf61ad
NC		 2259 0xffffffff, /* src_mask */
2260 0xffffffff, /* dst_mask */
0a1b45a2 2261 false), /* pcrel_offset */
c94cb026 2262
fbaf61ad
NC		 2263 HOWTO3 (R_NDS32_RELAX_REGION_END,/* type */
2264 0, /* rightshift */
c94cb026 2265 4, /* size */
fbaf61ad 2266 32, /* bitsize */
0a1b45a2 2267 false, /* pc_relative */
fbaf61ad
NC		 2268 0, /* bitpos */
2269 complain_overflow_dont,/* complain_on_overflow */
2270 nds32_elf_ignore_reloc,/* special_function */
2271 "R_NDS32_RELAX_REGION_END",/* name */
0a1b45a2 2272 false, /* partial_inplace */
fbaf61ad
NC		 2273 0xffffffff, /* src_mask */
2274 0xffffffff, /* dst_mask */
0a1b45a2 2275 false), /* pcrel_offset */
c94cb026 2276
fbaf61ad
NC		 2277 HOWTO3 (R_NDS32_MINUEND, /* type */
2278 0, /* rightshift */
c94cb026 2279 4, /* size */
fbaf61ad 2280 32, /* bitsize */
0a1b45a2 2281 false, /* pc_relative */
fbaf61ad
NC		 2282 0, /* bitpos */
2283 complain_overflow_dont,/* complain_on_overflow */
2284 nds32_elf_ignore_reloc,/* special_function */
2285 "R_NDS32_MINUEND", /* name */
0a1b45a2 2286 false, /* partial_inplace */
fbaf61ad
NC		 2287 0xffffffff, /* src_mask */
2288 0xffffffff, /* dst_mask */
0a1b45a2 2289 false), /* pcrel_offset */
c94cb026 2290
fbaf61ad
NC		 2291 HOWTO3 (R_NDS32_SUBTRAHEND, /* type */
2292 0, /* rightshift */
c94cb026 2293 4, /* size */
fbaf61ad 2294 32, /* bitsize */
0a1b45a2 2295 false, /* pc_relative */
fbaf61ad
NC		 2296 0, /* bitpos */
2297 complain_overflow_dont,/* complain_on_overflow */
2298 nds32_elf_ignore_reloc,/* special_function */
2299 "R_NDS32_SUBTRAHEND", /* name */
0a1b45a2 2300 false, /* partial_inplace */
fbaf61ad
NC		 2301 0xffffffff, /* src_mask */
2302 0xffffffff, /* dst_mask */
0a1b45a2 2303 false), /* pcrel_offset */
c94cb026 2304
fbaf61ad
NC		 2305 HOWTO3 (R_NDS32_DIFF8, /* type */
2306 0, /* rightshift */
c94cb026 2307 1, /* size */
fbaf61ad 2308 8, /* bitsize */
0a1b45a2 2309 false, /* pc_relative */
fbaf61ad
NC		 2310 0, /* bitpos */
2311 complain_overflow_dont,/* complain_on_overflow */
2312 nds32_elf_ignore_reloc,/* special_function */
2313 "R_NDS32_DIFF8", /* name */
0a1b45a2 2314 false, /* partial_inplace */
fbaf61ad
NC		 2315 0x000000ff, /* src_mask */
2316 0x000000ff, /* dst_mask */
0a1b45a2 2317 false), /* pcrel_offset */
c94cb026 2318
fbaf61ad
NC		 2319 HOWTO3 (R_NDS32_DIFF16, /* type */
2320 0, /* rightshift */
c94cb026 2321 2, /* size */
fbaf61ad 2322 16, /* bitsize */
0a1b45a2 2323 false, /* pc_relative */
fbaf61ad
NC		 2324 0, /* bitpos */
2325 complain_overflow_dont,/* complain_on_overflow */
2326 nds32_elf_ignore_reloc,/* special_function */
2327 "R_NDS32_DIFF16", /* name */
0a1b45a2 2328 false, /* partial_inplace */
fbaf61ad
NC		 2329 0x0000ffff, /* src_mask */
2330 0x0000ffff, /* dst_mask */
0a1b45a2 2331 false), /* pcrel_offset */
c94cb026 2332
fbaf61ad
NC		 2333 HOWTO3 (R_NDS32_DIFF32, /* type */
2334 0, /* rightshift */
c94cb026 2335 4, /* size */
fbaf61ad 2336 32, /* bitsize */
0a1b45a2 2337 false, /* pc_relative */
fbaf61ad
NC		 2338 0, /* bitpos */
2339 complain_overflow_dont,/* complain_on_overflow */
2340 nds32_elf_ignore_reloc,/* special_function */
2341 "R_NDS32_DIFF32", /* name */
0a1b45a2 2342 false, /* partial_inplace */
fbaf61ad
NC		 2343 0xffffffff, /* src_mask */
2344 0xffffffff, /* dst_mask */
0a1b45a2 2345 false), /* pcrel_offset */
c94cb026 2346
fbaf61ad
NC		 2347 HOWTO3 (R_NDS32_DIFF_ULEB128, /* type */
2348 0, /* rightshift */
c94cb026 2349 1, /* size */
fbaf61ad 2350 0, /* bitsize */
0a1b45a2 2351 false, /* pc_relative */
fbaf61ad
NC		 2352 0, /* bitpos */
2353 complain_overflow_dont,/* complain_on_overflow */
2354 nds32_elf_ignore_reloc,/* special_function */
2355 "R_NDS32_DIFF_ULEB128",/* name */
0a1b45a2 2356 false, /* partial_inplace */
fbaf61ad
NC		 2357 0xffffffff, /* src_mask */
2358 0xffffffff, /* dst_mask */
0a1b45a2 2359 false), /* pcrel_offset */
c94cb026 2360
fbaf61ad
NC		 2361 HOWTO3 (R_NDS32_DATA, /* type */
2362 0, /* rightshift */
c94cb026 2363 4, /* size */
fbaf61ad 2364 32, /* bitsize */
0a1b45a2 2365 false, /* pc_relative */
fbaf61ad
NC		 2366 0, /* bitpos */
2367 complain_overflow_dont,/* complain_on_overflow */
2368 nds32_elf_ignore_reloc,/* special_function */
2369 "R_NDS32_DATA", /* name */
0a1b45a2 2370 false, /* partial_inplace */
fbaf61ad
NC		 2371 0xffffffff, /* src_mask */
2372 0xffffffff, /* dst_mask */
0a1b45a2 2373 false), /* pcrel_offset */
c94cb026 2374
fbaf61ad
NC		 2375 HOWTO3 (R_NDS32_TRAN, /* type */
2376 0, /* rightshift */
c94cb026 2377 4, /* size */
fbaf61ad 2378 32, /* bitsize */
0a1b45a2 2379 false, /* pc_relative */
fbaf61ad
NC		 2380 0, /* bitpos */
2381 complain_overflow_dont,/* complain_on_overflow */
2382 nds32_elf_ignore_reloc,/* special_function */
2383 "R_NDS32_TRAN", /* name */
0a1b45a2 2384 false, /* partial_inplace */
fbaf61ad
NC		 2385 0xffffffff, /* src_mask */
2386 0xffffffff, /* dst_mask */
0a1b45a2 2387 false), /* pcrel_offset */
c94cb026 2388
fbaf61ad
NC		 2389 HOWTO3 (R_NDS32_TLS_LE_ADD, /* type */
2390 0, /* rightshift */
c94cb026 2391 4, /* size */
fbaf61ad 2392 32, /* bitsize */
0a1b45a2 2393 false, /* pc_relative */
fbaf61ad
NC		 2394 0, /* bitpos */
2395 complain_overflow_dont,/* complain_on_overflow */
2396 nds32_elf_ignore_reloc,/* special_function */
2397 "R_NDS32_TLS_LE_ADD", /* name */
0a1b45a2 2398 false, /* partial_inplace */
fbaf61ad
NC		 2399 0xffffffff, /* src_mask */
2400 0xffffffff, /* dst_mask */
0a1b45a2 2401 false), /* pcrel_offset */
c94cb026 2402
fbaf61ad
NC		 2403 HOWTO3 (R_NDS32_TLS_LE_LS, /* type */
2404 0, /* rightshift */
c94cb026 2405 4, /* size */
fbaf61ad 2406 32, /* bitsize */
0a1b45a2 2407 false, /* pc_relative */
fbaf61ad
NC		 2408 0, /* bitpos */
2409 complain_overflow_dont,/* complain_on_overflow */
2410 nds32_elf_ignore_reloc,/* special_function */
2411 "R_NDS32_TLS_LE_LS", /* name */
0a1b45a2 2412 false, /* partial_inplace */
fbaf61ad
NC		 2413 0xffffffff, /* src_mask */
2414 0xffffffff, /* dst_mask */
0a1b45a2 2415 false), /* pcrel_offset */
c94cb026 2416
fbaf61ad
NC		 2417 HOWTO3 (R_NDS32_EMPTY, /* type */
2418 0, /* rightshift */
c94cb026 2419 4, /* size */
fbaf61ad 2420 32, /* bitsize */
0a1b45a2 2421 false, /* pc_relative */
fbaf61ad
NC		 2422 0, /* bitpos */
2423 complain_overflow_dont,/* complain_on_overflow */
2424 nds32_elf_ignore_reloc,/* special_function */
2425 "R_NDS32_EMPTY", /* name */
0a1b45a2 2426 false, /* partial_inplace */
fbaf61ad
NC		 2427 0xffffffff, /* src_mask */
2428 0xffffffff, /* dst_mask */
0a1b45a2 2429 false), /* pcrel_offset */
c94cb026 2430
fbaf61ad
NC		 2431 /* TLS GD/LD description address base addition. */
2432 HOWTO3 (R_NDS32_TLS_DESC_ADD, /* type */
2433 0, /* rightshift */
c94cb026 2434 4, /* size */
fbaf61ad 2435 32, /* bitsize */
0a1b45a2 2436 false, /* pc_relative */
fbaf61ad
NC		 2437 0, /* bitpos */
2438 complain_overflow_dont,/* complain_on_overflow */
2439 nds32_elf_ignore_reloc,/* special_function */
2440 "R_NDS32_TLS_DESC_ADD",/* name */
0a1b45a2 2441 false, /* partial_inplace */
fbaf61ad
NC		 2442 0xffffffff, /* src_mask */
2443 0xffffffff, /* dst_mask */
0a1b45a2 2444 false), /* pcrel_offset */
c94cb026 2445
fbaf61ad
NC		 2446 /* TLS GD/LD description function load. */
2447 HOWTO3 (R_NDS32_TLS_DESC_FUNC,/* type */
2448 0, /* rightshift */
c94cb026 2449 4, /* size */
fbaf61ad 2450 32, /* bitsize */
0a1b45a2 2451 false, /* pc_relative */
fbaf61ad
NC		 2452 0, /* bitpos */
2453 complain_overflow_dont,/* complain_on_overflow */
2454 nds32_elf_ignore_reloc,/* special_function */
2455 "R_NDS32_TLS_DESC_FUNC",/* name */
0a1b45a2 2456 false, /* partial_inplace */
fbaf61ad
NC		 2457 0xffffffff, /* src_mask */
2458 0xffffffff, /* dst_mask */
0a1b45a2 2459 false), /* pcrel_offset */
c94cb026 2460
fbaf61ad
NC		 2461 /* TLS DESC resolve function call. */
2462 HOWTO3 (R_NDS32_TLS_DESC_CALL,/* type */
2463 0, /* rightshift */
c94cb026 2464 4, /* size */
fbaf61ad 2465 32, /* bitsize */
0a1b45a2 2466 false, /* pc_relative */
fbaf61ad
NC		 2467 0, /* bitpos */
2468 complain_overflow_dont,/* complain_on_overflow */
2469 nds32_elf_ignore_reloc,/* special_function */
2470 "R_NDS32_TLS_DESC_CALL",/* name */
0a1b45a2 2471 false, /* partial_inplace */
fbaf61ad
NC		 2472 0xffffffff, /* src_mask */
2473 0xffffffff, /* dst_mask */
0a1b45a2 2474 false), /* pcrel_offset */
c94cb026 2475
fbaf61ad
NC		 2476 /* TLS DESC variable access. */
2477 HOWTO3 (R_NDS32_TLS_DESC_MEM, /* type */
2478 0, /* rightshift */
c94cb026 2479 4, /* size */
fbaf61ad 2480 32, /* bitsize */
0a1b45a2 2481 false, /* pc_relative */
fbaf61ad
NC		 2482 0, /* bitpos */
2483 complain_overflow_dont,/* complain_on_overflow */
2484 nds32_elf_ignore_reloc,/* special_function */
2485 "R_NDS32_TLS_DESC_MEM",/* name */
0a1b45a2 2486 false, /* partial_inplace */
fbaf61ad
NC		 2487 0xffffffff, /* src_mask */
2488 0xffffffff, /* dst_mask */
0a1b45a2 2489 false), /* pcrel_offset */
c94cb026 2490
fbaf61ad
NC		 2491 /* TLS GD/LD description mark (@tlsdec). */
2492 HOWTO3 (R_NDS32_RELAX_REMOVE, /* type */
2493 0, /* rightshift */
c94cb026 2494 4, /* size */
fbaf61ad 2495 32, /* bitsize */
0a1b45a2 2496 false, /* pc_relative */
fbaf61ad
NC		 2497 0, /* bitpos */
2498 complain_overflow_dont,/* complain_on_overflow */
2499 nds32_elf_ignore_reloc,/* special_function */
2500 "R_NDS32_REMOVE", /* name */
0a1b45a2 2501 false, /* partial_inplace */
fbaf61ad
NC		 2502 0xffffffff, /* src_mask */
2503 0xffffffff, /* dst_mask */
0a1b45a2 2504 false), /* pcrel_offset */
c94cb026 2505
fbaf61ad
NC		 2506 /* TLS GD/LD description mark (@tlsdec). */
2507 HOWTO3 (R_NDS32_RELAX_GROUP, /* type */
2508 0, /* rightshift */
c94cb026 2509 4, /* size */
fbaf61ad 2510 32, /* bitsize */
0a1b45a2 2511 false, /* pc_relative */
fbaf61ad
NC		 2512 0, /* bitpos */
2513 complain_overflow_dont,/* complain_on_overflow */
2514 nds32_elf_ignore_reloc,/* special_function */
2515 "R_NDS32_GROUP", /* name */
0a1b45a2 2516 false, /* partial_inplace */
fbaf61ad
NC		 2517 0xffffffff, /* src_mask */
2518 0xffffffff, /* dst_mask */
0a1b45a2 2519 false), /* pcrel_offset */
c94cb026 2520
fbaf61ad
NC		 2521 HOWTO3 (R_NDS32_TLS_IEGP_LW, /* type */
2522 0, /* rightshift */
c94cb026 2523 4, /* size */
fbaf61ad 2524 32, /* bitsize */
0a1b45a2 2525 false, /* pc_relative */
fbaf61ad
NC		 2526 0, /* bitpos */
2527 complain_overflow_dont,/* complain_on_overflow */
2528 nds32_elf_ignore_reloc,/* special_function */
2529 "R_NDS32_TLS_IEGP_LW", /* name */
0a1b45a2 2530 false, /* partial_inplace */
fbaf61ad
NC		 2531 0xffffffff, /* src_mask */
2532 0xffffffff, /* dst_mask */
0a1b45a2 2533 false), /* pcrel_offset */
c94cb026 2534
fbaf61ad
NC		 2535 /* LA and FLSI relaxation. */
2536 HOWTO3 (R_NDS32_LSI, /* type */
2537 0, /* rightshift */
c94cb026 2538 4, /* size */
fbaf61ad 2539 32, /* bitsize */
0a1b45a2 2540 false, /* pc_relative */
fbaf61ad
NC		 2541 0, /* bitpos */
2542 complain_overflow_dont,/* complain_on_overflow */
2543 nds32_elf_ignore_reloc,/* special_function */
2544 "R_NDS32_LSI", /* name */
0a1b45a2 2545 false, /* partial_inplace */
fbaf61ad
NC		 2546 0xffffffff, /* src_mask */
2547 0xffffffff, /* dst_mask */
0a1b45a2 2548 false),
35c08157
KLC		 2549};
2550
fbaf61ad
NC		 2551static unsigned long dl_tlsdesc_lazy_trampoline[] =
2552{
2553 0x46200000, /* sethi $r2,#0x0 */
2554 0x58210000, /* ori $r2,$r2,#0x0 */
2555 0x40217400, /* add $r2,$r2,$gp */
2556 0x04210000, /* lwi $r2,[$r2+#0x0] */
2557 0x46300000, /* sethi $r3,#0x0 */
2558 0x58318000, /* ori $r3,$r3,#0x0 */
2559 0x4031f400, /* add $r3,$r3,$gp */
2560 0x4a000800, /* jr $r2 */
2561};
2562
2563static void
2564nds32_put_trampoline (void *contents, const unsigned long *template,
2565 unsigned count)
2566{
2567 unsigned ix;
2568
2569 for (ix = 0; ix != count; ix++)
2570 {
2571 unsigned long insn = template[ix];
2572 bfd_putb32 (insn, (char *) contents + ix * 4);
2573 }
2574}
2575
35c08157
KLC		 2576/* nds32_insertion_sort sorts an array with nmemb elements of size size.
2577 This prototype is the same as qsort (). */
2578
443aa5f0 2579static void
35c08157
KLC		 2580nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2581 int (*compar) (const void *lhs, const void *rhs))
2582{
2583 char *ptr = (char *) base;
1c8f6a4d 2584 int i, j;
9a733151
AM		 2585 char tmp[sizeof (Elf_Internal_Rela)];
2586
2587 BFD_ASSERT (size <= sizeof (tmp));
35c08157
KLC		 2588
2589 /* If i is less than j, i is inserted before j.
2590
2591 |---- j ----- i --------------|
2592 \ / \ /
2593 sorted unsorted
2594 */
2595
1c8f6a4d 2596 for (i = 1; i < (int) nmemb; i++)
35c08157 2597 {
1c8f6a4d
KLC		 2598 for (j = (i - 1); j >= 0; j--)
2599 if (compar (ptr + i * size, ptr + j * size) >= 0)
35c08157
KLC		 2600 break;
2601
1c8f6a4d
KLC		 2602 j++;
2603
35c08157 2604 if (i == j)
1c8f6a4d 2605 continue; /* i is in order. */
35c08157
KLC		 2606
2607 memcpy (tmp, ptr + i * size, size);
2608 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2609 memcpy (ptr + j * size, tmp, size);
2610 }
2611}
2612
2613/* Sort relocation by r_offset.
2614
2615 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2616 algorithm. Relocations at the same r_offset must keep their order.
2617 For example, RELAX_ENTRY must be the very first relocation entry.
2618
2619 Currently, this function implements insertion-sort.
2620
2621 FIXME: If we already sort them in assembler, why bother sort them
2622 here again? */
2623
2624static int
2625compar_reloc (const void *lhs, const void *rhs)
2626{
2627 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2628 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2629
2630 if (l->r_offset > r->r_offset)
2631 return 1;
2632 else if (l->r_offset == r->r_offset)
2633 return 0;
2634 else
2635 return -1;
2636}
2637
2638/* Functions listed below are only used for old relocs.
fbaf61ad
NC		 2639 nds32_elf_9_pcrel_reloc
2640 nds32_elf_do_9_pcrel_reloc
2641 nds32_elf_hi20_reloc
2642 nds32_elf_relocate_hi20
2643 nds32_elf_lo12_reloc
2644 nds32_elf_sda15_reloc
2645 nds32_elf_generic_reloc. */
35c08157
KLC		 2646
2647/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2648
2649static bfd_reloc_status_type
fbaf61ad
NC		 2650nds32_elf_9_pcrel_reloc (bfd * abfd,
2651 arelent * reloc_entry,
2652 asymbol * symbol,
2653 void * data,
2654 asection * input_section,
2655 bfd * output_bfd,
2656 char ** error_message ATTRIBUTE_UNUSED)
35c08157
KLC		 2657{
2658 /* This part is from bfd_elf_generic_reloc. */
2659 if (output_bfd != (bfd *) NULL
2660 && (symbol->flags & BSF_SECTION_SYM) == 0
2661 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2662 {
2663 reloc_entry->address += input_section->output_offset;
2664 return bfd_reloc_ok;
2665 }
2666
2667 if (output_bfd != NULL)
2668 {
2669 /* FIXME: See bfd_perform_relocation. Is this right? */
2670 return bfd_reloc_continue;
2671 }
2672
2673 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2674 input_section,
2675 data, reloc_entry->address,
2676 symbol->section,
2677 (symbol->value
2678 + symbol->section->output_section->vma
2679 + symbol->section->output_offset),
2680 reloc_entry->addend);
2681}
2682
2683/* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2684#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2685
2686static bfd_reloc_status_type
fbaf61ad
NC		 2687nds32_elf_do_9_pcrel_reloc (bfd * abfd,
2688 reloc_howto_type * howto,
2689 asection * input_section,
2690 bfd_byte * data,
2691 bfd_vma offset,
2692 asection * symbol_section ATTRIBUTE_UNUSED,
2693 bfd_vma symbol_value,
2694 bfd_vma addend)
35c08157
KLC		 2695{
2696 bfd_signed_vma relocation;
2697 unsigned short x;
2698 bfd_reloc_status_type status;
2699
2700 /* Sanity check the address (offset in section). */
2701 if (offset > bfd_get_section_limit (abfd, input_section))
2702 return bfd_reloc_outofrange;
2703
2704 relocation = symbol_value + addend;
2705 /* Make it pc relative. */
2706 relocation -= (input_section->output_section->vma
2707 + input_section->output_offset);
2708 /* These jumps mask off the lower two bits of the current address
2709 before doing pcrel calculations. */
2710 relocation -= (offset & -(bfd_vma) 2);
2711
1c8f6a4d 2712 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
35c08157
KLC		 2713 status = bfd_reloc_overflow;
2714 else
2715 status = bfd_reloc_ok;
2716
2717 x = bfd_getb16 (data + offset);
2718
2719 relocation >>= howto->rightshift;
2720 relocation <<= howto->bitpos;
2721 x = (x & ~howto->dst_mask)
2722 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2723
2724 bfd_putb16 ((bfd_vma) x, data + offset);
2725
2726 return status;
2727}
2728
2729/* Handle the R_NDS32_HI20_[SU]LO relocs.
2730 HI20_SLO is for the add3 and load/store with displacement instructions.
2731 HI20 is for the or3 instruction.
2732 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2733 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2734 we must add one to the high 16 bytes (which will get subtracted off when
2735 the low 16 bits are added).
2736 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2737 because there is a carry from the LO12 to the HI20. Here we just save
2738 the information we need; we do the actual relocation when we see the LO12.
2739 This code is copied from the elf32-mips.c. We also support an arbitrary
2740 number of HI20 relocs to be associated with a single LO12 reloc. The
2741 assembler sorts the relocs to ensure each HI20 immediately precedes its
2742 LO12. However if there are multiple copies, the assembler may not find
2743 the real LO12 so it picks the first one it finds. */
2744
2745struct nds32_hi20
2746{
2747 struct nds32_hi20 *next;
2748 bfd_byte *addr;
2749 bfd_vma addend;
2750};
2751
2752static struct nds32_hi20 *nds32_hi20_list;
2753
2754static bfd_reloc_status_type
fbaf61ad
NC		 2755nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED,
2756 arelent *reloc_entry,
2757 asymbol *symbol,
2758 void *data,
2759 asection *input_section,
2760 bfd *output_bfd,
2761 char **error_message ATTRIBUTE_UNUSED)
35c08157
KLC		 2762{
2763 bfd_reloc_status_type ret;
2764 bfd_vma relocation;
2765 struct nds32_hi20 *n;
2766
2767 /* This part is from bfd_elf_generic_reloc.
2768 If we're relocating, and this an external symbol, we don't want
2769 to change anything. */
2770 if (output_bfd != (bfd *) NULL
2771 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2772 {
2773 reloc_entry->address += input_section->output_offset;
2774 return bfd_reloc_ok;
2775 }
2776
2777 /* Sanity check the address (offset in section). */
2778 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2779 return bfd_reloc_outofrange;
2780
2781 ret = bfd_reloc_ok;
2782 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2783 ret = bfd_reloc_undefined;
2784
2785 if (bfd_is_com_section (symbol->section))
2786 relocation = 0;
2787 else
2788 relocation = symbol->value;
2789
2790 relocation += symbol->section->output_section->vma;
2791 relocation += symbol->section->output_offset;
2792 relocation += reloc_entry->addend;
2793
2794 /* Save the information, and let LO12 do the actual relocation. */
2795 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2796 if (n == NULL)
2797 return bfd_reloc_outofrange;
2798
2799 n->addr = (bfd_byte *) data + reloc_entry->address;
2800 n->addend = relocation;
2801 n->next = nds32_hi20_list;
2802 nds32_hi20_list = n;
2803
2804 if (output_bfd != (bfd *) NULL)
2805 reloc_entry->address += input_section->output_offset;
2806
2807 return ret;
2808}
2809
2810/* Handle an NDS32 ELF HI20 reloc. */
2811
2812static void
2813nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
fbaf61ad
NC		 2814 int type ATTRIBUTE_UNUSED,
2815 Elf_Internal_Rela *relhi,
2816 Elf_Internal_Rela *rello,
2817 bfd_byte *contents,
35c08157
KLC		 2818 bfd_vma addend)
2819{
2820 unsigned long insn;
2821 bfd_vma addlo;
2822
2823 insn = bfd_getb32 (contents + relhi->r_offset);
2824
2825 addlo = bfd_getb32 (contents + rello->r_offset);
2826 addlo &= 0xfff;
2827
2828 addend += ((insn & 0xfffff) << 20) + addlo;
2829
2830 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2831 bfd_putb32 (insn, contents + relhi->r_offset);
2832}
2833
2834/* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2835 inplace relocation; this function exists in order to do the
2836 R_NDS32_HI20_[SU]LO relocation described above. */
2837
2838static bfd_reloc_status_type
2839nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2840 void *data, asection *input_section, bfd *output_bfd,
2841 char **error_message)
2842{
2843 /* This part is from bfd_elf_generic_reloc.
2844 If we're relocating, and this an external symbol, we don't want
2845 to change anything. */
2846 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2847 && reloc_entry->addend == 0)
2848 {
2849 reloc_entry->address += input_section->output_offset;
2850 return bfd_reloc_ok;
2851 }
2852
2853 if (nds32_hi20_list != NULL)
2854 {
2855 struct nds32_hi20 *l;
2856
2857 l = nds32_hi20_list;
2858 while (l != NULL)
2859 {
2860 unsigned long insn;
2861 unsigned long val;
2862 unsigned long vallo;
2863 struct nds32_hi20 *next;
2864
2865 /* Do the HI20 relocation. Note that we actually don't need
2866 to know anything about the LO12 itself, except where to
2867 find the low 12 bits of the addend needed by the LO12. */
2868 insn = bfd_getb32 (l->addr);
2869 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2870 vallo &= 0xfff;
2871 switch (reloc_entry->howto->type)
2872 {
2873 case R_NDS32_LO12S3:
2874 vallo <<= 3;
2875 break;
2876
2877 case R_NDS32_LO12S2:
2878 vallo <<= 2;
2879 break;
2880
2881 case R_NDS32_LO12S1:
2882 vallo <<= 1;
2883 break;
2884
2885 case R_NDS32_LO12S0:
2886 vallo <<= 0;
2887 break;
2888 }
2889
2890 val = ((insn & 0xfffff) << 12) + vallo;
2891 val += l->addend;
2892
2893 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2894 bfd_putb32 ((bfd_vma) insn, l->addr);
2895
2896 next = l->next;
2897 free (l);
2898 l = next;
2899 }
2900
2901 nds32_hi20_list = NULL;
2902 }
2903
2904 /* Now do the LO12 reloc in the usual way.
2905 ??? It would be nice to call bfd_elf_generic_reloc here,
2906 but we have partial_inplace set. bfd_elf_generic_reloc will
2907 pass the handling back to bfd_install_relocation which will install
2908 a section relative addend which is wrong. */
2909 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2910 input_section, output_bfd, error_message);
2911}
2912
2913/* Do generic partial_inplace relocation.
2914 This is a local replacement for bfd_elf_generic_reloc. */
2915
2916static bfd_reloc_status_type
2917nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2918 asymbol *symbol, void *data, asection *input_section,
2919 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2920{
2921 bfd_reloc_status_type ret;
2922 bfd_vma relocation;
2923 bfd_byte *inplace_address;
2924
2925 /* This part is from bfd_elf_generic_reloc.
2926 If we're relocating, and this an external symbol, we don't want
2927 to change anything. */
2928 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2929 && reloc_entry->addend == 0)
2930 {
2931 reloc_entry->address += input_section->output_offset;
2932 return bfd_reloc_ok;
2933 }
2934
2935 /* Now do the reloc in the usual way.
2936 ??? It would be nice to call bfd_elf_generic_reloc here,
2937 but we have partial_inplace set. bfd_elf_generic_reloc will
2938 pass the handling back to bfd_install_relocation which will install
2939 a section relative addend which is wrong. */
2940
2941 /* Sanity check the address (offset in section). */
2942 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2943 return bfd_reloc_outofrange;
2944
2945 ret = bfd_reloc_ok;
2946 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2947 ret = bfd_reloc_undefined;
2948
2949 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2950 relocation = 0;
2951 else
2952 relocation = symbol->value;
2953
2954 /* Only do this for a final link. */
2955 if (output_bfd == (bfd *) NULL)
2956 {
2957 relocation += symbol->section->output_section->vma;
2958 relocation += symbol->section->output_offset;
2959 }
2960
2961 relocation += reloc_entry->addend;
2962 switch (reloc_entry->howto->type)
2963 {
2964 case R_NDS32_LO12S3:
2965 relocation >>= 3;
2966 break;
2967
2968 case R_NDS32_LO12S2:
2969 relocation >>= 2;
2970 break;
2971
2972 case R_NDS32_LO12S1:
2973 relocation >>= 1;
2974 break;
2975
2976 case R_NDS32_LO12S0:
2977 default:
2978 relocation >>= 0;
2979 break;
2980 }
2981
2982 inplace_address = (bfd_byte *) data + reloc_entry->address;
2983
2984#define DOIT(x) \
2985 x = ((x & ~reloc_entry->howto->dst_mask) | \
2986 (((x & reloc_entry->howto->src_mask) + relocation) & \
2987 reloc_entry->howto->dst_mask))
2988
57698478 2989 switch (bfd_get_reloc_size (reloc_entry->howto))
35c08157 2990 {
57698478 2991 case 2:
35c08157
KLC		 2992 {
2993 short x = bfd_getb16 (inplace_address);
2994
2995 DOIT (x);
2996 bfd_putb16 ((bfd_vma) x, inplace_address);
2997 }
2998 break;
57698478 2999 case 4:
35c08157
KLC		 3000 {
3001 unsigned long x = bfd_getb32 (inplace_address);
3002
3003 DOIT (x);
3004 bfd_putb32 ((bfd_vma) x, inplace_address);
3005 }
3006 break;
3007 default:
3008 BFD_ASSERT (0);
3009 }
3010
3011 if (output_bfd != (bfd *) NULL)
3012 reloc_entry->address += input_section->output_offset;
3013
3014 return ret;
3015}
3016
3017/* Handle the R_NDS32_SDA15 reloc.
3018 This reloc is used to compute the address of objects in the small data area
3019 and to perform loads and stores from that area.
3020 The lower 15 bits are sign extended and added to the register specified
3021 in the instruction, which is assumed to point to _SDA_BASE_.
3022
3023 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
3024 the access size, this must be taken care of. */
3025
3026static bfd_reloc_status_type
3027nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
3028 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
3029 asection *input_section, bfd *output_bfd,
3030 char **error_message ATTRIBUTE_UNUSED)
3031{
3032 /* This part is from bfd_elf_generic_reloc. */
3033 if (output_bfd != (bfd *) NULL
3034 && (symbol->flags & BSF_SECTION_SYM) == 0
3035 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
3036 {
3037 reloc_entry->address += input_section->output_offset;
3038 return bfd_reloc_ok;
3039 }
3040
3041 if (output_bfd != NULL)
3042 {
3043 /* FIXME: See bfd_perform_relocation. Is this right? */
3044 return bfd_reloc_continue;
3045 }
3046
3047 /* FIXME: not sure what to do here yet. But then again, the linker
3048 may never call us. */
3049 abort ();
3050}
3051
3052/* nds32_elf_ignore_reloc is the special function for
3053 relocation types which don't need to be relocated
3054 like relaxation relocation types.
3055 This function simply return bfd_reloc_ok when it is
3056 invoked. */
3057
3058static bfd_reloc_status_type
3059nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
3060 asymbol *symbol ATTRIBUTE_UNUSED,
3061 void *data ATTRIBUTE_UNUSED, asection *input_section,
3062 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
3063{
3064 if (output_bfd != NULL)
3065 reloc_entry->address += input_section->output_offset;
3066
3067 return bfd_reloc_ok;
3068}
3069\f
3070
3071/* Map BFD reloc types to NDS32 ELF reloc types. */
3072
3073struct nds32_reloc_map_entry
3074{
3075 bfd_reloc_code_real_type bfd_reloc_val;
3076 unsigned char elf_reloc_val;
3077};
3078
3079static const struct nds32_reloc_map_entry nds32_reloc_map[] =
3080{
3081 {BFD_RELOC_NONE, R_NDS32_NONE},
3082 {BFD_RELOC_16, R_NDS32_16_RELA},
3083 {BFD_RELOC_32, R_NDS32_32_RELA},
fbaf61ad
NC		 3084 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
3085 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
3086
35c08157 3087 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
35c08157
KLC		 3088 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
3089 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
3090 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
3091 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
3092 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
35c08157
KLC		 3093 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
3094 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
3095 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
3096 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
3097 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
3098 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
3099 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
3100 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
3101 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
3102 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
fbaf61ad
NC		 3103 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
3104 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
3105 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
3106 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
35c08157
KLC		 3107 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
3108 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
3109 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
3110 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
3111 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
3112 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
3113 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
3114 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
fbaf61ad
NC		 3115 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
3116 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
35c08157
KLC		 3117 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
3118 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
3119 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
35c08157
KLC		 3120 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
3121 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
35c08157
KLC		 3122 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
3123 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
3124 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
3125 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
3126 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
3127 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
3128 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
3129 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
3130 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
3131 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
3132 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
3133 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
3134 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
fbaf61ad
NC		 3135 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
3136 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
3137 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
3138 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
3139 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
3140 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
3141 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
35c08157
KLC		 3142 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
3143 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
3144 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
3145 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
35c08157
KLC		 3146 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
3147 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
3148 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
3149 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
35c08157
KLC		 3150 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
3151 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
3152 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
3153 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
fbaf61ad
NC		 3154 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
3155 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
3156 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
3157 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
3158 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
3159 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
3160 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
35c08157
KLC		 3161 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
3162 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
fbaf61ad
NC		 3163 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
3164 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
3165 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
3166 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
3167 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
3168 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
3169 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
3170 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
35c08157
KLC		 3171 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
3172 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
35c08157 3173 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
35c08157
KLC		 3174 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
3175 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
3176 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
3177 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
3178 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
35c08157
KLC		 3179 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
3180 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
3181 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
3182 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
fbaf61ad 3183 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
35c08157
KLC		 3184 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
3185 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
3186 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
3187 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
3188 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
fbaf61ad
NC		 3189 /* Not sure. */
3190 {BFD_RELOC_NDS32_TPOFF, R_NDS32_TLS_TPOFF},
3191 /* Missing: BFD_RELOC_NDS32_GOTTPOFF. */
1c8f6a4d
KLC		 3192 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
3193 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
1c8f6a4d
KLC		 3194 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
3195 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
3196 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
3197 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
fbaf61ad
NC		 3198 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
3199 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
3200 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
3201 {BFD_RELOC_NDS32_TLS_IE_LO12, R_NDS32_TLS_IE_LO12},
3202 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
3203 {BFD_RELOC_NDS32_TLS_IEGP_HI20, R_NDS32_TLS_IEGP_HI20},
3204 {BFD_RELOC_NDS32_TLS_IEGP_LO12, R_NDS32_TLS_IEGP_LO12},
3205 {BFD_RELOC_NDS32_TLS_IEGP_LO12S2, R_NDS32_TLS_IEGP_LO12S2},
3206 {BFD_RELOC_NDS32_TLS_IEGP_LW, R_NDS32_TLS_IEGP_LW},
3207 {BFD_RELOC_NDS32_TLS_DESC, R_NDS32_TLS_DESC},
3208 {BFD_RELOC_NDS32_TLS_DESC_HI20, R_NDS32_TLS_DESC_HI20},
3209 {BFD_RELOC_NDS32_TLS_DESC_LO12, R_NDS32_TLS_DESC_LO12},
3210 {BFD_RELOC_NDS32_TLS_DESC_20, R_NDS32_TLS_DESC_20},
3211 {BFD_RELOC_NDS32_TLS_DESC_SDA17S2, R_NDS32_TLS_DESC_SDA17S2},
3212 {BFD_RELOC_NDS32_TLS_DESC_ADD, R_NDS32_TLS_DESC_ADD},
3213 {BFD_RELOC_NDS32_TLS_DESC_FUNC, R_NDS32_TLS_DESC_FUNC},
3214 {BFD_RELOC_NDS32_TLS_DESC_CALL, R_NDS32_TLS_DESC_CALL},
3215 {BFD_RELOC_NDS32_TLS_DESC_MEM, R_NDS32_TLS_DESC_MEM},
3216 {BFD_RELOC_NDS32_REMOVE, R_NDS32_RELAX_REMOVE},
3217 {BFD_RELOC_NDS32_GROUP, R_NDS32_RELAX_GROUP},
3218 {BFD_RELOC_NDS32_LSI, R_NDS32_LSI},
35c08157
KLC		 3219};
3220
3221/* Patch tag. */
3222
3223static reloc_howto_type *
3224bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
3225 const char *r_name)
3226{
3227 unsigned int i;
3228
3229 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
3230 if (nds32_elf_howto_table[i].name != NULL
3231 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
3232 return &nds32_elf_howto_table[i];
3233
3234 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
3235 if (nds32_elf_relax_howto_table[i].name != NULL
3236 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
3237 return &nds32_elf_relax_howto_table[i];
3238
3239 return NULL;
3240}
3241
3242static reloc_howto_type *
a379e758 3243bfd_elf32_bfd_reloc_type_table_lookup (unsigned int code)
35c08157
KLC		 3244{
3245 if (code < R_NDS32_RELAX_ENTRY)
3246 {
a379e758
AM		 3247 if (code < ARRAY_SIZE (nds32_elf_howto_table))
3248 return &nds32_elf_howto_table[code];
35c08157
KLC		 3249 }
3250 else
3251 {
a379e758
AM		 3252 if (code - R_NDS32_RELAX_ENTRY < ARRAY_SIZE (nds32_elf_relax_howto_table))
3253 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
35c08157 3254 }
a379e758 3255 return NULL;
35c08157
KLC		 3256}
3257
3258static reloc_howto_type *
3259bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
3260 bfd_reloc_code_real_type code)
3261{
3262 unsigned int i;
3263
3264 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
3265 {
3266 if (nds32_reloc_map[i].bfd_reloc_val == code)
3267 return bfd_elf32_bfd_reloc_type_table_lookup
fbaf61ad 3268 (nds32_reloc_map[i].elf_reloc_val);
35c08157
KLC		 3269 }
3270
3271 return NULL;
3272}
3273
3274/* Set the howto pointer for an NDS32 ELF reloc. */
3275
0a1b45a2 3276static bool
f3185997 3277nds32_info_to_howto_rel (bfd *abfd, arelent *cache_ptr,
35c08157
KLC		 3278 Elf_Internal_Rela *dst)
3279{
a379e758 3280 unsigned int r_type = ELF32_R_TYPE (dst->r_info);
35c08157 3281
a379e758
AM		 3282 cache_ptr->howto = NULL;
3283 if (r_type <= R_NDS32_GNU_VTENTRY)
3284 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
3285 if (cache_ptr->howto == NULL || cache_ptr->howto->name == NULL)
5860e3f8 3286 {
695344c0 3287 /* xgettext:c-format */
0aa13fee
AM		 3288 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
3289 abfd, r_type);
f3185997 3290 bfd_set_error (bfd_error_bad_value);
0a1b45a2 3291 return false;
5860e3f8 3292 }
0a1b45a2 3293 return true;
35c08157
KLC		 3294}
3295
0a1b45a2 3296static bool
a379e758 3297nds32_info_to_howto (bfd *abfd, arelent *cache_ptr,
35c08157
KLC		 3298 Elf_Internal_Rela *dst)
3299{
f3185997
NC		 3300 unsigned int r_type = ELF32_R_TYPE (dst->r_info);
3301
a379e758
AM		 3302 cache_ptr->howto = NULL;
3303 if (r_type == R_NDS32_NONE
3304 || r_type > R_NDS32_GNU_VTENTRY)
3305 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
3306 if (cache_ptr->howto == NULL || cache_ptr->howto->name == NULL)
f3185997 3307 {
a379e758
AM		 3308 /* xgettext:c-format */
3309 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
3310 abfd, r_type);
3311 bfd_set_error (bfd_error_bad_value);
3312 return false;
f3185997 3313 }
a379e758 3314 return true;
35c08157
KLC		 3315}
3316
3317/* Support for core dump NOTE sections.
3318 Reference to include/linux/elfcore.h in Linux. */
3319
0a1b45a2 3320static bool
35c08157
KLC		 3321nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
3322{
3323 int offset;
3324 size_t size;
3325
3326 switch (note->descsz)
3327 {
3328 case 0x114:
fbaf61ad 3329 /* Linux/NDS32 32-bit, ABI1. */
35c08157
KLC		 3330
3331 /* pr_cursig */
3332 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3333
3334 /* pr_pid */
3335 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3336
3337 /* pr_reg */
3338 offset = 72;
3339 size = 200;
3340 break;
3341
3342 case 0xfc:
fbaf61ad 3343 /* Linux/NDS32 32-bit. */
35c08157
KLC		 3344
3345 /* pr_cursig */
3346 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3347
3348 /* pr_pid */
3349 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3350
3351 /* pr_reg */
3352 offset = 72;
3353 size = 176;
3354 break;
3355
3356 default:
0a1b45a2 3357 return false;
35c08157
KLC		 3358 }
3359
3360 /* Make a ".reg" section. */
3361 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
3362 size, note->descpos + offset);
3363}
3364
0a1b45a2 3365static bool
35c08157
KLC		 3366nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
3367{
3368 switch (note->descsz)
3369 {
3370 case 124:
fbaf61ad 3371 /* Linux/NDS32. */
35c08157
KLC		 3372
3373 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
3374 elf_tdata (abfd)->core->program =
3375 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
3376 elf_tdata (abfd)->core->command =
3377 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2b804145 3378 break;
35c08157
KLC		 3379
3380 default:
0a1b45a2 3381 return false;
35c08157
KLC		 3382 }
3383
3384 /* Note that for some reason, a spurious space is tacked
3385 onto the end of the args in some (at least one anyway)
3386 implementations, so strip it off if it exists. */
3387 {
3388 char *command = elf_tdata (abfd)->core->command;
3389 int n = strlen (command);
3390
3391 if (0 < n && command[n - 1] == ' ')
3392 command[n - 1] = '\0';
3393 }
3394
0a1b45a2 3395 return true;
35c08157
KLC		 3396}
3397
3398/* Hook called by the linker routine which adds symbols from an object
3399 file. We must handle the special NDS32 section numbers here.
3400 We also keep watching for whether we need to create the sdata special
3401 linker sections. */
3402
0a1b45a2 3403static bool
35c08157
KLC		 3404nds32_elf_add_symbol_hook (bfd *abfd,
3405 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3406 Elf_Internal_Sym *sym,
3407 const char **namep ATTRIBUTE_UNUSED,
3408 flagword *flagsp ATTRIBUTE_UNUSED,
3409 asection **secp, bfd_vma *valp)
3410{
3411 switch (sym->st_shndx)
3412 {
3413 case SHN_COMMON:
3414 /* Common symbols less than the GP size are automatically
3415 treated as SHN_MIPS_SCOMMON symbols. */
3416 if (sym->st_size > elf_gp_size (abfd)
3417 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3418 break;
3419
10885e24 3420 /* st_value is the alignment constraint.
35c08157
KLC		 3421 That might be its actual size if it is an array or structure. */
3422 switch (sym->st_value)
3423 {
3424 case 1:
3425 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3426 break;
3427 case 2:
3428 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3429 break;
3430 case 4:
3431 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3432 break;
3433 case 8:
3434 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3435 break;
3436 default:
0a1b45a2 3437 return true;
35c08157
KLC		 3438 }
3439
10885e24 3440 (*secp)->flags |= SEC_IS_COMMON | SEC_SMALL_DATA;
35c08157
KLC		 3441 *valp = sym->st_size;
3442 break;
3443 }
3444
0a1b45a2 3445 return true;
35c08157
KLC		 3446}
3447
35c08157
KLC		 3448/* This function can figure out the best location for a base register to access
3449 data relative to this base register
3450 INPUT:
3451 sda_d0: size of first DOUBLE WORD data section
3452 sda_w0: size of first WORD data section
3453 sda_h0: size of first HALF WORD data section
3454 sda_b : size of BYTE data section
3455 sda_hi: size of second HALF WORD data section
3456 sda_w1: size of second WORD data section
3457 sda_d1: size of second DOUBLE WORD data section
3458 OUTPUT:
3459 offset (always positive) from the beginning of sda_d0 if OK
3460 a negative error value if fail
3461 NOTE:
3462 these 7 sections have to be located back to back if exist
3463 a pass in 0 value for non-existing section */
3464
3465/* Due to the interpretation of simm15 field of load/store depending on
3466 data accessing size, the organization of base register relative data shall
3467 like the following figure
3468 -------------------------------------------
3469 | DOUBLE WORD sized data (range +/- 128K)
3470 -------------------------------------------
3471 | WORD sized data (range +/- 64K)
3472 -------------------------------------------
3473 | HALF WORD sized data (range +/- 32K)
3474 -------------------------------------------
3475 | BYTE sized data (range +/- 16K)
3476 -------------------------------------------
3477 | HALF WORD sized data (range +/- 32K)
3478 -------------------------------------------
3479 | WORD sized data (range +/- 64K)
3480 -------------------------------------------
3481 | DOUBLE WORD sized data (range +/- 128K)
3482 -------------------------------------------
3483 Its base register shall be set to access these data freely. */
3484
3485/* We have to figure out the SDA_BASE value, so that we can adjust the
3486 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3487 BFD. If we can't find it, we're stuck. We cache it in the ELF
3488 target data. We don't need to adjust the symbol value for an
3489 external symbol if we are producing relocatable output. */
3490
3491static asection *sda_rela_sec = NULL;
3492
1c8f6a4d 3493#define SDA_SECTION_NUM 10
35c08157
KLC		 3494
3495static bfd_reloc_status_type
0a1b45a2
AM		 3496nds32_elf_final_sda_base (bfd *output_bfd,
3497 struct bfd_link_info *info,
3498 bfd_vma *psb,
3499 bool add_symbol)
35c08157
KLC		 3500{
3501 int relax_fp_as_gp;
3502 struct elf_nds32_link_hash_table *table;
3503 struct bfd_link_hash_entry *h, *h2;
1c8f6a4d 3504 long unsigned int total = 0;
fbaf61ad
NC		 3505 asection *first = NULL, *final = NULL, *temp;
3506 bfd_vma sda_base = 0;
35c08157 3507
0a1b45a2 3508 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, true);
fbaf61ad
NC		 3509 if (!h || (h->type != bfd_link_hash_defined
3510 && h->type != bfd_link_hash_defweak))
35c08157 3511 {
35c08157
KLC		 3512 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3513 4 byte-aligned. Therefore, it has to set the first section ".data"
3514 4 byte-aligned. */
3515 static const char sec_name[SDA_SECTION_NUM][10] =
3516 {
3517 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
1c8f6a4d 3518 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
35c08157
KLC		 3519 };
3520 size_t i = 0;
3521
3522 if (output_bfd->sections == NULL)
3523 {
3524 *psb = elf_gp (output_bfd);
3525 return bfd_reloc_ok;
3526 }
3527
3528 /* Get the first and final section. */
fbaf61ad 3529 while (i < ARRAY_SIZE (sec_name))
35c08157
KLC		 3530 {
3531 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3532 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3533 first = temp;
3534 if (temp && (temp->size != 0 || temp->rawsize != 0))
3535 final = temp;
1c8f6a4d
KLC		 3536
3537 /* Summarize the sections in order to check if joining .bss. */
3538 if (temp && temp->size != 0)
3539 total += temp->size;
3540 else if (temp && temp->rawsize != 0)
3541 total += temp->rawsize;
3542
35c08157
KLC		 3543 i++;
3544 }
3545
1c8f6a4d
KLC		 3546 /* Check .bss size. */
3547 temp = bfd_get_section_by_name (output_bfd, ".bss");
3548 if (temp)
3549 {
3550 if (temp->size != 0)
3551 total += temp->size;
3552 else if (temp->rawsize != 0)
3553 total += temp->rawsize;
3554
3555 if (total < 0x80000)
3556 {
3557 if (!first && (temp->size != 0 || temp->rawsize != 0))
3558 first = temp;
3559 if ((temp->size != 0 || temp->rawsize != 0))
3560 final = temp;
3561 }
3562 }
3563
35c08157
KLC		 3564 if (first && final)
3565 {
3566 /* The middle of data region. */
1c8f6a4d 3567 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
35c08157
KLC		 3568
3569 /* Find the section sda_base located. */
3570 i = 0;
fbaf61ad 3571 while (i < ARRAY_SIZE (sec_name))
35c08157
KLC		 3572 {
3573 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3574 if (final && (final->size != 0 || final->rawsize != 0)
3575 && sda_base >= final->vma)
3576 {
3577 first = final;
3578 i++;
3579 }
3580 else
3581 break;
3582 }
3583 }
3584 else
3585 {
fbaf61ad
NC		 3586 /* If there is not any default data section in output bfd, try to find
3587 the first data section. If no data section be found, just simplily
3588 choose the first output section. */
3589 temp = output_bfd->sections;
3590 while (temp)
3591 {
3592 if (temp->flags & SEC_ALLOC
3593 && (((temp->flags & SEC_DATA)
3594 && ((temp->flags & SEC_READONLY) == 0))
3595 || (temp->flags & SEC_LOAD) == 0)
3596 && (temp->size != 0 || temp->rawsize != 0))
3597 {
3598 if (!first)
3599 first = temp;
3600 final = temp;
3601 }
3602 temp = temp->next;
3603 }
3604
3605 /* There is no data or bss section. */
3606 if (!first || (first->size == 0 && first->rawsize == 0))
3607 {
3608 first = output_bfd->sections;
3609 while (first && first->size == 0 && first->rawsize == 0)
3610 first = first->next;
3611 }
3612
3613 /* There is no concrete section. */
35c08157
KLC		 3614 if (!first)
3615 {
3616 *psb = elf_gp (output_bfd);
3617 return bfd_reloc_ok;
3618 }
fbaf61ad
NC		 3619
3620 if (final && (final->vma + final->rawsize - first->vma) <= 0x4000)
3621 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
3622 else
3623 sda_base = first->vma + 0x2000;
35c08157
KLC		 3624 }
3625
3626 sda_base -= first->vma;
3627 sda_base = sda_base & (~7);
3628
3629 if (!_bfd_generic_link_add_one_symbol
fbaf61ad 3630 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
0a1b45a2 3631 (bfd_vma) sda_base, (const char *) NULL, false,
fbaf61ad 3632 get_elf_backend_data (output_bfd)->collect, &h))
0a1b45a2 3633 return false;
35c08157
KLC		 3634
3635 sda_rela_sec = first;
fbaf61ad 3636 }
35c08157 3637
fbaf61ad
NC		 3638 /* Set _FP_BASE_ to _SDA_BASE_. */
3639 table = nds32_elf_hash_table (info);
3640 relax_fp_as_gp = table->relax_fp_as_gp;
0a1b45a2 3641 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME, false, false, false);
fbaf61ad
NC		 3642 /* _SDA_BASE_ is difined in linker script. */
3643 if (!first)
3644 {
3645 first = h->u.def.section;
3646 sda_base = h->u.def.value;
3647 }
3648
3649 if (relax_fp_as_gp && h2
3650 && (h2->type == bfd_link_hash_undefweak
3651 || h2->type == bfd_link_hash_undefined))
3652 {
3653 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3654 And set FP equal to SDA_BASE to do relaxation for
3655 la $fp, _FP_BASE_. */
3656 if (!_bfd_generic_link_add_one_symbol
3657 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3658 first, sda_base, (const char *) NULL,
0a1b45a2
AM		 3659 false, get_elf_backend_data (output_bfd)->collect, &h2))
3660 return false;
35c08157
KLC		 3661 }
3662
535b785f 3663 if (add_symbol)
35c08157
KLC		 3664 {
3665 if (h)
3666 {
3667 /* Now set gp. */
3668 elf_gp (output_bfd) = (h->u.def.value
3669 + h->u.def.section->output_section->vma
3670 + h->u.def.section->output_offset);
3671 }
3672 else
3673 {
38f14ab8 3674 _bfd_error_handler (_("error: can't find symbol: %s"), "_SDA_BASE_");
35c08157
KLC		 3675 return bfd_reloc_dangerous;
3676 }
3677 }
3678
fbaf61ad
NC		 3679 *psb = h->u.def.value
3680 + h->u.def.section->output_section->vma
3681 + h->u.def.section->output_offset;
35c08157
KLC		 3682 return bfd_reloc_ok;
3683}
3684\f
3685
3686/* Return size of a PLT entry. */
3687#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3688
35c08157
KLC		 3689/* Create an entry in an nds32 ELF linker hash table. */
3690
3691static struct bfd_hash_entry *
3692nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3693 struct bfd_hash_table *table,
3694 const char *string)
3695{
3696 struct elf_nds32_link_hash_entry *ret;
3697
3698 ret = (struct elf_nds32_link_hash_entry *) entry;
3699
3700 /* Allocate the structure if it has not already been allocated by a
3701 subclass. */
3702 if (ret == NULL)
3703 ret = (struct elf_nds32_link_hash_entry *)
3704 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3705
3706 if (ret == NULL)
3707 return (struct bfd_hash_entry *) ret;
3708
3709 /* Call the allocation method of the superclass. */
3710 ret = (struct elf_nds32_link_hash_entry *)
3711 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3712
3713 if (ret != NULL)
3714 {
3715 struct elf_nds32_link_hash_entry *eh;
3716
3717 eh = (struct elf_nds32_link_hash_entry *) ret;
1c8f6a4d 3718 eh->tls_type = GOT_UNKNOWN;
fbaf61ad 3719 eh->offset_to_gp = 0;
35c08157
KLC		 3720 }
3721
3722 return (struct bfd_hash_entry *) ret;
3723}
3724
3725/* Create an nds32 ELF linker hash table. */
3726
3727static struct bfd_link_hash_table *
3728nds32_elf_link_hash_table_create (bfd *abfd)
3729{
3730 struct elf_nds32_link_hash_table *ret;
3731
986f0783 3732 size_t amt = sizeof (struct elf_nds32_link_hash_table);
35c08157
KLC		 3733
3734 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3735 if (ret == NULL)
3736 return NULL;
3737
fbaf61ad 3738 /* Patch tag. */
35c08157
KLC		 3739 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3740 nds32_elf_link_hash_newfunc,
3741 sizeof (struct elf_nds32_link_hash_entry),
3742 NDS32_ELF_DATA))
3743 {
3744 free (ret);
3745 return NULL;
3746 }
3747
fbaf61ad
NC		 3748 ret->sym_ld_script = NULL;
3749
35c08157
KLC		 3750 return &ret->root.root;
3751}
3752
fbaf61ad
NC		 3753/* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
3754 shortcuts to them in our hash table. */
3755
0a1b45a2 3756static bool
fbaf61ad
NC		 3757create_got_section (bfd *dynobj, struct bfd_link_info *info)
3758{
3759 struct elf_link_hash_table *ehtab;
3760
3761 if (!_bfd_elf_create_got_section (dynobj, info))
0a1b45a2 3762 return false;
fbaf61ad
NC		 3763
3764 ehtab = elf_hash_table (info);
3765 ehtab->sgot = bfd_get_section_by_name (dynobj, ".got");
3766 ehtab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
3767 if (!ehtab->sgot || !ehtab->sgotplt)
3768 abort ();
3769
3770 /* _bfd_elf_create_got_section will create it for us. */
3771 ehtab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
3772 if (ehtab->srelgot == NULL
fd361982 3773 || !bfd_set_section_flags (ehtab->srelgot,
fbaf61ad
NC		 3774 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3775 | SEC_IN_MEMORY | SEC_LINKER_CREATED
3776 | SEC_READONLY))
fd361982 3777 || !bfd_set_section_alignment (ehtab->srelgot, 2))
0a1b45a2 3778 return false;
fbaf61ad 3779
0a1b45a2 3780 return true;
fbaf61ad
NC		 3781}
3782
35c08157
KLC		 3783/* Create dynamic sections when linking against a dynamic object. */
3784
0a1b45a2 3785static bool
35c08157
KLC		 3786nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3787{
fbaf61ad 3788 struct elf_link_hash_table *ehtab;
35c08157
KLC		 3789 struct elf_nds32_link_hash_table *htab;
3790 flagword flags, pltflags;
3791 register asection *s;
3792 const struct elf_backend_data *bed;
3793 int ptralign = 2; /* 32-bit */
fbaf61ad
NC		 3794 const char *secname;
3795 char *relname;
3796 flagword secflags;
3797 asection *sec;
35c08157
KLC		 3798
3799 bed = get_elf_backend_data (abfd);
fbaf61ad 3800 ehtab = elf_hash_table (info);
35c08157
KLC		 3801 htab = nds32_elf_hash_table (info);
3802
3803 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3804 .rel[a].bss sections. */
3805
3806 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3807 | SEC_LINKER_CREATED);
3808
3809 pltflags = flags;
3810 pltflags |= SEC_CODE;
3811 if (bed->plt_not_loaded)
3812 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3813 if (bed->plt_readonly)
3814 pltflags |= SEC_READONLY;
3815
3816 s = bfd_make_section (abfd, ".plt");
fbaf61ad 3817 ehtab->splt = s;
35c08157 3818 if (s == NULL
fd361982
AM		 3819 || !bfd_set_section_flags (s, pltflags)
3820 || !bfd_set_section_alignment (s, bed->plt_alignment))
0a1b45a2 3821 return false;
35c08157
KLC		 3822
3823 if (bed->want_plt_sym)
3824 {
3825 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3826 .plt section. */
3827 struct bfd_link_hash_entry *bh = NULL;
3828 struct elf_link_hash_entry *h;
3829
3830 if (!(_bfd_generic_link_add_one_symbol
3831 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
0a1b45a2 3832 (bfd_vma) 0, (const char *) NULL, false,
35c08157 3833 get_elf_backend_data (abfd)->collect, &bh)))
0a1b45a2 3834 return false;
35c08157
KLC		 3835
3836 h = (struct elf_link_hash_entry *) bh;
3837 h->def_regular = 1;
3838 h->type = STT_OBJECT;
3839
0e1862bb 3840 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
0a1b45a2 3841 return false;
35c08157
KLC		 3842 }
3843
3844 s = bfd_make_section (abfd,
3845 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
fbaf61ad 3846 ehtab->srelplt = s;
35c08157 3847 if (s == NULL
fd361982
AM		 3848 || !bfd_set_section_flags (s, flags | SEC_READONLY)
3849 || !bfd_set_section_alignment (s, ptralign))
0a1b45a2 3850 return false;
35c08157 3851
fbaf61ad 3852 if (ehtab->sgot == NULL && !create_got_section (abfd, info))
0a1b45a2 3853 return false;
35c08157 3854
fbaf61ad
NC		 3855 for (sec = abfd->sections; sec; sec = sec->next)
3856 {
fd361982 3857 secflags = bfd_section_flags (sec);
fbaf61ad
NC		 3858 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3859 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3860 continue;
fd361982 3861 secname = bfd_section_name (sec);
fbaf61ad
NC		 3862 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3863 strcpy (relname, ".rela");
3864 strcat (relname, secname);
3865 if (bfd_get_section_by_name (abfd, secname))
3866 continue;
3867 s = bfd_make_section (abfd, relname);
3868 if (s == NULL
fd361982
AM		 3869 || !bfd_set_section_flags (s, flags | SEC_READONLY)
3870 || !bfd_set_section_alignment (s, ptralign))
0a1b45a2 3871 return false;
fbaf61ad 3872 }
35c08157
KLC		 3873
3874 if (bed->want_dynbss)
3875 {
3876 /* The .dynbss section is a place to put symbols which are defined
3877 by dynamic objects, are referenced by regular objects, and are
3878 not functions. We must allocate space for them in the process
3879 image and use a R_*_COPY reloc to tell the dynamic linker to
3880 initialize them at run time. The linker script puts the .dynbss
3881 section into the .bss section of the final image. */
3882 s = bfd_make_section (abfd, ".dynbss");
f1dfbfdb 3883 htab->root.sdynbss = s;
35c08157 3884 if (s == NULL
fd361982 3885 || !bfd_set_section_flags (s, SEC_ALLOC | SEC_LINKER_CREATED))
0a1b45a2 3886 return false;
35c08157
KLC		 3887 /* The .rel[a].bss section holds copy relocs. This section is not
3888 normally needed. We need to create it here, though, so that the
3889 linker will map it to an output section. We can't just create it
3890 only if we need it, because we will not know whether we need it
3891 until we have seen all the input files, and the first time the
3892 main linker code calls BFD after examining all the input files
3893 (size_dynamic_sections) the input sections have already been
3894 mapped to the output sections. If the section turns out not to
3895 be needed, we can discard it later. We will never need this
3896 section when generating a shared object, since they do not use
3897 copy relocs. */
0e1862bb 3898 if (!bfd_link_pic (info))
35c08157
KLC		 3899 {
3900 s = bfd_make_section (abfd, (bed->default_use_rela_p
3901 ? ".rela.bss" : ".rel.bss"));
f1dfbfdb 3902 htab->root.srelbss = s;
35c08157 3903 if (s == NULL
fd361982
AM		 3904 || !bfd_set_section_flags (s, flags | SEC_READONLY)
3905 || !bfd_set_section_alignment (s, ptralign))
0a1b45a2 3906 return false;
35c08157
KLC		 3907 }
3908 }
3909
0a1b45a2 3910 return true;
35c08157
KLC		 3911}
3912
3913/* Copy the extra info we tack onto an elf_link_hash_entry. */
3914static void
3915nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3916 struct elf_link_hash_entry *dir,
3917 struct elf_link_hash_entry *ind)
3918{
3919 struct elf_nds32_link_hash_entry *edir, *eind;
3920
3921 edir = (struct elf_nds32_link_hash_entry *) dir;
3922 eind = (struct elf_nds32_link_hash_entry *) ind;
3923
fbaf61ad
NC		 3924 if (ind->root.type == bfd_link_hash_indirect)
3925 {
3926 if (dir->got.refcount <= 0)
3927 {
3928 edir->tls_type = eind->tls_type;
3929 eind->tls_type = GOT_UNKNOWN;
3930 }
3931 }
3932
35c08157
KLC		 3933 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3934}
3935\f
35c08157
KLC		 3936/* Adjust a symbol defined by a dynamic object and referenced by a
3937 regular object. The current definition is in some section of the
3938 dynamic object, but we're not including those sections. We have to
3939 change the definition to something the rest of the link can
3940 understand. */
3941
0a1b45a2 3942static bool
35c08157
KLC		 3943nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3944 struct elf_link_hash_entry *h)
3945{
3946 struct elf_nds32_link_hash_table *htab;
35c08157
KLC		 3947 bfd *dynobj;
3948 asection *s;
3949 unsigned int power_of_two;
3950
3951 dynobj = elf_hash_table (info)->dynobj;
3952
3953 /* Make sure we know what is going on here. */
3954 BFD_ASSERT (dynobj != NULL
3955 && (h->needs_plt
60d67dc8 3956 || h->is_weakalias
35c08157
KLC		 3957 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3958
3959
3960 /* If this is a function, put it in the procedure linkage table. We
3961 will fill in the contents of the procedure linkage table later,
3962 when we know the address of the .got section. */
3963 if (h->type == STT_FUNC || h->needs_plt)
3964 {
0e1862bb 3965 if (!bfd_link_pic (info)
35c08157
KLC		 3966 && !h->def_dynamic
3967 && !h->ref_dynamic
3968 && h->root.type != bfd_link_hash_undefweak
3969 && h->root.type != bfd_link_hash_undefined)
3970 {
3971 /* This case can occur if we saw a PLT reloc in an input
3972 file, but the symbol was never referred to by a dynamic
3973 object. In such a case, we don't actually need to build
3974 a procedure linkage table, and we can just do a PCREL
3975 reloc instead. */
3976 h->plt.offset = (bfd_vma) - 1;
3977 h->needs_plt = 0;
3978 }
3979
0a1b45a2 3980 return true;
35c08157
KLC		 3981 }
3982 else
3983 h->plt.offset = (bfd_vma) - 1;
3984
3985 /* If this is a weak symbol, and there is a real definition, the
3986 processor independent code will have arranged for us to see the
3987 real definition first, and we can just use the same value. */
60d67dc8 3988 if (h->is_weakalias)
35c08157 3989 {
60d67dc8
AM		 3990 struct elf_link_hash_entry *def = weakdef (h);
3991 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
3992 h->root.u.def.section = def->root.u.def.section;
3993 h->root.u.def.value = def->root.u.def.value;
0a1b45a2 3994 return true;
35c08157
KLC		 3995 }
3996
3997 /* This is a reference to a symbol defined by a dynamic object which
3998 is not a function. */
3999
4000 /* If we are creating a shared library, we must presume that the
4001 only references to the symbol are via the global offset table.
4002 For such cases we need not do anything here; the relocations will
4003 be handled correctly by relocate_section. */
0e1862bb 4004 if (bfd_link_pic (info))
0a1b45a2 4005 return true;
35c08157
KLC		 4006
4007 /* If there are no references to this symbol that do not use the
4008 GOT, we don't need to generate a copy reloc. */
4009 if (!h->non_got_ref)
0a1b45a2 4010 return true;
35c08157
KLC		 4011
4012 /* If -z nocopyreloc was given, we won't generate them either. */
3bf083ed 4013 if (0 && info->nocopyreloc)
35c08157
KLC		 4014 {
4015 h->non_got_ref = 0;
0a1b45a2 4016 return true;
35c08157
KLC		 4017 }
4018
3bf083ed
AM		 4019 /* If we don't find any dynamic relocs in read-only sections, then
4020 we'll be keeping the dynamic relocs and avoiding the copy reloc. */
5dbc8b37 4021 if (!_bfd_elf_readonly_dynrelocs (h))
35c08157
KLC		 4022 {
4023 h->non_got_ref = 0;
0a1b45a2 4024 return true;
35c08157
KLC		 4025 }
4026
4027 /* We must allocate the symbol in our .dynbss section, which will
4028 become part of the .bss section of the executable. There will be
4029 an entry for this symbol in the .dynsym section. The dynamic
4030 object will contain position independent code, so all references
4031 from the dynamic object to this symbol will go through the global
4032 offset table. The dynamic linker will use the .dynsym entry to
4033 determine the address it must put in the global offset table, so
4034 both the dynamic object and the regular object will refer to the
4035 same memory location for the variable. */
4036
4037 htab = nds32_elf_hash_table (info);
f1dfbfdb 4038 s = htab->root.sdynbss;
35c08157
KLC		 4039 BFD_ASSERT (s != NULL);
4040
4041 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
4042 to copy the initial value out of the dynamic object and into the
4043 runtime process image. We need to remember the offset into the
4044 .rela.bss section we are going to use. */
4045 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
4046 {
4047 asection *srel;
4048
f1dfbfdb 4049 srel = htab->root.srelbss;
35c08157
KLC		 4050 BFD_ASSERT (srel != NULL);
4051 srel->size += sizeof (Elf32_External_Rela);
4052 h->needs_copy = 1;
4053 }
4054
4055 /* We need to figure out the alignment required for this symbol. I
4056 have no idea how ELF linkers handle this. */
4057 power_of_two = bfd_log2 (h->size);
4058 if (power_of_two > 3)
4059 power_of_two = 3;
4060
4061 /* Apply the required alignment. */
4062 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
fd361982 4063 if (power_of_two > bfd_section_alignment (s))
35c08157 4064 {
fd361982 4065 if (!bfd_set_section_alignment (s, power_of_two))
0a1b45a2 4066 return false;
35c08157
KLC		 4067 }
4068
4069 /* Define the symbol as being at this point in the section. */
4070 h->root.u.def.section = s;
4071 h->root.u.def.value = s->size;
4072
4073 /* Increment the section size to make room for the symbol. */
4074 s->size += h->size;
4075
0a1b45a2 4076 return true;
35c08157
KLC		 4077}
4078
4079/* Allocate space in .plt, .got and associated reloc sections for
4080 dynamic relocs. */
4081
0a1b45a2 4082static bool
35c08157
KLC		 4083allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
4084{
4085 struct bfd_link_info *info;
fbaf61ad 4086 struct elf_link_hash_table *ehtab;
35c08157 4087 struct elf_nds32_link_hash_table *htab;
3bf083ed 4088 struct elf_dyn_relocs *p;
35c08157
KLC		 4089
4090 if (h->root.type == bfd_link_hash_indirect)
0a1b45a2 4091 return true;
35c08157 4092
fbaf61ad
NC		 4093 /* When warning symbols are created, they **replace** the "real"
4094 entry in the hash table, thus we never get to see the real
4095 symbol in a hash traversal. So look at it now. */
35c08157 4096 if (h->root.type == bfd_link_hash_warning)
35c08157
KLC		 4097 h = (struct elf_link_hash_entry *) h->root.u.i.link;
4098
4099 info = (struct bfd_link_info *) inf;
fbaf61ad 4100 ehtab = elf_hash_table (info);
35c08157 4101 htab = nds32_elf_hash_table (info);
fbaf61ad 4102 if (htab == NULL)
0a1b45a2 4103 return false;
35c08157 4104
fbaf61ad
NC		 4105 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
4106 && h->plt.refcount > 0
4107 && !(bfd_link_pie (info) && h->def_regular))
35c08157
KLC		 4108 {
4109 /* Make sure this symbol is output as a dynamic symbol.
4110 Undefined weak syms won't yet be marked as dynamic. */
4111 if (h->dynindx == -1 && !h->forced_local)
4112 {
4113 if (!bfd_elf_link_record_dynamic_symbol (info, h))
0a1b45a2 4114 return false;
35c08157
KLC		 4115 }
4116
0e1862bb 4117 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
35c08157 4118 {
fbaf61ad 4119 asection *s = ehtab->splt;
35c08157
KLC		 4120
4121 /* If this is the first .plt entry, make room for the special
4122 first entry. */
4123 if (s->size == 0)
4124 s->size += PLT_ENTRY_SIZE;
4125
4126 h->plt.offset = s->size;
4127
4128 /* If this symbol is not defined in a regular file, and we are
4129 not generating a shared library, then set the symbol to this
4130 location in the .plt. This is required to make function
4131 pointers compare as equal between the normal executable and
4132 the shared library. */
0e1862bb 4133 if (!bfd_link_pic (info) && !h->def_regular)
35c08157
KLC		 4134 {
4135 h->root.u.def.section = s;
4136 h->root.u.def.value = h->plt.offset;
4137 }
4138
4139 /* Make room for this entry. */
4140 s->size += PLT_ENTRY_SIZE;
4141
4142 /* We also need to make an entry in the .got.plt section, which
4143 will be placed in the .got section by the linker script. */
fbaf61ad 4144 ehtab->sgotplt->size += 4;
35c08157
KLC		 4145
4146 /* We also need to make an entry in the .rel.plt section. */
fbaf61ad
NC		 4147 ehtab->srelplt->size += sizeof (Elf32_External_Rela);
4148 if (htab->tls_desc_trampoline)
4149 htab->next_tls_desc_index++;
35c08157
KLC		 4150 }
4151 else
4152 {
4153 h->plt.offset = (bfd_vma) - 1;
4154 h->needs_plt = 0;
4155 }
4156 }
4157 else
4158 {
4159 h->plt.offset = (bfd_vma) - 1;
4160 h->needs_plt = 0;
4161 }
4162
4163 if (h->got.refcount > 0)
4164 {
fbaf61ad 4165 asection *sgot;
0a1b45a2 4166 bool dyn;
1c8f6a4d 4167 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
35c08157
KLC		 4168
4169 /* Make sure this symbol is output as a dynamic symbol.
4170 Undefined weak syms won't yet be marked as dynamic. */
4171 if (h->dynindx == -1 && !h->forced_local)
4172 {
4173 if (!bfd_elf_link_record_dynamic_symbol (info, h))
0a1b45a2 4174 return false;
35c08157
KLC		 4175 }
4176
fbaf61ad
NC		 4177 sgot = elf_hash_table (info)->sgot;
4178 h->got.offset = sgot->size;
1c8f6a4d
KLC		 4179
4180 if (tls_type == GOT_UNKNOWN)
4181 abort ();
fbaf61ad
NC		 4182
4183 /* Non-TLS symbols, and TLS_IE need one GOT slot. */
4184 if (tls_type & (GOT_NORMAL | GOT_TLS_IE | GOT_TLS_IEGP))
4185 sgot->size += 4;
4186 else
4187 {
4188 /* TLS_DESC, TLS_GD, and TLS_LD need 2 consecutive GOT slots. */
4189 if (tls_type & GOT_TLS_DESC)
4190 sgot->size += 8;
4191 }
1c8f6a4d 4192
35c08157 4193 dyn = htab->root.dynamic_sections_created;
fbaf61ad 4194
0e1862bb 4195 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
fbaf61ad
NC		 4196 {
4197 if (tls_type == GOT_TLS_DESC && htab->tls_desc_trampoline)
4198 {
4199 /* TLS_DESC with trampoline needs a relocation slot
4200 within .rela.plt. */
4201 htab->num_tls_desc++;
4202 ehtab->srelplt->size += sizeof (Elf32_External_Rela);
4203 htab->tls_trampoline = -1;
4204 }
4205 else
4206 {
4207 /* other relocations, including TLS_DESC without trampoline, need
4208 a relocation slot within .rela.got. */
4209 ehtab->srelgot->size += sizeof (Elf32_External_Rela);
4210 }
4211 }
35c08157
KLC		 4212 }
4213 else
fbaf61ad 4214 h->got.offset = (bfd_vma)-1;
35c08157 4215
190eb1dd 4216 if (h->dyn_relocs == NULL)
0a1b45a2 4217 return true;
35c08157
KLC		 4218
4219 /* In the shared -Bsymbolic case, discard space allocated for
4220 dynamic pc-relative relocs against symbols which turn out to be
4221 defined in regular objects. For the normal shared case, discard
4222 space for pc-relative relocs that have become local due to symbol
4223 visibility changes. */
4224
0e1862bb 4225 if (bfd_link_pic (info))
35c08157
KLC		 4226 {
4227 if (h->def_regular && (h->forced_local || info->symbolic))
4228 {
3bf083ed 4229 struct elf_dyn_relocs **pp;
35c08157 4230
190eb1dd 4231 for (pp = &h->dyn_relocs; (p = *pp) != NULL;)
35c08157
KLC		 4232 {
4233 p->count -= p->pc_count;
4234 p->pc_count = 0;
4235 if (p->count == 0)
4236 *pp = p->next;
4237 else
4238 pp = &p->next;
4239 }
4240 }
4241 }
4242 else
4243 {
4244 /* For the non-shared case, discard space for relocs against
4245 symbols which turn out to need copy relocs or are not dynamic. */
4246
4247 if (!h->non_got_ref
4248 && ((h->def_dynamic
4249 && !h->def_regular)
4250 || (htab->root.dynamic_sections_created
4251 && (h->root.type == bfd_link_hash_undefweak
4252 || h->root.type == bfd_link_hash_undefined))))
4253 {
4254 /* Make sure this symbol is output as a dynamic symbol.
4255 Undefined weak syms won't yet be marked as dynamic. */
4256 if (h->dynindx == -1 && !h->forced_local)
4257 {
4258 if (!bfd_elf_link_record_dynamic_symbol (info, h))
0a1b45a2 4259 return false;
35c08157
KLC		 4260 }
4261
4262 /* If that succeeded, we know we'll be keeping all the
4263 relocs. */
4264 if (h->dynindx != -1)
4265 goto keep;
4266 }
4267
190eb1dd 4268 h->dyn_relocs = NULL;
35c08157 4269
dc1e8a47 4270 keep:;
35c08157
KLC		 4271 }
4272
4273 /* Finally, allocate space. */
190eb1dd 4274 for (p = h->dyn_relocs; p != NULL; p = p->next)
35c08157
KLC		 4275 {
4276 asection *sreloc = elf_section_data (p->sec)->sreloc;
4277 sreloc->size += p->count * sizeof (Elf32_External_Rela);
4278 }
4279
0a1b45a2 4280 return true;
35c08157
KLC		 4281}
4282
fbaf61ad
NC		 4283/* Add relocation REL to the end of relocation section SRELOC. */
4284
4285static void
4286elf32_nds32_add_dynreloc (bfd *output_bfd,
4287 struct bfd_link_info *info ATTRIBUTE_UNUSED,
4288 asection *sreloc, Elf_Internal_Rela *rel)
4289{
4290 bfd_byte *loc;
4291 if (sreloc == NULL)
4292 abort ();
4293
4294 loc = sreloc->contents;
4295 loc += sreloc->reloc_count++ * sizeof (Elf32_External_Rela);
4296 if (sreloc->reloc_count * sizeof (Elf32_External_Rela) > sreloc->size)
4297 abort ();
4298
4299 bfd_elf32_swap_reloca_out (output_bfd, rel, loc);
4300}
4301
35c08157
KLC		 4302/* Set the sizes of the dynamic sections. */
4303
0a1b45a2 4304static bool
af969b14
AM		 4305nds32_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
4306 struct bfd_link_info *info)
35c08157
KLC		 4307{
4308 struct elf_nds32_link_hash_table *htab;
4309 bfd *dynobj;
4310 asection *s;
0a1b45a2 4311 bool relocs;
35c08157
KLC		 4312 bfd *ibfd;
4313
4314 htab = nds32_elf_hash_table (info);
fbaf61ad 4315 if (htab == NULL)
0a1b45a2 4316 return false;
fbaf61ad
NC		 4317
4318 dynobj = elf_hash_table (info)->dynobj;
af969b14
AM		 4319 if (dynobj == NULL)
4320 return true;
35c08157 4321
fbaf61ad 4322 if (elf_hash_table (info)->dynamic_sections_created)
35c08157
KLC		 4323 {
4324 /* Set the contents of the .interp section to the interpreter. */
f5233a16 4325 if (bfd_link_executable (info) && !info->nointerp)
35c08157
KLC		 4326 {
4327 s = bfd_get_section_by_name (dynobj, ".interp");
4328 BFD_ASSERT (s != NULL);
4329 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
4330 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
4331 }
4332 }
4333
4334 /* Set up .got offsets for local syms, and space for local dynamic
4335 relocs. */
c72f2fb2 4336 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
35c08157
KLC		 4337 {
4338 bfd_signed_vma *local_got;
4339 bfd_signed_vma *end_local_got;
4340 bfd_size_type locsymcount;
4341 Elf_Internal_Shdr *symtab_hdr;
fbaf61ad
NC		 4342 asection *sgot;
4343 char *local_tls_type;
4344 unsigned long symndx;
4345 bfd_vma *local_tlsdesc_gotent;
35c08157
KLC		 4346
4347 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
4348 continue;
4349
4350 for (s = ibfd->sections; s != NULL; s = s->next)
4351 {
3bf083ed 4352 struct elf_dyn_relocs *p;
35c08157 4353
3bf083ed 4354 for (p = ((struct elf_dyn_relocs *)
35c08157
KLC		 4355 elf_section_data (s)->local_dynrel);
4356 p != NULL; p = p->next)
4357 {
4358 if (!bfd_is_abs_section (p->sec)
4359 && bfd_is_abs_section (p->sec->output_section))
4360 {
4361 /* Input section has been discarded, either because
4362 it is a copy of a linkonce section or due to
4363 linker script /DISCARD/, so we'll be discarding
4364 the relocs too. */
4365 }
4366 else if (p->count != 0)
4367 {
fbaf61ad
NC		 4368 asection *sreloc = elf_section_data (p->sec)->sreloc;
4369 sreloc->size += p->count * sizeof (Elf32_External_Rela);
35c08157
KLC		 4370 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
4371 info->flags |= DF_TEXTREL;
4372 }
4373 }
4374 }
4375
4376 local_got = elf_local_got_refcounts (ibfd);
4377 if (!local_got)
4378 continue;
4379
4380 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
4381 locsymcount = symtab_hdr->sh_info;
4382 end_local_got = local_got + locsymcount;
fbaf61ad
NC		 4383 sgot = elf_hash_table (info)->sgot;
4384 local_tls_type = elf32_nds32_local_got_tls_type (ibfd);
4385 local_tlsdesc_gotent = elf32_nds32_local_tlsdesc_gotent (ibfd);
4386 for (symndx = 0; local_got < end_local_got;
4387 ++local_got, ++local_tls_type, ++local_tlsdesc_gotent, ++symndx)
35c08157
KLC		 4388 {
4389 if (*local_got > 0)
4390 {
fbaf61ad
NC		 4391 int num_of_got_entry_needed = 0;
4392 *local_got = sgot->size;
4393 *local_tlsdesc_gotent = sgot->size;
4394
4395 /* TLS_NORMAL, and TLS_IE need one slot in .got. */
4396 if (*local_tls_type & (GOT_NORMAL | GOT_TLS_IE | GOT_TLS_IEGP))
4397 num_of_got_entry_needed = 1;
4398 /* TLS_GD, TLS_LD, and TLS_DESC need an 8-byte structure in the GOT. */
4399 else if (*local_tls_type & GOT_TLS_DESC)
4400 num_of_got_entry_needed = 2;
4401
4402 sgot->size += (num_of_got_entry_needed << 2);
4403
4404 /* non-relax-able TLS_DESCs need a slot in .rela.plt.
4405 others need a slot in .rela.got. */
4406 if (*local_tls_type == GOT_TLS_DESC)
4407 {
4408 if (bfd_link_pic (info))
4409 {
4410 if (htab->tls_desc_trampoline)
4411 {
4412 htab->num_tls_desc++;
4413 htab->root.srelplt->size += sizeof (Elf32_External_Rela);
4414 htab->tls_trampoline = -1;
4415 }
4416 else
4417 htab->root.srelgot->size += sizeof (Elf32_External_Rela);
4418 }
4419 else
4420 {
4421 /* TLS_DESC -> TLS_LE */
4422 }
4423 }
4424 else
4425 {
4426 htab->root.srelgot->size += sizeof (Elf32_External_Rela);
4427 }
35c08157
KLC		 4428 }
4429 else
fbaf61ad
NC		 4430 {
4431 *local_got = (bfd_vma) -1;
4432 *local_tlsdesc_gotent = (bfd_vma) -1;
4433 }
35c08157
KLC		 4434 }
4435 }
4436
4437 /* Allocate global sym .plt and .got entries, and space for global
4438 sym dynamic relocs. */
4439 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
4440
fbaf61ad
NC		 4441 /* For every jump slot reserved in the sgotplt, reloc_count is
4442 incremented. However, when we reserve space for TLS descriptors,
4443 it's not incremented, so in order to compute the space reserved
4444 for them, it suffices to multiply the reloc count by the jump
4445 slot size. */
4446 if (htab->tls_desc_trampoline && htab->root.srelplt)
4447 htab->sgotplt_jump_table_size = elf32_nds32_compute_jump_table_size (htab);
4448
4449 if (htab->tls_trampoline)
4450 {
4451 htab->tls_trampoline = htab->root.splt->size;
4452
4453 /* If we're not using lazy TLS relocations, don't generate the
4454 PLT and GOT entries they require. */
9bcc30e4
L		 4455 if ((info->flags & DF_BIND_NOW))
4456 htab->root.tlsdesc_plt = 0;
4457 else
fbaf61ad 4458 {
9bcc30e4 4459 htab->root.tlsdesc_got = htab->root.sgot->size;
fbaf61ad
NC		 4460 htab->root.sgot->size += 4;
4461
9bcc30e4 4462 htab->root.tlsdesc_plt = htab->root.splt->size;
fbaf61ad
NC		 4463 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
4464 }
4465 }
4466
35c08157
KLC		 4467 /* We now have determined the sizes of the various dynamic sections.
4468 Allocate memory for them. */
fbaf61ad
NC		 4469 /* The check_relocs and adjust_dynamic_symbol entry points have
4470 determined the sizes of the various dynamic sections. Allocate
4471 memory for them. */
0a1b45a2 4472 relocs = false;
35c08157
KLC		 4473 for (s = dynobj->sections; s != NULL; s = s->next)
4474 {
4475 if ((s->flags & SEC_LINKER_CREATED) == 0)
4476 continue;
4477
ce558b89 4478 if (s == htab->root.splt)
35c08157
KLC		 4479 {
4480 /* Strip this section if we don't need it; see the
4481 comment below. */
3084d7a2 4482 ;
35c08157 4483 }
fbaf61ad 4484 else if (s == elf_hash_table (info)->sgot)
35c08157
KLC		 4485 {
4486 got_size += s->size;
4487 }
fbaf61ad 4488 else if (s == elf_hash_table (info)->sgotplt)
35c08157
KLC		 4489 {
4490 got_size += s->size;
4491 }
3f3328b8 4492 else if (startswith (bfd_section_name (s), ".rela"))
35c08157 4493 {
fbaf61ad 4494 if (s->size != 0 && s != elf_hash_table (info)->srelplt)
0a1b45a2 4495 relocs = true;
35c08157
KLC		 4496
4497 /* We use the reloc_count field as a counter if we need
4498 to copy relocs into the output file. */
4499 s->reloc_count = 0;
4500 }
4501 else
4502 {
4503 /* It's not one of our sections, so don't allocate space. */
4504 continue;
4505 }
4506
4507 if (s->size == 0)
4508 {
4509 /* If we don't need this section, strip it from the
4510 output file. This is mostly to handle .rela.bss and
4511 .rela.plt. We must create both sections in
4512 create_dynamic_sections, because they must be created
4513 before the linker maps input sections to output
4514 sections. The linker does that before
4515 adjust_dynamic_symbol is called, and it is that
4516 function which decides whether anything needs to go
4517 into these sections. */
4518 s->flags |= SEC_EXCLUDE;
4519 continue;
4520 }
4521
4522 /* Allocate memory for the section contents. We use bfd_zalloc
4523 here in case unused entries are not reclaimed before the
4524 section's contents are written out. This should not happen,
4525 but this way if it does, we get a R_NDS32_NONE reloc instead
4526 of garbage. */
4527 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4528 if (s->contents == NULL)
0a1b45a2 4529 return false;
35c08157
KLC		 4530 }
4531
3084d7a2 4532 return _bfd_elf_add_dynamic_tags (output_bfd, info, relocs);
35c08157
KLC		 4533}
4534
4535static bfd_reloc_status_type
4536nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4537 bfd_vma relocation, bfd_byte *location)
4538{
4539 int size;
4540 bfd_vma x = 0;
4541 bfd_reloc_status_type flag;
4542 unsigned int rightshift = howto->rightshift;
4543 unsigned int bitpos = howto->bitpos;
4544
fde0214a 4545 if (howto->negate)
35c08157
KLC		 4546 relocation = -relocation;
4547
4548 /* Get the value we are going to relocate. */
4549 size = bfd_get_reloc_size (howto);
4550 switch (size)
4551 {
4552 default:
35c08157
KLC		 4553 abort ();
4554 break;
6346d5ca
AM		 4555 case 0:
4556 return bfd_reloc_ok;
35c08157
KLC		 4557 case 2:
4558 x = bfd_getb16 (location);
4559 break;
4560 case 4:
4561 x = bfd_getb32 (location);
4562 break;
4563 }
4564
4565 /* Check for overflow. FIXME: We may drop bits during the addition
4566 which we don't check for. We must either check at every single
4567 operation, which would be tedious, or we must do the computations
4568 in a type larger than bfd_vma, which would be inefficient. */
4569 flag = bfd_reloc_ok;
4570 if (howto->complain_on_overflow != complain_overflow_dont)
4571 {
4572 bfd_vma addrmask, fieldmask, signmask, ss;
4573 bfd_vma a, b, sum;
4574
4575 /* Get the values to be added together. For signed and unsigned
4576 relocations, we assume that all values should be truncated to
4577 the size of an address. For bitfields, all the bits matter.
4578 See also bfd_check_overflow. */
4579 fieldmask = N_ONES (howto->bitsize);
4580 signmask = ~fieldmask;
4581 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4582 a = (relocation & addrmask) >> rightshift;
4583 b = (x & howto->src_mask & addrmask) >> bitpos;
4584
4585 switch (howto->complain_on_overflow)
4586 {
4587 case complain_overflow_signed:
4588 /* If any sign bits are set, all sign bits must be set.
4589 That is, A must be a valid negative address after
4590 shifting. */
4591 signmask = ~(fieldmask >> 1);
4592 /* Fall through. */
4593
4594 case complain_overflow_bitfield:
4595 /* Much like the signed check, but for a field one bit
4596 wider. We allow a bitfield to represent numbers in the
4597 range -2**n to 2**n-1, where n is the number of bits in the
4598 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4599 can't overflow, which is exactly what we want. */
4600 ss = a & signmask;
4601 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4602 flag = bfd_reloc_overflow;
4603
4604 /* We only need this next bit of code if the sign bit of B
4605 is below the sign bit of A. This would only happen if
4606 SRC_MASK had fewer bits than BITSIZE. Note that if
4607 SRC_MASK has more bits than BITSIZE, we can get into
4608 trouble; we would need to verify that B is in range, as
4609 we do for A above. */
4610 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4611 ss >>= bitpos;
4612
4613 /* Set all the bits above the sign bit. */
4614 b = (b ^ ss) - ss;
4615
4616 /* Now we can do the addition. */
4617 sum = a + b;
4618
4619 /* See if the result has the correct sign. Bits above the
4620 sign bit are junk now; ignore them. If the sum is
4621 positive, make sure we did not have all negative inputs;
4622 if the sum is negative, make sure we did not have all
4623 positive inputs. The test below looks only at the sign
4624 bits, and it really just
4625 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4626
4627 We mask with addrmask here to explicitly allow an address
4628 wrap-around. The Linux kernel relies on it, and it is
4629 the only way to write assembler code which can run when
4630 loaded at a location 0x80000000 away from the location at
4631 which it is linked. */
4632 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4633 flag = bfd_reloc_overflow;
4634
4635 break;
4636
4637 case complain_overflow_unsigned:
4638 /* Checking for an unsigned overflow is relatively easy:
4639 trim the addresses and add, and trim the result as well.
4640 Overflow is normally indicated when the result does not
4641 fit in the field. However, we also need to consider the
4642 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4643 input is 0x80000000, and bfd_vma is only 32 bits; then we
4644 will get sum == 0, but there is an overflow, since the
4645 inputs did not fit in the field. Instead of doing a
4646 separate test, we can check for this by or-ing in the
4647 operands when testing for the sum overflowing its final
4648 field. */
4649 sum = (a + b) & addrmask;
4650 if ((a | b | sum) & signmask)
4651 flag = bfd_reloc_overflow;
4652 break;
4653
4654 default:
4655 abort ();
4656 }
4657 }
4658
4659 /* Put RELOCATION in the right bits. */
4660 relocation >>= (bfd_vma) rightshift;
4661 relocation <<= (bfd_vma) bitpos;
4662
4663 /* Add RELOCATION to the right bits of X. */
4664 /* FIXME : 090616
4665 Because the relaxation may generate duplicate relocation at one address,
4666 an addition to immediate in the instruction may cause the relocation added
4667 several times.
4668 This bug should be fixed in assembler, but a check is also needed here. */
4669 if (howto->partial_inplace)
4670 x = ((x & ~howto->dst_mask)
4671 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4672 else
4673 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4674
4675
4676 /* Put the relocated value back in the object file. */
4677 switch (size)
4678 {
4679 default:
4680 case 0:
4681 case 1:
4682 case 8:
4683 abort ();
4684 break;
4685 case 2:
4686 bfd_putb16 (x, location);
4687 break;
4688 case 4:
4689 bfd_putb32 (x, location);
4690 break;
4691 }
4692
4693 return flag;
4694}
4695
4696static bfd_reloc_status_type
4697nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4698 asection *input_section, bfd_byte *contents,
4699 bfd_vma address, bfd_vma value, bfd_vma addend)
4700{
4701 bfd_vma relocation;
4702
4703 /* Sanity check the address. */
4704 if (address > bfd_get_section_limit (input_bfd, input_section))
4705 return bfd_reloc_outofrange;
4706
4707 /* This function assumes that we are dealing with a basic relocation
4708 against a symbol. We want to compute the value of the symbol to
4709 relocate to. This is just VALUE, the value of the symbol, plus
4710 ADDEND, any addend associated with the reloc. */
4711 relocation = value + addend;
4712
4713 /* If the relocation is PC relative, we want to set RELOCATION to
4714 the distance between the symbol (currently in RELOCATION) and the
c2bf1eec 4715 location we are relocating. If pcrel_offset is FALSE we do not
35c08157
KLC		 4716 need to subtract out the offset of the location within the
4717 section (which is just ADDRESS). */
4718 if (howto->pc_relative)
4719 {
4720 relocation -= (input_section->output_section->vma
4721 + input_section->output_offset);
4722 if (howto->pcrel_offset)
4723 relocation -= address;
4724 }
4725
4726 return nds32_relocate_contents (howto, input_bfd, relocation,
4727 contents + address);
4728}
4729
37bb890f 4730static int
35c08157
KLC		 4731nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4732 const char *name,
4733 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4734 asection *input_sec,
4735 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4736{
4737 const char *source;
4738 FILE *sym_ld_script = NULL;
4739 struct elf_nds32_link_hash_table *table;
4740
4741 table = nds32_elf_hash_table (info);
4742 sym_ld_script = table->sym_ld_script;
4743 if (!sym_ld_script)
0a1b45a2 4744 return true;
35c08157
KLC		 4745
4746 if (!h || !name || *name == '\0')
0a1b45a2 4747 return true;
35c08157
KLC		 4748
4749 if (input_sec->flags & SEC_EXCLUDE)
0a1b45a2 4750 return true;
35c08157
KLC		 4751
4752 if (!check_start_export_sym)
4753 {
4754 fprintf (sym_ld_script, "SECTIONS\n{\n");
4755 check_start_export_sym = 1;
4756 }
4757
4758 if (h->root.type == bfd_link_hash_defined
4759 || h->root.type == bfd_link_hash_defweak)
4760 {
4761 if (!h->root.u.def.section->output_section)
0a1b45a2 4762 return true;
35c08157
KLC		 4763
4764 if (bfd_is_const_section (input_sec))
4765 source = input_sec->name;
4766 else
765cf5f6 4767 source = bfd_get_filename (input_sec->owner);
35c08157
KLC		 4768
4769 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4770 h->root.root.string,
4771 (long) (h->root.u.def.value
4772 + h->root.u.def.section->output_section->vma
4773 + h->root.u.def.section->output_offset), source);
4774 }
4775
0a1b45a2 4776 return true;
35c08157
KLC		 4777}
4778
4779/* Relocate an NDS32/D ELF section.
4780 There is some attempt to make this function usable for many architectures,
4781 both for RELA and REL type relocs, if only to serve as a learning tool.
4782
4783 The RELOCATE_SECTION function is called by the new ELF backend linker
4784 to handle the relocations for a section.
4785
4786 The relocs are always passed as Rela structures; if the section
4787 actually uses Rel structures, the r_addend field will always be
4788 zero.
4789
4790 This function is responsible for adjust the section contents as
4791 necessary, and (if using Rela relocs and generating a
4792 relocatable output file) adjusting the reloc addend as
4793 necessary.
4794
4795 This function does not have to worry about setting the reloc
4796 address or the reloc symbol index.
4797
4798 LOCAL_SYMS is a pointer to the swapped in local symbols.
4799
4800 LOCAL_SECTIONS is an array giving the section in the input file
4801 corresponding to the st_shndx field of each local symbol.
4802
4803 The global hash table entry for the global symbols can be found
4804 via elf_sym_hashes (input_bfd).
4805
4806 When generating relocatable output, this function must handle
4807 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4808 going to be the section symbol corresponding to the output
4809 section, which means that the addend must be adjusted
4810 accordingly. */
4811
fbaf61ad
NC		 4812/* Return the base VMA address which should be subtracted from real addresses
4813 when resolving @dtpoff relocation.
4814 This is PT_TLS segment p_vaddr. */
4815
4816/* Return the relocation value for @tpoff relocation
4817 if STT_TLS virtual address is ADDRESS. */
4818
4819/* Return the relocation value for @gottpoff relocation
4820 if STT_TLS virtual address is ADDRESS. */
4821
1c8f6a4d 4822static bfd_vma
fbaf61ad 4823gottpoff (struct bfd_link_info *info, bfd_vma address)
1c8f6a4d 4824{
fbaf61ad
NC		 4825 bfd_vma tp_base;
4826 bfd_vma tp_offset;
4827
1c8f6a4d
KLC		 4828 /* If tls_sec is NULL, we should have signalled an error already. */
4829 if (elf_hash_table (info)->tls_sec == NULL)
4830 return 0;
fbaf61ad
NC		 4831
4832 tp_base = elf_hash_table (info)->tls_sec->vma;
4833 tp_offset = address - tp_base;
4834
4835 return tp_offset;
1c8f6a4d
KLC		 4836}
4837
0a1b45a2 4838static bool
fbaf61ad
NC		 4839patch_tls_desc_to_ie (bfd_byte *contents, Elf_Internal_Rela *rel, bfd *ibfd)
4840{
4841 /* TLS_GD/TLS_LD model #1
4842 46 00 00 00 sethi $r0,#0x0
4843 58 00 00 00 ori $r0,$r0,#0x0
4844 40 00 74 00 add $r0,$r0,$gp
4845 04 10 00 00 lwi $r1,[$r0+#0x0]
4846 4b e0 04 01 jral $lp,$r1 */
4847
4848 /* TLS_GD/TLS_LD model #2
4849 46 00 00 00 sethi $r0,#0x0
4850 58 00 00 00 ori $r0,$r0,#0x0
4851 38 10 74 02 lw $r1,[$r0+($gp<<#0x0)]
4852 40 00 74 00 add $r0,$r0,$gp
4853 4b e0 04 01 jral $lp,$r1 */
4854
4855 /* TLS_IE model (non-PIC)
4856 46 00 00 00 sethi $r0,#0x0
4857 04 00 00 00 lwi $r0,[$r0+#0x0]
4858 38 00 64 02 lw $r0,[$r0+($r25<<#0x0)] */
4859
4860 /* TLS_IE model (PIC)
4861 46 00 00 00 sethi $r0,#0x0
4862 58 00 00 00 ori $r0,$r0,#0x0
4863 38 00 74 02 lw $r0,[$r0+($gp<<#0x0)]
4864 38 00 64 02 lw $r0,[$r0+($r25<<#0x0)] */
4865
4866 /* TLS_GD_TO_IE model
4867 46 00 00 00 sethi $r0,#0x0
4868 58 00 00 00 ori $r0,$r0,#0x0
4869 40 00 74 00 add $r0,$rM,$gp
4870 04 00 00 01 lwi $r0,[$r0+#0x4]
4871 40 00 64 00 add $r0,$r0,$r25 */
4872
0a1b45a2 4873 bool rz = false;
fbaf61ad
NC		 4874
4875 typedef struct
4876 {
4877 uint32_t opcode;
4878 uint32_t mask;
4879 } pat_t;
4880
4881 uint32_t patch[3] =
4882 {
4883 0x40007400, /* add $r0,$rM,$gp */
4884 0x04000001, /* lwi $r0,[$r0+#0x4] */
4885 0x40006400, /* add $r0,$r0,$r25 */
4886 };
4887
4888 pat_t mode0[3] =
4889 {
4890 { 0x40000000, 0xfe0003ff },
4891 { 0x04000000, 0xfe000000 },
4892 { 0x4be00001, 0xffff83ff },
4893 };
4894
4895 pat_t mode1[3] =
4896 {
4897 { 0x38007402, 0xfe007fff },
4898 { 0x40007400, 0xfe007fff },
4899 { 0x4be00001, 0xffff83ff },
4900 };
4901
4902 unsigned char *p = contents + rel->r_offset;
4903
4904 uint32_t insn;
4905 uint32_t regidx = 0;
4906 insn = bfd_getb32 (p);
4907 if (INSN_SETHI == (0xfe0fffffu & insn))
4908 {
4909 regidx = 0x1f & (insn >> 20);
4910 p += 4;
4911 }
4912
4913 insn = bfd_getb32 (p);
4914 if (INSN_ORI == (0xfe007fffu & insn))
4915 {
4916 regidx = 0x1f & (insn >> 20);
4917 p += 4;
4918 }
4919
4920 if (patch[2] == bfd_getb32 (p + 8)) /* Character instruction. */
4921 {
4922 /* already patched? */
4923 if ((patch[0] == (0xfff07fffu & bfd_getb32 (p + 0))) &&
4924 (patch[1] == bfd_getb32 (p + 4)))
0a1b45a2 4925 rz = true;
fbaf61ad
NC		 4926 }
4927 else if (mode0[0].opcode == (mode0[0].mask & bfd_getb32 (p + 0)))
4928 {
4929 if ((mode0[1].opcode == (mode0[1].mask & bfd_getb32 (p + 4))) &&
4930 (mode0[2].opcode == (mode0[2].mask & bfd_getb32 (p + 8))))
4931 {
4932 bfd_putb32 (patch[0] | (regidx << 15), p + 0);
4933 bfd_putb32 (patch[1], p + 4);
4934 bfd_putb32 (patch[2], p + 8);
0a1b45a2 4935 rz = true;
fbaf61ad
NC		 4936 }
4937 }
4938 else if (mode1[0].opcode == (mode1[0].mask & bfd_getb32 (p + 0)))
4939 {
4940 if ((mode1[1].opcode == (mode1[1].mask & bfd_getb32 (p + 4))) &&
4941 (mode1[2].opcode == (mode1[2].mask & bfd_getb32 (p + 8))))
4942 {
4943 bfd_putb32 (patch[0] | (regidx << 15), p + 0);
4944 bfd_putb32 (patch[1], p + 4);
4945 bfd_putb32 (patch[2], p + 8);
0a1b45a2 4946 rz = true;
fbaf61ad
NC		 4947 }
4948 }
4949
4950 if (!rz)
4951 {
765cf5f6 4952 printf ("%s: %s @ 0x%08x\n", __func__, bfd_get_filename (ibfd),
fbaf61ad
NC		 4953 (int) rel->r_offset);
4954 BFD_ASSERT(0); /* Unsupported pattern. */
4955 }
4956
4957 return rz;
4958}
4959
4960static enum elf_nds32_tls_type
4961get_tls_type (enum elf_nds32_reloc_type r_type, struct elf_link_hash_entry *h);
4962
4963static unsigned int
4964ones32 (register unsigned int x)
4965{
4966 /* 32-bit recursive reduction using SWAR...
4967 but first step is mapping 2-bit values
4968 into sum of 2 1-bit values in sneaky way. */
4969 x -= ((x >> 1) & 0x55555555);
4970 x = (((x >> 2) & 0x33333333) + (x & 0x33333333));
4971 x = (((x >> 4) + x) & 0x0f0f0f0f);
4972 x += (x >> 8);
4973 x += (x >> 16);
4974 return (x & 0x0000003f);
4975}
4976
a767a1c4 4977#if !HAVE_FLS
fbaf61ad
NC		 4978static unsigned int
4979fls (register unsigned int x)
4980{
4981 return ffs (x & (-x));
4982}
a767a1c4 4983#endif /* !HAVE_FLS */
fbaf61ad
NC		 4984
4985#define nds32_elf_local_tlsdesc_gotent(bfd) \
4986 (elf_nds32_tdata (bfd)->local_tlsdesc_gotent)
4987
0f684201 4988static int
fbaf61ad
NC		 4989nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
4990 struct bfd_link_info * info,
4991 bfd * input_bfd,
4992 asection * input_section,
4993 bfd_byte * contents,
4994 Elf_Internal_Rela * relocs,
4995 Elf_Internal_Sym * local_syms,
4996 asection ** local_sections)
4997{
4998 Elf_Internal_Shdr *symtab_hdr;
4999 struct elf_link_hash_entry **sym_hashes;
5000 Elf_Internal_Rela *rel, *relend;
0a1b45a2 5001 bool ret = true; /* Assume success. */
fbaf61ad
NC		 5002 int align = 0;
5003 bfd_reloc_status_type r;
5004 const char *errmsg = NULL;
5005 bfd_vma gp;
5006 struct elf_link_hash_table *ehtab;
5007 struct elf_nds32_link_hash_table *htab;
5008 bfd *dynobj;
5009 bfd_vma *local_got_offsets;
5010 asection *sgot, *splt, *sreloc;
5011 bfd_vma high_address;
5012 struct elf_nds32_link_hash_table *table;
5013 int eliminate_gc_relocs;
35c08157
KLC		 5014 bfd_vma fpbase_addr;
5015
5016 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5017 sym_hashes = elf_sym_hashes (input_bfd);
fbaf61ad 5018 ehtab = elf_hash_table (info);
35c08157
KLC		 5019 htab = nds32_elf_hash_table (info);
5020 high_address = bfd_get_section_limit (input_bfd, input_section);
5021
5022 dynobj = htab->root.dynobj;
5023 local_got_offsets = elf_local_got_offsets (input_bfd);
5024
fbaf61ad
NC		 5025 sgot = ehtab->sgot;
5026 splt = ehtab->splt;
35c08157
KLC		 5027 sreloc = NULL;
5028
5029 rel = relocs;
5030 relend = relocs + input_section->reloc_count;
5031
5032 table = nds32_elf_hash_table (info);
5033 eliminate_gc_relocs = table->eliminate_gc_relocs;
fbaf61ad 5034
35c08157 5035 /* By this time, we can adjust the value of _SDA_BASE_. */
fbaf61ad 5036 /* Explain _SDA_BASE_ */
0e1862bb 5037 if ((!bfd_link_relocatable (info)))
35c08157
KLC		 5038 {
5039 is_SDA_BASE_set = 1;
0a1b45a2 5040 r = nds32_elf_final_sda_base (output_bfd, info, &gp, true);
35c08157 5041 if (r != bfd_reloc_ok)
0a1b45a2 5042 return false;
35c08157
KLC		 5043 }
5044
fbaf61ad
NC		 5045 /* Do TLS model conversion once at first. */
5046 nds32_elf_unify_tls_model (input_bfd, input_section, contents, info);
5047
35c08157
KLC		 5048 /* Use gp as fp to prevent truncated fit. Because in relaxation time
5049 the fp value is set as gp, and it has be reverted for instruction
5050 setting fp. */
5051 fpbase_addr = elf_gp (output_bfd);
5052
fbaf61ad 5053 /* Deal with (dynamic) relocations. */
35c08157
KLC		 5054 for (rel = relocs; rel < relend; rel++)
5055 {
5056 enum elf_nds32_reloc_type r_type;
5057 reloc_howto_type *howto = NULL;
5058 unsigned long r_symndx;
5059 struct elf_link_hash_entry *h = NULL;
5060 Elf_Internal_Sym *sym = NULL;
5061 asection *sec;
5062 bfd_vma relocation;
fbaf61ad
NC		 5063 bfd_vma relocation_sym = 0xdeadbeef;
5064 Elf_Internal_Rela *lorel;
5065 bfd_vma off;
35c08157
KLC		 5066
5067 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
5068 ensure it's zero (we use REL relocs, not RELA). Therefore this
5069 should be assigning zero to `addend', but for clarity we use
5070 `r_addend'. */
5071
5072 bfd_vma addend = rel->r_addend;
5073 bfd_vma offset = rel->r_offset;
5074
5075 r_type = ELF32_R_TYPE (rel->r_info);
5076 if (r_type >= R_NDS32_max)
5077 {
695344c0 5078 /* xgettext:c-format */
0aa13fee 5079 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
4eca0228 5080 input_bfd, r_type);
35c08157 5081 bfd_set_error (bfd_error_bad_value);
0a1b45a2 5082 ret = false;
35c08157
KLC		 5083 continue;
5084 }
5085
5086 if (r_type == R_NDS32_GNU_VTENTRY
5087 || r_type == R_NDS32_GNU_VTINHERIT
5088 || r_type == R_NDS32_NONE
5089 || r_type == R_NDS32_RELA_GNU_VTENTRY
5090 || r_type == R_NDS32_RELA_GNU_VTINHERIT
5091 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
5092 || r_type == R_NDS32_DATA
fbaf61ad 5093 || r_type == R_NDS32_TRAN)
35c08157
KLC		 5094 continue;
5095
0c4bd9d9
KLC		 5096 /* If we enter the fp-as-gp region. Resolve the address
5097 of best fp-base. */
35c08157
KLC		 5098 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
5099 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
5100 {
5101 int dist;
5102
5103 /* Distance to relocation of best fp-base is encoded in R_SYM. */
5104 dist = rel->r_addend >> 16;
5105 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
5106 local_syms, symtab_hdr);
5107 }
5108 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
5109 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
5110 {
5111 fpbase_addr = elf_gp (output_bfd);
5112 }
5113
fbaf61ad
NC		 5114 /* Skip the relocations used for relaxation. */
5115 /* We have to update LONGCALL and LONGJUMP
5116 relocations when generating the relocatable files. */
5117 if (!bfd_link_relocatable (info)
5118 && (r_type >= R_NDS32_RELAX_ENTRY
5119 || (r_type >= R_NDS32_LONGCALL4
5120 && r_type <= R_NDS32_LONGJUMP7)))
35c08157
KLC		 5121 continue;
5122
5123 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
5124 r_symndx = ELF32_R_SYM (rel->r_info);
5125
5126 /* This is a final link. */
5127 sym = NULL;
5128 sec = NULL;
5129 h = NULL;
5130
5131 if (r_symndx < symtab_hdr->sh_info)
5132 {
5133 /* Local symbol. */
5134 sym = local_syms + r_symndx;
5135 sec = local_sections[r_symndx];
5136
5137 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
5138 addend = rel->r_addend;
fbaf61ad
NC		 5139
5140 /* keep symbol location for static TLS_IE GOT entry */
5141 relocation_sym = relocation;
5142 if (bfd_link_relocatable (info))
5143 {
5144 /* This is a relocatable link. We don't have to change
5145 anything, unless the reloc is against a section symbol,
5146 in which case we have to adjust according to where the
5147 section symbol winds up in the output section. */
5148 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
5149 rel->r_addend += sec->output_offset + sym->st_value;
5150
5151 continue;
5152 }
35c08157
KLC		 5153 }
5154 else
5155 {
5156 /* External symbol. */
fbaf61ad
NC		 5157 if (bfd_link_relocatable (info))
5158 continue;
0a1b45a2 5159 bool warned, ignored, unresolved_reloc;
35c08157
KLC		 5160 int symndx = r_symndx - symtab_hdr->sh_info;
5161
5162 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
5163 r_symndx, symtab_hdr, sym_hashes, h, sec,
5164 relocation, unresolved_reloc, warned,
5165 ignored);
5166
fbaf61ad
NC		 5167 /* keep symbol location for static TLS_IE GOT entry */
5168 relocation_sym = relocation;
5169
35c08157
KLC		 5170 /* la $fp, _FP_BASE_ is per-function (region).
5171 Handle it specially. */
5172 switch ((int) r_type)
5173 {
fbaf61ad
NC		 5174 case R_NDS32_HI20_RELA:
5175 case R_NDS32_LO12S0_RELA:
5176 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
5177 FP_BASE_NAME) == 0)
5178 {
5179 if (!bfd_link_pie (info))
5180 {
5181 _bfd_error_handler
5182 ("%pB: warning: _FP_BASE_ setting insns relaxation failed.",
5183 input_bfd);
5184 }
5185 relocation = fpbase_addr;
5186 }
5187 break;
35c08157
KLC		 5188 case R_NDS32_SDA19S0_RELA:
5189 case R_NDS32_SDA15S0_RELA:
5190 case R_NDS32_20_RELA:
5191 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
5192 FP_BASE_NAME) == 0)
5193 {
5194 relocation = fpbase_addr;
5195 break;
5196 }
5197 }
35c08157
KLC		 5198 }
5199
5200 /* Sanity check the address. */
5201 if (offset > high_address)
5202 {
5203 r = bfd_reloc_outofrange;
5204 goto check_reloc;
5205 }
5206
fbaf61ad 5207 if (r_type >= R_NDS32_RELAX_ENTRY)
35c08157
KLC		 5208 continue;
5209
5210 switch ((int) r_type)
5211 {
5212 case R_NDS32_GOTOFF:
5213 /* Relocation is relative to the start of the global offset
5214 table (for ld24 rx, #uimm24), e.g. access at label+addend
5215
5216 ld24 rx. #label@GOTOFF + addend
5217 sub rx, r12. */
5218 case R_NDS32_GOTOFF_HI20:
5219 case R_NDS32_GOTOFF_LO12:
5220 case R_NDS32_GOTOFF_LO15:
5221 case R_NDS32_GOTOFF_LO19:
5222 BFD_ASSERT (sgot != NULL);
5223
5224 relocation -= elf_gp (output_bfd);
5225 break;
5226
5227 case R_NDS32_9_PLTREL:
5228 case R_NDS32_25_PLTREL:
5229 /* Relocation is to the entry for this symbol in the
5230 procedure linkage table. */
5231
5232 /* The native assembler will generate a 25_PLTREL reloc
5233 for a local symbol if you assemble a call from one
5234 section to another when using -K pic. */
5235 if (h == NULL)
5236 break;
5237
5238 if (h->forced_local)
5239 break;
5240
5241 /* We didn't make a PLT entry for this symbol. This
5242 happens when statically linking PIC code, or when
5243 using -Bsymbolic. */
5244 if (h->plt.offset == (bfd_vma) - 1)
5245 break;
5246
5247 relocation = (splt->output_section->vma
5248 + splt->output_offset + h->plt.offset);
5249 break;
5250
5251 case R_NDS32_PLT_GOTREL_HI20:
5252 case R_NDS32_PLT_GOTREL_LO12:
5253 case R_NDS32_PLT_GOTREL_LO15:
5254 case R_NDS32_PLT_GOTREL_LO19:
5255 case R_NDS32_PLT_GOTREL_LO20:
fbaf61ad
NC		 5256 if (h == NULL
5257 || h->forced_local
5258 || h->plt.offset == (bfd_vma) -1
5259 || (bfd_link_pie (info) && h->def_regular))
35c08157 5260 {
fbaf61ad
NC		 5261 /* Maybe we should find better checking to optimize
5262 PIE PLT relocations. */
35c08157
KLC		 5263 /* We didn't make a PLT entry for this symbol. This
5264 happens when statically linking PIC code, or when
5265 using -Bsymbolic. */
fbaf61ad
NC		 5266 if (h)
5267 h->plt.offset = (bfd_vma) -1; /* Cancel PLT trampoline. */
35c08157
KLC		 5268 relocation -= elf_gp (output_bfd);
5269 break;
5270 }
5271
5272 relocation = (splt->output_section->vma
5273 + splt->output_offset + h->plt.offset);
5274
5275 relocation -= elf_gp (output_bfd);
5276 break;
5277
5278 case R_NDS32_PLTREL_HI20:
5279 case R_NDS32_PLTREL_LO12:
5280
5281 /* Relocation is to the entry for this symbol in the
5282 procedure linkage table. */
5283
5284 /* The native assembler will generate a 25_PLTREL reloc
5285 for a local symbol if you assemble a call from one
5286 section to another when using -K pic. */
5287 if (h == NULL)
5288 break;
5289
5290 if (h->forced_local)
5291 break;
5292
5293 if (h->plt.offset == (bfd_vma) - 1)
5294 /* We didn't make a PLT entry for this symbol. This
5295 happens when statically linking PIC code, or when
5296 using -Bsymbolic. */
5297 break;
5298
5299 if (splt == NULL)
5300 break;
5301
5302 relocation = (splt->output_section->vma
5303 + splt->output_offset
5304 + h->plt.offset + 4)
5305 - (input_section->output_section->vma
5306 + input_section->output_offset
5307 + rel->r_offset);
5308
5309 break;
5310
5311 case R_NDS32_GOTPC20:
5312 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
5313 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
5314 relocation = elf_gp (output_bfd);
5315 break;
5316
5317 case R_NDS32_GOTPC_HI20:
5318 case R_NDS32_GOTPC_LO12:
fbaf61ad
NC		 5319 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
5320 bl .+4
5321 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
5322 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
5323 or
5324 bl .+4
5325 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
5326 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4) */
5327 relocation = elf_gp (output_bfd);
5328 relocation -= (input_section->output_section->vma
5329 + input_section->output_offset + rel->r_offset);
5330 break;
35c08157
KLC		 5331
5332 case R_NDS32_GOT20:
5333 /* Fall through. */
5334 case R_NDS32_GOT_HI20:
5335 case R_NDS32_GOT_LO12:
5336 case R_NDS32_GOT_LO15:
5337 case R_NDS32_GOT_LO19:
5338 /* Relocation is to the entry for this symbol in the global
5339 offset table. */
5340 BFD_ASSERT (sgot != NULL);
5341
5342 if (h != NULL)
5343 {
fbaf61ad 5344 /* External symbol */
0a1b45a2 5345 bool dyn;
35c08157
KLC		 5346
5347 off = h->got.offset;
5348 BFD_ASSERT (off != (bfd_vma) - 1);
5349 dyn = htab->root.dynamic_sections_created;
0e1862bb
L		 5350 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
5351 bfd_link_pic (info),
5352 h)
5353 || (bfd_link_pic (info)
35c08157
KLC		 5354 && (info->symbolic
5355 || h->dynindx == -1
5356 || h->forced_local) && h->def_regular))
5357 {
5358 /* This is actually a static link, or it is a
5359 -Bsymbolic link and the symbol is defined
5360 locally, or the symbol was forced to be local
5361 because of a version file. We must initialize
5362 this entry in the global offset table. Since the
5363 offset must always be a multiple of 4, we use the
5364 least significant bit to record whether we have
5365 initialized it already.
5366
5367 When doing a dynamic link, we create a .rela.got
5368 relocation entry to initialize the value. This
5369 is done in the finish_dynamic_symbol routine. */
fbaf61ad 5370 if ((off & 1) != 0) /* clear LSB */
35c08157
KLC		 5371 off &= ~1;
5372 else
5373 {
5374 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5375 h->got.offset |= 1;
5376 }
5377 }
5378 relocation = sgot->output_section->vma + sgot->output_offset + off
5379 - elf_gp (output_bfd);
5380 }
5381 else
5382 {
fbaf61ad 5383 /* Local symbol */
35c08157
KLC		 5384 bfd_byte *loc;
5385
5386 BFD_ASSERT (local_got_offsets != NULL
5387 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5388
5389 off = local_got_offsets[r_symndx];
5390
5391 /* The offset must always be a multiple of 4. We use
5392 the least significant bit to record whether we have
5393 already processed this entry. */
fbaf61ad 5394 if ((off & 1) != 0) /* clear LSB */
35c08157
KLC		 5395 off &= ~1;
5396 else
5397 {
5398 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5399
0e1862bb 5400 if (bfd_link_pic (info))
35c08157
KLC		 5401 {
5402 asection *srelgot;
5403 Elf_Internal_Rela outrel;
5404
5405 /* We need to generate a R_NDS32_RELATIVE reloc
5406 for the dynamic linker. */
fbaf61ad 5407 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
35c08157
KLC		 5408 BFD_ASSERT (srelgot != NULL);
5409
5410 outrel.r_offset = (elf_gp (output_bfd)
5411 + sgot->output_offset + off);
5412 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5413 outrel.r_addend = relocation;
5414 loc = srelgot->contents;
5415 loc +=
5416 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5417 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5418 ++srelgot->reloc_count;
5419 }
5420 local_got_offsets[r_symndx] |= 1;
5421 }
5422 relocation = sgot->output_section->vma + sgot->output_offset + off
5423 - elf_gp (output_bfd);
5424 }
5425
5426 break;
5427
5428 case R_NDS32_16_RELA:
5429 case R_NDS32_20_RELA:
5430 case R_NDS32_5_RELA:
5431 case R_NDS32_32_RELA:
5432 case R_NDS32_9_PCREL_RELA:
5433 case R_NDS32_WORD_9_PCREL_RELA:
5434 case R_NDS32_10_UPCREL_RELA:
5435 case R_NDS32_15_PCREL_RELA:
5436 case R_NDS32_17_PCREL_RELA:
5437 case R_NDS32_25_PCREL_RELA:
5438 case R_NDS32_HI20_RELA:
5439 case R_NDS32_LO12S3_RELA:
5440 case R_NDS32_LO12S2_RELA:
5441 case R_NDS32_LO12S2_DP_RELA:
5442 case R_NDS32_LO12S2_SP_RELA:
5443 case R_NDS32_LO12S1_RELA:
5444 case R_NDS32_LO12S0_RELA:
5445 case R_NDS32_LO12S0_ORI_RELA:
0e1862bb 5446 if (bfd_link_pic (info) && r_symndx != 0
35c08157
KLC		 5447 && (input_section->flags & SEC_ALLOC) != 0
5448 && (eliminate_gc_relocs == 0
5449 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
5450 && ((r_type != R_NDS32_9_PCREL_RELA
5451 && r_type != R_NDS32_WORD_9_PCREL_RELA
5452 && r_type != R_NDS32_10_UPCREL_RELA
5453 && r_type != R_NDS32_15_PCREL_RELA
5454 && r_type != R_NDS32_17_PCREL_RELA
5455 && r_type != R_NDS32_25_PCREL_RELA
5456 && !(r_type == R_NDS32_32_RELA
5457 && strcmp (input_section->name, ".eh_frame") == 0))
5458 || (h != NULL && h->dynindx != -1
5459 && (!info->symbolic || !h->def_regular))))
5460 {
5461 Elf_Internal_Rela outrel;
0a1b45a2 5462 bool skip, relocate;
35c08157
KLC		 5463 bfd_byte *loc;
5464
5465 /* When generating a shared object, these relocations
5466 are copied into the output file to be resolved at run
5467 time. */
5468
5469 if (sreloc == NULL)
5470 {
5471 const char *name;
5472
5473 name = bfd_elf_string_from_elf_section
5474 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
5475 elf_section_data (input_section)->rela.hdr->sh_name);
5476 if (name == NULL)
0a1b45a2 5477 return false;
35c08157 5478
3f3328b8 5479 BFD_ASSERT (startswith (name, ".rela")
fd361982 5480 && strcmp (bfd_section_name (input_section),
35c08157
KLC		 5481 name + 5) == 0);
5482
5483 sreloc = bfd_get_section_by_name (dynobj, name);
5484 BFD_ASSERT (sreloc != NULL);
5485 }
5486
0a1b45a2
AM		 5487 skip = false;
5488 relocate = false;
35c08157
KLC		 5489
5490 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
5491 info,
5492 input_section,
5493 rel->r_offset);
5494 if (outrel.r_offset == (bfd_vma) - 1)
0a1b45a2 5495 skip = true;
35c08157 5496 else if (outrel.r_offset == (bfd_vma) - 2)
0a1b45a2 5497 skip = true, relocate = true;
35c08157
KLC		 5498 outrel.r_offset += (input_section->output_section->vma
5499 + input_section->output_offset);
5500
5501 if (skip)
5502 memset (&outrel, 0, sizeof outrel);
5503 else if (r_type == R_NDS32_17_PCREL_RELA
5504 || r_type == R_NDS32_15_PCREL_RELA
5505 || r_type == R_NDS32_25_PCREL_RELA)
5506 {
5507 BFD_ASSERT (h != NULL && h->dynindx != -1);
5508 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
5509 outrel.r_addend = rel->r_addend;
5510 }
5511 else
5512 {
5513 /* h->dynindx may be -1 if this symbol was marked to
5514 become local. */
5515 if (h == NULL
5516 || ((info->symbolic || h->dynindx == -1)
fbaf61ad
NC		 5517 && h->def_regular)
5518 || (bfd_link_pie (info) && h->def_regular))
35c08157 5519 {
0a1b45a2 5520 relocate = true;
35c08157
KLC		 5521 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5522 outrel.r_addend = relocation + rel->r_addend;
fbaf61ad
NC		 5523
5524 if (h)
5525 {
5526 h->plt.offset = (bfd_vma) -1; /* cancel PLT trampoline. */
5527
5528 BFD_ASSERT (sgot != NULL);
5529 /* If we did not allocate got entry for the symbol,
5530 we can not fill the nonexistent got entry. */
5531 if (h->got.offset != (bfd_vma) -1
5532 && (h->got.offset & 1) == 0)
5533 {
5534 bfd_put_32 (output_bfd, outrel.r_addend,
5535 sgot->contents + h->got.offset);
5536 }
5537 }
35c08157
KLC		 5538 }
5539 else
5540 {
fbaf61ad
NC		 5541 if (h->dynindx == -1)
5542 {
5543 _bfd_error_handler
acef8081 5544 (_("%pB: relocation %s against `%s' can not be used when "
fbaf61ad
NC		 5545 "making a shared object; recompile with -fPIC"),
5546 input_bfd, nds32_elf_howto_table[r_type].name, h->root.root.string);
5547 bfd_set_error (bfd_error_bad_value);
0a1b45a2 5548 return false;
fbaf61ad
NC		 5549 }
5550
35c08157
KLC		 5551 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
5552 outrel.r_addend = rel->r_addend;
5553 }
5554 }
5555
5556 loc = sreloc->contents;
5557 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
5558 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5559 ++sreloc->reloc_count;
5560
5561 /* If this reloc is against an external symbol, we do
5562 not want to fiddle with the addend. Otherwise, we
5563 need to include the symbol value so that it becomes
5564 an addend for the dynamic reloc. */
5565 if (!relocate)
5566 continue;
5567 }
5568 break;
5569
5570 case R_NDS32_25_ABS_RELA:
0e1862bb 5571 if (bfd_link_pic (info))
35c08157 5572 {
4eca0228 5573 _bfd_error_handler
38f14ab8
AM		 5574 (_("%pB: warning: %s unsupported in shared mode"),
5575 input_bfd, "R_NDS32_25_ABS_RELA");
0a1b45a2 5576 return false;
35c08157
KLC		 5577 }
5578 break;
5579
5580 case R_NDS32_9_PCREL:
5581 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
5582 contents, offset,
5583 sec, relocation, addend);
5584 goto check_reloc;
5585
5586 case R_NDS32_HI20:
fbaf61ad
NC		 5587 /* We allow an arbitrary number of HI20 relocs before the
5588 LO12 reloc. This permits gcc to emit the HI and LO relocs
5589 itself. */
5590 for (lorel = rel + 1;
5591 (lorel < relend
5592 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
5593 continue;
5594 if (lorel < relend
5595 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
5596 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
5597 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
5598 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
35c08157 5599 {
fbaf61ad
NC		 5600 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
5601 contents, relocation + addend);
5602 r = bfd_reloc_ok;
35c08157 5603 }
fbaf61ad
NC		 5604 else
5605 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5606 contents, offset, relocation,
5607 addend);
35c08157
KLC		 5608 goto check_reloc;
5609
5610 case R_NDS32_GOT17S2_RELA:
5611 case R_NDS32_GOT15S2_RELA:
fbaf61ad
NC		 5612 BFD_ASSERT (sgot != NULL);
5613
5614 if (h != NULL)
35c08157 5615 {
0a1b45a2 5616 bool dyn;
35c08157 5617
fbaf61ad
NC		 5618 off = h->got.offset;
5619 BFD_ASSERT (off != (bfd_vma) - 1);
35c08157 5620
fbaf61ad
NC		 5621 dyn = htab->root.dynamic_sections_created;
5622 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
5623 (dyn, bfd_link_pic (info), h)
5624 || (bfd_link_pic (info)
5625 && (info->symbolic
5626 || h->dynindx == -1
5627 || h->forced_local)
5628 && h->def_regular))
35c08157 5629 {
fbaf61ad
NC		 5630 /* This is actually a static link, or it is a
5631 -Bsymbolic link and the symbol is defined
5632 locally, or the symbol was forced to be local
5633 because of a version file. We must initialize
5634 this entry in the global offset table. Since the
5635 offset must always be a multiple of 4, we use the
5636 least significant bit to record whether we have
5637 initialized it already.
5638
5639 When doing a dynamic link, we create a .rela.got
5640 relocation entry to initialize the value. This
5641 is done in the finish_dynamic_symbol routine. */
5642 if ((off & 1) != 0)
5643 off &= ~1;
5644 else
35c08157 5645 {
fbaf61ad
NC		 5646 bfd_put_32 (output_bfd, relocation,
5647 sgot->contents + off);
5648 h->got.offset |= 1;
35c08157
KLC		 5649 }
5650 }
fbaf61ad
NC		 5651 }
5652 else
5653 {
5654 bfd_byte *loc;
35c08157 5655
fbaf61ad
NC		 5656 BFD_ASSERT (local_got_offsets != NULL
5657 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
35c08157 5658
fbaf61ad 5659 off = local_got_offsets[r_symndx];
35c08157 5660
fbaf61ad
NC		 5661 /* The offset must always be a multiple of 4. We use
5662 the least significant bit to record whether we have
5663 already processed this entry. */
5664 if ((off & 1) != 0)
5665 off &= ~1;
5666 else
5667 {
5668 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5669
5670 if (bfd_link_pic (info))
35c08157 5671 {
fbaf61ad
NC		 5672 asection *srelgot;
5673 Elf_Internal_Rela outrel;
35c08157 5674
fbaf61ad
NC		 5675 /* We need to generate a R_NDS32_RELATIVE reloc
5676 for the dynamic linker. */
5677 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
5678 BFD_ASSERT (srelgot != NULL);
5679
5680 outrel.r_offset = (elf_gp (output_bfd)
5681 + sgot->output_offset + off);
5682 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5683 outrel.r_addend = relocation;
5684 loc = srelgot->contents;
5685 loc +=
5686 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5687 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5688 ++srelgot->reloc_count;
35c08157 5689 }
fbaf61ad 5690 local_got_offsets[r_symndx] |= 1;
35c08157 5691 }
35c08157 5692 }
fbaf61ad
NC		 5693 relocation = sgot->output_section->vma + sgot->output_offset + off
5694 - elf_gp (output_bfd);
5695
35c08157
KLC		 5696 if (relocation & align)
5697 {
5698 /* Incorrect alignment. */
4eca0228 5699 _bfd_error_handler
38f14ab8 5700 (_("%pB: warning: unaligned access to GOT entry"), input_bfd);
0a1b45a2 5701 ret = false;
35c08157
KLC		 5702 r = bfd_reloc_dangerous;
5703 goto check_reloc;
5704 }
5705 break;
5706
5707 case R_NDS32_SDA16S3_RELA:
5708 case R_NDS32_SDA15S3_RELA:
5709 case R_NDS32_SDA15S3:
5710 align = 0x7;
5711 goto handle_sda;
5712
5713 case R_NDS32_SDA17S2_RELA:
5714 case R_NDS32_SDA15S2_RELA:
5715 case R_NDS32_SDA12S2_SP_RELA:
5716 case R_NDS32_SDA12S2_DP_RELA:
5717 case R_NDS32_SDA15S2:
5718 case R_NDS32_SDA_FP7U2_RELA:
5719 align = 0x3;
5720 goto handle_sda;
5721
5722 case R_NDS32_SDA18S1_RELA:
5723 case R_NDS32_SDA15S1_RELA:
5724 case R_NDS32_SDA15S1:
5725 align = 0x1;
5726 goto handle_sda;
5727
5728 case R_NDS32_SDA19S0_RELA:
5729 case R_NDS32_SDA15S0_RELA:
5730 case R_NDS32_SDA15S0:
fbaf61ad 5731 align = 0x0;
dc1e8a47 5732 handle_sda:
fbaf61ad 5733 BFD_ASSERT (sec != NULL);
35c08157 5734
fbaf61ad
NC		 5735 /* If the symbol is in the abs section, the out_bfd will be null.
5736 This happens when the relocation has a symbol@GOTOFF. */
0a1b45a2 5737 r = nds32_elf_final_sda_base (output_bfd, info, &gp, false);
fbaf61ad
NC		 5738 if (r != bfd_reloc_ok)
5739 {
5740 _bfd_error_handler
5741 (_("%pB: warning: relocate SDA_BASE failed"), input_bfd);
0a1b45a2 5742 ret = false;
fbaf61ad
NC		 5743 goto check_reloc;
5744 }
35c08157 5745
fbaf61ad
NC		 5746 /* At this point `relocation' contains the object's
5747 address. */
5748 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5749 {
5750 relocation -= fpbase_addr;
5751 }
5752 else
5753 relocation -= gp;
5754 /* Now it contains the offset from _SDA_BASE_. */
35c08157 5755
fbaf61ad 5756 /* Make sure alignment is correct. */
35c08157 5757
fbaf61ad
NC		 5758 if (relocation & align)
5759 {
5760 /* Incorrect alignment. */
5761 _bfd_error_handler
5762 /* xgettext:c-format */
5763 (_("%pB(%pA): warning: unaligned small data access"
5764 " of type %d"),
5765 input_bfd, input_section, r_type);
0a1b45a2 5766 ret = false;
fbaf61ad 5767 goto check_reloc;
35c08157 5768 }
35c08157 5769 break;
fbaf61ad 5770
35c08157
KLC		 5771 case R_NDS32_17IFC_PCREL_RELA:
5772 case R_NDS32_10IFCU_PCREL_RELA:
fbaf61ad 5773 /* Do nothing. */
35c08157
KLC		 5774 break;
5775
1c8f6a4d
KLC		 5776 case R_NDS32_TLS_LE_HI20:
5777 case R_NDS32_TLS_LE_LO12:
5778 case R_NDS32_TLS_LE_20:
5779 case R_NDS32_TLS_LE_15S0:
5780 case R_NDS32_TLS_LE_15S1:
5781 case R_NDS32_TLS_LE_15S2:
fbaf61ad
NC		 5782 /* We do not have garbage collection for got entries.
5783 Therefore, IE to LE may have one empty entry, and DESC to
5784 LE may have two. */
1c8f6a4d
KLC		 5785 if (elf_hash_table (info)->tls_sec != NULL)
5786 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5787 break;
fbaf61ad 5788
1c8f6a4d
KLC		 5789 case R_NDS32_TLS_IE_HI20:
5790 case R_NDS32_TLS_IE_LO12S2:
fbaf61ad
NC		 5791 case R_NDS32_TLS_DESC_HI20:
5792 case R_NDS32_TLS_DESC_LO12:
5793 case R_NDS32_TLS_IE_LO12:
5794 case R_NDS32_TLS_IEGP_HI20:
5795 case R_NDS32_TLS_IEGP_LO12:
5796 case R_NDS32_TLS_IEGP_LO12S2:
1c8f6a4d
KLC		 5797 {
5798 /* Relocation is to the entry for this symbol in the global
5799 offset table. */
fbaf61ad 5800 enum elf_nds32_tls_type tls_type, org_tls_type, eff_tls_type;
1c8f6a4d
KLC		 5801 asection *srelgot;
5802 Elf_Internal_Rela outrel;
1c8f6a4d
KLC		 5803 bfd_byte *loc;
5804 int indx = 0;
5805
fbaf61ad
NC		 5806 eff_tls_type = org_tls_type = get_tls_type (r_type, h);
5807
1c8f6a4d
KLC		 5808 BFD_ASSERT (sgot != NULL);
5809 if (h != NULL)
5810 {
0a1b45a2 5811 bool dyn;
1c8f6a4d
KLC		 5812
5813 off = h->got.offset;
fbaf61ad 5814 BFD_ASSERT (off != (bfd_vma) -1);
1c8f6a4d
KLC		 5815 dyn = htab->root.dynamic_sections_created;
5816 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
0e1862bb
L		 5817 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5818 && (!bfd_link_pic (info)
1c8f6a4d
KLC		 5819 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5820 indx = h->dynindx;
5821 }
5822 else
5823 {
1c8f6a4d
KLC		 5824 BFD_ASSERT (local_got_offsets != NULL
5825 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
1c8f6a4d 5826 off = local_got_offsets[r_symndx];
1c8f6a4d
KLC		 5827 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5828 }
fbaf61ad 5829
1c8f6a4d
KLC		 5830 relocation = sgot->output_section->vma + sgot->output_offset + off;
5831
fbaf61ad
NC		 5832 if (1 < ones32 (tls_type))
5833 {
5834 eff_tls_type = 1 << (fls (tls_type) - 1);
5835 /* TLS model shall be handled in nds32_elf_unify_tls_model (). */
5836
5837 /* TLS model X -> LE is not implement yet!
5838 workaround here! */
5839 if (eff_tls_type == GOT_TLS_LE)
5840 {
5841 eff_tls_type = 1 << (fls (tls_type ^ eff_tls_type) - 1);
5842 }
5843 }
1c8f6a4d
KLC		 5844
5845 /* The offset must always be a multiple of 4. We use
5846 the least significant bit to record whether we have
5847 already processed this entry. */
0a1b45a2 5848 bool need_relocs = false;
fbaf61ad
NC		 5849 srelgot = ehtab->srelgot;
5850 if ((bfd_link_pic (info) || indx != 0)
5851 && (h == NULL || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5852 || h->root.type != bfd_link_hash_undefweak))
5853 {
0a1b45a2 5854 need_relocs = true;
fbaf61ad
NC		 5855 BFD_ASSERT (srelgot != NULL);
5856 }
5857
5858 if (off & 1)
5859 {
5860 off &= ~1;
5861 relocation &= ~1;
5862
5863 if (eff_tls_type & GOT_TLS_DESC)
5864 {
5865 relocation -= elf_gp (output_bfd);
5866 if ((R_NDS32_TLS_DESC_HI20 == r_type) && (!need_relocs))
5867 {
5868 /* TLS model shall be converted. */
5869 BFD_ASSERT(0);
5870 }
5871 }
5872 else if (eff_tls_type & GOT_TLS_IEGP)
5873 {
5874 relocation -= elf_gp (output_bfd);
5875 }
5876 }
1c8f6a4d
KLC		 5877 else
5878 {
fbaf61ad 5879 if ((eff_tls_type & GOT_TLS_LE) && (tls_type ^ eff_tls_type))
1c8f6a4d 5880 {
fbaf61ad
NC		 5881 /* TLS model workaround shall be applied. */
5882 BFD_ASSERT(0);
1c8f6a4d 5883 }
fbaf61ad 5884 else if (eff_tls_type & (GOT_TLS_IE | GOT_TLS_IEGP))
1c8f6a4d 5885 {
fbaf61ad
NC		 5886 if (eff_tls_type & GOT_TLS_IEGP)
5887 relocation -= elf_gp(output_bfd);
5888
1c8f6a4d
KLC		 5889 if (need_relocs)
5890 {
fbaf61ad
NC		 5891 if (indx == 0)
5892 outrel.r_addend = gottpoff (info, relocation_sym);
1c8f6a4d
KLC		 5893 else
5894 outrel.r_addend = 0;
5895 outrel.r_offset = (sgot->output_section->vma
fbaf61ad
NC		 5896 + sgot->output_offset + off);
5897 outrel.r_info = ELF32_R_INFO (indx, R_NDS32_TLS_TPOFF);
5898
5899 elf32_nds32_add_dynreloc (output_bfd, info, srelgot,
5900 &outrel);
1c8f6a4d
KLC		 5901 }
5902 else
fbaf61ad
NC		 5903 {
5904 bfd_put_32 (output_bfd, gottpoff (info, relocation_sym),
5905 sgot->contents + off);
5906 }
1c8f6a4d 5907 }
fbaf61ad
NC		 5908 else if (eff_tls_type & GOT_TLS_DESC)
5909 {
5910 relocation -= elf_gp (output_bfd);
5911 if (need_relocs)
5912 {
5913 if (indx == 0)
5914 outrel.r_addend = gottpoff (info, relocation_sym);
5915 else
5916 outrel.r_addend = 0;
5917 outrel.r_offset = (sgot->output_section->vma
5918 + sgot->output_offset + off);
5919 outrel.r_info = ELF32_R_INFO (indx, R_NDS32_TLS_DESC);
5920
5921 if (htab->tls_desc_trampoline)
5922 {
5923 asection *srelplt;
5924 srelplt = ehtab->srelplt;
5925 loc = srelplt->contents;
5926 loc += htab->next_tls_desc_index++ * sizeof (Elf32_External_Rela);
5927 BFD_ASSERT (loc + sizeof (Elf32_External_Rela)
5928 <= srelplt->contents + srelplt->size);
5929
5930 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5931 }
5932 else
5933 {
5934 loc = srelgot->contents;
5935 loc += srelgot->reloc_count * sizeof (Elf32_External_Rela);
5936 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5937 ++srelgot->reloc_count;
5938 }
5939 }
5940 else
5941 {
5942 /* feed me! */
5943 bfd_put_32 (output_bfd, 0xdeadbeef,
5944 sgot->contents + off);
5945 bfd_put_32 (output_bfd, gottpoff (info, relocation_sym),
5946 sgot->contents + off + 4);
5947 patch_tls_desc_to_ie (contents, rel, input_bfd);
5948 BFD_ASSERT(0);
5949 }
5950 }
5951 else
5952 {
5953 /* TLS model workaround shall be applied. */
5954 BFD_ASSERT(0);
5955 }
5956
5957 if (h != NULL)
5958 h->got.offset |= 1;
5959 else
5960 local_got_offsets[r_symndx] |= 1;
5961 }
5962 }
5963 break;
5964 /* DON'T fall through. */
5965
5966 default:
5967 /* OLD_NDS32_RELOC. */
5968
5969 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5970 contents, offset, relocation, addend);
5971 goto check_reloc;
5972 }
5973
5974 switch ((int) r_type)
5975 {
35c08157
KLC		 5976 case R_NDS32_20_RELA:
5977 case R_NDS32_5_RELA:
5978 case R_NDS32_9_PCREL_RELA:
5979 case R_NDS32_WORD_9_PCREL_RELA:
5980 case R_NDS32_10_UPCREL_RELA:
5981 case R_NDS32_15_PCREL_RELA:
5982 case R_NDS32_17_PCREL_RELA:
5983 case R_NDS32_25_PCREL_RELA:
5984 case R_NDS32_25_ABS_RELA:
5985 case R_NDS32_HI20_RELA:
5986 case R_NDS32_LO12S3_RELA:
5987 case R_NDS32_LO12S2_RELA:
5988 case R_NDS32_LO12S2_DP_RELA:
5989 case R_NDS32_LO12S2_SP_RELA:
5990 case R_NDS32_LO12S1_RELA:
5991 case R_NDS32_LO12S0_RELA:
5992 case R_NDS32_LO12S0_ORI_RELA:
5993 case R_NDS32_SDA16S3_RELA:
5994 case R_NDS32_SDA17S2_RELA:
5995 case R_NDS32_SDA18S1_RELA:
5996 case R_NDS32_SDA19S0_RELA:
5997 case R_NDS32_SDA15S3_RELA:
5998 case R_NDS32_SDA15S2_RELA:
5999 case R_NDS32_SDA12S2_DP_RELA:
6000 case R_NDS32_SDA12S2_SP_RELA:
6001 case R_NDS32_SDA15S1_RELA:
6002 case R_NDS32_SDA15S0_RELA:
6003 case R_NDS32_SDA_FP7U2_RELA:
6004 case R_NDS32_9_PLTREL:
6005 case R_NDS32_25_PLTREL:
6006 case R_NDS32_GOT20:
6007 case R_NDS32_GOT_HI20:
6008 case R_NDS32_GOT_LO12:
6009 case R_NDS32_GOT_LO15:
6010 case R_NDS32_GOT_LO19:
6011 case R_NDS32_GOT15S2_RELA:
6012 case R_NDS32_GOT17S2_RELA:
6013 case R_NDS32_GOTPC20:
6014 case R_NDS32_GOTPC_HI20:
6015 case R_NDS32_GOTPC_LO12:
6016 case R_NDS32_GOTOFF:
6017 case R_NDS32_GOTOFF_HI20:
6018 case R_NDS32_GOTOFF_LO12:
6019 case R_NDS32_GOTOFF_LO15:
6020 case R_NDS32_GOTOFF_LO19:
6021 case R_NDS32_PLTREL_HI20:
6022 case R_NDS32_PLTREL_LO12:
6023 case R_NDS32_PLT_GOTREL_HI20:
6024 case R_NDS32_PLT_GOTREL_LO12:
6025 case R_NDS32_PLT_GOTREL_LO15:
6026 case R_NDS32_PLT_GOTREL_LO19:
6027 case R_NDS32_PLT_GOTREL_LO20:
6028 case R_NDS32_17IFC_PCREL_RELA:
6029 case R_NDS32_10IFCU_PCREL_RELA:
1c8f6a4d
KLC		 6030 case R_NDS32_TLS_LE_HI20:
6031 case R_NDS32_TLS_LE_LO12:
6032 case R_NDS32_TLS_IE_HI20:
6033 case R_NDS32_TLS_IE_LO12S2:
6034 case R_NDS32_TLS_LE_20:
6035 case R_NDS32_TLS_LE_15S0:
6036 case R_NDS32_TLS_LE_15S1:
6037 case R_NDS32_TLS_LE_15S2:
fbaf61ad
NC		 6038 case R_NDS32_TLS_DESC_HI20:
6039 case R_NDS32_TLS_DESC_LO12:
6040 case R_NDS32_TLS_IE_LO12:
6041 case R_NDS32_TLS_IEGP_HI20:
6042 case R_NDS32_TLS_IEGP_LO12:
6043 case R_NDS32_TLS_IEGP_LO12S2:
35c08157 6044 /* Instruction related relocs must handle endian properly. */
1c8f6a4d 6045 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
35c08157
KLC		 6046 r = nds32_elf_final_link_relocate (howto, input_bfd,
6047 input_section, contents,
6048 rel->r_offset, relocation,
6049 rel->r_addend);
6050 break;
6051
6052 default:
6053 /* All other relocs can use default handler. */
6054 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
6055 contents, rel->r_offset,
6056 relocation, rel->r_addend);
6057 break;
6058 }
6059
dc1e8a47 6060 check_reloc:
35c08157
KLC		 6061
6062 if (r != bfd_reloc_ok)
6063 {
6064 /* FIXME: This should be generic enough to go in a utility. */
6065 const char *name;
6066
6067 if (h != NULL)
6068 name = h->root.root.string;
6069 else
6070 {
6071 name = bfd_elf_string_from_elf_section
6072 (input_bfd, symtab_hdr->sh_link, sym->st_name);
6073 if (name == NULL || *name == '\0')
fd361982 6074 name = bfd_section_name (sec);
35c08157
KLC		 6075 }
6076
6077 if (errmsg != NULL)
6078 goto common_error;
6079
6080 switch (r)
6081 {
6082 case bfd_reloc_overflow:
1a72702b
AM		 6083 (*info->callbacks->reloc_overflow)
6084 (info, (h ? &h->root : NULL), name, howto->name,
6085 (bfd_vma) 0, input_bfd, input_section, offset);
35c08157
KLC		 6086 break;
6087
6088 case bfd_reloc_undefined:
1a72702b 6089 (*info->callbacks->undefined_symbol)
0a1b45a2 6090 (info, name, input_bfd, input_section, offset, true);
35c08157
KLC		 6091 break;
6092
6093 case bfd_reloc_outofrange:
6094 errmsg = _("internal error: out of range error");
6095 goto common_error;
6096
6097 case bfd_reloc_notsupported:
6098 errmsg = _("internal error: unsupported relocation error");
6099 goto common_error;
6100
6101 case bfd_reloc_dangerous:
6102 errmsg = _("internal error: dangerous error");
6103 goto common_error;
6104
6105 default:
6106 errmsg = _("internal error: unknown error");
6107 /* Fall through. */
6108
dc1e8a47 6109 common_error:
1a72702b
AM		 6110 (*info->callbacks->warning) (info, errmsg, name, input_bfd,
6111 input_section, offset);
35c08157
KLC		 6112 break;
6113 }
6114 }
6115 }
6116
fbaf61ad
NC		 6117 /* Resotre header size to avoid overflow load. */
6118 if (elf_nds32_tdata (input_bfd)->hdr_size != 0)
6119 symtab_hdr->sh_size = elf_nds32_tdata (input_bfd)->hdr_size;
6120
35c08157
KLC		 6121 return ret;
6122}
6123
6124/* Finish up dynamic symbol handling. We set the contents of various
6125 dynamic sections here. */
6126
0a1b45a2 6127static bool
35c08157
KLC		 6128nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
6129 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
6130{
fbaf61ad
NC		 6131 struct elf_link_hash_table *ehtab;
6132 struct elf_nds32_link_hash_entry *hent;
35c08157
KLC		 6133 bfd_byte *loc;
6134
fbaf61ad
NC		 6135 ehtab = elf_hash_table (info);
6136 hent = (struct elf_nds32_link_hash_entry *) h;
35c08157
KLC		 6137
6138 if (h->plt.offset != (bfd_vma) - 1)
6139 {
6140 asection *splt;
6141 asection *sgot;
6142 asection *srela;
6143
6144 bfd_vma plt_index;
6145 bfd_vma got_offset;
6146 bfd_vma local_plt_offset;
6147 Elf_Internal_Rela rela;
6148
6149 /* This symbol has an entry in the procedure linkage table. Set
6150 it up. */
6151
6152 BFD_ASSERT (h->dynindx != -1);
6153
fbaf61ad
NC		 6154 splt = ehtab->splt;
6155 sgot = ehtab->sgotplt;
6156 srela = ehtab->srelplt;
35c08157
KLC		 6157 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
6158
6159 /* Get the index in the procedure linkage table which
6160 corresponds to this symbol. This is the index of this symbol
6161 in all the symbols for which we are making plt entries. The
6162 first entry in the procedure linkage table is reserved. */
6163 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
6164
6165 /* Get the offset into the .got table of the entry that
6166 corresponds to this function. Each .got entry is 4 bytes.
6167 The first three are reserved. */
6168 got_offset = (plt_index + 3) * 4;
6169
6170 /* Fill in the entry in the procedure linkage table. */
0e1862bb 6171 if (!bfd_link_pic (info))
35c08157
KLC		 6172 {
6173 unsigned long insn;
6174
6175 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
6176 + sgot->output_offset + got_offset) >> 12)
6177 & 0xfffff);
6178 bfd_putb32 (insn, splt->contents + h->plt.offset);
6179
6180 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
6181 + sgot->output_offset + got_offset) & 0x0fff)
6182 >> 2);
6183 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
6184
6185 insn = PLT_ENTRY_WORD2;
6186 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
6187
6188 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
6189 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
6190
6191 insn = PLT_ENTRY_WORD4
6192 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
6193 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
6194 local_plt_offset = 12;
6195 }
6196 else
6197 {
6198 /* sda_base must be set at this time. */
6199 unsigned long insn;
6200 long offset;
6201
35c08157
KLC		 6202 offset = sgot->output_section->vma + sgot->output_offset + got_offset
6203 - elf_gp (output_bfd);
6204 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
6205 bfd_putb32 (insn, splt->contents + h->plt.offset);
6206
6207 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
6208 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
6209
6210 insn = PLT_PIC_ENTRY_WORD2;
6211 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
6212
6213 insn = PLT_PIC_ENTRY_WORD3;
6214 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
6215
6216 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
6217 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
6218
6219 insn = PLT_PIC_ENTRY_WORD5
6220 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
6221 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
6222
6223 local_plt_offset = 16;
6224 }
6225
6226 /* Fill in the entry in the global offset table,
6227 so it will fall through to the next instruction for the first time. */
6228 bfd_put_32 (output_bfd,
6229 (splt->output_section->vma + splt->output_offset
6230 + h->plt.offset + local_plt_offset),
6231 sgot->contents + got_offset);
6232
6233 /* Fill in the entry in the .rela.plt section. */
6234 rela.r_offset = (sgot->output_section->vma
6235 + sgot->output_offset + got_offset);
6236 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
6237 rela.r_addend = 0;
6238 loc = srela->contents;
6239 loc += plt_index * sizeof (Elf32_External_Rela);
6240 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
6241
6242 if (!h->def_regular)
6243 {
6244 /* Mark the symbol as undefined, rather than as defined in
6245 the .plt section. Leave the value alone. */
6246 sym->st_shndx = SHN_UNDEF;
6247 if (!h->ref_regular_nonweak)
6248 sym->st_value = 0;
6249 }
6250 }
6251
fbaf61ad
NC		 6252 if (h->got.offset != (bfd_vma) - 1
6253 && hent->tls_type == GOT_NORMAL)
35c08157
KLC		 6254 {
6255 asection *sgot;
fbaf61ad 6256 asection *srelagot;
35c08157
KLC		 6257 Elf_Internal_Rela rela;
6258
6259 /* This symbol has an entry in the global offset table.
6260 Set it up. */
6261
fbaf61ad
NC		 6262 sgot = ehtab->sgot;
6263 srelagot = ehtab->srelgot;
6264 BFD_ASSERT (sgot != NULL && srelagot != NULL);
35c08157
KLC		 6265
6266 rela.r_offset = (sgot->output_section->vma
6267 + sgot->output_offset + (h->got.offset & ~1));
6268
6269 /* If this is a -Bsymbolic link, and the symbol is defined
6270 locally, we just want to emit a RELATIVE reloc. Likewise if
6271 the symbol was forced to be local because of a version file.
6272 The entry in the global offset table will already have been
6273 initialized in the relocate_section function. */
fbaf61ad
NC		 6274 if ((bfd_link_pic (info)
6275 && (info->symbolic || h->dynindx == -1 || h->forced_local)
6276 && h->def_regular)
6277 || (bfd_link_pie (info) && h->def_regular))
35c08157
KLC		 6278 {
6279 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
6280 rela.r_addend = (h->root.u.def.value
6281 + h->root.u.def.section->output_section->vma
6282 + h->root.u.def.section->output_offset);
fbaf61ad
NC		 6283
6284 if ((h->got.offset & 1) == 0)
6285 {
6286 bfd_put_32 (output_bfd, rela.r_addend,
6287 sgot->contents + h->got.offset);
6288 }
35c08157
KLC		 6289 }
6290 else
6291 {
6292 BFD_ASSERT ((h->got.offset & 1) == 0);
6293 bfd_put_32 (output_bfd, (bfd_vma) 0,
6294 sgot->contents + h->got.offset);
6295 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
6296 rela.r_addend = 0;
6297 }
6298
fbaf61ad
NC		 6299 loc = srelagot->contents;
6300 loc += srelagot->reloc_count * sizeof (Elf32_External_Rela);
35c08157 6301 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
fbaf61ad
NC		 6302 ++srelagot->reloc_count;
6303 BFD_ASSERT (loc < (srelagot->contents + srelagot->size));
35c08157
KLC		 6304 }
6305
6306 if (h->needs_copy)
6307 {
6308 asection *s;
6309 Elf_Internal_Rela rela;
6310
6311 /* This symbols needs a copy reloc. Set it up. */
6312
6313 BFD_ASSERT (h->dynindx != -1
6314 && (h->root.type == bfd_link_hash_defined
6315 || h->root.type == bfd_link_hash_defweak));
6316
6317 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
6318 BFD_ASSERT (s != NULL);
6319
6320 rela.r_offset = (h->root.u.def.value
6321 + h->root.u.def.section->output_section->vma
6322 + h->root.u.def.section->output_offset);
6323 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
6324 rela.r_addend = 0;
6325 loc = s->contents;
6326 loc += s->reloc_count * sizeof (Elf32_External_Rela);
6327 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
6328 ++s->reloc_count;
6329 }
6330
6331 /* Mark some specially defined symbols as absolute. */
6332 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
6333 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
6334 sym->st_shndx = SHN_ABS;
6335
0a1b45a2 6336 return true;
35c08157
KLC		 6337}
6338
6339
6340/* Finish up the dynamic sections. */
6341
0a1b45a2 6342static bool
35c08157
KLC		 6343nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
6344{
35c08157
KLC		 6345 bfd *dynobj;
6346 asection *sdyn;
fbaf61ad
NC		 6347 asection *sgotplt;
6348 struct elf_link_hash_table *ehtab;
6349 struct elf_nds32_link_hash_table *htab;
35c08157 6350
fbaf61ad 6351 ehtab = elf_hash_table (info);
35c08157 6352 htab = nds32_elf_hash_table (info);
fbaf61ad 6353 if (htab == NULL)
0a1b45a2 6354 return false;
fbaf61ad
NC		 6355
6356 dynobj = elf_hash_table (info)->dynobj;
35c08157 6357
fbaf61ad
NC		 6358 sgotplt = ehtab->sgotplt;
6359 /* A broken linker script might have discarded the dynamic sections.
6360 Catch this here so that we do not seg-fault later on. */
6361 if (sgotplt != NULL && bfd_is_abs_section (sgotplt->output_section))
0a1b45a2 6362 return false;
35c08157
KLC		 6363 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
6364
fbaf61ad 6365 if (elf_hash_table (info)->dynamic_sections_created)
35c08157
KLC		 6366 {
6367 asection *splt;
6368 Elf32_External_Dyn *dyncon, *dynconend;
6369
fbaf61ad 6370 BFD_ASSERT (sgotplt != NULL && sdyn != NULL);
35c08157
KLC		 6371
6372 dyncon = (Elf32_External_Dyn *) sdyn->contents;
6373 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
6374
6375 for (; dyncon < dynconend; dyncon++)
6376 {
6377 Elf_Internal_Dyn dyn;
6378 asection *s;
6379
6380 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
6381
6382 switch (dyn.d_tag)
6383 {
6384 default:
6385 break;
6386
6387 case DT_PLTGOT:
fbaf61ad 6388 /* name = ".got"; */
fb9b7fbf 6389 s = ehtab->sgot;
35c08157
KLC		 6390 goto get_vma;
6391 case DT_JMPREL:
fb9b7fbf 6392 s = ehtab->srelplt;
dc1e8a47 6393 get_vma:
fbaf61ad 6394 BFD_ASSERT (s != NULL);
fb9b7fbf 6395 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
35c08157
KLC		 6396 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
6397 break;
6398
6399 case DT_PLTRELSZ:
fb9b7fbf 6400 s = ehtab->srelplt;
fbaf61ad 6401 BFD_ASSERT (s != NULL);
35c08157
KLC		 6402 dyn.d_un.d_val = s->size;
6403 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
6404 break;
fbaf61ad
NC		 6405
6406 case DT_RELASZ:
6407 /* My reading of the SVR4 ABI indicates that the
6408 procedure linkage table relocs (DT_JMPREL) should be
6409 included in the overall relocs (DT_RELA). This is
6410 what Solaris does. However, UnixWare can not handle
6411 that case. Therefore, we override the DT_RELASZ entry
6412 here to make it not include the JMPREL relocs. Since
6413 the linker script arranges for .rela.plt to follow all
6414 other relocation sections, we don't have to worry
6415 about changing the DT_RELA entry. */
6416 if (ehtab->srelplt != NULL)
6417 {
fb9b7fbf 6418 s = ehtab->srelplt;
fbaf61ad
NC		 6419 dyn.d_un.d_val -= s->size;
6420 }
6421 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
6422 break;
6423
6424 case DT_TLSDESC_PLT:
6425 s = htab->root.splt;
6426 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
9bcc30e4 6427 + htab->root.tlsdesc_plt);
fbaf61ad
NC		 6428 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
6429 break;
6430
6431 case DT_TLSDESC_GOT:
6432 s = htab->root.sgot;
6433 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
9bcc30e4 6434 + htab->root.tlsdesc_got);
fbaf61ad
NC		 6435 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
6436 break;
35c08157
KLC		 6437 }
6438 }
6439
6440 /* Fill in the first entry in the procedure linkage table. */
fbaf61ad 6441 splt = ehtab->splt;
35c08157
KLC		 6442 if (splt && splt->size > 0)
6443 {
0e1862bb 6444 if (bfd_link_pic (info))
35c08157
KLC		 6445 {
6446 unsigned long insn;
6447 long offset;
6448
fbaf61ad
NC		 6449 offset = sgotplt->output_section->vma + sgotplt->output_offset + 4
6450 - elf_gp (output_bfd);
35c08157
KLC		 6451 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
6452 bfd_putb32 (insn, splt->contents);
6453
35c08157
KLC		 6454 /* here has a typo? */
6455 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
6456 bfd_putb32 (insn, splt->contents + 4);
6457
6458 insn = PLT0_PIC_ENTRY_WORD2;
6459 bfd_putb32 (insn, splt->contents + 8);
6460
6461 insn = PLT0_PIC_ENTRY_WORD3;
6462 bfd_putb32 (insn, splt->contents + 12);
6463
6464 insn = PLT0_PIC_ENTRY_WORD4;
6465 bfd_putb32 (insn, splt->contents + 16);
6466
6467 insn = PLT0_PIC_ENTRY_WORD5;
6468 bfd_putb32 (insn, splt->contents + 20);
6469 }
6470 else
6471 {
6472 unsigned long insn;
6473 unsigned long addr;
6474
6475 /* addr = .got + 4 */
fbaf61ad 6476 addr = sgotplt->output_section->vma + sgotplt->output_offset + 4;
35c08157
KLC		 6477 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
6478 bfd_putb32 (insn, splt->contents);
6479
6480 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
6481 bfd_putb32 (insn, splt->contents + 4);
6482
6483 insn = PLT0_ENTRY_WORD2;
6484 bfd_putb32 (insn, splt->contents + 8);
6485
6486 insn = PLT0_ENTRY_WORD3;
6487 bfd_putb32 (insn, splt->contents + 12);
6488
6489 insn = PLT0_ENTRY_WORD4;
6490 bfd_putb32 (insn, splt->contents + 16);
6491 }
6492
6493 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
6494 PLT_ENTRY_SIZE;
6495 }
fbaf61ad 6496
9bcc30e4 6497 if (htab->root.tlsdesc_plt)
fbaf61ad
NC		 6498 {
6499 /* Calculate addresses. */
6500 asection *sgot = sgot = ehtab->sgot;
6501 bfd_vma pltgot = sgotplt->output_section->vma
6502 + sgotplt->output_offset;
6503 bfd_vma tlsdesc_got = sgot->output_section->vma + sgot->output_offset
9bcc30e4 6504 + htab->root.tlsdesc_got;
fbaf61ad
NC		 6505
6506 /* Get GP offset. */
6507 pltgot -= elf_gp (output_bfd) - 4; /* PLTGOT[1] */
6508 tlsdesc_got -= elf_gp (output_bfd);
6509
6510 /* Do relocation. */
6511 dl_tlsdesc_lazy_trampoline[0] += ((1 << 20) - 1) & (tlsdesc_got >> 12);
6512 dl_tlsdesc_lazy_trampoline[1] += 0xfff & tlsdesc_got;
6513 dl_tlsdesc_lazy_trampoline[4] += ((1 << 20) - 1) & (pltgot >> 12);
6514 dl_tlsdesc_lazy_trampoline[5] += 0xfff & pltgot;
6515
6516 /* Insert .plt. */
9bcc30e4 6517 nds32_put_trampoline (splt->contents + htab->root.tlsdesc_plt,
fbaf61ad
NC		 6518 dl_tlsdesc_lazy_trampoline,
6519 ARRAY_SIZE (dl_tlsdesc_lazy_trampoline));
6520 }
35c08157
KLC		 6521 }
6522
6523 /* Fill in the first three entries in the global offset table. */
fbaf61ad 6524 if (sgotplt && sgotplt->size > 0)
35c08157
KLC		 6525 {
6526 if (sdyn == NULL)
fbaf61ad 6527 bfd_put_32 (output_bfd, (bfd_vma) 0, sgotplt->contents);
35c08157
KLC		 6528 else
6529 bfd_put_32 (output_bfd,
6530 sdyn->output_section->vma + sdyn->output_offset,
fbaf61ad
NC		 6531 sgotplt->contents);
6532 bfd_put_32 (output_bfd, (bfd_vma) 0, sgotplt->contents + 4);
6533 bfd_put_32 (output_bfd, (bfd_vma) 0, sgotplt->contents + 8);
35c08157 6534
fbaf61ad 6535 elf_section_data (sgotplt->output_section)->this_hdr.sh_entsize = 4;
35c08157
KLC		 6536 }
6537
0a1b45a2 6538 return true;
35c08157
KLC		 6539}
6540\f
6541
6542/* Set the right machine number. */
6543
0a1b45a2 6544static bool
35c08157
KLC		 6545nds32_elf_object_p (bfd *abfd)
6546{
6547 static unsigned int cur_arch = 0;
6548
6549 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
6550 {
6551 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
6552 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
6553 }
6554
6555 switch (cur_arch)
6556 {
6557 default:
6558 case E_N1_ARCH:
6559 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
6560 break;
6561 case E_N1H_ARCH:
6562 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
6563 break;
6564 case E_NDS_ARCH_STAR_V2_0:
6565 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
6566 break;
6567 case E_NDS_ARCH_STAR_V3_0:
6568 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
6569 break;
6570 case E_NDS_ARCH_STAR_V3_M:
6571 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
6572 break;
6573 }
6574
0a1b45a2 6575 return true;
35c08157
KLC		 6576}
6577
6578/* Store the machine number in the flags field. */
6579
0a1b45a2 6580static bool
cc364be6 6581nds32_elf_final_write_processing (bfd *abfd)
35c08157
KLC		 6582{
6583 unsigned long val;
6584 static unsigned int cur_mach = 0;
6585
6586 if (bfd_mach_n1 != bfd_get_mach (abfd))
6587 {
6588 cur_mach = bfd_get_mach (abfd);
6589 }
6590
6591 switch (cur_mach)
6592 {
6593 case bfd_mach_n1:
6594 /* Only happen when object is empty, since the case is abandon. */
6595 val = E_N1_ARCH;
6596 val |= E_NDS_ABI_AABI;
6597 val |= E_NDS32_ELF_VER_1_4;
6598 break;
6599 case bfd_mach_n1h:
6600 val = E_N1H_ARCH;
6601 break;
6602 case bfd_mach_n1h_v2:
6603 val = E_NDS_ARCH_STAR_V2_0;
6604 break;
6605 case bfd_mach_n1h_v3:
6606 val = E_NDS_ARCH_STAR_V3_0;
6607 break;
6608 case bfd_mach_n1h_v3m:
6609 val = E_NDS_ARCH_STAR_V3_M;
6610 break;
6611 default:
6612 val = 0;
6613 break;
6614 }
6615
6616 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
6617 elf_elfheader (abfd)->e_flags |= val;
cc364be6 6618 return _bfd_elf_final_write_processing (abfd);
35c08157
KLC		 6619}
6620
6621/* Function to keep NDS32 specific file flags. */
6622
0a1b45a2 6623static bool
35c08157
KLC		 6624nds32_elf_set_private_flags (bfd *abfd, flagword flags)
6625{
6626 BFD_ASSERT (!elf_flags_init (abfd)
6627 || elf_elfheader (abfd)->e_flags == flags);
6628
6629 elf_elfheader (abfd)->e_flags = flags;
0a1b45a2
AM		 6630 elf_flags_init (abfd) = true;
6631 return true;
35c08157
KLC		 6632}
6633
6634static unsigned int
6635convert_e_flags (unsigned int e_flags, unsigned int arch)
6636{
6637 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
6638 {
6639 /* From 0.9 to 1.0. */
6640 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
6641
6642 /* Invert E_NDS32_HAS_NO_MAC_INST. */
6643 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
6644 if (arch == E_NDS_ARCH_STAR_V1_0)
6645 {
6646 /* Done. */
6647 return e_flags;
6648 }
6649 }
6650
6651 /* From 1.0 to 2.0. */
6652 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
6653
6654 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
6655 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
6656
6657 /* Invert E_NDS32_HAS_NO_MAC_INST. */
6658 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
6659 return e_flags;
6660}
6661
0a1b45a2 6662static bool
35c08157
KLC		 6663nds32_check_vec_size (bfd *ibfd)
6664{
6665 static unsigned int nds32_vec_size = 0;
6666
6667 asection *sec_t = NULL;
6668 bfd_byte *contents = NULL;
6669
6670 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
6671
6672 if (sec_t && sec_t->size >= 4)
6673 {
6674 /* Get vec_size in file. */
6675 unsigned int flag_t;
6676
0a1b45a2 6677 nds32_get_section_contents (ibfd, sec_t, &contents, true);
35c08157
KLC		 6678 flag_t = bfd_get_32 (ibfd, contents);
6679
6680 /* The value could only be 4 or 16. */
6681
6682 if (!nds32_vec_size)
6683 /* Set if not set yet. */
6684 nds32_vec_size = (flag_t & 0x3);
6685 else if (nds32_vec_size != (flag_t & 0x3))
6686 {
4eca0228 6687 _bfd_error_handler
695344c0 6688 /* xgettext:c-format */
871b3ab2 6689 (_("%pB: ISR vector size mismatch"
4eca0228
AM		 6690 " with previous modules, previous %u-byte, current %u-byte"),
6691 ibfd,
6692 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
6693 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
0a1b45a2 6694 return false;
35c08157
KLC		 6695 }
6696 else
6697 /* Only keep the first vec_size section. */
6698 sec_t->flags |= SEC_EXCLUDE;
6699 }
6700
0a1b45a2 6701 return true;
35c08157
KLC		 6702}
6703
6704/* Merge backend specific data from an object file to the output
6705 object file when linking. */
6706
0a1b45a2 6707static bool
50e03d47 6708nds32_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
35c08157 6709{
50e03d47 6710 bfd *obfd = info->output_bfd;
35c08157
KLC		 6711 flagword out_flags;
6712 flagword in_flags;
6713 flagword out_16regs;
6714 flagword in_no_mac;
6715 flagword out_no_mac;
6716 flagword in_16regs;
6717 flagword out_version;
6718 flagword in_version;
6719 flagword out_fpu_config;
6720 flagword in_fpu_config;
6721
6b728d32
AM		 6722 /* FIXME: What should be checked when linking shared libraries? */
6723 if ((ibfd->flags & DYNAMIC) != 0)
0a1b45a2 6724 return true;
6b728d32 6725
35c08157
KLC		 6726 /* TODO: Revise to use object-attributes instead. */
6727 if (!nds32_check_vec_size (ibfd))
0a1b45a2 6728 return false;
35c08157
KLC		 6729
6730 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
6731 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
0a1b45a2 6732 return true;
35c08157
KLC		 6733
6734 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
6735 {
4eca0228 6736 _bfd_error_handler
38f14ab8 6737 (_("%pB: warning: endian mismatch with previous modules"), ibfd);
35c08157
KLC		 6738
6739 bfd_set_error (bfd_error_bad_value);
0a1b45a2 6740 return false;
35c08157
KLC		 6741 }
6742
fbaf61ad
NC		 6743 /* -B option in objcopy cannot work as expected. e_flags = 0 shall be
6744 treat as generic one without checking and merging. */
6745 if (elf_elfheader (ibfd)->e_flags)
35c08157 6746 {
fbaf61ad
NC		 6747 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
6748 if (in_version == E_NDS32_ELF_VER_1_2)
35c08157 6749 {
fbaf61ad
NC		 6750 _bfd_error_handler
6751 (_("%pB: warning: older version of object file encountered, "
6752 "please recompile with current tool chain"), ibfd);
35c08157 6753 }
35c08157 6754
fbaf61ad
NC		 6755 /* We may need to merge V1 and V2 arch object files to V2. */
6756 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6757 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
35c08157 6758 {
fbaf61ad
NC		 6759 /* Need to convert version. */
6760 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6761 == E_NDS_ARCH_STAR_RESERVED)
6762 {
6763 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6764 }
6765 else if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6766 == E_NDS_ARCH_STAR_V3_M
6767 && (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH)
6768 == E_NDS_ARCH_STAR_V3_0)
6769 {
6770 elf_elfheader (ibfd)->e_flags =
6771 (elf_elfheader (ibfd)->e_flags & (~EF_NDS_ARCH))
6772 | E_NDS_ARCH_STAR_V3_0;
6773 }
6774 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH)
6775 == E_NDS_ARCH_STAR_V0_9
6776 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6777 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6778 {
6779 elf_elfheader (obfd)->e_flags =
6780 convert_e_flags (elf_elfheader (obfd)->e_flags,
6781 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
6782 }
6783 else
6784 {
6785 elf_elfheader (ibfd)->e_flags =
6786 convert_e_flags (elf_elfheader (ibfd)->e_flags,
6787 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
6788 }
35c08157
KLC		 6789 }
6790
fbaf61ad
NC		 6791 /* Extract some flags. */
6792 in_flags = elf_elfheader (ibfd)->e_flags
6793 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6794 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6795
6796 /* The following flags need special treatment. */
6797 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6798 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6799 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
6800
6801 /* Extract some flags. */
6802 out_flags = elf_elfheader (obfd)->e_flags
6803 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6804 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6805
6806 /* The following flags need special treatment. */
6807 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6808 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6809 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
6810 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
6811 if (!elf_flags_init (obfd))
6812 {
6813 /* If the input is the default architecture then do not
6814 bother setting the flags for the output architecture,
6815 instead allow future merges to do this. If no future
6816 merges ever set these flags then they will retain their
6817 unitialised values, which surprise surprise, correspond
6818 to the default values. */
6819 if (bfd_get_arch_info (ibfd)->the_default)
0a1b45a2 6820 return true;
fbaf61ad 6821
0a1b45a2 6822 elf_flags_init (obfd) = true;
fbaf61ad 6823 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
35c08157 6824
fbaf61ad
NC		 6825 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
6826 && bfd_get_arch_info (obfd)->the_default)
6827 {
6828 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
6829 bfd_get_mach (ibfd));
6830 }
35c08157 6831
0a1b45a2 6832 return true;
fbaf61ad 6833 }
35c08157 6834
fbaf61ad
NC		 6835 /* Check flag compatibility. */
6836 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
35c08157 6837 {
4eca0228 6838 _bfd_error_handler
fbaf61ad 6839 (_("%pB: error: ABI mismatch with previous modules"), ibfd);
35c08157 6840 bfd_set_error (bfd_error_bad_value);
0a1b45a2 6841 return false;
35c08157 6842 }
35c08157 6843
fbaf61ad
NC		 6844 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
6845 {
6846 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
6847 {
6848 _bfd_error_handler
6849 (_("%pB: error: instruction set mismatch with previous modules"),
6850 ibfd);
6851
6852 bfd_set_error (bfd_error_bad_value);
0a1b45a2 6853 return false;
fbaf61ad
NC		 6854 }
6855 }
6856
6857 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
6858 and perf ext1 and DIV are mergerd to perf ext1. */
6859 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6860 {
6861 elf_elfheader (obfd)->e_flags =
6862 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6863 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6864 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6865 ? E_NDS32_HAS_EXT_INST : 0)
6866 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6867 ? E_NDS32_HAS_EXT_INST : 0)
6868 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6869 | ((in_version > out_version) ? out_version : in_version);
6870 }
6871 else
6872 {
6873 if (in_version != out_version)
6874 _bfd_error_handler
6875 /* xgettext:c-format */
6876 (_("%pB: warning: incompatible elf-versions %s and %s"),
6877 ibfd, nds32_elfver_strtab[out_version],
6878 nds32_elfver_strtab[in_version]);
35c08157 6879
fbaf61ad
NC		 6880 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6881 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6882 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6883 | (in_version > out_version ? out_version : in_version);
6884 }
35c08157
KLC		 6885 }
6886
0a1b45a2 6887 return true;
35c08157
KLC		 6888}
6889
6890/* Display the flags field. */
6891
0a1b45a2 6892static bool
35c08157
KLC		 6893nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6894{
6895 FILE *file = (FILE *) ptr;
6896
6897 BFD_ASSERT (abfd != NULL && ptr != NULL);
6898
6899 _bfd_elf_print_private_bfd_data (abfd, ptr);
6900
6901 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6902
6903 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6904 {
6905 default:
6906 case E_N1_ARCH:
6907 fprintf (file, _(": n1 instructions"));
6908 break;
6909 case E_N1H_ARCH:
6910 fprintf (file, _(": n1h instructions"));
6911 break;
6912 }
6913
6914 fputc ('\n', file);
6915
0a1b45a2 6916 return true;
35c08157
KLC		 6917}
6918
6919static unsigned int
6920nds32_elf_action_discarded (asection *sec)
6921{
6922
3f3328b8 6923 if (startswith (sec->name, ".gcc_except_table"))
35c08157
KLC		 6924 return 0;
6925
6926 return _bfd_elf_default_action_discarded (sec);
6927}
6928
6929static asection *
6930nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6931 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6932 Elf_Internal_Sym *sym)
6933{
6934 if (h != NULL)
6935 switch (ELF32_R_TYPE (rel->r_info))
6936 {
6937 case R_NDS32_GNU_VTINHERIT:
6938 case R_NDS32_GNU_VTENTRY:
6939 case R_NDS32_RELA_GNU_VTINHERIT:
6940 case R_NDS32_RELA_GNU_VTENTRY:
6941 return NULL;
6942 }
6943
6944 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6945}
6946
fbaf61ad
NC		 6947static enum elf_nds32_tls_type
6948get_tls_type (enum elf_nds32_reloc_type r_type,
6949 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
6950{
6951 enum elf_nds32_tls_type tls_type;
6952
6953 switch (r_type)
6954 {
6955 case R_NDS32_TLS_LE_HI20:
6956 case R_NDS32_TLS_LE_LO12:
6957 tls_type = GOT_TLS_LE;
6958 break;
6959 case R_NDS32_TLS_IE_HI20:
6960 case R_NDS32_TLS_IE_LO12S2:
6961 case R_NDS32_TLS_IE_LO12:
6962 tls_type = GOT_TLS_IE;
6963 break;
6964 case R_NDS32_TLS_IEGP_HI20:
6965 case R_NDS32_TLS_IEGP_LO12:
6966 case R_NDS32_TLS_IEGP_LO12S2:
6967 tls_type = GOT_TLS_IEGP;
6968 break;
6969 case R_NDS32_TLS_DESC_HI20:
6970 case R_NDS32_TLS_DESC_LO12:
6971 case R_NDS32_TLS_DESC_ADD:
6972 case R_NDS32_TLS_DESC_FUNC:
6973 case R_NDS32_TLS_DESC_CALL:
6974 tls_type = GOT_TLS_DESC;
6975 break;
6976 default:
6977 tls_type = GOT_NORMAL;
6978 break;
6979 }
6980
6981 return tls_type;
6982}
6983
6984/* Ensure that we have allocated bookkeeping structures for ABFD's local
6985 symbols. */
6986
0a1b45a2 6987static bool
fbaf61ad
NC		 6988elf32_nds32_allocate_local_sym_info (bfd *abfd)
6989{
6990 if (elf_local_got_refcounts (abfd) == NULL)
6991 {
6992 bfd_size_type num_syms;
6993 bfd_size_type size;
6994 char *data;
6995
6996 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
6997 /* This space is for got_refcounts, got_tls_type, tlsdesc_gotent, and
6998 gp_offset. The details can refer to struct elf_nds32_obj_tdata. */
6999 size = num_syms * (sizeof (bfd_signed_vma) + sizeof (char)
7000 + sizeof (bfd_vma) + sizeof (int)
0a1b45a2 7001 + sizeof (bool) + sizeof (bfd_vma));
fbaf61ad
NC		 7002 data = bfd_zalloc (abfd, size);
7003 if (data == NULL)
0a1b45a2 7004 return false;
fbaf61ad
NC		 7005
7006 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
7007 data += num_syms * sizeof (bfd_signed_vma);
7008
7009 elf32_nds32_local_got_tls_type (abfd) = (char *) data;
7010 data += num_syms * sizeof (char);
7011
7012 elf32_nds32_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
7013 data += num_syms * sizeof (bfd_vma);
7014
7015 elf32_nds32_local_gp_offset (abfd) = (int *) data;
7016 data += num_syms * sizeof (int);
7017 }
7018
0a1b45a2 7019 return true;
fbaf61ad
NC		 7020}
7021
35c08157
KLC		 7022/* Look through the relocs for a section during the first phase.
7023 Since we don't do .gots or .plts, we just need to consider the
7024 virtual table relocs for gc. */
7025
0a1b45a2 7026static bool
35c08157
KLC		 7027nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
7028 asection *sec, const Elf_Internal_Rela *relocs)
7029{
7030 Elf_Internal_Shdr *symtab_hdr;
9bc8e54b 7031 struct elf_link_hash_entry **sym_hashes;
35c08157
KLC		 7032 const Elf_Internal_Rela *rel;
7033 const Elf_Internal_Rela *rel_end;
fbaf61ad 7034 struct elf_link_hash_table *ehtab;
35c08157
KLC		 7035 struct elf_nds32_link_hash_table *htab;
7036 bfd *dynobj;
7037 asection *sreloc = NULL;
7038
fbaf61ad 7039 /* No need for relocation if relocatable already. */
0e1862bb 7040 if (bfd_link_relocatable (info))
fbaf61ad
NC		 7041 {
7042 elf32_nds32_check_relax_group (abfd, sec);
0a1b45a2 7043 return true;
fbaf61ad 7044 }
35c08157
KLC		 7045
7046 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
7047 sym_hashes = elf_sym_hashes (abfd);
35c08157 7048
fbaf61ad 7049 ehtab = elf_hash_table (info);
35c08157
KLC		 7050 htab = nds32_elf_hash_table (info);
7051 dynobj = htab->root.dynobj;
7052
7053 rel_end = relocs + sec->reloc_count;
7054 for (rel = relocs; rel < rel_end; rel++)
7055 {
7056 enum elf_nds32_reloc_type r_type;
7057 struct elf_link_hash_entry *h;
7058 unsigned long r_symndx;
fbaf61ad 7059 enum elf_nds32_tls_type tls_type, old_tls_type;
35c08157
KLC		 7060
7061 r_symndx = ELF32_R_SYM (rel->r_info);
7062 r_type = ELF32_R_TYPE (rel->r_info);
7063 if (r_symndx < symtab_hdr->sh_info)
7064 h = NULL;
7065 else
7066 {
7067 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
7068 while (h->root.type == bfd_link_hash_indirect
7069 || h->root.type == bfd_link_hash_warning)
7070 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7071 }
7072
fbaf61ad
NC		 7073 /* Create .got section if necessary.
7074 Some relocs require a global offset table. We create
7075 got section here, since these relocation need a got section
7076 and if it is not created yet. */
7077 if (ehtab->sgot == NULL)
35c08157
KLC		 7078 {
7079 switch (r_type)
7080 {
7081 case R_NDS32_GOT_HI20:
7082 case R_NDS32_GOT_LO12:
7083 case R_NDS32_GOT_LO15:
7084 case R_NDS32_GOT_LO19:
7085 case R_NDS32_GOT17S2_RELA:
7086 case R_NDS32_GOT15S2_RELA:
7087 case R_NDS32_GOTOFF:
7088 case R_NDS32_GOTOFF_HI20:
7089 case R_NDS32_GOTOFF_LO12:
7090 case R_NDS32_GOTOFF_LO15:
7091 case R_NDS32_GOTOFF_LO19:
7092 case R_NDS32_GOTPC20:
7093 case R_NDS32_GOTPC_HI20:
7094 case R_NDS32_GOTPC_LO12:
7095 case R_NDS32_GOT20:
1c8f6a4d 7096 case R_NDS32_TLS_IE_HI20:
fbaf61ad 7097 case R_NDS32_TLS_IE_LO12:
1c8f6a4d 7098 case R_NDS32_TLS_IE_LO12S2:
fbaf61ad
NC		 7099 case R_NDS32_TLS_IEGP_HI20:
7100 case R_NDS32_TLS_IEGP_LO12:
7101 case R_NDS32_TLS_IEGP_LO12S2:
7102 case R_NDS32_TLS_DESC_HI20:
7103 case R_NDS32_TLS_DESC_LO12:
35c08157
KLC		 7104 if (dynobj == NULL)
7105 htab->root.dynobj = dynobj = abfd;
fbaf61ad 7106 if (!create_got_section (dynobj, info))
0a1b45a2 7107 return false;
35c08157
KLC		 7108 break;
7109
7110 default:
7111 break;
7112 }
7113 }
7114
fbaf61ad 7115 /* Check relocation type. */
35c08157
KLC		 7116 switch ((int) r_type)
7117 {
7118 case R_NDS32_GOT_HI20:
7119 case R_NDS32_GOT_LO12:
7120 case R_NDS32_GOT_LO15:
7121 case R_NDS32_GOT_LO19:
7122 case R_NDS32_GOT20:
fbaf61ad
NC		 7123 case R_NDS32_TLS_LE_HI20:
7124 case R_NDS32_TLS_LE_LO12:
1c8f6a4d 7125 case R_NDS32_TLS_IE_HI20:
fbaf61ad 7126 case R_NDS32_TLS_IE_LO12:
1c8f6a4d 7127 case R_NDS32_TLS_IE_LO12S2:
fbaf61ad
NC		 7128 case R_NDS32_TLS_IEGP_HI20:
7129 case R_NDS32_TLS_IEGP_LO12:
7130 case R_NDS32_TLS_IEGP_LO12S2:
7131 case R_NDS32_TLS_DESC_HI20:
7132 case R_NDS32_TLS_DESC_LO12:
7133 tls_type = get_tls_type (r_type, h);
7134 if (h)
1c8f6a4d 7135 {
fbaf61ad
NC		 7136 if (tls_type != GOT_TLS_LE)
7137 h->got.refcount += 1;
1c8f6a4d 7138 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
1c8f6a4d 7139 }
35c08157
KLC		 7140 else
7141 {
fbaf61ad
NC		 7142 /* This is a global offset table entry for a local symbol. */
7143 if (!elf32_nds32_allocate_local_sym_info (abfd))
0a1b45a2 7144 return false;
35c08157 7145
fbaf61ad
NC		 7146 BFD_ASSERT (r_symndx < symtab_hdr->sh_info);
7147 if (tls_type != GOT_TLS_LE)
7148 elf_local_got_refcounts (abfd)[r_symndx] += 1;
1c8f6a4d 7149 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
35c08157 7150 }
35c08157 7151
fbaf61ad 7152 /* We would already have issued an error message if there
1c8f6a4d
KLC		 7153 is a TLS/non-TLS mismatch, based on the symbol
7154 type. So just combine any TLS types needed. */
7155 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
7156 && tls_type != GOT_NORMAL)
7157 tls_type |= old_tls_type;
7158
fbaf61ad
NC		 7159 /* DESC to IE/IEGP if link to executable. */
7160 if ((tls_type & (GOT_TLS_DESC | GOT_TLS_IEGP))
7161 && (bfd_link_executable (info)))
7162 tls_type |= (bfd_link_pie (info) ? GOT_TLS_IEGP : GOT_TLS_IE);
7163
1c8f6a4d
KLC		 7164 if (old_tls_type != tls_type)
7165 {
7166 if (h != NULL)
7167 elf32_nds32_hash_entry (h)->tls_type = tls_type;
7168 else
7169 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
7170 }
7171 break;
7172 case R_NDS32_9_PLTREL:
35c08157
KLC		 7173 case R_NDS32_25_PLTREL:
7174 case R_NDS32_PLTREL_HI20:
7175 case R_NDS32_PLTREL_LO12:
7176 case R_NDS32_PLT_GOTREL_HI20:
7177 case R_NDS32_PLT_GOTREL_LO12:
7178 case R_NDS32_PLT_GOTREL_LO15:
7179 case R_NDS32_PLT_GOTREL_LO19:
7180 case R_NDS32_PLT_GOTREL_LO20:
7181
7182 /* This symbol requires a procedure linkage table entry. We
7183 actually build the entry in adjust_dynamic_symbol,
7184 because this might be a case of linking PIC code without
7185 linking in any dynamic objects, in which case we don't
7186 need to generate a procedure linkage table after all. */
7187
7188 /* If this is a local symbol, we resolve it directly without
7189 creating a procedure linkage table entry. */
7190 if (h == NULL)
7191 continue;
7192
fbaf61ad
NC		 7193 if (h->forced_local
7194 || (bfd_link_pie (info) && h->def_regular))
35c08157
KLC		 7195 break;
7196
1c8f6a4d 7197 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
35c08157
KLC		 7198 h->needs_plt = 1;
7199 h->plt.refcount += 1;
7200 break;
7201
7202 case R_NDS32_16_RELA:
7203 case R_NDS32_20_RELA:
7204 case R_NDS32_5_RELA:
7205 case R_NDS32_32_RELA:
7206 case R_NDS32_HI20_RELA:
7207 case R_NDS32_LO12S3_RELA:
7208 case R_NDS32_LO12S2_RELA:
7209 case R_NDS32_LO12S2_DP_RELA:
7210 case R_NDS32_LO12S2_SP_RELA:
7211 case R_NDS32_LO12S1_RELA:
7212 case R_NDS32_LO12S0_RELA:
7213 case R_NDS32_LO12S0_ORI_RELA:
7214 case R_NDS32_SDA16S3_RELA:
7215 case R_NDS32_SDA17S2_RELA:
7216 case R_NDS32_SDA18S1_RELA:
7217 case R_NDS32_SDA19S0_RELA:
7218 case R_NDS32_SDA15S3_RELA:
7219 case R_NDS32_SDA15S2_RELA:
7220 case R_NDS32_SDA12S2_DP_RELA:
7221 case R_NDS32_SDA12S2_SP_RELA:
7222 case R_NDS32_SDA15S1_RELA:
7223 case R_NDS32_SDA15S0_RELA:
7224 case R_NDS32_SDA_FP7U2_RELA:
7225 case R_NDS32_15_PCREL_RELA:
7226 case R_NDS32_17_PCREL_RELA:
7227 case R_NDS32_25_PCREL_RELA:
7228
0e1862bb 7229 if (h != NULL && !bfd_link_pic (info))
35c08157
KLC		 7230 {
7231 h->non_got_ref = 1;
7232 h->plt.refcount += 1;
7233 }
7234
7235 /* If we are creating a shared library, and this is a reloc against
7236 a global symbol, or a non PC relative reloc against a local
7237 symbol, then we need to copy the reloc into the shared library.
7238 However, if we are linking with -Bsymbolic, we do not need to
7239 copy a reloc against a global symbol which is defined in an
7240 object we are including in the link (i.e., DEF_REGULAR is set).
7241 At this point we have not seen all the input files, so it is
7242 possible that DEF_REGULAR is not set now but will be set later
7243 (it is never cleared). We account for that possibility below by
7244 storing information in the dyn_relocs field of the hash table
7245 entry. A similar situation occurs when creating shared libraries
7246 and symbol visibility changes render the symbol local.
7247
7248 If on the other hand, we are creating an executable, we may need
7249 to keep relocations for symbols satisfied by a dynamic library
7250 if we manage to avoid copy relocs for the symbol. */
0e1862bb 7251 if ((bfd_link_pic (info)
35c08157
KLC		 7252 && (sec->flags & SEC_ALLOC) != 0
7253 && ((r_type != R_NDS32_25_PCREL_RELA
7254 && r_type != R_NDS32_15_PCREL_RELA
7255 && r_type != R_NDS32_17_PCREL_RELA
7256 && !(r_type == R_NDS32_32_RELA
7257 && strcmp (sec->name, ".eh_frame") == 0))
7258 || (h != NULL
7259 && (!info->symbolic
7260 || h->root.type == bfd_link_hash_defweak
7261 || !h->def_regular))))
0e1862bb 7262 || (!bfd_link_pic (info)
35c08157
KLC		 7263 && (sec->flags & SEC_ALLOC) != 0
7264 && h != NULL
7265 && (h->root.type == bfd_link_hash_defweak
7266 || !h->def_regular)))
7267 {
3bf083ed
AM		 7268 struct elf_dyn_relocs *p;
7269 struct elf_dyn_relocs **head;
35c08157
KLC		 7270
7271 if (dynobj == NULL)
7272 htab->root.dynobj = dynobj = abfd;
7273
7274 /* When creating a shared object, we must copy these
7275 relocs into the output file. We create a reloc
7276 section in dynobj and make room for the reloc. */
7277 if (sreloc == NULL)
7278 {
7279 const char *name;
7280
7281 name = bfd_elf_string_from_elf_section
7282 (abfd, elf_elfheader (abfd)->e_shstrndx,
7283 elf_section_data (sec)->rela.hdr->sh_name);
7284 if (name == NULL)
0a1b45a2 7285 return false;
35c08157 7286
3f3328b8 7287 BFD_ASSERT (startswith (name, ".rela")
fd361982 7288 && strcmp (bfd_section_name (sec),
35c08157
KLC		 7289 name + 5) == 0);
7290
7291 sreloc = bfd_get_section_by_name (dynobj, name);
7292 if (sreloc == NULL)
7293 {
7294 flagword flags;
7295
7296 sreloc = bfd_make_section (dynobj, name);
7297 flags = (SEC_HAS_CONTENTS | SEC_READONLY
7298 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
7299 if ((sec->flags & SEC_ALLOC) != 0)
7300 flags |= SEC_ALLOC | SEC_LOAD;
7301 if (sreloc == NULL
fd361982
AM		 7302 || !bfd_set_section_flags (sreloc, flags)
7303 || !bfd_set_section_alignment (sreloc, 2))
0a1b45a2 7304 return false;
35c08157
KLC		 7305
7306 elf_section_type (sreloc) = SHT_RELA;
7307 }
7308 elf_section_data (sec)->sreloc = sreloc;
7309 }
7310
7311 /* If this is a global symbol, we count the number of
7312 relocations we need for this symbol. */
7313 if (h != NULL)
190eb1dd 7314 head = &h->dyn_relocs;
35c08157
KLC		 7315 else
7316 {
7317 asection *s;
61034b0b 7318 void *vpp;
35c08157
KLC		 7319
7320 Elf_Internal_Sym *isym;
f1dfbfdb
L		 7321 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
7322 abfd, r_symndx);
35c08157 7323 if (isym == NULL)
0a1b45a2 7324 return false;
35c08157
KLC		 7325
7326 /* Track dynamic relocs needed for local syms too. */
7327 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
7328 if (s == NULL)
0a1b45a2 7329 return false;
35c08157 7330
61034b0b 7331 vpp = &elf_section_data (s)->local_dynrel;
3bf083ed 7332 head = (struct elf_dyn_relocs **) vpp;
35c08157
KLC		 7333 }
7334
7335 p = *head;
7336 if (p == NULL || p->sec != sec)
7337 {
986f0783 7338 size_t amt = sizeof (*p);
3bf083ed 7339 p = (struct elf_dyn_relocs *) bfd_alloc (dynobj, amt);
35c08157 7340 if (p == NULL)
0a1b45a2 7341 return false;
35c08157
KLC		 7342 p->next = *head;
7343 *head = p;
7344 p->sec = sec;
7345 p->count = 0;
7346 p->pc_count = 0;
7347 }
7348
7349 p->count += 1;
fbaf61ad
NC		 7350
7351 /* Since eh_frame is readonly, R_NDS32_32_RELA
7352 reloc for eh_frame will cause shared library has
7353 TEXTREL entry in the dynamic section. This lead glibc
7354 testsuites to failure (bug-13092) and cause kernel fail
7355 (bug-11819). I think the best solution is to replace
7356 absolute reloc with pc relative reloc in the eh_frame.
7357 To do that, we need to support the following issues:
7358
7359 === For GCC ===
7360 * gcc/config/nds32/nds32.h: Define
7361 ASM_PREFERRED_EH_DATA_FORMAT to encode DW_EH_PE_pcrel
7362 and DW_EH_PE_sdata4 into DWARF exception header when
7363 option have '-fpic'.
7364
7365 === For binutils ===
7366 * bfd/: Define new reloc R_NDS32_32_PCREL_RELA.
7367 * gas/config/tc-nds32.h: Define DIFF_EXPR_OK. This
7368 may break our nds DIFF mechanism, therefore, we
7369 must disable all linker relaxations to ensure
7370 correctness.
7371 * gas/config/tc-nds32.c (nds32_apply_fix): Replace
7372 R_NDS32_32_RELA with R_NDS32_32_PCREL_RELA, and
7373 do the necessary modification.
7374
7375 Unfortunately, it still have some problems for nds32
7376 to support pc relative reloc in the eh_frame. So I use
7377 another solution to fix this issue.
7378
7379 However, I find that ld always emit TEXTREL marker for
7380 R_NDS32_NONE relocs in rel.dyn. These none relocs are
7381 correspond to R_NDS32_32_RELA for .eh_frame section.
7382 It means that we always reserve redundant entries of rel.dyn
7383 for these relocs which actually do nothing in dynamic linker.
7384
7385 Therefore, we regard these relocs as pc relative relocs
7386 here and increase the pc_count. */
35c08157
KLC		 7387 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
7388 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
fbaf61ad
NC		 7389 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA
7390 || (r_type == R_NDS32_32_RELA
7391 && strcmp (sec->name, ".eh_frame") == 0))
35c08157
KLC		 7392 p->pc_count += 1;
7393 }
7394 break;
7395
7396 /* This relocation describes the C++ object vtable hierarchy.
7397 Reconstruct it for later use during GC. */
7398 case R_NDS32_RELA_GNU_VTINHERIT:
7399 case R_NDS32_GNU_VTINHERIT:
7400 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
0a1b45a2 7401 return false;
35c08157
KLC		 7402 break;
7403
7404 /* This relocation describes which C++ vtable entries are actually
7405 used. Record for later use during GC. */
7406 case R_NDS32_GNU_VTENTRY:
7407 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
0a1b45a2 7408 return false;
35c08157
KLC		 7409 break;
7410 case R_NDS32_RELA_GNU_VTENTRY:
7411 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
0a1b45a2 7412 return false;
35c08157
KLC		 7413 break;
7414 }
7415 }
7416
0a1b45a2 7417 return true;
35c08157
KLC		 7418}
7419
7420/* Write VAL in uleb128 format to P, returning a pointer to the
7421 following byte.
7422 This code is copied from elf-attr.c. */
7423
7424static bfd_byte *
7425write_uleb128 (bfd_byte *p, unsigned int val)
7426{
7427 bfd_byte c;
7428 do
7429 {
7430 c = val & 0x7f;
7431 val >>= 7;
7432 if (val)
7433 c |= 0x80;
7434 *(p++) = c;
7435 }
7436 while (val);
7437 return p;
7438}
7439
7440static bfd_signed_vma
7441calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
fbaf61ad 7442 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
35c08157
KLC		 7443{
7444 bfd_signed_vma foff;
7445 bfd_vma symval, addend;
7446 asection *sym_sec;
7447
7448 /* Get the value of the symbol referred to by the reloc. */
7449 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
7450 {
7451 Elf_Internal_Sym *isym;
7452
7453 /* A local symbol. */
7454 isym = isymbuf + ELF32_R_SYM (irel->r_info);
7455
7456 if (isym->st_shndx == SHN_UNDEF)
7457 sym_sec = bfd_und_section_ptr;
7458 else if (isym->st_shndx == SHN_ABS)
7459 sym_sec = bfd_abs_section_ptr;
7460 else if (isym->st_shndx == SHN_COMMON)
7461 sym_sec = bfd_com_section_ptr;
7462 else
7463 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7464 symval = isym->st_value + sym_sec->output_section->vma
7465 + sym_sec->output_offset;
7466 }
7467 else
7468 {
7469 unsigned long indx;
7470 struct elf_link_hash_entry *h;
35c08157
KLC		 7471
7472 /* An external symbol. */
7473 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7474 h = elf_sym_hashes (abfd)[indx];
7475 BFD_ASSERT (h != NULL);
7476
7477 if (h->root.type != bfd_link_hash_defined
7478 && h->root.type != bfd_link_hash_defweak)
7479 /* This appears to be a reference to an undefined
7480 symbol. Just ignore it--it will be caught by the
7481 regular reloc processing. */
7482 return 0;
35c08157
KLC		 7483
7484 if (h->root.u.def.section->flags & SEC_MERGE)
7485 {
7486 sym_sec = h->root.u.def.section;
7487 symval = _bfd_merged_section_offset (abfd, &sym_sec,
7488 elf_section_data (sym_sec)->sec_info,
7489 h->root.u.def.value);
7490 symval = symval + sym_sec->output_section->vma
7491 + sym_sec->output_offset;
7492 }
7493 else
7494 symval = (h->root.u.def.value
7495 + h->root.u.def.section->output_section->vma
7496 + h->root.u.def.section->output_offset);
7497 }
7498
7499 addend = irel->r_addend;
7500
7501 foff = (symval + addend
7502 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
7503 return foff;
7504}
35c08157 7505\f
fbaf61ad 7506
35c08157
KLC		 7507/* Convert a 32-bit instruction to 16-bit one.
7508 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
7509 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
7510 type of INSN16. Return 1 if successful. */
7511
7512static int
7513nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7514 int *pinsn_type)
7515{
7516 uint16_t insn16 = 0;
6cae483a 7517 int insn_type = 0;
35c08157
KLC		 7518 unsigned long mach = bfd_get_mach (abfd);
7519
7520 if (N32_SH5 (insn) != 0)
7521 return 0;
7522
7523 switch (N32_SUB5 (insn))
7524 {
7525 case N32_ALU1_ADD_SLLI:
7526 case N32_ALU1_ADD_SRLI:
7527 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
7528 {
7529 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
7530 N32_RB5 (insn));
7531 insn_type = NDS32_INSN_ADD333;
7532 }
7533 else if (N32_IS_RT4 (insn))
7534 {
7535 if (N32_RT5 (insn) == N32_RA5 (insn))
7536 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
7537 else if (N32_RT5 (insn) == N32_RB5 (insn))
7538 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
7539 insn_type = NDS32_INSN_ADD45;
7540 }
7541 break;
7542
7543 case N32_ALU1_SUB_SLLI:
7544 case N32_ALU1_SUB_SRLI:
7545 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
7546 {
7547 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
7548 N32_RB5 (insn));
7549 insn_type = NDS32_INSN_SUB333;
7550 }
7551 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
7552 {
7553 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
7554 insn_type = NDS32_INSN_SUB45;
7555 }
7556 break;
7557
7558 case N32_ALU1_AND_SLLI:
7559 case N32_ALU1_AND_SRLI:
7560 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
7561 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7562 && N32_IS_RB3 (insn))
7563 {
7564 if (N32_RT5 (insn) == N32_RA5 (insn))
7565 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
7566 else if (N32_RT5 (insn) == N32_RB5 (insn))
7567 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
7568 if (insn16)
7569 insn_type = NDS32_INSN_AND33;
7570 }
7571 break;
7572
7573 case N32_ALU1_XOR_SLLI:
7574 case N32_ALU1_XOR_SRLI:
7575 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
7576 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7577 && N32_IS_RB3 (insn))
7578 {
7579 if (N32_RT5 (insn) == N32_RA5 (insn))
7580 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
7581 else if (N32_RT5 (insn) == N32_RB5 (insn))
7582 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
7583 if (insn16)
7584 insn_type = NDS32_INSN_XOR33;
7585 }
7586 break;
7587
7588 case N32_ALU1_OR_SLLI:
7589 case N32_ALU1_OR_SRLI:
7590 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
7591 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7592 && N32_IS_RB3 (insn))
7593 {
7594 if (N32_RT5 (insn) == N32_RA5 (insn))
7595 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
7596 else if (N32_RT5 (insn) == N32_RB5 (insn))
7597 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
7598 if (insn16)
7599 insn_type = NDS32_INSN_OR33;
7600 }
7601 break;
7602 case N32_ALU1_NOR:
7603 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
7604 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
7605 && N32_RA5 (insn) == N32_RB5 (insn))
7606 {
7607 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
7608 insn_type = NDS32_INSN_NOT33;
7609 }
7610 break;
7611 case N32_ALU1_SRAI:
7612 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
7613 {
7614 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
7615 insn_type = NDS32_INSN_SRAI45;
7616 }
7617 break;
7618
7619 case N32_ALU1_SRLI:
7620 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
7621 {
7622 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
7623 insn_type = NDS32_INSN_SRLI45;
7624 }
7625 break;
7626
7627 case N32_ALU1_SLLI:
7628 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
7629 {
7630 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
7631 N32_UB5 (insn));
7632 insn_type = NDS32_INSN_SLLI333;
7633 }
7634 break;
7635
7636 case N32_ALU1_ZEH:
7637 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7638 {
7639 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
7640 insn_type = NDS32_INSN_ZEH33;
7641 }
7642 break;
7643
7644 case N32_ALU1_SEB:
7645 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7646 {
7647 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
7648 insn_type = NDS32_INSN_SEB33;
7649 }
7650 break;
7651
7652 case N32_ALU1_SEH:
7653 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7654 {
7655 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
7656 insn_type = NDS32_INSN_SEH33;
7657 }
7658 break;
7659
7660 case N32_ALU1_SLT:
7661 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7662 {
7663 /* Implicit r15. */
7664 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
7665 insn_type = NDS32_INSN_SLT45;
7666 }
7667 break;
7668
7669 case N32_ALU1_SLTS:
7670 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7671 {
7672 /* Implicit r15. */
7673 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
7674 insn_type = NDS32_INSN_SLTS45;
7675 }
7676 break;
7677 }
7678
7679 if ((insn16 & 0x8000) == 0)
7680 return 0;
7681
7682 if (pinsn16)
7683 *pinsn16 = insn16;
7684 if (pinsn_type)
7685 *pinsn_type = insn_type;
7686 return 1;
7687}
7688
7689static int
7690nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7691 int *pinsn_type)
7692{
7693 uint16_t insn16 = 0;
7694 int insn_type;
7695 unsigned long mach = bfd_get_mach (abfd);
7696
7697 /* TODO: bset, bclr, btgl, btst. */
7698 if (__GF (insn, 6, 4) != 0)
7699 return 0;
7700
7701 switch (N32_IMMU (insn, 6))
7702 {
7703 case N32_ALU2_MUL:
7704 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7705 && N32_IS_RB3 (insn))
7706 {
7707 if (N32_RT5 (insn) == N32_RA5 (insn))
7708 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
7709 else if (N32_RT5 (insn) == N32_RB5 (insn))
7710 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
7711 if (insn16)
7712 insn_type = NDS32_INSN_MUL33;
7713 }
7714 }
7715
7716 if ((insn16 & 0x8000) == 0)
7717 return 0;
7718
7719 if (pinsn16)
7720 *pinsn16 = insn16;
7721 if (pinsn_type)
7722 *pinsn_type = insn_type;
7723 return 1;
7724}
7725
7726int
7727nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7728 int *pinsn_type)
7729{
7730 int op6;
7731 uint16_t insn16 = 0;
1624c9ca 7732 int insn_type = 0;
35c08157
KLC		 7733 unsigned long mach = bfd_get_mach (abfd);
7734
7735 /* Decode 32-bit instruction. */
7736 if (insn & 0x80000000)
7737 {
7738 /* Not 32-bit insn. */
7739 return 0;
7740 }
7741
7742 op6 = N32_OP6 (insn);
7743
7744 /* Convert it to 16-bit instruction. */
7745 switch (op6)
7746 {
7747 case N32_OP6_MOVI:
7748 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
7749 {
7750 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
7751 insn_type = NDS32_INSN_MOVI55;
7752 }
7753 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
7754 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
7755 {
7756 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
7757 N32_IMM20S (insn) - 16);
7758 insn_type = NDS32_INSN_MOVPI45;
7759 }
7760 break;
7761
7762 case N32_OP6_ADDI:
7763 if (N32_IMM15S (insn) == 0)
7764 {
7765 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
7766 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7767 if (mach <= MACH_V2
7768 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7769 {
7770 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7771 insn_type = NDS32_INSN_MOV55;
7772 }
7773 }
7774 else if (N32_IMM15S (insn) > 0)
7775 {
7776 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
7777 {
7778 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
7779 N32_IMM15S (insn));
7780 insn_type = NDS32_INSN_ADDI333;
7781 }
7782 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7783 && N32_IMM15S (insn) < 32)
7784 {
7785 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
7786 insn_type = NDS32_INSN_ADDI45;
7787 }
7788 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7789 && N32_RT5 (insn) == N32_RA5 (insn)
7790 && N32_IMM15S (insn) < 512)
7791 {
7792 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7793 insn_type = NDS32_INSN_ADDI10_SP;
7794 }
7795 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7796 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
7797 && (N32_IMM15S (insn) % 4 == 0))
7798 {
7799 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
7800 N32_IMM15S (insn) >> 2);
7801 insn_type = NDS32_INSN_ADDRI36_SP;
7802 }
7803 }
7804 else
7805 {
7806 /* Less than 0. */
7807 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
7808 {
7809 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
7810 0 - N32_IMM15S (insn));
7811 insn_type = NDS32_INSN_SUBI333;
7812 }
7813 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7814 && N32_IMM15S (insn) > -32)
7815 {
1c8f6a4d
KLC		 7816 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
7817 0 - N32_IMM15S (insn));
35c08157
KLC		 7818 insn_type = NDS32_INSN_SUBI45;
7819 }
7820 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7821 && N32_RT5 (insn) == N32_RA5 (insn)
7822 && N32_IMM15S (insn) >= -512)
7823 {
7824 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7825 insn_type = NDS32_INSN_ADDI10_SP;
7826 }
7827 }
7828 break;
7829
7830 case N32_OP6_ORI:
7831 if (N32_IMM15S (insn) == 0)
7832 {
7833 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
7834 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7835 if (mach <= MACH_V2
7836 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7837 {
7838 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7839 insn_type = NDS32_INSN_MOV55;
7840 }
7841 }
7842 break;
7843
7844 case N32_OP6_SUBRI:
7845 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7846 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
7847 {
7848 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
7849 insn_type = NDS32_INSN_NEG33;
7850 }
7851 break;
7852
7853 case N32_OP6_ANDI:
7854 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7855 {
7856 if (N32_IMM15U (insn) == 1)
7857 {
7858 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
7859 insn_type = NDS32_INSN_XLSB33;
7860 }
7861 else if (N32_IMM15U (insn) == 0x7ff)
7862 {
7863 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
7864 insn_type = NDS32_INSN_X11B33;
7865 }
7866 else if (N32_IMM15U (insn) == 0xff)
7867 {
7868 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
7869 insn_type = NDS32_INSN_ZEB33;
7870 }
7871 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
7872 && N32_IMM15U (insn) < 256)
7873 {
7874 int imm15u = N32_IMM15U (insn);
7875
7876 if (__builtin_popcount (imm15u) == 1)
7877 {
7878 /* BMSKI33 */
7879 int imm3u = __builtin_ctz (imm15u);
7880
7881 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
7882 insn_type = NDS32_INSN_BMSKI33;
7883 }
7884 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
7885 {
7886 /* FEXTI33 */
7887 int imm3u = __builtin_ctz (imm15u + 1) - 1;
7888
7889 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
7890 insn_type = NDS32_INSN_FEXTI33;
7891 }
7892 }
7893 }
7894 break;
7895
7896 case N32_OP6_SLTI:
7897 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7898 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7899 {
7900 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7901 insn_type = NDS32_INSN_SLTI45;
7902 }
7903 break;
7904
7905 case N32_OP6_SLTSI:
7906 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7907 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7908 {
7909 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7910 insn_type = NDS32_INSN_SLTSI45;
7911 }
7912 break;
7913
7914 case N32_OP6_LWI:
7915 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7916 {
7917 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7918 insn_type = NDS32_INSN_LWI450;
7919 }
7920 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7921 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7922 {
7923 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7924 N32_IMM15S (insn));
7925 insn_type = NDS32_INSN_LWI333;
7926 }
7927 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7928 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7929 {
7930 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7931 insn_type = NDS32_INSN_LWI37;
7932 }
7933 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7934 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7935 {
7936 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7937 insn_type = NDS32_INSN_LWI37_SP;
7938 }
7939 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7940 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7941 {
1c8f6a4d
KLC		 7942 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7943 N32_IMM15S (insn) + 32);
35c08157
KLC		 7944 insn_type = NDS32_INSN_LWI45_FE;
7945 }
7946 break;
7947
7948 case N32_OP6_SWI:
7949 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7950 {
7951 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7952 insn_type = NDS32_INSN_SWI450;
7953 }
7954 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7955 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7956 {
1c8f6a4d
KLC		 7957 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7958 N32_IMM15S (insn));
35c08157
KLC		 7959 insn_type = NDS32_INSN_SWI333;
7960 }
7961 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7962 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7963 {
7964 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7965 insn_type = NDS32_INSN_SWI37;
7966 }
7967 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7968 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7969 {
7970 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7971 insn_type = NDS32_INSN_SWI37_SP;
7972 }
7973 break;
7974
7975 case N32_OP6_LWI_BI:
7976 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7977 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7978 {
7979 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7980 N32_IMM15S (insn));
7981 insn_type = NDS32_INSN_LWI333_BI;
7982 }
7983 break;
7984
7985 case N32_OP6_SWI_BI:
7986 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7987 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7988 {
7989 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7990 N32_IMM15S (insn));
7991 insn_type = NDS32_INSN_SWI333_BI;
7992 }
7993 break;
7994
7995 case N32_OP6_LHI:
7996 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7997 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7998 {
7999 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
8000 N32_IMM15S (insn));
8001 insn_type = NDS32_INSN_LHI333;
8002 }
8003 break;
8004
8005 case N32_OP6_SHI:
8006 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
8007 && IS_WITHIN_U (N32_IMM15S (insn), 3))
8008 {
8009 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
8010 N32_IMM15S (insn));
8011 insn_type = NDS32_INSN_SHI333;
8012 }
8013 break;
8014
8015 case N32_OP6_LBI:
8016 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
8017 && IS_WITHIN_U (N32_IMM15S (insn), 3))
8018 {
8019 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
8020 N32_IMM15S (insn));
8021 insn_type = NDS32_INSN_LBI333;
8022 }
8023 break;
8024
8025 case N32_OP6_SBI:
8026 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
8027 && IS_WITHIN_U (N32_IMM15S (insn), 3))
8028 {
8029 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
8030 N32_IMM15S (insn));
8031 insn_type = NDS32_INSN_SBI333;
8032 }
8033 break;
8034
8035 case N32_OP6_ALU1:
8036 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
8037
8038 case N32_OP6_ALU2:
8039 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
8040
8041 case N32_OP6_BR1:
8042 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
8043 goto done;
8044
4ec521f2 8045 if ((insn & N32_BIT (14)) == 0)
35c08157
KLC		 8046 {
8047 /* N32_BR1_BEQ */
8048 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
8049 && N32_RT5 (insn) != REG_R5)
8050 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
8051 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
8052 && N32_RA5 (insn) != REG_R5)
8053 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
8054 insn_type = NDS32_INSN_BEQS38;
8055 break;
8056 }
8057 else
8058 {
8059 /* N32_BR1_BNE */
8060 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
8061 && N32_RT5 (insn) != REG_R5)
8062 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
8063 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
8064 && N32_RA5 (insn) != REG_R5)
8065 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
8066 insn_type = NDS32_INSN_BNES38;
8067 break;
8068 }
8069 break;
8070
8071 case N32_OP6_BR2:
8072 switch (N32_BR2_SUB (insn))
8073 {
8074 case N32_BR2_BEQZ:
8075 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
8076 {
8077 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
8078 insn_type = NDS32_INSN_BEQZ38;
8079 }
1c8f6a4d
KLC		 8080 else if (N32_RT5 (insn) == REG_R15
8081 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 8082 {
8083 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
8084 insn_type = NDS32_INSN_BEQZS8;
8085 }
8086 break;
8087
8088 case N32_BR2_BNEZ:
8089 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
8090 {
8091 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
8092 insn_type = NDS32_INSN_BNEZ38;
8093 }
1c8f6a4d
KLC		 8094 else if (N32_RT5 (insn) == REG_R15
8095 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 8096 {
8097 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
8098 insn_type = NDS32_INSN_BNEZS8;
8099 }
8100 break;
8101
fbaf61ad
NC		 8102 case N32_BR2_SOP0:
8103 if (__GF (insn, 20, 5) == 0 && IS_WITHIN_U (N32_IMM16S (insn), 9))
35c08157
KLC		 8104 {
8105 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
8106 insn_type = NDS32_INSN_IFCALL9;
8107 }
8108 break;
8109 }
8110 break;
8111
8112 case N32_OP6_JI:
4ec521f2 8113 if ((insn & N32_BIT (24)) == 0)
35c08157
KLC		 8114 {
8115 /* N32_JI_J */
8116 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
8117 {
8118 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
8119 insn_type = NDS32_INSN_J8;
8120 }
8121 }
8122 break;
8123
8124 case N32_OP6_JREG:
8125 if (__GF (insn, 8, 2) != 0)
8126 goto done;
8127
8128 switch (N32_IMMU (insn, 5))
8129 {
8130 case N32_JREG_JR:
8131 if (N32_JREG_HINT (insn) == 0)
8132 {
8133 /* jr */
8134 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
8135 insn_type = NDS32_INSN_JR5;
8136 }
8137 else if (N32_JREG_HINT (insn) == 1)
8138 {
8139 /* ret */
8140 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
8141 insn_type = NDS32_INSN_RET5;
8142 }
8143 else if (N32_JREG_HINT (insn) == 3)
8144 {
8145 /* ifret = mov55 $sp, $sp */
8146 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
8147 insn_type = NDS32_INSN_IFRET;
8148 }
8149 break;
8150
8151 case N32_JREG_JRAL:
8152 /* It's convertible when return rt5 is $lp and address
8153 translation is kept. */
8154 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
8155 {
8156 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
8157 insn_type = NDS32_INSN_JRAL5;
8158 }
8159 break;
8160 }
8161 break;
8162
8163 case N32_OP6_MISC:
8164 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
8165 {
8166 /* For v3, swid above 31 are used for ex9.it. */
8167 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
8168 insn_type = NDS32_INSN_BREAK16;
8169 }
8170 break;
8171
8172 default:
8173 /* This instruction has no 16-bit variant. */
8174 goto done;
8175 }
8176
dc1e8a47 8177 done:
35c08157
KLC		 8178 /* Bit-15 of insn16 should be set for a valid instruction. */
8179 if ((insn16 & 0x8000) == 0)
8180 return 0;
8181
8182 if (pinsn16)
8183 *pinsn16 = insn16;
8184 if (pinsn_type)
8185 *pinsn_type = insn_type;
8186 return 1;
8187}
8188
8189static int
8190special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
8191 Elf_Internal_Rela *reloc)
8192{
8193 uint16_t insn16 = 0;
8194
8195 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
8196 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
8197 return 0;
8198
8199 if (!N32_IS_RT3 (insn))
8200 return 0;
8201
8202 switch (N32_OP6 (insn))
8203 {
8204 case N32_OP6_LWI:
8205 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
8206 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
8207 break;
8208 case N32_OP6_SWI:
8209 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
8210 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
8211 break;
8212 case N32_OP6_HWGP:
8213 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
8214 break;
8215
8216 if (__GF (insn, 17, 3) == 6)
8217 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
8218 else if (__GF (insn, 17, 3) == 7)
8219 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
8220 break;
8221 }
8222
8223 if ((insn16 & 0x8000) == 0)
8224 return 0;
8225
8226 *pinsn16 = insn16;
8227 return 1;
8228}
8229
8230/* Convert a 16-bit instruction to 32-bit one.
8231 INSN16 it the input and PINSN it the point to output.
8232 Return non-zero on successful. Otherwise 0 is returned. */
8233
8234int
8235nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
8236{
8237 uint32_t insn = 0xffffffff;
8238 unsigned long mach = bfd_get_mach (abfd);
8239
8240 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
8241
8242 switch (__GF (insn16, 9, 6))
8243 {
8244 case 0x4: /* add45 */
1c8f6a4d
KLC		 8245 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
8246 N16_RA5 (insn16));
35c08157
KLC		 8247 goto done;
8248 case 0x5: /* sub45 */
1c8f6a4d
KLC		 8249 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
8250 N16_RA5 (insn16));
35c08157
KLC		 8251 goto done;
8252 case 0x6: /* addi45 */
1c8f6a4d
KLC		 8253 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
8254 N16_IMM5U (insn16));
35c08157
KLC		 8255 goto done;
8256 case 0x7: /* subi45 */
1c8f6a4d
KLC		 8257 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
8258 -N16_IMM5U (insn16));
35c08157
KLC		 8259 goto done;
8260 case 0x8: /* srai45 */
1c8f6a4d
KLC		 8261 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
8262 N16_IMM5U (insn16));
35c08157
KLC		 8263 goto done;
8264 case 0x9: /* srli45 */
1c8f6a4d
KLC		 8265 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
8266 N16_IMM5U (insn16));
35c08157 8267 goto done;
35c08157 8268 case 0xa: /* slli333 */
1c8f6a4d
KLC		 8269 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
8270 N16_IMM3U (insn16));
35c08157
KLC		 8271 goto done;
8272 case 0xc: /* add333 */
1c8f6a4d
KLC		 8273 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
8274 N16_RB3 (insn16));
35c08157
KLC		 8275 goto done;
8276 case 0xd: /* sub333 */
1c8f6a4d
KLC		 8277 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
8278 N16_RB3 (insn16));
35c08157
KLC		 8279 goto done;
8280 case 0xe: /* addi333 */
1c8f6a4d
KLC		 8281 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
8282 N16_IMM3U (insn16));
35c08157
KLC		 8283 goto done;
8284 case 0xf: /* subi333 */
1c8f6a4d
KLC		 8285 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
8286 -N16_IMM3U (insn16));
35c08157 8287 goto done;
35c08157 8288 case 0x10: /* lwi333 */
1c8f6a4d
KLC		 8289 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
8290 N16_IMM3U (insn16));
35c08157
KLC		 8291 goto done;
8292 case 0x12: /* lhi333 */
1c8f6a4d
KLC		 8293 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
8294 N16_IMM3U (insn16));
35c08157
KLC		 8295 goto done;
8296 case 0x13: /* lbi333 */
1c8f6a4d
KLC		 8297 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
8298 N16_IMM3U (insn16));
35c08157
KLC		 8299 goto done;
8300 case 0x11: /* lwi333.bi */
1c8f6a4d
KLC		 8301 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
8302 N16_IMM3U (insn16));
35c08157
KLC		 8303 goto done;
8304 case 0x14: /* swi333 */
1c8f6a4d
KLC		 8305 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
8306 N16_IMM3U (insn16));
35c08157
KLC		 8307 goto done;
8308 case 0x16: /* shi333 */
1c8f6a4d
KLC		 8309 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
8310 N16_IMM3U (insn16));
35c08157
KLC		 8311 goto done;
8312 case 0x17: /* sbi333 */
1c8f6a4d
KLC		 8313 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
8314 N16_IMM3U (insn16));
35c08157
KLC		 8315 goto done;
8316 case 0x15: /* swi333.bi */
1c8f6a4d
KLC		 8317 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
8318 N16_IMM3U (insn16));
35c08157 8319 goto done;
35c08157 8320 case 0x18: /* addri36.sp */
1c8f6a4d
KLC		 8321 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
8322 N16_IMM6U (insn16) << 2);
35c08157 8323 goto done;
35c08157 8324 case 0x19: /* lwi45.fe */
1c8f6a4d
KLC		 8325 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
8326 (N16_IMM5U (insn16) - 32));
35c08157
KLC		 8327 goto done;
8328 case 0x1a: /* lwi450 */
8329 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
8330 goto done;
8331 case 0x1b: /* swi450 */
8332 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
8333 goto done;
8334
1c8f6a4d 8335 /* These are r15 implied instructions. */
35c08157
KLC		 8336 case 0x30: /* slts45 */
8337 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
8338 goto done;
8339 case 0x31: /* slt45 */
8340 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
8341 goto done;
8342 case 0x32: /* sltsi45 */
8343 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
8344 goto done;
8345 case 0x33: /* slti45 */
8346 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
8347 goto done;
8348 case 0x34: /* beqzs8, bnezs8 */
4ec521f2 8349 if (insn16 & N32_BIT (8))
35c08157
KLC		 8350 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
8351 else
8352 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
8353 goto done;
8354
8355 case 0x35: /* break16, ex9.it */
8356 /* Only consider range of v3 break16. */
8357 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
8358 goto done;
8359
8360 case 0x3c: /* ifcall9 */
fbaf61ad 8361 insn = N32_BR2 (SOP0, 0, N16_IMM9U (insn16));
35c08157
KLC		 8362 goto done;
8363 case 0x3d: /* movpi45 */
8364 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
8365 goto done;
8366
8367 case 0x3f: /* MISC33 */
1c8f6a4d 8368 switch (insn16 & 0x7)
35c08157
KLC		 8369 {
8370 case 2: /* neg33 */
8371 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
8372 break;
8373 case 3: /* not33 */
1c8f6a4d
KLC		 8374 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
8375 N16_RA3 (insn16));
35c08157
KLC		 8376 break;
8377 case 4: /* mul33 */
1c8f6a4d
KLC		 8378 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
8379 N16_RA3 (insn16));
35c08157
KLC		 8380 break;
8381 case 5: /* xor33 */
1c8f6a4d
KLC		 8382 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
8383 N16_RA3 (insn16));
35c08157
KLC		 8384 break;
8385 case 6: /* and33 */
1c8f6a4d
KLC		 8386 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
8387 N16_RA3 (insn16));
35c08157
KLC		 8388 break;
8389 case 7: /* or33 */
1c8f6a4d
KLC		 8390 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
8391 N16_RA3 (insn16));
35c08157
KLC		 8392 break;
8393 }
8394 goto done;
8395
1c8f6a4d 8396 case 0xb:
35c08157
KLC		 8397 switch (insn16 & 0x7)
8398 {
8399 case 0: /* zeb33 */
8400 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
8401 break;
8402 case 1: /* zeh33 */
8403 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
8404 break;
8405 case 2: /* seb33 */
8406 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
8407 break;
8408 case 3: /* seh33 */
8409 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
8410 break;
8411 case 4: /* xlsb33 */
8412 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
8413 break;
8414 case 5: /* x11b33 */
8415 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
8416 break;
8417 case 6: /* bmski33 */
8418 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 8419 1 << __GF (insn16, 3, 3));
35c08157
KLC		 8420 break;
8421 case 7: /* fexti33 */
8422 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 8423 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
35c08157
KLC		 8424 break;
8425 }
8426 goto done;
8427 }
8428
8429 switch (__GF (insn16, 10, 5))
8430 {
8431 case 0x0: /* mov55 or ifret16 */
8432 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
8433 && N16_RT5 (insn16) == N16_RA5 (insn16))
1c8f6a4d 8434 insn = N32_JREG (JR, 0, 0, 0, 3);
35c08157 8435 else
1c8f6a4d 8436 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
35c08157
KLC		 8437 goto done;
8438 case 0x1: /* movi55 */
8439 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
8440 goto done;
8441 case 0x1b: /* addi10s (V2) */
8442 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
8443 goto done;
8444 }
8445
8446 switch (__GF (insn16, 11, 4))
8447 {
8448 case 0x7: /* lwi37.fp/swi37.fp */
4ec521f2 8449 if (insn16 & N32_BIT (7)) /* swi37.fp */
35c08157
KLC		 8450 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
8451 else /* lwi37.fp */
8452 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
8453 goto done;
8454 case 0x8: /* beqz38 */
8455 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
8456 goto done;
8457 case 0x9: /* bnez38 */
8458 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
8459 goto done;
8460 case 0xa: /* beqs38/j8, implied r5 */
8461 if (N16_RT38 (insn16) == 5)
8462 insn = N32_JI (J, N16_IMM8S (insn16));
8463 else
8464 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
8465 goto done;
fbaf61ad 8466 case 0xb: /* bnes38 and others. */
35c08157
KLC		 8467 if (N16_RT38 (insn16) == 5)
8468 {
8469 switch (__GF (insn16, 5, 3))
8470 {
8471 case 0: /* jr5 */
8472 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
8473 break;
8474 case 4: /* ret5 */
8475 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
8476 break;
8477 case 1: /* jral5 */
8478 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
8479 break;
8480 case 2: /* ex9.it imm5 */
8481 /* ex9.it had no 32-bit variantl. */
8482 break;
8483 case 5: /* add5.pc */
8484 /* add5.pc had no 32-bit variantl. */
8485 break;
8486 }
8487 }
8488 else /* bnes38 */
8489 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
8490 goto done;
8491 case 0xe: /* lwi37/swi37 */
8492 if (insn16 & (1 << 7)) /* swi37.sp */
8493 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
8494 else /* lwi37.sp */
8495 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
8496 goto done;
8497 }
8498
dc1e8a47 8499 done:
35c08157
KLC		 8500 if (insn & 0x80000000)
8501 return 0;
8502
8503 if (pinsn)
8504 *pinsn = insn;
8505 return 1;
8506}
8507\f
fbaf61ad 8508
0a1b45a2 8509static bool
35c08157
KLC		 8510is_sda_access_insn (unsigned long insn)
8511{
8512 switch (N32_OP6 (insn))
8513 {
8514 case N32_OP6_LWI:
8515 case N32_OP6_LHI:
8516 case N32_OP6_LHSI:
8517 case N32_OP6_LBI:
8518 case N32_OP6_LBSI:
8519 case N32_OP6_SWI:
8520 case N32_OP6_SHI:
8521 case N32_OP6_SBI:
8522 case N32_OP6_LWC:
8523 case N32_OP6_LDC:
8524 case N32_OP6_SWC:
8525 case N32_OP6_SDC:
0a1b45a2 8526 return true;
35c08157
KLC		 8527 default:
8528 ;
8529 }
0a1b45a2 8530 return false;
35c08157
KLC		 8531}
8532
8533static unsigned long
8534turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
8535{
8536 uint32_t oinsn = 0;
8537
8538 switch (type)
8539 {
8540 case R_NDS32_GOT_LO12:
8541 case R_NDS32_GOTOFF_LO12:
8542 case R_NDS32_PLTREL_LO12:
8543 case R_NDS32_PLT_GOTREL_LO12:
8544 case R_NDS32_LO12S0_RELA:
8545 switch (N32_OP6 (insn))
8546 {
8547 case N32_OP6_LBI:
8548 /* lbi.gp */
8549 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
8550 break;
8551 case N32_OP6_LBSI:
8552 /* lbsi.gp */
4ec521f2 8553 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 8554 break;
8555 case N32_OP6_SBI:
8556 /* sbi.gp */
8557 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
8558 break;
8559 case N32_OP6_ORI:
8560 /* addi.gp */
4ec521f2 8561 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 8562 break;
8563 }
8564 break;
8565
8566 case R_NDS32_LO12S1_RELA:
8567 switch (N32_OP6 (insn))
8568 {
8569 case N32_OP6_LHI:
8570 /* lhi.gp */
8571 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
8572 break;
8573 case N32_OP6_LHSI:
8574 /* lhsi.gp */
4ec521f2 8575 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
35c08157
KLC		 8576 break;
8577 case N32_OP6_SHI:
8578 /* shi.gp */
4ec521f2 8579 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 8580 break;
8581 }
8582 break;
8583
8584 case R_NDS32_LO12S2_RELA:
8585 switch (N32_OP6 (insn))
8586 {
8587 case N32_OP6_LWI:
8588 /* lwi.gp */
8589 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
8590 break;
8591 case N32_OP6_SWI:
8592 /* swi.gp */
8593 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
8594 break;
8595 }
8596 break;
8597
8598 case R_NDS32_LO12S2_DP_RELA:
8599 case R_NDS32_LO12S2_SP_RELA:
8600 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
8601 break;
8602 }
8603
8604 if (oinsn)
8605 *pinsn = oinsn;
8606
8607 return oinsn != 0;
8608}
8609
8610/* Linker hasn't found the correct merge section for non-section symbol
8611 in relax time, this work is left to the function elf_link_input_bfd().
8612 So for non-section symbol, _bfd_merged_section_offset is also needed
8613 to find the correct symbol address. */
8614
8615static bfd_vma
8616nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
8617 asection **psec, Elf_Internal_Rela *rel)
8618{
8619 asection *sec = *psec;
8620 bfd_vma relocation;
8621
8622 relocation = (sec->output_section->vma
8623 + sec->output_offset + sym->st_value);
8624 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
8625 {
8626 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
8627 rel->r_addend =
8628 _bfd_merged_section_offset (abfd, psec,
8629 elf_section_data (sec)->sec_info,
8630 sym->st_value + rel->r_addend);
8631 else
8632 rel->r_addend =
8633 _bfd_merged_section_offset (abfd, psec,
8634 elf_section_data (sec)->sec_info,
8635 sym->st_value) + rel->r_addend;
8636
8637 if (sec != *psec)
8638 {
8639 /* If we have changed the section, and our original section is
8640 marked with SEC_EXCLUDE, it means that the original
8641 SEC_MERGE section has been completely subsumed in some
8642 other SEC_MERGE section. In this case, we need to leave
8643 some info around for --emit-relocs. */
8644 if ((sec->flags & SEC_EXCLUDE) != 0)
8645 sec->kept_section = *psec;
8646 sec = *psec;
8647 }
8648 rel->r_addend -= relocation;
8649 rel->r_addend += sec->output_section->vma + sec->output_offset;
8650 }
8651 return relocation;
8652}
8653
8654static bfd_vma
8655calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
8656 Elf_Internal_Sym *isymbuf,
8657 Elf_Internal_Shdr *symtab_hdr)
8658{
8659 bfd_signed_vma foff;
8660 bfd_vma symval, addend;
8661 Elf_Internal_Rela irel_fn;
8662 Elf_Internal_Sym *isym;
8663 asection *sym_sec;
8664
8665 /* Get the value of the symbol referred to by the reloc. */
8666 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
8667 {
8668 /* A local symbol. */
8669 isym = isymbuf + ELF32_R_SYM (irel->r_info);
8670
8671 if (isym->st_shndx == SHN_UNDEF)
8672 sym_sec = bfd_und_section_ptr;
8673 else if (isym->st_shndx == SHN_ABS)
8674 sym_sec = bfd_abs_section_ptr;
8675 else if (isym->st_shndx == SHN_COMMON)
8676 sym_sec = bfd_com_section_ptr;
8677 else
8678 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8679 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
8680 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
8681 addend = irel_fn.r_addend;
8682 }
8683 else
8684 {
8685 unsigned long indx;
8686 struct elf_link_hash_entry *h;
8687
8688 /* An external symbol. */
8689 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8690 h = elf_sym_hashes (abfd)[indx];
8691 BFD_ASSERT (h != NULL);
8692
8693 while (h->root.type == bfd_link_hash_indirect
8694 || h->root.type == bfd_link_hash_warning)
8695 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8696
8697 if (h->root.type != bfd_link_hash_defined
8698 && h->root.type != bfd_link_hash_defweak)
8699 /* This appears to be a reference to an undefined
8700 symbol. Just ignore it--it will be caught by the
8701 regular reloc processing. */
8702 return 0;
8703
8704 if (h->root.u.def.section->flags & SEC_MERGE)
8705 {
8706 sym_sec = h->root.u.def.section;
8707 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
8708 (sym_sec)->sec_info, h->root.u.def.value);
8709 symval = symval + sym_sec->output_section->vma
8710 + sym_sec->output_offset;
8711 }
8712 else
8713 symval = (h->root.u.def.value
8714 + h->root.u.def.section->output_section->vma
8715 + h->root.u.def.section->output_offset);
8716 addend = irel->r_addend;
8717 }
8718
8719 foff = symval + addend;
8720
8721 return foff;
8722}
8723
35c08157
KLC		 8724static int
8725is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
8726 asection *sec, Elf_Internal_Rela *rel)
8727{
8728 bfd_byte *contents;
8729 unsigned short insn16;
8730
8731 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
0a1b45a2 8732 return false;
35c08157
KLC		 8733 contents = elf_section_data (sec)->this_hdr.contents;
8734 insn16 = bfd_getb16 (contents + rel->r_offset);
8735 if (insn16 == NDS32_NOP16)
0a1b45a2
AM		 8736 return true;
8737 return false;
35c08157
KLC		 8738}
8739
8740/* It checks whether the instruction could be converted to
8741 16-bit form and returns the converted one.
8742
8743 `internal_relocs' is supposed to be sorted. */
8744
8745static int
8746is_convert_32_to_16 (bfd *abfd, asection *sec,
8747 Elf_Internal_Rela *reloc,
8748 Elf_Internal_Rela *internal_relocs,
8749 Elf_Internal_Rela *irelend,
8750 uint16_t *insn16)
8751{
8752#define NORMAL_32_TO_16 (1 << 0)
8753#define SPECIAL_32_TO_16 (1 << 1)
8754 bfd_byte *contents = NULL;
8755 bfd_signed_vma off;
8756 bfd_vma mem_addr;
8757 uint32_t insn = 0;
8758 Elf_Internal_Rela *pc_rel;
35c08157
KLC		 8759 Elf_Internal_Shdr *symtab_hdr;
8760 Elf_Internal_Sym *isymbuf = NULL;
8761 int convert_type;
8762 bfd_vma offset;
8763
8764 if (reloc->r_offset + 4 > sec->size)
0a1b45a2 8765 return false;
35c08157
KLC		 8766
8767 offset = reloc->r_offset;
8768
0a1b45a2
AM		 8769 if (!nds32_get_section_contents (abfd, sec, &contents, true))
8770 return false;
35c08157
KLC		 8771 insn = bfd_getb32 (contents + offset);
8772
8773 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
8774 convert_type = NORMAL_32_TO_16;
8775 else if (special_convert_32_to_16 (insn, insn16, reloc))
8776 convert_type = SPECIAL_32_TO_16;
8777 else
0a1b45a2 8778 return false;
35c08157
KLC		 8779
8780 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8781 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
0a1b45a2 8782 return false;
35c08157
KLC		 8783
8784 /* Find the first relocation of the same relocation-type,
8785 so we iteratie them forward. */
8786 pc_rel = reloc;
1c8f6a4d 8787 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
35c08157
KLC		 8788 pc_rel--;
8789
8790 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8791 {
8792 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8793 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8794 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
8795 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8796 {
fbaf61ad 8797 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr);
1c8f6a4d
KLC		 8798 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
8799 || off == 0)
0a1b45a2 8800 return false;
35c08157
KLC		 8801 break;
8802 }
8803 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8804 {
8805 /* movi => movi55 */
1c8f6a4d
KLC		 8806 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
8807 symtab_hdr);
8808 /* mem_addr is unsigned, but the value should
8809 be between [-16, 15]. */
35c08157 8810 if ((mem_addr + 0x10) >> 5)
0a1b45a2 8811 return false;
35c08157
KLC		 8812 break;
8813 }
1c8f6a4d
KLC		 8814 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
8815 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
8816 {
8817 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
8818 because it can be relaxed to addi for TLS_LE_ADD. */
0a1b45a2 8819 return false;
1c8f6a4d 8820 }
35c08157
KLC		 8821 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8822 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8823 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
8824 && convert_type == SPECIAL_32_TO_16)
8825 {
8826 /* fp-as-gp
8827 We've selected a best fp-base for this access, so we can
8828 always resolve it anyway. Do nothing. */
8829 break;
8830 }
8831 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
8832 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
8833 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
8834 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
8835 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
8836 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
8837 {
1c8f6a4d
KLC		 8838 /* Prevent unresolved addi instruction translate
8839 to addi45 or addi333. */
0a1b45a2 8840 return false;
35c08157 8841 }
1c8f6a4d
KLC		 8842 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8843 {
fbaf61ad 8844 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr);
1c8f6a4d 8845 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
0a1b45a2 8846 return false;
1c8f6a4d
KLC		 8847 break;
8848 }
35c08157
KLC		 8849 }
8850
0a1b45a2 8851 return true;
35c08157
KLC		 8852}
8853
8854static void
8855nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8856 Elf_Internal_Rela *reloc,
8857 Elf_Internal_Rela *internal_relocs,
8858 Elf_Internal_Rela *irelend,
8859 unsigned short insn16)
8860{
8861 Elf_Internal_Rela *pc_rel;
8862 bfd_vma offset;
8863
8864 offset = reloc->r_offset;
8865 bfd_putb16 (insn16, contents + offset);
8866 /* Find the first relocation of the same relocation-type,
8867 so we iteratie them forward. */
8868 pc_rel = reloc;
8869 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8870 pc_rel--;
8871
8872 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8873 {
8874 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8875 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8876 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8877 {
8878 pc_rel->r_info =
8879 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8880 }
8881 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8882 pc_rel->r_info =
8883 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8884 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8885 pc_rel->r_info =
8886 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8887 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8888 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8889 pc_rel->r_info =
8890 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
1c8f6a4d
KLC		 8891 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8892 pc_rel->r_info =
8893 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 8894 }
8895}
8896
8897/* Find a relocation of type specified by `reloc_type'
8898 of the same r_offset with reloc.
8899 If not found, return irelend.
8900
8901 Assuming relocations are sorted by r_offset,
8902 we find the relocation from `reloc' backward untill relocs,
8903 or find it from `reloc' forward untill irelend. */
8904
8905static Elf_Internal_Rela *
8906find_relocs_at_address (Elf_Internal_Rela *reloc,
8907 Elf_Internal_Rela *relocs,
8908 Elf_Internal_Rela *irelend,
8909 enum elf_nds32_reloc_type reloc_type)
8910{
8911 Elf_Internal_Rela *rel_t;
8912
8913 /* Find backward. */
8914 for (rel_t = reloc;
8915 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8916 rel_t--)
8917 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8918 return rel_t;
8919
1c8f6a4d 8920 /* We didn't find it backward. Try find it forward. */
35c08157
KLC		 8921 for (rel_t = reloc;
8922 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8923 rel_t++)
8924 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8925 return rel_t;
8926
8927 return irelend;
8928}
8929
8930/* Find a relocation of specified type and offset.
8931 `reloc' is just a refence point to find a relocation at specified offset.
8932 If not found, return irelend.
8933
8934 Assuming relocations are sorted by r_offset,
8935 we find the relocation from `reloc' backward untill relocs,
8936 or find it from `reloc' forward untill irelend. */
8937
8938static Elf_Internal_Rela *
8939find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8940 Elf_Internal_Rela *relocs,
8941 Elf_Internal_Rela *irelend,
6cae483a 8942 enum elf_nds32_reloc_type reloc_type,
35c08157
KLC		 8943 bfd_vma offset_p)
8944{
8945 Elf_Internal_Rela *rel_t = NULL;
8946
8947 /* First, we try to find a relocation of offset `offset_p',
8948 and then we use find_relocs_at_address to find specific type. */
8949
8950 if (reloc->r_offset > offset_p)
8951 {
8952 /* Find backward. */
8953 for (rel_t = reloc;
8954 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8955 /* Do nothing. */;
8956 }
8957 else if (reloc->r_offset < offset_p)
8958 {
8959 /* Find forward. */
8960 for (rel_t = reloc;
8961 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8962 /* Do nothing. */;
8963 }
8964 else
8965 rel_t = reloc;
8966
8967 /* Not found? */
8968 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8969 return irelend;
8970
8971 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8972}
8973
fbaf61ad
NC		 8974typedef struct nds32_elf_blank nds32_elf_blank_t;
8975struct nds32_elf_blank
35c08157 8976{
fbaf61ad
NC		 8977 /* Where the blank begins. */
8978 bfd_vma offset;
8979 /* The size of the blank. */
8980 bfd_vma size;
8981 /* The accumulative size before this blank. */
8982 bfd_vma total_size;
8983 nds32_elf_blank_t *next;
8984 nds32_elf_blank_t *prev;
8985};
35c08157
KLC		 8986
8987static nds32_elf_blank_t *blank_free_list = NULL;
8988
8989static nds32_elf_blank_t *
8990create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8991{
8992 nds32_elf_blank_t *blank_t;
8993
8994 if (blank_free_list)
8995 {
8996 blank_t = blank_free_list;
8997 blank_free_list = blank_free_list->next;
8998 }
8999 else
9000 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
9001
9002 if (blank_t == NULL)
9003 return NULL;
9004
9005 blank_t->offset = offset_p;
9006 blank_t->size = size_p;
9007 blank_t->total_size = 0;
9008 blank_t->next = NULL;
9009 blank_t->prev = NULL;
9010
9011 return blank_t;
9012}
9013
9014static void
9015remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
9016{
9017 if (blank_free_list)
9018 {
9019 blank_free_list->prev = blank_p;
9020 blank_p->next = blank_free_list;
9021 }
9022 else
9023 blank_p->next = NULL;
9024
9025 blank_p->prev = NULL;
9026 blank_free_list = blank_p;
9027}
9028
9029static void
9030clean_nds32_elf_blank (void)
9031{
9032 nds32_elf_blank_t *blank_t;
9033
9034 while (blank_free_list)
9035 {
9036 blank_t = blank_free_list;
9037 blank_free_list = blank_free_list->next;
9038 free (blank_t);
9039 }
9040}
9041
9042static nds32_elf_blank_t *
9043search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
9044{
9045 nds32_elf_blank_t *blank_t;
9046
9047 if (!blank_p)
9048 return NULL;
9049 blank_t = blank_p;
9050
9051 while (blank_t && addr < blank_t->offset)
9052 blank_t = blank_t->prev;
9053 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
9054 blank_t = blank_t->next;
9055
9056 return blank_t;
9057}
9058
9059static bfd_vma
9060get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
9061 int overwrite)
9062{
9063 nds32_elf_blank_t *blank_t;
9064
9065 blank_t = search_nds32_elf_blank (*blank_p, addr);
9066 if (!blank_t)
9067 return 0;
9068
9069 if (overwrite)
9070 *blank_p = blank_t;
9071
9072 if (addr < blank_t->offset + blank_t->size)
9073 return blank_t->total_size + (addr - blank_t->offset);
9074 else
9075 return blank_t->total_size + blank_t->size;
9076}
9077
0a1b45a2 9078static bool
35c08157
KLC		 9079insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
9080{
9081 nds32_elf_blank_t *blank_t, *blank_t2;
9082
9083 if (!*blank_p)
9084 {
9085 *blank_p = create_nds32_elf_blank (addr, len);
63b4cc53 9086 return *blank_p != NULL;
35c08157
KLC		 9087 }
9088
9089 blank_t = search_nds32_elf_blank (*blank_p, addr);
9090
9091 if (blank_t == NULL)
9092 {
9093 blank_t = create_nds32_elf_blank (addr, len);
9094 if (!blank_t)
0a1b45a2 9095 return false;
35c08157
KLC		 9096 while ((*blank_p)->prev != NULL)
9097 *blank_p = (*blank_p)->prev;
9098 blank_t->next = *blank_p;
9099 (*blank_p)->prev = blank_t;
9100 (*blank_p) = blank_t;
0a1b45a2 9101 return true;
35c08157
KLC		 9102 }
9103
9104 if (addr < blank_t->offset + blank_t->size)
9105 {
fbaf61ad
NC		 9106 /* Extend the origin blank. */
9107 if (addr + len > blank_t->offset + blank_t->size)
9108 blank_t->size = addr + len - blank_t->offset;
35c08157
KLC		 9109 }
9110 else
9111 {
9112 blank_t2 = create_nds32_elf_blank (addr, len);
9113 if (!blank_t2)
0a1b45a2 9114 return false;
35c08157
KLC		 9115 if (blank_t->next)
9116 {
9117 blank_t->next->prev = blank_t2;
9118 blank_t2->next = blank_t->next;
9119 }
9120 blank_t2->prev = blank_t;
9121 blank_t->next = blank_t2;
9122 *blank_p = blank_t2;
9123 }
9124
0a1b45a2 9125 return true;
35c08157
KLC		 9126}
9127
0a1b45a2 9128static bool
35c08157
KLC		 9129insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
9130 bfd_vma len)
9131{
9132 nds32_elf_blank_t *blank_t;
9133
9134 if (!insert_nds32_elf_blank (blank_p, addr, len))
0a1b45a2 9135 return false;
35c08157
KLC		 9136
9137 blank_t = *blank_p;
9138
9139 if (!blank_t->prev)
9140 {
9141 blank_t->total_size = 0;
9142 blank_t = blank_t->next;
9143 }
9144
9145 while (blank_t)
9146 {
9147 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
9148 blank_t = blank_t->next;
9149 }
9150
0a1b45a2 9151 return true;
35c08157
KLC		 9152}
9153
9154static void
9155calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
9156{
9157 nds32_elf_blank_t *blank_t;
9158 bfd_vma total_size = 0;
9159
9160 if (!blank_p)
9161 return;
9162
9163 blank_t = blank_p;
9164 while (blank_t->prev)
9165 blank_t = blank_t->prev;
9166 while (blank_t)
9167 {
9168 blank_t->total_size = total_size;
9169 total_size += blank_t->size;
9170 blank_t = blank_t->next;
9171 }
9172}
9173
0a1b45a2 9174static bool
35c08157
KLC		 9175nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
9176 nds32_elf_blank_t *blank_p)
9177{
9178 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
1c8f6a4d 9179 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
35c08157
KLC		 9180 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
9181 unsigned int sec_shndx; /* The section the be relaxed. */
9182 bfd_byte *contents; /* Contents data of iterating section. */
9183 Elf_Internal_Rela *internal_relocs;
9184 Elf_Internal_Rela *irel;
9185 Elf_Internal_Rela *irelend;
9186 struct elf_link_hash_entry **sym_hashes;
9187 struct elf_link_hash_entry **end_hashes;
9188 unsigned int symcount;
9189 asection *sect;
9190 nds32_elf_blank_t *blank_t;
9191 nds32_elf_blank_t *blank_t2;
9192 nds32_elf_blank_t *blank_head;
9193
9194 blank_head = blank_t = blank_p;
9195 while (blank_head->prev != NULL)
9196 blank_head = blank_head->prev;
9197 while (blank_t->next != NULL)
9198 blank_t = blank_t->next;
9199
9200 if (blank_t->offset + blank_t->size <= sec->size)
9201 {
9202 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
9203 blank_t->next->prev = blank_t;
9204 }
9205 if (blank_head->offset > 0)
9206 {
9207 blank_head->prev = create_nds32_elf_blank (0, 0);
9208 blank_head->prev->next = blank_head;
9209 blank_head = blank_head->prev;
9210 }
9211
9212 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
9213
9214 /* The deletion must stop at the next ALIGN reloc for an alignment
9215 power larger than the number of bytes we are deleting. */
9216
9217 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
9218 if (!nds32_get_local_syms (abfd, sec, &isym))
0a1b45a2 9219 return false;
35c08157
KLC		 9220
9221 if (isym == NULL)
9222 {
9223 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
9224 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
9225 symtab_hdr->contents = (bfd_byte *) isym;
9226 }
9227
9228 if (isym == NULL || symtab_hdr->sh_info == 0)
0a1b45a2 9229 return false;
35c08157
KLC		 9230
9231 blank_t = blank_head;
9232 calc_nds32_blank_total (blank_head);
9233
9234 for (sect = abfd->sections; sect != NULL; sect = sect->next)
9235 {
9236 /* Adjust all the relocs. */
9237
9238 /* Relocations MUST be kept in memory, because relaxation adjust them. */
9239 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
0a1b45a2 9240 true /* keep_memory */);
35c08157
KLC		 9241 irelend = internal_relocs + sect->reloc_count;
9242
9243 blank_t = blank_head;
9244 blank_t2 = blank_head;
9245
9246 if (!(sect->flags & SEC_RELOC))
9247 continue;
9248
1781a9d0 9249 contents = NULL;
0a1b45a2 9250 nds32_get_section_contents (abfd, sect, &contents, true);
35c08157
KLC		 9251
9252 for (irel = internal_relocs; irel < irelend; irel++)
9253 {
9254 bfd_vma raddr;
9255
9256 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
9257 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
9258 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
9259 {
9260 unsigned long val = 0;
1c8f6a4d
KLC		 9261 unsigned long mask;
9262 long before, between;
6cae483a 9263 long offset = 0;
35c08157
KLC		 9264
9265 switch (ELF32_R_TYPE (irel->r_info))
9266 {
9267 case R_NDS32_DIFF8:
1c8f6a4d 9268 offset = bfd_get_8 (abfd, contents + irel->r_offset);
35c08157
KLC		 9269 break;
9270 case R_NDS32_DIFF16:
1c8f6a4d 9271 offset = bfd_get_16 (abfd, contents + irel->r_offset);
35c08157
KLC		 9272 break;
9273 case R_NDS32_DIFF32:
9274 val = bfd_get_32 (abfd, contents + irel->r_offset);
1c8f6a4d
KLC		 9275 /* Get the signed bit and mask for the high part. The
9276 gcc will alarm when right shift 32-bit since the
9277 type size of long may be 32-bit. */
9278 mask = 0 - (val >> 31);
9279 if (mask)
9280 offset = (val | (mask - 0xffffffff));
9281 else
9282 offset = val;
35c08157
KLC		 9283 break;
9284 default:
9285 BFD_ASSERT (0);
9286 }
9287
9288 /* DIFF value
9289 0 |encoded in location|
9290 |------------|-------------------|---------
9291 sym+off(addend)
9292 -- before ---| *****************
9293 --------------------- between ---|
9294
1c8f6a4d
KLC		 9295 We only care how much data are relax between DIFF,
9296 marked as ***. */
35c08157
KLC		 9297
9298 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 9299 between = get_nds32_elf_blank_total (&blank_t,
9300 irel->r_addend + offset, 0);
35c08157
KLC		 9301 if (between == before)
9302 goto done_adjust_diff;
9303
9304 switch (ELF32_R_TYPE (irel->r_info))
9305 {
9306 case R_NDS32_DIFF8:
1c8f6a4d
KLC		 9307 bfd_put_8 (abfd, offset - (between - before),
9308 contents + irel->r_offset);
35c08157
KLC		 9309 break;
9310 case R_NDS32_DIFF16:
1c8f6a4d
KLC		 9311 bfd_put_16 (abfd, offset - (between - before),
9312 contents + irel->r_offset);
35c08157
KLC		 9313 break;
9314 case R_NDS32_DIFF32:
1c8f6a4d
KLC		 9315 bfd_put_32 (abfd, offset - (between - before),
9316 contents + irel->r_offset);
35c08157
KLC		 9317 break;
9318 }
9319 }
9320 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
9321 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
9322 {
9323 bfd_vma val = 0;
9324 unsigned int len = 0;
9325 unsigned long before, between;
9326 bfd_byte *endp, *p;
9327
4265548c
PA		 9328 val = _bfd_read_unsigned_leb128 (abfd, contents + irel->r_offset,
9329 &len);
35c08157
KLC		 9330
9331 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 9332 between = get_nds32_elf_blank_total (&blank_t,
9333 irel->r_addend + val, 0);
35c08157
KLC		 9334 if (between == before)
9335 goto done_adjust_diff;
9336
9337 p = contents + irel->r_offset;
9338 endp = p + len -1;
9339 memset (p, 0x80, len);
9340 *(endp) = 0;
9341 p = write_uleb128 (p, val - (between - before)) - 1;
9342 if (p < endp)
9343 *p |= 0x80;
9344 }
dc1e8a47 9345 done_adjust_diff:
35c08157
KLC		 9346
9347 if (sec == sect)
9348 {
9349 raddr = irel->r_offset;
1c8f6a4d
KLC		 9350 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
9351 irel->r_offset, 1);
35c08157
KLC		 9352
9353 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
9354 continue;
9355 if (blank_t2 && blank_t2->next
1c8f6a4d
KLC		 9356 && (blank_t2->offset > raddr
9357 || blank_t2->next->offset <= raddr))
4eca0228 9358 _bfd_error_handler
38f14ab8
AM		 9359 (_("%pB: error: search_nds32_elf_blank reports wrong node"),
9360 abfd);
35c08157
KLC		 9361
9362 /* Mark reloc in deleted portion as NONE.
9363 For some relocs like R_NDS32_LABEL that doesn't modify the
9364 content in the section. R_NDS32_LABEL doesn't belong to the
9365 instruction in the section, so we should preserve it. */
9366 if (raddr >= blank_t2->offset
9367 && raddr < blank_t2->offset + blank_t2->size
9368 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
9369 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
9370 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
9371 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
9372 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
9373 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
9374 {
9375 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
9376 R_NDS32_NONE);
9377 continue;
9378 }
9379 }
9380
9381 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
9382 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
9383 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
9384 continue;
9385
9386 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
9387 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
9388 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
9389 {
9390 if (irel->r_addend <= sec->size)
9391 irel->r_addend -=
9392 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
9393 }
9394 }
9395 }
9396
9397 /* Adjust the local symbols defined in this section. */
9398 blank_t = blank_head;
9399 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
9400 {
9401 if (isym->st_shndx == sec_shndx)
9402 {
9403 if (isym->st_value <= sec->size)
9404 {
9405 bfd_vma ahead;
9406 bfd_vma orig_addr = isym->st_value;
9407
9408 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
9409 isym->st_value -= ahead;
9410
9411 /* Adjust function size. */
1c8f6a4d
KLC		 9412 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
9413 && isym->st_size > 0)
9414 isym->st_size -=
9415 get_nds32_elf_blank_total
9416 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
35c08157
KLC		 9417 }
9418 }
9419 }
9420
9421 /* Now adjust the global symbols defined in this section. */
9422 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
9423 - symtab_hdr->sh_info);
9424 sym_hashes = elf_sym_hashes (abfd);
9425 end_hashes = sym_hashes + symcount;
9426 blank_t = blank_head;
9427 for (; sym_hashes < end_hashes; sym_hashes++)
9428 {
9429 struct elf_link_hash_entry *sym_hash = *sym_hashes;
9430
9431 if ((sym_hash->root.type == bfd_link_hash_defined
9432 || sym_hash->root.type == bfd_link_hash_defweak)
9433 && sym_hash->root.u.def.section == sec)
9434 {
9435 if (sym_hash->root.u.def.value <= sec->size)
9436 {
9437 bfd_vma ahead;
9438 bfd_vma orig_addr = sym_hash->root.u.def.value;
9439
9440 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
9441 sym_hash->root.u.def.value -= ahead;
9442
9443 /* Adjust function size. */
9444 if (sym_hash->type == STT_FUNC)
1c8f6a4d
KLC		 9445 sym_hash->size -=
9446 get_nds32_elf_blank_total
9447 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
35c08157
KLC		 9448
9449 }
9450 }
9451 }
9452
9453 contents = elf_section_data (sec)->this_hdr.contents;
9454 blank_t = blank_head;
9455 while (blank_t->next)
9456 {
9457 /* Actually delete the bytes. */
9458
9459 /* If current blank is the last blank overlap with current section,
9460 go to finish process. */
9461 if (sec->size <= (blank_t->next->offset))
9462 break;
9463
9464 memmove (contents + blank_t->offset - blank_t->total_size,
9465 contents + blank_t->offset + blank_t->size,
9466 blank_t->next->offset - (blank_t->offset + blank_t->size));
9467
9468 blank_t = blank_t->next;
9469 }
9470
9471 if (sec->size > (blank_t->offset + blank_t->size))
9472 {
9473 /* There are remaining code between blank and section boundary.
9474 Move the remaining code to appropriate location. */
9475 memmove (contents + blank_t->offset - blank_t->total_size,
9476 contents + blank_t->offset + blank_t->size,
9477 sec->size - (blank_t->offset + blank_t->size));
9478 sec->size -= blank_t->total_size + blank_t->size;
9479 }
9480 else
9481 /* This blank is not entirely included in the section,
9482 reduce the section size by only part of the blank size. */
9483 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
9484
9485 while (blank_head)
9486 {
9487 blank_t = blank_head;
9488 blank_head = blank_head->next;
9489 remove_nds32_elf_blank (blank_t);
9490 }
9491
0a1b45a2 9492 return true;
35c08157
KLC		 9493}
9494
9495/* Get the contents of a section. */
9496
9497static int
0c4bd9d9 9498nds32_get_section_contents (bfd *abfd, asection *sec,
0a1b45a2 9499 bfd_byte **contents_p, bool cache)
35c08157
KLC		 9500{
9501 /* Get the section contents. */
9502 if (elf_section_data (sec)->this_hdr.contents != NULL)
9503 *contents_p = elf_section_data (sec)->this_hdr.contents;
9504 else
9505 {
1781a9d0 9506 if (!bfd_get_full_section_contents (abfd, sec, contents_p))
0a1b45a2 9507 return false;
0c4bd9d9
KLC		 9508 if (cache)
9509 elf_section_data (sec)->this_hdr.contents = *contents_p;
35c08157
KLC		 9510 }
9511
0a1b45a2 9512 return true;
35c08157
KLC		 9513}
9514
9515/* Get the contents of the internal symbol of abfd. */
9516
9517static int
9518nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
9519 Elf_Internal_Sym **isymbuf_p)
9520{
9521 Elf_Internal_Shdr *symtab_hdr;
9522 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
9523
9524 /* Read this BFD's local symbols if we haven't done so already. */
9525 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
9526 {
9527 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
9528 if (*isymbuf_p == NULL)
9529 {
9530 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
9531 symtab_hdr->sh_info, 0,
9532 NULL, NULL, NULL);
9533 if (*isymbuf_p == NULL)
0a1b45a2 9534 return false;
35c08157
KLC		 9535 }
9536 }
9537 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
9538
0a1b45a2 9539 return true;
35c08157
KLC		 9540}
9541
9542/* Range of small data. */
1c8f6a4d
KLC		 9543static bfd_vma sdata_range[2][2];
9544static bfd_vma const sdata_init_range[2] =
9545{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
35c08157
KLC		 9546
9547static int
9548nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
9549 bfd_byte *contents, bfd_vma addr)
9550{
9551 unsigned long insn = bfd_getb32 (contents + addr);
9552
9553 if (insn & 0x80000000)
9554 return 2;
9555
9556 return 4;
9557}
9558
9559/* Set the gp relax range. We have to measure the safe range
9560 to do gp relaxation. */
9561
9562static void
c410035d 9563relax_range_measurement (bfd *abfd, struct bfd_link_info *link_info)
35c08157
KLC		 9564{
9565 asection *sec_f, *sec_b;
9566 /* For upper bound. */
c410035d 9567 bfd_vma maxpgsz;
35c08157 9568 bfd_vma align;
35c08157
KLC		 9569 static int decide_relax_range = 0;
9570 int i;
fbaf61ad 9571 int range_number = ARRAY_SIZE (sdata_init_range);
35c08157
KLC		 9572
9573 if (decide_relax_range)
9574 return;
9575 decide_relax_range = 1;
9576
9577 if (sda_rela_sec == NULL)
9578 {
9579 /* Since there is no data sections, we assume the range is page size. */
1c8f6a4d 9580 for (i = 0; i < range_number; i++)
35c08157
KLC		 9581 {
9582 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
9583 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
9584 }
9585 return;
9586 }
9587
9588 /* Get the biggest alignment power after the gp located section. */
9589 sec_f = sda_rela_sec->output_section;
9590 sec_b = sec_f->next;
9591 align = 0;
9592 while (sec_b != NULL)
9593 {
9594 if ((unsigned)(1 << sec_b->alignment_power) > align)
9595 align = (1 << sec_b->alignment_power);
9596 sec_b = sec_b->next;
9597 }
9598
c410035d
AM		 9599 if (link_info != NULL)
9600 maxpgsz = link_info->maxpagesize;
9601 else
9602 maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
35c08157
KLC		 9603 /* I guess we can not determine the section before
9604 gp located section, so we assume the align is max page size. */
1c8f6a4d 9605 for (i = 0; i < range_number; i++)
35c08157 9606 {
1c8f6a4d 9607 sdata_range[i][1] = sdata_init_range[i] - align;
35c08157 9608 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
1c8f6a4d 9609 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
35c08157
KLC		 9610 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
9611 }
9612}
9613
9614/* These are macros used to check flags encoded in r_addend.
9615 They are only used by nds32_elf_relax_section (). */
9616#define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
9617#define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
9618#define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
9619#define IS_16BIT_ON(addend) ((addend) & 0x20000000)
9620
695344c0
NC		 9621static const char * unrecognized_reloc_msg =
9622 /* xgettext:c-format */
2dcf00ce 9623 N_("%pB: warning: %s points to unrecognized reloc at %#" PRIx64);
695344c0 9624
1c8f6a4d
KLC		 9625/* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
9626
0a1b45a2 9627static bool
1c8f6a4d
KLC		 9628nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9629 Elf_Internal_Rela *internal_relocs, int *insn_len,
9630 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9631 Elf_Internal_Shdr *symtab_hdr)
9632{
9633 /* There are 3 variations for LONGCALL1
9634 case 4-4-2; 16-bit on, optimize off or optimize for space
07d6d2b8 9635 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 9636 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9637 jral5 ta ;
1c8f6a4d
KLC		 9638
9639 case 4-4-4; 16-bit off, optimize don't care
07d6d2b8 9640 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 9641 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9642 jral ta ;
1c8f6a4d
KLC		 9643
9644 case 4-4-4; 16-bit on, optimize for speed
07d6d2b8 9645 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 9646 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9647 jral ta ;
1c8f6a4d
KLC		 9648 Check code for -mlong-calls output. */
9649
9650 /* Get the reloc for the address from which the register is
9651 being loaded. This reloc will tell us which function is
9652 actually being called. */
9653
9654 bfd_vma laddr;
9655 int seq_len; /* Original length of instruction sequence. */
35c08157 9656 uint32_t insn;
1c8f6a4d 9657 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
1c8f6a4d 9658 bfd_signed_vma foff;
35c08157 9659 uint16_t insn16;
35c08157 9660
1c8f6a4d
KLC		 9661 irelend = internal_relocs + sec->reloc_count;
9662 seq_len = GET_SEQ_LEN (irel->r_addend);
9663 laddr = irel->r_offset;
9664 *insn_len = seq_len;
35c08157 9665
1c8f6a4d
KLC		 9666 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9667 R_NDS32_HI20_RELA, laddr);
9668 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9669 R_NDS32_LO12S0_ORI_RELA,
9670 laddr + 4);
35c08157 9671
1c8f6a4d 9672 if (hi_irelfn == irelend || lo_irelfn == irelend)
35c08157 9673 {
695344c0 9674 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL1",
2dcf00ce 9675 (uint64_t) irel->r_offset);
0a1b45a2 9676 return false;
35c08157
KLC		 9677 }
9678
1c8f6a4d 9679 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 9680 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr);
35c08157 9681
1c8f6a4d 9682 /* This condition only happened when symbol is undefined. */
fbaf61ad
NC		 9683 if (foff == 0
9684 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 9685 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 9686 return false;
35c08157 9687
fbaf61ad 9688 /* Relax to: jal symbol; 25_PCREL. */
1c8f6a4d
KLC		 9689 /* For simplicity of coding, we are going to modify the section
9690 contents, the section relocs, and the BFD symbol table. We
9691 must tell the rest of the code not to free up this
9692 information. It would be possible to instead create a table
9693 of changes which have to be made, as is done in coff-mips.c;
9694 that would be more work, but would require less memory when
9695 the linker is run. */
9696
9697 /* Replace the long call with a jal. */
9698 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9699 R_NDS32_25_PCREL_RELA);
9700 irel->r_addend = hi_irelfn->r_addend;
9701
9702 /* We don't resolve this here but resolve it in relocate_section. */
9703 insn = INSN_JAL;
9704 bfd_putb32 (insn, contents + irel->r_offset);
9705
9706 hi_irelfn->r_info =
9707 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9708 lo_irelfn->r_info =
9709 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9710 *insn_len = 4;
9711
9712 if (seq_len & 0x2)
9713 {
9714 insn16 = NDS32_NOP16;
9715 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9716 lo_irelfn->r_info =
9717 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9718 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9719 *insn_len += 2;
9720 }
0a1b45a2 9721 return true;
1c8f6a4d 9722}
35c08157 9723
1c8f6a4d
KLC		 9724#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
9725/* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
35c08157 9726
0a1b45a2 9727static bool
1c8f6a4d
KLC		 9728nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9729 Elf_Internal_Rela *internal_relocs, int *insn_len,
9730 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9731 Elf_Internal_Shdr *symtab_hdr)
9732{
9733 /* bltz rt, .L1 ; LONGCALL2
9734 jal symbol ; 25_PCREL
9735 .L1: */
35c08157 9736
1c8f6a4d
KLC		 9737 /* Get the reloc for the address from which the register is
9738 being loaded. This reloc will tell us which function is
9739 actually being called. */
35c08157 9740
1c8f6a4d
KLC		 9741 bfd_vma laddr;
9742 uint32_t insn;
9743 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
1c8f6a4d 9744 bfd_signed_vma foff;
35c08157 9745
1c8f6a4d
KLC		 9746 irelend = internal_relocs + sec->reloc_count;
9747 laddr = irel->r_offset;
9748 i1_irelfn =
9749 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9750 R_NDS32_25_PCREL_RELA, laddr + 4);
9751
9752 if (i1_irelfn == irelend)
35c08157 9753 {
695344c0 9754 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL2",
2dcf00ce 9755 (uint64_t) irel->r_offset);
0a1b45a2 9756 return false;
35c08157
KLC		 9757 }
9758
1c8f6a4d 9759 insn = bfd_getb32 (contents + laddr);
35c08157 9760
1c8f6a4d 9761 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 9762 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr);
35c08157 9763
fbaf61ad
NC		 9764 if (foff == 0
9765 || foff < -CONSERVATIVE_16BIT_S1
1c8f6a4d 9766 || foff >= CONSERVATIVE_16BIT_S1)
0a1b45a2 9767 return false;
35c08157 9768
1c8f6a4d
KLC		 9769 /* Relax to bgezal rt, label ; 17_PCREL
9770 or bltzal rt, label ; 17_PCREL */
9771
9772 /* Convert to complimentary conditional call. */
9773 insn = CONVERT_CONDITION_CALL (insn);
9774
9775 /* For simplicity of coding, we are going to modify the section
9776 contents, the section relocs, and the BFD symbol table. We
9777 must tell the rest of the code not to free up this
9778 information. It would be possible to instead create a table
9779 of changes which have to be made, as is done in coff-mips.c;
9780 that would be more work, but would require less memory when
9781 the linker is run. */
9782
9783 /* Clean unnessary relocations. */
9784 i1_irelfn->r_info =
9785 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
9786 cond_irelfn =
9787 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9788 R_NDS32_17_PCREL_RELA, laddr);
9789 if (cond_irelfn != irelend)
9790 cond_irelfn->r_info =
9791 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
9792
9793 /* Replace the long call with a bgezal. */
9794 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9795 R_NDS32_17_PCREL_RELA);
9796 irel->r_addend = i1_irelfn->r_addend;
9797
9798 bfd_putb32 (insn, contents + irel->r_offset);
9799
9800 *insn_len = 4;
0a1b45a2 9801 return true;
1c8f6a4d 9802}
35c08157 9803
1c8f6a4d
KLC		 9804/* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
9805
0a1b45a2 9806static bool
1c8f6a4d
KLC		 9807nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9808 Elf_Internal_Rela *internal_relocs, int *insn_len,
9809 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9810 Elf_Internal_Shdr *symtab_hdr)
9811{
9812 /* There are 3 variations for LONGCALL3
9813 case 4-4-4-2; 16-bit on, optimize off or optimize for space
07d6d2b8
AM		 9814 bltz rt, $1 ; LONGCALL3
9815 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9816 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9817 jral5 ta ;
1c8f6a4d
KLC		 9818 $1
9819
9820 case 4-4-4-4; 16-bit off, optimize don't care
07d6d2b8
AM		 9821 bltz rt, $1 ; LONGCALL3
9822 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9823 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9824 jral ta ;
1c8f6a4d
KLC		 9825 $1
9826
9827 case 4-4-4-4; 16-bit on, optimize for speed
07d6d2b8
AM		 9828 bltz rt, $1 ; LONGCALL3
9829 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9830 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9831 jral ta ;
1c8f6a4d
KLC		 9832 $1 */
9833
9834 /* Get the reloc for the address from which the register is
9835 being loaded. This reloc will tell us which function is
9836 actually being called. */
9837
9838 bfd_vma laddr;
9839 int seq_len; /* Original length of instruction sequence. */
9840 uint32_t insn;
9841 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
1c8f6a4d
KLC		 9842 bfd_signed_vma foff;
9843 uint16_t insn16;
9844
9845 irelend = internal_relocs + sec->reloc_count;
9846 seq_len = GET_SEQ_LEN (irel->r_addend);
9847 laddr = irel->r_offset;
9848 *insn_len = seq_len;
9849
9850 hi_irelfn =
9851 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9852 R_NDS32_HI20_RELA, laddr + 4);
9853 lo_irelfn =
9854 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9855 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9856
9857 if (hi_irelfn == irelend || lo_irelfn == irelend)
9858 {
695344c0 9859 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL3",
2dcf00ce 9860 (uint64_t) irel->r_offset);
0a1b45a2 9861 return false;
35c08157
KLC		 9862 }
9863
1c8f6a4d 9864 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 9865 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr);
35c08157 9866
fbaf61ad
NC		 9867 if (foff == 0
9868 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 9869 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 9870 return false;
35c08157 9871
1c8f6a4d
KLC		 9872 insn = bfd_getb32 (contents + laddr);
9873 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
35c08157 9874 {
1c8f6a4d
KLC		 9875 /* Relax to bgezal rt, label ; 17_PCREL
9876 or bltzal rt, label ; 17_PCREL */
35c08157 9877
1c8f6a4d
KLC		 9878 /* Convert to complimentary conditional call. */
9879 insn = CONVERT_CONDITION_CALL (insn);
9880 bfd_putb32 (insn, contents + irel->r_offset);
35c08157 9881
1c8f6a4d
KLC		 9882 *insn_len = 4;
9883 irel->r_info =
9884 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9885 hi_irelfn->r_info =
9886 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9887 lo_irelfn->r_info =
9888 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9889
9890 cond_irelfn =
9891 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9892 R_NDS32_17_PCREL_RELA, laddr);
9893 if (cond_irelfn != irelend)
35c08157 9894 {
1c8f6a4d
KLC		 9895 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9896 R_NDS32_17_PCREL_RELA);
9897 cond_irelfn->r_addend = hi_irelfn->r_addend;
35c08157 9898 }
1c8f6a4d
KLC		 9899
9900 if (seq_len & 0x2)
35c08157 9901 {
1c8f6a4d
KLC		 9902 insn16 = NDS32_NOP16;
9903 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9904 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9905 R_NDS32_INSN16);
9906 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9907 insn_len += 2;
35c08157 9908 }
1c8f6a4d
KLC		 9909 }
9910 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9911 {
9912 /* Relax to the following instruction sequence
9913 bltz rt, $1 ; LONGCALL2
9914 jal symbol ; 25_PCREL
9915 $1 */
9916 *insn_len = 8;
9917 insn = INSN_JAL;
9918 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
35c08157 9919
1c8f6a4d
KLC		 9920 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9921 R_NDS32_25_PCREL_RELA);
9922 irel->r_info =
9923 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9924
9925 lo_irelfn->r_info =
9926 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9927
1c8f6a4d 9928 if (seq_len & 0x2)
35c08157 9929 {
1c8f6a4d
KLC		 9930 insn16 = NDS32_NOP16;
9931 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9932 lo_irelfn->r_info =
9933 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9934 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9935 insn_len += 2;
9936 }
9937 }
0a1b45a2 9938 return true;
1c8f6a4d 9939}
35c08157 9940
1c8f6a4d 9941/* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
35c08157 9942
0a1b45a2 9943static bool
1c8f6a4d
KLC		 9944nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9945 Elf_Internal_Rela *internal_relocs, int *insn_len,
9946 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9947 Elf_Internal_Shdr *symtab_hdr)
9948{
9949 /* There are 3 variations for LONGJUMP1
9950 case 4-4-2; 16-bit bit on, optimize off or optimize for space
07d6d2b8
AM		 9951 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9952 ori ta, ta, lo12(symbol) ; LO12S0
9953 jr5 ta ;
1c8f6a4d
KLC		 9954
9955 case 4-4-4; 16-bit off, optimize don't care
07d6d2b8
AM		 9956 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9957 ori ta, ta, lo12(symbol) ; LO12S0
9958 jr ta ;
1c8f6a4d
KLC		 9959
9960 case 4-4-4; 16-bit on, optimize for speed
07d6d2b8
AM		 9961 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9962 ori ta, ta, lo12(symbol) ; LO12S0
9963 jr ta ; */
1c8f6a4d
KLC		 9964
9965 /* Get the reloc for the address from which the register is
9966 being loaded. This reloc will tell us which function is
9967 actually being called. */
9968
9969 bfd_vma laddr;
9970 int seq_len; /* Original length of instruction sequence. */
9971 int insn16_on; /* 16-bit on/off. */
9972 uint32_t insn;
9973 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
1c8f6a4d
KLC		 9974 bfd_signed_vma foff;
9975 uint16_t insn16;
9976 unsigned long reloc;
35c08157 9977
1c8f6a4d
KLC		 9978 irelend = internal_relocs + sec->reloc_count;
9979 seq_len = GET_SEQ_LEN (irel->r_addend);
9980 laddr = irel->r_offset;
9981 *insn_len = seq_len;
9982 insn16_on = IS_16BIT_ON (irel->r_addend);
9983
9984 hi_irelfn =
9985 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9986 R_NDS32_HI20_RELA, laddr);
9987 lo_irelfn =
9988 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9989 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9990 if (hi_irelfn == irelend || lo_irelfn == irelend)
9991 {
695344c0 9992 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP1",
2dcf00ce 9993 (uint64_t) irel->r_offset);
0a1b45a2 9994 return false;
1c8f6a4d 9995 }
35c08157 9996
1c8f6a4d 9997 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 9998 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr);
35c08157 9999
fbaf61ad
NC		 10000 if (foff == 0
10001 || foff >= CONSERVATIVE_24BIT_S1
1c8f6a4d 10002 || foff < -CONSERVATIVE_24BIT_S1)
0a1b45a2 10003 return false;
35c08157 10004
fbaf61ad
NC		 10005 if (insn16_on
10006 && foff >= -ACCURATE_8BIT_S1
10007 && foff < ACCURATE_8BIT_S1
10008 && (seq_len & 0x2))
1c8f6a4d
KLC		 10009 {
10010 /* j8 label */
10011 /* 16-bit on, but not optimized for speed. */
10012 reloc = R_NDS32_9_PCREL_RELA;
10013 insn16 = INSN_J8;
10014 bfd_putb16 (insn16, contents + irel->r_offset);
10015 *insn_len = 2;
10016 irel->r_info =
10017 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10018 }
10019 else
10020 {
10021 /* j label */
10022 reloc = R_NDS32_25_PCREL_RELA;
10023 insn = INSN_J;
10024 bfd_putb32 (insn, contents + irel->r_offset);
10025 *insn_len = 4;
10026 irel->r_info =
10027 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
10028 irel->r_addend = 0;
10029 }
35c08157 10030
1c8f6a4d
KLC		 10031 hi_irelfn->r_info =
10032 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
10033 lo_irelfn->r_info =
10034 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 10035
1c8f6a4d
KLC		 10036 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
10037 {
10038 insn16 = NDS32_NOP16;
10039 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
10040 lo_irelfn->r_info =
10041 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
10042 R_NDS32_INSN16);
10043 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10044 *insn_len += 2;
10045 }
0a1b45a2 10046 return true;
1c8f6a4d
KLC		 10047}
10048
10049/* Revert condition branch. This function does not check if the input
10050 instruction is condition branch or not. */
10051
10052static void
10053nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
10054 uint16_t *re_insn16, uint32_t *re_insn)
10055{
10056 uint32_t comp_insn = 0;
10057 uint16_t comp_insn16 = 0;
10058
10059 if (insn)
10060 {
10061 if (N32_OP6 (insn) == N32_OP6_BR1)
10062 {
10063 /* beqs label. */
10064 comp_insn = (insn ^ 0x4000) & 0xffffc000;
10065 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
35c08157 10066 {
1c8f6a4d
KLC		 10067 /* Insn can be contracted to 16-bit implied r5. */
10068 comp_insn16 =
10069 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
10070 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
35c08157 10071 }
1c8f6a4d
KLC		 10072 }
10073 else if (N32_OP6 (insn) == N32_OP6_BR3)
10074 {
10075 /* bnec $ta, imm11, label. */
10076 comp_insn = (insn ^ 0x80000) & 0xffffff00;
10077 }
10078 else
10079 {
10080 comp_insn = (insn ^ 0x10000) & 0xffffc000;
10081 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
10082 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
35c08157 10083 {
1c8f6a4d 10084 if (N32_IS_RT3 (insn))
35c08157 10085 {
1c8f6a4d
KLC		 10086 /* Insn can be contracted to 16-bit. */
10087 comp_insn16 =
10088 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
10089 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
10090 }
10091 else if (N32_RT5 (insn) == REG_R15)
10092 {
10093 /* Insn can be contracted to 16-bit. */
10094 comp_insn16 =
10095 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
35c08157 10096 }
35c08157
KLC		 10097 }
10098 }
1c8f6a4d
KLC		 10099 }
10100 else
10101 {
10102 switch ((insn16 & 0xf000) >> 12)
35c08157 10103 {
1c8f6a4d
KLC		 10104 case 0xc:
10105 /* beqz38 or bnez38 */
10106 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
10107 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
10108 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
10109 break;
35c08157 10110
1c8f6a4d
KLC		 10111 case 0xd:
10112 /* beqs38 or bnes38 */
10113 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
10114 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
10115 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
10116 | (REG_R5 << 15);
10117 break;
35c08157 10118
1c8f6a4d
KLC		 10119 case 0xe:
10120 /* beqzS8 or bnezS8 */
10121 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
10122 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
10123 comp_insn |= REG_R15 << 20;
10124 break;
35c08157 10125
1c8f6a4d
KLC		 10126 default:
10127 break;
10128 }
10129 }
10130 if (comp_insn && re_insn)
10131 *re_insn = comp_insn;
10132 if (comp_insn16 && re_insn16)
10133 *re_insn16 = comp_insn16;
10134}
35c08157 10135
1c8f6a4d 10136/* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
35c08157 10137
0a1b45a2 10138static bool
1c8f6a4d
KLC		 10139nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10140 Elf_Internal_Rela *internal_relocs, int *insn_len,
10141 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10142 Elf_Internal_Shdr *symtab_hdr)
10143{
10144 /* There are 3 variations for LONGJUMP2
10145 case 2-4; 1st insn convertible, 16-bit on,
10146 optimize off or optimize for space
10147 bnes38 rt, ra, $1 ; LONGJUMP2
10148 j label ; 25_PCREL
10149 $1:
10150
10151 case 4-4; 1st insn not convertible
10152 bne rt, ra, $1 ; LONGJUMP2
10153 j label ; 25_PCREL
10154 $1:
10155
10156 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
10157 bne rt, ra, $1 ; LONGJUMP2
10158 j label ; 25_PCREL
10159 $1: */
10160
10161 /* Get the reloc for the address from which the register is
10162 being loaded. This reloc will tell us which function is
10163 actually being called. */
10164
10165 bfd_vma laddr;
10166 int seq_len; /* Original length of instruction sequence. */
10167 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
fbaf61ad 10168 int first_size;
1c8f6a4d
KLC		 10169 unsigned int i;
10170 bfd_signed_vma foff;
10171 uint32_t insn, re_insn = 0;
10172 uint16_t insn16, re_insn16 = 0;
10173 unsigned long reloc, cond_reloc;
35c08157 10174
1c8f6a4d
KLC		 10175 enum elf_nds32_reloc_type checked_types[] =
10176 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
35c08157 10177
1c8f6a4d
KLC		 10178 irelend = internal_relocs + sec->reloc_count;
10179 seq_len = GET_SEQ_LEN (irel->r_addend);
10180 laddr = irel->r_offset;
10181 *insn_len = seq_len;
10182 first_size = (seq_len == 6) ? 2 : 4;
10183
10184 i2_irelfn =
10185 find_relocs_at_address_addr (irel, internal_relocs,
10186 irelend, R_NDS32_25_PCREL_RELA,
10187 laddr + first_size);
10188
fbaf61ad 10189 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 10190 {
10191 cond_irelfn =
10192 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10193 checked_types[i], laddr);
10194 if (cond_irelfn != irelend)
10195 break;
10196 }
35c08157 10197
1c8f6a4d
KLC		 10198 if (i2_irelfn == irelend || cond_irelfn == irelend)
10199 {
695344c0 10200 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP2",
2dcf00ce 10201 (uint64_t) irel->r_offset);
0a1b45a2 10202 return false;
1c8f6a4d 10203 }
35c08157 10204
1c8f6a4d 10205 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad
NC		 10206 foff = calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr);
10207 if (foff == 0
10208 || foff < -CONSERVATIVE_16BIT_S1
1c8f6a4d 10209 || foff >= CONSERVATIVE_16BIT_S1)
0a1b45a2 10210 return false;
35c08157 10211
1c8f6a4d
KLC		 10212 /* Get the all corresponding instructions. */
10213 if (first_size == 4)
10214 {
10215 insn = bfd_getb32 (contents + laddr);
10216 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10217 }
10218 else
10219 {
10220 insn16 = bfd_getb16 (contents + laddr);
10221 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10222 }
35c08157 10223
1c8f6a4d
KLC		 10224 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
10225 && foff < ACCURATE_8BIT_S1 - first_size)
10226 {
10227 if (first_size == 4)
10228 {
10229 /* Don't convert it to 16-bit now, keep this as relaxable for
10230 ``label reloc; INSN16''. */
35c08157 10231
1c8f6a4d
KLC		 10232 /* Save comp_insn32 to buffer. */
10233 bfd_putb32 (re_insn, contents + irel->r_offset);
10234 *insn_len = 4;
10235 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
10236 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
10237 cond_reloc = R_NDS32_INSN16;
10238 }
10239 else
10240 {
10241 bfd_putb16 (re_insn16, contents + irel->r_offset);
10242 *insn_len = 2;
10243 reloc = R_NDS32_9_PCREL_RELA;
10244 cond_reloc = R_NDS32_NONE;
10245 }
10246 }
10247 else if (N32_OP6 (re_insn) == N32_OP6_BR1
10248 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
10249 && foff < ACCURATE_14BIT_S1 - first_size))
10250 {
10251 /* beqs label ; 15_PCREL */
10252 bfd_putb32 (re_insn, contents + irel->r_offset);
10253 *insn_len = 4;
10254 reloc = R_NDS32_15_PCREL_RELA;
10255 cond_reloc = R_NDS32_NONE;
10256 }
10257 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10258 && foff >= -CONSERVATIVE_16BIT_S1
10259 && foff < CONSERVATIVE_16BIT_S1)
10260 {
10261 /* beqz label ; 17_PCREL */
10262 bfd_putb32 (re_insn, contents + irel->r_offset);
10263 *insn_len = 4;
10264 reloc = R_NDS32_17_PCREL_RELA;
10265 cond_reloc = R_NDS32_NONE;
10266 }
10267 else
0a1b45a2 10268 return false;
35c08157 10269
1c8f6a4d
KLC		 10270 /* Set all relocations. */
10271 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
10272 irel->r_addend = i2_irelfn->r_addend;
35c08157 10273
1c8f6a4d
KLC		 10274 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
10275 cond_reloc);
10276 cond_irelfn->r_addend = 0;
35c08157 10277
1c8f6a4d
KLC		 10278 if ((seq_len ^ *insn_len ) & 0x2)
10279 {
10280 insn16 = NDS32_NOP16;
10281 bfd_putb16 (insn16, contents + irel->r_offset + 4);
10282 i2_irelfn->r_offset = 4;
10283 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
10284 R_NDS32_INSN16);
10285 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10286 *insn_len += 2;
10287 }
10288 else
10289 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
10290 R_NDS32_NONE);
0a1b45a2 10291 return true;
1c8f6a4d 10292}
35c08157 10293
1c8f6a4d 10294/* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
35c08157 10295
0a1b45a2 10296static bool
1c8f6a4d
KLC		 10297nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10298 Elf_Internal_Rela *internal_relocs, int *insn_len,
10299 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10300 Elf_Internal_Shdr *symtab_hdr)
10301{
10302 /* There are 5 variations for LONGJUMP3
10303 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
10304 optimize off or optimize for space
07d6d2b8
AM		 10305 bnes38 rt, ra, $1 ; LONGJUMP3
10306 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 10307 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 10308 jr5 ta ;
10309 $1: ;
1c8f6a4d
KLC		 10310
10311 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
07d6d2b8
AM		 10312 bnes38 rt, ra, $1 ; LONGJUMP3
10313 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 10314 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 10315 jr5 ta ;
10316 $1: ; LABEL
1c8f6a4d
KLC		 10317
10318 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
10319 optimize off or optimize for space
07d6d2b8
AM		 10320 bne rt, ra, $1 ; LONGJUMP3
10321 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 10322 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 10323 jr5 ta ;
10324 $1: ;
1c8f6a4d
KLC		 10325
10326 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
10327 16-bit off if no INSN16
07d6d2b8
AM		 10328 bne rt, ra, $1 ; LONGJUMP3
10329 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 10330 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 10331 jr ta ;
10332 $1: ;
1c8f6a4d
KLC		 10333
10334 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
10335 16-bit off if no INSN16
07d6d2b8
AM		 10336 bne rt, ra, $1 ; LONGJUMP3
10337 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 10338 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 10339 jr ta ;
10340 $1: ; LABEL */
1c8f6a4d
KLC		 10341
10342 /* Get the reloc for the address from which the register is
10343 being loaded. This reloc will tell us which function is
10344 actually being called. */
10345 enum elf_nds32_reloc_type checked_types[] =
10346 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
10347
10348 int reloc_off = 0, cond_removed = 0, convertible;
10349 bfd_vma laddr;
10350 int seq_len; /* Original length of instruction sequence. */
10351 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
fbaf61ad 10352 int first_size;
1c8f6a4d
KLC		 10353 unsigned int i;
10354 bfd_signed_vma foff;
10355 uint32_t insn, re_insn = 0;
10356 uint16_t insn16, re_insn16 = 0;
10357 unsigned long reloc, cond_reloc;
35c08157 10358
1c8f6a4d
KLC		 10359 irelend = internal_relocs + sec->reloc_count;
10360 seq_len = GET_SEQ_LEN (irel->r_addend);
10361 laddr = irel->r_offset;
10362 *insn_len = seq_len;
35c08157 10363
1c8f6a4d 10364 convertible = IS_1ST_CONVERT (irel->r_addend);
35c08157 10365
1c8f6a4d
KLC		 10366 if (convertible)
10367 first_size = 2;
10368 else
10369 first_size = 4;
10370
10371 /* Get all needed relocations. */
10372 hi_irelfn =
10373 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10374 R_NDS32_HI20_RELA, laddr + first_size);
10375 lo_irelfn =
10376 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10377 R_NDS32_LO12S0_ORI_RELA,
10378 laddr + first_size + 4);
10379
fbaf61ad 10380 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 10381 {
10382 cond_irelfn =
10383 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10384 checked_types[i], laddr);
10385 if (cond_irelfn != irelend)
10386 break;
10387 }
35c08157 10388
fbaf61ad
NC		 10389 if (hi_irelfn == irelend
10390 || lo_irelfn == irelend
10391 || cond_irelfn == irelend)
1c8f6a4d 10392 {
695344c0 10393 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP3",
2dcf00ce 10394 (uint64_t) irel->r_offset);
0a1b45a2 10395 return false;
1c8f6a4d 10396 }
35c08157 10397
1c8f6a4d 10398 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10399 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr);
35c08157 10400
fbaf61ad
NC		 10401 if (foff == 0
10402 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 10403 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 10404 return false;
35c08157 10405
1c8f6a4d
KLC		 10406 /* Get the all corresponding instructions. */
10407 if (first_size == 4)
10408 {
10409 insn = bfd_getb32 (contents + laddr);
10410 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10411 }
10412 else
10413 {
10414 insn16 = bfd_getb16 (contents + laddr);
10415 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10416 }
35c08157 10417
1c8f6a4d
KLC		 10418 /* For simplicity of coding, we are going to modify the section
10419 contents, the section relocs, and the BFD symbol table. We
10420 must tell the rest of the code not to free up this
10421 information. It would be possible to instead create a table
10422 of changes which have to be made, as is done in coff-mips.c;
10423 that would be more work, but would require less memory when
10424 the linker is run. */
35c08157 10425
fbaf61ad
NC		 10426 if (re_insn16
10427 && foff >= -ACCURATE_8BIT_S1 - first_size
1c8f6a4d
KLC		 10428 && foff < ACCURATE_8BIT_S1 - first_size)
10429 {
10430 if (!(seq_len & 0x2))
10431 {
10432 /* Don't convert it to 16-bit now, keep this as relaxable
10433 for ``label reloc; INSN1a''6. */
10434 /* Save comp_insn32 to buffer. */
10435 bfd_putb32 (re_insn, contents + irel->r_offset);
10436 *insn_len = 4;
10437 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
10438 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
10439 cond_reloc = R_NDS32_INSN16;
10440 }
10441 else
10442 {
10443 /* Not optimize for speed; convert sequence to 16-bit. */
10444 /* Save comp_insn16 to buffer. */
10445 bfd_putb16 (re_insn16, contents + irel->r_offset);
10446 *insn_len = 2;
10447 reloc = R_NDS32_9_PCREL_RELA;
10448 cond_reloc = R_NDS32_NONE;
10449 }
10450 cond_removed = 1;
10451 }
10452 else if (N32_OP6 (re_insn) == N32_OP6_BR1
10453 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
10454 && foff < ACCURATE_14BIT_S1 - first_size))
10455 {
10456 /* beqs label ; 15_PCREL */
10457 bfd_putb32 (re_insn, contents + irel->r_offset);
10458 *insn_len = 4;
10459 reloc = R_NDS32_15_PCREL_RELA;
10460 cond_reloc = R_NDS32_NONE;
10461 cond_removed = 1;
10462 }
10463 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10464 && foff >= -CONSERVATIVE_16BIT_S1
10465 && foff < CONSERVATIVE_16BIT_S1)
10466 {
10467 /* beqz label ; 17_PCREL */
10468 bfd_putb32 (re_insn, contents + irel->r_offset);
10469 *insn_len = 4;
10470 reloc = R_NDS32_17_PCREL_RELA;
10471 cond_reloc = R_NDS32_NONE;
10472 cond_removed = 1;
10473 }
10474 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10475 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10476 {
10477 /* Relax to one of the following 3 variations
10478
10479 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
10480 for space
10481 bnes38 rt, $1 ; LONGJUMP2
10482 j label ; 25_PCREL
10483 $1
10484
10485 case 4-4; 1st insn not convertible, others don't care
10486 bne rt, ra, $1 ; LONGJUMP2
10487 j label ; 25_PCREL
10488 $1
10489
10490 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
10491 bne rt, ra, $1 ; LONGJUMP2
10492 j label ; 25_PCREL
10493 $1 */
10494
10495 /* Offset for first instruction. */
10496
10497 /* Use j label as second instruction. */
10498 *insn_len = 4 + first_size;
10499 insn = INSN_J;
10500 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
10501 reloc = R_NDS32_LONGJUMP2;
10502 cond_reloc = R_NDS32_25_PLTREL;
10503 }
10504 else
0a1b45a2 10505 return false;
35c08157 10506
1c8f6a4d
KLC		 10507 if (cond_removed == 1)
10508 {
10509 /* Set all relocations. */
10510 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
10511 irel->r_addend = hi_irelfn->r_addend;
10512
10513 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
10514 cond_reloc);
10515 cond_irelfn->r_addend = 0;
10516 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
10517 R_NDS32_NONE);
10518 }
10519 else
10520 {
10521 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
fbaf61ad 10522 irel->r_addend = irel->r_addend;
1c8f6a4d
KLC		 10523 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
10524 cond_reloc);
10525 }
35c08157 10526
1c8f6a4d
KLC		 10527 if ((seq_len ^ *insn_len ) & 0x2)
10528 {
10529 insn16 = NDS32_NOP16;
10530 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
10531 lo_irelfn->r_offset = *insn_len;
10532 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
10533 R_NDS32_INSN16);
10534 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10535 *insn_len += 2;
10536 }
10537 else
10538 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
10539 R_NDS32_NONE);
0a1b45a2 10540 return true;
1c8f6a4d 10541}
35c08157 10542
1c8f6a4d 10543/* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
35c08157 10544
0a1b45a2 10545static bool
1c8f6a4d
KLC		 10546nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10547 Elf_Internal_Rela *internal_relocs, int *insn_len,
10548 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10549 Elf_Internal_Shdr *symtab_hdr)
10550{
10551 /* The pattern for LONGCALL4. Support for function cse.
10552 sethi ta, hi20(symbol) ; LONGCALL4/HI20
10553 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10554 jral ta ; PTR_RES/EMPTY/INSN16 */
35c08157 10555
1c8f6a4d
KLC		 10556 bfd_vma laddr;
10557 uint32_t insn;
10558 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
10559 Elf_Internal_Rela *irelend;
1c8f6a4d 10560 bfd_signed_vma foff;
35c08157 10561
1c8f6a4d
KLC		 10562 irelend = internal_relocs + sec->reloc_count;
10563 laddr = irel->r_offset;
35c08157 10564
1c8f6a4d
KLC		 10565 /* Get the reloc for the address from which the register is
10566 being loaded. This reloc will tell us which function is
10567 actually being called. */
10568 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10569 R_NDS32_HI20_RELA, laddr);
35c08157 10570
1c8f6a4d
KLC		 10571 if (hi_irel == irelend)
10572 {
695344c0 10573 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
2dcf00ce 10574 (uint64_t) irel->r_offset);
0a1b45a2 10575 return false;
1c8f6a4d 10576 }
35c08157 10577
1c8f6a4d 10578 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10579 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr);
35c08157 10580
1c8f6a4d 10581 /* This condition only happened when symbol is undefined. */
fbaf61ad
NC		 10582 if (foff == 0
10583 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 10584 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 10585 return false;
35c08157 10586
fbaf61ad 10587 /* Relax to: jal symbol; 25_PCREL. */
1c8f6a4d
KLC		 10588 /* For simplicity of coding, we are going to modify the section
10589 contents, the section relocs, and the BFD symbol table. We
10590 must tell the rest of the code not to free up this
10591 information. It would be possible to instead create a table
10592 of changes which have to be made, as is done in coff-mips.c;
10593 that would be more work, but would require less memory when
10594 the linker is run. */
35c08157 10595
1c8f6a4d
KLC		 10596 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10597 R_NDS32_PTR_RESOLVED, irel->r_addend);
10598 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10599 R_NDS32_EMPTY, irel->r_addend);
35c08157 10600
1c8f6a4d
KLC		 10601 if (ptr_irel == irelend || em_irel == irelend)
10602 {
695344c0 10603 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
2dcf00ce 10604 (uint64_t) irel->r_offset);
0a1b45a2 10605 return false;
1c8f6a4d
KLC		 10606 }
10607 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10608 insn = bfd_getb32 (contents + irel->r_addend);
10609 if (insn & 0x80000000)
0a1b45a2 10610 return false;
35c08157 10611
1c8f6a4d
KLC		 10612 /* Replace the long call with a jal. */
10613 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10614 R_NDS32_25_PCREL_RELA);
10615 ptr_irel->r_addend = 1;
35c08157 10616
1c8f6a4d
KLC		 10617 /* We don't resolve this here but resolve it in relocate_section. */
10618 insn = INSN_JAL;
10619 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10620
1c8f6a4d
KLC		 10621 irel->r_info =
10622 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10623
1c8f6a4d
KLC		 10624 /* If there is function cse, HI20 can not remove now. */
10625 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10626 R_NDS32_LONGCALL4, laddr);
10627 if (call_irel == irelend)
10628 {
10629 *insn_len = 0;
10630 hi_irel->r_info =
10631 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10632 }
35c08157 10633
1c8f6a4d
KLC		 10634 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10635 R_NDS32_INSN16, irel->r_addend);
10636 if (insn_irel != irelend)
10637 insn_irel->r_info =
10638 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10639
0a1b45a2 10640 return true;
1c8f6a4d 10641}
35c08157 10642
1c8f6a4d 10643/* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
35c08157 10644
0a1b45a2 10645static bool
1c8f6a4d
KLC		 10646nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10647 Elf_Internal_Rela *internal_relocs, int *insn_len,
10648 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10649 Elf_Internal_Shdr *symtab_hdr)
10650{
10651 /* The pattern for LONGCALL5.
10652 bltz rt, .L1 ; LONGCALL5/17_PCREL
10653 jal symbol ; 25_PCREL
10654 .L1: */
35c08157 10655
1c8f6a4d
KLC		 10656 bfd_vma laddr;
10657 uint32_t insn;
10658 Elf_Internal_Rela *cond_irel, *irelend;
1c8f6a4d 10659 bfd_signed_vma foff;
35c08157 10660
1c8f6a4d
KLC		 10661 irelend = internal_relocs + sec->reloc_count;
10662 laddr = irel->r_offset;
10663 insn = bfd_getb32 (contents + laddr);
35c08157 10664
1c8f6a4d
KLC		 10665 /* Get the reloc for the address from which the register is
10666 being loaded. This reloc will tell us which function is
10667 actually being called. */
10668 cond_irel =
10669 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10670 R_NDS32_25_PCREL_RELA, irel->r_addend);
10671 if (cond_irel == irelend)
10672 {
695344c0 10673 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL5",
2dcf00ce 10674 (uint64_t) irel->r_offset);
0a1b45a2 10675 return false;
1c8f6a4d 10676 }
35c08157 10677
1c8f6a4d 10678 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10679 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr);
35c08157 10680
fbaf61ad
NC		 10681 if (foff == 0
10682 || foff < -CONSERVATIVE_16BIT_S1
1c8f6a4d 10683 || foff >= CONSERVATIVE_16BIT_S1)
0a1b45a2 10684 return false;
35c08157 10685
1c8f6a4d 10686 /* Relax to bgezal rt, label ; 17_PCREL
fbaf61ad 10687 or bltzal rt, label ; 17_PCREL. */
35c08157 10688
1c8f6a4d
KLC		 10689 /* Convert to complimentary conditional call. */
10690 insn = CONVERT_CONDITION_CALL (insn);
35c08157 10691
1c8f6a4d
KLC		 10692 /* For simplicity of coding, we are going to modify the section
10693 contents, the section relocs, and the BFD symbol table. We
10694 must tell the rest of the code not to free up this
10695 information. It would be possible to instead create a table
10696 of changes which have to be made, as is done in coff-mips.c;
10697 that would be more work, but would require less memory when
10698 the linker is run. */
35c08157 10699
1c8f6a4d
KLC		 10700 /* Modify relocation and contents. */
10701 cond_irel->r_info =
10702 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
35c08157 10703
1c8f6a4d
KLC		 10704 /* Replace the long call with a bgezal. */
10705 bfd_putb32 (insn, contents + cond_irel->r_offset);
10706 *insn_len = 0;
35c08157 10707
1c8f6a4d
KLC		 10708 /* Clean unnessary relocations. */
10709 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10710
1c8f6a4d
KLC		 10711 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10712 R_NDS32_17_PCREL_RELA, laddr);
10713 cond_irel->r_info =
10714 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10715
0a1b45a2 10716 return true;
1c8f6a4d 10717}
35c08157 10718
1c8f6a4d 10719/* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
35c08157 10720
0a1b45a2 10721static bool
1c8f6a4d
KLC		 10722nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10723 Elf_Internal_Rela *internal_relocs, int *insn_len,
10724 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10725 Elf_Internal_Shdr *symtab_hdr)
10726{
10727 /* The pattern for LONGCALL6.
10728 bltz rt, .L1 ; LONGCALL6/17_PCREL
10729 sethi ta, hi20(symbol) ; HI20/PTR
10730 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10731 jral ta ; PTR_RES/EMPTY/INSN16
10732 .L1 */
10733
10734 bfd_vma laddr;
10735 uint32_t insn;
10736 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
1c8f6a4d 10737 bfd_signed_vma foff;
35c08157 10738
1c8f6a4d
KLC		 10739 irelend = internal_relocs + sec->reloc_count;
10740 laddr = irel->r_offset;
35c08157 10741
1c8f6a4d
KLC		 10742 /* Get the reloc for the address from which the register is
10743 being loaded. This reloc will tell us which function is
10744 actually being called. */
10745 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10746 R_NDS32_EMPTY, irel->r_addend);
35c08157 10747
1c8f6a4d
KLC		 10748 if (em_irel == irelend)
10749 {
695344c0 10750 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL6",
2dcf00ce 10751 (uint64_t) irel->r_offset);
0a1b45a2 10752 return false;
1c8f6a4d 10753 }
35c08157 10754
1c8f6a4d 10755 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10756 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr);
35c08157 10757
fbaf61ad
NC		 10758 if (foff == 0
10759 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 10760 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 10761 return false;
35c08157 10762
1c8f6a4d
KLC		 10763 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10764 insn = bfd_getb32 (contents + irel->r_addend);
10765 if (insn & 0x80000000)
0a1b45a2 10766 return false;
35c08157 10767
1c8f6a4d
KLC		 10768 insn = bfd_getb32 (contents + laddr);
10769 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10770 {
10771 /* Relax to bgezal rt, label ; 17_PCREL
fbaf61ad 10772 or bltzal rt, label ; 17_PCREL. */
35c08157 10773
1c8f6a4d
KLC		 10774 /* Convert to complimentary conditional call. */
10775 *insn_len = 0;
10776 insn = CONVERT_CONDITION_CALL (insn);
10777 bfd_putb32 (insn, contents + em_irel->r_offset);
10778
10779 em_irel->r_info =
10780 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
10781
10782 /* Set resolved relocation. */
10783 cond_irel =
10784 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10785 R_NDS32_PTR_RESOLVED, irel->r_addend);
10786 if (cond_irel == irelend)
35c08157 10787 {
695344c0 10788 _bfd_error_handler (unrecognized_reloc_msg, abfd,
2dcf00ce 10789 "R_NDS32_LONGCALL6", (uint64_t) irel->r_offset);
0a1b45a2 10790 return false;
1c8f6a4d
KLC		 10791 }
10792 cond_irel->r_addend = 1;
35c08157 10793
1c8f6a4d 10794 /* Clear relocations. */
35c08157 10795
1c8f6a4d
KLC		 10796 irel->r_info =
10797 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10798
1c8f6a4d
KLC		 10799 cond_irel =
10800 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10801 R_NDS32_17_PCREL_RELA, laddr);
10802 if (cond_irel != irelend)
10803 cond_irel->r_info =
10804 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10805
1c8f6a4d
KLC		 10806 cond_irel =
10807 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10808 R_NDS32_INSN16, irel->r_addend);
10809 if (cond_irel != irelend)
10810 cond_irel->r_info =
10811 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10812
1c8f6a4d
KLC		 10813 }
10814 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
10815 {
10816 /* Relax to the following instruction sequence
10817 bltz rt, .L1 ; LONGCALL2/17_PCREL
10818 jal symbol ; 25_PCREL/PTR_RES
10819 .L1 */
10820 *insn_len = 4;
10821 /* Convert instruction. */
10822 insn = INSN_JAL;
10823 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10824
1c8f6a4d
KLC		 10825 /* Convert relocations. */
10826 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10827 R_NDS32_25_PCREL_RELA);
10828 irel->r_info =
10829 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
35c08157 10830
1c8f6a4d
KLC		 10831 /* Set resolved relocation. */
10832 cond_irel =
10833 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10834 R_NDS32_PTR_RESOLVED, irel->r_addend);
10835 if (cond_irel == irelend)
10836 {
695344c0 10837 _bfd_error_handler (unrecognized_reloc_msg, abfd,
2dcf00ce 10838 "R_NDS32_LONGCALL6", (uint64_t) irel->r_offset);
0a1b45a2 10839 return false;
1c8f6a4d
KLC		 10840 }
10841 cond_irel->r_addend = 1;
35c08157 10842
1c8f6a4d
KLC		 10843 cond_irel =
10844 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10845 R_NDS32_INSN16, irel->r_addend);
10846 if (cond_irel != irelend)
10847 cond_irel->r_info =
10848 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10849 }
0a1b45a2 10850 return true;
1c8f6a4d 10851}
35c08157 10852
1c8f6a4d 10853/* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
35c08157 10854
0a1b45a2 10855static bool
1c8f6a4d
KLC		 10856nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10857 Elf_Internal_Rela *internal_relocs, int *insn_len,
10858 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10859 Elf_Internal_Shdr *symtab_hdr)
10860{
10861 /* The pattern for LONGJUMP4.
10862 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10863 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10864 jr ta ; PTR_RES/INSN16/EMPTY */
10865
10866 bfd_vma laddr;
10867 int seq_len; /* Original length of instruction sequence. */
10868 uint32_t insn;
10869 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
1c8f6a4d 10870 bfd_signed_vma foff;
35c08157 10871
1c8f6a4d
KLC		 10872 irelend = internal_relocs + sec->reloc_count;
10873 seq_len = GET_SEQ_LEN (irel->r_addend);
10874 laddr = irel->r_offset;
10875 *insn_len = seq_len;
35c08157 10876
1c8f6a4d
KLC		 10877 /* Get the reloc for the address from which the register is
10878 being loaded. This reloc will tell us which function is
10879 actually being called. */
35c08157 10880
1c8f6a4d
KLC		 10881 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10882 R_NDS32_HI20_RELA, laddr);
35c08157 10883
1c8f6a4d
KLC		 10884 if (hi_irel == irelend)
10885 {
695344c0 10886 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
2dcf00ce 10887 (uint64_t) irel->r_offset);
0a1b45a2 10888 return false;
1c8f6a4d 10889 }
35c08157 10890
1c8f6a4d 10891 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10892 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr);
35c08157 10893
fbaf61ad
NC		 10894 if (foff == 0
10895 || foff >= CONSERVATIVE_24BIT_S1
1c8f6a4d 10896 || foff < -CONSERVATIVE_24BIT_S1)
0a1b45a2 10897 return false;
35c08157 10898
1c8f6a4d
KLC		 10899 /* Convert it to "j label", it may be converted to j8 in the final
10900 pass of relaxation. Therefore, we do not consider this currently. */
10901 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10902 R_NDS32_PTR_RESOLVED, irel->r_addend);
10903 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10904 R_NDS32_EMPTY, irel->r_addend);
35c08157 10905
1c8f6a4d
KLC		 10906 if (ptr_irel == irelend || em_irel == irelend)
10907 {
695344c0 10908 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
2dcf00ce 10909 (uint64_t) irel->r_offset);
0a1b45a2 10910 return false;
1c8f6a4d 10911 }
35c08157 10912
1c8f6a4d
KLC		 10913 em_irel->r_info =
10914 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10915 ptr_irel->r_addend = 1;
35c08157 10916
1c8f6a4d
KLC		 10917 /* Write instruction. */
10918 insn = INSN_J;
10919 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10920
1c8f6a4d
KLC		 10921 /* Clear relocations. */
10922 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10923
1c8f6a4d
KLC		 10924 /* If there is function cse, HI20 can not remove now. */
10925 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10926 R_NDS32_LONGJUMP4, laddr);
10927 if (call_irel == irelend)
10928 {
10929 *insn_len = 0;
10930 hi_irel->r_info =
10931 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10932 }
35c08157 10933
0a1b45a2 10934 return true;
1c8f6a4d 10935}
35c08157 10936
1c8f6a4d 10937/* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
35c08157 10938
0a1b45a2 10939static bool
1c8f6a4d
KLC		 10940nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10941 Elf_Internal_Rela *internal_relocs, int *insn_len,
10942 int *seq_len, bfd_byte *contents,
10943 Elf_Internal_Sym *isymbuf,
10944 Elf_Internal_Shdr *symtab_hdr)
10945{
10946 /* There are 2 variations for LONGJUMP5
10947 case 2-4; 1st insn convertible, 16-bit on.
10948 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10949 j label ; 25_PCREL/INSN16
10950 $1:
10951
10952 case 4-4; 1st insn not convertible
10953 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10954 j label ; 25_PCREL/INSN16
10955 .L1: */
10956
10957 bfd_vma laddr;
10958 Elf_Internal_Rela *cond_irel, *irelend;
1c8f6a4d
KLC		 10959 unsigned int i;
10960 bfd_signed_vma foff;
10961 uint32_t insn, re_insn = 0;
10962 uint16_t insn16, re_insn16 = 0;
10963 unsigned long reloc;
35c08157 10964
1c8f6a4d
KLC		 10965 enum elf_nds32_reloc_type checked_types[] =
10966 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10967 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
35c08157 10968
1c8f6a4d
KLC		 10969 irelend = internal_relocs + sec->reloc_count;
10970 laddr = irel->r_offset;
35c08157 10971
1c8f6a4d
KLC		 10972 /* Get the reloc for the address from which the register is
10973 being loaded. This reloc will tell us which function is
10974 actually being called. */
35c08157 10975
1c8f6a4d
KLC		 10976 cond_irel =
10977 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10978 R_NDS32_25_PCREL_RELA, irel->r_addend);
10979 if (cond_irel == irelend)
10980 {
695344c0 10981 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP5",
2dcf00ce 10982 (uint64_t) irel->r_offset);
0a1b45a2 10983 return false;
1c8f6a4d 10984 }
35c08157 10985
1c8f6a4d 10986 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10987 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr);
35c08157 10988
fbaf61ad
NC		 10989 if (foff == 0
10990 || foff < -CONSERVATIVE_16BIT_S1
1c8f6a4d 10991 || foff >= CONSERVATIVE_16BIT_S1)
0a1b45a2 10992 return false;
35c08157 10993
1c8f6a4d
KLC		 10994 /* Get the all corresponding instructions. */
10995 insn = bfd_getb32 (contents + laddr);
10996 /* Check instruction size. */
10997 if (insn & 0x80000000)
10998 {
10999 *seq_len = 0;
11000 insn16 = insn >> 16;
11001 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
11002 }
11003 else
11004 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 11005
1c8f6a4d
KLC		 11006 if (N32_OP6 (re_insn) == N32_OP6_BR1
11007 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
11008 {
11009 /* beqs label ; 15_PCREL. */
11010 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
11011 reloc = R_NDS32_15_PCREL_RELA;
11012 }
11013 else if (N32_OP6 (re_insn) == N32_OP6_BR2
11014 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
11015 {
11016 /* beqz label ; 17_PCREL. */
11017 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
11018 reloc = R_NDS32_17_PCREL_RELA;
11019 }
11020 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
11021 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
11022 {
11023 /* beqc label ; 9_PCREL. */
11024 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
11025 reloc = R_NDS32_WORD_9_PCREL_RELA;
11026 }
11027 else
0a1b45a2 11028 return false;
35c08157 11029
1c8f6a4d
KLC		 11030 /* Set all relocations. */
11031 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
35c08157 11032
1c8f6a4d
KLC		 11033 /* Clean relocations. */
11034 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
fbaf61ad 11035 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 11036 {
11037 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
11038 checked_types[i], laddr);
11039 if (cond_irel != irelend)
11040 {
11041 if (*seq_len == 0
11042 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
35c08157 11043 {
1c8f6a4d
KLC		 11044 /* If the branch instruction is 2 byte, it cannot remove
11045 directly. Only convert it to nop16 and remove it after
11046 checking alignment issue. */
11047 insn16 = NDS32_NOP16;
11048 bfd_putb16 (insn16, contents + laddr);
11049 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157
KLC		 11050 }
11051 else
1c8f6a4d
KLC		 11052 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
11053 R_NDS32_NONE);
35c08157 11054 }
1c8f6a4d
KLC		 11055 }
11056 *insn_len = 0;
35c08157 11057
0a1b45a2 11058 return true;
1c8f6a4d 11059}
35c08157 11060
1c8f6a4d 11061/* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
35c08157 11062
0a1b45a2 11063static bool
1c8f6a4d
KLC		 11064nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11065 Elf_Internal_Rela *internal_relocs, int *insn_len,
11066 int *seq_len, bfd_byte *contents,
11067 Elf_Internal_Sym *isymbuf,
11068 Elf_Internal_Shdr *symtab_hdr)
11069{
11070 /* There are 5 variations for LONGJUMP6
11071 case : 2-4-4-4; 1st insn convertible, 16-bit on.
11072 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
11073 sethi ta, hi20(symbol) ; HI20/PTR
11074 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
11075 jr ta ; PTR_RES/INSN16/EMPTY
11076 .L1:
11077
11078 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
11079 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
11080 sethi ta, hi20(symbol) ; HI20/PTR
11081 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
11082 jr ta ; PTR_RES/INSN16/EMPTY
11083 .L1: */
11084
11085 enum elf_nds32_reloc_type checked_types[] =
11086 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
11087 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
11088
11089 int reloc_off = 0, cond_removed = 0;
11090 bfd_vma laddr;
11091 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
1c8f6a4d
KLC		 11092 unsigned int i;
11093 bfd_signed_vma foff;
11094 uint32_t insn, re_insn = 0;
11095 uint16_t insn16, re_insn16 = 0;
11096 unsigned long reloc;
35c08157 11097
1c8f6a4d
KLC		 11098 irelend = internal_relocs + sec->reloc_count;
11099 laddr = irel->r_offset;
35c08157 11100
1c8f6a4d
KLC		 11101 /* Get the reloc for the address from which the register is
11102 being loaded. This reloc will tell us which function is
11103 actually being called. */
11104 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
11105 R_NDS32_EMPTY, irel->r_addend);
35c08157 11106
1c8f6a4d
KLC		 11107 if (em_irel == irelend)
11108 {
695344c0 11109 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP6",
2dcf00ce 11110 (uint64_t) irel->r_offset);
0a1b45a2 11111 return false;
1c8f6a4d 11112 }
35c08157 11113
1c8f6a4d 11114 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 11115 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr);
35c08157 11116
fbaf61ad
NC		 11117 if (foff == 0
11118 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 11119 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 11120 return false;
35c08157 11121
1c8f6a4d
KLC		 11122 insn = bfd_getb32 (contents + laddr);
11123 /* Check instruction size. */
11124 if (insn & 0x80000000)
11125 {
11126 *seq_len = 0;
11127 insn16 = insn >> 16;
11128 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
11129 }
11130 else
11131 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 11132
1c8f6a4d
KLC		 11133 /* For simplicity of coding, we are going to modify the section
11134 contents, the section relocs, and the BFD symbol table. We
11135 must tell the rest of the code not to free up this
11136 information. It would be possible to instead create a table
11137 of changes which have to be made, as is done in coff-mips.c;
11138 that would be more work, but would require less memory when
11139 the linker is run. */
35c08157 11140
1c8f6a4d
KLC		 11141 if (N32_OP6 (re_insn) == N32_OP6_BR1
11142 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
11143 {
fbaf61ad 11144 /* beqs label ; 15_PCREL. */
1c8f6a4d
KLC		 11145 bfd_putb32 (re_insn, contents + em_irel->r_offset);
11146 reloc = R_NDS32_15_PCREL_RELA;
11147 cond_removed = 1;
11148 }
11149 else if (N32_OP6 (re_insn) == N32_OP6_BR2
11150 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
11151 {
fbaf61ad 11152 /* beqz label ; 17_PCREL. */
1c8f6a4d
KLC		 11153 bfd_putb32 (re_insn, contents + em_irel->r_offset);
11154 reloc = R_NDS32_17_PCREL_RELA;
11155 cond_removed = 1;
11156 }
11157 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
11158 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
11159 {
11160 /* Relax to one of the following 2 variations
35c08157 11161
1c8f6a4d
KLC		 11162 case 2-4; 1st insn convertible, 16-bit on.
11163 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
11164 j label ; 25_PCREL/INSN16
11165 $1:
35c08157 11166
1c8f6a4d
KLC		 11167 case 4-4; 1st insn not convertible
11168 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
11169 j label ; 25_PCREL/INSN16
11170 .L1: */
35c08157 11171
1c8f6a4d
KLC		 11172 /* Use j label as second instruction. */
11173 insn = INSN_J;
11174 reloc = R_NDS32_25_PCREL_RELA;
11175 bfd_putb32 (insn, contents + em_irel->r_offset);
11176 }
11177 else
0a1b45a2 11178 return false;
35c08157 11179
1c8f6a4d
KLC		 11180 /* Set all relocations. */
11181 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
35c08157 11182
1c8f6a4d
KLC		 11183 cond_irel =
11184 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11185 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
11186 cond_irel->r_addend = 1;
35c08157 11187
1c8f6a4d
KLC		 11188 /* Use INSN16 of first branch instruction to distinguish if keeping
11189 INSN16 of final instruction or not. */
11190 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
11191 R_NDS32_INSN16, irel->r_offset);
11192 if (insn_irel == irelend)
11193 {
11194 /* Clean the final INSN16. */
11195 insn_irel =
11196 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11197 R_NDS32_INSN16, em_irel->r_offset);
11198 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
11199 R_NDS32_NONE);
11200 }
11201
11202 if (cond_removed == 1)
11203 {
11204 *insn_len = 0;
11205
11206 /* Clear relocations. */
11207 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11208
fbaf61ad 11209 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 11210 {
11211 cond_irel =
11212 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11213 checked_types[i], laddr);
11214 if (cond_irel != irelend)
35c08157 11215 {
1c8f6a4d
KLC		 11216 if (*seq_len == 0
11217 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
11218 {
11219 /* If the branch instruction is 2 byte, it cannot remove
11220 directly. Only convert it to nop16 and remove it after
11221 checking alignment issue. */
11222 insn16 = NDS32_NOP16;
11223 bfd_putb16 (insn16, contents + laddr);
11224 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
11225 }
11226 else
11227 cond_irel->r_info =
11228 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 11229 }
35c08157 11230 }
1c8f6a4d
KLC		 11231 }
11232 else
11233 {
11234 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11235 R_NDS32_LONGJUMP5);
11236 }
35c08157 11237
0a1b45a2 11238 return true;
1c8f6a4d 11239}
35c08157 11240
1c8f6a4d 11241/* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
35c08157 11242
0a1b45a2 11243static bool
1c8f6a4d
KLC		 11244nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11245 Elf_Internal_Rela *internal_relocs, int *insn_len,
11246 int *seq_len, bfd_byte *contents,
11247 Elf_Internal_Sym *isymbuf,
11248 Elf_Internal_Shdr *symtab_hdr)
11249{
11250 /* There are 2 variations for LONGJUMP5
11251 case 2-4; 1st insn convertible, 16-bit on.
11252 movi55 ta, imm11 ; LONGJUMP7/INSN16
11253 beq rt, ta, label ; 15_PCREL
11254
11255 case 4-4; 1st insn not convertible
11256 movi55 ta, imm11 ; LONGJUMP7/INSN16
11257 beq rt, ta, label ; 15_PCREL */
11258
11259 bfd_vma laddr;
11260 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
1c8f6a4d
KLC		 11261 bfd_signed_vma foff;
11262 uint32_t insn, re_insn = 0;
11263 uint16_t insn16;
11264 uint32_t imm11;
35c08157 11265
1c8f6a4d
KLC		 11266 irelend = internal_relocs + sec->reloc_count;
11267 laddr = irel->r_offset;
35c08157 11268
1c8f6a4d
KLC		 11269 /* Get the reloc for the address from which the register is
11270 being loaded. This reloc will tell us which function is
11271 actually being called. */
35c08157 11272
1c8f6a4d
KLC		 11273 cond_irel =
11274 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11275 R_NDS32_15_PCREL_RELA, irel->r_addend);
11276 if (cond_irel == irelend)
11277 {
695344c0 11278 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP7",
2dcf00ce 11279 (uint64_t) irel->r_offset);
0a1b45a2 11280 return false;
1c8f6a4d 11281 }
35c08157 11282
1c8f6a4d 11283 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 11284 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr);
35c08157 11285
fbaf61ad
NC		 11286 if (foff == 0
11287 || foff < -CONSERVATIVE_8BIT_S1
1c8f6a4d 11288 || foff >= CONSERVATIVE_8BIT_S1)
0a1b45a2 11289 return false;
35c08157 11290
1c8f6a4d
KLC		 11291 /* Get the first instruction for its size. */
11292 insn = bfd_getb32 (contents + laddr);
11293 if (insn & 0x80000000)
11294 {
11295 *seq_len = 0;
11296 /* Get the immediate from movi55. */
11297 imm11 = N16_IMM5S (insn >> 16);
11298 }
11299 else
11300 {
11301 /* Get the immediate from movi. */
11302 imm11 = N32_IMM20S (insn);
35c08157
KLC		 11303 }
11304
1c8f6a4d
KLC		 11305 /* Get the branch instruction. */
11306 insn = bfd_getb32 (contents + irel->r_addend);
11307 /* Convert instruction to BR3. */
11308 if ((insn >> 14) & 0x1)
11309 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
11310 else
11311 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
35c08157 11312
1c8f6a4d 11313 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
35c08157 11314
1c8f6a4d
KLC		 11315 /* Set all relocations. */
11316 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
11317 R_NDS32_WORD_9_PCREL_RELA);
11318
11319 /* Clean relocations. */
11320 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11321 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
11322 R_NDS32_INSN16, irel->r_offset);
11323 if (insn_irel != irelend)
11324 {
11325 if (*seq_len == 0)
35c08157 11326 {
1c8f6a4d
KLC		 11327 /* If the first insntruction is 16bit, convert it to nop16. */
11328 insn16 = NDS32_NOP16;
11329 bfd_putb16 (insn16, contents + laddr);
11330 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157 11331 }
1c8f6a4d
KLC		 11332 else
11333 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
11334 R_NDS32_NONE);
35c08157 11335 }
1c8f6a4d 11336 *insn_len = 0;
35c08157 11337
0a1b45a2 11338 return true;
1c8f6a4d 11339}
35c08157 11340
fbaf61ad
NC		 11341/* We figure out and reassign the best gp value in nds32_elf_final_sda_base
11342 for each relax round. But the gp may changed dramatically and then cause
11343 the truncated to fit errors for the the converted gp instructions.
11344 Therefore, we must reserve the minimum but safe enough size to prevent it. */
11345
0a1b45a2 11346static bool
fbaf61ad 11347nds32_elf_relax_guard (bfd_vma *access_addr, bfd_vma local_sda, asection *sec,
0a1b45a2
AM		 11348 Elf_Internal_Rela *irel, bool *again,
11349 bool init,
fbaf61ad
NC		 11350 struct elf_nds32_link_hash_table *table,
11351 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
11352
11353{
11354 int offset_to_gp;
0a1b45a2 11355 static bool sec_pass = false;
fbaf61ad
NC		 11356 static asection *first_sec = NULL, *sym_sec;
11357 /* Record the number of instructions which may be removed. */
11358 static int count = 0, record_count;
11359 Elf_Internal_Sym *isym;
11360 struct elf_link_hash_entry *h = NULL;
11361 int indx;
11362 unsigned long r_symndx;
11363 bfd *abfd = sec->owner;
11364 static bfd_vma record_sda = 0;
11365 int sda_offset = 0;
11366
11367 /* Force doing relaxation when hyper-relax is high. */
11368 if (table->hyper_relax == 2)
0a1b45a2 11369 return true;
fbaf61ad
NC		 11370
11371 /* Do not relax the load/store patterns for the first
11372 relax round. */
11373 if (init)
11374 {
11375 if (!first_sec)
11376 first_sec = sec;
11377 else if (first_sec == sec)
11378 {
11379 record_count = count;
11380 count = 0;
0a1b45a2 11381 sec_pass = true;
fbaf61ad
NC		 11382 }
11383
11384 if (!sec_pass)
0a1b45a2 11385 *again = true;
fbaf61ad 11386
0a1b45a2 11387 return true;
fbaf61ad
NC		 11388 }
11389
11390 /* Generally, _SDA_BASE_ is fixed or smaller. But the large
11391 DATA_SEGMENT_ALIGN size in the linker script may make it
11392 get even bigger. */
11393 if (record_sda == 0)
11394 record_sda = local_sda;
11395 else if (local_sda > record_sda)
11396 sda_offset = local_sda - record_sda;
11397
11398 /* Assume the instruction will be removed in the best case. */
11399 count++;
11400
11401 /* We record the offset to gp for each symbol, and then check
11402 if it is changed dramatically after relaxing.
11403 (global symbol): elf32_nds32_hash_entry (h)->offset_to_gp
11404 (local symbol) : elf32_nds32_local_gp_offset (abfd)[r_symndx]. */
11405 r_symndx = ELF32_R_SYM (irel->r_info);
11406 if (r_symndx >= symtab_hdr->sh_info)
11407 {
11408 /* Global symbols. */
11409 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
11410 h = elf_sym_hashes (abfd)[indx];
11411 sym_sec = h->root.u.def.section;
11412 if (NDS32_GUARD_SEC_P (sym_sec->flags)
11413 || bfd_is_abs_section (sym_sec))
11414 {
11415 /* Forbid doing relaxation when hyper-relax is low. */
11416 if (table->hyper_relax == 0)
0a1b45a2 11417 return false;
fbaf61ad
NC		 11418
11419 offset_to_gp = *access_addr - local_sda;
11420 if (elf32_nds32_hash_entry (h)->offset_to_gp == 0)
11421 elf32_nds32_hash_entry (h)->offset_to_gp = offset_to_gp;
11422 else if (abs (elf32_nds32_hash_entry (h)->offset_to_gp)
11423 < abs (offset_to_gp) - sda_offset)
11424 {
11425 /* This may cause the error, so we reserve the
11426 safe enough size for relaxing. */
11427 if (*access_addr >= local_sda)
11428 *access_addr += (record_count * 4);
11429 else
11430 *access_addr -= (record_count * 4);
11431 }
11432 return sec_pass;
11433 }
11434 }
11435 else
11436 {
11437 /* Local symbols. */
11438 if (!elf32_nds32_allocate_local_sym_info (abfd))
0a1b45a2 11439 return false;
fbaf61ad
NC		 11440 isym = isymbuf + r_symndx;
11441
11442 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
11443 if (NDS32_GUARD_SEC_P (sym_sec->flags))
11444 {
11445 /* Forbid doing relaxation when hyper-relax is low. */
11446 if (table->hyper_relax == 0)
0a1b45a2 11447 return false;
fbaf61ad
NC		 11448
11449 offset_to_gp = *access_addr - local_sda;
11450 if (elf32_nds32_local_gp_offset (abfd)[r_symndx] == 0)
11451 elf32_nds32_local_gp_offset (abfd)[r_symndx] = offset_to_gp;
11452 else if (abs (elf32_nds32_local_gp_offset (abfd)[r_symndx])
11453 < abs (offset_to_gp) - sda_offset)
11454 {
11455 /* This may cause the error, so we reserve the
11456 safe enough size for relaxing. */
11457 if (*access_addr >= local_sda)
11458 *access_addr += (record_count * 4);
11459 else
11460 *access_addr -= (record_count * 4);
11461 }
11462 return sec_pass;
11463 }
11464 }
11465
0a1b45a2 11466 return true;
fbaf61ad
NC		 11467}
11468
1c8f6a4d 11469#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
35c08157 11470
1c8f6a4d 11471/* Relax LOADSTORE relocation for nds32_elf_relax_section. */
35c08157 11472
0a1b45a2 11473static bool
1c8f6a4d
KLC		 11474nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
11475 asection *sec, Elf_Internal_Rela *irel,
11476 Elf_Internal_Rela *internal_relocs, int *insn_len,
11477 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
fbaf61ad
NC		 11478 Elf_Internal_Shdr *symtab_hdr, int load_store_relax,
11479 struct elf_nds32_link_hash_table *table)
1c8f6a4d 11480{
6cae483a
AM		 11481 int eliminate_sethi = 0, range_type;
11482 unsigned int i;
1c8f6a4d
KLC		 11483 bfd_vma local_sda, laddr;
11484 int seq_len; /* Original length of instruction sequence. */
11485 uint32_t insn;
11486 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
11487 bfd_vma access_addr = 0;
11488 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
fbaf61ad
NC		 11489 struct elf_link_hash_entry *h = NULL;
11490 int indx;
1c8f6a4d
KLC		 11491 enum elf_nds32_reloc_type checked_types[] =
11492 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
11493 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
11494 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
11495 R_NDS32_TLS_LE_HI20
11496 };
35c08157 11497
1c8f6a4d
KLC		 11498 irelend = internal_relocs + sec->reloc_count;
11499 seq_len = GET_SEQ_LEN (irel->r_addend);
11500 laddr = irel->r_offset;
11501 *insn_len = seq_len;
35c08157 11502
1c8f6a4d 11503 /* Get the high part relocation. */
6cae483a 11504 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 11505 {
11506 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
11507 checked_types[i], laddr);
11508 if (hi_irelfn != irelend)
11509 break;
11510 }
35c08157 11511
1c8f6a4d
KLC		 11512 if (hi_irelfn == irelend)
11513 {
fbaf61ad
NC		 11514 /* Not R_NDS32_HI20_RELA. */
11515 if (i != 0)
11516 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LOADSTORE",
11517 (uint64_t) irel->r_offset);
0a1b45a2 11518 return false;
1c8f6a4d 11519 }
35c08157 11520
1c8f6a4d
KLC		 11521 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
11522 nds32_elf_final_sda_base (sec->output_section->owner,
0a1b45a2 11523 link_info, &local_sda, false);
35c08157 11524
1c8f6a4d
KLC		 11525 switch (ELF32_R_TYPE (hi_irelfn->r_info))
11526 {
11527 case R_NDS32_HI20_RELA:
11528 insn = bfd_getb32 (contents + laddr);
11529 access_addr =
11530 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
11531
fbaf61ad 11532 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
1c8f6a4d 11533 {
fbaf61ad
NC		 11534 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
11535 h = elf_sym_hashes (abfd)[indx];
11536 }
35c08157 11537
fbaf61ad
NC		 11538 /* Try movi. */
11539 if (range_type == NDS32_LOADSTORE_IMM
11540 && access_addr < CONSERVATIVE_20BIT
11541 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
11542 {
11543 eliminate_sethi = 1;
11544 break;
11545 }
1c8f6a4d 11546
fbaf61ad
NC		 11547 if (h && strcmp (h->root.root.string, FP_BASE_NAME) == 0)
11548 {
11549 eliminate_sethi = 1;
11550 break;
1c8f6a4d 11551 }
fbaf61ad 11552 else if (!nds32_elf_relax_guard (&access_addr, local_sda, sec, hi_irelfn,
0a1b45a2
AM		 11553 NULL, false, table, isymbuf, symtab_hdr))
11554 return false;
1c8f6a4d
KLC		 11555
11556 if (!load_store_relax)
0a1b45a2 11557 return false;
1c8f6a4d
KLC		 11558
11559 /* Case for set gp register. */
11560 if (N32_RT5 (insn) == REG_GP)
0a1b45a2 11561 return false;
1c8f6a4d
KLC		 11562
11563 if (range_type == NDS32_LOADSTORE_FLOAT_S
6cef73f9 11564 || range_type == NDS32_LOADSTORE_FLOAT_D)
1c8f6a4d
KLC		 11565 {
11566 range_l = sdata_range[0][0];
11567 range_h = sdata_range[0][1];
11568 }
11569 else
11570 {
11571 range_l = sdata_range[1][0];
11572 range_h = sdata_range[1][1];
11573 }
11574 break;
11575
1c8f6a4d 11576 default:
0a1b45a2 11577 return false;
1c8f6a4d
KLC		 11578 }
11579
11580 /* Delete sethi instruction. */
11581 if (eliminate_sethi == 1
11582 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
11583 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
11584 {
11585 hi_irelfn->r_info =
11586 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
11587 irel->r_info =
11588 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11589 *insn_len = 0;
0a1b45a2 11590 return true;
1c8f6a4d 11591 }
fbaf61ad 11592
0a1b45a2 11593 return false;
1c8f6a4d
KLC		 11594}
11595
11596/* Relax LO12 relocation for nds32_elf_relax_section. */
11597
11598static void
11599nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
11600 asection *sec, Elf_Internal_Rela *irel,
11601 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
fbaf61ad
NC		 11602 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
11603 struct elf_nds32_link_hash_table *table)
1c8f6a4d
KLC		 11604{
11605 uint32_t insn;
11606 bfd_vma local_sda, laddr;
11607 unsigned long reloc;
11608 bfd_vma access_addr;
11609 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
11610 Elf_Internal_Rela *irelfn = NULL, *irelend;
11611 struct elf_link_hash_entry *h = NULL;
11612 int indx;
11613
11614 /* For SDA base relative relaxation. */
11615 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
0a1b45a2 11616 &local_sda, false);
1c8f6a4d
KLC		 11617
11618 irelend = internal_relocs + sec->reloc_count;
11619 laddr = irel->r_offset;
11620 insn = bfd_getb32 (contents + laddr);
11621
11622 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
11623 return;
11624
11625 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11626
11627 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
11628 {
11629 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
11630 h = elf_sym_hashes (abfd)[indx];
11631 }
11632
fbaf61ad 11633 /* Try movi. */
1c8f6a4d
KLC		 11634 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
11635 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
11636 {
11637 reloc = R_NDS32_20_RELA;
11638 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11639 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11640 bfd_putb32 (insn, contents + laddr);
11641 }
1c8f6a4d
KLC		 11642 else
11643 {
fbaf61ad
NC		 11644 if (h && strcmp (h->root.root.string, FP_BASE_NAME) == 0)
11645 {
11646 /* Fall through. */
11647 }
11648 else if (!nds32_elf_relax_guard (&access_addr, local_sda, sec, irel, NULL,
0a1b45a2 11649 false, table, isymbuf, symtab_hdr))
fbaf61ad
NC		 11650 return;
11651
1c8f6a4d
KLC		 11652 range_l = sdata_range[1][0];
11653 range_h = sdata_range[1][1];
11654 switch (ELF32_R_TYPE (irel->r_info))
11655 {
11656 case R_NDS32_LO12S0_RELA:
11657 reloc = R_NDS32_SDA19S0_RELA;
11658 break;
11659 case R_NDS32_LO12S1_RELA:
11660 reloc = R_NDS32_SDA18S1_RELA;
11661 break;
11662 case R_NDS32_LO12S2_RELA:
11663 reloc = R_NDS32_SDA17S2_RELA;
11664 break;
11665 case R_NDS32_LO12S2_DP_RELA:
11666 range_l = sdata_range[0][0];
11667 range_h = sdata_range[0][1];
11668 reloc = R_NDS32_SDA12S2_DP_RELA;
11669 break;
11670 case R_NDS32_LO12S2_SP_RELA:
11671 range_l = sdata_range[0][0];
11672 range_h = sdata_range[0][1];
11673 reloc = R_NDS32_SDA12S2_SP_RELA;
11674 break;
11675 default:
11676 return;
11677 }
11678
11679 /* There are range_h and range_l because linker has to promise
11680 all sections move cross one page together. */
11681 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
fbaf61ad
NC		 11682 || (local_sda > access_addr && (local_sda - access_addr) <= range_l)
11683 || (h && strcmp (h->root.root.string, FP_BASE_NAME) == 0))
1c8f6a4d
KLC		 11684 {
11685 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
35c08157 11686 {
1c8f6a4d
KLC		 11687 /* Maybe we should add R_NDS32_INSN16 reloc type here
11688 or manually do some optimization. sethi can't be
11689 eliminated when updating $gp so the relative ori
11690 needs to be preserved. */
11691 return;
35c08157 11692 }
1c8f6a4d
KLC		 11693 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
11694 &insn))
11695 return;
11696 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11697 bfd_putb32 (insn, contents + laddr);
11698
11699 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11700 R_NDS32_INSN16);
11701 /* SDA17 must keep INSN16 for converting fp_as_gp. */
11702 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
11703 irelfn->r_info =
11704 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
11705
35c08157 11706 }
1c8f6a4d
KLC		 11707 }
11708 return;
11709}
35c08157 11710
1c8f6a4d 11711/* Relax PTR relocation for nds32_elf_relax_section. */
35c08157 11712
0a1b45a2 11713static bool
1c8f6a4d
KLC		 11714nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11715 Elf_Internal_Rela *internal_relocs, int *insn_len,
11716 int *seq_len, bfd_byte *contents)
11717{
11718 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
35c08157 11719
1c8f6a4d 11720 irelend = internal_relocs + sec->reloc_count;
35c08157 11721
1c8f6a4d
KLC		 11722 re_irel =
11723 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11724 R_NDS32_PTR_RESOLVED, irel->r_addend);
35c08157 11725
1c8f6a4d
KLC		 11726 if (re_irel == irelend)
11727 {
695344c0 11728 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_PTR",
2dcf00ce 11729 (uint64_t) irel->r_offset);
0a1b45a2 11730 return false;
1c8f6a4d 11731 }
35c08157 11732
1c8f6a4d 11733 if (re_irel->r_addend != 1)
0a1b45a2 11734 return false;
35c08157 11735
1c8f6a4d
KLC		 11736 /* Pointed target is relaxed and no longer needs this void *,
11737 change the type to NONE. */
11738 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11739
1c8f6a4d
KLC		 11740 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11741 not exist, it means only count 1 and remove it directly. */
11742 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11743 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11744 R_NDS32_PTR_COUNT);
11745 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11746 R_NDS32_PTR);
11747 if (count_irel != irelend)
11748 {
11749 if (--count_irel->r_addend > 0)
0a1b45a2 11750 return false;
1c8f6a4d
KLC		 11751 }
11752
11753 if (ptr_irel != irelend)
0a1b45a2 11754 return false;
1c8f6a4d
KLC		 11755
11756 /* If the PTR_COUNT is already 0, remove current instruction. */
11757 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11758 *insn_len = 0;
0a1b45a2 11759 return true;
1c8f6a4d
KLC		 11760}
11761
fbaf61ad 11762/* Relax LWC relocation for nds32_elf_relax_section. */
1c8f6a4d
KLC		 11763
11764static void
fbaf61ad
NC		 11765nds32_elf_relax_flsi (struct bfd_link_info *link_info, bfd *abfd,
11766 asection *sec, Elf_Internal_Rela *irel,
11767 Elf_Internal_Rela *internal_relocs,
11768 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
0a1b45a2 11769 Elf_Internal_Shdr *symtab_hdr, bool *again)
1c8f6a4d 11770{
fbaf61ad
NC		 11771 /* Pattern:
11772 sethi ra, hi20(symbol) ; HI20/LOADSTORE
11773 ori ra, ra, lo12(symbol) ; LO12S0/PTR/PTR/.../INSN16
11774 flsi fsa, [ra + offset1] ; LSI/PTR_RESOLVED/INSN16
11775 flsi fsb, [ra + offset2] ; LSI/PTR_RESOLVED/INSN16
11776 ... */
11777
1c8f6a4d 11778 uint32_t insn;
1c8f6a4d 11779 bfd_vma local_sda, laddr;
fbaf61ad
NC		 11780 unsigned long reloc;
11781 bfd_vma access_addr, flsi_offset;
11782 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
11783 Elf_Internal_Rela *irelend, *re_irel;
11784 unsigned int opcode;
1c8f6a4d
KLC		 11785
11786 irelend = internal_relocs + sec->reloc_count;
11787 laddr = irel->r_offset;
11788 insn = bfd_getb32 (contents + laddr);
11789
fbaf61ad 11790 if ((insn & 0x80000000) || !is_sda_access_insn (insn))
1c8f6a4d
KLC		 11791 return;
11792
fbaf61ad
NC		 11793 /* Can not do relaxation for bi format. */
11794 if ((insn & 0x1000))
1c8f6a4d
KLC		 11795 return;
11796
fbaf61ad
NC		 11797 /* Only deal with flsi, fssi, fldi, fsdi, so far. */
11798 opcode = N32_OP6 (insn);
11799 if ((opcode == N32_OP6_LWC) || (opcode == N32_OP6_SWC))
11800 reloc = R_NDS32_SDA12S2_SP_RELA;
11801 else if ((opcode == N32_OP6_LDC) || (opcode == N32_OP6_SDC))
11802 reloc = R_NDS32_SDA12S2_DP_RELA;
1c8f6a4d
KLC		 11803 else
11804 return;
11805
fbaf61ad
NC		 11806 re_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11807 R_NDS32_PTR_RESOLVED);
11808 if (re_irel == irelend)
1c8f6a4d 11809 {
fbaf61ad
NC		 11810 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LSI",
11811 (uint64_t) irel->r_offset);
11812 return;
1c8f6a4d 11813 }
1c8f6a4d 11814
fbaf61ad 11815 /* For SDA base relative relaxation. */
1c8f6a4d 11816 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
0a1b45a2 11817 &local_sda, false);
fbaf61ad
NC		 11818 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11819 flsi_offset = (insn & 0xfff) << 2;
11820 access_addr += flsi_offset;
11821 range_l = sdata_range[0][0];
11822 range_h = sdata_range[0][1];
1c8f6a4d 11823
fbaf61ad
NC		 11824 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
11825 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
1c8f6a4d 11826 {
fbaf61ad
NC		 11827 /* Turn flsi instruction into sda access format. */
11828 insn = (insn & 0x7ff07000) | (REG_GP << 15);
1c8f6a4d 11829
fbaf61ad
NC		 11830 /* Add relocation type to flsi. */
11831 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11832 irel->r_addend += flsi_offset;
11833 bfd_putb32 (insn, contents + re_irel->r_offset);
1c8f6a4d 11834
fbaf61ad 11835 re_irel->r_addend |= 1;
0a1b45a2 11836 *again = true;
1c8f6a4d 11837 }
1c8f6a4d
KLC		 11838}
11839
0a1b45a2 11840static bool
1c8f6a4d
KLC		 11841nds32_relax_adjust_label (bfd *abfd, asection *sec,
11842 Elf_Internal_Rela *internal_relocs,
11843 bfd_byte *contents,
11844 nds32_elf_blank_t **relax_blank_list,
11845 int optimize, int opt_size)
11846{
11847 /* This code block is used to adjust 4-byte alignment by relax a pair
11848 of instruction a time.
11849
11850 It recognizes three types of relocations.
de194d85 11851 1. R_NDS32_LABEL - a alignment.
1c8f6a4d
KLC		 11852 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11853 3. is_16bit_NOP () - remove a 16-bit instruction. */
11854
de194d85
YC		 11855 /* TODO: It seems currently implementation only support 4-byte alignment.
11856 We should handle any-alignment. */
1c8f6a4d
KLC		 11857
11858 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11859 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11860 Elf_Internal_Rela rel_temp;
11861 Elf_Internal_Rela *irelend;
11862 bfd_vma address;
11863 uint16_t insn16;
11864
11865 /* Checking for branch relaxation relies on the relocations to
11866 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11867 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11868 sizeof (Elf_Internal_Rela), compar_reloc);
11869
11870 irelend = internal_relocs + sec->reloc_count;
11871
11872 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11873 /* FIXME: Can we generate the right order in assembler?
11874 So we don't have to swapping them here. */
11875
11876 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11877 label_rel < irelend; label_rel++)
11878 {
11879 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11880 continue;
11881
11882 /* Find the first reloc has the same offset with label_rel. */
11883 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11884 insn_rel++;
11885
11886 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11887 insn_rel++)
11888 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11889 address. */
11890 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11891 break;
11892
11893 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11894 && insn_rel < label_rel)
11895 {
11896 /* Swap the two reloc if the R_NDS32_INSN16 is
11897 before R_NDS32_LABEL. */
11898 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11899 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11900 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11901 }
11902 }
11903
11904 label_rel = NULL;
11905 insn_rel = NULL;
11906 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11907 or higher, remove other R_NDS32_LABEL with lower alignment.
11908 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11909 then the R_NDS32_LABEL sequence is broke. */
11910 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11911 {
11912 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11913 {
11914 if (label_rel == NULL)
11915 {
11916 if (tmp_rel->r_addend < 2)
11917 label_rel = tmp_rel;
11918 continue;
11919 }
11920 else if (tmp_rel->r_addend > 1)
11921 {
11922 /* Remove all LABEL relocation from label_rel to tmp_rel
11923 including relocations with same offset as tmp_rel. */
fbaf61ad 11924 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel; tmp2_rel++)
1c8f6a4d 11925 {
fbaf61ad
NC		 11926 if (tmp2_rel->r_offset == tmp_rel->r_offset)
11927 break;
11928
1c8f6a4d
KLC		 11929 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11930 && tmp2_rel->r_addend < 2)
11931 tmp2_rel->r_info =
11932 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11933 R_NDS32_NONE);
11934 }
11935 label_rel = NULL;
11936 }
11937 }
11938 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11939 {
11940 /* A new INSN16 which can be converted, so clear label_rel. */
11941 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11942 irelend, &insn16)
11943 || is_16bit_NOP (abfd, sec, tmp_rel))
11944 label_rel = NULL;
11945 }
11946 }
11947
11948 label_rel = NULL;
11949 insn_rel = NULL;
11950 /* Optimized for speed and nothing has not been relaxed.
11951 It's time to align labels.
11952 We may convert a 16-bit instruction right before a label to
11953 32-bit, in order to align the label if necessary
11954 all reloc entries has been sorted by r_offset. */
fbaf61ad
NC		 11955 for (irel = internal_relocs;
11956 irel < irelend && irel->r_offset < sec->size; irel++)
1c8f6a4d
KLC		 11957 {
11958 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11959 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11960 continue;
11961
11962 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11963 {
11964 /* A new INSN16 found, resize the old one. */
11965 if (is_convert_32_to_16
11966 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11967 || is_16bit_NOP (abfd, sec, irel))
11968 {
11969 if (insn_rel)
11970 {
11971 /* Previous INSN16 reloc exists, reduce its
11972 size to 16-bit. */
11973 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11974 irelend, &insn16))
35c08157 11975 {
1c8f6a4d
KLC		 11976 nds32_elf_write_16 (abfd, contents, insn_rel,
11977 internal_relocs, irelend, insn16);
11978
11979 if (!insert_nds32_elf_blank_recalc_total
11980 (relax_blank_list, insn_rel->r_offset + 2, 2))
0a1b45a2 11981 return false;
1c8f6a4d
KLC		 11982 }
11983 else if (is_16bit_NOP (abfd, sec, insn_rel))
11984 {
11985 if (!insert_nds32_elf_blank_recalc_total
11986 (relax_blank_list, insn_rel->r_offset, 2))
0a1b45a2 11987 return false;
1c8f6a4d
KLC		 11988 }
11989 insn_rel->r_info =
11990 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11991 }
11992 /* Save the new one for later use. */
11993 insn_rel = irel;
11994 }
11995 else
11996 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11997 R_NDS32_NONE);
11998 }
11999 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
12000 {
12001 /* Search for label. */
12002 int force_relax = 0;
12003
12004 /* Label on 16-bit instruction or optimization
12005 needless, just reset this reloc. */
12006 insn16 = bfd_getb16 (contents + irel->r_offset);
12007 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
12008 {
12009 irel->r_info =
12010 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
12011 continue;
12012 }
12013
12014 address =
12015 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
12016 irel->r_offset, 1);
12017
12018 if (!insn_rel)
12019 {
12020 /* Check if there is case which can not be aligned. */
12021 if (irel->r_addend == 2 && address & 0x2)
0a1b45a2 12022 return false;
1c8f6a4d
KLC		 12023 continue;
12024 }
12025
12026 /* Try to align this label. */
12027
12028 if ((irel->r_addend & 0x1f) < 2)
12029 {
12030 /* Check if there is a INSN16 at the same address.
12031 Label_rel always seats before insn_rel after
12032 our sort. */
12033
12034 /* Search for INSN16 at LABEL location. If INSN16 is at
12035 same location and this LABEL alignment is lower than 2,
12036 the INSN16 can be converted to 2-byte. */
12037 for (tmp_rel = irel;
12038 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
12039 tmp_rel++)
12040 {
12041 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
12042 && (is_convert_32_to_16
12043 (abfd, sec, tmp_rel, internal_relocs,
12044 irelend, &insn16)
12045 || is_16bit_NOP (abfd, sec, tmp_rel)))
12046 {
12047 force_relax = 1;
12048 break;
12049 }
12050 }
12051 }
12052
12053 if (force_relax || irel->r_addend == 1 || address & 0x2)
12054 {
12055 /* Label not aligned. */
12056 /* Previous reloc exists, reduce its size to 16-bit. */
12057 if (is_convert_32_to_16 (abfd, sec, insn_rel,
12058 internal_relocs, irelend, &insn16))
12059 {
12060 nds32_elf_write_16 (abfd, contents, insn_rel,
12061 internal_relocs, irelend, insn16);
12062
12063 if (!insert_nds32_elf_blank_recalc_total
12064 (relax_blank_list, insn_rel->r_offset + 2, 2))
0a1b45a2 12065 return false;
1c8f6a4d
KLC		 12066 }
12067 else if (is_16bit_NOP (abfd, sec, insn_rel))
12068 {
12069 if (!insert_nds32_elf_blank_recalc_total
12070 (relax_blank_list, insn_rel->r_offset, 2))
0a1b45a2 12071 return false;
1c8f6a4d
KLC		 12072 }
12073
12074 }
12075 /* INSN16 reloc is used. */
12076 insn_rel = NULL;
12077 }
12078 }
12079
12080 address =
12081 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
12082 if (insn_rel && (address & 0x2 || opt_size))
12083 {
12084 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
12085 irelend, &insn16))
12086 {
12087 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
12088 irelend, insn16);
12089 if (!insert_nds32_elf_blank_recalc_total
12090 (relax_blank_list, insn_rel->r_offset + 2, 2))
0a1b45a2 12091 return false;
1c8f6a4d
KLC		 12092 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
12093 R_NDS32_NONE);
12094 }
12095 else if (is_16bit_NOP (abfd, sec, insn_rel))
12096 {
12097 if (!insert_nds32_elf_blank_recalc_total
12098 (relax_blank_list, insn_rel->r_offset, 2))
0a1b45a2 12099 return false;
1c8f6a4d
KLC		 12100 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
12101 R_NDS32_NONE);
12102 }
12103 }
12104 insn_rel = NULL;
0a1b45a2 12105 return true;
1c8f6a4d
KLC		 12106}
12107
0a1b45a2 12108static bool
1c8f6a4d 12109nds32_elf_relax_section (bfd *abfd, asection *sec,
0a1b45a2 12110 struct bfd_link_info *link_info, bool *again)
1c8f6a4d
KLC		 12111{
12112 nds32_elf_blank_t *relax_blank_list = NULL;
12113 Elf_Internal_Shdr *symtab_hdr;
12114 Elf_Internal_Rela *internal_relocs;
12115 Elf_Internal_Rela *irel;
12116 Elf_Internal_Rela *irelend;
12117 Elf_Internal_Sym *isymbuf = NULL;
12118 bfd_byte *contents = NULL;
0a1b45a2 12119 bool result = true;
1c8f6a4d
KLC		 12120 int optimize = 0;
12121 int opt_size = 0;
12122 uint32_t insn;
12123 uint16_t insn16;
12124
12125 /* Target dependnet option. */
12126 struct elf_nds32_link_hash_table *table;
12127 int load_store_relax;
1c8f6a4d
KLC		 12128
12129 relax_blank_list = NULL;
12130
0a1b45a2 12131 *again = false;
1c8f6a4d
KLC		 12132
12133 /* Nothing to do for
12134 * relocatable link or
12135 * non-relocatable section or
12136 * non-code section or
12137 * empty content or
12138 * no reloc entry. */
0e1862bb 12139 if (bfd_link_relocatable (link_info)
1c8f6a4d 12140 || (sec->flags & SEC_RELOC) == 0
cd28e7aa 12141 || (sec->flags & SEC_EXCLUDE) != 0
1c8f6a4d 12142 || (sec->flags & SEC_CODE) == 0
fbaf61ad
NC		 12143 || sec->size == 0
12144 || sec->reloc_count == 0)
0a1b45a2 12145 return true;
1c8f6a4d
KLC		 12146
12147 /* 09.12.11 Workaround. */
12148 /* We have to adjust align for R_NDS32_LABEL if needed.
12149 The adjust approach only can fix 2-byte align once. */
12150 if (sec->alignment_power > 2)
0a1b45a2 12151 return true;
1c8f6a4d 12152
fbaf61ad
NC		 12153 /* Do TLS model conversion once at first. */
12154 nds32_elf_unify_tls_model (abfd, sec, contents, link_info);
12155
1c8f6a4d
KLC		 12156 /* The optimization type to do. */
12157
12158 table = nds32_elf_hash_table (link_info);
1c8f6a4d 12159
fbaf61ad
NC		 12160 /* Save the first section for abs symbol relaxation.
12161 This is used for checking gp relaxation in the
12162 nds32_elf_relax_loadstore and nds32_elf_relax_lo12. */
0a1b45a2 12163 nds32_elf_relax_guard (NULL, 0, sec, NULL, again, true,
fbaf61ad
NC		 12164 table, NULL, NULL);
12165
1c8f6a4d
KLC		 12166 /* The begining of general relaxation. */
12167
12168 if (is_SDA_BASE_set == 0)
12169 {
12170 bfd_vma gp;
12171 is_SDA_BASE_set = 1;
12172 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
0a1b45a2 12173 &gp, false);
c410035d 12174 relax_range_measurement (abfd, link_info);
1c8f6a4d
KLC		 12175 }
12176
1c8f6a4d
KLC		 12177 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12178 /* Relocations MUST be kept in memory, because relaxation adjust them. */
12179 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
0a1b45a2 12180 true /* keep_memory */);
1c8f6a4d
KLC		 12181 if (internal_relocs == NULL)
12182 goto error_return;
12183
12184 irelend = internal_relocs + sec->reloc_count;
12185 irel = find_relocs_at_address (internal_relocs, internal_relocs,
12186 irelend, R_NDS32_RELAX_ENTRY);
12187
12188 if (irel == irelend)
0a1b45a2 12189 return true;
1c8f6a4d
KLC		 12190
12191 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
12192 {
12193 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
0a1b45a2 12194 return true;
1c8f6a4d
KLC		 12195
12196 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
12197 optimize = 1;
12198
12199 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
12200 opt_size = 1;
12201 }
12202
12203 load_store_relax = table->load_store_relax;
12204
12205 /* Get symbol table and section content. */
1781a9d0 12206 contents = NULL;
0a1b45a2 12207 if (!nds32_get_section_contents (abfd, sec, &contents, true)
1c8f6a4d
KLC		 12208 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12209 goto error_return;
12210
12211 /* Do relax loop only when finalize is not done.
12212 Take care of relaxable relocs except INSN16. */
12213 for (irel = internal_relocs; irel < irelend; irel++)
12214 {
12215 int seq_len; /* Original length of instruction sequence. */
12216 int insn_len = 0; /* Final length of instruction sequence. */
0a1b45a2 12217 bool removed;
1c8f6a4d
KLC		 12218
12219 insn = 0;
12220 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
12221 && (irel->r_addend & 0x1f) >= 2)
12222 optimize = 1;
12223
12224 /* Relocation Types
12225 R_NDS32_LONGCALL1 53
12226 R_NDS32_LONGCALL2 54
12227 R_NDS32_LONGCALL3 55
12228 R_NDS32_LONGJUMP1 56
12229 R_NDS32_LONGJUMP2 57
12230 R_NDS32_LONGJUMP3 58
12231 R_NDS32_LOADSTORE 59 */
12232 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
12233 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
12234 seq_len = GET_SEQ_LEN (irel->r_addend);
12235
12236 /* Relocation Types
12237 R_NDS32_LONGCALL4 107
12238 R_NDS32_LONGCALL5 108
12239 R_NDS32_LONGCALL6 109
12240 R_NDS32_LONGJUMP4 110
12241 R_NDS32_LONGJUMP5 111
12242 R_NDS32_LONGJUMP6 112
12243 R_NDS32_LONGJUMP7 113 */
12244 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
12245 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
12246 seq_len = 4;
12247
12248 /* Relocation Types
12249 R_NDS32_LO12S0_RELA 30
12250 R_NDS32_LO12S1_RELA 29
12251 R_NDS32_LO12S2_RELA 28
12252 R_NDS32_LO12S2_SP_RELA 71
12253 R_NDS32_LO12S2_DP_RELA 70
12254 R_NDS32_GOT_LO12 46
12255 R_NDS32_GOTOFF_LO12 50
12256 R_NDS32_PLTREL_LO12 65
12257 R_NDS32_PLT_GOTREL_LO12 67
12258 R_NDS32_17IFC_PCREL_RELA 96
12259 R_NDS32_GOT_SUFF 193
12260 R_NDS32_GOTOFF_SUFF 194
12261 R_NDS32_PLT_GOT_SUFF 195
12262 R_NDS32_MULCALL_SUFF 196
12263 R_NDS32_PTR 197 */
12264 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
12265 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
12266 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
12267 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
12268 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
12269 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
12270 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
12271 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
12272 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
12273 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
12274 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
12275 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12276 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
12277 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
fbaf61ad
NC		 12278 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS
12279 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LSI)
1c8f6a4d
KLC		 12280 seq_len = 0;
12281 else
12282 continue;
12283
12284 insn_len = seq_len;
0a1b45a2 12285 removed = false;
1c8f6a4d
KLC		 12286
12287 switch (ELF32_R_TYPE (irel->r_info))
12288 {
12289 case R_NDS32_LONGCALL1:
12290 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
12291 &insn_len, contents, isymbuf,
12292 symtab_hdr);
12293 break;
12294 case R_NDS32_LONGCALL2:
12295 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
12296 &insn_len, contents, isymbuf,
12297 symtab_hdr);
12298 break;
12299 case R_NDS32_LONGCALL3:
12300 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
12301 &insn_len, contents, isymbuf,
12302 symtab_hdr);
12303 break;
12304 case R_NDS32_LONGJUMP1:
12305 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
12306 &insn_len, contents, isymbuf,
12307 symtab_hdr);
12308 break;
12309 case R_NDS32_LONGJUMP2:
12310 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
12311 &insn_len, contents, isymbuf,
12312 symtab_hdr);
12313 break;
12314 case R_NDS32_LONGJUMP3:
12315 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
12316 &insn_len, contents, isymbuf,
12317 symtab_hdr);
12318 break;
12319 case R_NDS32_LONGCALL4:
12320 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
12321 &insn_len, contents, isymbuf,
12322 symtab_hdr);
12323 break;
12324 case R_NDS32_LONGCALL5:
12325 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
12326 &insn_len, contents, isymbuf,
12327 symtab_hdr);
12328 break;
12329 case R_NDS32_LONGCALL6:
12330 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
12331 &insn_len, contents, isymbuf,
12332 symtab_hdr);
12333 break;
12334 case R_NDS32_LONGJUMP4:
12335 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
12336 &insn_len, contents, isymbuf,
12337 symtab_hdr);
12338 break;
12339 case R_NDS32_LONGJUMP5:
12340 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
12341 &insn_len, &seq_len, contents,
12342 isymbuf, symtab_hdr);
12343 break;
12344 case R_NDS32_LONGJUMP6:
12345 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
12346 &insn_len, &seq_len, contents,
12347 isymbuf, symtab_hdr);
12348 break;
12349 case R_NDS32_LONGJUMP7:
12350 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
12351 &insn_len, &seq_len, contents,
12352 isymbuf, symtab_hdr);
12353 break;
12354 case R_NDS32_LOADSTORE:
12355 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
12356 internal_relocs, &insn_len,
12357 contents, isymbuf, symtab_hdr,
fbaf61ad 12358 load_store_relax, table);
1c8f6a4d
KLC		 12359 break;
12360 case R_NDS32_LO12S0_RELA:
12361 case R_NDS32_LO12S1_RELA:
fbaf61ad 12362 case R_NDS32_LO12S2_RELA:
1c8f6a4d
KLC		 12363 case R_NDS32_LO12S2_DP_RELA:
12364 case R_NDS32_LO12S2_SP_RELA:
1c8f6a4d
KLC		 12365 /* Relax for low part. */
12366 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
fbaf61ad 12367 contents, isymbuf, symtab_hdr, table);
1c8f6a4d
KLC		 12368
12369 /* It is impossible to delete blank, so just continue. */
12370 continue;
fbaf61ad
NC		 12371 case R_NDS32_PTR:
12372 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12373 &insn_len, &seq_len, contents);
12374 break;
12375 case R_NDS32_LSI:
12376 nds32_elf_relax_flsi (link_info, abfd, sec, irel, internal_relocs,
12377 contents, isymbuf, symtab_hdr, again);
12378 continue;
1c8f6a4d
KLC		 12379 case R_NDS32_GOT_LO12:
12380 case R_NDS32_GOTOFF_LO12:
12381 case R_NDS32_PLTREL_LO12:
12382 case R_NDS32_PLT_GOTREL_LO12:
12383 case R_NDS32_GOTPC_LO12:
1c8f6a4d 12384 case R_NDS32_TLS_LE_LO12:
1c8f6a4d 12385 case R_NDS32_TLS_LE_ADD:
1c8f6a4d 12386 case R_NDS32_TLS_LE_LS:
1c8f6a4d 12387 case R_NDS32_PLT_GOT_SUFF:
1c8f6a4d 12388 case R_NDS32_GOT_SUFF:
1c8f6a4d 12389 case R_NDS32_GOTOFF_SUFF:
1c8f6a4d
KLC		 12390 continue;
12391 default:
12392 continue;
1c8f6a4d 12393 }
fbaf61ad 12394
1c8f6a4d
KLC		 12395 if (removed && seq_len - insn_len > 0)
12396 {
12397 if (!insert_nds32_elf_blank
12398 (&relax_blank_list, irel->r_offset + insn_len,
12399 seq_len - insn_len))
12400 goto error_return;
0a1b45a2 12401 *again = true;
35c08157 12402 }
1c8f6a4d
KLC		 12403 }
12404
12405 calc_nds32_blank_total (relax_blank_list);
12406
12407 if (table->relax_fp_as_gp)
12408 {
12409 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12410 irelend, isymbuf))
12411 goto error_return;
35c08157 12412
535b785f 12413 if (!*again)
35c08157 12414 {
1c8f6a4d
KLC		 12415 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12416 irelend))
12417 goto error_return;
35c08157
KLC		 12418 }
12419 }
1c8f6a4d 12420
535b785f 12421 if (!*again)
1c8f6a4d
KLC		 12422 {
12423 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12424 &relax_blank_list, optimize, opt_size))
12425 goto error_return;
12426 }
12427
12428 /* It doesn't matter optimize_for_space_no_align anymore.
35c08157
KLC		 12429 If object file is assembled with flag '-Os',
12430 the we don't adjust jump-destination on 4-byte boundary. */
12431
12432 if (relax_blank_list)
12433 {
12434 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12435 relax_blank_list = NULL;
12436 }
12437
535b785f 12438 if (!*again)
35c08157
KLC		 12439 {
12440 /* Closing the section, so we don't relax it anymore. */
12441 bfd_vma sec_size_align;
12442 Elf_Internal_Rela *tmp_rel;
12443
12444 /* Pad to alignment boundary. Only handle current section alignment. */
609332f1
NC		 12445 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
12446 & ((-1U) << sec->alignment_power);
35c08157
KLC		 12447 if ((sec_size_align - sec->size) & 0x2)
12448 {
12449 insn16 = NDS32_NOP16;
12450 bfd_putb16 (insn16, contents + sec->size);
12451 sec->size += 2;
12452 }
12453
12454 while (sec_size_align != sec->size)
12455 {
12456 insn = NDS32_NOP32;
12457 bfd_putb32 (insn, contents + sec->size);
12458 sec->size += 4;
12459 }
12460
1c8f6a4d
KLC		 12461 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12462 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 12463 if (tmp_rel != irelend)
12464 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12465
12466 clean_nds32_elf_blank ();
12467 }
12468
dc1e8a47 12469 finish:
c9594989 12470 if (elf_section_data (sec)->relocs != internal_relocs)
35c08157
KLC		 12471 free (internal_relocs);
12472
c9594989 12473 if (elf_section_data (sec)->this_hdr.contents != contents)
35c08157
KLC		 12474 free (contents);
12475
c9594989 12476 if (symtab_hdr->contents != (bfd_byte *) isymbuf)
35c08157
KLC		 12477 free (isymbuf);
12478
12479 return result;
12480
dc1e8a47 12481 error_return:
0a1b45a2 12482 result = false;
35c08157
KLC		 12483 goto finish;
12484}
12485
12486static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12487{
12488 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12489 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12490 {NULL, 0, 0, 0, 0}
12491};
12492
0a1b45a2 12493static bool
bf577467
AM		 12494nds32_elf_section_flags (const Elf_Internal_Shdr *hdr)
12495{
12496 const char *name = hdr->bfd_section->name;
12497
3f3328b8
ML		 12498 if (startswith (name, ".sbss")
12499 || startswith (name, ".sdata"))
bf577467
AM		 12500 hdr->bfd_section->flags |= SEC_SMALL_DATA;
12501
0a1b45a2 12502 return true;
bf577467
AM		 12503}
12504
0a1b45a2 12505static bool
35c08157
KLC		 12506nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12507 struct bfd_link_info *info,
12508 void *finfo ATTRIBUTE_UNUSED,
37bb890f
AM		 12509 int (*func) (void *, const char *,
12510 Elf_Internal_Sym *,
12511 asection *,
12512 struct elf_link_hash_entry *)
35c08157
KLC		 12513 ATTRIBUTE_UNUSED)
12514{
12515 FILE *sym_ld_script = NULL;
12516 struct elf_nds32_link_hash_table *table;
12517
12518 table = nds32_elf_hash_table (info);
12519 sym_ld_script = table->sym_ld_script;
12520
12521 if (check_start_export_sym)
12522 fprintf (sym_ld_script, "}\n");
12523
0a1b45a2 12524 return true;
35c08157
KLC		 12525}
12526
12527static enum elf_reloc_type_class
12528nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12529 const asection *rel_sec ATTRIBUTE_UNUSED,
12530 const Elf_Internal_Rela *rela)
12531{
12532 switch ((int) ELF32_R_TYPE (rela->r_info))
12533 {
12534 case R_NDS32_RELATIVE:
12535 return reloc_class_relative;
12536 case R_NDS32_JMP_SLOT:
12537 return reloc_class_plt;
12538 case R_NDS32_COPY:
12539 return reloc_class_copy;
12540 default:
12541 return reloc_class_normal;
12542 }
12543}
12544
12545/* Put target dependent option into info hash table. */
12546void
12547bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12548 int relax_fp_as_gp,
12549 int eliminate_gc_relocs,
fbaf61ad
NC		 12550 FILE * sym_ld_script,
12551 int hyper_relax,
12552 int tls_desc_trampoline,
12553 int load_store_relax)
35c08157
KLC		 12554{
12555 struct elf_nds32_link_hash_table *table;
12556
12557 table = nds32_elf_hash_table (link_info);
12558 if (table == NULL)
12559 return;
12560
12561 table->relax_fp_as_gp = relax_fp_as_gp;
12562 table->eliminate_gc_relocs = eliminate_gc_relocs;
12563 table->sym_ld_script = sym_ld_script;
fbaf61ad
NC		 12564 table->hyper_relax = hyper_relax;
12565 table->tls_desc_trampoline = tls_desc_trampoline;
35c08157 12566 table ->load_store_relax = load_store_relax;
35c08157
KLC		 12567}
12568\f
fbaf61ad 12569
35c08157
KLC		 12570/* These functions and data-structures are used for fp-as-gp
12571 optimization. */
12572
12573#define FAG_THRESHOLD 3 /* At least 3 gp-access. */
1c8f6a4d
KLC		 12574/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12575 the read-only section and read-write section. */
12576#define FAG_WINDOW (508 - 32)
35c08157
KLC		 12577
12578/* An nds32_fag represent a gp-relative access.
12579 We find best fp-base by using a sliding window
12580 to find a base address which can cover most gp-access. */
12581struct nds32_fag
12582{
12583 struct nds32_fag *next; /* NULL-teminated linked list. */
12584 bfd_vma addr; /* The address of this fag. */
12585 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12586 It is used for applying FP7U2_FLAG. */
12587 int count; /* How many times this address is referred.
12588 There should be exactly `count' relocations
12589 in relas. */
12590 int relas_capcity; /* The buffer size of relas.
12591 We use an array instead of linked-list,
12592 and realloc is used to adjust buffer size. */
12593};
12594
12595static void
12596nds32_fag_init (struct nds32_fag *head)
12597{
12598 memset (head, 0, sizeof (struct nds32_fag));
12599}
12600
12601static void
12602nds32_fag_verify (struct nds32_fag *head)
12603{
12604 struct nds32_fag *iter;
12605 struct nds32_fag *prev;
12606
12607 prev = NULL;
12608 iter = head->next;
12609 while (iter)
12610 {
12611 if (prev && prev->addr >= iter->addr)
12612 puts ("Bug in fp-as-gp insertion.");
12613 prev = iter;
12614 iter = iter->next;
12615 }
12616}
12617
12618/* Insert a fag in ascending order.
12619 If a fag of the same address already exists,
12620 they are chained by relas array. */
12621
12622static void
12623nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12624 Elf_Internal_Rela * rel)
12625{
12626 struct nds32_fag *iter;
12627 struct nds32_fag *new_fag;
12628 const int INIT_RELAS_CAP = 4;
12629
12630 for (iter = head;
12631 iter->next && iter->next->addr <= addr;
12632 iter = iter->next)
12633 /* Find somewhere to insert. */ ;
12634
12635 /* `iter' will be equal to `head' if the list is empty. */
12636 if (iter != head && iter->addr == addr)
12637 {
12638 /* The address exists in the list.
12639 Insert `rel' into relocation list, relas. */
12640
12641 /* Check whether relas is big enough. */
12642 if (iter->count >= iter->relas_capcity)
12643 {
12644 iter->relas_capcity *= 2;
12645 iter->relas = bfd_realloc
12646 (iter->relas, iter->relas_capcity * sizeof (void *));
12647 }
12648 iter->relas[iter->count++] = rel;
12649 return;
12650 }
12651
12652 /* This is a new address. Create a fag node for it. */
12653 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12654 memset (new_fag, 0, sizeof (*new_fag));
12655 new_fag->addr = addr;
12656 new_fag->count = 1;
12657 new_fag->next = iter->next;
12658 new_fag->relas_capcity = INIT_RELAS_CAP;
12659 new_fag->relas = (Elf_Internal_Rela **)
12660 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12661 new_fag->relas[0] = rel;
12662 iter->next = new_fag;
12663
12664 nds32_fag_verify (head);
12665}
12666
12667static void
12668nds32_fag_free_list (struct nds32_fag *head)
12669{
12670 struct nds32_fag *iter;
12671
12672 iter = head->next;
12673 while (iter)
12674 {
12675 struct nds32_fag *tmp = iter;
12676 iter = iter->next;
12677 free (tmp->relas);
12678 tmp->relas = NULL;
12679 free (tmp);
12680 }
12681}
12682
35c08157
KLC		 12683/* Find the best fp-base address.
12684 The relocation associated with that address is returned,
12685 so we can track the symbol instead of a fixed address.
12686
12687 When relaxation, the address of an datum may change,
12688 because a text section is shrinked, so the data section
1c8f6a4d 12689 moves forward. If the aligments of text and data section
35c08157
KLC		 12690 are different, their distance may change too.
12691 Therefore, tracking a fixed address is not appriate. */
12692
12693static int
12694nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12695{
12696 struct nds32_fag *base; /* First fag in the window. */
12697 struct nds32_fag *last; /* First fag outside the window. */
12698 int accu = 0; /* Usage accumulation. */
12699 struct nds32_fag *best; /* Best fag. */
12700 int baccu = 0; /* Best accumulation. */
12701
12702 /* Use first fag for initial, and find the last fag in the window.
12703
12704 In each iteration, we could simply subtract previous fag
12705 and accumulate following fags which are inside the window,
12706 untill we each the end. */
12707
1c8f6a4d
KLC		 12708 if (head->next == NULL)
12709 {
12710 *bestpp = NULL;
12711 return 0;
12712 }
35c08157
KLC		 12713
12714 /* Initialize base. */
12715 base = head->next;
12716 best = base;
12717 for (last = base;
12718 last && last->addr < base->addr + FAG_WINDOW;
12719 last = last->next)
12720 accu += last->count;
12721
12722 baccu = accu;
12723
12724 /* Record the best base in each iteration. */
12725 while (base->next)
1c8f6a4d
KLC		 12726 {
12727 accu -= base->count;
12728 base = base->next;
12729 /* Account fags in window. */
12730 for (/* Nothing. */;
12731 last && last->addr < base->addr + FAG_WINDOW;
12732 last = last->next)
12733 accu += last->count;
12734
12735 /* A better fp-base? */
12736 if (accu > baccu)
12737 {
12738 best = base;
12739 baccu = accu;
12740 }
12741 }
35c08157
KLC		 12742
12743 if (bestpp)
12744 *bestpp = best;
12745 return baccu;
12746}
12747
12748/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12749 so we can convert it fo fp-relative access later.
12750 `best_fag' is the best fp-base. Only those inside the window
12751 of best_fag is applied the flag. */
12752
0a1b45a2 12753static bool
35c08157 12754nds32_fag_mark_relax (struct bfd_link_info *link_info,
fbaf61ad 12755 asection *sec, struct nds32_fag *best_fag,
35c08157
KLC		 12756 Elf_Internal_Rela *internal_relocs,
12757 Elf_Internal_Rela *irelend)
12758{
12759 struct nds32_fag *ifag;
12760 bfd_vma best_fpbase, gp;
12761 bfd *output_bfd;
12762
fbaf61ad 12763 output_bfd = sec->output_section->owner;
0a1b45a2 12764 nds32_elf_final_sda_base (output_bfd, link_info, &gp, false);
35c08157
KLC		 12765 best_fpbase = best_fag->addr;
12766
1c8f6a4d
KLC		 12767 if (best_fpbase > gp + sdata_range[1][1]
12768 || best_fpbase < gp - sdata_range[1][0])
0a1b45a2 12769 return false;
35c08157
KLC		 12770
12771 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12772 so we know they can be converted to lwi37.fp. */
12773 for (ifag = best_fag;
12774 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12775 {
12776 int i;
12777
12778 for (i = 0; i < ifag->count; i++)
12779 {
12780 Elf_Internal_Rela *insn16_rel;
12781 Elf_Internal_Rela *fag_rel;
12782
12783 fag_rel = ifag->relas[i];
12784
12785 /* Only if this is within the WINDOWS, FP7U2_FLAG
12786 is applied. */
12787
12788 insn16_rel = find_relocs_at_address
12789 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12790
12791 if (insn16_rel != irelend)
12792 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12793 }
12794 }
0a1b45a2 12795 return true;
35c08157
KLC		 12796}
12797
1c8f6a4d
KLC		 12798/* Reset INSN16 to clean fp as gp. */
12799
12800static void
12801nds32_fag_unmark_relax (struct nds32_fag *fag,
12802 Elf_Internal_Rela *internal_relocs,
12803 Elf_Internal_Rela *irelend)
12804{
12805 struct nds32_fag *ifag;
12806 int i;
12807 Elf_Internal_Rela *insn16_rel;
12808 Elf_Internal_Rela *fag_rel;
12809
12810 for (ifag = fag; ifag; ifag = ifag->next)
12811 {
12812 for (i = 0; i < ifag->count; i++)
12813 {
12814 fag_rel = ifag->relas[i];
12815
12816 /* Restore the INSN16 relocation. */
12817 insn16_rel = find_relocs_at_address
12818 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12819
12820 if (insn16_rel != irelend)
12821 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12822 }
12823 }
12824}
12825
35c08157
KLC		 12826/* This is the main function of fp-as-gp optimization.
12827 It should be called by relax_section. */
12828
0a1b45a2 12829static bool
35c08157
KLC		 12830nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12831 bfd *abfd, asection *sec,
12832 Elf_Internal_Rela *internal_relocs,
12833 Elf_Internal_Rela *irelend,
12834 Elf_Internal_Sym *isymbuf)
12835{
12836 Elf_Internal_Rela *begin_rel = NULL;
12837 Elf_Internal_Rela *irel;
12838 struct nds32_fag fag_head;
12839 Elf_Internal_Shdr *symtab_hdr;
12840 bfd_byte *contents;
0a1b45a2 12841 bool ifc_inside = false;
35c08157
KLC		 12842
12843 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12844
12845 /* Per-function fp-base selection.
12846 1. Create a list for all the gp-relative access.
12847 2. Base on those gp-relative address,
12848 find a fp-base which can cover most access.
12849 3. Use the fp-base for fp-as-gp relaxation.
12850
12851 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12852 we should
12853 1. delete the `la $fp, _FP_BASE_' instruction and
12854 2. not convert lwi.gp to lwi37.fp.
12855
12856 To delete the _FP_BASE_ instruction, we simply apply
12857 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12858
12859 To suppress the conversion, we simply NOT to apply
12860 R_NDS32_INSN16_FP7U2_FLAG flag. */
12861
12862 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12863
1781a9d0 12864 contents = NULL;
0a1b45a2 12865 if (!nds32_get_section_contents (abfd, sec, &contents, true)
35c08157 12866 || !nds32_get_local_syms (abfd, sec, &isymbuf))
0a1b45a2 12867 return false;
35c08157
KLC		 12868
12869 /* Check whether it is worth for fp-as-gp optimization,
12870 i.e., at least 3 gp-load.
12871
12872 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12873 apply this optimization. */
12874
12875 for (irel = internal_relocs; irel < irelend; irel++)
12876 {
12877 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12878 One we enter the begin of the region, we track all the LW/ST
12879 instructions, so when we leave the region, we try to find
12880 the best fp-base address for those LW/ST instructions. */
12881
12882 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12883 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12884 {
12885 /* Begin of the region. */
12886 if (begin_rel)
695344c0 12887 /* xgettext:c-format */
38f14ab8 12888 _bfd_error_handler (_("%pB: nested OMIT_FP in %pA"), abfd, sec);
35c08157
KLC		 12889
12890 begin_rel = irel;
12891 nds32_fag_init (&fag_head);
0a1b45a2 12892 ifc_inside = false;
35c08157
KLC		 12893 }
12894 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12895 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12896 {
12897 int accu;
1c8f6a4d 12898 struct nds32_fag *best_fag, *tmp_fag;
35c08157
KLC		 12899 int dist;
12900
12901 /* End of the region.
12902 Check whether it is worth to do fp-as-gp. */
12903
12904 if (begin_rel == NULL)
12905 {
695344c0 12906 /* xgettext:c-format */
38f14ab8
AM		 12907 _bfd_error_handler (_("%pB: unmatched OMIT_FP in %pA"),
12908 abfd, sec);
35c08157
KLC		 12909 continue;
12910 }
12911
12912 accu = nds32_fag_find_base (&fag_head, &best_fag);
12913
1c8f6a4d
KLC		 12914 /* Clean FP7U2_FLAG because they may set ever. */
12915 tmp_fag = fag_head.next;
12916 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12917
35c08157
KLC		 12918 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12919 if (accu < FAG_THRESHOLD
fbaf61ad 12920 || !nds32_fag_mark_relax (link_info, sec, best_fag,
35c08157
KLC		 12921 internal_relocs, irelend))
12922 {
12923 /* Not worth to do fp-as-gp. */
12924 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12925 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12926 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12927 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12928 nds32_fag_free_list (&fag_head);
12929 begin_rel = NULL;
12930 continue;
12931 }
12932
12933 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12934 so we use it to record the distance to the reloction of best
12935 fp-base. */
12936 dist = best_fag->relas[0] - begin_rel;
12937 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12938 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12939 relocation. And get the base value when relocating. */
1c8f6a4d 12940 begin_rel->r_addend &= (0x1 << 16) - 1;
35c08157
KLC		 12941 begin_rel->r_addend |= dist << 16;
12942
12943 nds32_fag_free_list (&fag_head);
12944 begin_rel = NULL;
12945 }
12946
1c8f6a4d 12947 if (begin_rel == NULL || ifc_inside)
35c08157
KLC		 12948 /* Skip if we are not in the region of fp-as-gp. */
12949 continue;
12950
12951 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12952 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12953 {
12954 bfd_vma addr;
12955 uint32_t insn;
12956
12957 /* A gp-relative access is found. Insert it to the fag-list. */
12958
12959 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12960 insn = bfd_getb32 (contents + irel->r_offset);
12961 if (!N32_IS_RT3 (insn))
12962 continue;
12963
12964 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12965 nds32_fag_insert (&fag_head, addr, irel);
12966 }
12967 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12968 {
12969 begin_rel = NULL;
12970 }
1c8f6a4d
KLC		 12971 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12972 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12973 {
12974 /* Suppress fp as gp when encounter ifc. */
0a1b45a2 12975 ifc_inside = true;
1c8f6a4d 12976 }
35c08157
KLC		 12977 }
12978
0a1b45a2 12979 return true;
35c08157
KLC		 12980}
12981
12982/* Remove unused `la $fp, _FD_BASE_' instruction. */
12983
0a1b45a2 12984static bool
35c08157
KLC		 12985nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12986 Elf_Internal_Rela *internal_relocs,
12987 Elf_Internal_Rela *irelend)
12988{
12989 Elf_Internal_Rela *irel;
12990 Elf_Internal_Shdr *symtab_hdr;
12991 bfd_byte *contents = NULL;
12992 nds32_elf_blank_t *relax_blank_list = NULL;
0a1b45a2
AM		 12993 bool result = true;
12994 bool unused_region = false;
35c08157
KLC		 12995
12996 /*
fbaf61ad
NC		 12997 NOTE: Disable fp-as-gp if we encounter ifcall relocations:
12998 R_NDS32_17IFC_PCREL_RELA
12999 R_NDS32_10IFCU_PCREL_RELA. */
35c08157
KLC		 13000
13001 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
0a1b45a2 13002 nds32_get_section_contents (abfd, sec, &contents, true);
35c08157
KLC		 13003
13004 for (irel = internal_relocs; irel < irelend; irel++)
13005 {
13006 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
13007 we marked to in previous pass.
13008 DO NOT scan relocations again, since we've alreadly decided it
13009 and set the flag. */
13010 const char *syname;
13011 int syndx;
13012 uint32_t insn;
13013
13014 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
13015 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
0a1b45a2 13016 unused_region = true;
35c08157
KLC		 13017 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
13018 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
0a1b45a2 13019 unused_region = false;
35c08157
KLC		 13020
13021 /* We're not in the region. */
13022 if (!unused_region)
13023 continue;
13024
13025 /* _FP_BASE_ must be a GLOBAL symbol. */
13026 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
13027 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
13028 continue;
13029
13030 /* The symbol name must be _FP_BASE_. */
13031 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
13032 if (strcmp (syname, FP_BASE_NAME) != 0)
13033 continue;
13034
13035 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
13036 {
13037 /* addi.gp $fp, -256 */
13038 insn = bfd_getb32 (contents + irel->r_offset);
13039 if (insn != INSN_ADDIGP_TO_FP)
13040 continue;
13041 }
13042 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
13043 {
13044 /* addi $fp, $gp, -256 */
13045 insn = bfd_getb32 (contents + irel->r_offset);
13046 if (insn != INSN_ADDI_GP_TO_FP)
13047 continue;
13048 }
13049 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
13050 {
13051 /* movi $fp, FP_BASE */
13052 insn = bfd_getb32 (contents + irel->r_offset);
13053 if (insn != INSN_MOVI_TO_FP)
13054 continue;
13055 }
13056 else
13057 continue;
13058
13059 /* We got here because a FP_BASE instruction is found. */
13060 if (!insert_nds32_elf_blank_recalc_total
13061 (&relax_blank_list, irel->r_offset, 4))
13062 goto error_return;
13063 }
13064
dc1e8a47 13065 finish:
35c08157
KLC		 13066 if (relax_blank_list)
13067 {
13068 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
13069 relax_blank_list = NULL;
13070 }
13071 return result;
13072
dc1e8a47 13073 error_return:
0a1b45a2 13074 result = false;
35c08157
KLC		 13075 goto finish;
13076}
1c8f6a4d
KLC		 13077
13078/* This is a version of bfd_generic_get_relocated_section_contents.
13079 We need this variety because relaxation will modify the dwarf
13080 infomation. When there is undefined symbol reference error mesage,
13081 linker need to dump line number where the symbol be used. However
13082 the address is be relaxed, it can not get the original dwarf contents.
13083 The variety only modify function call for reading in the section. */
13084
13085static bfd_byte *
13086nds32_elf_get_relocated_section_contents (bfd *abfd,
13087 struct bfd_link_info *link_info,
13088 struct bfd_link_order *link_order,
13089 bfd_byte *data,
0a1b45a2 13090 bool relocatable,
1c8f6a4d
KLC		 13091 asymbol **symbols)
13092{
13093 bfd *input_bfd = link_order->u.indirect.section->owner;
13094 asection *input_section = link_order->u.indirect.section;
13095 long reloc_size;
13096 arelent **reloc_vector;
13097 long reloc_count;
13098
13099 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
13100 if (reloc_size < 0)
13101 return NULL;
13102
13103 /* Read in the section. */
56ba7527 13104 bfd_byte *orig_data = data;
0a1b45a2 13105 if (!nds32_get_section_contents (input_bfd, input_section, &data, false))
1c8f6a4d
KLC		 13106 return NULL;
13107
13108 if (reloc_size == 0)
13109 return data;
13110
13111 reloc_vector = (arelent **) bfd_malloc (reloc_size);
13112 if (reloc_vector == NULL)
56ba7527 13113 goto error_return;
1c8f6a4d
KLC		 13114
13115 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
13116 reloc_vector, symbols);
13117 if (reloc_count < 0)
13118 goto error_return;
13119
13120 if (reloc_count > 0)
13121 {
13122 arelent **parent;
13123 for (parent = reloc_vector; *parent != NULL; parent++)
13124 {
13125 char *error_message = NULL;
13126 asymbol *symbol;
13127 bfd_reloc_status_type r;
13128
13129 symbol = *(*parent)->sym_ptr_ptr;
13130 if (symbol->section && discarded_section (symbol->section))
13131 {
0930cb30 13132 bfd_vma off;
1c8f6a4d 13133 static reloc_howto_type none_howto
c94cb026 13134 = HOWTO (0, 0, 0, 0, false, 0, complain_overflow_dont, NULL,
0a1b45a2 13135 "unused", false, 0, 0, false);
1c8f6a4d 13136
bb294208
AM		 13137 off = (*parent)->address * OCTETS_PER_BYTE (input_bfd,
13138 input_section);
0930cb30
AM		 13139 _bfd_clear_contents ((*parent)->howto, input_bfd,
13140 input_section, data, off);
1c8f6a4d
KLC		 13141 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
13142 (*parent)->addend = 0;
13143 (*parent)->howto = &none_howto;
13144 r = bfd_reloc_ok;
13145 }
13146 else
13147 r = bfd_perform_relocation (input_bfd, *parent, data,
13148 input_section,
13149 relocatable ? abfd : NULL,
13150 &error_message);
13151
13152 if (relocatable)
13153 {
13154 asection *os = input_section->output_section;
13155
13156 /* A partial link, so keep the relocs. */
13157 os->orelocation[os->reloc_count] = *parent;
13158 os->reloc_count++;
13159 }
13160
13161 if (r != bfd_reloc_ok)
13162 {
13163 switch (r)
13164 {
13165 case bfd_reloc_undefined:
1a72702b
AM		 13166 (*link_info->callbacks->undefined_symbol)
13167 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
0a1b45a2 13168 input_bfd, input_section, (*parent)->address, true);
1c8f6a4d
KLC		 13169 break;
13170 case bfd_reloc_dangerous:
13171 BFD_ASSERT (error_message != NULL);
1a72702b
AM		 13172 (*link_info->callbacks->reloc_dangerous)
13173 (link_info, error_message,
13174 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 13175 break;
13176 case bfd_reloc_overflow:
1a72702b
AM		 13177 (*link_info->callbacks->reloc_overflow)
13178 (link_info, NULL,
13179 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13180 (*parent)->howto->name, (*parent)->addend,
13181 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 13182 break;
13183 case bfd_reloc_outofrange:
13184 /* PR ld/13730:
13185 This error can result when processing some partially
13186 complete binaries. Do not abort, but issue an error
13187 message instead. */
13188 link_info->callbacks->einfo
695344c0 13189 /* xgettext:c-format */
c1c8c1ef 13190 (_("%X%P: %pB(%pA): relocation \"%pR\" goes out of range\n"),
1c8f6a4d
KLC		 13191 abfd, input_section, * parent);
13192 goto error_return;
13193
13194 default:
13195 abort ();
13196 break;
13197 }
13198 }
13199 }
13200 }
13201
13202 free (reloc_vector);
13203 return data;
13204
dc1e8a47 13205 error_return:
1c8f6a4d 13206 free (reloc_vector);
56ba7527
AM		 13207 if (orig_data == NULL)
13208 free (data);
1c8f6a4d
KLC		 13209 return NULL;
13210}
fbaf61ad
NC		 13211
13212/* Check target symbol. */
13213
0a1b45a2 13214static bool
fbaf61ad
NC		 13215nds32_elf_is_target_special_symbol (bfd *abfd ATTRIBUTE_UNUSED, asymbol *sym)
13216{
13217 if (!sym || !sym->name || sym->name[0] != '$')
0a1b45a2
AM		 13218 return false;
13219 return true;
fbaf61ad
NC		 13220}
13221
13222/* nds32 find maybe function sym. Ignore target special symbol
13223 first, and then go the general function. */
13224
13225static bfd_size_type
13226nds32_elf_maybe_function_sym (const asymbol *sym, asection *sec,
13227 bfd_vma *code_off)
13228{
13229 if (nds32_elf_is_target_special_symbol (NULL, (asymbol *) sym))
13230 return 0;
13231
13232 return _bfd_elf_maybe_function_sym (sym, sec, code_off);
13233}
35c08157 13234\f
35c08157 13235
fbaf61ad
NC		 13236/* Do TLS model conversion. */
13237
13238typedef struct relax_group_list_t
13239{
13240 Elf_Internal_Rela *relo;
13241 struct relax_group_list_t *next;
13242 struct relax_group_list_t *next_sibling;
13243 int id;
13244} relax_group_list_t;
13245
13246int
13247list_insert (relax_group_list_t *pHead, Elf_Internal_Rela *pElem);
13248
13249int
13250list_insert_sibling (relax_group_list_t *pNode, Elf_Internal_Rela *pElem);
13251
13252void
13253dump_chain (relax_group_list_t *pHead);
13254
13255int
13256list_insert (relax_group_list_t *pHead, Elf_Internal_Rela *pElem)
13257{
13258 relax_group_list_t *pNext = pHead;
13259
13260 /* Find place. */
13261 while (pNext->next)
13262 {
13263 if (pNext->next->id > (int) pElem->r_addend)
13264 break;
13265
13266 pNext = pNext->next;
13267 }
13268
13269 /* Insert node. */
13270 relax_group_list_t *pNew = bfd_malloc (sizeof (relax_group_list_t));
13271 if (!pNew)
0a1b45a2 13272 return false;
fbaf61ad
NC		 13273
13274 relax_group_list_t *tmp = pNext->next;
13275 pNext->next = pNew;
13276
13277 pNew->id = pElem->r_addend;
13278 pNew->relo = pElem;
13279 pNew->next = tmp;
13280 pNew->next_sibling = NULL;
13281
0a1b45a2 13282 return true;
fbaf61ad
NC		 13283}
13284
13285int
13286list_insert_sibling (relax_group_list_t *pNode, Elf_Internal_Rela *pElem)
13287{
13288 relax_group_list_t *pNext = pNode;
13289
13290 /* Find place. */
13291 while (pNext->next_sibling)
13292 {
13293 pNext = pNext->next_sibling;
13294 }
13295
13296 /* Insert node. */
13297 relax_group_list_t *pNew = bfd_malloc (sizeof (relax_group_list_t));
13298 if (!pNew)
0a1b45a2 13299 return false;
fbaf61ad
NC		 13300
13301 relax_group_list_t *tmp = pNext->next_sibling;
13302 pNext->next_sibling = pNew;
13303
13304 pNew->id = -1;
13305 pNew->relo = pElem;
13306 pNew->next = NULL;
13307 pNew->next_sibling = tmp;
13308
0a1b45a2 13309 return true;
fbaf61ad
NC		 13310}
13311
13312void
13313dump_chain (relax_group_list_t *pHead)
13314{
13315 relax_group_list_t *pNext = pHead->next;
13316 while (pNext)
13317 {
13318 printf("group %d @ 0x%08x", pNext->id, (unsigned)pNext->relo->r_offset);
13319 relax_group_list_t *pNextSib = pNext->next_sibling;
13320 while (pNextSib)
13321 {
13322 printf(", %d", (unsigned) ELF32_R_TYPE (pNextSib->relo->r_info));
13323 pNextSib = pNextSib->next_sibling;
13324 }
13325 pNext = pNext->next;
13326 printf("\n");
13327 }
13328}
13329
13330/* Check R_NDS32_RELAX_GROUP of each section.
13331 There might be multiple sections in one object file. */
13332
13333int
13334elf32_nds32_check_relax_group (bfd *abfd, asection *asec)
13335{
13336 elf32_nds32_relax_group_t *relax_group_ptr =
13337 elf32_nds32_relax_group_ptr (abfd);
13338
13339 int min_id = relax_group_ptr->min_id;
13340 int max_id = relax_group_ptr->max_id;
13341
13342 Elf_Internal_Rela *rel;
13343 Elf_Internal_Rela *relend;
13344 Elf_Internal_Rela *relocs;
13345 enum elf_nds32_reloc_type rtype;
13346
13347 do
13348 {
13349 /* Relocations MUST be kept in memory, because relaxation adjust them. */
13350 relocs = _bfd_elf_link_read_relocs (abfd, asec, NULL, NULL,
0a1b45a2 13351 true /* keep_memory */);
fbaf61ad
NC		 13352 if (relocs == NULL)
13353 break;
13354
13355 /* Check R_NDS32_RELAX_GROUP. */
13356 relend = relocs + asec->reloc_count;
13357 for (rel = relocs; rel < relend; rel++)
13358 {
13359 int id;
13360 rtype = ELF32_R_TYPE (rel->r_info);
13361 if (rtype != R_NDS32_RELAX_GROUP)
13362 continue;
13363
13364 id = rel->r_addend;
13365 if (id < min_id)
13366 min_id = id;
13367 else if (id > max_id)
13368 max_id = id;
13369 }
13370 }
0a1b45a2 13371 while (false);
fbaf61ad 13372
c9594989 13373 if (elf_section_data (asec)->relocs != relocs)
fbaf61ad
NC		 13374 free (relocs);
13375
13376 if ((min_id != relax_group_ptr->min_id)
13377 || (max_id != relax_group_ptr->max_id))
13378 {
13379 relax_group_ptr->count = max_id - min_id + 1;
13380 BFD_ASSERT(min_id <= relax_group_ptr->min_id);
13381 relax_group_ptr->min_id = min_id;
13382 BFD_ASSERT(max_id >= relax_group_ptr->max_id);
13383 relax_group_ptr->max_id = max_id;
13384 }
13385
13386 return relax_group_ptr->count;
13387}
13388
13389/* Reorder RELAX_GROUP ID when command line option '-r' is applied. */
3fafa2e2 13390static struct section_id_list_t *relax_group_section_id_list = NULL;
fbaf61ad
NC		 13391
13392struct section_id_list_t *
13393elf32_nds32_lookup_section_id (int id, struct section_id_list_t **lst_ptr)
13394{
13395 struct section_id_list_t *result = NULL;
13396 struct section_id_list_t *lst = *lst_ptr;
13397
13398 if (NULL == lst)
13399 {
13400 result = (struct section_id_list_t *) calloc
13401 (1, sizeof (struct section_id_list_t));
13402 BFD_ASSERT (result); /* Feed me. */
13403 result->id = id;
13404 *lst_ptr = result;
13405 }
13406 else
13407 {
13408 struct section_id_list_t *cur = lst;
13409 struct section_id_list_t *prv = NULL;
13410 struct section_id_list_t *sec = NULL;
13411
13412 while (cur)
13413 {
13414 if (cur->id < id)
13415 {
13416 prv = cur;
13417 cur = cur->next;
13418 continue;
13419 }
13420
13421 if (cur->id > id)
13422 {
13423 cur = NULL; /* To insert after prv. */
13424 sec = cur; /* In case prv == NULL. */
13425 }
13426
13427 break;
13428 }
13429
13430 if (NULL == cur)
13431 {
13432 /* Insert after prv. */
13433 result = (struct section_id_list_t *) calloc
13434 (1, sizeof (struct section_id_list_t));
13435 BFD_ASSERT (result); /* Feed me. */
13436 result->id = id;
13437 if (NULL != prv)
13438 {
13439 result->next = prv->next;
13440 prv->next = result;
13441 }
13442 else
13443 {
13444 *lst_ptr = result;
13445 result->next = sec;
13446 }
13447 }
13448 }
13449
13450 return result;
13451}
13452
13453int
13454elf32_nds32_unify_relax_group (bfd *abfd, asection *asec)
13455{
13456 static int next_relax_group_bias = 0;
13457
13458 elf32_nds32_relax_group_t *relax_group_ptr =
13459 elf32_nds32_relax_group_ptr (abfd);
13460
0a1b45a2 13461 bool result = true;
fbaf61ad
NC		 13462 Elf_Internal_Rela *rel;
13463 Elf_Internal_Rela *relend;
13464 Elf_Internal_Rela *relocs = NULL;
13465 enum elf_nds32_reloc_type rtype;
13466 struct section_id_list_t *node = NULL;
fbaf61ad
NC		 13467
13468 do
13469 {
13470 if (0 == relax_group_ptr->count)
13471 break;
13472
13473 /* Check if this section has been handled. */
13474 node = elf32_nds32_lookup_section_id (asec->id, &relax_group_section_id_list);
13475 if (NULL == node)
13476 break; /* Hit, the section id has handled. */
13477
13478 /* Relocations MUST be kept in memory, because relaxation adjust them. */
13479 relocs = _bfd_elf_link_read_relocs (abfd, asec, NULL, NULL,
0a1b45a2 13480 true /* keep_memory */);
fbaf61ad
NC		 13481 if (relocs == NULL)
13482 {
13483 BFD_ASSERT (0); /* feed me */
13484 break;
13485 }
13486
13487 /* Allocate group id bias for this bfd! */
13488 if (0 == relax_group_ptr->init)
13489 {
13490 relax_group_ptr->bias = next_relax_group_bias;
13491 next_relax_group_bias += relax_group_ptr->count;
13492 relax_group_ptr->init = 1;
13493 }
13494
13495 /* Reorder relax group groups. */
13496 relend = relocs + asec->reloc_count;
13497 for (rel = relocs; rel < relend; rel++)
13498 {
13499 rtype = ELF32_R_TYPE(rel->r_info);
13500 if (rtype != R_NDS32_RELAX_GROUP)
13501 continue;
13502
13503 /* Change it. */
13504 rel->r_addend += relax_group_ptr->bias;
fbaf61ad
NC		 13505 }
13506 }
0a1b45a2 13507 while (false);
fbaf61ad 13508
c9594989 13509 if (elf_section_data (asec)->relocs != relocs)
fbaf61ad
NC		 13510 free (relocs);
13511
13512 return result;
13513}
13514
13515int
13516nds32_elf_unify_tls_model (bfd *inbfd, asection *insec, bfd_byte *incontents,
13517 struct bfd_link_info *lnkinfo)
13518{
0a1b45a2 13519 bool result = true;
fbaf61ad
NC		 13520 Elf_Internal_Rela *irel;
13521 Elf_Internal_Rela *irelend;
13522 Elf_Internal_Rela *internal_relocs;
13523 unsigned long r_symndx;
13524 enum elf_nds32_reloc_type r_type;
13525
13526 Elf_Internal_Sym *local_syms = NULL;
13527 bfd_byte *contents = NULL;
13528
13529 relax_group_list_t chain = { .id = -1, .next = NULL, .next_sibling = NULL };
13530
13531 Elf_Internal_Shdr *symtab_hdr = &elf_tdata (inbfd)->symtab_hdr;
9bc8e54b 13532 struct elf_link_hash_entry **sym_hashes;
fbaf61ad 13533 sym_hashes = elf_sym_hashes (inbfd);
fbaf61ad
NC		 13534
13535 /* Reorder RELAX_GROUP when command line option '-r' is applied. */
13536 if (bfd_link_relocatable (lnkinfo))
13537 {
13538 elf32_nds32_unify_relax_group (inbfd, insec);
13539 return result;
13540 }
13541
13542 /* Relocations MUST be kept in memory, because relaxation adjust them. */
13543 internal_relocs = _bfd_elf_link_read_relocs (inbfd, insec, NULL, NULL,
0a1b45a2 13544 true /* keep_memory */);
fbaf61ad
NC		 13545 if (internal_relocs == NULL)
13546 goto error_return;
13547
13548 irelend = internal_relocs + insec->reloc_count;
13549 irel = find_relocs_at_address (internal_relocs, internal_relocs,
13550 irelend, R_NDS32_RELAX_ENTRY);
13551 if (irel == irelend)
13552 goto finish;
13553
13554 /* Chain/remove groups. */
13555 for (irel = internal_relocs; irel < irelend; irel++)
13556 {
13557 r_symndx = ELF32_R_SYM (irel->r_info);
13558 r_type = ELF32_R_TYPE (irel->r_info);
13559 if (r_type != R_NDS32_RELAX_GROUP)
13560 continue;
13561
13562 /* Remove it. */
13563 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_NONE);
13564 /* Chain it now. */
13565 if (!list_insert (&chain, irel))
13566 goto error_return;
13567 }
13568
13569 /* Collect group relocations. */
13570 /* Presume relocations are sorted. */
13571 relax_group_list_t *pNext = chain.next;
13572 while (pNext)
13573 {
13574 for (irel = internal_relocs; irel < irelend; irel++)
13575 {
13576 if (irel->r_offset == pNext->relo->r_offset)
13577 {
13578 /* Ignore Non-TLS relocation types. */
13579 r_type = ELF32_R_TYPE (irel->r_info);
13580 if ((R_NDS32_TLS_LE_HI20 > r_type)
13581 || (R_NDS32_RELAX_ENTRY == r_type))
13582 continue;
13583
13584 if (!list_insert_sibling (pNext, irel))
13585 goto error_return;
13586 }
13587 else if (irel->r_offset > pNext->relo->r_offset)
13588 {
13589 pNext = pNext->next;
13590 if (!pNext)
13591 break;
13592
13593 bfd_vma current_offset = pNext->relo->r_offset;
13594 if (irel->r_offset > current_offset)
13595 irel = internal_relocs; /* restart from head */
13596 else
13597 --irel; /* Check current irel again. */
13598 continue;
13599 }
13600 else
13601 {
13602 /* This shouldn't be reached. */
13603 }
13604 }
13605 if (pNext)
13606 pNext = pNext->next;
13607 }
13608
13609#ifdef DUBUG_VERBOSE
13610 dump_chain(&chain);
13611#endif
13612
13613 /* Get symbol table and section content. */
13614 if (incontents)
13615 contents = incontents;
0a1b45a2 13616 else if (!nds32_get_section_contents (inbfd, insec, &contents, true)
fbaf61ad
NC		 13617 || !nds32_get_local_syms (inbfd, insec, &local_syms))
13618 goto error_return;
13619
13620 char *local_got_tls_type = elf32_nds32_local_got_tls_type (inbfd);
13621
13622 /* Convert TLS model each group if necessary. */
13623 pNext = chain.next;
13624
13625 int cur_grp_id = -1;
13626 int sethi_rt = -1;
13627 int add_rt = -1;
13628 enum elf_nds32_tls_type tls_type, org_tls_type, eff_tls_type;
13629
13630 tls_type = org_tls_type = eff_tls_type = 0;
13631
13632 while (pNext)
13633 {
13634 relax_group_list_t *pNextSig = pNext->next_sibling;
13635 while (pNextSig)
13636 {
13637 struct elf_link_hash_entry *h = NULL;
13638
13639 irel = pNextSig->relo;
13640 r_symndx = ELF32_R_SYM(irel->r_info);
13641 r_type = ELF32_R_TYPE(irel->r_info);
13642
13643 if (pNext->id != cur_grp_id)
13644 {
13645 cur_grp_id = pNext->id;
13646 org_tls_type = get_tls_type (r_type, NULL);
13647 if (r_symndx >= symtab_hdr->sh_info)
13648 {
13649 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13650 while (h->root.type == bfd_link_hash_indirect
13651 || h->root.type == bfd_link_hash_warning)
13652 h = (struct elf_link_hash_entry *) h->root.u.i.link;
13653 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
13654 }
13655 else
13656 {
13657 tls_type = local_got_tls_type
13658 ? local_got_tls_type[r_symndx]
13659 : GOT_NORMAL;
13660 }
13661
13662 eff_tls_type = 1 << (fls (tls_type) - 1);
13663 sethi_rt = N32_RT5(bfd_getb32 (contents + irel->r_offset));
13664 }
13665
13666 if (eff_tls_type != org_tls_type)
13667 {
13668 switch (org_tls_type)
13669 {
13670 /* DESC to IEGP/IE/LE. */
13671 case GOT_TLS_DESC:
13672 switch (eff_tls_type)
13673 {
13674 case GOT_TLS_IE:
13675 switch (r_type)
13676 {
13677 case R_NDS32_TLS_DESC_HI20:
13678 irel->r_info = ELF32_R_INFO(r_symndx,
13679 R_NDS32_TLS_IE_HI20);
13680 break;
13681 case R_NDS32_TLS_DESC_LO12:
13682 irel->r_info = ELF32_R_INFO(r_symndx,
13683 R_NDS32_TLS_IE_LO12);
13684 break;
13685 case R_NDS32_TLS_DESC_ADD:
13686 {
13687 uint32_t insn = bfd_getb32 (contents + irel->r_offset);
13688 add_rt = N32_RT5 (insn);
13689 insn = N32_TYPE2 (LWI, add_rt, sethi_rt, 0);
13690 bfd_putb32 (insn, contents + irel->r_offset);
13691
13692 irel->r_info = ELF32_R_INFO(r_symndx, R_NDS32_NONE);
13693 }
13694 break;
13695 case R_NDS32_TLS_DESC_FUNC:
13696 bfd_putb32 (INSN_NOP, contents + irel->r_offset);
13697 irel->r_info = ELF32_R_INFO(r_symndx,
13698 R_NDS32_RELAX_REMOVE);
13699 break;
13700 case R_NDS32_TLS_DESC_CALL:
13701 {
13702 uint32_t insn = N32_ALU1(ADD, REG_R0, add_rt,
13703 REG_TP);
13704 bfd_putb32 (insn, contents + irel->r_offset);
13705
13706 irel->r_info = ELF32_R_INFO(r_symndx, R_NDS32_NONE);
13707 }
13708 break;
13709 case R_NDS32_LOADSTORE:
13710 case R_NDS32_PTR:
13711 case R_NDS32_PTR_RESOLVED:
13712 case R_NDS32_NONE:
13713 case R_NDS32_LABEL:
13714 break;
13715 default:
13716 BFD_ASSERT(0);
13717 break;
13718 }
13719 break;
13720 case GOT_TLS_IEGP:
13721 switch (r_type)
13722 {
13723 case R_NDS32_TLS_DESC_HI20:
13724 irel->r_info = ELF32_R_INFO(r_symndx,
13725 R_NDS32_TLS_IEGP_HI20);
13726 break;
13727 case R_NDS32_TLS_DESC_LO12:
13728 irel->r_info = ELF32_R_INFO(r_symndx,
13729 R_NDS32_TLS_IEGP_LO12);
13730 break;
13731 case R_NDS32_TLS_DESC_ADD:
13732 {
13733 uint32_t insn = bfd_getb32 (contents + irel->r_offset);
13734 add_rt = N32_RT5 (insn);
13735 insn = N32_MEM(LW, add_rt, sethi_rt, REG_GP, 0);
13736 bfd_putb32 (insn, contents + irel->r_offset);
13737
13738 irel->r_info = ELF32_R_INFO(r_symndx, R_NDS32_NONE);
13739 }
13740 break;
13741 case R_NDS32_TLS_DESC_FUNC:
13742 bfd_putb32 (INSN_NOP, contents + irel->r_offset);
13743 irel->r_info = ELF32_R_INFO(r_symndx,
13744 R_NDS32_RELAX_REMOVE);
13745 break;
13746 case R_NDS32_TLS_DESC_CALL:
13747 {
13748 uint32_t insn = N32_ALU1(ADD, REG_R0, add_rt,
13749 REG_TP);
13750 bfd_putb32 (insn, contents + irel->r_offset);
13751
13752 irel->r_info = ELF32_R_INFO(r_symndx, R_NDS32_NONE);
13753 }
13754 break;
13755 case R_NDS32_LOADSTORE:
13756 case R_NDS32_PTR:
13757 case R_NDS32_PTR_RESOLVED:
13758 case R_NDS32_NONE:
13759 case R_NDS32_LABEL:
13760 break;
13761 default:
13762 BFD_ASSERT(0);
13763 break;
13764 }
13765 break;
13766 case GOT_TLS_LE:
13767 switch (r_type)
13768 {
13769 case R_NDS32_TLS_DESC_HI20:
13770 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_HI20);
13771 break;
13772 case R_NDS32_TLS_DESC_LO12:
13773 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_LO12);
13774 break;
13775 case R_NDS32_TLS_DESC_ADD:
13776 {
13777 uint32_t insn = bfd_getb32 (contents + irel->r_offset);
13778
13779 add_rt = N32_RT5 (insn);
13780 insn = N32_ALU1 (ADD, REG_R0, sethi_rt, REG_TP);
13781 bfd_putb32 (insn, contents + irel->r_offset);
13782
13783 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_ADD);
13784 }
13785 break;
13786 case R_NDS32_TLS_DESC_FUNC:
13787 bfd_putb32 (INSN_NOP, contents + irel->r_offset);
13788 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_RELAX_REMOVE);
13789 break;
13790 case R_NDS32_TLS_DESC_CALL:
13791 bfd_putb32 (INSN_NOP, contents + irel->r_offset);
13792 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_RELAX_REMOVE);
13793 break;
13794 case R_NDS32_LOADSTORE:
13795 case R_NDS32_PTR:
13796 case R_NDS32_PTR_RESOLVED:
13797 case R_NDS32_NONE:
13798 case R_NDS32_LABEL:
13799 break;
13800 default:
13801 BFD_ASSERT(0);
13802 break;
13803 }
13804 break;
13805 default:
13806 break;
13807 }
13808 break;
13809 /* IEGP to IE/LE. */
13810 case GOT_TLS_IEGP:
13811 switch (eff_tls_type)
13812 {
13813 case GOT_TLS_IE:
13814 switch (r_type)
13815 {
13816 case R_NDS32_TLS_IEGP_HI20:
13817 irel->r_info = ELF32_R_INFO(r_symndx,
13818 R_NDS32_TLS_IE_HI20);
13819 break;
13820 case R_NDS32_TLS_IEGP_LO12:
13821 irel->r_info = ELF32_R_INFO(r_symndx,
13822 R_NDS32_TLS_IE_LO12);
13823 break;
13824 case R_NDS32_PTR_RESOLVED:
13825 {
13826 uint32_t insn = bfd_getb32 (contents + irel->r_offset);
13827
13828 add_rt = N32_RT5 (insn);
13829 insn = N32_TYPE2 (LWI, add_rt, sethi_rt, 0);
13830 bfd_putb32 (insn, contents + irel->r_offset);
13831 }
13832 break;
13833 case R_NDS32_TLS_IEGP_LW:
13834 break;
13835 case R_NDS32_LOADSTORE:
13836 case R_NDS32_PTR:
13837 case R_NDS32_NONE:
13838 case R_NDS32_LABEL:
13839 break;
13840 default:
13841 BFD_ASSERT(0);
13842 break;
13843 }
13844 break;
13845 case GOT_TLS_LE:
13846 switch (r_type)
13847 {
13848 case R_NDS32_TLS_IEGP_HI20:
13849 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_HI20);
13850 break;
13851 case R_NDS32_TLS_IEGP_LO12:
13852 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_LO12);
13853 break;
13854 case R_NDS32_TLS_IEGP_LW:
13855 bfd_putb32 (INSN_NOP, contents + irel->r_offset);
13856 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_RELAX_REMOVE);
13857 break;
13858 case R_NDS32_LOADSTORE:
13859 case R_NDS32_PTR:
13860 case R_NDS32_NONE:
13861 case R_NDS32_LABEL:
13862 case R_NDS32_PTR_RESOLVED:
13863 break;
13864 default:
13865 BFD_ASSERT(0);
13866 break;
13867 }
13868 break;
13869 default:
13870 break;
13871 }
13872 break;
13873 /* IE to LE. */
13874 case GOT_TLS_IE:
13875 switch (eff_tls_type)
13876 {
13877 case GOT_TLS_LE:
13878 switch (r_type)
13879 {
13880 case R_NDS32_TLS_IE_HI20:
13881 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_HI20);
13882 break;
13883 case R_NDS32_TLS_IE_LO12S2:
13884 {
13885 uint32_t insn = bfd_getb32 (contents + irel->r_offset);
13886
13887 add_rt = N32_RT5 (insn);
13888 insn = N32_TYPE2 (ORI, add_rt, sethi_rt, 0);
13889 bfd_putb32 (insn, contents + irel->r_offset);
13890
13891 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_LO12);
13892 }
13893 break;
13894 case R_NDS32_LOADSTORE:
13895 case R_NDS32_PTR:
13896 case R_NDS32_NONE:
13897 case R_NDS32_LABEL:
13898 break;
13899 default:
13900 BFD_ASSERT(0);
13901 break;
13902 }
13903 break;
13904 default:
13905 break;
13906 }
13907 break;
13908 default:
13909 break;
13910 }
13911 }
13912 pNextSig = pNextSig->next_sibling;
13913 }
13914
13915#if 1
13916 pNext = pNext->next;
13917#else
13918 while (pNext)
13919 {
13920 if (pNext->id != cur_grp_id)
13921 break;
13922 pNext = pNext->next;
13923 }
13924#endif
13925 }
13926
dc1e8a47 13927 finish:
fbaf61ad
NC		 13928 if (incontents)
13929 contents = NULL;
13930
c9594989 13931 if (elf_section_data (insec)->relocs != internal_relocs)
fbaf61ad
NC		 13932 free (internal_relocs);
13933
c9594989 13934 if (elf_section_data (insec)->this_hdr.contents != contents)
fbaf61ad
NC		 13935 free (contents);
13936
c9594989 13937 if (symtab_hdr->contents != (bfd_byte *) local_syms)
fbaf61ad
NC		 13938 free (local_syms);
13939
13940 if (chain.next)
13941 {
13942 pNext = chain.next;
13943 relax_group_list_t *pDel;
13944 while (pNext)
13945 {
13946 pDel = pNext;
13947 pNext = pNext->next;
13948 free (pDel);
13949 }
13950 }
13951
13952 return result;
13953
dc1e8a47 13954 error_return:
0a1b45a2 13955 result = false;
fbaf61ad
NC		 13956 goto finish;
13957}
13958
13959/* End TLS model conversion. */
13960
35c08157
KLC		 13961#define ELF_ARCH bfd_arch_nds32
13962#define ELF_MACHINE_CODE EM_NDS32
13963#define ELF_MAXPAGESIZE 0x1000
07d6d2b8 13964#define ELF_TARGET_ID NDS32_ELF_DATA
35c08157 13965
6d00b590 13966#define TARGET_BIG_SYM nds32_elf32_be_vec
35c08157 13967#define TARGET_BIG_NAME "elf32-nds32be"
6d00b590 13968#define TARGET_LITTLE_SYM nds32_elf32_le_vec
35c08157
KLC		 13969#define TARGET_LITTLE_NAME "elf32-nds32le"
13970
13971#define elf_info_to_howto nds32_info_to_howto
13972#define elf_info_to_howto_rel nds32_info_to_howto_rel
13973
13974#define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
13975#define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
13976#define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
13977#define bfd_elf32_bfd_relax_section nds32_elf_relax_section
13978#define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
13979
07d6d2b8 13980#define bfd_elf32_mkobject nds32_elf_mkobject
35c08157
KLC		 13981#define elf_backend_action_discarded nds32_elf_action_discarded
13982#define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
13983#define elf_backend_check_relocs nds32_elf_check_relocs
13984#define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
13985#define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
13986#define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
13987#define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
af969b14 13988#define elf_backend_late_size_sections nds32_elf_late_size_sections
35c08157
KLC		 13989#define elf_backend_relocate_section nds32_elf_relocate_section
13990#define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
35c08157
KLC		 13991#define elf_backend_grok_prstatus nds32_elf_grok_prstatus
13992#define elf_backend_grok_psinfo nds32_elf_grok_psinfo
13993#define elf_backend_reloc_type_class nds32_elf_reloc_type_class
13994#define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
13995#define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
13996#define elf_backend_output_arch_syms nds32_elf_output_arch_syms
13997#define elf_backend_object_p nds32_elf_object_p
13998#define elf_backend_final_write_processing nds32_elf_final_write_processing
13999#define elf_backend_special_sections nds32_elf_special_sections
bf577467 14000#define elf_backend_section_flags nds32_elf_section_flags
1c8f6a4d 14001#define bfd_elf32_bfd_get_relocated_section_contents \
07d6d2b8 14002 nds32_elf_get_relocated_section_contents
fbaf61ad
NC		 14003#define bfd_elf32_bfd_is_target_special_symbol nds32_elf_is_target_special_symbol
14004#define elf_backend_maybe_function_sym nds32_elf_maybe_function_sym
35c08157
KLC		 14005
14006#define elf_backend_can_gc_sections 1
14007#define elf_backend_can_refcount 1
14008#define elf_backend_want_got_plt 1
14009#define elf_backend_plt_readonly 1
14010#define elf_backend_want_plt_sym 0
14011#define elf_backend_got_header_size 12
14012#define elf_backend_may_use_rel_p 1
14013#define elf_backend_default_use_rela_p 1
14014#define elf_backend_may_use_rela_p 1
fbaf61ad 14015#define elf_backend_dtrel_excludes_plt 0
35c08157
KLC		 14016
14017#include "elf32-target.h"
14018
14019#undef ELF_MAXPAGESIZE
14020#define ELF_MAXPAGESIZE 0x2000
14021
fbaf61ad 14022#undef TARGET_BIG_SYM
6d00b590 14023#define TARGET_BIG_SYM nds32_elf32_linux_be_vec
fbaf61ad 14024#undef TARGET_BIG_NAME
35c08157 14025#define TARGET_BIG_NAME "elf32-nds32be-linux"
fbaf61ad 14026#undef TARGET_LITTLE_SYM
6d00b590 14027#define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
fbaf61ad 14028#undef TARGET_LITTLE_NAME
35c08157 14029#define TARGET_LITTLE_NAME "elf32-nds32le-linux"
fbaf61ad 14030#undef elf32_bed
35c08157
KLC		 14031#define elf32_bed elf32_nds32_lin_bed
14032
14033#include "elf32-target.h"
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