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c7927a3c 1/* Renesas RX specific support for 32-bit ELF.
fd67aa11 2 Copyright (C) 2008-2024 Free Software Foundation, Inc.
c7927a3c
NC		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
863f7a5f
NC		 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
c7927a3c
NC		 20
21#include "sysdep.h"
22#include "bfd.h"
23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/rx.h"
26#include "libiberty.h"
7a2f2d82 27#include "elf32-rx.h"
c7927a3c
NC		 28
29#define RX_OPCODE_BIG_ENDIAN 0
30
4c422395
DD		 31/* This is a meta-target that's used only with objcopy, to avoid the
32 endian-swap we would otherwise get. We check for this in
33 rx_elf_object_p(). */
6d00b590
AM		 34const bfd_target rx_elf32_be_ns_vec;
35const bfd_target rx_elf32_be_vec;
4c422395 36
c7927a3c
NC		 37#ifdef DEBUG
38char * rx_get_reloc (long);
9ccb8af9 39void rx_dump_symtab (bfd *, void *, void *);
c7927a3c
NC		 40#endif
41
42#define RXREL(n,sz,bit,shift,complain,pcrel) \
43 HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
0a1b45a2 44 bfd_elf_generic_reloc, "R_RX_" #n, false, 0, ~0, false)
c7927a3c
NC		 45
46/* Note that the relocations around 0x7f are internal to this file;
47 feel free to move them as needed to avoid conflicts with published
48 relocation numbers. */
49
50static reloc_howto_type rx_elf_howto_table [] =
51{
c94cb026
AM		 52 RXREL (NONE, 0, 0, 0, dont, false),
53 RXREL (DIR32, 4, 32, 0, signed, false),
54 RXREL (DIR24S, 4, 24, 0, signed, false),
55 RXREL (DIR16, 2, 16, 0, dont, false),
56 RXREL (DIR16U, 2, 16, 0, unsigned, false),
57 RXREL (DIR16S, 2, 16, 0, signed, false),
58 RXREL (DIR8, 1, 8, 0, dont, false),
59 RXREL (DIR8U, 1, 8, 0, unsigned, false),
60 RXREL (DIR8S, 1, 8, 0, signed, false),
61 RXREL (DIR24S_PCREL, 4, 24, 0, signed, true),
62 RXREL (DIR16S_PCREL, 2, 16, 0, signed, true),
63 RXREL (DIR8S_PCREL, 1, 8, 0, signed, true),
64 RXREL (DIR16UL, 2, 16, 2, unsigned, false),
65 RXREL (DIR16UW, 2, 16, 1, unsigned, false),
66 RXREL (DIR8UL, 1, 8, 2, unsigned, false),
67 RXREL (DIR8UW, 1, 8, 1, unsigned, false),
68 RXREL (DIR32_REV, 2, 16, 0, dont, false),
69 RXREL (DIR16_REV, 2, 16, 0, dont, false),
70 RXREL (DIR3U_PCREL, 1, 3, 0, dont, true),
c7927a3c
NC		 71
72 EMPTY_HOWTO (0x13),
73 EMPTY_HOWTO (0x14),
74 EMPTY_HOWTO (0x15),
75 EMPTY_HOWTO (0x16),
76 EMPTY_HOWTO (0x17),
77 EMPTY_HOWTO (0x18),
78 EMPTY_HOWTO (0x19),
79 EMPTY_HOWTO (0x1a),
80 EMPTY_HOWTO (0x1b),
81 EMPTY_HOWTO (0x1c),
82 EMPTY_HOWTO (0x1d),
83 EMPTY_HOWTO (0x1e),
84 EMPTY_HOWTO (0x1f),
85
c94cb026
AM		 86 RXREL (RH_3_PCREL, 1, 3, 0, signed, true),
87 RXREL (RH_16_OP, 2, 16, 0, signed, false),
88 RXREL (RH_24_OP, 4, 24, 0, signed, false),
89 RXREL (RH_32_OP, 4, 32, 0, signed, false),
90 RXREL (RH_24_UNS, 4, 24, 0, unsigned, false),
91 RXREL (RH_8_NEG, 1, 8, 0, signed, false),
92 RXREL (RH_16_NEG, 2, 16, 0, signed, false),
93 RXREL (RH_24_NEG, 4, 24, 0, signed, false),
94 RXREL (RH_32_NEG, 4, 32, 0, signed, false),
95 RXREL (RH_DIFF, 4, 32, 0, signed, false),
96 RXREL (RH_GPRELB, 2, 16, 0, unsigned, false),
97 RXREL (RH_GPRELW, 2, 16, 0, unsigned, false),
98 RXREL (RH_GPRELL, 2, 16, 0, unsigned, false),
5d0feb98 99 RXREL (RH_RELAX, 0, 0, 0, dont, false),
c7927a3c
NC		 100
101 EMPTY_HOWTO (0x2e),
102 EMPTY_HOWTO (0x2f),
103 EMPTY_HOWTO (0x30),
104 EMPTY_HOWTO (0x31),
105 EMPTY_HOWTO (0x32),
106 EMPTY_HOWTO (0x33),
107 EMPTY_HOWTO (0x34),
108 EMPTY_HOWTO (0x35),
109 EMPTY_HOWTO (0x36),
110 EMPTY_HOWTO (0x37),
111 EMPTY_HOWTO (0x38),
112 EMPTY_HOWTO (0x39),
113 EMPTY_HOWTO (0x3a),
114 EMPTY_HOWTO (0x3b),
115 EMPTY_HOWTO (0x3c),
116 EMPTY_HOWTO (0x3d),
117 EMPTY_HOWTO (0x3e),
118 EMPTY_HOWTO (0x3f),
119 EMPTY_HOWTO (0x40),
120
c94cb026
AM		 121 RXREL (ABS32, 4, 32, 0, dont, false),
122 RXREL (ABS24S, 4, 24, 0, signed, false),
123 RXREL (ABS16, 2, 16, 0, dont, false),
124 RXREL (ABS16U, 2, 16, 0, unsigned, false),
125 RXREL (ABS16S, 2, 16, 0, signed, false),
126 RXREL (ABS8, 1, 8, 0, dont, false),
127 RXREL (ABS8U, 1, 8, 0, unsigned, false),
128 RXREL (ABS8S, 1, 8, 0, signed, false),
129 RXREL (ABS24S_PCREL, 4, 24, 0, signed, true),
130 RXREL (ABS16S_PCREL, 2, 16, 0, signed, true),
131 RXREL (ABS8S_PCREL, 1, 8, 0, signed, true),
132 RXREL (ABS16UL, 2, 16, 0, unsigned, false),
133 RXREL (ABS16UW, 2, 16, 0, unsigned, false),
134 RXREL (ABS8UL, 1, 8, 0, unsigned, false),
135 RXREL (ABS8UW, 1, 8, 0, unsigned, false),
136 RXREL (ABS32_REV, 4, 32, 0, dont, false),
137 RXREL (ABS16_REV, 2, 16, 0, dont, false),
c7927a3c
NC		 138
139#define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32)
140
141 EMPTY_HOWTO (0x52),
142 EMPTY_HOWTO (0x53),
143 EMPTY_HOWTO (0x54),
144 EMPTY_HOWTO (0x55),
145 EMPTY_HOWTO (0x56),
146 EMPTY_HOWTO (0x57),
147 EMPTY_HOWTO (0x58),
148 EMPTY_HOWTO (0x59),
149 EMPTY_HOWTO (0x5a),
150 EMPTY_HOWTO (0x5b),
151 EMPTY_HOWTO (0x5c),
152 EMPTY_HOWTO (0x5d),
153 EMPTY_HOWTO (0x5e),
154 EMPTY_HOWTO (0x5f),
155 EMPTY_HOWTO (0x60),
156 EMPTY_HOWTO (0x61),
157 EMPTY_HOWTO (0x62),
158 EMPTY_HOWTO (0x63),
159 EMPTY_HOWTO (0x64),
160 EMPTY_HOWTO (0x65),
161 EMPTY_HOWTO (0x66),
162 EMPTY_HOWTO (0x67),
163 EMPTY_HOWTO (0x68),
164 EMPTY_HOWTO (0x69),
165 EMPTY_HOWTO (0x6a),
166 EMPTY_HOWTO (0x6b),
167 EMPTY_HOWTO (0x6c),
168 EMPTY_HOWTO (0x6d),
169 EMPTY_HOWTO (0x6e),
170 EMPTY_HOWTO (0x6f),
171 EMPTY_HOWTO (0x70),
172 EMPTY_HOWTO (0x71),
173 EMPTY_HOWTO (0x72),
174 EMPTY_HOWTO (0x73),
175 EMPTY_HOWTO (0x74),
176 EMPTY_HOWTO (0x75),
177 EMPTY_HOWTO (0x76),
178 EMPTY_HOWTO (0x77),
179
180 /* These are internal. */
181 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */
182 /* ---- ---- 4--- 3210. */
183#define R_RX_RH_ABS5p8B 0x78
5d0feb98 184 RXREL (RH_ABS5p8B, 0, 0, 0, dont, false),
c7927a3c 185#define R_RX_RH_ABS5p8W 0x79
5d0feb98 186 RXREL (RH_ABS5p8W, 0, 0, 0, dont, false),
c7927a3c 187#define R_RX_RH_ABS5p8L 0x7a
5d0feb98 188 RXREL (RH_ABS5p8L, 0, 0, 0, dont, false),
c7927a3c
NC		 189 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */
190 /* ---- -432 1--- 0---. */
191#define R_RX_RH_ABS5p5B 0x7b
5d0feb98 192 RXREL (RH_ABS5p5B, 0, 0, 0, dont, false),
c7927a3c 193#define R_RX_RH_ABS5p5W 0x7c
5d0feb98 194 RXREL (RH_ABS5p5W, 0, 0, 0, dont, false),
c7927a3c 195#define R_RX_RH_ABS5p5L 0x7d
5d0feb98 196 RXREL (RH_ABS5p5L, 0, 0, 0, dont, false),
c7927a3c
NC		 197 /* A 4-bit unsigned immediate at bit position 8. */
198#define R_RX_RH_UIMM4p8 0x7e
5d0feb98 199 RXREL (RH_UIMM4p8, 0, 0, 0, dont, false),
c7927a3c
NC		 200 /* A 4-bit negative unsigned immediate at bit position 8. */
201#define R_RX_RH_UNEG4p8 0x7f
5d0feb98 202 RXREL (RH_UNEG4p8, 0, 0, 0, dont, false),
c7927a3c
NC		 203 /* End of internal relocs. */
204
c94cb026
AM		 205 RXREL (SYM, 4, 32, 0, dont, false),
206 RXREL (OPneg, 4, 32, 0, dont, false),
207 RXREL (OPadd, 4, 32, 0, dont, false),
208 RXREL (OPsub, 4, 32, 0, dont, false),
209 RXREL (OPmul, 4, 32, 0, dont, false),
210 RXREL (OPdiv, 4, 32, 0, dont, false),
211 RXREL (OPshla, 4, 32, 0, dont, false),
212 RXREL (OPshra, 4, 32, 0, dont, false),
213 RXREL (OPsctsize, 4, 32, 0, dont, false),
4939c49d
AM		 214
215 EMPTY_HOWTO (0x89),
216 EMPTY_HOWTO (0x8a),
217 EMPTY_HOWTO (0x8b),
218 EMPTY_HOWTO (0x8c),
219
c94cb026 220 RXREL (OPscttop, 4, 32, 0, dont, false),
4939c49d
AM		 221
222 EMPTY_HOWTO (0x8e),
223 EMPTY_HOWTO (0x8f),
224
c94cb026
AM		 225 RXREL (OPand, 4, 32, 0, dont, false),
226 RXREL (OPor, 4, 32, 0, dont, false),
227 RXREL (OPxor, 4, 32, 0, dont, false),
228 RXREL (OPnot, 4, 32, 0, dont, false),
229 RXREL (OPmod, 4, 32, 0, dont, false),
230 RXREL (OPromtop, 4, 32, 0, dont, false),
231 RXREL (OPramtop, 4, 32, 0, dont, false)
c7927a3c
NC		 232};
233\f
234/* Map BFD reloc types to RX ELF reloc types. */
235
236struct rx_reloc_map
237{
238 bfd_reloc_code_real_type bfd_reloc_val;
07d6d2b8 239 unsigned int rx_reloc_val;
c7927a3c
NC		 240};
241
242static const struct rx_reloc_map rx_reloc_map [] =
243{
244 { BFD_RELOC_NONE, R_RX_NONE },
245 { BFD_RELOC_8, R_RX_DIR8S },
246 { BFD_RELOC_16, R_RX_DIR16S },
247 { BFD_RELOC_24, R_RX_DIR24S },
248 { BFD_RELOC_32, R_RX_DIR32 },
249 { BFD_RELOC_RX_16_OP, R_RX_DIR16 },
250 { BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL },
251 { BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL },
252 { BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL },
253 { BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL },
254 { BFD_RELOC_RX_8U, R_RX_DIR8U },
255 { BFD_RELOC_RX_16U, R_RX_DIR16U },
256 { BFD_RELOC_RX_24U, R_RX_RH_24_UNS },
257 { BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG },
258 { BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG },
259 { BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG },
260 { BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG },
261 { BFD_RELOC_RX_DIFF, R_RX_RH_DIFF },
262 { BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB },
263 { BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW },
264 { BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL },
265 { BFD_RELOC_RX_RELAX, R_RX_RH_RELAX },
266 { BFD_RELOC_RX_SYM, R_RX_SYM },
267 { BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub },
9689e3a3 268 { BFD_RELOC_RX_OP_NEG, R_RX_OPneg },
c7927a3c
NC		 269 { BFD_RELOC_RX_ABS8, R_RX_ABS8 },
270 { BFD_RELOC_RX_ABS16, R_RX_ABS16 },
e8ef21bf 271 { BFD_RELOC_RX_ABS16_REV, R_RX_ABS16_REV },
c7927a3c 272 { BFD_RELOC_RX_ABS32, R_RX_ABS32 },
e8ef21bf 273 { BFD_RELOC_RX_ABS32_REV, R_RX_ABS32_REV },
c7927a3c
NC		 274 { BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL },
275 { BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW },
276 { BFD_RELOC_RX_ABS16U, R_RX_ABS16U }
277};
278
279#define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG)
280
281static reloc_howto_type *
07d6d2b8 282rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
c7927a3c
NC		 283 bfd_reloc_code_real_type code)
284{
285 unsigned int i;
286
287 if (code == BFD_RELOC_RX_32_OP)
288 return rx_elf_howto_table + R_RX_DIR32;
289
0ba38529 290 for (i = ARRAY_SIZE (rx_reloc_map); i--;)
c7927a3c
NC		 291 if (rx_reloc_map [i].bfd_reloc_val == code)
292 return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val;
293
294 return NULL;
295}
296
297static reloc_howto_type *
298rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
299{
300 unsigned int i;
301
302 for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++)
303 if (rx_elf_howto_table[i].name != NULL
304 && strcasecmp (rx_elf_howto_table[i].name, r_name) == 0)
305 return rx_elf_howto_table + i;
306
307 return NULL;
308}
309
310/* Set the howto pointer for an RX ELF reloc. */
311
0a1b45a2 312static bool
f3185997
NC		 313rx_info_to_howto_rela (bfd * abfd,
314 arelent * cache_ptr,
315 Elf_Internal_Rela * dst)
c7927a3c
NC		 316{
317 unsigned int r_type;
318
319 r_type = ELF32_R_TYPE (dst->r_info);
4939c49d
AM		 320 BFD_ASSERT (R_RX_max == ARRAY_SIZE (rx_elf_howto_table));
321 if (r_type >= ARRAY_SIZE (rx_elf_howto_table))
5860e3f8 322 {
695344c0 323 /* xgettext:c-format */
0aa13fee
AM		 324 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
325 abfd, r_type);
f3185997 326 bfd_set_error (bfd_error_bad_value);
0a1b45a2 327 return false;
5860e3f8 328 }
c7927a3c 329 cache_ptr->howto = rx_elf_howto_table + r_type;
f3185997
NC		 330 if (cache_ptr->howto->name == NULL)
331 {
332 /* xgettext:c-format */
333 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
334 abfd, r_type);
335 bfd_set_error (bfd_error_bad_value);
0a1b45a2 336 return false;
f3185997 337 }
0a1b45a2 338 return true;
c7927a3c
NC		 339}
340\f
341static bfd_vma
07d6d2b8 342get_symbol_value (const char * name,
c7927a3c 343 struct bfd_link_info * info,
07d6d2b8
AM		 344 bfd * input_bfd,
345 asection * input_section,
c7927a3c
NC		 346 int offset)
347{
348 bfd_vma value = 0;
349 struct bfd_link_hash_entry * h;
350
0a1b45a2 351 h = bfd_link_hash_lookup (info->hash, name, false, false, true);
c7927a3c
NC		 352
353 if (h == NULL
354 || (h->type != bfd_link_hash_defined
355 && h->type != bfd_link_hash_defweak))
1a72702b 356 (*info->callbacks->undefined_symbol)
0a1b45a2 357 (info, name, input_bfd, input_section, offset, true);
c7927a3c
NC		 358 else
359 value = (h->u.def.value
360 + h->u.def.section->output_section->vma
361 + h->u.def.section->output_offset);
362
363 return value;
364}
1a72702b 365
7a2f2d82 366static bfd_vma
07d6d2b8 367get_symbol_value_maybe (const char * name,
7a2f2d82
DD		 368 struct bfd_link_info * info)
369{
370 bfd_vma value = 0;
371 struct bfd_link_hash_entry * h;
372
0a1b45a2 373 h = bfd_link_hash_lookup (info->hash, name, false, false, true);
7a2f2d82
DD		 374
375 if (h == NULL
376 || (h->type != bfd_link_hash_defined
377 && h->type != bfd_link_hash_defweak))
378 return 0;
379 else
380 value = (h->u.def.value
381 + h->u.def.section->output_section->vma
382 + h->u.def.section->output_offset);
383
384 return value;
385}
c7927a3c
NC		 386
387static bfd_vma
07d6d2b8
AM		 388get_gp (struct bfd_link_info * info,
389 bfd * abfd,
390 asection * sec,
c7927a3c
NC		 391 int offset)
392{
0a1b45a2
AM		 393 static bool cached = false;
394 static bfd_vma cached_value = 0;
c7927a3c
NC		 395
396 if (!cached)
397 {
1a72702b 398 cached_value = get_symbol_value ("__gp", info, abfd, sec, offset);
0a1b45a2 399 cached = true;
c7927a3c
NC		 400 }
401 return cached_value;
402}
403
404static bfd_vma
1a72702b 405get_romstart (struct bfd_link_info * info,
07d6d2b8
AM		 406 bfd * abfd,
407 asection * sec,
c7927a3c
NC		 408 int offset)
409{
0a1b45a2
AM		 410 static bool cached = false;
411 static bfd_vma cached_value = 0;
c7927a3c
NC		 412
413 if (!cached)
414 {
1a72702b 415 cached_value = get_symbol_value ("_start", info, abfd, sec, offset);
0a1b45a2 416 cached = true;
c7927a3c
NC		 417 }
418 return cached_value;
419}
420
421static bfd_vma
1a72702b 422get_ramstart (struct bfd_link_info * info,
07d6d2b8
AM		 423 bfd * abfd,
424 asection * sec,
c7927a3c
NC		 425 int offset)
426{
0a1b45a2
AM		 427 static bool cached = false;
428 static bfd_vma cached_value = 0;
c7927a3c
NC		 429
430 if (!cached)
431 {
1a72702b 432 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset);
0a1b45a2 433 cached = true;
c7927a3c
NC		 434 }
435 return cached_value;
436}
437
438#define NUM_STACK_ENTRIES 16
439static int32_t rx_stack [ NUM_STACK_ENTRIES ];
440static unsigned int rx_stack_top;
441
442#define RX_STACK_PUSH(val) \
443 do \
444 { \
445 if (rx_stack_top < NUM_STACK_ENTRIES) \
07d6d2b8 446 rx_stack [rx_stack_top ++] = (val); \
c7927a3c 447 else \
07d6d2b8 448 r = bfd_reloc_dangerous; \
c7927a3c
NC		 449 } \
450 while (0)
451
452#define RX_STACK_POP(dest) \
453 do \
454 { \
455 if (rx_stack_top > 0) \
07d6d2b8 456 (dest) = rx_stack [-- rx_stack_top]; \
c7927a3c 457 else \
07d6d2b8 458 (dest) = 0, r = bfd_reloc_dangerous; \
c7927a3c
NC		 459 } \
460 while (0)
461
462/* Relocate an RX ELF section.
463 There is some attempt to make this function usable for many architectures,
464 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
465 if only to serve as a learning tool.
466
467 The RELOCATE_SECTION function is called by the new ELF backend linker
468 to handle the relocations for a section.
469
470 The relocs are always passed as Rela structures; if the section
471 actually uses Rel structures, the r_addend field will always be
472 zero.
473
474 This function is responsible for adjusting the section contents as
475 necessary, and (if using Rela relocs and generating a relocatable
476 output file) adjusting the reloc addend as necessary.
477
478 This function does not have to worry about setting the reloc
479 address or the reloc symbol index.
480
481 LOCAL_SYMS is a pointer to the swapped in local symbols.
482
483 LOCAL_SECTIONS is an array giving the section in the input file
484 corresponding to the st_shndx field of each local symbol.
485
486 The global hash table entry for the global symbols can be found
487 via elf_sym_hashes (input_bfd).
488
489 When generating relocatable output, this function must handle
490 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
491 going to be the section symbol corresponding to the output
492 section, which means that the addend must be adjusted
493 accordingly. */
494
0f684201 495static int
c7927a3c 496rx_elf_relocate_section
07d6d2b8 497 (bfd * output_bfd,
c7927a3c 498 struct bfd_link_info * info,
07d6d2b8
AM		 499 bfd * input_bfd,
500 asection * input_section,
501 bfd_byte * contents,
c7927a3c 502 Elf_Internal_Rela * relocs,
07d6d2b8
AM		 503 Elf_Internal_Sym * local_syms,
504 asection ** local_sections)
c7927a3c 505{
0a1b45a2
AM		 506 Elf_Internal_Shdr *symtab_hdr;
507 struct elf_link_hash_entry **sym_hashes;
508 Elf_Internal_Rela *rel;
509 Elf_Internal_Rela *relend;
510 bool pid_mode;
511 bool saw_subtract = false;
512 const char *table_default_cache = NULL;
513 bfd_vma table_start_cache = 0;
514 bfd_vma table_end_cache = 0;
d4cb0ea0
NC		 515
516 if (elf_elfheader (output_bfd)->e_flags & E_FLAG_RX_PID)
0a1b45a2 517 pid_mode = true;
d4cb0ea0 518 else
0a1b45a2 519 pid_mode = false;
c7927a3c
NC		 520
521 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
522 sym_hashes = elf_sym_hashes (input_bfd);
523 relend = relocs + input_section->reloc_count;
c7927a3c
NC		 524 for (rel = relocs; rel < relend; rel ++)
525 {
0a1b45a2
AM		 526 reloc_howto_type *howto;
527 unsigned long r_symndx;
528 Elf_Internal_Sym *sym;
529 asection *sec;
530 struct elf_link_hash_entry *h;
531 bfd_vma relocation;
532 bfd_reloc_status_type r;
533 const char * name = NULL;
534 bool unresolved_reloc = true;
535 int r_type;
c7927a3c
NC		 536
537 r_type = ELF32_R_TYPE (rel->r_info);
538 r_symndx = ELF32_R_SYM (rel->r_info);
539
540 howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info);
07d6d2b8 541 h = NULL;
c7927a3c
NC		 542 sym = NULL;
543 sec = NULL;
544 relocation = 0;
545
d4cb0ea0 546 if (rx_stack_top == 0)
0a1b45a2 547 saw_subtract = false;
d4cb0ea0 548
c7927a3c
NC		 549 if (r_symndx < symtab_hdr->sh_info)
550 {
551 sym = local_syms + r_symndx;
552 sec = local_sections [r_symndx];
553 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
554
555 name = bfd_elf_string_from_elf_section
556 (input_bfd, symtab_hdr->sh_link, sym->st_name);
fd361982 557 name = sym->st_name == 0 ? bfd_section_name (sec) : name;
c7927a3c
NC		 558 }
559 else
560 {
0a1b45a2 561 bool warned, ignored;
c7927a3c
NC		 562
563 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
564 r_symndx, symtab_hdr, sym_hashes, h,
565 sec, relocation, unresolved_reloc,
62d887d4 566 warned, ignored);
c7927a3c
NC		 567
568 name = h->root.root.string;
569 }
570
3f3328b8 571 if (startswith (name, "$tableentry$default$"))
7a2f2d82
DD		 572 {
573 bfd_vma entry_vma;
574 int idx;
575 char *buf;
7a2f2d82
DD		 576
577 if (table_default_cache != name)
578 {
579
580 /* All relocs for a given table should be to the same
581 (weak) default symbol) so we can use it to detect a
582 cache miss. We use the offset into the table to find
583 the "real" symbol. Calculate and store the table's
584 offset here. */
585
586 table_default_cache = name;
587
588 /* We have already done error checking in rx_table_find(). */
589
e0b317de
AM		 590 buf = (char *) bfd_malloc (13 + strlen (name + 20));
591 if (buf == NULL)
0a1b45a2 592 return false;
7a2f2d82
DD		 593
594 sprintf (buf, "$tablestart$%s", name + 20);
7a2f2d82 595 table_start_cache = get_symbol_value (buf,
7a2f2d82
DD		 596 info,
597 input_bfd,
598 input_section,
599 rel->r_offset);
600
601 sprintf (buf, "$tableend$%s", name + 20);
7a2f2d82 602 table_end_cache = get_symbol_value (buf,
7a2f2d82
DD		 603 info,
604 input_bfd,
605 input_section,
606 rel->r_offset);
607
608 free (buf);
609 }
610
611 entry_vma = (input_section->output_section->vma
612 + input_section->output_offset
613 + rel->r_offset);
614
615 if (table_end_cache <= entry_vma || entry_vma < table_start_cache)
616 {
695344c0 617 /* xgettext:c-format */
871b3ab2 618 _bfd_error_handler (_("%pB:%pA: table entry %s outside table"),
7a2f2d82
DD		 619 input_bfd, input_section,
620 name);
621 }
622 else if ((int) (entry_vma - table_start_cache) % 4)
623 {
695344c0 624 /* xgettext:c-format */
871b3ab2 625 _bfd_error_handler (_("%pB:%pA: table entry %s not word-aligned within table"),
7a2f2d82
DD		 626 input_bfd, input_section,
627 name);
628 }
629 else
630 {
631 idx = (int) (entry_vma - table_start_cache) / 4;
632
633 /* This will look like $tableentry$<N>$<name> */
e0b317de
AM		 634 buf = (char *) bfd_malloc (12 + 20 + strlen (name + 20));
635 if (buf == NULL)
0a1b45a2 636 return false;
e0b317de 637
7a2f2d82
DD		 638 sprintf (buf, "$tableentry$%d$%s", idx, name + 20);
639
0a1b45a2 640 h = (struct elf_link_hash_entry *) bfd_link_hash_lookup (info->hash, buf, false, false, true);
7a2f2d82
DD		 641
642 if (h)
643 {
644 relocation = (h->root.u.def.value
645 + h->root.u.def.section->output_section->vma
646 + h->root.u.def.section->output_offset);;
647 }
648
649 free (buf);
650 }
651 }
652
dbaa2011 653 if (sec != NULL && discarded_section (sec))
e4067dbb 654 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 655 rel, 1, relend, howto, 0, contents);
c7927a3c 656
0e1862bb 657 if (bfd_link_relocatable (info))
c7927a3c
NC		 658 {
659 /* This is a relocatable link. We don't have to change
07d6d2b8
AM		 660 anything, unless the reloc is against a section symbol,
661 in which case we have to adjust according to where the
662 section symbol winds up in the output section. */
c7927a3c
NC		 663 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
664 rel->r_addend += sec->output_offset;
665 continue;
666 }
667
668 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
669 /* If the symbol is undefined and weak
670 then the relocation resolves to zero. */
671 relocation = 0;
672 else
673 {
674 if (howto->pc_relative)
675 {
676 relocation -= (input_section->output_section->vma
677 + input_section->output_offset
678 + rel->r_offset);
679 if (r_type != R_RX_RH_3_PCREL
680 && r_type != R_RX_DIR3U_PCREL)
681 relocation ++;
682 }
683
684 relocation += rel->r_addend;
685 }
686
687 r = bfd_reloc_ok;
688
38f14ab8
AM		 689#define RANGE(a,b) \
690 if (a > (long) relocation || (long) relocation > b) \
691 r = bfd_reloc_overflow
692#define ALIGN(m) \
693 if (relocation & m) \
694 r = bfd_reloc_other
695#define OP(i) \
696 (contents[rel->r_offset + (i)])
c7927a3c 697#define WARN_REDHAT(type) \
38f14ab8
AM		 698 /* xgettext:c-format */ \
699 _bfd_error_handler \
700 (_("%pB:%pA: warning: deprecated Red Hat reloc " \
701 "%s detected against: %s"), \
702 input_bfd, input_section, #type, name)
c7927a3c 703
d4cb0ea0
NC		 704 /* Check for unsafe relocs in PID mode. These are any relocs where
705 an absolute address is being computed. There are special cases
706 for relocs against symbols that are known to be referenced in
707 crt0.o before the PID base address register has been initialised. */
708#define UNSAFE_FOR_PID \
709 do \
710 { \
711 if (pid_mode \
07d6d2b8 712 && sec != NULL \
d4cb0ea0
NC		 713 && sec->flags & SEC_READONLY \
714 && !(input_section->flags & SEC_DEBUGGING) \
715 && strcmp (name, "__pid_base") != 0 \
716 && strcmp (name, "__gp") != 0 \
717 && strcmp (name, "__romdatastart") != 0 \
718 && !saw_subtract) \
695344c0 719 /* xgettext:c-format */ \
2dcf00ce
AM		 720 _bfd_error_handler (_("%pB(%pA): unsafe PID relocation %s " \
721 "at %#" PRIx64 " (against %s in %s)"), \
d4cb0ea0 722 input_bfd, input_section, howto->name, \
2dcf00ce
AM		 723 (uint64_t) (input_section->output_section->vma \
724 + input_section->output_offset \
725 + rel->r_offset), \
d4cb0ea0
NC		 726 name, sec->name); \
727 } \
728 while (0)
729
c7927a3c
NC		 730 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
731 switch (r_type)
732 {
733 case R_RX_NONE:
734 break;
735
736 case R_RX_RH_RELAX:
737 break;
738
739 case R_RX_RH_3_PCREL:
740 WARN_REDHAT ("RX_RH_3_PCREL");
741 RANGE (3, 10);
742 OP (0) &= 0xf8;
743 OP (0) |= relocation & 0x07;
744 break;
745
746 case R_RX_RH_8_NEG:
747 WARN_REDHAT ("RX_RH_8_NEG");
748 relocation = - relocation;
1a0670f3 749 /* Fall through. */
c7927a3c 750 case R_RX_DIR8S_PCREL:
d4cb0ea0 751 UNSAFE_FOR_PID;
c7927a3c
NC		 752 RANGE (-128, 127);
753 OP (0) = relocation;
754 break;
755
756 case R_RX_DIR8S:
d4cb0ea0 757 UNSAFE_FOR_PID;
c7927a3c
NC		 758 RANGE (-128, 255);
759 OP (0) = relocation;
760 break;
761
762 case R_RX_DIR8U:
d4cb0ea0 763 UNSAFE_FOR_PID;
c7927a3c
NC		 764 RANGE (0, 255);
765 OP (0) = relocation;
766 break;
767
768 case R_RX_RH_16_NEG:
769 WARN_REDHAT ("RX_RH_16_NEG");
770 relocation = - relocation;
1a0670f3 771 /* Fall through. */
c7927a3c 772 case R_RX_DIR16S_PCREL:
d4cb0ea0 773 UNSAFE_FOR_PID;
c7927a3c
NC		 774 RANGE (-32768, 32767);
775#if RX_OPCODE_BIG_ENDIAN
776#else
777 OP (0) = relocation;
778 OP (1) = relocation >> 8;
779#endif
780 break;
781
782 case R_RX_RH_16_OP:
783 WARN_REDHAT ("RX_RH_16_OP");
d4cb0ea0 784 UNSAFE_FOR_PID;
c7927a3c
NC		 785 RANGE (-32768, 32767);
786#if RX_OPCODE_BIG_ENDIAN
787 OP (1) = relocation;
788 OP (0) = relocation >> 8;
789#else
790 OP (0) = relocation;
791 OP (1) = relocation >> 8;
792#endif
793 break;
794
795 case R_RX_DIR16S:
d4cb0ea0 796 UNSAFE_FOR_PID;
c7927a3c
NC		 797 RANGE (-32768, 65535);
798 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
799 {
800 OP (1) = relocation;
801 OP (0) = relocation >> 8;
802 }
803 else
804 {
805 OP (0) = relocation;
806 OP (1) = relocation >> 8;
807 }
808 break;
809
810 case R_RX_DIR16U:
d4cb0ea0 811 UNSAFE_FOR_PID;
c7927a3c
NC		 812 RANGE (0, 65536);
813#if RX_OPCODE_BIG_ENDIAN
814 OP (1) = relocation;
815 OP (0) = relocation >> 8;
816#else
817 OP (0) = relocation;
818 OP (1) = relocation >> 8;
819#endif
820 break;
821
822 case R_RX_DIR16:
d4cb0ea0 823 UNSAFE_FOR_PID;
c7927a3c
NC		 824 RANGE (-32768, 65536);
825#if RX_OPCODE_BIG_ENDIAN
826 OP (1) = relocation;
827 OP (0) = relocation >> 8;
828#else
829 OP (0) = relocation;
830 OP (1) = relocation >> 8;
831#endif
832 break;
833
834 case R_RX_DIR16_REV:
d4cb0ea0 835 UNSAFE_FOR_PID;
c7927a3c
NC		 836 RANGE (-32768, 65536);
837#if RX_OPCODE_BIG_ENDIAN
838 OP (0) = relocation;
839 OP (1) = relocation >> 8;
840#else
841 OP (1) = relocation;
842 OP (0) = relocation >> 8;
843#endif
844 break;
845
846 case R_RX_DIR3U_PCREL:
847 RANGE (3, 10);
848 OP (0) &= 0xf8;
849 OP (0) |= relocation & 0x07;
850 break;
851
852 case R_RX_RH_24_NEG:
d4cb0ea0 853 UNSAFE_FOR_PID;
c7927a3c
NC		 854 WARN_REDHAT ("RX_RH_24_NEG");
855 relocation = - relocation;
1a0670f3 856 /* Fall through. */
c7927a3c
NC		 857 case R_RX_DIR24S_PCREL:
858 RANGE (-0x800000, 0x7fffff);
859#if RX_OPCODE_BIG_ENDIAN
860 OP (2) = relocation;
861 OP (1) = relocation >> 8;
862 OP (0) = relocation >> 16;
863#else
864 OP (0) = relocation;
865 OP (1) = relocation >> 8;
866 OP (2) = relocation >> 16;
867#endif
868 break;
869
870 case R_RX_RH_24_OP:
d4cb0ea0 871 UNSAFE_FOR_PID;
c7927a3c
NC		 872 WARN_REDHAT ("RX_RH_24_OP");
873 RANGE (-0x800000, 0x7fffff);
874#if RX_OPCODE_BIG_ENDIAN
875 OP (2) = relocation;
876 OP (1) = relocation >> 8;
877 OP (0) = relocation >> 16;
878#else
879 OP (0) = relocation;
880 OP (1) = relocation >> 8;
881 OP (2) = relocation >> 16;
882#endif
883 break;
884
885 case R_RX_DIR24S:
d4cb0ea0 886 UNSAFE_FOR_PID;
c7927a3c
NC		 887 RANGE (-0x800000, 0x7fffff);
888 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
889 {
890 OP (2) = relocation;
891 OP (1) = relocation >> 8;
892 OP (0) = relocation >> 16;
893 }
894 else
895 {
896 OP (0) = relocation;
897 OP (1) = relocation >> 8;
898 OP (2) = relocation >> 16;
899 }
900 break;
901
902 case R_RX_RH_24_UNS:
d4cb0ea0 903 UNSAFE_FOR_PID;
c7927a3c
NC		 904 WARN_REDHAT ("RX_RH_24_UNS");
905 RANGE (0, 0xffffff);
906#if RX_OPCODE_BIG_ENDIAN
907 OP (2) = relocation;
908 OP (1) = relocation >> 8;
909 OP (0) = relocation >> 16;
910#else
911 OP (0) = relocation;
912 OP (1) = relocation >> 8;
913 OP (2) = relocation >> 16;
914#endif
915 break;
916
917 case R_RX_RH_32_NEG:
d4cb0ea0 918 UNSAFE_FOR_PID;
c7927a3c
NC		 919 WARN_REDHAT ("RX_RH_32_NEG");
920 relocation = - relocation;
921#if RX_OPCODE_BIG_ENDIAN
922 OP (3) = relocation;
923 OP (2) = relocation >> 8;
924 OP (1) = relocation >> 16;
925 OP (0) = relocation >> 24;
926#else
927 OP (0) = relocation;
928 OP (1) = relocation >> 8;
929 OP (2) = relocation >> 16;
930 OP (3) = relocation >> 24;
931#endif
932 break;
933
934 case R_RX_RH_32_OP:
d4cb0ea0 935 UNSAFE_FOR_PID;
c7927a3c
NC		 936 WARN_REDHAT ("RX_RH_32_OP");
937#if RX_OPCODE_BIG_ENDIAN
938 OP (3) = relocation;
939 OP (2) = relocation >> 8;
940 OP (1) = relocation >> 16;
941 OP (0) = relocation >> 24;
942#else
943 OP (0) = relocation;
944 OP (1) = relocation >> 8;
945 OP (2) = relocation >> 16;
946 OP (3) = relocation >> 24;
947#endif
948 break;
949
950 case R_RX_DIR32:
951 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
952 {
953 OP (3) = relocation;
954 OP (2) = relocation >> 8;
955 OP (1) = relocation >> 16;
956 OP (0) = relocation >> 24;
957 }
958 else
959 {
960 OP (0) = relocation;
961 OP (1) = relocation >> 8;
962 OP (2) = relocation >> 16;
963 OP (3) = relocation >> 24;
964 }
965 break;
966
967 case R_RX_DIR32_REV:
968 if (BIGE (output_bfd))
969 {
970 OP (0) = relocation;
971 OP (1) = relocation >> 8;
972 OP (2) = relocation >> 16;
973 OP (3) = relocation >> 24;
974 }
975 else
976 {
977 OP (3) = relocation;
978 OP (2) = relocation >> 8;
979 OP (1) = relocation >> 16;
980 OP (0) = relocation >> 24;
981 }
982 break;
983
984 case R_RX_RH_DIFF:
985 {
986 bfd_vma val;
987 WARN_REDHAT ("RX_RH_DIFF");
988 val = bfd_get_32 (output_bfd, & OP (0));
989 val -= relocation;
990 bfd_put_32 (output_bfd, val, & OP (0));
991 }
992 break;
993
994 case R_RX_RH_GPRELB:
995 WARN_REDHAT ("RX_RH_GPRELB");
1a72702b 996 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
c7927a3c
NC		 997 RANGE (0, 65535);
998#if RX_OPCODE_BIG_ENDIAN
999 OP (1) = relocation;
1000 OP (0) = relocation >> 8;
1001#else
1002 OP (0) = relocation;
1003 OP (1) = relocation >> 8;
1004#endif
1005 break;
1006
1007 case R_RX_RH_GPRELW:
1008 WARN_REDHAT ("RX_RH_GPRELW");
1a72702b 1009 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
c7927a3c
NC		 1010 ALIGN (1);
1011 relocation >>= 1;
1012 RANGE (0, 65535);
1013#if RX_OPCODE_BIG_ENDIAN
1014 OP (1) = relocation;
1015 OP (0) = relocation >> 8;
1016#else
1017 OP (0) = relocation;
1018 OP (1) = relocation >> 8;
1019#endif
1020 break;
1021
1022 case R_RX_RH_GPRELL:
1023 WARN_REDHAT ("RX_RH_GPRELL");
1a72702b 1024 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
c7927a3c
NC		 1025 ALIGN (3);
1026 relocation >>= 2;
1027 RANGE (0, 65535);
1028#if RX_OPCODE_BIG_ENDIAN
1029 OP (1) = relocation;
1030 OP (0) = relocation >> 8;
1031#else
1032 OP (0) = relocation;
1033 OP (1) = relocation >> 8;
1034#endif
1035 break;
1036
1037 /* Internal relocations just for relaxation: */
1038 case R_RX_RH_ABS5p5B:
1039 RX_STACK_POP (relocation);
1040 RANGE (0, 31);
1041 OP (0) &= 0xf8;
1042 OP (0) |= relocation >> 2;
1043 OP (1) &= 0x77;
1044 OP (1) |= (relocation << 6) & 0x80;
1045 OP (1) |= (relocation << 3) & 0x08;
1046 break;
1047
1048 case R_RX_RH_ABS5p5W:
1049 RX_STACK_POP (relocation);
1050 RANGE (0, 62);
1051 ALIGN (1);
1052 relocation >>= 1;
1053 OP (0) &= 0xf8;
1054 OP (0) |= relocation >> 2;
1055 OP (1) &= 0x77;
1056 OP (1) |= (relocation << 6) & 0x80;
1057 OP (1) |= (relocation << 3) & 0x08;
1058 break;
1059
1060 case R_RX_RH_ABS5p5L:
1061 RX_STACK_POP (relocation);
1062 RANGE (0, 124);
1063 ALIGN (3);
1064 relocation >>= 2;
1065 OP (0) &= 0xf8;
1066 OP (0) |= relocation >> 2;
1067 OP (1) &= 0x77;
1068 OP (1) |= (relocation << 6) & 0x80;
1069 OP (1) |= (relocation << 3) & 0x08;
1070 break;
1071
1072 case R_RX_RH_ABS5p8B:
1073 RX_STACK_POP (relocation);
1074 RANGE (0, 31);
1075 OP (0) &= 0x70;
1076 OP (0) |= (relocation << 3) & 0x80;
1077 OP (0) |= relocation & 0x0f;
1078 break;
1079
1080 case R_RX_RH_ABS5p8W:
1081 RX_STACK_POP (relocation);
1082 RANGE (0, 62);
1083 ALIGN (1);
1084 relocation >>= 1;
1085 OP (0) &= 0x70;
1086 OP (0) |= (relocation << 3) & 0x80;
1087 OP (0) |= relocation & 0x0f;
1088 break;
1089
1090 case R_RX_RH_ABS5p8L:
1091 RX_STACK_POP (relocation);
1092 RANGE (0, 124);
1093 ALIGN (3);
1094 relocation >>= 2;
1095 OP (0) &= 0x70;
1096 OP (0) |= (relocation << 3) & 0x80;
1097 OP (0) |= relocation & 0x0f;
1098 break;
1099
1100 case R_RX_RH_UIMM4p8:
1101 RANGE (0, 15);
1102 OP (0) &= 0x0f;
1103 OP (0) |= relocation << 4;
1104 break;
1105
1106 case R_RX_RH_UNEG4p8:
1107 RANGE (-15, 0);
1108 OP (0) &= 0x0f;
1109 OP (0) |= (-relocation) << 4;
1110 break;
1111
1112 /* Complex reloc handling: */
1113
1114 case R_RX_ABS32:
d4cb0ea0 1115 UNSAFE_FOR_PID;
c7927a3c
NC		 1116 RX_STACK_POP (relocation);
1117#if RX_OPCODE_BIG_ENDIAN
1118 OP (3) = relocation;
1119 OP (2) = relocation >> 8;
1120 OP (1) = relocation >> 16;
1121 OP (0) = relocation >> 24;
1122#else
1123 OP (0) = relocation;
1124 OP (1) = relocation >> 8;
1125 OP (2) = relocation >> 16;
1126 OP (3) = relocation >> 24;
1127#endif
1128 break;
1129
1130 case R_RX_ABS32_REV:
d4cb0ea0 1131 UNSAFE_FOR_PID;
c7927a3c
NC		 1132 RX_STACK_POP (relocation);
1133#if RX_OPCODE_BIG_ENDIAN
1134 OP (0) = relocation;
1135 OP (1) = relocation >> 8;
1136 OP (2) = relocation >> 16;
1137 OP (3) = relocation >> 24;
1138#else
1139 OP (3) = relocation;
1140 OP (2) = relocation >> 8;
1141 OP (1) = relocation >> 16;
1142 OP (0) = relocation >> 24;
1143#endif
1144 break;
1145
1146 case R_RX_ABS24S_PCREL:
1147 case R_RX_ABS24S:
d4cb0ea0 1148 UNSAFE_FOR_PID;
c7927a3c
NC		 1149 RX_STACK_POP (relocation);
1150 RANGE (-0x800000, 0x7fffff);
1151 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1152 {
1153 OP (2) = relocation;
1154 OP (1) = relocation >> 8;
1155 OP (0) = relocation >> 16;
1156 }
1157 else
1158 {
1159 OP (0) = relocation;
1160 OP (1) = relocation >> 8;
1161 OP (2) = relocation >> 16;
1162 }
1163 break;
1164
1165 case R_RX_ABS16:
d4cb0ea0 1166 UNSAFE_FOR_PID;
c7927a3c
NC		 1167 RX_STACK_POP (relocation);
1168 RANGE (-32768, 65535);
1169#if RX_OPCODE_BIG_ENDIAN
1170 OP (1) = relocation;
1171 OP (0) = relocation >> 8;
1172#else
1173 OP (0) = relocation;
1174 OP (1) = relocation >> 8;
1175#endif
1176 break;
1177
1178 case R_RX_ABS16_REV:
d4cb0ea0 1179 UNSAFE_FOR_PID;
c7927a3c
NC		 1180 RX_STACK_POP (relocation);
1181 RANGE (-32768, 65535);
1182#if RX_OPCODE_BIG_ENDIAN
1183 OP (0) = relocation;
1184 OP (1) = relocation >> 8;
1185#else
1186 OP (1) = relocation;
1187 OP (0) = relocation >> 8;
1188#endif
1189 break;
1190
1191 case R_RX_ABS16S_PCREL:
1192 case R_RX_ABS16S:
1193 RX_STACK_POP (relocation);
1194 RANGE (-32768, 32767);
1195 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1196 {
1197 OP (1) = relocation;
1198 OP (0) = relocation >> 8;
1199 }
1200 else
1201 {
1202 OP (0) = relocation;
1203 OP (1) = relocation >> 8;
1204 }
1205 break;
1206
1207 case R_RX_ABS16U:
d4cb0ea0 1208 UNSAFE_FOR_PID;
c7927a3c
NC		 1209 RX_STACK_POP (relocation);
1210 RANGE (0, 65536);
1211#if RX_OPCODE_BIG_ENDIAN
1212 OP (1) = relocation;
1213 OP (0) = relocation >> 8;
1214#else
1215 OP (0) = relocation;
1216 OP (1) = relocation >> 8;
1217#endif
1218 break;
1219
1220 case R_RX_ABS16UL:
d4cb0ea0 1221 UNSAFE_FOR_PID;
c7927a3c
NC		 1222 RX_STACK_POP (relocation);
1223 relocation >>= 2;
1224 RANGE (0, 65536);
1225#if RX_OPCODE_BIG_ENDIAN
1226 OP (1) = relocation;
1227 OP (0) = relocation >> 8;
1228#else
1229 OP (0) = relocation;
1230 OP (1) = relocation >> 8;
1231#endif
1232 break;
1233
1234 case R_RX_ABS16UW:
d4cb0ea0 1235 UNSAFE_FOR_PID;
c7927a3c
NC		 1236 RX_STACK_POP (relocation);
1237 relocation >>= 1;
1238 RANGE (0, 65536);
1239#if RX_OPCODE_BIG_ENDIAN
1240 OP (1) = relocation;
1241 OP (0) = relocation >> 8;
1242#else
1243 OP (0) = relocation;
1244 OP (1) = relocation >> 8;
1245#endif
1246 break;
1247
1248 case R_RX_ABS8:
d4cb0ea0 1249 UNSAFE_FOR_PID;
c7927a3c
NC		 1250 RX_STACK_POP (relocation);
1251 RANGE (-128, 255);
1252 OP (0) = relocation;
1253 break;
1254
1255 case R_RX_ABS8U:
d4cb0ea0 1256 UNSAFE_FOR_PID;
c7927a3c
NC		 1257 RX_STACK_POP (relocation);
1258 RANGE (0, 255);
1259 OP (0) = relocation;
1260 break;
1261
1262 case R_RX_ABS8UL:
d4cb0ea0 1263 UNSAFE_FOR_PID;
c7927a3c
NC		 1264 RX_STACK_POP (relocation);
1265 relocation >>= 2;
1266 RANGE (0, 255);
1267 OP (0) = relocation;
1268 break;
1269
1270 case R_RX_ABS8UW:
d4cb0ea0 1271 UNSAFE_FOR_PID;
c7927a3c
NC		 1272 RX_STACK_POP (relocation);
1273 relocation >>= 1;
1274 RANGE (0, 255);
1275 OP (0) = relocation;
1276 break;
1277
c7927a3c 1278 case R_RX_ABS8S:
d4cb0ea0 1279 UNSAFE_FOR_PID;
1a0670f3 1280 /* Fall through. */
d4cb0ea0 1281 case R_RX_ABS8S_PCREL:
c7927a3c
NC		 1282 RX_STACK_POP (relocation);
1283 RANGE (-128, 127);
1284 OP (0) = relocation;
1285 break;
1286
1287 case R_RX_SYM:
1288 if (r_symndx < symtab_hdr->sh_info)
1289 RX_STACK_PUSH (sec->output_section->vma
1290 + sec->output_offset
d4cb0ea0
NC		 1291 + sym->st_value
1292 + rel->r_addend);
c7927a3c
NC		 1293 else
1294 {
1295 if (h != NULL
1296 && (h->root.type == bfd_link_hash_defined
1297 || h->root.type == bfd_link_hash_defweak))
1298 RX_STACK_PUSH (h->root.u.def.value
1299 + sec->output_section->vma
d4cb0ea0
NC		 1300 + sec->output_offset
1301 + rel->r_addend);
c7927a3c 1302 else
38f14ab8
AM		 1303 _bfd_error_handler
1304 (_("warning: RX_SYM reloc with an unknown symbol"));
c7927a3c
NC		 1305 }
1306 break;
1307
1308 case R_RX_OPneg:
1309 {
1310 int32_t tmp;
1311
0a1b45a2 1312 saw_subtract = true;
c7927a3c
NC		 1313 RX_STACK_POP (tmp);
1314 tmp = - tmp;
1315 RX_STACK_PUSH (tmp);
1316 }
1317 break;
1318
1319 case R_RX_OPadd:
1320 {
1321 int32_t tmp1, tmp2;
1322
1323 RX_STACK_POP (tmp1);
1324 RX_STACK_POP (tmp2);
1325 tmp1 += tmp2;
1326 RX_STACK_PUSH (tmp1);
1327 }
1328 break;
1329
1330 case R_RX_OPsub:
1331 {
1332 int32_t tmp1, tmp2;
1333
0a1b45a2 1334 saw_subtract = true;
c7927a3c
NC		 1335 RX_STACK_POP (tmp1);
1336 RX_STACK_POP (tmp2);
1337 tmp2 -= tmp1;
1338 RX_STACK_PUSH (tmp2);
1339 }
1340 break;
1341
1342 case R_RX_OPmul:
1343 {
1344 int32_t tmp1, tmp2;
1345
1346 RX_STACK_POP (tmp1);
1347 RX_STACK_POP (tmp2);
1348 tmp1 *= tmp2;
1349 RX_STACK_PUSH (tmp1);
1350 }
1351 break;
1352
1353 case R_RX_OPdiv:
1354 {
1355 int32_t tmp1, tmp2;
1356
1357 RX_STACK_POP (tmp1);
1358 RX_STACK_POP (tmp2);
1359 tmp1 /= tmp2;
1360 RX_STACK_PUSH (tmp1);
1361 }
1362 break;
1363
1364 case R_RX_OPshla:
1365 {
1366 int32_t tmp1, tmp2;
1367
1368 RX_STACK_POP (tmp1);
1369 RX_STACK_POP (tmp2);
1370 tmp1 <<= tmp2;
1371 RX_STACK_PUSH (tmp1);
1372 }
1373 break;
1374
1375 case R_RX_OPshra:
1376 {
1377 int32_t tmp1, tmp2;
1378
1379 RX_STACK_POP (tmp1);
1380 RX_STACK_POP (tmp2);
1381 tmp1 >>= tmp2;
1382 RX_STACK_PUSH (tmp1);
1383 }
1384 break;
1385
1386 case R_RX_OPsctsize:
1387 RX_STACK_PUSH (input_section->size);
1388 break;
1389
1390 case R_RX_OPscttop:
1391 RX_STACK_PUSH (input_section->output_section->vma);
1392 break;
1393
1394 case R_RX_OPand:
1395 {
1396 int32_t tmp1, tmp2;
1397
1398 RX_STACK_POP (tmp1);
1399 RX_STACK_POP (tmp2);
1400 tmp1 &= tmp2;
1401 RX_STACK_PUSH (tmp1);
1402 }
1403 break;
1404
1405 case R_RX_OPor:
1406 {
1407 int32_t tmp1, tmp2;
1408
1409 RX_STACK_POP (tmp1);
1410 RX_STACK_POP (tmp2);
1411 tmp1 |= tmp2;
1412 RX_STACK_PUSH (tmp1);
1413 }
1414 break;
1415
1416 case R_RX_OPxor:
1417 {
1418 int32_t tmp1, tmp2;
1419
1420 RX_STACK_POP (tmp1);
1421 RX_STACK_POP (tmp2);
1422 tmp1 ^= tmp2;
1423 RX_STACK_PUSH (tmp1);
1424 }
1425 break;
1426
1427 case R_RX_OPnot:
1428 {
1429 int32_t tmp;
1430
1431 RX_STACK_POP (tmp);
1432 tmp = ~ tmp;
1433 RX_STACK_PUSH (tmp);
1434 }
1435 break;
1436
1437 case R_RX_OPmod:
1438 {
1439 int32_t tmp1, tmp2;
1440
1441 RX_STACK_POP (tmp1);
1442 RX_STACK_POP (tmp2);
1443 tmp1 %= tmp2;
1444 RX_STACK_PUSH (tmp1);
1445 }
1446 break;
1447
1448 case R_RX_OPromtop:
1a72702b 1449 RX_STACK_PUSH (get_romstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1450 break;
1451
1452 case R_RX_OPramtop:
1a72702b 1453 RX_STACK_PUSH (get_ramstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1454 break;
1455
1456 default:
1457 r = bfd_reloc_notsupported;
1458 break;
1459 }
1460
1461 if (r != bfd_reloc_ok)
1462 {
1463 const char * msg = NULL;
1464
1465 switch (r)
1466 {
1467 case bfd_reloc_overflow:
1468 /* Catch the case of a missing function declaration
1469 and emit a more helpful error message. */
1470 if (r_type == R_RX_DIR24S_PCREL)
695344c0 1471 /* xgettext:c-format */
871b3ab2 1472 msg = _("%pB(%pA): error: call to undefined function '%s'");
c7927a3c 1473 else
1a72702b 1474 (*info->callbacks->reloc_overflow)
c7927a3c
NC		 1475 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1476 input_bfd, input_section, rel->r_offset);
1477 break;
1478
1479 case bfd_reloc_undefined:
1a72702b 1480 (*info->callbacks->undefined_symbol)
0a1b45a2 1481 (info, name, input_bfd, input_section, rel->r_offset, true);
c7927a3c
NC		 1482 break;
1483
1484 case bfd_reloc_other:
695344c0 1485 /* xgettext:c-format */
871b3ab2 1486 msg = _("%pB(%pA): warning: unaligned access to symbol '%s' in the small data area");
c7927a3c
NC		 1487 break;
1488
1489 case bfd_reloc_outofrange:
695344c0 1490 /* xgettext:c-format */
871b3ab2 1491 msg = _("%pB(%pA): internal error: out of range error");
c7927a3c
NC		 1492 break;
1493
1494 case bfd_reloc_notsupported:
695344c0 1495 /* xgettext:c-format */
871b3ab2 1496 msg = _("%pB(%pA): internal error: unsupported relocation error");
c7927a3c
NC		 1497 break;
1498
1499 case bfd_reloc_dangerous:
695344c0 1500 /* xgettext:c-format */
871b3ab2 1501 msg = _("%pB(%pA): internal error: dangerous relocation");
c7927a3c
NC		 1502 break;
1503
1504 default:
695344c0 1505 /* xgettext:c-format */
871b3ab2 1506 msg = _("%pB(%pA): internal error: unknown error");
c7927a3c
NC		 1507 break;
1508 }
1509
1510 if (msg)
1511 _bfd_error_handler (msg, input_bfd, input_section, name);
c7927a3c
NC		 1512 }
1513 }
1514
0a1b45a2 1515 return true;
c7927a3c
NC		 1516}
1517\f
1518/* Relaxation Support. */
1519
1520/* Progression of relocations from largest operand size to smallest
1521 operand size. */
1522
1523static int
1524next_smaller_reloc (int r)
1525{
1526 switch (r)
1527 {
1528 case R_RX_DIR32: return R_RX_DIR24S;
1529 case R_RX_DIR24S: return R_RX_DIR16S;
1530 case R_RX_DIR16S: return R_RX_DIR8S;
1531 case R_RX_DIR8S: return R_RX_NONE;
1532
1533 case R_RX_DIR16: return R_RX_DIR8;
1534 case R_RX_DIR8: return R_RX_NONE;
1535
1536 case R_RX_DIR16U: return R_RX_DIR8U;
1537 case R_RX_DIR8U: return R_RX_NONE;
1538
1539 case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL;
1540 case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL;
1541 case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL;
1542
1543 case R_RX_DIR16UL: return R_RX_DIR8UL;
1544 case R_RX_DIR8UL: return R_RX_NONE;
1545 case R_RX_DIR16UW: return R_RX_DIR8UW;
1546 case R_RX_DIR8UW: return R_RX_NONE;
1547
1548 case R_RX_RH_32_OP: return R_RX_RH_24_OP;
1549 case R_RX_RH_24_OP: return R_RX_RH_16_OP;
1550 case R_RX_RH_16_OP: return R_RX_DIR8;
1551
1552 case R_RX_ABS32: return R_RX_ABS24S;
1553 case R_RX_ABS24S: return R_RX_ABS16S;
1554 case R_RX_ABS16: return R_RX_ABS8;
1555 case R_RX_ABS16U: return R_RX_ABS8U;
1556 case R_RX_ABS16S: return R_RX_ABS8S;
1557 case R_RX_ABS8: return R_RX_NONE;
1558 case R_RX_ABS8U: return R_RX_NONE;
1559 case R_RX_ABS8S: return R_RX_NONE;
1560 case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL;
1561 case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL;
1562 case R_RX_ABS8S_PCREL: return R_RX_NONE;
1563 case R_RX_ABS16UL: return R_RX_ABS8UL;
1564 case R_RX_ABS16UW: return R_RX_ABS8UW;
1565 case R_RX_ABS8UL: return R_RX_NONE;
1566 case R_RX_ABS8UW: return R_RX_NONE;
1567 }
1568 return r;
1569};
1570
1571/* Delete some bytes from a section while relaxing. */
1572
0a1b45a2 1573static bool
c7927a3c 1574elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
5ee4a06a
NC		 1575 Elf_Internal_Rela *alignment_rel, int force_snip,
1576 Elf_Internal_Rela *irelstart)
c7927a3c
NC		 1577{
1578 Elf_Internal_Shdr * symtab_hdr;
07d6d2b8
AM		 1579 unsigned int sec_shndx;
1580 bfd_byte * contents;
c7927a3c
NC		 1581 Elf_Internal_Rela * irel;
1582 Elf_Internal_Rela * irelend;
c7927a3c
NC		 1583 Elf_Internal_Sym * isym;
1584 Elf_Internal_Sym * isymend;
07d6d2b8
AM		 1585 bfd_vma toaddr;
1586 unsigned int symcount;
c7927a3c
NC		 1587 struct elf_link_hash_entry ** sym_hashes;
1588 struct elf_link_hash_entry ** end_hashes;
1589
1590 if (!alignment_rel)
1591 force_snip = 1;
1592
1593 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1594
1595 contents = elf_section_data (sec)->this_hdr.contents;
1596
1597 /* The deletion must stop at the next alignment boundary, if
1598 ALIGNMENT_REL is non-NULL. */
c7927a3c
NC		 1599 toaddr = sec->size;
1600 if (alignment_rel)
1601 toaddr = alignment_rel->r_offset;
1602
07d6d2b8 1603 BFD_ASSERT (toaddr > addr);
9c761a55 1604
c7927a3c
NC		 1605 /* Actually delete the bytes. */
1606 memmove (contents + addr, contents + addr + count,
1607 (size_t) (toaddr - addr - count));
1608
1609 /* If we don't have an alignment marker to worry about, we can just
1610 shrink the section. Otherwise, we have to fill in the newly
1611 created gap with NOP insns (0x03). */
1612 if (force_snip)
1613 sec->size -= count;
1614 else
1615 memset (contents + toaddr - count, 0x03, count);
1616
5ee4a06a
NC		 1617 irel = irelstart;
1618 BFD_ASSERT (irel != NULL || sec->reloc_count == 0);
1619 irelend = irel + sec->reloc_count;
1620
c7927a3c 1621 /* Adjust all the relocs. */
9c761a55 1622 for (; irel < irelend; irel++)
c7927a3c
NC		 1623 {
1624 /* Get the new reloc address. */
1625 if (irel->r_offset > addr
1626 && (irel->r_offset < toaddr
1627 || (force_snip && irel->r_offset == toaddr)))
1628 irel->r_offset -= count;
1629
1630 /* If we see an ALIGN marker at the end of the gap, we move it
1631 to the beginning of the gap, since marking these gaps is what
1632 they're for. */
1633 if (irel->r_offset == toaddr
1634 && ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
1635 && irel->r_addend & RX_RELAXA_ALIGN)
1636 irel->r_offset -= count;
1637 }
1638
1639 /* Adjust the local symbols defined in this section. */
1640 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1641 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1642 isymend = isym + symtab_hdr->sh_info;
1643
1644 for (; isym < isymend; isym++)
1645 {
1646 /* If the symbol is in the range of memory we just moved, we
1647 have to adjust its value. */
1648 if (isym->st_shndx == sec_shndx
1649 && isym->st_value > addr
1650 && isym->st_value < toaddr)
1651 isym->st_value -= count;
1652
1653 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1654 *end* is in the moved bytes but it's *start* isn't), then we
1655 must adjust its size. */
1656 if (isym->st_shndx == sec_shndx
1657 && isym->st_value < addr
1658 && isym->st_value + isym->st_size > addr
1659 && isym->st_value + isym->st_size < toaddr)
1660 isym->st_size -= count;
1661 }
1662
1663 /* Now adjust the global symbols defined in this section. */
1664 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1665 - symtab_hdr->sh_info);
1666 sym_hashes = elf_sym_hashes (abfd);
1667 end_hashes = sym_hashes + symcount;
1668
1669 for (; sym_hashes < end_hashes; sym_hashes++)
1670 {
1671 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1672
1673 if ((sym_hash->root.type == bfd_link_hash_defined
1674 || sym_hash->root.type == bfd_link_hash_defweak)
1675 && sym_hash->root.u.def.section == sec)
1676 {
1677 /* As above, adjust the value if needed. */
1678 if (sym_hash->root.u.def.value > addr
1679 && sym_hash->root.u.def.value < toaddr)
1680 sym_hash->root.u.def.value -= count;
1681
1682 /* As above, adjust the size if needed. */
1683 if (sym_hash->root.u.def.value < addr
1684 && sym_hash->root.u.def.value + sym_hash->size > addr
1685 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1686 sym_hash->size -= count;
1687 }
1688 }
1689
0a1b45a2 1690 return true;
c7927a3c
NC		 1691}
1692
1693/* Used to sort relocs by address. If relocs have the same address,
1694 we maintain their relative order, except that R_RX_RH_RELAX
1695 alignment relocs must be the first reloc for any given address. */
1696
1697static void
1698reloc_bubblesort (Elf_Internal_Rela * r, int count)
1699{
1700 int i;
0a1b45a2
AM		 1701 bool again;
1702 bool swappit;
c7927a3c
NC		 1703
1704 /* This is almost a classic bubblesort. It's the slowest sort, but
1705 we're taking advantage of the fact that the relocations are
1706 mostly in order already (the assembler emits them that way) and
1707 we need relocs with the same address to remain in the same
1708 relative order. */
0a1b45a2 1709 again = true;
c7927a3c
NC		 1710 while (again)
1711 {
0a1b45a2 1712 again = false;
c7927a3c
NC		 1713 for (i = 0; i < count - 1; i ++)
1714 {
1715 if (r[i].r_offset > r[i + 1].r_offset)
0a1b45a2 1716 swappit = true;
c7927a3c 1717 else if (r[i].r_offset < r[i + 1].r_offset)
0a1b45a2 1718 swappit = false;
c7927a3c
NC		 1719 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1720 && (r[i + 1].r_addend & RX_RELAXA_ALIGN))
0a1b45a2 1721 swappit = true;
c7927a3c
NC		 1722 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1723 && (r[i + 1].r_addend & RX_RELAXA_ELIGN)
1724 && !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX
1725 && (r[i].r_addend & RX_RELAXA_ALIGN)))
0a1b45a2 1726 swappit = true;
c7927a3c 1727 else
0a1b45a2 1728 swappit = false;
c7927a3c
NC		 1729
1730 if (swappit)
1731 {
1732 Elf_Internal_Rela tmp;
1733
1734 tmp = r[i];
1735 r[i] = r[i + 1];
1736 r[i + 1] = tmp;
1737 /* If we do move a reloc back, re-scan to see if it
1738 needs to be moved even further back. This avoids
1739 most of the O(n^2) behavior for our cases. */
1740 if (i > 0)
1741 i -= 2;
0a1b45a2 1742 again = true;
c7927a3c
NC		 1743 }
1744 }
1745 }
1746}
1747
1748
1749#define OFFSET_FOR_RELOC(rel, lrel, scale) \
1750 rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1751 lrel, abfd, sec, link_info, scale)
1752
1753static bfd_vma
07d6d2b8 1754rx_offset_for_reloc (bfd * abfd,
c7927a3c
NC		 1755 Elf_Internal_Rela * rel,
1756 Elf_Internal_Shdr * symtab_hdr,
806470a2 1757 bfd_byte * shndx_buf ATTRIBUTE_UNUSED,
07d6d2b8 1758 Elf_Internal_Sym * intsyms,
c7927a3c 1759 Elf_Internal_Rela ** lrel,
07d6d2b8
AM		 1760 bfd * input_bfd,
1761 asection * input_section,
c7927a3c 1762 struct bfd_link_info * info,
07d6d2b8 1763 int * scale)
c7927a3c
NC		 1764{
1765 bfd_vma symval;
1766 bfd_reloc_status_type r;
1767
1768 *scale = 1;
1769
1770 /* REL is the first of 1..N relocations. We compute the symbol
1771 value for each relocation, then combine them if needed. LREL
1772 gets a pointer to the last relocation used. */
1773 while (1)
1774 {
1775 int32_t tmp1, tmp2;
1776
1777 /* Get the value of the symbol referred to by the reloc. */
1778 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1779 {
1780 /* A local symbol. */
1781 Elf_Internal_Sym *isym;
c7927a3c
NC		 1782 asection *ssec;
1783
1784 isym = intsyms + ELF32_R_SYM (rel->r_info);
1785
1786 if (isym->st_shndx == SHN_UNDEF)
1787 ssec = bfd_und_section_ptr;
1788 else if (isym->st_shndx == SHN_ABS)
1789 ssec = bfd_abs_section_ptr;
1790 else if (isym->st_shndx == SHN_COMMON)
1791 ssec = bfd_com_section_ptr;
1792 else
1793 ssec = bfd_section_from_elf_index (abfd,
1794 isym->st_shndx);
1795
c7927a3c
NC		 1796 /* Initial symbol value. */
1797 symval = isym->st_value;
1798
1799 /* GAS may have made this symbol relative to a section, in
1800 which case, we have to add the addend to find the
1801 symbol. */
1802 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1803 symval += rel->r_addend;
1804
1805 if (ssec)
1806 {
1807 if ((ssec->flags & SEC_MERGE)
dbaa2011 1808 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
c7927a3c
NC		 1809 symval = _bfd_merged_section_offset (abfd, & ssec,
1810 elf_section_data (ssec)->sec_info,
1811 symval);
1812 }
1813
1814 /* Now make the offset relative to where the linker is putting it. */
1815 if (ssec)
1816 symval +=
1817 ssec->output_section->vma + ssec->output_offset;
1818
1819 symval += rel->r_addend;
1820 }
1821 else
1822 {
1823 unsigned long indx;
1824 struct elf_link_hash_entry * h;
1825
1826 /* An external symbol. */
1827 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1828 h = elf_sym_hashes (abfd)[indx];
1829 BFD_ASSERT (h != NULL);
1830
1831 if (h->root.type != bfd_link_hash_defined
1832 && h->root.type != bfd_link_hash_defweak)
1833 {
1834 /* This appears to be a reference to an undefined
1835 symbol. Just ignore it--it will be caught by the
1836 regular reloc processing. */
1837 if (lrel)
1838 *lrel = rel;
1839 return 0;
1840 }
1841
1842 symval = (h->root.u.def.value
1843 + h->root.u.def.section->output_section->vma
1844 + h->root.u.def.section->output_offset);
1845
1846 symval += rel->r_addend;
1847 }
1848
1849 switch (ELF32_R_TYPE (rel->r_info))
1850 {
1851 case R_RX_SYM:
1852 RX_STACK_PUSH (symval);
1853 break;
1854
1855 case R_RX_OPneg:
1856 RX_STACK_POP (tmp1);
1857 tmp1 = - tmp1;
1858 RX_STACK_PUSH (tmp1);
1859 break;
1860
1861 case R_RX_OPadd:
1862 RX_STACK_POP (tmp1);
1863 RX_STACK_POP (tmp2);
1864 tmp1 += tmp2;
1865 RX_STACK_PUSH (tmp1);
1866 break;
1867
1868 case R_RX_OPsub:
1869 RX_STACK_POP (tmp1);
1870 RX_STACK_POP (tmp2);
1871 tmp2 -= tmp1;
1872 RX_STACK_PUSH (tmp2);
1873 break;
1874
1875 case R_RX_OPmul:
1876 RX_STACK_POP (tmp1);
1877 RX_STACK_POP (tmp2);
1878 tmp1 *= tmp2;
1879 RX_STACK_PUSH (tmp1);
1880 break;
1881
1882 case R_RX_OPdiv:
1883 RX_STACK_POP (tmp1);
1884 RX_STACK_POP (tmp2);
1885 tmp1 /= tmp2;
1886 RX_STACK_PUSH (tmp1);
1887 break;
1888
1889 case R_RX_OPshla:
1890 RX_STACK_POP (tmp1);
1891 RX_STACK_POP (tmp2);
1892 tmp1 <<= tmp2;
1893 RX_STACK_PUSH (tmp1);
1894 break;
1895
1896 case R_RX_OPshra:
1897 RX_STACK_POP (tmp1);
1898 RX_STACK_POP (tmp2);
1899 tmp1 >>= tmp2;
1900 RX_STACK_PUSH (tmp1);
1901 break;
1902
1903 case R_RX_OPsctsize:
1904 RX_STACK_PUSH (input_section->size);
1905 break;
1906
1907 case R_RX_OPscttop:
1908 RX_STACK_PUSH (input_section->output_section->vma);
1909 break;
1910
1911 case R_RX_OPand:
1912 RX_STACK_POP (tmp1);
1913 RX_STACK_POP (tmp2);
1914 tmp1 &= tmp2;
1915 RX_STACK_PUSH (tmp1);
1916 break;
1917
1918 case R_RX_OPor:
1919 RX_STACK_POP (tmp1);
1920 RX_STACK_POP (tmp2);
1921 tmp1 |= tmp2;
1922 RX_STACK_PUSH (tmp1);
1923 break;
1924
1925 case R_RX_OPxor:
1926 RX_STACK_POP (tmp1);
1927 RX_STACK_POP (tmp2);
1928 tmp1 ^= tmp2;
1929 RX_STACK_PUSH (tmp1);
1930 break;
1931
1932 case R_RX_OPnot:
1933 RX_STACK_POP (tmp1);
1934 tmp1 = ~ tmp1;
1935 RX_STACK_PUSH (tmp1);
1936 break;
1937
1938 case R_RX_OPmod:
1939 RX_STACK_POP (tmp1);
1940 RX_STACK_POP (tmp2);
1941 tmp1 %= tmp2;
1942 RX_STACK_PUSH (tmp1);
1943 break;
1944
1945 case R_RX_OPromtop:
1a72702b 1946 RX_STACK_PUSH (get_romstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1947 break;
1948
1949 case R_RX_OPramtop:
1a72702b 1950 RX_STACK_PUSH (get_ramstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1951 break;
1952
1953 case R_RX_DIR16UL:
1954 case R_RX_DIR8UL:
1955 case R_RX_ABS16UL:
1956 case R_RX_ABS8UL:
1957 if (rx_stack_top)
1958 RX_STACK_POP (symval);
1959 if (lrel)
1960 *lrel = rel;
1961 *scale = 4;
1962 return symval;
1963
1964 case R_RX_DIR16UW:
1965 case R_RX_DIR8UW:
1966 case R_RX_ABS16UW:
1967 case R_RX_ABS8UW:
1968 if (rx_stack_top)
1969 RX_STACK_POP (symval);
1970 if (lrel)
1971 *lrel = rel;
1972 *scale = 2;
1973 return symval;
1974
1975 default:
1976 if (rx_stack_top)
1977 RX_STACK_POP (symval);
1978 if (lrel)
1979 *lrel = rel;
1980 return symval;
1981 }
1982
1983 rel ++;
1984 }
1a72702b
AM		 1985 /* FIXME. */
1986 (void) r;
c7927a3c
NC		 1987}
1988
1989static void
1990move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta)
1991{
1992 bfd_vma old_offset = srel->r_offset;
1993
1994 irel ++;
1995 while (irel <= srel)
1996 {
1997 if (irel->r_offset == old_offset)
1998 irel->r_offset += delta;
1999 irel ++;
2000 }
2001}
2002
2003/* Relax one section. */
2004
0a1b45a2
AM		 2005static bool
2006elf32_rx_relax_section (bfd *abfd,
2007 asection *sec,
2008 struct bfd_link_info *link_info,
2009 bool *again,
2010 bool allow_pcrel3)
c7927a3c 2011{
0a1b45a2
AM		 2012 Elf_Internal_Shdr *symtab_hdr;
2013 Elf_Internal_Shdr *shndx_hdr;
2014 Elf_Internal_Rela *internal_relocs;
2015 Elf_Internal_Rela *irel;
2016 Elf_Internal_Rela *srel;
2017 Elf_Internal_Rela *irelend;
2018 Elf_Internal_Rela *next_alignment;
2019 Elf_Internal_Rela *prev_alignment;
2020 bfd_byte *contents = NULL;
2021 bfd_byte *free_contents = NULL;
2022 Elf_Internal_Sym *intsyms = NULL;
2023 Elf_Internal_Sym *free_intsyms = NULL;
2024 bfd_byte *shndx_buf = NULL;
c7927a3c
NC		 2025 bfd_vma pc;
2026 bfd_vma sec_start;
c7927a3c
NC		 2027 bfd_vma symval = 0;
2028 int pcrel = 0;
2029 int code = 0;
2030 int section_alignment_glue;
2031 /* how much to scale the relocation by - 1, 2, or 4. */
2032 int scale;
2033
2034 /* Assume nothing changes. */
0a1b45a2 2035 *again = false;
c7927a3c
NC		 2036
2037 /* We don't have to do anything for a relocatable link, if
2038 this section does not have relocs, or if this is not a
2039 code section. */
0e1862bb 2040 if (bfd_link_relocatable (link_info)
c7927a3c 2041 || sec->reloc_count == 0
3a574cce
AM		 2042 || (sec->flags & SEC_RELOC) == 0
2043 || (sec->flags & SEC_HAS_CONTENTS) == 0
c7927a3c 2044 || (sec->flags & SEC_CODE) == 0)
0a1b45a2 2045 return true;
c7927a3c 2046
6a40cf0c
NC		 2047 symtab_hdr = & elf_symtab_hdr (abfd);
2048 if (elf_symtab_shndx_list (abfd))
2049 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
2050 else
2051 shndx_hdr = NULL;
c7927a3c
NC		 2052
2053 sec_start = sec->output_section->vma + sec->output_offset;
c7927a3c
NC		 2054
2055 /* Get the section contents. */
2056 if (elf_section_data (sec)->this_hdr.contents != NULL)
2057 contents = elf_section_data (sec)->this_hdr.contents;
2058 /* Go get them off disk. */
2059 else
2060 {
2061 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2062 goto error_return;
2063 elf_section_data (sec)->this_hdr.contents = contents;
2064 }
2065
2066 /* Read this BFD's symbols. */
2067 /* Get cached copy if it exists. */
2068 if (symtab_hdr->contents != NULL)
2069 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2070 else
2071 {
2072 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2073 symtab_hdr->contents = (bfd_byte *) intsyms;
2074 }
2075
6a40cf0c 2076 if (shndx_hdr && shndx_hdr->sh_size != 0)
c7927a3c 2077 {
1f4361a7 2078 size_t amt;
c7927a3c 2079
1f4361a7
AM		 2080 if (_bfd_mul_overflow (symtab_hdr->sh_info,
2081 sizeof (Elf_External_Sym_Shndx), &amt))
2082 {
2083 bfd_set_error (bfd_error_file_too_big);
2084 goto error_return;
2085 }
2bb3687b 2086 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0)
c7927a3c 2087 goto error_return;
2bb3687b
AM		 2088 shndx_buf = _bfd_malloc_and_read (abfd, amt, amt);
2089 if (shndx_buf == NULL)
c7927a3c 2090 goto error_return;
806470a2 2091 shndx_hdr->contents = shndx_buf;
c7927a3c
NC		 2092 }
2093
2094 /* Get a copy of the native relocations. */
5ee4a06a
NC		 2095 /* Note - we ignore the setting of link_info->keep_memory when reading
2096 in these relocs. We have to maintain a permanent copy of the relocs
2097 because we are going to walk over them multiple times, adjusting them
2098 as bytes are deleted from the section, and with this relaxation
2099 function itself being called multiple times on the same section... */
2100 internal_relocs = _bfd_elf_link_read_relocs
0a1b45a2 2101 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, true);
c7927a3c
NC		 2102 if (internal_relocs == NULL)
2103 goto error_return;
c7927a3c
NC		 2104
2105 /* The RL_ relocs must be just before the operand relocs they go
2106 with, so we must sort them to guarantee this. We use bubblesort
2107 instead of qsort so we can guarantee that relocs with the same
2108 address remain in the same relative order. */
2109 reloc_bubblesort (internal_relocs, sec->reloc_count);
2110
2111 /* Walk through them looking for relaxing opportunities. */
2112 irelend = internal_relocs + sec->reloc_count;
2113
2114 /* This will either be NULL or a pointer to the next alignment
2115 relocation. */
2116 next_alignment = internal_relocs;
2117 /* This will be the previous alignment, although at first it points
2118 to the first real relocation. */
2119 prev_alignment = internal_relocs;
2120
2121 /* We calculate worst case shrinkage caused by alignment directives.
2122 No fool-proof, but better than either ignoring the problem or
2123 doing heavy duty analysis of all the alignment markers in all
2124 input sections. */
2125 section_alignment_glue = 0;
2126 for (irel = internal_relocs; irel < irelend; irel++)
2127 if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
2128 && irel->r_addend & RX_RELAXA_ALIGN)
2129 {
2130 int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2131
2132 if (section_alignment_glue < this_glue)
2133 section_alignment_glue = this_glue;
2134 }
2135 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2136 shrinkage. */
2137 section_alignment_glue *= 2;
2138
2139 for (irel = internal_relocs; irel < irelend; irel++)
2140 {
2141 unsigned char *insn;
2142 int nrelocs;
2143
2144 /* The insns we care about are all marked with one of these. */
2145 if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX)
2146 continue;
2147
2148 if (irel->r_addend & RX_RELAXA_ALIGN
2149 || next_alignment == internal_relocs)
2150 {
2151 /* When we delete bytes, we need to maintain all the alignments
2152 indicated. In addition, we need to be careful about relaxing
2153 jumps across alignment boundaries - these displacements
2154 *grow* when we delete bytes. For now, don't shrink
2155 displacements across an alignment boundary, just in case.
2156 Note that this only affects relocations to the same
2157 section. */
2158 prev_alignment = next_alignment;
2159 next_alignment += 2;
2160 while (next_alignment < irelend
2161 && (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX
2162 || !(next_alignment->r_addend & RX_RELAXA_ELIGN)))
2163 next_alignment ++;
2164 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2165 next_alignment = NULL;
2166 }
2167
2168 /* When we hit alignment markers, see if we've shrunk enough
2169 before them to reduce the gap without violating the alignment
2170 requirements. */
2171 if (irel->r_addend & RX_RELAXA_ALIGN)
2172 {
2173 /* At this point, the next relocation *should* be the ELIGN
2174 end marker. */
2175 Elf_Internal_Rela *erel = irel + 1;
2176 unsigned int alignment, nbytes;
2177
2178 if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX)
2179 continue;
2180 if (!(erel->r_addend & RX_RELAXA_ELIGN))
2181 continue;
2182
2183 alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2184
2185 if (erel->r_offset - irel->r_offset < alignment)
2186 continue;
2187
2188 nbytes = erel->r_offset - irel->r_offset;
2189 nbytes /= alignment;
2190 nbytes *= alignment;
2191
2192 elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
5ee4a06a 2193 erel->r_offset == sec->size, internal_relocs);
0a1b45a2 2194 *again = true;
c7927a3c
NC		 2195
2196 continue;
2197 }
2198
2199 if (irel->r_addend & RX_RELAXA_ELIGN)
2200 continue;
2201
2202 insn = contents + irel->r_offset;
2203
2204 nrelocs = irel->r_addend & RX_RELAXA_RNUM;
2205
2206 /* At this point, we have an insn that is a candidate for linker
2207 relaxation. There are NRELOCS relocs following that may be
2208 relaxed, although each reloc may be made of more than one
2209 reloc entry (such as gp-rel symbols). */
2210
2211 /* Get the value of the symbol referred to by the reloc. Just
07d6d2b8
AM		 2212 in case this is the last reloc in the list, use the RL's
2213 addend to choose between this reloc (no addend) or the next
2214 (yes addend, which means at least one following reloc). */
c7927a3c
NC		 2215
2216 /* srel points to the "current" reloction for this insn -
2217 actually the last reloc for a given operand, which is the one
2218 we need to update. We check the relaxations in the same
2219 order that the relocations happen, so we'll just push it
2220 along as we go. */
2221 srel = irel;
2222
2223 pc = sec->output_section->vma + sec->output_offset
2224 + srel->r_offset;
2225
2226#define GET_RELOC \
2227 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2228 pcrel = symval - pc + srel->r_addend; \
2229 nrelocs --;
2230
2231#define SNIPNR(offset, nbytes) \
5ee4a06a 2232 elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0, internal_relocs);
c7927a3c 2233#define SNIP(offset, nbytes, newtype) \
07d6d2b8 2234 SNIPNR (offset, nbytes); \
c7927a3c
NC		 2235 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2236
2237 /* The order of these bit tests must match the order that the
2238 relocs appear in. Since we sorted those by offset, we can
2239 predict them. */
2240
2241 /* Note that the numbers in, say, DSP6 are the bit offsets of
2242 the code fields that describe the operand. Bits number 0 for
2243 the MSB of insn[0]. */
2244
2245 /* DSP* codes:
2246 0 00 [reg]
2247 1 01 dsp:8[reg]
2248 2 10 dsp:16[reg]
2249 3 11 reg */
2250 if (irel->r_addend & RX_RELAXA_DSP6)
2251 {
2252 GET_RELOC;
2253
2254 code = insn[0] & 3;
2255 if (code == 2 && symval/scale <= 255)
2256 {
2257 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2258 insn[0] &= 0xfc;
2259 insn[0] |= 0x01;
2260 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2261 if (newrel != ELF32_R_TYPE (srel->r_info))
2262 {
2263 SNIP (3, 1, newrel);
0a1b45a2 2264 *again = true;
c7927a3c
NC		 2265 }
2266 }
2267
2268 else if (code == 1 && symval == 0)
2269 {
2270 insn[0] &= 0xfc;
2271 SNIP (2, 1, R_RX_NONE);
0a1b45a2 2272 *again = true;
c7927a3c
NC		 2273 }
2274
2275 /* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */
2276 else if (code == 1 && symval/scale <= 31
2277 /* Decodable bits. */
2278 && (insn[0] & 0xcc) == 0xcc
91d6fa6a 2279 /* Width. */
eb8c5f3f 2280 && (insn[0] & 0x30) != 0x30
91d6fa6a 2281 /* Register MSBs. */
c7927a3c
NC		 2282 && (insn[1] & 0x88) == 0x00)
2283 {
2284 int newrel = 0;
2285
2286 insn[0] = 0x88 | (insn[0] & 0x30);
2287 /* The register fields are in the right place already. */
2288
2289 /* We can't relax this new opcode. */
2290 irel->r_addend = 0;
2291
2292 switch ((insn[0] & 0x30) >> 4)
2293 {
2294 case 0:
2295 newrel = R_RX_RH_ABS5p5B;
2296 break;
2297 case 1:
2298 newrel = R_RX_RH_ABS5p5W;
2299 break;
2300 case 2:
2301 newrel = R_RX_RH_ABS5p5L;
2302 break;
2303 }
2304
2305 move_reloc (irel, srel, -2);
2306 SNIP (2, 1, newrel);
2307 }
2308
2309 /* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */
2310 else if (code == 1 && symval/scale <= 31
2311 /* Decodable bits. */
2312 && (insn[0] & 0xf8) == 0x58
2313 /* Register MSBs. */
2314 && (insn[1] & 0x88) == 0x00)
2315 {
2316 int newrel = 0;
2317
2318 insn[0] = 0xb0 | ((insn[0] & 0x04) << 1);
2319 /* The register fields are in the right place already. */
2320
2321 /* We can't relax this new opcode. */
2322 irel->r_addend = 0;
2323
2324 switch ((insn[0] & 0x08) >> 3)
2325 {
2326 case 0:
2327 newrel = R_RX_RH_ABS5p5B;
2328 break;
2329 case 1:
2330 newrel = R_RX_RH_ABS5p5W;
2331 break;
2332 }
2333
2334 move_reloc (irel, srel, -2);
2335 SNIP (2, 1, newrel);
2336 }
2337 }
2338
2339 /* A DSP4 operand always follows a DSP6 operand, even if there's
2340 no relocation for it. We have to read the code out of the
2341 opcode to calculate the offset of the operand. */
2342 if (irel->r_addend & RX_RELAXA_DSP4)
2343 {
2344 int code6, offset = 0;
2345
2346 GET_RELOC;
2347
2348 code6 = insn[0] & 0x03;
2349 switch (code6)
2350 {
2351 case 0: offset = 2; break;
2352 case 1: offset = 3; break;
2353 case 2: offset = 4; break;
2354 case 3: offset = 2; break;
2355 }
2356
2357 code = (insn[0] & 0x0c) >> 2;
2358
2359 if (code == 2 && symval / scale <= 255)
2360 {
2361 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2362
2363 insn[0] &= 0xf3;
2364 insn[0] |= 0x04;
2365 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2366 if (newrel != ELF32_R_TYPE (srel->r_info))
2367 {
2368 SNIP (offset+1, 1, newrel);
0a1b45a2 2369 *again = true;
c7927a3c
NC		 2370 }
2371 }
2372
2373 else if (code == 1 && symval == 0)
2374 {
2375 insn[0] &= 0xf3;
2376 SNIP (offset, 1, R_RX_NONE);
0a1b45a2 2377 *again = true;
c7927a3c
NC		 2378 }
2379 /* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */
2380 else if (code == 1 && symval/scale <= 31
2381 /* Decodable bits. */
2382 && (insn[0] & 0xc3) == 0xc3
2383 /* Width. */
eb8c5f3f 2384 && (insn[0] & 0x30) != 0x30
c7927a3c
NC		 2385 /* Register MSBs. */
2386 && (insn[1] & 0x88) == 0x00)
2387 {
2388 int newrel = 0;
2389
2390 insn[0] = 0x80 | (insn[0] & 0x30);
2391 /* The register fields are in the right place already. */
2392
2393 /* We can't relax this new opcode. */
2394 irel->r_addend = 0;
2395
2396 switch ((insn[0] & 0x30) >> 4)
2397 {
2398 case 0:
2399 newrel = R_RX_RH_ABS5p5B;
2400 break;
2401 case 1:
2402 newrel = R_RX_RH_ABS5p5W;
2403 break;
2404 case 2:
2405 newrel = R_RX_RH_ABS5p5L;
2406 break;
2407 }
2408
2409 move_reloc (irel, srel, -2);
2410 SNIP (2, 1, newrel);
2411 }
2412 }
2413
2414 /* These always occur alone, but the offset depends on whether
2415 it's a MEMEX opcode (0x06) or not. */
2416 if (irel->r_addend & RX_RELAXA_DSP14)
2417 {
2418 int offset;
2419 GET_RELOC;
2420
2421 if (insn[0] == 0x06)
2422 offset = 3;
2423 else
2424 offset = 4;
2425
2426 code = insn[1] & 3;
2427
2428 if (code == 2 && symval / scale <= 255)
2429 {
2430 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2431
2432 insn[1] &= 0xfc;
2433 insn[1] |= 0x01;
2434 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2435 if (newrel != ELF32_R_TYPE (srel->r_info))
2436 {
2437 SNIP (offset, 1, newrel);
0a1b45a2 2438 *again = true;
c7927a3c
NC		 2439 }
2440 }
2441 else if (code == 1 && symval == 0)
2442 {
2443 insn[1] &= 0xfc;
2444 SNIP (offset, 1, R_RX_NONE);
0a1b45a2 2445 *again = true;
c7927a3c
NC		 2446 }
2447 }
2448
2449 /* IMM* codes:
2450 0 00 imm:32
2451 1 01 simm:8
2452 2 10 simm:16
2453 3 11 simm:24. */
2454
2455 /* These always occur alone. */
2456 if (irel->r_addend & RX_RELAXA_IMM6)
2457 {
2458 long ssymval;
2459
2460 GET_RELOC;
2461
2462 /* These relocations sign-extend, so we must do signed compares. */
2463 ssymval = (long) symval;
2464
2465 code = insn[0] & 0x03;
2466
2467 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2468 {
2469 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2470
2471 insn[0] &= 0xfc;
2472 insn[0] |= 0x03;
2473 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2474 if (newrel != ELF32_R_TYPE (srel->r_info))
2475 {
2476 SNIP (2, 1, newrel);
0a1b45a2 2477 *again = true;
c7927a3c
NC		 2478 }
2479 }
2480
2481 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2482 {
2483 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2484
2485 insn[0] &= 0xfc;
2486 insn[0] |= 0x02;
2487 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2488 if (newrel != ELF32_R_TYPE (srel->r_info))
2489 {
2490 SNIP (2, 1, newrel);
0a1b45a2 2491 *again = true;
c7927a3c
NC		 2492 }
2493 }
2494
2495 /* Special case UIMM8 format: CMP #uimm8,Rdst. */
2496 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2497 /* Decodable bits. */
2498 && (insn[0] & 0xfc) == 0x74
2499 /* Decodable bits. */
2500 && ((insn[1] & 0xf0) == 0x00))
2501 {
2502 int newrel;
2503
2504 insn[0] = 0x75;
2505 insn[1] = 0x50 | (insn[1] & 0x0f);
2506
2507 /* We can't relax this new opcode. */
2508 irel->r_addend = 0;
2509
2510 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2511 newrel = R_RX_ABS8U;
2512 else
2513 newrel = R_RX_DIR8U;
2514
2515 SNIP (2, 1, newrel);
0a1b45a2 2516 *again = true;
c7927a3c
NC		 2517 }
2518
2519 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2520 {
2521 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2522
2523 insn[0] &= 0xfc;
2524 insn[0] |= 0x01;
2525 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2526 if (newrel != ELF32_R_TYPE (srel->r_info))
2527 {
2528 SNIP (2, 1, newrel);
0a1b45a2 2529 *again = true;
c7927a3c
NC		 2530 }
2531 }
2532
2533 /* Special case UIMM4 format: CMP, MUL, AND, OR. */
2534 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2535 /* Decodable bits and immediate type. */
2536 && insn[0] == 0x75
2537 /* Decodable bits. */
2538 && (insn[1] & 0xc0) == 0x00)
2539 {
2540 static const int newop[4] = { 1, 3, 4, 5 };
2541
2542 insn[0] = 0x60 | newop[insn[1] >> 4];
2543 /* The register number doesn't move. */
2544
2545 /* We can't relax this new opcode. */
2546 irel->r_addend = 0;
2547
2548 move_reloc (irel, srel, -1);
2549
2550 SNIP (2, 1, R_RX_RH_UIMM4p8);
0a1b45a2 2551 *again = true;
c7927a3c
NC		 2552 }
2553
2554 /* Special case UIMM4 format: ADD -> ADD/SUB. */
2555 else if (code == 1 && ssymval <= 15 && ssymval >= -15
2556 /* Decodable bits and immediate type. */
2557 && insn[0] == 0x71
2558 /* Same register for source and destination. */
2559 && ((insn[1] >> 4) == (insn[1] & 0x0f)))
2560 {
2561 int newrel;
2562
2563 /* Note that we can't turn "add $0,Rs" into a NOP
2564 because the flags need to be set right. */
2565
2566 if (ssymval < 0)
2567 {
2568 insn[0] = 0x60; /* Subtract. */
2569 newrel = R_RX_RH_UNEG4p8;
2570 }
2571 else
2572 {
2573 insn[0] = 0x62; /* Add. */
2574 newrel = R_RX_RH_UIMM4p8;
2575 }
2576
2577 /* The register number is in the right place. */
2578
2579 /* We can't relax this new opcode. */
2580 irel->r_addend = 0;
2581
2582 move_reloc (irel, srel, -1);
2583
2584 SNIP (2, 1, newrel);
0a1b45a2 2585 *again = true;
c7927a3c
NC		 2586 }
2587 }
2588
2589 /* These are either matched with a DSP6 (2-byte base) or an id24
2590 (3-byte base). */
2591 if (irel->r_addend & RX_RELAXA_IMM12)
2592 {
2593 int dspcode, offset = 0;
2594 long ssymval;
2595
2596 GET_RELOC;
2597
2598 if ((insn[0] & 0xfc) == 0xfc)
2599 dspcode = 1; /* Just something with one byte operand. */
2600 else
2601 dspcode = insn[0] & 3;
2602 switch (dspcode)
2603 {
2604 case 0: offset = 2; break;
2605 case 1: offset = 3; break;
2606 case 2: offset = 4; break;
2607 case 3: offset = 2; break;
2608 }
2609
2610 /* These relocations sign-extend, so we must do signed compares. */
2611 ssymval = (long) symval;
2612
2613 code = (insn[1] >> 2) & 3;
2614 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2615 {
2616 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2617
2618 insn[1] &= 0xf3;
2619 insn[1] |= 0x0c;
2620 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2621 if (newrel != ELF32_R_TYPE (srel->r_info))
2622 {
2623 SNIP (offset, 1, newrel);
0a1b45a2 2624 *again = true;
c7927a3c
NC		 2625 }
2626 }
2627
2628 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2629 {
2630 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2631
2632 insn[1] &= 0xf3;
2633 insn[1] |= 0x08;
2634 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2635 if (newrel != ELF32_R_TYPE (srel->r_info))
2636 {
2637 SNIP (offset, 1, newrel);
0a1b45a2 2638 *again = true;
c7927a3c
NC		 2639 }
2640 }
2641
2642 /* Special case UIMM8 format: MOV #uimm8,Rdst. */
2643 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2644 /* Decodable bits. */
2645 && insn[0] == 0xfb
2646 /* Decodable bits. */
2647 && ((insn[1] & 0x03) == 0x02))
2648 {
2649 int newrel;
2650
2651 insn[0] = 0x75;
2652 insn[1] = 0x40 | (insn[1] >> 4);
2653
2654 /* We can't relax this new opcode. */
2655 irel->r_addend = 0;
2656
2657 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2658 newrel = R_RX_ABS8U;
2659 else
2660 newrel = R_RX_DIR8U;
2661
2662 SNIP (2, 1, newrel);
0a1b45a2 2663 *again = true;
c7927a3c
NC		 2664 }
2665
2666 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2667 {
2668 unsigned int newrel = ELF32_R_TYPE(srel->r_info);
2669
2670 insn[1] &= 0xf3;
2671 insn[1] |= 0x04;
2672 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2673 if (newrel != ELF32_R_TYPE(srel->r_info))
2674 {
2675 SNIP (offset, 1, newrel);
0a1b45a2 2676 *again = true;
c7927a3c
NC		 2677 }
2678 }
2679
2680 /* Special case UIMM4 format: MOV #uimm4,Rdst. */
2681 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2682 /* Decodable bits. */
2683 && insn[0] == 0xfb
2684 /* Decodable bits. */
2685 && ((insn[1] & 0x03) == 0x02))
2686 {
2687 insn[0] = 0x66;
2688 insn[1] = insn[1] >> 4;
2689
2690 /* We can't relax this new opcode. */
2691 irel->r_addend = 0;
2692
2693 move_reloc (irel, srel, -1);
2694
2695 SNIP (2, 1, R_RX_RH_UIMM4p8);
0a1b45a2 2696 *again = true;
c7927a3c
NC		 2697 }
2698 }
2699
2700 if (irel->r_addend & RX_RELAXA_BRA)
2701 {
2702 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2703 int max_pcrel3 = 4;
2704 int alignment_glue = 0;
2705
2706 GET_RELOC;
2707
2708 /* Branches over alignment chunks are problematic, as
2709 deleting bytes here makes the branch *further* away. We
2710 can be agressive with branches within this alignment
2711 block, but not branches outside it. */
2712 if ((prev_alignment == NULL
2713 || symval < (bfd_vma)(sec_start + prev_alignment->r_offset))
2714 && (next_alignment == NULL
2715 || symval > (bfd_vma)(sec_start + next_alignment->r_offset)))
2716 alignment_glue = section_alignment_glue;
2717
2718 if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX
2719 && srel[1].r_addend & RX_RELAXA_BRA
2720 && srel[1].r_offset < irel->r_offset + pcrel)
2721 max_pcrel3 ++;
2722
2723 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2724
2725 /* The values we compare PCREL with are not what you'd
2726 expect; they're off by a little to compensate for (1)
2727 where the reloc is relative to the insn, and (2) how much
2728 the insn is going to change when we relax it. */
2729
2730 /* These we have to decode. */
2731 switch (insn[0])
2732 {
2733 case 0x04: /* BRA pcdsp:24 */
2734 if (-32768 + alignment_glue <= pcrel
2735 && pcrel <= 32765 - alignment_glue)
2736 {
2737 insn[0] = 0x38;
2738 SNIP (3, 1, newrel);
0a1b45a2 2739 *again = true;
c7927a3c
NC		 2740 }
2741 break;
2742
2743 case 0x38: /* BRA pcdsp:16 */
2744 if (-128 + alignment_glue <= pcrel
2745 && pcrel <= 127 - alignment_glue)
2746 {
2747 insn[0] = 0x2e;
2748 SNIP (2, 1, newrel);
0a1b45a2 2749 *again = true;
c7927a3c
NC		 2750 }
2751 break;
2752
2753 case 0x2e: /* BRA pcdsp:8 */
2754 /* Note that there's a risk here of shortening things so
2755 much that we no longer fit this reloc; it *should*
2756 only happen when you branch across a branch, and that
2757 branch also devolves into BRA.S. "Real" code should
2758 be OK. */
2759 if (max_pcrel3 + alignment_glue <= pcrel
2760 && pcrel <= 10 - alignment_glue
2761 && allow_pcrel3)
2762 {
2763 insn[0] = 0x08;
2764 SNIP (1, 1, newrel);
2765 move_reloc (irel, srel, -1);
0a1b45a2 2766 *again = true;
c7927a3c
NC		 2767 }
2768 break;
2769
2770 case 0x05: /* BSR pcdsp:24 */
2771 if (-32768 + alignment_glue <= pcrel
2772 && pcrel <= 32765 - alignment_glue)
2773 {
2774 insn[0] = 0x39;
2775 SNIP (1, 1, newrel);
0a1b45a2 2776 *again = true;
c7927a3c
NC		 2777 }
2778 break;
2779
2780 case 0x3a: /* BEQ.W pcdsp:16 */
2781 case 0x3b: /* BNE.W pcdsp:16 */
2782 if (-128 + alignment_glue <= pcrel
2783 && pcrel <= 127 - alignment_glue)
2784 {
2785 insn[0] = 0x20 | (insn[0] & 1);
2786 SNIP (1, 1, newrel);
0a1b45a2 2787 *again = true;
c7927a3c
NC		 2788 }
2789 break;
2790
2791 case 0x20: /* BEQ.B pcdsp:8 */
2792 case 0x21: /* BNE.B pcdsp:8 */
2793 if (max_pcrel3 + alignment_glue <= pcrel
2794 && pcrel - alignment_glue <= 10
2795 && allow_pcrel3)
2796 {
2797 insn[0] = 0x10 | ((insn[0] & 1) << 3);
2798 SNIP (1, 1, newrel);
2799 move_reloc (irel, srel, -1);
0a1b45a2 2800 *again = true;
c7927a3c
NC		 2801 }
2802 break;
2803
2804 case 0x16: /* synthetic BNE dsp24 */
2805 case 0x1e: /* synthetic BEQ dsp24 */
2806 if (-32767 + alignment_glue <= pcrel
2807 && pcrel <= 32766 - alignment_glue
2808 && insn[1] == 0x04)
2809 {
2810 if (insn[0] == 0x16)
2811 insn[0] = 0x3b;
2812 else
2813 insn[0] = 0x3a;
2814 /* We snip out the bytes at the end else the reloc
2815 will get moved too, and too much. */
2816 SNIP (3, 2, newrel);
2817 move_reloc (irel, srel, -1);
0a1b45a2 2818 *again = true;
c7927a3c
NC		 2819 }
2820 break;
2821 }
2822
2823 /* Special case - synthetic conditional branches, pcrel24.
2824 Note that EQ and NE have been handled above. */
2825 if ((insn[0] & 0xf0) == 0x20
2826 && insn[1] == 0x06
2827 && insn[2] == 0x04
2828 && srel->r_offset != irel->r_offset + 1
2829 && -32767 + alignment_glue <= pcrel
2830 && pcrel <= 32766 - alignment_glue)
2831 {
2832 insn[1] = 0x05;
2833 insn[2] = 0x38;
2834 SNIP (5, 1, newrel);
0a1b45a2 2835 *again = true;
c7927a3c
NC		 2836 }
2837
2838 /* Special case - synthetic conditional branches, pcrel16 */
2839 if ((insn[0] & 0xf0) == 0x20
2840 && insn[1] == 0x05
2841 && insn[2] == 0x38
2842 && srel->r_offset != irel->r_offset + 1
2843 && -127 + alignment_glue <= pcrel
2844 && pcrel <= 126 - alignment_glue)
2845 {
2846 int cond = (insn[0] & 0x0f) ^ 0x01;
2847
2848 insn[0] = 0x20 | cond;
2849 /* By moving the reloc first, we avoid having
2850 delete_bytes move it also. */
2851 move_reloc (irel, srel, -2);
2852 SNIP (2, 3, newrel);
0a1b45a2 2853 *again = true;
c7927a3c
NC		 2854 }
2855 }
2856
2857 BFD_ASSERT (nrelocs == 0);
2858
2859 /* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can
2860 use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky
2861 because it may have one or two relocations. */
2862 if ((insn[0] & 0xfc) == 0xf8
2863 && (insn[1] & 0x80) == 0x00
2864 && (insn[0] & 0x03) != 0x03)
2865 {
2866 int dcode, icode, reg, ioff, dscale, ilen;
2867 bfd_vma disp_val = 0;
2868 long imm_val = 0;
2869 Elf_Internal_Rela * disp_rel = 0;
2870 Elf_Internal_Rela * imm_rel = 0;
2871
2872 /* Reset this. */
2873 srel = irel;
2874
2875 dcode = insn[0] & 0x03;
2876 icode = (insn[1] >> 2) & 0x03;
2877 reg = (insn[1] >> 4) & 0x0f;
2878
2879 ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2;
2880
2881 /* Figure out what the dispacement is. */
2882 if (dcode == 1 || dcode == 2)
2883 {
2884 /* There's a displacement. See if there's a reloc for it. */
2885 if (srel[1].r_offset == irel->r_offset + 2)
2886 {
2887 GET_RELOC;
2888 disp_val = symval;
2889 disp_rel = srel;
2890 }
2891 else
2892 {
2893 if (dcode == 1)
2894 disp_val = insn[2];
2895 else
2896 {
2897#if RX_OPCODE_BIG_ENDIAN
2898 disp_val = insn[2] * 256 + insn[3];
2899#else
2900 disp_val = insn[2] + insn[3] * 256;
2901#endif
2902 }
2903 switch (insn[1] & 3)
2904 {
2905 case 1:
2906 disp_val *= 2;
2907 scale = 2;
2908 break;
2909 case 2:
2910 disp_val *= 4;
2911 scale = 4;
2912 break;
2913 }
2914 }
2915 }
2916
2917 dscale = scale;
2918
2919 /* Figure out what the immediate is. */
2920 if (srel[1].r_offset == irel->r_offset + ioff)
2921 {
2922 GET_RELOC;
2923 imm_val = (long) symval;
2924 imm_rel = srel;
2925 }
2926 else
2927 {
2928 unsigned char * ip = insn + ioff;
2929
2930 switch (icode)
2931 {
2932 case 1:
2933 /* For byte writes, we don't sign extend. Makes the math easier later. */
2934 if (scale == 1)
2935 imm_val = ip[0];
2936 else
2937 imm_val = (char) ip[0];
2938 break;
2939 case 2:
2940#if RX_OPCODE_BIG_ENDIAN
2941 imm_val = ((char) ip[0] << 8) | ip[1];
2942#else
2943 imm_val = ((char) ip[1] << 8) | ip[0];
2944#endif
2945 break;
2946 case 3:
2947#if RX_OPCODE_BIG_ENDIAN
2948 imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2];
2949#else
2950 imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0];
2951#endif
2952 break;
2953 case 0:
2954#if RX_OPCODE_BIG_ENDIAN
13c9c485 2955 imm_val = ((unsigned) ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3];
c7927a3c 2956#else
13c9c485 2957 imm_val = ((unsigned) ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0];
c7927a3c
NC		 2958#endif
2959 break;
2960 }
2961 }
2962
2963 ilen = 2;
2964
2965 switch (dcode)
2966 {
2967 case 1:
2968 ilen += 1;
2969 break;
2970 case 2:
2971 ilen += 2;
2972 break;
2973 }
2974
2975 switch (icode)
2976 {
2977 case 1:
2978 ilen += 1;
2979 break;
2980 case 2:
2981 ilen += 2;
2982 break;
2983 case 3:
2984 ilen += 3;
2985 break;
2986 case 4:
2987 ilen += 4;
2988 break;
2989 }
2990
2991 /* The shortcut happens when the immediate is 0..255,
2992 register r0 to r7, and displacement (scaled) 0..31. */
2993
2994 if (0 <= imm_val && imm_val <= 255
2995 && 0 <= reg && reg <= 7
2996 && disp_val / dscale <= 31)
2997 {
2998 insn[0] = 0x3c | (insn[1] & 0x03);
2999 insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f);
3000 insn[2] = imm_val;
3001
3002 if (disp_rel)
3003 {
3004 int newrel = R_RX_NONE;
3005
3006 switch (dscale)
3007 {
3008 case 1:
3009 newrel = R_RX_RH_ABS5p8B;
3010 break;
3011 case 2:
3012 newrel = R_RX_RH_ABS5p8W;
3013 break;
3014 case 4:
3015 newrel = R_RX_RH_ABS5p8L;
3016 break;
3017 }
3018 disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel);
3019 move_reloc (irel, disp_rel, -1);
3020 }
3021 if (imm_rel)
3022 {
3023 imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U);
3024 move_reloc (disp_rel ? disp_rel : irel,
3025 imm_rel,
3026 irel->r_offset - imm_rel->r_offset + 2);
3027 }
3028
3029 SNIPNR (3, ilen - 3);
0a1b45a2 3030 *again = true;
c7927a3c
NC		 3031
3032 /* We can't relax this new opcode. */
3033 irel->r_addend = 0;
3034 }
3035 }
3036 }
3037
3038 /* We can't reliably relax branches to DIR3U_PCREL unless we know
3039 whatever they're branching over won't shrink any more. If we're
3040 basically done here, do one more pass just for branches - but
3041 don't request a pass after that one! */
3042 if (!*again && !allow_pcrel3)
3043 {
0a1b45a2 3044 bool ignored;
c7927a3c 3045
0a1b45a2 3046 elf32_rx_relax_section (abfd, sec, link_info, &ignored, true);
c7927a3c
NC		 3047 }
3048
0a1b45a2 3049 return true;
c7927a3c
NC		 3050
3051 error_return:
c9594989 3052 free (free_contents);
c7927a3c
NC		 3053
3054 if (shndx_buf != NULL)
3055 {
3056 shndx_hdr->contents = NULL;
3057 free (shndx_buf);
3058 }
3059
c9594989 3060 free (free_intsyms);
c7927a3c 3061
0a1b45a2 3062 return false;
c7927a3c
NC		 3063}
3064
0a1b45a2
AM		 3065static bool
3066elf32_rx_relax_section_wrapper (bfd *abfd,
3067 asection *sec,
3068 struct bfd_link_info *link_info,
3069 bool *again)
c7927a3c 3070{
0a1b45a2 3071 return elf32_rx_relax_section (abfd, sec, link_info, again, false);
c7927a3c
NC		 3072}
3073\f
3074/* Function to set the ELF flag bits. */
3075
0a1b45a2 3076static bool
c7927a3c
NC		 3077rx_elf_set_private_flags (bfd * abfd, flagword flags)
3078{
3079 elf_elfheader (abfd)->e_flags = flags;
0a1b45a2
AM		 3080 elf_flags_init (abfd) = true;
3081 return true;
c7927a3c
NC		 3082}
3083
0a1b45a2
AM		 3084static bool no_warn_mismatch = false;
3085static bool ignore_lma = true;
c7927a3c 3086
0a1b45a2 3087void bfd_elf32_rx_set_target_flags (bool, bool);
c7927a3c
NC		 3088
3089void
0a1b45a2
AM		 3090bfd_elf32_rx_set_target_flags (bool user_no_warn_mismatch,
3091 bool user_ignore_lma)
c7927a3c
NC		 3092{
3093 no_warn_mismatch = user_no_warn_mismatch;
84bff83f 3094 ignore_lma = user_ignore_lma;
c7927a3c
NC		 3095}
3096
708e2187
NC		 3097/* Converts FLAGS into a descriptive string.
3098 Returns a static pointer. */
3099
3100static const char *
7fbd5f4e 3101describe_flags (flagword flags, char *buf)
708e2187 3102{
708e2187
NC		 3103 buf[0] = 0;
3104
3105 if (flags & E_FLAG_RX_64BIT_DOUBLES)
3106 strcat (buf, "64-bit doubles");
3107 else
3108 strcat (buf, "32-bit doubles");
3109
3110 if (flags & E_FLAG_RX_DSP)
3111 strcat (buf, ", dsp");
3112 else
3113 strcat (buf, ", no dsp");
3114
3115 if (flags & E_FLAG_RX_PID)
3116 strcat (buf, ", pid");
3117 else
3118 strcat (buf, ", no pid");
3119
3120 if (flags & E_FLAG_RX_ABI)
3121 strcat (buf, ", RX ABI");
3122 else
3123 strcat (buf, ", GCC ABI");
3124
3525236c
NC		 3125 if (flags & E_FLAG_RX_SINSNS_SET)
3126 strcat (buf, flags & E_FLAG_RX_SINSNS_YES ? ", uses String instructions" : ", bans String instructions");
3127
708e2187
NC		 3128 return buf;
3129}
3130
c7927a3c
NC		 3131/* Merge backend specific data from an object file to the output
3132 object file when linking. */
3133
0a1b45a2 3134static bool
50e03d47 3135rx_elf_merge_private_bfd_data (bfd * ibfd, struct bfd_link_info *info)
c7927a3c 3136{
50e03d47 3137 bfd *obfd = info->output_bfd;
c7927a3c
NC		 3138 flagword old_flags;
3139 flagword new_flags;
0a1b45a2 3140 bool error = false;
c7927a3c
NC		 3141
3142 new_flags = elf_elfheader (ibfd)->e_flags;
3143 old_flags = elf_elfheader (obfd)->e_flags;
3144
3145 if (!elf_flags_init (obfd))
3146 {
3147 /* First call, no flags set. */
0a1b45a2 3148 elf_flags_init (obfd) = true;
c7927a3c
NC		 3149 elf_elfheader (obfd)->e_flags = new_flags;
3150 }
3151 else if (old_flags != new_flags)
3152 {
708e2187
NC		 3153 flagword known_flags;
3154
3525236c
NC		 3155 if (old_flags & E_FLAG_RX_SINSNS_SET)
3156 {
3157 if ((new_flags & E_FLAG_RX_SINSNS_SET) == 0)
3158 {
3159 new_flags &= ~ E_FLAG_RX_SINSNS_MASK;
3160 new_flags |= (old_flags & E_FLAG_RX_SINSNS_MASK);
3161 }
3162 }
3163 else if (new_flags & E_FLAG_RX_SINSNS_SET)
3164 {
3165 old_flags &= ~ E_FLAG_RX_SINSNS_MASK;
3166 old_flags |= (new_flags & E_FLAG_RX_SINSNS_MASK);
3167 }
3168
708e2187 3169 known_flags = E_FLAG_RX_ABI | E_FLAG_RX_64BIT_DOUBLES
3525236c 3170 | E_FLAG_RX_DSP | E_FLAG_RX_PID | E_FLAG_RX_SINSNS_MASK;
c7927a3c
NC		 3171
3172 if ((old_flags ^ new_flags) & known_flags)
3173 {
3174 /* Only complain if flag bits we care about do not match.
3175 Other bits may be set, since older binaries did use some
3176 deprecated flags. */
3177 if (no_warn_mismatch)
3178 {
3179 elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags;
3180 }
3181 else
3182 {
7fbd5f4e
AM		 3183 char buf[128];
3184
38f14ab8 3185 _bfd_error_handler (_("there is a conflict merging the"
871b3ab2 3186 " ELF header flags from %pB"),
dae82561 3187 ibfd);
695344c0 3188 _bfd_error_handler (_(" the input file's flags: %s"),
7fbd5f4e 3189 describe_flags (new_flags, buf));
695344c0 3190 _bfd_error_handler (_(" the output file's flags: %s"),
7fbd5f4e 3191 describe_flags (old_flags, buf));
0a1b45a2 3192 error = true;
c7927a3c
NC		 3193 }
3194 }
3195 else
3196 elf_elfheader (obfd)->e_flags = new_flags & known_flags;
3197 }
3198
3199 if (error)
3200 bfd_set_error (bfd_error_bad_value);
3201
3202 return !error;
3203}
3204\f
0a1b45a2 3205static bool
c7927a3c
NC		 3206rx_elf_print_private_bfd_data (bfd * abfd, void * ptr)
3207{
3208 FILE * file = (FILE *) ptr;
3209 flagword flags;
7fbd5f4e 3210 char buf[128];
c7927a3c
NC		 3211
3212 BFD_ASSERT (abfd != NULL && ptr != NULL);
3213
3214 /* Print normal ELF private data. */
3215 _bfd_elf_print_private_bfd_data (abfd, ptr);
3216
3217 flags = elf_elfheader (abfd)->e_flags;
3218 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
3219
7fbd5f4e 3220 fprintf (file, "%s", describe_flags (flags, buf));
0a1b45a2 3221 return true;
c7927a3c
NC		 3222}
3223
3224/* Return the MACH for an e_flags value. */
3225
3226static int
708e2187 3227elf32_rx_machine (bfd * abfd ATTRIBUTE_UNUSED)
c7927a3c 3228{
708e2187
NC		 3229#if 0 /* FIXME: EF_RX_CPU_MASK collides with E_FLAG_RX_...
3230 Need to sort out how these flag bits are used.
07d6d2b8 3231 For now we assume that the flags are OK. */
c7927a3c 3232 if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX)
708e2187 3233#endif
c8c89dac
YS		 3234 if ((elf_elfheader (abfd)->e_flags & E_FLAG_RX_V2))
3235 return bfd_mach_rx_v2;
3236 else if ((elf_elfheader (abfd)->e_flags & E_FLAG_RX_V3))
3237 return bfd_mach_rx_v3;
3238 else
3239 return bfd_mach_rx;
c7927a3c
NC		 3240
3241 return 0;
3242}
3243
0a1b45a2 3244static bool
c7927a3c
NC		 3245rx_elf_object_p (bfd * abfd)
3246{
1ce74905
DD		 3247 int i;
3248 unsigned int u;
3249 Elf_Internal_Phdr *phdr = elf_tdata (abfd)->phdr;
63920300
AM		 3250 Elf_Internal_Ehdr *ehdr = elf_elfheader (abfd);
3251 int nphdrs = ehdr->e_phnum;
1ce74905 3252 sec_ptr bsec;
0a1b45a2 3253 static int saw_be = false;
63920300 3254 bfd_vma end_phdroff;
1ce74905 3255
4c422395
DD		 3256 /* We never want to automatically choose the non-swapping big-endian
3257 target. The user can only get that explicitly, such as with -I
3258 and objcopy. */
6d00b590 3259 if (abfd->xvec == &rx_elf32_be_ns_vec
4c422395 3260 && abfd->target_defaulted)
0a1b45a2 3261 return false;
4c422395 3262
fc87b9e8
DD		 3263 /* BFD->target_defaulted is not set to TRUE when a target is chosen
3264 as a fallback, so we check for "scanning" to know when to stop
3265 using the non-swapping target. */
6d00b590 3266 if (abfd->xvec == &rx_elf32_be_ns_vec
fc87b9e8 3267 && saw_be)
0a1b45a2 3268 return false;
6d00b590 3269 if (abfd->xvec == &rx_elf32_be_vec)
0a1b45a2 3270 saw_be = true;
fc87b9e8 3271
c7927a3c
NC		 3272 bfd_default_set_arch_mach (abfd, bfd_arch_rx,
3273 elf32_rx_machine (abfd));
1ce74905
DD		 3274
3275 /* For each PHDR in the object, we must find some section that
3276 corresponds (based on matching file offsets) and use its VMA
3277 information to reconstruct the p_vaddr field we clobbered when we
3278 wrote it out. */
63920300
AM		 3279 /* If PT_LOAD headers include the ELF file header or program headers
3280 then the PT_LOAD header does not start with some section contents.
3281 Making adjustments based on the difference between sh_offset and
3282 p_offset is nonsense in such cases. Exclude them. Note that
3283 since standard linker scripts for RX do not use SIZEOF_HEADERS,
3284 the linker won't normally create PT_LOAD segments covering the
3285 headers so this is mainly for passing the ld testsuite.
3286 FIXME. Why are we looking at non-PT_LOAD headers here? */
3287 end_phdroff = ehdr->e_ehsize;
3288 if (ehdr->e_phoff != 0)
3289 end_phdroff = ehdr->e_phoff + nphdrs * ehdr->e_phentsize;
1ce74905
DD		 3290 for (i=0; i<nphdrs; i++)
3291 {
3292 for (u=0; u<elf_tdata(abfd)->num_elf_sections; u++)
3293 {
3294 Elf_Internal_Shdr *sec = elf_tdata(abfd)->elf_sect_ptr[u];
3295
74b1e045 3296 if (phdr[i].p_filesz
63920300 3297 && phdr[i].p_offset >= end_phdroff
74b1e045 3298 && phdr[i].p_offset <= (bfd_vma) sec->sh_offset
7859afc4
DD		 3299 && sec->sh_size > 0
3300 && sec->sh_type != SHT_NOBITS
1ce74905
DD		 3301 && (bfd_vma)sec->sh_offset <= phdr[i].p_offset + (phdr[i].p_filesz - 1))
3302 {
3303 /* Found one! The difference between the two addresses,
3304 plus the difference between the two file offsets, is
3305 enough information to reconstruct the lma. */
3306
3307 /* Example where they aren't:
3308 PHDR[1] = lma fffc0100 offset 00002010 size 00000100
3309 SEC[6] = vma 00000050 offset 00002050 size 00000040
3310
3311 The correct LMA for the section is fffc0140 + (2050-2010).
3312 */
3313
92ff23a1 3314 phdr[i].p_vaddr = sec->sh_addr + (sec->sh_offset - phdr[i].p_offset);
1ce74905
DD		 3315 break;
3316 }
3317 }
3318
3319 /* We must update the bfd sections as well, so we don't stop
3320 with one match. */
3321 bsec = abfd->sections;
3322 while (bsec)
3323 {
74b1e045
DD		 3324 if (phdr[i].p_filesz
3325 && phdr[i].p_vaddr <= bsec->vma
1ce74905
DD		 3326 && bsec->vma <= phdr[i].p_vaddr + (phdr[i].p_filesz - 1))
3327 {
3328 bsec->lma = phdr[i].p_paddr + (bsec->vma - phdr[i].p_vaddr);
3329 }
3330 bsec = bsec->next;
3331 }
3332 }
3333
0a1b45a2 3334 return true;
c7927a3c 3335}
8d3c78e4 3336
0a1b45a2 3337static bool
8d3c78e4
YS		 3338rx_linux_object_p (bfd * abfd)
3339{
4b24dd1a 3340 bfd_default_set_arch_mach (abfd, bfd_arch_rx, elf32_rx_machine (abfd));
0a1b45a2 3341 return true;
8d3c78e4 3342}
c7927a3c
NC		 3343 \f
3344
3345#ifdef DEBUG
3346void
9ccb8af9 3347rx_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
c7927a3c
NC		 3348{
3349 size_t locsymcount;
3350 Elf_Internal_Sym * isymbuf;
3351 Elf_Internal_Sym * isymend;
3352 Elf_Internal_Sym * isym;
3353 Elf_Internal_Shdr * symtab_hdr;
c7927a3c
NC		 3354 char * st_info_str;
3355 char * st_info_stb_str;
3356 char * st_other_str;
3357 char * st_shndx_str;
3358
c7927a3c
NC		 3359 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
3360 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
e0b317de 3361 if (!internal_syms)
c7927a3c
NC		 3362 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
3363 symtab_hdr->sh_info, 0,
3364 internal_syms, external_syms, NULL);
3365 else
3366 isymbuf = internal_syms;
3367 isymend = isymbuf + locsymcount;
3368
3369 for (isym = isymbuf ; isym < isymend ; isym++)
3370 {
3371 switch (ELF_ST_TYPE (isym->st_info))
3372 {
b707aa49
NC		 3373 case STT_FUNC: st_info_str = "STT_FUNC"; break;
3374 case STT_SECTION: st_info_str = "STT_SECTION"; break;
3375 case STT_FILE: st_info_str = "STT_FILE"; break;
3376 case STT_OBJECT: st_info_str = "STT_OBJECT"; break;
3377 case STT_TLS: st_info_str = "STT_TLS"; break;
c7927a3c
NC		 3378 default: st_info_str = "";
3379 }
3380 switch (ELF_ST_BIND (isym->st_info))
3381 {
b707aa49
NC		 3382 case STB_LOCAL: st_info_stb_str = "STB_LOCAL"; break;
3383 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL"; break;
c7927a3c
NC		 3384 default: st_info_stb_str = "";
3385 }
3386 switch (ELF_ST_VISIBILITY (isym->st_other))
3387 {
b707aa49
NC		 3388 case STV_DEFAULT: st_other_str = "STV_DEFAULT"; break;
3389 case STV_INTERNAL: st_other_str = "STV_INTERNAL"; break;
3390 case STV_PROTECTED: st_other_str = "STV_PROTECTED"; break;
c7927a3c
NC		 3391 default: st_other_str = "";
3392 }
3393 switch (isym->st_shndx)
3394 {
b707aa49
NC		 3395 case SHN_ABS: st_shndx_str = "SHN_ABS"; break;
3396 case SHN_COMMON: st_shndx_str = "SHN_COMMON"; break;
3397 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF"; break;
c7927a3c
NC		 3398 default: st_shndx_str = "";
3399 }
3400
3401 printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s "
3402 "st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n",
3403 isym,
3404 (unsigned long) isym->st_value,
3405 (unsigned long) isym->st_size,
3406 isym->st_name,
3407 bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link,
3408 isym->st_name),
3409 isym->st_info, st_info_str, st_info_stb_str,
3410 isym->st_other, st_other_str,
3411 isym->st_shndx, st_shndx_str);
3412 }
c7927a3c
NC		 3413}
3414
3415char *
3416rx_get_reloc (long reloc)
3417{
3418 if (0 <= reloc && reloc < R_RX_max)
3419 return rx_elf_howto_table[reloc].name;
3420 return "";
3421}
3422#endif /* DEBUG */
3423
3424\f
3425/* We must take care to keep the on-disk copy of any code sections
3426 that are fully linked swapped if the target is big endian, to match
3427 the Renesas tools. */
3428
3429/* The rule is: big endian object that are final-link executables,
3430 have code sections stored with 32-bit words swapped relative to
3431 what you'd get by default. */
3432
0a1b45a2 3433static bool
07d6d2b8 3434rx_get_section_contents (bfd * abfd,
c7927a3c 3435 sec_ptr section,
07d6d2b8 3436 void * location,
c7927a3c
NC		 3437 file_ptr offset,
3438 bfd_size_type count)
3439{
3440 int exec = (abfd->flags & EXEC_P) ? 1 : 0;
3441 int s_code = (section->flags & SEC_CODE) ? 1 : 0;
0a1b45a2 3442 bool rv;
c7927a3c
NC		 3443
3444#ifdef DJDEBUG
3445 fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n",
3446 (long) offset, (long) count, section->name,
3447 bfd_big_endian(abfd) ? "be" : "le",
3448 exec, s_code, (long unsigned) section->filepos,
3449 (long unsigned) offset);
3450#endif
3451
3452 if (exec && s_code && bfd_big_endian (abfd))
3453 {
3454 char * cloc = (char *) location;
3455 bfd_size_type cnt, end_cnt;
3456
0a1b45a2 3457 rv = true;
c7927a3c
NC		 3458
3459 /* Fetch and swap unaligned bytes at the beginning. */
3460 if (offset % 4)
07d6d2b8 3461 {
c7927a3c
NC		 3462 char buf[4];
3463
3464 rv = _bfd_generic_get_section_contents (abfd, section, buf,
07d6d2b8 3465 (offset & -4), 4);
c7927a3c 3466 if (!rv)
0a1b45a2 3467 return false;
c7927a3c
NC		 3468
3469 bfd_putb32 (bfd_getl32 (buf), buf);
3470
3471 cnt = 4 - (offset % 4);
3472 if (cnt > count)
3473 cnt = count;
3474
3475 memcpy (location, buf + (offset % 4), cnt);
3476
3477 count -= cnt;
3478 offset += cnt;
3479 cloc += count;
3480 }
3481
3482 end_cnt = count % 4;
3483
3484 /* Fetch and swap the middle bytes. */
3485 if (count >= 4)
3486 {
3487 rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset,
3488 count - end_cnt);
3489 if (!rv)
0a1b45a2 3490 return false;
c7927a3c
NC		 3491
3492 for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4)
3493 bfd_putb32 (bfd_getl32 (cloc), cloc);
3494 }
3495
3496 /* Fetch and swap the end bytes. */
3497 if (end_cnt > 0)
3498 {
3499 char buf[4];
3500
3501 /* Fetch the end bytes. */
3502 rv = _bfd_generic_get_section_contents (abfd, section, buf,
07d6d2b8 3503 offset + count - end_cnt, 4);
c7927a3c 3504 if (!rv)
0a1b45a2 3505 return false;
c7927a3c
NC		 3506
3507 bfd_putb32 (bfd_getl32 (buf), buf);
3508 memcpy (cloc, buf, end_cnt);
3509 }
3510 }
3511 else
3512 rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count);
3513
3514 return rv;
3515}
3516
3517#ifdef DJDEBUG
0a1b45a2 3518static bool
07d6d2b8 3519rx2_set_section_contents (bfd * abfd,
c7927a3c
NC		 3520 sec_ptr section,
3521 const void * location,
3522 file_ptr offset,
3523 bfd_size_type count)
3524{
3525 bfd_size_type i;
3526
3527 fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n",
3528 section->name, (unsigned) section->vma, location, (int) offset, (int) count);
3529 for (i = 0; i < count; i++)
3530 {
3531 if (i % 16 == 0 && i > 0)
3532 fprintf (stderr, "\n");
3533
3534 if (i % 16 && i % 4 == 0)
3535 fprintf (stderr, " ");
3536
3537 if (i % 16 == 0)
3538 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3539
3540 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3541 }
3542 fprintf (stderr, "\n");
3543
3544 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3545}
3546#define _bfd_elf_set_section_contents rx2_set_section_contents
3547#endif
3548
0a1b45a2 3549static bool
07d6d2b8 3550rx_set_section_contents (bfd * abfd,
c7927a3c
NC		 3551 sec_ptr section,
3552 const void * location,
3553 file_ptr offset,
3554 bfd_size_type count)
3555{
0a1b45a2
AM		 3556 bool exec = (abfd->flags & EXEC_P) != 0;
3557 bool s_code = (section->flags & SEC_CODE) != 0;
3558 bool rv;
c7927a3c
NC		 3559 char * swapped_data = NULL;
3560 bfd_size_type i;
3561 bfd_vma caddr = section->vma + offset;
3562 file_ptr faddr = 0;
3563 bfd_size_type scount;
3564
3565#ifdef DJDEBUG
3566 bfd_size_type i;
3567
3568 fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n",
3569 (long) offset, (long) count, section->name,
3570 bfd_big_endian (abfd) ? "be" : "le",
3571 exec, s_code);
3572
3573 for (i = 0; i < count; i++)
3574 {
3575 int a = section->vma + offset + i;
3576
3577 if (a % 16 == 0 && a > 0)
3578 fprintf (stderr, "\n");
3579
3580 if (a % 16 && a % 4 == 0)
3581 fprintf (stderr, " ");
3582
3583 if (a % 16 == 0 || i == 0)
3584 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3585
3586 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3587 }
3588
3589 fprintf (stderr, "\n");
3590#endif
3591
3592 if (! exec || ! s_code || ! bfd_big_endian (abfd))
3593 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3594
3595 while (count > 0 && caddr > 0 && caddr % 4)
3596 {
3597 switch (caddr % 4)
3598 {
3599 case 0: faddr = offset + 3; break;
3600 case 1: faddr = offset + 1; break;
3601 case 2: faddr = offset - 1; break;
3602 case 3: faddr = offset - 3; break;
3603 }
3604
3605 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3606 if (! rv)
3607 return rv;
3608
28cc9170 3609 location = (bfd_byte *) location + 1;
c7927a3c
NC		 3610 offset ++;
3611 count --;
3612 caddr ++;
3613 }
3614
3615 scount = (int)(count / 4) * 4;
3616 if (scount > 0)
3617 {
3618 char * cloc = (char *) location;
3619
3620 swapped_data = (char *) bfd_alloc (abfd, count);
e0b317de 3621 if (swapped_data == NULL)
0a1b45a2 3622 return false;
c7927a3c
NC		 3623
3624 for (i = 0; i < count; i += 4)
3625 {
3626 bfd_vma v = bfd_getl32 (cloc + i);
3627 bfd_putb32 (v, swapped_data + i);
3628 }
3629
3630 rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount);
3631
3632 if (!rv)
3633 return rv;
3634 }
3635
3636 count -= scount;
28cc9170 3637 location = (bfd_byte *) location + scount;
c7927a3c
NC		 3638 offset += scount;
3639
3640 if (count > 0)
3641 {
3642 caddr = section->vma + offset;
3643 while (count > 0)
3644 {
3645 switch (caddr % 4)
3646 {
3647 case 0: faddr = offset + 3; break;
3648 case 1: faddr = offset + 1; break;
3649 case 2: faddr = offset - 1; break;
3650 case 3: faddr = offset - 3; break;
3651 }
3652 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3653 if (! rv)
3654 return rv;
3655
28cc9170 3656 location = (bfd_byte *) location + 1;
c7927a3c
NC		 3657 offset ++;
3658 count --;
3659 caddr ++;
3660 }
3661 }
3662
0a1b45a2 3663 return true;
c7927a3c
NC		 3664}
3665
0a1b45a2 3666static bool
c7927a3c
NC		 3667rx_final_link (bfd * abfd, struct bfd_link_info * info)
3668{
3669 asection * o;
3670
3671 for (o = abfd->sections; o != NULL; o = o->next)
3672 {
3673#ifdef DJDEBUG
3674 fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n",
3675 o->name, o->flags, o->vma, o->lma, o->size, o->rawsize);
3676#endif
3677 if (o->flags & SEC_CODE
3678 && bfd_big_endian (abfd)
e57278ef 3679 && o->size % 4)
c7927a3c
NC		 3680 {
3681#ifdef DJDEBUG
3682 fprintf (stderr, "adjusting...\n");
3683#endif
3684 o->size += 4 - (o->size % 4);
c7927a3c
NC		 3685 }
3686 }
3687
3688 return bfd_elf_final_link (abfd, info);
3689}
3690
0a1b45a2 3691static bool
6d6c25c8 3692elf32_rx_modify_headers (bfd *abfd, struct bfd_link_info *info)
c7927a3c
NC		 3693{
3694 const struct elf_backend_data * bed;
3695 struct elf_obj_tdata * tdata;
3696 Elf_Internal_Phdr * phdr;
3697 unsigned int count;
3698 unsigned int i;
3699
3700 bed = get_elf_backend_data (abfd);
3701 tdata = elf_tdata (abfd);
3702 phdr = tdata->phdr;
12bd6957 3703 count = elf_program_header_size (abfd) / bed->s->sizeof_phdr;
c7927a3c 3704
84bff83f
NC		 3705 if (ignore_lma)
3706 for (i = count; i-- != 0;)
3707 if (phdr[i].p_type == PT_LOAD)
3708 {
3709 /* The Renesas tools expect p_paddr to be zero. However,
3710 there is no other way to store the writable data in ROM for
3711 startup initialization. So, we let the linker *think*
3712 we're using paddr and vaddr the "usual" way, but at the
3713 last minute we move the paddr into the vaddr (which is what
3714 the simulator uses) and zero out paddr. Note that this
3715 does not affect the section headers, just the program
3716 headers. We hope. */
c7927a3c 3717 phdr[i].p_vaddr = phdr[i].p_paddr;
84bff83f 3718#if 0 /* If we zero out p_paddr, then the LMA in the section table
c7927a3c 3719 becomes wrong. */
84bff83f
NC		 3720 phdr[i].p_paddr = 0;
3721#endif
3722 }
c7927a3c 3723
6d6c25c8 3724 return _bfd_elf_modify_headers (abfd, info);
c7927a3c 3725}
708e2187
NC		 3726
3727/* The default literal sections should always be marked as "code" (i.e.,
3728 SHF_EXECINSTR). This is particularly important for big-endian mode
3729 when we do not want their contents byte reversed. */
3730static const struct bfd_elf_special_section elf32_rx_special_sections[] =
3731{
07d6d2b8
AM		 3732 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3733 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
708e2187 3734 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
07d6d2b8 3735 { NULL, 0, 0, 0, 0 }
708e2187 3736};
7a2f2d82
DD		 3737\f
3738typedef struct {
3739 bfd *abfd;
3740 struct bfd_link_info *info;
3741 bfd_vma table_start;
3742 int table_size;
3743 bfd_vma *table_handlers;
3744 bfd_vma table_default_handler;
3745 struct bfd_link_hash_entry **table_entries;
3746 struct bfd_link_hash_entry *table_default_entry;
3747 FILE *mapfile;
3748} RX_Table_Info;
3749
0a1b45a2 3750static bool
7a2f2d82
DD		 3751rx_table_find (struct bfd_hash_entry *vent, void *vinfo)
3752{
3753 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3754 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3755 const char *name; /* of the symbol we've found */
3756 asection *sec;
3757 struct bfd *abfd;
3758 int idx;
3759 const char *tname; /* name of the table */
3760 bfd_vma start_addr, end_addr;
3761 char *buf;
3762 struct bfd_link_hash_entry * h;
3763
3764 /* We're looking for globally defined symbols of the form
3765 $tablestart$<NAME>. */
3766 if (ent->type != bfd_link_hash_defined
3767 && ent->type != bfd_link_hash_defweak)
0a1b45a2 3768 return true;
7a2f2d82
DD		 3769
3770 name = ent->root.string;
3771 sec = ent->u.def.section;
3772 abfd = sec->owner;
3773
3f3328b8 3774 if (!startswith (name, "$tablestart$"))
0a1b45a2 3775 return true;
7a2f2d82
DD		 3776
3777 sec->flags |= SEC_KEEP;
3778
3779 tname = name + 12;
3780
3781 start_addr = ent->u.def.value;
3782
3783 /* At this point, we can't build the table but we can (and must)
3784 find all the related symbols and mark their sections as SEC_KEEP
3785 so we don't garbage collect them. */
3786
e0b317de
AM		 3787 buf = (char *) bfd_malloc (12 + 10 + strlen (tname));
3788 if (buf == NULL)
0a1b45a2 3789 return false;
7a2f2d82
DD		 3790
3791 sprintf (buf, "$tableend$%s", tname);
0a1b45a2 3792 h = bfd_link_hash_lookup (info->info->hash, buf, false, false, true);
7a2f2d82
DD		 3793 if (!h || (h->type != bfd_link_hash_defined
3794 && h->type != bfd_link_hash_defweak))
3795 {
695344c0 3796 /* xgettext:c-format */
871b3ab2 3797 _bfd_error_handler (_("%pB:%pA: table %s missing corresponding %s"),
7a2f2d82 3798 abfd, sec, name, buf);
0a1b45a2 3799 return true;
7a2f2d82
DD		 3800 }
3801
3802 if (h->u.def.section != ent->u.def.section)
3803 {
695344c0 3804 /* xgettext:c-format */
871b3ab2 3805 _bfd_error_handler (_("%pB:%pA: %s and %s must be in the same input section"),
7a2f2d82
DD		 3806 h->u.def.section->owner, h->u.def.section,
3807 name, buf);
0a1b45a2 3808 return true;
7a2f2d82
DD		 3809 }
3810
3811 end_addr = h->u.def.value;
3812
3813 sprintf (buf, "$tableentry$default$%s", tname);
0a1b45a2 3814 h = bfd_link_hash_lookup (info->info->hash, buf, false, false, true);
7a2f2d82
DD		 3815 if (h && (h->type == bfd_link_hash_defined
3816 || h->type == bfd_link_hash_defweak))
3817 {
3818 h->u.def.section->flags |= SEC_KEEP;
3819 }
3820
3821 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3822 {
3823 sprintf (buf, "$tableentry$%d$%s", idx, tname);
0a1b45a2 3824 h = bfd_link_hash_lookup (info->info->hash, buf, false, false, true);
7a2f2d82
DD		 3825 if (h && (h->type == bfd_link_hash_defined
3826 || h->type == bfd_link_hash_defweak))
3827 {
3828 h->u.def.section->flags |= SEC_KEEP;
3829 }
3830 }
3831
3832 /* Return TRUE to keep scanning, FALSE to end the traversal. */
0a1b45a2 3833 return true;
7a2f2d82
DD		 3834}
3835
3836/* We need to check for table entry symbols and build the tables, and
3837 we need to do it before the linker does garbage collection. This function is
3838 called once per input object file. */
0a1b45a2 3839static bool
7a2f2d82 3840rx_check_directives
07d6d2b8 3841 (bfd * abfd ATTRIBUTE_UNUSED,
7a2f2d82
DD		 3842 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3843{
3844 RX_Table_Info stuff;
3845
3846 stuff.abfd = abfd;
3847 stuff.info = info;
3848 bfd_hash_traverse (&(info->hash->table), rx_table_find, &stuff);
3849
0a1b45a2 3850 return true;
7a2f2d82
DD		 3851}
3852
3853\f
0a1b45a2 3854static bool
7a2f2d82
DD		 3855rx_table_map_2 (struct bfd_hash_entry *vent, void *vinfo)
3856{
3857 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3858 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3859 int idx;
3860 const char *name;
3861 bfd_vma addr;
3862
3863 /* See if the symbol ENT has an address listed in the table, and
3864 isn't a debug/special symbol. If so, put it in the table. */
3865
3866 if (ent->type != bfd_link_hash_defined
3867 && ent->type != bfd_link_hash_defweak)
0a1b45a2 3868 return true;
7a2f2d82
DD		 3869
3870 name = ent->root.string;
3871
3872 if (name[0] == '$' || name[0] == '.' || name[0] < ' ')
0a1b45a2 3873 return true;
7a2f2d82
DD		 3874
3875 addr = (ent->u.def.value
3876 + ent->u.def.section->output_section->vma
3877 + ent->u.def.section->output_offset);
3878
3879 for (idx = 0; idx < info->table_size; idx ++)
3880 if (addr == info->table_handlers[idx])
3881 info->table_entries[idx] = ent;
3882
3883 if (addr == info->table_default_handler)
3884 info->table_default_entry = ent;
3885
0a1b45a2 3886 return true;
7a2f2d82
DD		 3887}
3888
0a1b45a2 3889static bool
7a2f2d82
DD		 3890rx_table_map (struct bfd_hash_entry *vent, void *vinfo)
3891{
3892 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3893 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3894 const char *name; /* of the symbol we've found */
7a2f2d82
DD		 3895 int idx;
3896 const char *tname; /* name of the table */
3897 bfd_vma start_addr, end_addr;
3898 char *buf;
3899 struct bfd_link_hash_entry * h;
3900 int need_elipses;
3901
3902 /* We're looking for globally defined symbols of the form
3903 $tablestart$<NAME>. */
3904 if (ent->type != bfd_link_hash_defined
3905 && ent->type != bfd_link_hash_defweak)
0a1b45a2 3906 return true;
7a2f2d82
DD		 3907
3908 name = ent->root.string;
7a2f2d82 3909
3f3328b8 3910 if (!startswith (name, "$tablestart$"))
0a1b45a2 3911 return true;
7a2f2d82
DD		 3912
3913 tname = name + 12;
3914 start_addr = (ent->u.def.value
3915 + ent->u.def.section->output_section->vma
3916 + ent->u.def.section->output_offset);
3917
e0b317de
AM		 3918 buf = (char *) bfd_malloc (12 + 10 + strlen (tname));
3919 if (buf == NULL)
0a1b45a2 3920 return false;
7a2f2d82
DD		 3921
3922 sprintf (buf, "$tableend$%s", tname);
3923 end_addr = get_symbol_value_maybe (buf, info->info);
3924
3925 sprintf (buf, "$tableentry$default$%s", tname);
0a1b45a2 3926 h = bfd_link_hash_lookup (info->info->hash, buf, false, false, true);
7a2f2d82
DD		 3927 if (h)
3928 {
3929 info->table_default_handler = (h->u.def.value
3930 + h->u.def.section->output_section->vma
3931 + h->u.def.section->output_offset);
3932 }
3933 else
3934 /* Zero is a valid handler address! */
3935 info->table_default_handler = (bfd_vma) (-1);
3936 info->table_default_entry = NULL;
3937
3938 info->table_start = start_addr;
3939 info->table_size = (int) (end_addr - start_addr) / 4;
e0b317de
AM		 3940 info->table_handlers = (bfd_vma *)
3941 bfd_malloc (info->table_size * sizeof (bfd_vma));
3942 if (info->table_handlers == NULL)
3943 {
3944 free (buf);
0a1b45a2 3945 return false;
e0b317de
AM		 3946 }
3947 info->table_entries = (struct bfd_link_hash_entry **)
3948 bfd_malloc (info->table_size * sizeof (struct bfd_link_hash_entry));
3949 if (info->table_entries == NULL)
3950 {
3951 free (info->table_handlers);
3952 free (buf);
0a1b45a2 3953 return false;
e0b317de 3954 }
7a2f2d82
DD		 3955
3956 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3957 {
3958 sprintf (buf, "$tableentry$%d$%s", idx, tname);
0a1b45a2 3959 h = bfd_link_hash_lookup (info->info->hash, buf, false, false, true);
7a2f2d82
DD		 3960 if (h && (h->type == bfd_link_hash_defined
3961 || h->type == bfd_link_hash_defweak))
3962 {
3963 info->table_handlers[idx] = (h->u.def.value
3964 + h->u.def.section->output_section->vma
3965 + h->u.def.section->output_offset);
3966 }
3967 else
3968 info->table_handlers[idx] = info->table_default_handler;
3969 info->table_entries[idx] = NULL;
3970 }
3971
3972 free (buf);
3973
3974 bfd_hash_traverse (&(info->info->hash->table), rx_table_map_2, info);
3975
b8281767
AM		 3976 fprintf (info->mapfile,
3977 "\nRX Vector Table: %s has %d entries at 0x%08" PRIx64 "\n\n",
3978 tname, info->table_size, (uint64_t) start_addr);
7a2f2d82
DD		 3979
3980 if (info->table_default_entry)
b8281767 3981 fprintf (info->mapfile, " default handler is: %s at 0x%08" PRIx64 "\n",
7a2f2d82 3982 info->table_default_entry->root.string,
b8281767 3983 (uint64_t) info->table_default_handler);
7a2f2d82 3984 else if (info->table_default_handler != (bfd_vma)(-1))
b8281767
AM		 3985 fprintf (info->mapfile, " default handler is at 0x%08" PRIx64 "\n",
3986 (uint64_t) info->table_default_handler);
7a2f2d82
DD		 3987 else
3988 fprintf (info->mapfile, " no default handler\n");
3989
3990 need_elipses = 1;
3991 for (idx = 0; idx < info->table_size; idx ++)
3992 {
3993 if (info->table_handlers[idx] == info->table_default_handler)
3994 {
3995 if (need_elipses)
3996 fprintf (info->mapfile, " . . .\n");
3997 need_elipses = 0;
3998 continue;
3999 }
4000 need_elipses = 1;
4001
b8281767
AM		 4002 fprintf (info->mapfile,
4003 " 0x%08" PRIx64 " [%3d] ", (uint64_t) start_addr + 4 * idx, idx);
7a2f2d82
DD		 4004
4005 if (info->table_handlers[idx] == (bfd_vma) (-1))
4006 fprintf (info->mapfile, "(no handler found)\n");
4007
4008 else if (info->table_handlers[idx] == info->table_default_handler)
4009 {
4010 if (info->table_default_entry)
4011 fprintf (info->mapfile, "(default)\n");
4012 else
4013 fprintf (info->mapfile, "(default)\n");
4014 }
4015
4016 else if (info->table_entries[idx])
4017 {
b8281767
AM		 4018 fprintf (info->mapfile, "0x%08" PRIx64 " %s\n",
4019 (uint64_t) info->table_handlers[idx],
4020 info->table_entries[idx]->root.string);
7a2f2d82
DD		 4021 }
4022
4023 else
4024 {
b8281767
AM		 4025 fprintf (info->mapfile, "0x%08" PRIx64 " ???\n",
4026 (uint64_t) info->table_handlers[idx]);
7a2f2d82
DD		 4027 }
4028 }
4029 if (need_elipses)
4030 fprintf (info->mapfile, " . . .\n");
4031
0a1b45a2 4032 return true;
7a2f2d82
DD		 4033}
4034
4035void
4036rx_additional_link_map_text (bfd *obfd, struct bfd_link_info *info, FILE *mapfile)
4037{
4038 /* We scan the symbol table looking for $tableentry$'s, and for
4039 each, try to deduce which handlers go with which entries. */
4040
4041 RX_Table_Info stuff;
4042
4043 stuff.abfd = obfd;
4044 stuff.info = info;
4045 stuff.mapfile = mapfile;
4046 bfd_hash_traverse (&(info->hash->table), rx_table_map, &stuff);
4047}
4048
c7927a3c
NC		 4049\f
4050#define ELF_ARCH bfd_arch_rx
4051#define ELF_MACHINE_CODE EM_RX
4052#define ELF_MAXPAGESIZE 0x1000
4053
6d00b590 4054#define TARGET_BIG_SYM rx_elf32_be_vec
c7927a3c
NC		 4055#define TARGET_BIG_NAME "elf32-rx-be"
4056
6d00b590 4057#define TARGET_LITTLE_SYM rx_elf32_le_vec
c7927a3c
NC		 4058#define TARGET_LITTLE_NAME "elf32-rx-le"
4059
4060#define elf_info_to_howto_rel NULL
4061#define elf_info_to_howto rx_info_to_howto_rela
4062#define elf_backend_object_p rx_elf_object_p
4063#define elf_backend_relocate_section rx_elf_relocate_section
07d6d2b8 4064#define elf_symbol_leading_char ('_')
c7927a3c 4065#define elf_backend_can_gc_sections 1
6d6c25c8 4066#define elf_backend_modify_headers elf32_rx_modify_headers
c7927a3c
NC		 4067
4068#define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup
4069#define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup
4070#define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags
4071#define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data
4072#define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data
4073#define bfd_elf32_get_section_contents rx_get_section_contents
4074#define bfd_elf32_set_section_contents rx_set_section_contents
4075#define bfd_elf32_bfd_final_link rx_final_link
4076#define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper
07d6d2b8 4077#define elf_backend_special_sections elf32_rx_special_sections
7a2f2d82 4078#define elf_backend_check_directives rx_check_directives
c7927a3c
NC		 4079
4080#include "elf32-target.h"
4c422395
DD		 4081
4082/* We define a second big-endian target that doesn't have the custom
4083 section get/set hooks, for times when we want to preserve the
4084 pre-swapped .text sections (like objcopy). */
4085
07d6d2b8 4086#undef TARGET_BIG_SYM
6d00b590 4087#define TARGET_BIG_SYM rx_elf32_be_ns_vec
07d6d2b8 4088#undef TARGET_BIG_NAME
4c422395 4089#define TARGET_BIG_NAME "elf32-rx-be-ns"
07d6d2b8 4090#undef TARGET_LITTLE_SYM
4c422395
DD		 4091
4092#undef bfd_elf32_get_section_contents
4093#undef bfd_elf32_set_section_contents
4094
4095#undef elf32_bed
4096#define elf32_bed elf32_rx_be_ns_bed
4097
4098#include "elf32-target.h"
8d3c78e4
YS		 4099
4100#undef TARGET_LITTLE_SYM
4101#define TARGET_LITTLE_SYM rx_elf32_linux_le_vec
4102#undef TARGET_LITTLE_NAME
4103#define TARGET_LITTLE_NAME "elf32-rx-linux"
4104#undef TARGET_BIG_SYM
4105#undef TARGET_BIG_NAME
4106
4107#undef elf_backend_object_p
4108#define elf_backend_object_p rx_linux_object_p
4109#undef elf_symbol_leading_char
4110#undef elf32_bed
4b24dd1a 4111#define elf32_bed elf32_rx_le_linux_bed
8d3c78e4
YS		 4112
4113#include "elf32-target.h"
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