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252b5132 1/* V850-specific support for 32-bit ELF
219d1afa 2 Copyright (C) 1996-2018 Free Software Foundation, Inc.
252b5132 3
86aba9db 4 This file is part of BFD, the Binary File Descriptor library.
252b5132 5
86aba9db
NC
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
cd123cb7 8 the Free Software Foundation; either version 3 of the License, or
86aba9db 9 (at your option) any later version.
252b5132 10
86aba9db
NC
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
252b5132 15
86aba9db
NC
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
47b0e7ad
NC
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
cd123cb7 21
252b5132 22/* XXX FIXME: This code is littered with 32bit int, 16bit short, 8bit char
86aba9db 23 dependencies. As is the gas & simulator code for the v850. */
252b5132 24
252b5132 25#include "sysdep.h"
3db64b00 26#include "bfd.h"
252b5132
RH
27#include "bfdlink.h"
28#include "libbfd.h"
29#include "elf-bfd.h"
30#include "elf/v850.h"
e12dd2ea 31#include "libiberty.h"
252b5132 32
1cd986c5
NC
33/* Sign-extend a 17-bit number. */
34#define SEXT17(x) ((((x) & 0x1ffff) ^ 0x10000) - 0x10000)
35
36/* Sign-extend a 22-bit number. */
37#define SEXT22(x) ((((x) & 0x3fffff) ^ 0x200000) - 0x200000)
435b1e90 38
e460dd0d
AM
39static reloc_howto_type v850_elf_howto_table[];
40
252b5132
RH
41/* Look through the relocs for a section during the first phase, and
42 allocate space in the global offset table or procedure linkage
43 table. */
44
b34976b6 45static bfd_boolean
47b0e7ad
NC
46v850_elf_check_relocs (bfd *abfd,
47 struct bfd_link_info *info,
48 asection *sec,
49 const Elf_Internal_Rela *relocs)
252b5132 50{
b34976b6 51 bfd_boolean ret = TRUE;
252b5132
RH
52 Elf_Internal_Shdr *symtab_hdr;
53 struct elf_link_hash_entry **sym_hashes;
54 const Elf_Internal_Rela *rel;
55 const Elf_Internal_Rela *rel_end;
de863c74 56 unsigned int r_type;
252b5132 57 int other = 0;
47b0e7ad 58 const char *common = NULL;
252b5132 59
0e1862bb 60 if (bfd_link_relocatable (info))
b34976b6 61 return TRUE;
252b5132
RH
62
63#ifdef DEBUG
871b3ab2 64 _bfd_error_handler ("v850_elf_check_relocs called for section %pA in %pB",
d003868e 65 sec, abfd);
252b5132
RH
66#endif
67
252b5132
RH
68 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
69 sym_hashes = elf_sym_hashes (abfd);
252b5132
RH
70
71 rel_end = relocs + sec->reloc_count;
72 for (rel = relocs; rel < rel_end; rel++)
73 {
74 unsigned long r_symndx;
75 struct elf_link_hash_entry *h;
76
77 r_symndx = ELF32_R_SYM (rel->r_info);
78 if (r_symndx < symtab_hdr->sh_info)
79 h = NULL;
80 else
973a3492
L
81 {
82 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
83 while (h->root.type == bfd_link_hash_indirect
84 || h->root.type == bfd_link_hash_warning)
85 h = (struct elf_link_hash_entry *) h->root.u.i.link;
86 }
252b5132 87
de863c74 88 r_type = ELF32_R_TYPE (rel->r_info);
252b5132
RH
89 switch (r_type)
90 {
91 default:
252b5132
RH
92 break;
93
07d6d2b8
AM
94 /* This relocation describes the C++ object vtable hierarchy.
95 Reconstruct it for later use during GC. */
96 case R_V850_GNU_VTINHERIT:
97 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
98 return FALSE;
99 break;
100
101 /* This relocation describes which C++ vtable entries
e12dd2ea 102 are actually used. Record for later use during GC. */
07d6d2b8
AM
103 case R_V850_GNU_VTENTRY:
104 BFD_ASSERT (h != NULL);
105 if (h != NULL
106 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
107 return FALSE;
108 break;
252b5132
RH
109
110 case R_V850_SDA_16_16_SPLIT_OFFSET:
111 case R_V850_SDA_16_16_OFFSET:
112 case R_V850_SDA_15_16_OFFSET:
de863c74
NC
113 case R_V810_GPWLO_1:
114 case R_V850_HWLO:
115 case R_V850_HWLO_1:
252b5132
RH
116 other = V850_OTHER_SDA;
117 common = ".scommon";
118 goto small_data_common;
435b1e90 119
252b5132
RH
120 case R_V850_ZDA_16_16_SPLIT_OFFSET:
121 case R_V850_ZDA_16_16_OFFSET:
122 case R_V850_ZDA_15_16_OFFSET:
123 other = V850_OTHER_ZDA;
124 common = ".zcommon";
125 goto small_data_common;
435b1e90 126
252b5132 127 case R_V850_TDA_4_4_OFFSET:
1cd986c5
NC
128 case R_V850_TDA_4_5_OFFSET:
129 case R_V850_TDA_7_7_OFFSET:
252b5132
RH
130 case R_V850_TDA_6_8_OFFSET:
131 case R_V850_TDA_7_8_OFFSET:
252b5132
RH
132 case R_V850_TDA_16_16_OFFSET:
133 other = V850_OTHER_TDA;
134 common = ".tcommon";
135 /* fall through */
136
137#define V850_OTHER_MASK (V850_OTHER_TDA | V850_OTHER_SDA | V850_OTHER_ZDA)
138
139 small_data_common:
140 if (h)
141 {
e12dd2ea
NC
142 /* Flag which type of relocation was used. */
143 h->other |= other;
252b5132
RH
144 if ((h->other & V850_OTHER_MASK) != (other & V850_OTHER_MASK)
145 && (h->other & V850_OTHER_ERROR) == 0)
146 {
147 const char * msg;
148 static char buff[200]; /* XXX */
149
150 switch (h->other & V850_OTHER_MASK)
151 {
152 default:
38f14ab8 153 msg = _("variable `%s' cannot occupy in multiple small data regions");
252b5132
RH
154 break;
155 case V850_OTHER_SDA | V850_OTHER_ZDA | V850_OTHER_TDA:
38f14ab8 156 msg = _("variable `%s' can only be in one of the small, zero, and tiny data regions");
252b5132
RH
157 break;
158 case V850_OTHER_SDA | V850_OTHER_ZDA:
38f14ab8 159 msg = _("variable `%s' cannot be in both small and zero data regions simultaneously");
252b5132
RH
160 break;
161 case V850_OTHER_SDA | V850_OTHER_TDA:
38f14ab8 162 msg = _("variable `%s' cannot be in both small and tiny data regions simultaneously");
252b5132
RH
163 break;
164 case V850_OTHER_ZDA | V850_OTHER_TDA:
38f14ab8 165 msg = _("variable `%s' cannot be in both zero and tiny data regions simultaneously");
252b5132
RH
166 break;
167 }
168
169 sprintf (buff, msg, h->root.root.string);
170 info->callbacks->warning (info, buff, h->root.root.string,
dc810e39
AM
171 abfd, h->root.u.def.section,
172 (bfd_vma) 0);
252b5132
RH
173
174 bfd_set_error (bfd_error_bad_value);
175 h->other |= V850_OTHER_ERROR;
b34976b6 176 ret = FALSE;
252b5132
RH
177 }
178 }
179
180 if (h && h->root.type == bfd_link_hash_common
181 && h->root.u.c.p
182 && !strcmp (bfd_get_section_name (abfd, h->root.u.c.p->section), "COMMON"))
183 {
e12dd2ea
NC
184 asection * section;
185
186 section = h->root.u.c.p->section = bfd_make_section_old_way (abfd, common);
252b5132
RH
187 section->flags |= SEC_IS_COMMON;
188 }
189
190#ifdef DEBUG
191 fprintf (stderr, "v850_elf_check_relocs, found %s relocation for %s%s\n",
192 v850_elf_howto_table[ (int)r_type ].name,
193 (h && h->root.root.string) ? h->root.root.string : "<unknown>",
194 (h->root.type == bfd_link_hash_common) ? ", symbol is common" : "");
195#endif
196 break;
197 }
198 }
199
200 return ret;
201}
202
e12dd2ea
NC
203/* In the old version, when an entry was checked out from the table,
204 it was deleted. This produced an error if the entry was needed
205 more than once, as the second attempted retry failed.
206
207 In the current version, the entry is not deleted, instead we set
b34976b6 208 the field 'found' to TRUE. If a second lookup matches the same
e12dd2ea
NC
209 entry, then we know that the hi16s reloc has already been updated
210 and does not need to be updated a second time.
211
212 TODO - TOFIX: If it is possible that we need to restore 2 different
213 addresses from the same table entry, where the first generates an
214 overflow, whilst the second do not, then this code will fail. */
252b5132
RH
215
216typedef struct hi16s_location
217{
07d6d2b8
AM
218 bfd_vma addend;
219 bfd_byte * address;
220 unsigned long counter;
221 bfd_boolean found;
47b0e7ad 222 struct hi16s_location * next;
252b5132
RH
223}
224hi16s_location;
225
47b0e7ad
NC
226static hi16s_location * previous_hi16s;
227static hi16s_location * free_hi16s;
228static unsigned long hi16s_counter;
252b5132
RH
229
230static void
47b0e7ad 231remember_hi16s_reloc (bfd *abfd, bfd_vma addend, bfd_byte *address)
252b5132
RH
232{
233 hi16s_location * entry = NULL;
dc810e39 234 bfd_size_type amt = sizeof (* free_hi16s);
435b1e90 235
252b5132
RH
236 /* Find a free structure. */
237 if (free_hi16s == NULL)
47b0e7ad 238 free_hi16s = bfd_zalloc (abfd, amt);
252b5132
RH
239
240 entry = free_hi16s;
241 free_hi16s = free_hi16s->next;
435b1e90 242
252b5132
RH
243 entry->addend = addend;
244 entry->address = address;
245 entry->counter = hi16s_counter ++;
b34976b6 246 entry->found = FALSE;
252b5132
RH
247 entry->next = previous_hi16s;
248 previous_hi16s = entry;
435b1e90 249
252b5132
RH
250 /* Cope with wrap around of our counter. */
251 if (hi16s_counter == 0)
252 {
47b0e7ad 253 /* XXX: Assume that all counter entries differ only in their low 16 bits. */
252b5132
RH
254 for (entry = previous_hi16s; entry != NULL; entry = entry->next)
255 entry->counter &= 0xffff;
256
257 hi16s_counter = 0x10000;
258 }
252b5132
RH
259}
260
261static bfd_byte *
47b0e7ad 262find_remembered_hi16s_reloc (bfd_vma addend, bfd_boolean *already_found)
252b5132 263{
b34976b6
AM
264 hi16s_location *match = NULL;
265 hi16s_location *entry;
b34976b6 266 bfd_byte *addr;
435b1e90 267
252b5132
RH
268 /* Search the table. Record the most recent entry that matches. */
269 for (entry = previous_hi16s; entry; entry = entry->next)
270 {
271 if (entry->addend == addend
272 && (match == NULL || match->counter < entry->counter))
273 {
252b5132
RH
274 match = entry;
275 }
252b5132
RH
276 }
277
278 if (match == NULL)
279 return NULL;
280
281 /* Extract the address. */
282 addr = match->address;
283
4cc11e76 284 /* Remember if this entry has already been used before. */
252b5132
RH
285 if (already_found)
286 * already_found = match->found;
287
288 /* Note that this entry has now been used. */
b34976b6 289 match->found = TRUE;
435b1e90 290
252b5132 291 return addr;
435b1e90 292}
252b5132 293
1e50d24d
RS
294/* Calculate the final operand value for a R_V850_LO16 or
295 R_V850_LO16_SPLIT_OFFSET. *INSN is the current operand value and
296 ADDEND is the sum of the relocation symbol and offset. Store the
297 operand value in *INSN and return true on success.
298
299 The assembler has already done some of this: If the value stored in
300 the instruction has its 15th bit set, (counting from zero) then the
301 assembler will have added 1 to the value stored in the associated
302 HI16S reloc. So for example, these relocations:
303
304 movhi hi( fred ), r0, r1
305 movea lo( fred ), r1, r1
306
307 will store 0 in the value fields for the MOVHI and MOVEA instructions
308 and addend will be the address of fred, but for these instructions:
309
1cd986c5
NC
310 movhi hi( fred + 0x123456 ), r0, r1
311 movea lo( fred + 0x123456 ), r1, r1
1e50d24d
RS
312
313 the value stored in the MOVHI instruction will be 0x12 and the value
314 stored in the MOVEA instruction will be 0x3456. If however the
315 instructions were:
316
1cd986c5
NC
317 movhi hi( fred + 0x10ffff ), r0, r1
318 movea lo( fred + 0x10ffff ), r1, r1
1e50d24d
RS
319
320 then the value stored in the MOVHI instruction would be 0x11 (not
321 0x10) and the value stored in the MOVEA instruction would be 0xffff.
322 Thus (assuming for the moment that the addend is 0), at run time the
323 MOVHI instruction loads 0x110000 into r1, then the MOVEA instruction
324 adds 0xffffffff (sign extension!) producing 0x10ffff. Similarly if
325 the instructions were:
326
1cd986c5
NC
327 movhi hi( fred - 1 ), r0, r1
328 movea lo( fred - 1 ), r1, r1
1e50d24d
RS
329
330 then 0 is stored in the MOVHI instruction and -1 is stored in the
331 MOVEA instruction.
332
333 Overflow can occur if the addition of the value stored in the
334 instruction plus the addend sets the 15th bit when before it was clear.
335 This is because the 15th bit will be sign extended into the high part,
336 thus reducing its value by one, but since the 15th bit was originally
337 clear, the assembler will not have added 1 to the previous HI16S reloc
338 to compensate for this effect. For example:
339
1cd986c5
NC
340 movhi hi( fred + 0x123456 ), r0, r1
341 movea lo( fred + 0x123456 ), r1, r1
1e50d24d
RS
342
343 The value stored in HI16S reloc is 0x12, the value stored in the LO16
344 reloc is 0x3456. If we assume that the address of fred is 0x00007000
345 then the relocations become:
346
347 HI16S: 0x0012 + (0x00007000 >> 16) = 0x12
348 LO16: 0x3456 + (0x00007000 & 0xffff) = 0xa456
349
350 but when the instructions are executed, the MOVEA instruction's value
351 is signed extended, so the sum becomes:
352
353 0x00120000
354 + 0xffffa456
355 ------------
356 0x0011a456 but 'fred + 0x123456' = 0x0012a456
357
358 Note that if the 15th bit was set in the value stored in the LO16
359 reloc, then we do not have to do anything:
360
1cd986c5
NC
361 movhi hi( fred + 0x10ffff ), r0, r1
362 movea lo( fred + 0x10ffff ), r1, r1
1e50d24d
RS
363
364 HI16S: 0x0011 + (0x00007000 >> 16) = 0x11
365 LO16: 0xffff + (0x00007000 & 0xffff) = 0x6fff
366
367 0x00110000
368 + 0x00006fff
369 ------------
370 0x00116fff = fred + 0x10ffff = 0x7000 + 0x10ffff
371
372 Overflow can also occur if the computation carries into the 16th bit
373 and it also results in the 15th bit having the same value as the 15th
374 bit of the original value. What happens is that the HI16S reloc
375 will have already examined the 15th bit of the original value and
376 added 1 to the high part if the bit is set. This compensates for the
377 sign extension of 15th bit of the result of the computation. But now
378 there is a carry into the 16th bit, and this has not been allowed for.
379
380 So, for example if fred is at address 0xf000:
381
1cd986c5
NC
382 movhi hi( fred + 0xffff ), r0, r1 [bit 15 of the offset is set]
383 movea lo( fred + 0xffff ), r1, r1
1e50d24d
RS
384
385 HI16S: 0x0001 + (0x0000f000 >> 16) = 0x0001
386 LO16: 0xffff + (0x0000f000 & 0xffff) = 0xefff (carry into bit 16 is lost)
387
388 0x00010000
389 + 0xffffefff
390 ------------
391 0x0000efff but 'fred + 0xffff' = 0x0001efff
392
393 Similarly, if the 15th bit remains clear, but overflow occurs into
394 the 16th bit then (assuming the address of fred is 0xf000):
395
1cd986c5
NC
396 movhi hi( fred + 0x7000 ), r0, r1 [bit 15 of the offset is clear]
397 movea lo( fred + 0x7000 ), r1, r1
1e50d24d
RS
398
399 HI16S: 0x0000 + (0x0000f000 >> 16) = 0x0000
400 LO16: 0x7000 + (0x0000f000 & 0xffff) = 0x6fff (carry into bit 16 is lost)
401
402 0x00000000
403 + 0x00006fff
404 ------------
405 0x00006fff but 'fred + 0x7000' = 0x00016fff
406
407 Note - there is no need to change anything if a carry occurs, and the
408 15th bit changes its value from being set to being clear, as the HI16S
409 reloc will have already added in 1 to the high part for us:
410
1cd986c5
NC
411 movhi hi( fred + 0xffff ), r0, r1 [bit 15 of the offset is set]
412 movea lo( fred + 0xffff ), r1, r1
1e50d24d
RS
413
414 HI16S: 0x0001 + (0x00007000 >> 16)
415 LO16: 0xffff + (0x00007000 & 0xffff) = 0x6fff (carry into bit 16 is lost)
416
417 0x00010000
418 + 0x00006fff (bit 15 not set, so the top half is zero)
419 ------------
420 0x00016fff which is right (assuming that fred is at 0x7000)
421
422 but if the 15th bit goes from being clear to being set, then we must
423 once again handle overflow:
424
1cd986c5
NC
425 movhi hi( fred + 0x7000 ), r0, r1 [bit 15 of the offset is clear]
426 movea lo( fred + 0x7000 ), r1, r1
1e50d24d
RS
427
428 HI16S: 0x0000 + (0x0000ffff >> 16)
429 LO16: 0x7000 + (0x0000ffff & 0xffff) = 0x6fff (carry into bit 16)
430
431 0x00000000
432 + 0x00006fff (bit 15 not set, so the top half is zero)
433 ------------
434 0x00006fff which is wrong (assuming that fred is at 0xffff). */
435
436static bfd_boolean
437v850_elf_perform_lo16_relocation (bfd *abfd, unsigned long *insn,
438 unsigned long addend)
439{
440#define BIT15_SET(x) ((x) & 0x8000)
441#define OVERFLOWS(a,i) ((((a) & 0xffff) + (i)) > 0xffff)
47b0e7ad 442
1e50d24d
RS
443 if ((BIT15_SET (*insn + addend) && ! BIT15_SET (addend))
444 || (OVERFLOWS (addend, *insn)
445 && ((! BIT15_SET (*insn)) || (BIT15_SET (addend)))))
446 {
447 bfd_boolean already_updated;
448 bfd_byte *hi16s_address = find_remembered_hi16s_reloc
449 (addend, & already_updated);
450
451 /* Amend the matching HI16_S relocation. */
452 if (hi16s_address != NULL)
453 {
454 if (! already_updated)
455 {
456 unsigned long hi_insn = bfd_get_16 (abfd, hi16s_address);
457 hi_insn += 1;
458 bfd_put_16 (abfd, hi_insn, hi16s_address);
459 }
460 }
461 else
462 {
38f14ab8 463 _bfd_error_handler (_("failed to find previous HI16 reloc"));
1e50d24d
RS
464 return FALSE;
465 }
466 }
467#undef OVERFLOWS
468#undef BIT15_SET
469
470 /* Do not complain if value has top bit set, as this has been
471 anticipated. */
472 *insn = (*insn + addend) & 0xffff;
473 return TRUE;
474}
475
252b5132 476/* FIXME: The code here probably ought to be removed and the code in reloc.c
4cc11e76 477 allowed to do its stuff instead. At least for most of the relocs, anyway. */
e12dd2ea 478
252b5132 479static bfd_reloc_status_type
47b0e7ad
NC
480v850_elf_perform_relocation (bfd *abfd,
481 unsigned int r_type,
482 bfd_vma addend,
483 bfd_byte *address)
252b5132
RH
484{
485 unsigned long insn;
1e50d24d 486 unsigned long result;
252b5132 487 bfd_signed_vma saddend = (bfd_signed_vma) addend;
435b1e90 488
252b5132
RH
489 switch (r_type)
490 {
491 default:
de863c74 492#ifdef DEBUG
0aa13fee
AM
493 _bfd_error_handler ("%pB: unsupported relocation type %#x",
494 abfd, r_type);
de863c74 495#endif
252b5132 496 return bfd_reloc_notsupported;
435b1e90 497
e30ddb24
NC
498 case R_V850_REL32:
499 case R_V850_ABS32:
de863c74
NC
500 case R_V810_WORD:
501 case R_V850_PC32:
252b5132
RH
502 bfd_put_32 (abfd, addend, address);
503 return bfd_reloc_ok;
435b1e90 504
de863c74 505 case R_V850_WLO23:
1cd986c5
NC
506 case R_V850_23:
507 insn = bfd_get_32 (abfd, address);
508 insn &= ~((0x7f << 4) | (0x7fff80 << (16-7)));
509 insn |= ((addend & 0x7f) << 4) | ((addend & 0x7fff80) << (16-7));
510 bfd_put_32 (abfd, (bfd_vma) insn, address);
511 return bfd_reloc_ok;
512
de863c74 513 case R_V850_PCR22:
252b5132
RH
514 case R_V850_22_PCREL:
515 if (saddend > 0x1fffff || saddend < -0x200000)
516 return bfd_reloc_overflow;
435b1e90 517
252b5132
RH
518 if ((addend % 2) != 0)
519 return bfd_reloc_dangerous;
435b1e90 520
252b5132
RH
521 insn = bfd_get_32 (abfd, address);
522 insn &= ~0xfffe003f;
523 insn |= (((addend & 0xfffe) << 16) | ((addend & 0x3f0000) >> 16));
dc810e39 524 bfd_put_32 (abfd, (bfd_vma) insn, address);
252b5132 525 return bfd_reloc_ok;
435b1e90 526
de863c74 527 case R_V850_PC17:
1cd986c5
NC
528 case R_V850_17_PCREL:
529 if (saddend > 0xffff || saddend < -0x10000)
530 return bfd_reloc_overflow;
531
532 if ((addend % 2) != 0)
533 return bfd_reloc_dangerous;
534
535 insn = bfd_get_32 (abfd, address);
536 insn &= ~ 0xfffe0010;
537 insn |= ((addend & 0xfffe) << 16) | ((addend & 0x10000) >> (16-4));
538 break;
539
de863c74 540 case R_V850_PC16U:
1cd986c5
NC
541 case R_V850_16_PCREL:
542 if ((saddend < -0xffff) || (saddend > 0))
543 return bfd_reloc_overflow;
544
545 if ((addend % 2) != 0)
546 return bfd_reloc_dangerous;
547
548 insn = bfd_get_16 (abfd, address);
549 insn &= ~0xfffe;
550 insn |= (-addend & 0xfffe);
551 break;
552
de863c74 553 case R_V850_PC9:
252b5132
RH
554 case R_V850_9_PCREL:
555 if (saddend > 0xff || saddend < -0x100)
556 return bfd_reloc_overflow;
435b1e90 557
252b5132
RH
558 if ((addend % 2) != 0)
559 return bfd_reloc_dangerous;
435b1e90 560
252b5132
RH
561 insn = bfd_get_16 (abfd, address);
562 insn &= ~ 0xf870;
563 insn |= ((addend & 0x1f0) << 7) | ((addend & 0x0e) << 3);
564 break;
435b1e90 565
de863c74 566 case R_V810_WHI:
252b5132
RH
567 case R_V850_HI16:
568 addend += (bfd_get_16 (abfd, address) << 16);
569 addend = (addend >> 16);
570 insn = addend;
571 break;
435b1e90 572
de863c74 573 case R_V810_WHI1:
252b5132
RH
574 case R_V850_HI16_S:
575 /* Remember where this relocation took place. */
576 remember_hi16s_reloc (abfd, addend, address);
577
578 addend += (bfd_get_16 (abfd, address) << 16);
579 addend = (addend >> 16) + ((addend & 0x8000) != 0);
435b1e90
KH
580
581 /* This relocation cannot overflow. */
4d421096 582 if (addend > 0xffff)
252b5132 583 addend = 0;
435b1e90 584
252b5132
RH
585 insn = addend;
586 break;
435b1e90 587
de863c74 588 case R_V810_WLO:
252b5132 589 case R_V850_LO16:
1e50d24d
RS
590 insn = bfd_get_16 (abfd, address);
591 if (! v850_elf_perform_lo16_relocation (abfd, &insn, addend))
592 return bfd_reloc_overflow;
593 break;
252b5132 594
de863c74 595 case R_V810_BYTE:
252b5132
RH
596 case R_V850_8:
597 addend += (char) bfd_get_8 (abfd, address);
598
599 saddend = (bfd_signed_vma) addend;
435b1e90 600
252b5132
RH
601 if (saddend > 0x7f || saddend < -0x80)
602 return bfd_reloc_overflow;
603
604 bfd_put_8 (abfd, addend, address);
605 return bfd_reloc_ok;
606
607 case R_V850_CALLT_16_16_OFFSET:
608 addend += bfd_get_16 (abfd, address);
435b1e90 609
252b5132 610 saddend = (bfd_signed_vma) addend;
435b1e90 611
252b5132
RH
612 if (saddend > 0xffff || saddend < 0)
613 return bfd_reloc_overflow;
614
615 insn = addend;
616 break;
435b1e90 617
1cd986c5
NC
618 case R_V850_CALLT_15_16_OFFSET:
619 insn = bfd_get_16 (abfd, address);
620
5bb3703f 621 addend += insn & 0xfffe;
1cd986c5
NC
622
623 saddend = (bfd_signed_vma) addend;
624
625 if (saddend > 0xffff || saddend < 0)
626 return bfd_reloc_overflow;
627
628 insn = (0xfffe & addend)
629 | (insn & ~0xfffe);
630 break;
631
632 case R_V850_CALLT_6_7_OFFSET:
633 insn = bfd_get_16 (abfd, address);
634 addend += ((insn & 0x3f) << 1);
635
636 saddend = (bfd_signed_vma) addend;
637
638 if (saddend > 0x7e || saddend < 0)
639 return bfd_reloc_overflow;
640
641 if (addend & 1)
642 return bfd_reloc_dangerous;
643
644 insn &= 0xff80;
645 insn |= (addend >> 1);
646 break;
647
252b5132 648 case R_V850_16:
de863c74 649 case R_V810_HWORD:
252b5132
RH
650 case R_V850_SDA_16_16_OFFSET:
651 case R_V850_ZDA_16_16_OFFSET:
652 case R_V850_TDA_16_16_OFFSET:
653 addend += bfd_get_16 (abfd, address);
435b1e90 654
252b5132 655 saddend = (bfd_signed_vma) addend;
435b1e90 656
252b5132
RH
657 if (saddend > 0x7fff || saddend < -0x8000)
658 return bfd_reloc_overflow;
659
660 insn = addend;
661 break;
435b1e90 662
1cd986c5 663 case R_V850_16_S1:
252b5132
RH
664 case R_V850_SDA_15_16_OFFSET:
665 case R_V850_ZDA_15_16_OFFSET:
de863c74 666 case R_V810_GPWLO_1:
252b5132
RH
667 insn = bfd_get_16 (abfd, address);
668 addend += (insn & 0xfffe);
435b1e90 669
252b5132 670 saddend = (bfd_signed_vma) addend;
435b1e90 671
252b5132
RH
672 if (saddend > 0x7ffe || saddend < -0x8000)
673 return bfd_reloc_overflow;
435b1e90 674
252b5132 675 if (addend & 1)
07d6d2b8 676 return bfd_reloc_dangerous;
435b1e90 677
dc810e39 678 insn = (addend &~ (bfd_vma) 1) | (insn & 1);
252b5132 679 break;
435b1e90 680
252b5132
RH
681 case R_V850_TDA_6_8_OFFSET:
682 insn = bfd_get_16 (abfd, address);
683 addend += ((insn & 0x7e) << 1);
435b1e90 684
252b5132 685 saddend = (bfd_signed_vma) addend;
435b1e90 686
252b5132
RH
687 if (saddend > 0xfc || saddend < 0)
688 return bfd_reloc_overflow;
435b1e90 689
252b5132
RH
690 if (addend & 3)
691 return bfd_reloc_dangerous;
435b1e90 692
252b5132
RH
693 insn &= 0xff81;
694 insn |= (addend >> 1);
695 break;
435b1e90 696
252b5132
RH
697 case R_V850_TDA_7_8_OFFSET:
698 insn = bfd_get_16 (abfd, address);
699 addend += ((insn & 0x7f) << 1);
435b1e90 700
252b5132 701 saddend = (bfd_signed_vma) addend;
435b1e90 702
252b5132
RH
703 if (saddend > 0xfe || saddend < 0)
704 return bfd_reloc_overflow;
435b1e90 705
252b5132
RH
706 if (addend & 1)
707 return bfd_reloc_dangerous;
435b1e90 708
252b5132
RH
709 insn &= 0xff80;
710 insn |= (addend >> 1);
711 break;
435b1e90 712
252b5132
RH
713 case R_V850_TDA_7_7_OFFSET:
714 insn = bfd_get_16 (abfd, address);
715 addend += insn & 0x7f;
435b1e90 716
252b5132 717 saddend = (bfd_signed_vma) addend;
435b1e90 718
252b5132
RH
719 if (saddend > 0x7f || saddend < 0)
720 return bfd_reloc_overflow;
435b1e90 721
252b5132
RH
722 insn &= 0xff80;
723 insn |= addend;
724 break;
435b1e90 725
252b5132
RH
726 case R_V850_TDA_4_5_OFFSET:
727 insn = bfd_get_16 (abfd, address);
728 addend += ((insn & 0xf) << 1);
435b1e90 729
252b5132 730 saddend = (bfd_signed_vma) addend;
435b1e90 731
252b5132
RH
732 if (saddend > 0x1e || saddend < 0)
733 return bfd_reloc_overflow;
435b1e90 734
252b5132
RH
735 if (addend & 1)
736 return bfd_reloc_dangerous;
435b1e90 737
252b5132
RH
738 insn &= 0xfff0;
739 insn |= (addend >> 1);
740 break;
435b1e90 741
252b5132
RH
742 case R_V850_TDA_4_4_OFFSET:
743 insn = bfd_get_16 (abfd, address);
744 addend += insn & 0xf;
435b1e90 745
252b5132 746 saddend = (bfd_signed_vma) addend;
435b1e90 747
252b5132
RH
748 if (saddend > 0xf || saddend < 0)
749 return bfd_reloc_overflow;
435b1e90 750
252b5132
RH
751 insn &= 0xfff0;
752 insn |= addend;
753 break;
435b1e90 754
de863c74
NC
755 case R_V810_WLO_1:
756 case R_V850_HWLO:
757 case R_V850_HWLO_1:
1cd986c5
NC
758 case R_V850_LO16_S1:
759 insn = bfd_get_16 (abfd, address);
760 result = insn & 0xfffe;
761 if (! v850_elf_perform_lo16_relocation (abfd, &result, addend))
762 return bfd_reloc_overflow;
763 if (result & 1)
764 return bfd_reloc_overflow;
765 insn = (result & 0xfffe)
766 | (insn & ~0xfffe);
767 bfd_put_16 (abfd, insn, address);
768 return bfd_reloc_ok;
769
de863c74 770 case R_V850_BLO:
1e50d24d
RS
771 case R_V850_LO16_SPLIT_OFFSET:
772 insn = bfd_get_32 (abfd, address);
773 result = ((insn & 0xfffe0000) >> 16) | ((insn & 0x20) >> 5);
774 if (! v850_elf_perform_lo16_relocation (abfd, &result, addend))
775 return bfd_reloc_overflow;
776 insn = (((result << 16) & 0xfffe0000)
777 | ((result << 5) & 0x20)
778 | (insn & ~0xfffe0020));
779 bfd_put_32 (abfd, insn, address);
780 return bfd_reloc_ok;
781
1cd986c5 782 case R_V850_16_SPLIT_OFFSET:
252b5132 783 case R_V850_SDA_16_16_SPLIT_OFFSET:
1cd986c5 784 case R_V850_ZDA_16_16_SPLIT_OFFSET:
252b5132
RH
785 insn = bfd_get_32 (abfd, address);
786 addend += ((insn & 0xfffe0000) >> 16) + ((insn & 0x20) >> 5);
435b1e90 787
252b5132 788 saddend = (bfd_signed_vma) addend;
435b1e90 789
252b5132
RH
790 if (saddend > 0x7fff || saddend < -0x8000)
791 return bfd_reloc_overflow;
435b1e90 792
252b5132
RH
793 insn &= 0x0001ffdf;
794 insn |= (addend & 1) << 5;
dc810e39 795 insn |= (addend &~ (bfd_vma) 1) << 16;
435b1e90 796
dc810e39 797 bfd_put_32 (abfd, (bfd_vma) insn, address);
252b5132 798 return bfd_reloc_ok;
435b1e90 799
252b5132
RH
800 case R_V850_GNU_VTINHERIT:
801 case R_V850_GNU_VTENTRY:
802 return bfd_reloc_ok;
803
804 }
805
dc810e39 806 bfd_put_16 (abfd, (bfd_vma) insn, address);
252b5132
RH
807 return bfd_reloc_ok;
808}
252b5132
RH
809\f
810/* Insert the addend into the instruction. */
e12dd2ea 811
252b5132 812static bfd_reloc_status_type
47b0e7ad
NC
813v850_elf_reloc (bfd *abfd ATTRIBUTE_UNUSED,
814 arelent *reloc,
815 asymbol *symbol,
816 void * data ATTRIBUTE_UNUSED,
817 asection *isection,
818 bfd *obfd,
819 char **err ATTRIBUTE_UNUSED)
252b5132
RH
820{
821 long relocation;
435b1e90 822
252b5132
RH
823 /* If there is an output BFD,
824 and the symbol is not a section name (which is only defined at final link time),
825 and either we are not putting the addend into the instruction
e12dd2ea 826 or the addend is zero, so there is nothing to add into the instruction
252b5132 827 then just fixup the address and return. */
47b0e7ad 828 if (obfd != NULL
252b5132
RH
829 && (symbol->flags & BSF_SECTION_SYM) == 0
830 && (! reloc->howto->partial_inplace
831 || reloc->addend == 0))
832 {
833 reloc->address += isection->output_offset;
834 return bfd_reloc_ok;
835 }
435b1e90 836
252b5132
RH
837 /* Catch relocs involving undefined symbols. */
838 if (bfd_is_und_section (symbol->section)
839 && (symbol->flags & BSF_WEAK) == 0
840 && obfd == NULL)
841 return bfd_reloc_undefined;
842
843 /* We handle final linking of some relocs ourselves. */
844
845 /* Is the address of the relocation really within the section? */
07515404 846 if (reloc->address > bfd_get_section_limit (abfd, isection))
252b5132 847 return bfd_reloc_outofrange;
435b1e90 848
4cc11e76 849 /* Work out which section the relocation is targeted at and the
252b5132 850 initial relocation command value. */
435b1e90 851
b34976b6 852 if (reloc->howto->pc_relative)
86aba9db
NC
853 return bfd_reloc_ok;
854
252b5132
RH
855 /* Get symbol value. (Common symbols are special.) */
856 if (bfd_is_com_section (symbol->section))
857 relocation = 0;
858 else
859 relocation = symbol->value;
435b1e90 860
252b5132
RH
861 /* Convert input-section-relative symbol value to absolute + addend. */
862 relocation += symbol->section->output_section->vma;
863 relocation += symbol->section->output_offset;
864 relocation += reloc->addend;
435b1e90 865
435b1e90 866 reloc->addend = relocation;
252b5132
RH
867 return bfd_reloc_ok;
868}
86aba9db
NC
869
870/* This function is used for relocs which are only used
871 for relaxing, which the linker should otherwise ignore. */
872
873static bfd_reloc_status_type
47b0e7ad
NC
874v850_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED,
875 arelent *reloc_entry,
876 asymbol *symbol ATTRIBUTE_UNUSED,
877 void * data ATTRIBUTE_UNUSED,
878 asection *input_section,
879 bfd *output_bfd,
880 char **error_message ATTRIBUTE_UNUSED)
86aba9db
NC
881{
882 if (output_bfd != NULL)
883 reloc_entry->address += input_section->output_offset;
884
885 return bfd_reloc_ok;
886}
47b0e7ad 887/* Note: It is REQUIRED that the 'type' value of each entry
1cd986c5 888 in this array match the index of the entry in the array.
de863c74 889 SeeAlso: RELOC_NUBMER in include/elf/v850.h. */
47b0e7ad
NC
890static reloc_howto_type v850_elf_howto_table[] =
891{
892 /* This reloc does nothing. */
893 HOWTO (R_V850_NONE, /* Type. */
894 0, /* Rightshift. */
6346d5ca
AM
895 3, /* Size (0 = byte, 1 = short, 2 = long). */
896 0, /* Bitsize. */
47b0e7ad
NC
897 FALSE, /* PC_relative. */
898 0, /* Bitpos. */
6346d5ca 899 complain_overflow_dont, /* Complain_on_overflow. */
47b0e7ad
NC
900 bfd_elf_generic_reloc, /* Special_function. */
901 "R_V850_NONE", /* Name. */
902 FALSE, /* Partial_inplace. */
903 0, /* Src_mask. */
904 0, /* Dst_mask. */
905 FALSE), /* PCrel_offset. */
906
907 /* A PC relative 9 bit branch. */
908 HOWTO (R_V850_9_PCREL, /* Type. */
1cd986c5
NC
909 0, /* Rightshift. */
910 1, /* Size (0 = byte, 1 = short, 2 = long). */
911 9, /* Bitsize. */
47b0e7ad
NC
912 TRUE, /* PC_relative. */
913 0, /* Bitpos. */
914 complain_overflow_bitfield, /* Complain_on_overflow. */
915 v850_elf_reloc, /* Special_function. */
916 "R_V850_9_PCREL", /* Name. */
917 FALSE, /* Partial_inplace. */
918 0x00ffffff, /* Src_mask. */
919 0x00ffffff, /* Dst_mask. */
920 TRUE), /* PCrel_offset. */
921
922 /* A PC relative 22 bit branch. */
923 HOWTO (R_V850_22_PCREL, /* Type. */
1cd986c5 924 0, /* Rightshift. */
47b0e7ad
NC
925 2, /* Size (0 = byte, 1 = short, 2 = long). */
926 22, /* Bitsize. */
927 TRUE, /* PC_relative. */
1cd986c5 928 0, /* Bitpos. */
47b0e7ad
NC
929 complain_overflow_signed, /* Complain_on_overflow. */
930 v850_elf_reloc, /* Special_function. */
931 "R_V850_22_PCREL", /* Name. */
932 FALSE, /* Partial_inplace. */
933 0x07ffff80, /* Src_mask. */
934 0x07ffff80, /* Dst_mask. */
935 TRUE), /* PCrel_offset. */
936
937 /* High 16 bits of symbol value. */
938 HOWTO (R_V850_HI16_S, /* Type. */
939 0, /* Rightshift. */
940 1, /* Size (0 = byte, 1 = short, 2 = long). */
941 16, /* Bitsize. */
942 FALSE, /* PC_relative. */
943 0, /* Bitpos. */
944 complain_overflow_dont, /* Complain_on_overflow. */
945 v850_elf_reloc, /* Special_function. */
946 "R_V850_HI16_S", /* Name. */
947 FALSE, /* Partial_inplace. */
948 0xffff, /* Src_mask. */
949 0xffff, /* Dst_mask. */
950 FALSE), /* PCrel_offset. */
951
952 /* High 16 bits of symbol value. */
953 HOWTO (R_V850_HI16, /* Type. */
954 0, /* Rightshift. */
955 1, /* Size (0 = byte, 1 = short, 2 = long). */
956 16, /* Bitsize. */
957 FALSE, /* PC_relative. */
958 0, /* Bitpos. */
959 complain_overflow_dont, /* Complain_on_overflow. */
960 v850_elf_reloc, /* Special_function. */
961 "R_V850_HI16", /* Name. */
962 FALSE, /* Partial_inplace. */
963 0xffff, /* Src_mask. */
964 0xffff, /* Dst_mask. */
965 FALSE), /* PCrel_offset. */
966
967 /* Low 16 bits of symbol value. */
968 HOWTO (R_V850_LO16, /* Type. */
969 0, /* Rightshift. */
970 1, /* Size (0 = byte, 1 = short, 2 = long). */
971 16, /* Bitsize. */
972 FALSE, /* PC_relative. */
973 0, /* Bitpos. */
974 complain_overflow_dont, /* Complain_on_overflow. */
975 v850_elf_reloc, /* Special_function. */
976 "R_V850_LO16", /* Name. */
977 FALSE, /* Partial_inplace. */
978 0xffff, /* Src_mask. */
979 0xffff, /* Dst_mask. */
980 FALSE), /* PCrel_offset. */
981
982 /* Simple 32bit reloc. */
983 HOWTO (R_V850_ABS32, /* Type. */
984 0, /* Rightshift. */
985 2, /* Size (0 = byte, 1 = short, 2 = long). */
986 32, /* Bitsize. */
987 FALSE, /* PC_relative. */
988 0, /* Bitpos. */
989 complain_overflow_dont, /* Complain_on_overflow. */
990 v850_elf_reloc, /* Special_function. */
991 "R_V850_ABS32", /* Name. */
992 FALSE, /* Partial_inplace. */
993 0xffffffff, /* Src_mask. */
994 0xffffffff, /* Dst_mask. */
995 FALSE), /* PCrel_offset. */
996
997 /* Simple 16bit reloc. */
998 HOWTO (R_V850_16, /* Type. */
999 0, /* Rightshift. */
1000 1, /* Size (0 = byte, 1 = short, 2 = long). */
1001 16, /* Bitsize. */
1002 FALSE, /* PC_relative. */
1003 0, /* Bitpos. */
1004 complain_overflow_dont, /* Complain_on_overflow. */
1005 bfd_elf_generic_reloc, /* Special_function. */
1006 "R_V850_16", /* Name. */
1007 FALSE, /* Partial_inplace. */
1008 0xffff, /* Src_mask. */
1009 0xffff, /* Dst_mask. */
1010 FALSE), /* PCrel_offset. */
1011
07d6d2b8 1012 /* Simple 8bit reloc. */
47b0e7ad
NC
1013 HOWTO (R_V850_8, /* Type. */
1014 0, /* Rightshift. */
1015 0, /* Size (0 = byte, 1 = short, 2 = long). */
1016 8, /* Bitsize. */
1017 FALSE, /* PC_relative. */
1018 0, /* Bitpos. */
1019 complain_overflow_dont, /* Complain_on_overflow. */
1020 bfd_elf_generic_reloc, /* Special_function. */
1021 "R_V850_8", /* Name. */
1022 FALSE, /* Partial_inplace. */
1023 0xff, /* Src_mask. */
1024 0xff, /* Dst_mask. */
1025 FALSE), /* PCrel_offset. */
1026
1027 /* 16 bit offset from the short data area pointer. */
1028 HOWTO (R_V850_SDA_16_16_OFFSET, /* Type. */
1029 0, /* Rightshift. */
1030 1, /* Size (0 = byte, 1 = short, 2 = long). */
1031 16, /* Bitsize. */
1032 FALSE, /* PC_relative. */
1033 0, /* Bitpos. */
1034 complain_overflow_dont, /* Complain_on_overflow. */
1035 v850_elf_reloc, /* Special_function. */
1036 "R_V850_SDA_16_16_OFFSET", /* Name. */
1037 FALSE, /* Partial_inplace. */
1038 0xffff, /* Src_mask. */
1039 0xffff, /* Dst_mask. */
1040 FALSE), /* PCrel_offset. */
1041
1042 /* 15 bit offset from the short data area pointer. */
1043 HOWTO (R_V850_SDA_15_16_OFFSET, /* Type. */
1044 1, /* Rightshift. */
1045 1, /* Size (0 = byte, 1 = short, 2 = long). */
1046 16, /* Bitsize. */
1047 FALSE, /* PC_relative. */
1048 1, /* Bitpos. */
1049 complain_overflow_dont, /* Complain_on_overflow. */
1050 v850_elf_reloc, /* Special_function. */
1051 "R_V850_SDA_15_16_OFFSET", /* Name. */
1052 FALSE, /* Partial_inplace. */
1053 0xfffe, /* Src_mask. */
1054 0xfffe, /* Dst_mask. */
1055 FALSE), /* PCrel_offset. */
1056
1057 /* 16 bit offset from the zero data area pointer. */
1058 HOWTO (R_V850_ZDA_16_16_OFFSET, /* Type. */
1059 0, /* Rightshift. */
1060 1, /* Size (0 = byte, 1 = short, 2 = long). */
1061 16, /* Bitsize. */
1062 FALSE, /* PC_relative. */
1063 0, /* Bitpos. */
1064 complain_overflow_dont, /* Complain_on_overflow. */
1065 v850_elf_reloc, /* Special_function. */
1066 "R_V850_ZDA_16_16_OFFSET", /* Name. */
1067 FALSE, /* Partial_inplace. */
1068 0xffff, /* Src_mask. */
1069 0xffff, /* Dst_mask. */
1070 FALSE), /* PCrel_offset. */
1071
1072 /* 15 bit offset from the zero data area pointer. */
1073 HOWTO (R_V850_ZDA_15_16_OFFSET, /* Type. */
1074 1, /* Rightshift. */
1075 1, /* Size (0 = byte, 1 = short, 2 = long). */
1076 16, /* Bitsize. */
1077 FALSE, /* PC_relative. */
1078 1, /* Bitpos. */
1079 complain_overflow_dont, /* Complain_on_overflow. */
1080 v850_elf_reloc, /* Special_function. */
1081 "R_V850_ZDA_15_16_OFFSET", /* Name. */
1082 FALSE, /* Partial_inplace. */
1083 0xfffe, /* Src_mask. */
1084 0xfffe, /* Dst_mask. */
1085 FALSE), /* PCrel_offset. */
1086
1087 /* 6 bit offset from the tiny data area pointer. */
1088 HOWTO (R_V850_TDA_6_8_OFFSET, /* Type. */
1089 2, /* Rightshift. */
1090 1, /* Size (0 = byte, 1 = short, 2 = long). */
1091 8, /* Bitsize. */
1092 FALSE, /* PC_relative. */
1093 1, /* Bitpos. */
1094 complain_overflow_dont, /* Complain_on_overflow. */
1095 v850_elf_reloc, /* Special_function. */
1096 "R_V850_TDA_6_8_OFFSET", /* Name. */
1097 FALSE, /* Partial_inplace. */
1098 0x7e, /* Src_mask. */
1099 0x7e, /* Dst_mask. */
1100 FALSE), /* PCrel_offset. */
1101
1102 /* 8 bit offset from the tiny data area pointer. */
1103 HOWTO (R_V850_TDA_7_8_OFFSET, /* Type. */
1104 1, /* Rightshift. */
1105 1, /* Size (0 = byte, 1 = short, 2 = long). */
1106 8, /* Bitsize. */
1107 FALSE, /* PC_relative. */
1108 0, /* Bitpos. */
1109 complain_overflow_dont, /* Complain_on_overflow. */
1110 v850_elf_reloc, /* Special_function. */
1111 "R_V850_TDA_7_8_OFFSET", /* Name. */
1112 FALSE, /* Partial_inplace. */
1113 0x7f, /* Src_mask. */
1114 0x7f, /* Dst_mask. */
1115 FALSE), /* PCrel_offset. */
1116
1117 /* 7 bit offset from the tiny data area pointer. */
1118 HOWTO (R_V850_TDA_7_7_OFFSET, /* Type. */
1119 0, /* Rightshift. */
1120 1, /* Size (0 = byte, 1 = short, 2 = long). */
1121 7, /* Bitsize. */
1122 FALSE, /* PC_relative. */
1123 0, /* Bitpos. */
1124 complain_overflow_dont, /* Complain_on_overflow. */
1125 v850_elf_reloc, /* Special_function. */
1126 "R_V850_TDA_7_7_OFFSET", /* Name. */
1127 FALSE, /* Partial_inplace. */
1128 0x7f, /* Src_mask. */
1129 0x7f, /* Dst_mask. */
1130 FALSE), /* PCrel_offset. */
1131
1132 /* 16 bit offset from the tiny data area pointer! */
1133 HOWTO (R_V850_TDA_16_16_OFFSET, /* Type. */
1134 0, /* Rightshift. */
1135 1, /* Size (0 = byte, 1 = short, 2 = long). */
1136 16, /* Bitsize. */
1137 FALSE, /* PC_relative. */
1138 0, /* Bitpos. */
1139 complain_overflow_dont, /* Complain_on_overflow. */
1140 v850_elf_reloc, /* Special_function. */
1141 "R_V850_TDA_16_16_OFFSET", /* Name. */
1142 FALSE, /* Partial_inplace. */
1143 0xffff, /* Src_mask. */
1144 0xfff, /* Dst_mask. */
1145 FALSE), /* PCrel_offset. */
1146
1147 /* 5 bit offset from the tiny data area pointer. */
1148 HOWTO (R_V850_TDA_4_5_OFFSET, /* Type. */
1149 1, /* Rightshift. */
1150 1, /* Size (0 = byte, 1 = short, 2 = long). */
1151 5, /* Bitsize. */
1152 FALSE, /* PC_relative. */
1153 0, /* Bitpos. */
1154 complain_overflow_dont, /* Complain_on_overflow. */
1155 v850_elf_reloc, /* Special_function. */
1156 "R_V850_TDA_4_5_OFFSET", /* Name. */
1157 FALSE, /* Partial_inplace. */
1158 0x0f, /* Src_mask. */
1159 0x0f, /* Dst_mask. */
1160 FALSE), /* PCrel_offset. */
1161
1162 /* 4 bit offset from the tiny data area pointer. */
1163 HOWTO (R_V850_TDA_4_4_OFFSET, /* Type. */
1164 0, /* Rightshift. */
1165 1, /* Size (0 = byte, 1 = short, 2 = long). */
1166 4, /* Bitsize. */
1167 FALSE, /* PC_relative. */
1168 0, /* Bitpos. */
1169 complain_overflow_dont, /* Complain_on_overflow. */
1170 v850_elf_reloc, /* Special_function. */
1171 "R_V850_TDA_4_4_OFFSET", /* Name. */
1172 FALSE, /* Partial_inplace. */
1173 0x0f, /* Src_mask. */
1174 0x0f, /* Dst_mask. */
1175 FALSE), /* PCrel_offset. */
1176
1177 /* 16 bit offset from the short data area pointer. */
1178 HOWTO (R_V850_SDA_16_16_SPLIT_OFFSET, /* Type. */
1179 0, /* Rightshift. */
1180 2, /* Size (0 = byte, 1 = short, 2 = long). */
1181 16, /* Bitsize. */
1182 FALSE, /* PC_relative. */
1183 0, /* Bitpos. */
1184 complain_overflow_dont, /* Complain_on_overflow. */
1185 v850_elf_reloc, /* Special_function. */
1186 "R_V850_SDA_16_16_SPLIT_OFFSET",/* Name. */
1187 FALSE, /* Partial_inplace. */
1188 0xfffe0020, /* Src_mask. */
1189 0xfffe0020, /* Dst_mask. */
1190 FALSE), /* PCrel_offset. */
1191
1192 /* 16 bit offset from the zero data area pointer. */
1193 HOWTO (R_V850_ZDA_16_16_SPLIT_OFFSET, /* Type. */
1194 0, /* Rightshift. */
1195 2, /* Size (0 = byte, 1 = short, 2 = long). */
1196 16, /* Bitsize. */
1197 FALSE, /* PC_relative. */
1198 0, /* Bitpos. */
1199 complain_overflow_dont, /* Complain_on_overflow. */
1200 v850_elf_reloc, /* Special_function. */
1201 "R_V850_ZDA_16_16_SPLIT_OFFSET",/* Name. */
1202 FALSE, /* Partial_inplace. */
1203 0xfffe0020, /* Src_mask. */
1204 0xfffe0020, /* Dst_mask. */
1205 FALSE), /* PCrel_offset. */
1206
1207 /* 6 bit offset from the call table base pointer. */
1208 HOWTO (R_V850_CALLT_6_7_OFFSET, /* Type. */
1209 0, /* Rightshift. */
1210 1, /* Size (0 = byte, 1 = short, 2 = long). */
1211 7, /* Bitsize. */
1212 FALSE, /* PC_relative. */
1213 0, /* Bitpos. */
1214 complain_overflow_dont, /* Complain_on_overflow. */
1215 v850_elf_reloc, /* Special_function. */
1216 "R_V850_CALLT_6_7_OFFSET", /* Name. */
1217 FALSE, /* Partial_inplace. */
1218 0x3f, /* Src_mask. */
1219 0x3f, /* Dst_mask. */
1220 FALSE), /* PCrel_offset. */
1221
1222 /* 16 bit offset from the call table base pointer. */
1223 HOWTO (R_V850_CALLT_16_16_OFFSET, /* Type. */
1224 0, /* Rightshift. */
1225 1, /* Size (0 = byte, 1 = short, 2 = long). */
1226 16, /* Bitsize. */
1227 FALSE, /* PC_relative. */
1228 0, /* Bitpos. */
1229 complain_overflow_dont, /* Complain_on_overflow. */
1230 v850_elf_reloc, /* Special_function. */
1231 "R_V850_CALLT_16_16_OFFSET", /* Name. */
1232 FALSE, /* Partial_inplace. */
1233 0xffff, /* Src_mask. */
1234 0xffff, /* Dst_mask. */
1235 FALSE), /* PCrel_offset. */
1236
1cd986c5 1237
47b0e7ad
NC
1238 /* GNU extension to record C++ vtable hierarchy */
1239 HOWTO (R_V850_GNU_VTINHERIT, /* Type. */
07d6d2b8
AM
1240 0, /* Rightshift. */
1241 2, /* Size (0 = byte, 1 = short, 2 = long). */
1242 0, /* Bitsize. */
1243 FALSE, /* PC_relative. */
1244 0, /* Bitpos. */
1cd986c5 1245 complain_overflow_dont, /* Complain_on_overflow. */
07d6d2b8 1246 NULL, /* Special_function. */
1cd986c5 1247 "R_V850_GNU_VTINHERIT", /* Name. */
07d6d2b8
AM
1248 FALSE, /* Partial_inplace. */
1249 0, /* Src_mask. */
1250 0, /* Dst_mask. */
1251 FALSE), /* PCrel_offset. */
1cd986c5
NC
1252
1253 /* GNU extension to record C++ vtable member usage. */
07d6d2b8
AM
1254 HOWTO (R_V850_GNU_VTENTRY, /* Type. */
1255 0, /* Rightshift. */
1256 2, /* Size (0 = byte, 1 = short, 2 = long). */
1257 0, /* Bitsize. */
1258 FALSE, /* PC_relative. */
1259 0, /* Bitpos. */
1cd986c5 1260 complain_overflow_dont, /* Complain_on_overflow. */
07d6d2b8
AM
1261 _bfd_elf_rel_vtable_reloc_fn, /* Special_function. */
1262 "R_V850_GNU_VTENTRY", /* Name. */
1263 FALSE, /* Partial_inplace. */
1264 0, /* Src_mask. */
1265 0, /* Dst_mask. */
1266 FALSE), /* PCrel_offset. */
47b0e7ad
NC
1267
1268 /* Indicates a .longcall pseudo-op. The compiler will generate a .longcall
1269 pseudo-op when it finds a function call which can be relaxed. */
1270 HOWTO (R_V850_LONGCALL, /* Type. */
07d6d2b8
AM
1271 0, /* Rightshift. */
1272 2, /* Size (0 = byte, 1 = short, 2 = long). */
1273 32, /* Bitsize. */
1274 TRUE, /* PC_relative. */
1275 0, /* Bitpos. */
1cd986c5
NC
1276 complain_overflow_signed, /* Complain_on_overflow. */
1277 v850_elf_ignore_reloc, /* Special_function. */
07d6d2b8
AM
1278 "R_V850_LONGCALL", /* Name. */
1279 FALSE, /* Partial_inplace. */
1280 0, /* Src_mask. */
1281 0, /* Dst_mask. */
1282 TRUE), /* PCrel_offset. */
47b0e7ad
NC
1283
1284 /* Indicates a .longjump pseudo-op. The compiler will generate a
1285 .longjump pseudo-op when it finds a branch which can be relaxed. */
1286 HOWTO (R_V850_LONGJUMP, /* Type. */
07d6d2b8
AM
1287 0, /* Rightshift. */
1288 2, /* Size (0 = byte, 1 = short, 2 = long). */
1289 32, /* Bitsize. */
1290 TRUE, /* PC_relative. */
1291 0, /* Bitpos. */
1cd986c5
NC
1292 complain_overflow_signed, /* Complain_on_overflow. */
1293 v850_elf_ignore_reloc, /* Special_function. */
07d6d2b8
AM
1294 "R_V850_LONGJUMP", /* Name. */
1295 FALSE, /* Partial_inplace. */
1296 0, /* Src_mask. */
1297 0, /* Dst_mask. */
1298 TRUE), /* PCrel_offset. */
1299
1300 HOWTO (R_V850_ALIGN, /* Type. */
1301 0, /* Rightshift. */
1302 1, /* Size (0 = byte, 1 = short, 2 = long). */
1303 0, /* Bitsize. */
1304 FALSE, /* PC_relative. */
1305 0, /* Bitpos. */
1cd986c5
NC
1306 complain_overflow_unsigned, /* Complain_on_overflow. */
1307 v850_elf_ignore_reloc, /* Special_function. */
07d6d2b8
AM
1308 "R_V850_ALIGN", /* Name. */
1309 FALSE, /* Partial_inplace. */
1310 0, /* Src_mask. */
1311 0, /* Dst_mask. */
1312 TRUE), /* PCrel_offset. */
1cd986c5 1313
47b0e7ad
NC
1314 /* Simple pc-relative 32bit reloc. */
1315 HOWTO (R_V850_REL32, /* Type. */
1316 0, /* Rightshift. */
1317 2, /* Size (0 = byte, 1 = short, 2 = long). */
1318 32, /* Bitsize. */
1319 TRUE, /* PC_relative. */
1320 0, /* Bitpos. */
1321 complain_overflow_dont, /* Complain_on_overflow. */
1322 v850_elf_reloc, /* Special_function. */
1323 "R_V850_REL32", /* Name. */
1324 FALSE, /* Partial_inplace. */
1325 0xffffffff, /* Src_mask. */
1326 0xffffffff, /* Dst_mask. */
1327 FALSE), /* PCrel_offset. */
1328
1329 /* An ld.bu version of R_V850_LO16. */
1330 HOWTO (R_V850_LO16_SPLIT_OFFSET, /* Type. */
1331 0, /* Rightshift. */
1332 2, /* Size (0 = byte, 1 = short, 2 = long). */
1333 16, /* Bitsize. */
1334 FALSE, /* PC_relative. */
1335 0, /* Bitpos. */
1336 complain_overflow_dont, /* Complain_on_overflow. */
1337 v850_elf_reloc, /* Special_function. */
1338 "R_V850_LO16_SPLIT_OFFSET", /* Name. */
1339 FALSE, /* Partial_inplace. */
1340 0xfffe0020, /* Src_mask. */
1341 0xfffe0020, /* Dst_mask. */
1342 FALSE), /* PCrel_offset. */
1cd986c5
NC
1343
1344 /* A unsigned PC relative 16 bit loop. */
1345 HOWTO (R_V850_16_PCREL, /* Type. */
1346 0, /* Rightshift. */
1347 1, /* Size (0 = byte, 1 = short, 2 = long). */
1348 16, /* Bitsize. */
1349 TRUE, /* PC_relative. */
1350 0, /* Bitpos. */
1351 complain_overflow_bitfield, /* Complain_on_overflow. */
1352 v850_elf_reloc, /* Special_function. */
1353 "R_V850_16_PCREL", /* Name. */
1354 FALSE, /* Partial_inplace. */
1355 0xfffe, /* Src_mask. */
1356 0xfffe, /* Dst_mask. */
1357 TRUE), /* PCrel_offset. */
1358
1359 /* A PC relative 17 bit branch. */
1360 HOWTO (R_V850_17_PCREL, /* Type. */
1361 0, /* Rightshift. */
1362 2, /* Size (0 = byte, 1 = short, 2 = long). */
1363 17, /* Bitsize. */
1364 TRUE, /* PC_relative. */
1365 0, /* Bitpos. */
1366 complain_overflow_bitfield, /* Complain_on_overflow. */
1367 v850_elf_reloc, /* Special_function. */
1368 "R_V850_17_PCREL", /* Name. */
1369 FALSE, /* Partial_inplace. */
1370 0x0010fffe, /* Src_mask. */
1371 0x0010fffe, /* Dst_mask. */
1372 TRUE), /* PCrel_offset. */
1373
1374 /* A 23bit offset ld/st. */
1375 HOWTO (R_V850_23, /* type. */
1376 0, /* rightshift. */
1377 2, /* size (0 = byte, 1 = short, 2 = long). */
1378 23, /* bitsize. */
1379 FALSE, /* pc_relative. */
1380 0, /* bitpos. */
1381 complain_overflow_dont, /* complain_on_overflow. */
1382 v850_elf_reloc, /* special_function. */
1383 "R_V850_23", /* name. */
1384 FALSE, /* partial_inplace. */
1385 0xffff07f0, /* src_mask. */
1386 0xffff07f0, /* dst_mask. */
1387 FALSE), /* pcrel_offset. */
1388
1389 /* A PC relative 32 bit branch. */
1390 HOWTO (R_V850_32_PCREL, /* type. */
1391 1, /* rightshift. */
1392 2, /* size (0 = byte, 1 = short, 2 = long). */
1393 32, /* bitsize. */
1394 TRUE, /* pc_relative. */
1395 1, /* bitpos. */
1396 complain_overflow_signed, /* complain_on_overflow. */
1397 v850_elf_reloc, /* special_function. */
1398 "R_V850_32_PCREL", /* name. */
1399 FALSE, /* partial_inplace. */
1400 0xfffffffe, /* src_mask. */
1401 0xfffffffe, /* dst_mask. */
1402 TRUE), /* pcrel_offset. */
1403
07d6d2b8 1404 /* A absolute 32 bit branch. */
1cd986c5
NC
1405 HOWTO (R_V850_32_ABS, /* type. */
1406 1, /* rightshift. */
1407 2, /* size (0 = byte, 1 = short, 2 = long). */
1408 32, /* bitsize. */
1409 TRUE, /* pc_relative. */
1410 1, /* bitpos. */
1411 complain_overflow_signed, /* complain_on_overflow. */
1412 v850_elf_reloc, /* special_function. */
1413 "R_V850_32_ABS", /* name. */
1414 FALSE, /* partial_inplace. */
1415 0xfffffffe, /* src_mask. */
1416 0xfffffffe, /* dst_mask. */
1417 FALSE), /* pcrel_offset. */
1418
1419 /* High 16 bits of symbol value. */
1420 HOWTO (R_V850_HI16, /* Type. */
1421 0, /* Rightshift. */
1422 1, /* Size (0 = byte, 1 = short, 2 = long). */
1423 16, /* Bitsize. */
1424 FALSE, /* PC_relative. */
1425 0, /* Bitpos. */
1426 complain_overflow_dont, /* Complain_on_overflow. */
1427 v850_elf_reloc, /* Special_function. */
1428 "R_V850_HI16", /* Name. */
1429 FALSE, /* Partial_inplace. */
1430 0xffff, /* Src_mask. */
1431 0xffff, /* Dst_mask. */
1432 FALSE), /* PCrel_offset. */
1433
1434 /* Low 16 bits of symbol value. */
1435 HOWTO (R_V850_16_S1, /* type. */
1436 1, /* rightshift. */
1437 1, /* size (0 = byte, 1 = short, 2 = long). */
1438 16, /* bitsize. */
1439 FALSE, /* pc_relative. */
1440 1, /* bitpos. */
1441 complain_overflow_dont, /* complain_on_overflow. */
1442 v850_elf_reloc, /* special_function. */
1443 "R_V850_16_S1", /* name. */
1444 FALSE, /* partial_inplace. */
1445 0xfffe, /* src_mask. */
1446 0xfffe, /* dst_mask. */
1447 FALSE), /* pcrel_offset. */
1448
1449 /* Low 16 bits of symbol value. */
1450 HOWTO (R_V850_LO16_S1, /* type. */
1451 1, /* rightshift. */
1452 1, /* size (0 = byte, 1 = short, 2 = long). */
1453 16, /* bitsize. */
1454 FALSE, /* pc_relative. */
1455 1, /* bitpos. */
1456 complain_overflow_dont, /* complain_on_overflow. */
1457 v850_elf_reloc, /* special_function. */
1458 "R_V850_LO16_S1", /* name. */
1459 FALSE, /* partial_inplace. */
1460 0xfffe, /* src_mask. */
1461 0xfffe, /* dst_mask. */
1462 FALSE), /* pcrel_offset. */
1463
1464 /* 16 bit offset from the call table base pointer. */
1465 HOWTO (R_V850_CALLT_15_16_OFFSET, /* type. */
1466 1, /* rightshift. */
1467 1, /* size (0 = byte, 1 = short, 2 = long). */
1468 16, /* bitsize. */
1469 FALSE, /* pc_relative. */
1470 1, /* bitpos. */
1471 complain_overflow_dont, /* complain_on_overflow. */
1472 v850_elf_reloc, /* special_function. */
1473 "R_V850_CALLT_15_16_OFFSET", /* name. */
1474 FALSE, /* partial_inplace. */
1475 0xfffe, /* src_mask. */
1476 0xfffe, /* dst_mask. */
1477 FALSE), /* pcrel_offset. */
1478
1479 /* Like R_V850_32 PCREL, but referring to the GOT table entry for
1480 the symbol. */
1481 HOWTO (R_V850_32_GOTPCREL, /* type. */
1482 0, /* rightshift. */
1483 2, /* size (0 = byte, 1 = short, 2 = long). */
1484 32, /* bitsize. */
1485 TRUE, /* pc_relative. */
1486 0, /* bitpos. */
1487 complain_overflow_unsigned, /* complain_on_overflow. */
1488 v850_elf_reloc, /* special_function. */
1489 "R_V850_32_GOTPCREL", /* name. */
1490 FALSE, /* partial_inplace. */
1491 0xffffffff, /* src_mask. */
1492 0xffffffff, /* dst_mask. */
1493 TRUE), /* pcrel_offset. */
1494
1495 /* Like R_V850_SDA_, but referring to the GOT table entry for
1496 the symbol. */
1497 HOWTO (R_V850_16_GOT, /* type. */
1498 0, /* rightshift. */
1499 2, /* size (0 = byte, 1 = short, 2 = long). */
1500 16, /* bitsize. */
1501 FALSE, /* pc_relative. */
1502 0, /* bitpos. */
1503 complain_overflow_unsigned, /* complain_on_overflow. */
1504 bfd_elf_generic_reloc, /* special_function. */
1505 "R_V850_16_GOT", /* name. */
1506 FALSE, /* partial_inplace. */
1507 0xffff, /* src_mask. */
1508 0xffff, /* dst_mask. */
1509 FALSE), /* pcrel_offset. */
1510
1511 HOWTO (R_V850_32_GOT, /* type. */
1512 0, /* rightshift. */
1513 2, /* size (0 = byte, 1 = short, 2 = long). */
1514 32, /* bitsize. */
1515 FALSE, /* pc_relative. */
1516 0, /* bitpos. */
1517 complain_overflow_unsigned, /* complain_on_overflow. */
1518 bfd_elf_generic_reloc, /* special_function. */
1519 "R_V850_32_GOT", /* name. */
1520 FALSE, /* partial_inplace. */
1521 0xffffffff, /* src_mask. */
1522 0xffffffff, /* dst_mask. */
1523 FALSE), /* pcrel_offset. */
1524
1525 /* Like R_V850_22_PCREL, but referring to the procedure linkage table
1526 entry for the symbol. */
1527 HOWTO (R_V850_22_PLT, /* type. */
1528 1, /* rightshift. */
1529 2, /* size (0 = byte, 1 = short, 2 = long). */
1530 22, /* bitsize. */
1531 TRUE, /* pc_relative. */
1532 7, /* bitpos. */
1533 complain_overflow_signed, /* complain_on_overflow. */
1534 bfd_elf_generic_reloc, /* special_function. */
1535 "R_V850_22_PLT", /* name. */
1536 FALSE, /* partial_inplace. */
1537 0x07ffff80, /* src_mask. */
1538 0x07ffff80, /* dst_mask. */
1539 TRUE), /* pcrel_offset. */
1540
1541 HOWTO (R_V850_32_PLT, /* type. */
1542 1, /* rightshift. */
1543 2, /* size (0 = byte, 1 = short, 2 = long). */
1544 32, /* bitsize. */
1545 TRUE, /* pc_relative. */
1546 1, /* bitpos. */
1547 complain_overflow_signed, /* complain_on_overflow. */
1548 bfd_elf_generic_reloc, /* special_function. */
1549 "R_V850_32_PLT", /* name. */
1550 FALSE, /* partial_inplace. */
1551 0xffffffff, /* src_mask. */
1552 0xffffffff, /* dst_mask. */
1553 TRUE), /* pcrel_offset. */
1554
1555 /* This is used only by the dynamic linker. The symbol should exist
1556 both in the object being run and in some shared library. The
1557 dynamic linker copies the data addressed by the symbol from the
1558 shared library into the object, because the object being
1559 run has to have the data at some particular address. */
1560 HOWTO (R_V850_COPY, /* type. */
1561 0, /* rightshift. */
1562 2, /* size (0 = byte, 1 = short, 2 = long). */
1563 32, /* bitsize. */
1564 FALSE, /* pc_relative. */
1565 0, /* bitpos. */
1566 complain_overflow_bitfield, /* complain_on_overflow. */
1567 bfd_elf_generic_reloc, /* special_function. */
1568 "R_V850_COPY", /* name. */
1569 FALSE, /* partial_inplace. */
1570 0xffffffff, /* src_mask. */
1571 0xffffffff, /* dst_mask. */
1572 FALSE), /* pcrel_offset. */
1573
1574 /* Like R_M32R_24, but used when setting global offset table
1575 entries. */
1576 HOWTO (R_V850_GLOB_DAT, /* type. */
1577 0, /* rightshift. */
1578 2, /* size (0 = byte, 1 = short, 2 = long) */
1579 32, /* bitsize. */
1580 FALSE, /* pc_relative. */
1581 0, /* bitpos. */
1582 complain_overflow_bitfield, /* complain_on_overflow. */
1583 bfd_elf_generic_reloc, /* special_function. */
1584 "R_V850_GLOB_DAT", /* name. */
1585 FALSE, /* partial_inplace. */
1586 0xffffffff, /* src_mask. */
1587 0xffffffff, /* dst_mask. */
1588 FALSE), /* pcrel_offset. */
1589
1590 /* Marks a procedure linkage table entry for a symbol. */
1591 HOWTO (R_V850_JMP_SLOT, /* type. */
1592 0, /* rightshift. */
1593 2, /* size (0 = byte, 1 = short, 2 = long) */
1594 32, /* bitsize. */
1595 FALSE, /* pc_relative. */
1596 0, /* bitpos. */
1597 complain_overflow_bitfield, /* complain_on_overflow. */
1598 bfd_elf_generic_reloc, /* special_function. */
1599 "R_V850_JMP_SLOT", /* name. */
1600 FALSE, /* partial_inplace. */
1601 0xffffffff, /* src_mask. */
1602 0xffffffff, /* dst_mask. */
1603 FALSE), /* pcrel_offset. */
1604
1605 /* Used only by the dynamic linker. When the object is run, this
1606 longword is set to the load address of the object, plus the
1607 addend. */
1608 HOWTO (R_V850_RELATIVE, /* type. */
1609 0, /* rightshift. */
1610 2, /* size (0 = byte, 1 = short, 2 = long) */
1611 32, /* bitsize. */
1612 FALSE, /* pc_relative. */
1613 0, /* bitpos. */
1614 complain_overflow_bitfield, /* complain_on_overflow. */
1615 bfd_elf_generic_reloc, /* special_function. */
1616 "R_V850_RELATIVE", /* name. */
1617 FALSE, /* partial_inplace. */
1618 0xffffffff, /* src_mask. */
1619 0xffffffff, /* dst_mask. */
1620 FALSE), /* pcrel_offset. */
1621
1622 HOWTO (R_V850_16_GOTOFF, /* type. */
1623 0, /* rightshift. */
1624 2, /* size (0 = byte, 1 = short, 2 = long) */
1625 16, /* bitsize. */
1626 FALSE, /* pc_relative. */
1627 0, /* bitpos. */
1628 complain_overflow_bitfield, /* complain_on_overflow. */
1629 bfd_elf_generic_reloc, /* special_function. */
1630 "R_V850_16_GOTOFF", /* name. */
1631 FALSE, /* partial_inplace. */
1632 0xffff, /* src_mask. */
1633 0xffff, /* dst_mask. */
1634 FALSE), /* pcrel_offset. */
1635
1636 HOWTO (R_V850_32_GOTOFF, /* type. */
1637 0, /* rightshift. */
1638 2, /* size (0 = byte, 1 = short, 2 = long) */
1639 32, /* bitsize. */
1640 FALSE, /* pc_relative. */
1641 0, /* bitpos. */
1642 complain_overflow_bitfield, /* complain_on_overflow. */
1643 bfd_elf_generic_reloc, /* special_function. */
1644 "R_V850_32_GOTOFF", /* name. */
1645 FALSE, /* partial_inplace. */
1646 0xffffffff, /* src_mask. */
1647 0xffffffff, /* dst_mask. */
1648 FALSE), /* pcrel_offset. */
1649
1650 HOWTO (R_V850_CODE, /* type. */
1651 0, /* rightshift. */
1652 1, /* size (0 = byte, 1 = short, 2 = long) */
1653 0, /* bitsize. */
1654 FALSE, /* pc_relative. */
1655 0, /* bitpos. */
1656 complain_overflow_unsigned, /* complain_on_overflow. */
1657 v850_elf_ignore_reloc, /* special_function. */
1658 "R_V850_CODE", /* name. */
1659 FALSE, /* partial_inplace. */
1660 0, /* src_mask. */
1661 0, /* dst_mask. */
1662 TRUE), /* pcrel_offset. */
1663
1664 HOWTO (R_V850_DATA, /* type. */
1665 0, /* rightshift. */
1666 1, /* size (0 = byte, 1 = short, 2 = long) */
1667 0, /* bitsize. */
1668 FALSE, /* pc_relative. */
1669 0, /* bitpos. */
1670 complain_overflow_unsigned, /* complain_on_overflow. */
1671 v850_elf_ignore_reloc, /* special_function. */
1672 "R_V850_DATA", /* name. */
1673 FALSE, /* partial_inplace. */
1674 0, /* src_mask. */
1675 0, /* dst_mask. */
1676 TRUE), /* pcrel_offset. */
1677
47b0e7ad
NC
1678};
1679
1680/* Map BFD reloc types to V850 ELF reloc types. */
1681
1682struct v850_elf_reloc_map
1683{
1684 /* BFD_RELOC_V850_CALLT_16_16_OFFSET is 258, which will not fix in an
1685 unsigned char. */
1686 bfd_reloc_code_real_type bfd_reloc_val;
1687 unsigned int elf_reloc_val;
1688};
1689
1690static const struct v850_elf_reloc_map v850_elf_reloc_map[] =
1691{
07d6d2b8
AM
1692 { BFD_RELOC_NONE, R_V850_NONE },
1693 { BFD_RELOC_V850_9_PCREL, R_V850_9_PCREL },
1694 { BFD_RELOC_V850_22_PCREL, R_V850_22_PCREL },
1695 { BFD_RELOC_HI16_S, R_V850_HI16_S },
1696 { BFD_RELOC_HI16, R_V850_HI16 },
1697 { BFD_RELOC_LO16, R_V850_LO16 },
1698 { BFD_RELOC_32, R_V850_ABS32 },
1699 { BFD_RELOC_32_PCREL, R_V850_REL32 },
1700 { BFD_RELOC_16, R_V850_16 },
1701 { BFD_RELOC_8, R_V850_8 },
1702 { BFD_RELOC_V850_SDA_16_16_OFFSET, R_V850_SDA_16_16_OFFSET },
1703 { BFD_RELOC_V850_SDA_15_16_OFFSET, R_V850_SDA_15_16_OFFSET },
1704 { BFD_RELOC_V850_ZDA_16_16_OFFSET, R_V850_ZDA_16_16_OFFSET },
1705 { BFD_RELOC_V850_ZDA_15_16_OFFSET, R_V850_ZDA_15_16_OFFSET },
1706 { BFD_RELOC_V850_TDA_6_8_OFFSET, R_V850_TDA_6_8_OFFSET },
1707 { BFD_RELOC_V850_TDA_7_8_OFFSET, R_V850_TDA_7_8_OFFSET },
1708 { BFD_RELOC_V850_TDA_7_7_OFFSET, R_V850_TDA_7_7_OFFSET },
1709 { BFD_RELOC_V850_TDA_16_16_OFFSET, R_V850_TDA_16_16_OFFSET },
1710 { BFD_RELOC_V850_TDA_4_5_OFFSET, R_V850_TDA_4_5_OFFSET },
1711 { BFD_RELOC_V850_TDA_4_4_OFFSET, R_V850_TDA_4_4_OFFSET },
1712 { BFD_RELOC_V850_LO16_SPLIT_OFFSET, R_V850_LO16_SPLIT_OFFSET },
47b0e7ad
NC
1713 { BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET, R_V850_SDA_16_16_SPLIT_OFFSET },
1714 { BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET, R_V850_ZDA_16_16_SPLIT_OFFSET },
07d6d2b8
AM
1715 { BFD_RELOC_V850_CALLT_6_7_OFFSET, R_V850_CALLT_6_7_OFFSET },
1716 { BFD_RELOC_V850_CALLT_16_16_OFFSET, R_V850_CALLT_16_16_OFFSET },
1717 { BFD_RELOC_VTABLE_INHERIT, R_V850_GNU_VTINHERIT },
1718 { BFD_RELOC_VTABLE_ENTRY, R_V850_GNU_VTENTRY },
1719 { BFD_RELOC_V850_LONGCALL, R_V850_LONGCALL },
1720 { BFD_RELOC_V850_LONGJUMP, R_V850_LONGJUMP },
1721 { BFD_RELOC_V850_ALIGN, R_V850_ALIGN },
1722 { BFD_RELOC_V850_16_PCREL, R_V850_16_PCREL },
1723 { BFD_RELOC_V850_17_PCREL, R_V850_17_PCREL },
1724 { BFD_RELOC_V850_23, R_V850_23 },
1725 { BFD_RELOC_V850_32_PCREL, R_V850_32_PCREL },
1726 { BFD_RELOC_V850_32_ABS, R_V850_32_ABS },
1727 { BFD_RELOC_V850_16_SPLIT_OFFSET, R_V850_HI16 },
1728 { BFD_RELOC_V850_16_S1, R_V850_16_S1 },
1729 { BFD_RELOC_V850_LO16_S1, R_V850_LO16_S1 },
1730 { BFD_RELOC_V850_CALLT_15_16_OFFSET, R_V850_CALLT_15_16_OFFSET },
1731 { BFD_RELOC_V850_32_GOTPCREL, R_V850_32_GOTPCREL },
1732 { BFD_RELOC_V850_16_GOT, R_V850_16_GOT },
1733 { BFD_RELOC_V850_32_GOT, R_V850_32_GOT },
1734 { BFD_RELOC_V850_22_PLT_PCREL, R_V850_22_PLT },
1735 { BFD_RELOC_V850_32_PLT_PCREL, R_V850_32_PLT },
1736 { BFD_RELOC_V850_COPY, R_V850_COPY },
1737 { BFD_RELOC_V850_GLOB_DAT, R_V850_GLOB_DAT },
1738 { BFD_RELOC_V850_JMP_SLOT, R_V850_JMP_SLOT },
1739 { BFD_RELOC_V850_RELATIVE, R_V850_RELATIVE },
1740 { BFD_RELOC_V850_16_GOTOFF, R_V850_16_GOTOFF },
1741 { BFD_RELOC_V850_32_GOTOFF, R_V850_32_GOTOFF },
1742 { BFD_RELOC_V850_CODE, R_V850_CODE },
1743 { BFD_RELOC_V850_DATA, R_V850_DATA },
47b0e7ad 1744};
de863c74
NC
1745
1746#define V800_RELOC(name,sz,bit,shift,complain,pcrel,resolver) \
1747 HOWTO (name, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
1748 bfd_elf_ ## resolver ## _reloc, #name, FALSE, 0, ~0, FALSE)
1749
1750#define V800_EMPTY(name) EMPTY_HOWTO (name - R_V810_NONE)
1751
1752#define bfd_elf_v850_reloc v850_elf_reloc
1753
1754/* Note: It is REQUIRED that the 'type' value (R_V810_...) of each entry
1755 in this array match the index of the entry in the array minus 0x30.
1756 See: bfd_elf_v850_relocate_section(), v800_elf_reloc_type_lookup()
1757 and v800_elf_info_to_howto(). */
1758
1759static reloc_howto_type v800_elf_howto_table[] =
1760{
1761 V800_RELOC (R_V810_NONE, 0, 0, 0, dont, FALSE, generic), /* Type = 0x30 */
1762 V800_RELOC (R_V810_BYTE, 0, 8, 0, dont, FALSE, generic),
1763 V800_RELOC (R_V810_HWORD, 1, 16, 0, dont, FALSE, generic),
1764 V800_RELOC (R_V810_WORD, 2, 32, 0, dont, FALSE, generic),
1765 V800_RELOC (R_V810_WLO, 1, 16, 0, dont, FALSE, generic),
1766 V800_RELOC (R_V810_WHI, 1, 16, 0, dont, FALSE, generic),
1767 V800_RELOC (R_V810_WHI1, 1, 16, 0, dont, FALSE, generic),
1768 V800_RELOC (R_V810_GPBYTE, 0, 8, 0, dont, FALSE, v850),
1769 V800_RELOC (R_V810_GPHWORD, 1, 16, 0, dont, FALSE, v850),
1770 V800_RELOC (R_V810_GPWORD, 2, 32, 0, dont, FALSE, v850),
1771 V800_RELOC (R_V810_GPWLO, 1, 16, 0, dont, FALSE, v850),
1772 V800_RELOC (R_V810_GPWHI, 1, 16, 0, dont, FALSE, v850),
1773 V800_RELOC (R_V810_GPWHI1, 1, 16, 0, dont, FALSE, v850),
1774 V800_RELOC (R_V850_HWLO, 1, 16, 0, dont, FALSE, generic),
1775 V800_EMPTY (R_V810_reserved1),
1776 V800_RELOC (R_V850_EP7BIT, 0, 7, 0, unsigned, FALSE, v850),
1777 V800_RELOC (R_V850_EPHBYTE, 0, 8, 1, unsigned, FALSE, v850),
1778 V800_RELOC (R_V850_EPWBYTE, 0, 8, 2, unsigned, FALSE, v850),
1779 V800_RELOC (R_V850_REGHWLO, 1, 16, 0, dont, FALSE, v850),
1780 V800_EMPTY (R_V810_reserved2),
1781 V800_RELOC (R_V850_GPHWLO, 1, 16, 0, dont, FALSE, v850),
1782 V800_EMPTY (R_V810_reserved3),
1783 V800_RELOC (R_V850_PCR22, 2, 22, 0, signed, TRUE, generic),
1784 V800_RELOC (R_V850_BLO, 2, 24, 0, dont, FALSE, v850),
1785 V800_RELOC (R_V850_EP4BIT, 0, 4, 0, unsigned, FALSE, v850),
1786 V800_RELOC (R_V850_EP5BIT, 0, 5, 0, unsigned, FALSE, v850),
1787 V800_RELOC (R_V850_REGBLO, 2, 24, 0, dont, FALSE, v850),
1788 V800_RELOC (R_V850_GPBLO, 2, 24, 0, dont, FALSE, v850),
1789 V800_RELOC (R_V810_WLO_1, 1, 16, 0, dont, FALSE, v850),
1790 V800_RELOC (R_V810_GPWLO_1, 1, 16, 0, signed, FALSE, v850),
1791 V800_RELOC (R_V850_BLO_1, 2, 16, 0, signed, FALSE, v850),
1792 V800_RELOC (R_V850_HWLO_1, 1, 16, 0, signed, FALSE, v850),
1793 V800_EMPTY (R_V810_reserved4),
1794 V800_RELOC (R_V850_GPBLO_1, 2, 16, 1, signed, FALSE, v850),
1795 V800_RELOC (R_V850_GPHWLO_1, 1, 16, 1, signed, FALSE, v850),
1796 V800_EMPTY (R_V810_reserved5),
1797 V800_RELOC (R_V850_EPBLO, 2, 16, 1, signed, FALSE, v850),
1798 V800_RELOC (R_V850_EPHWLO, 1, 16, 1, signed, FALSE, v850),
1799 V800_EMPTY (R_V810_reserved6),
1800 V800_RELOC (R_V850_EPWLO_N, 1, 16, 1, signed, FALSE, v850),
1801 V800_RELOC (R_V850_PC32, 2, 32, 1, signed, TRUE, v850),
1802 V800_RELOC (R_V850_W23BIT, 2, 23, 1, signed, FALSE, v850),
1803 V800_RELOC (R_V850_GPW23BIT, 2, 23, 1, signed, FALSE, v850),
1804 V800_RELOC (R_V850_EPW23BIT, 2, 23, 1, signed, FALSE, v850),
1805 V800_RELOC (R_V850_B23BIT, 2, 23, 1, signed, FALSE, v850),
1806 V800_RELOC (R_V850_GPB23BIT, 2, 23, 1, signed, FALSE, v850),
1807 V800_RELOC (R_V850_EPB23BIT, 2, 23, 1, signed, FALSE, v850),
1808 V800_RELOC (R_V850_PC16U, 1, 16, 1, unsigned, TRUE, generic),
1809 V800_RELOC (R_V850_PC17, 2, 17, 1, signed, TRUE, generic),
1810 V800_RELOC (R_V850_DW8, 2, 8, 2, signed, FALSE, v850),
1811 V800_RELOC (R_V850_GPDW8, 2, 8, 2, signed, FALSE, v850),
1812 V800_RELOC (R_V850_EPDW8, 2, 8, 2, signed, FALSE, v850),
1813 V800_RELOC (R_V850_PC9, 1, 9, 3, signed, TRUE, v850),
1814 V800_RELOC (R_V810_REGBYTE, 0, 8, 0, dont, FALSE, v850),
1815 V800_RELOC (R_V810_REGHWORD, 1, 16, 0, dont, FALSE, v850),
1816 V800_RELOC (R_V810_REGWORD, 2, 32, 0, dont, FALSE, v850),
1817 V800_RELOC (R_V810_REGWLO, 1, 16, 0, dont, FALSE, v850),
1818 V800_RELOC (R_V810_REGWHI, 1, 16, 0, dont, FALSE, v850),
1819 V800_RELOC (R_V810_REGWHI1, 1, 16, 0, dont, FALSE, v850),
1820 V800_RELOC (R_V850_REGW23BIT, 2, 23, 1, signed, FALSE, v850),
1821 V800_RELOC (R_V850_REGB23BIT, 2, 23, 1, signed, FALSE, v850),
1822 V800_RELOC (R_V850_REGDW8, 2, 8, 2, signed, FALSE, v850),
1823 V800_RELOC (R_V810_EPBYTE, 0, 8, 0, dont, FALSE, v850),
1824 V800_RELOC (R_V810_EPHWORD, 1, 16, 0, dont, FALSE, v850),
1825 V800_RELOC (R_V810_EPWORD, 2, 32, 0, dont, FALSE, v850),
1826 V800_RELOC (R_V850_WLO23, 2, 32, 1, dont, FALSE, v850),
1827 V800_RELOC (R_V850_WORD_E, 2, 32, 1, dont, FALSE, v850),
1828 V800_RELOC (R_V850_REGWORD_E, 2, 32, 1, dont, FALSE, v850),
1829 V800_RELOC (R_V850_WORD, 2, 32, 0, dont, FALSE, v850),
1830 V800_RELOC (R_V850_GPWORD, 2, 32, 0, dont, FALSE, v850),
1831 V800_RELOC (R_V850_REGWORD, 2, 32, 0, dont, FALSE, v850),
1832 V800_RELOC (R_V850_EPWORD, 2, 32, 0, dont, FALSE, v850),
1833 V800_RELOC (R_V810_TPBYTE, 0, 8, 0, dont, FALSE, v850),
1834 V800_RELOC (R_V810_TPHWORD, 1, 16, 0, dont, FALSE, v850),
1835 V800_RELOC (R_V810_TPWORD, 2, 32, 0, dont, FALSE, v850),
1836 V800_RELOC (R_V810_TPWLO, 1, 16, 0, dont, FALSE, v850),
1837 V800_RELOC (R_V810_TPWHI, 1, 16, 0, dont, FALSE, v850),
1838 V800_RELOC (R_V810_TPWHI1, 1, 16, 0, dont, FALSE, v850),
1839 V800_RELOC (R_V850_TPHWLO, 1, 16, 1, dont, FALSE, v850),
1840 V800_RELOC (R_V850_TPBLO, 2, 24, 0, dont, FALSE, v850),
1841 V800_RELOC (R_V810_TPWLO_1, 1, 16, 0, signed, FALSE, v850),
1842 V800_RELOC (R_V850_TPBLO_1, 2, 16, 0, signed, FALSE, v850),
1843 V800_RELOC (R_V850_TPHWLO_1, 1, 16, 0, signed, FALSE, v850),
1844 V800_RELOC (R_V850_TP23BIT, 2, 23, 0, signed, FALSE, v850),
1845 V800_RELOC (R_V850_TPW23BIT, 2, 23, 0, signed, FALSE, v850),
1846 V800_RELOC (R_V850_TPDW8, 2, 8, 0, signed, FALSE, v850)
1847};
47b0e7ad
NC
1848\f
1849/* Map a bfd relocation into the appropriate howto structure. */
1850
1851static reloc_howto_type *
1852v850_elf_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1853 bfd_reloc_code_real_type code)
1854{
1855 unsigned int i;
1856
1857 for (i = ARRAY_SIZE (v850_elf_reloc_map); i --;)
1858 if (v850_elf_reloc_map[i].bfd_reloc_val == code)
1859 {
1860 unsigned int elf_reloc_val = v850_elf_reloc_map[i].elf_reloc_val;
1861
1862 BFD_ASSERT (v850_elf_howto_table[elf_reloc_val].type == elf_reloc_val);
1863
1864 return v850_elf_howto_table + elf_reloc_val;
1865 }
1866
1867 return NULL;
1868}
157090f7
AM
1869
1870static reloc_howto_type *
1871v850_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1872 const char *r_name)
1873{
1874 unsigned int i;
1875
1876 for (i = 0;
1877 i < sizeof (v850_elf_howto_table) / sizeof (v850_elf_howto_table[0]);
1878 i++)
1879 if (v850_elf_howto_table[i].name != NULL
1880 && strcasecmp (v850_elf_howto_table[i].name, r_name) == 0)
1881 return &v850_elf_howto_table[i];
1882
1883 return NULL;
1884}
47b0e7ad
NC
1885\f
1886/* Set the howto pointer for an V850 ELF reloc. */
1887
1888static void
0aa13fee 1889v850_elf_info_to_howto_rel (bfd *abfd,
47b0e7ad
NC
1890 arelent *cache_ptr,
1891 Elf_Internal_Rela *dst)
1892{
1893 unsigned int r_type;
1894
1895 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC
1896 if (r_type >= (unsigned int) R_V850_max)
1897 {
695344c0 1898 /* xgettext:c-format */
0aa13fee
AM
1899 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1900 abfd, r_type);
5860e3f8
NC
1901 r_type = 0;
1902 }
47b0e7ad
NC
1903 cache_ptr->howto = &v850_elf_howto_table[r_type];
1904}
1905
1906/* Set the howto pointer for a V850 ELF reloc (type RELA). */
1907
1908static void
0aa13fee
AM
1909v850_elf_info_to_howto_rela (bfd *abfd,
1910 arelent *cache_ptr,
47b0e7ad
NC
1911 Elf_Internal_Rela *dst)
1912{
1913 unsigned int r_type;
1914
1915 r_type = ELF32_R_TYPE (dst->r_info);
cd21f5da
NC
1916 if (r_type >= (unsigned int) R_V850_max)
1917 {
695344c0 1918 /* xgettext:c-format */
0aa13fee
AM
1919 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1920 abfd, r_type);
cd21f5da
NC
1921 r_type = 0;
1922 }
47b0e7ad
NC
1923 cache_ptr->howto = &v850_elf_howto_table[r_type];
1924}
252b5132 1925\f
b34976b6 1926static bfd_boolean
47b0e7ad 1927v850_elf_is_local_label_name (bfd *abfd ATTRIBUTE_UNUSED, const char *name)
252b5132
RH
1928{
1929 return ( (name[0] == '.' && (name[1] == 'L' || name[1] == '.'))
1930 || (name[0] == '_' && name[1] == '.' && name[2] == 'L' && name[3] == '_'));
1931}
41702d50
NC
1932
1933static bfd_boolean
1934v850_elf_is_target_special_symbol (bfd *abfd, asymbol *sym)
1935{
1936 return v850_elf_is_local_label_name (abfd, sym->name);
1937}
252b5132 1938\f
5cec6941
NC
1939/* We overload some of the bfd_reloc error codes for own purposes. */
1940#define bfd_reloc_gp_not_found bfd_reloc_other
1941#define bfd_reloc_ep_not_found bfd_reloc_continue
1942#define bfd_reloc_ctbp_not_found (bfd_reloc_dangerous + 1)
1943
252b5132 1944/* Perform a relocation as part of a final link. */
e12dd2ea 1945
252b5132 1946static bfd_reloc_status_type
47b0e7ad
NC
1947v850_elf_final_link_relocate (reloc_howto_type *howto,
1948 bfd *input_bfd,
1949 bfd *output_bfd ATTRIBUTE_UNUSED,
1950 asection *input_section,
1951 bfd_byte *contents,
1952 bfd_vma offset,
1953 bfd_vma value,
1954 bfd_vma addend,
1955 struct bfd_link_info *info,
1956 asection *sym_sec,
1957 int is_local ATTRIBUTE_UNUSED)
252b5132 1958{
b34976b6
AM
1959 unsigned int r_type = howto->type;
1960 bfd_byte *hit_data = contents + offset;
252b5132
RH
1961
1962 /* Adjust the value according to the relocation. */
1963 switch (r_type)
1964 {
de863c74 1965 case R_V850_PC9:
252b5132
RH
1966 case R_V850_9_PCREL:
1967 value -= (input_section->output_section->vma
1968 + input_section->output_offset);
1969 value -= offset;
1970 break;
435b1e90 1971
de863c74 1972 case R_V850_PC16U:
1cd986c5
NC
1973 case R_V850_16_PCREL:
1974 value -= (input_section->output_section->vma
1975 + input_section->output_offset
1976 + offset);
1977
1978 /* If the sign extension will corrupt the value then we have overflowed. */
1979 if ((value & 0xffff0000) != 0xffff0000)
1980 return bfd_reloc_overflow;
1981
1982 break;
1983
de863c74 1984 case R_V850_PC17:
1cd986c5
NC
1985 case R_V850_17_PCREL:
1986 value -= (input_section->output_section->vma
1987 + input_section->output_offset
1988 + offset);
1989
1990 /* If the sign extension will corrupt the value then we have overflowed. */
1991 if (((value & 0xffff0000) != 0x0) && ((value & 0xffff0000) != 0xffff0000))
1992 return bfd_reloc_overflow;
1993
1994 value = SEXT17 (value);
1995 break;
1996
de863c74 1997 case R_V850_PCR22:
252b5132
RH
1998 case R_V850_22_PCREL:
1999 value -= (input_section->output_section->vma
2000 + input_section->output_offset
2001 + offset);
2002
232fb1a3 2003 /* If the sign extension will corrupt the value then we have overflowed. */
1cd986c5 2004 if (((value & 0xffe00000) != 0x0) && ((value & 0xffe00000) != 0xffe00000))
232fb1a3 2005 return bfd_reloc_overflow;
435b1e90 2006
1cd986c5
NC
2007 /* Only the bottom 22 bits of the PC are valid. */
2008 value = SEXT22 (value);
252b5132 2009 break;
435b1e90 2010
de863c74 2011 case R_V850_PC32:
1cd986c5 2012 case R_V850_32_PCREL:
e30ddb24
NC
2013 value -= (input_section->output_section->vma
2014 + input_section->output_offset
2015 + offset);
2016 break;
2017
1cd986c5
NC
2018 case R_V850_32_ABS:
2019 case R_V850_23:
252b5132
RH
2020 case R_V850_HI16_S:
2021 case R_V850_HI16:
2022 case R_V850_LO16:
1cd986c5 2023 case R_V850_LO16_S1:
1e50d24d 2024 case R_V850_LO16_SPLIT_OFFSET:
252b5132 2025 case R_V850_16:
e30ddb24 2026 case R_V850_ABS32:
252b5132 2027 case R_V850_8:
de863c74
NC
2028 case R_V810_BYTE:
2029 case R_V810_HWORD:
2030 case R_V810_WORD:
2031 case R_V810_WLO:
2032 case R_V810_WHI:
2033 case R_V810_WHI1:
2034 case R_V810_WLO_1:
2035 case R_V850_WLO23:
2036 case R_V850_BLO:
252b5132
RH
2037 break;
2038
435b1e90 2039 case R_V850_ZDA_15_16_OFFSET:
252b5132
RH
2040 case R_V850_ZDA_16_16_OFFSET:
2041 case R_V850_ZDA_16_16_SPLIT_OFFSET:
2042 if (sym_sec == NULL)
2043 return bfd_reloc_undefined;
435b1e90 2044
252b5132
RH
2045 value -= sym_sec->output_section->vma;
2046 break;
2047
2048 case R_V850_SDA_15_16_OFFSET:
2049 case R_V850_SDA_16_16_OFFSET:
2050 case R_V850_SDA_16_16_SPLIT_OFFSET:
de863c74 2051 case R_V810_GPWLO_1:
252b5132 2052 {
07d6d2b8 2053 unsigned long gp;
252b5132
RH
2054 struct bfd_link_hash_entry * h;
2055
2056 if (sym_sec == NULL)
2057 return bfd_reloc_undefined;
435b1e90 2058
252b5132 2059 /* Get the value of __gp. */
b34976b6 2060 h = bfd_link_hash_lookup (info->hash, "__gp", FALSE, FALSE, TRUE);
47b0e7ad 2061 if (h == NULL
252b5132 2062 || h->type != bfd_link_hash_defined)
5cec6941 2063 return bfd_reloc_gp_not_found;
252b5132
RH
2064
2065 gp = (h->u.def.value
2066 + h->u.def.section->output_section->vma
2067 + h->u.def.section->output_offset);
2068
2069 value -= sym_sec->output_section->vma;
2070 value -= (gp - sym_sec->output_section->vma);
2071 }
2072 break;
2073
2074 case R_V850_TDA_4_4_OFFSET:
2075 case R_V850_TDA_4_5_OFFSET:
252b5132
RH
2076 case R_V850_TDA_7_7_OFFSET:
2077 case R_V850_TDA_7_8_OFFSET:
2078 case R_V850_TDA_6_8_OFFSET:
1cd986c5 2079 case R_V850_TDA_16_16_OFFSET:
252b5132 2080 {
07d6d2b8 2081 unsigned long ep;
252b5132 2082 struct bfd_link_hash_entry * h;
435b1e90 2083
252b5132 2084 /* Get the value of __ep. */
b34976b6 2085 h = bfd_link_hash_lookup (info->hash, "__ep", FALSE, FALSE, TRUE);
47b0e7ad 2086 if (h == NULL
252b5132 2087 || h->type != bfd_link_hash_defined)
5cec6941 2088 return bfd_reloc_ep_not_found;
252b5132
RH
2089
2090 ep = (h->u.def.value
2091 + h->u.def.section->output_section->vma
2092 + h->u.def.section->output_offset);
2093
2094 value -= ep;
2095 }
2096 break;
435b1e90 2097
252b5132
RH
2098 case R_V850_CALLT_6_7_OFFSET:
2099 {
07d6d2b8 2100 unsigned long ctbp;
252b5132 2101 struct bfd_link_hash_entry * h;
435b1e90 2102
252b5132 2103 /* Get the value of __ctbp. */
b34976b6 2104 h = bfd_link_hash_lookup (info->hash, "__ctbp", FALSE, FALSE, TRUE);
47b0e7ad 2105 if (h == NULL
252b5132 2106 || h->type != bfd_link_hash_defined)
5cec6941 2107 return bfd_reloc_ctbp_not_found;
252b5132
RH
2108
2109 ctbp = (h->u.def.value
2110 + h->u.def.section->output_section->vma
2111 + h->u.def.section->output_offset);
2112 value -= ctbp;
2113 }
2114 break;
435b1e90 2115
1cd986c5 2116 case R_V850_CALLT_15_16_OFFSET:
252b5132
RH
2117 case R_V850_CALLT_16_16_OFFSET:
2118 {
07d6d2b8 2119 unsigned long ctbp;
252b5132
RH
2120 struct bfd_link_hash_entry * h;
2121
2122 if (sym_sec == NULL)
2123 return bfd_reloc_undefined;
435b1e90 2124
252b5132 2125 /* Get the value of __ctbp. */
b34976b6 2126 h = bfd_link_hash_lookup (info->hash, "__ctbp", FALSE, FALSE, TRUE);
47b0e7ad 2127 if (h == NULL
252b5132 2128 || h->type != bfd_link_hash_defined)
5cec6941 2129 return bfd_reloc_ctbp_not_found;
252b5132
RH
2130
2131 ctbp = (h->u.def.value
2132 + h->u.def.section->output_section->vma
2133 + h->u.def.section->output_offset);
2134
2135 value -= sym_sec->output_section->vma;
2136 value -= (ctbp - sym_sec->output_section->vma);
2137 }
2138 break;
435b1e90 2139
252b5132 2140 case R_V850_NONE:
de863c74 2141 case R_V810_NONE:
252b5132
RH
2142 case R_V850_GNU_VTINHERIT:
2143 case R_V850_GNU_VTENTRY:
86aba9db
NC
2144 case R_V850_LONGCALL:
2145 case R_V850_LONGJUMP:
2146 case R_V850_ALIGN:
252b5132
RH
2147 return bfd_reloc_ok;
2148
2149 default:
de863c74 2150#ifdef DEBUG
0aa13fee
AM
2151 _bfd_error_handler ("%pB: unsupported relocation type %#x",
2152 input_bfd, r_type);
de863c74 2153#endif
252b5132
RH
2154 return bfd_reloc_notsupported;
2155 }
2156
2157 /* Perform the relocation. */
435b1e90 2158 return v850_elf_perform_relocation (input_bfd, r_type, value + addend, hit_data);
252b5132 2159}
252b5132
RH
2160\f
2161/* Relocate an V850 ELF section. */
e12dd2ea 2162
b34976b6 2163static bfd_boolean
47b0e7ad
NC
2164v850_elf_relocate_section (bfd *output_bfd,
2165 struct bfd_link_info *info,
2166 bfd *input_bfd,
2167 asection *input_section,
2168 bfd_byte *contents,
2169 Elf_Internal_Rela *relocs,
2170 Elf_Internal_Sym *local_syms,
2171 asection **local_sections)
252b5132 2172{
b34976b6
AM
2173 Elf_Internal_Shdr *symtab_hdr;
2174 struct elf_link_hash_entry **sym_hashes;
2175 Elf_Internal_Rela *rel;
2176 Elf_Internal_Rela *relend;
252b5132
RH
2177
2178 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
2179 sym_hashes = elf_sym_hashes (input_bfd);
2180
252b5132
RH
2181 /* Reset the list of remembered HI16S relocs to empty. */
2182 free_hi16s = previous_hi16s;
2183 previous_hi16s = NULL;
2184 hi16s_counter = 0;
435b1e90 2185
252b5132
RH
2186 rel = relocs;
2187 relend = relocs + input_section->reloc_count;
2188 for (; rel < relend; rel++)
2189 {
de863c74 2190 unsigned int r_type;
b34976b6
AM
2191 reloc_howto_type *howto;
2192 unsigned long r_symndx;
2193 Elf_Internal_Sym *sym;
2194 asection *sec;
2195 struct elf_link_hash_entry *h;
2196 bfd_vma relocation;
2197 bfd_reloc_status_type r;
252b5132
RH
2198
2199 r_symndx = ELF32_R_SYM (rel->r_info);
2200 r_type = ELF32_R_TYPE (rel->r_info);
2201
2202 if (r_type == R_V850_GNU_VTENTRY
07d6d2b8
AM
2203 || r_type == R_V850_GNU_VTINHERIT)
2204 continue;
252b5132 2205
de863c74
NC
2206 if (bfd_get_arch (input_bfd) == bfd_arch_v850_rh850)
2207 howto = v800_elf_howto_table + (r_type - R_V810_NONE);
2208 else
2209 howto = v850_elf_howto_table + r_type;
2210
2211 BFD_ASSERT (r_type == howto->type);
2212
252b5132
RH
2213 h = NULL;
2214 sym = NULL;
2215 sec = NULL;
2216 if (r_symndx < symtab_hdr->sh_info)
2217 {
2218 sym = local_syms + r_symndx;
2219 sec = local_sections[r_symndx];
8517fae7 2220 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH
2221 }
2222 else
2223 {
62d887d4 2224 bfd_boolean unresolved_reloc, warned, ignored;
435b1e90 2225
47b0e7ad
NC
2226 /* Note - this check is delayed until now as it is possible and
2227 valid to have a file without any symbols but with relocs that
2228 can be processed. */
641bd093
NC
2229 if (sym_hashes == NULL)
2230 {
2231 info->callbacks->warning
2232 (info, "no hash table available",
2233 NULL, input_bfd, input_section, (bfd_vma) 0);
2234
2235 return FALSE;
2236 }
2237
b2a8e766
AM
2238 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
2239 r_symndx, symtab_hdr, sym_hashes,
2240 h, sec, relocation,
62d887d4 2241 unresolved_reloc, warned, ignored);
252b5132
RH
2242 }
2243
dbaa2011 2244 if (sec != NULL && discarded_section (sec))
e4067dbb 2245 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 2246 rel, 1, relend, howto, 0, contents);
ab96bf03 2247
0e1862bb 2248 if (bfd_link_relocatable (info))
ab96bf03
AM
2249 continue;
2250
e12dd2ea 2251 /* FIXME: We should use the addend, but the COFF relocations don't. */
252b5132
RH
2252 r = v850_elf_final_link_relocate (howto, input_bfd, output_bfd,
2253 input_section,
2254 contents, rel->r_offset,
2255 relocation, rel->r_addend,
2256 info, sec, h == NULL);
2257
2258 if (r != bfd_reloc_ok)
2259 {
2260 const char * name;
47b0e7ad 2261 const char * msg = NULL;
252b5132
RH
2262
2263 if (h != NULL)
2264 name = h->root.root.string;
2265 else
2266 {
2267 name = (bfd_elf_string_from_elf_section
2268 (input_bfd, symtab_hdr->sh_link, sym->st_name));
2269 if (name == NULL || *name == '\0')
2270 name = bfd_section_name (input_bfd, sec);
2271 }
2272
ceaf50a2 2273 switch ((int) r)
252b5132
RH
2274 {
2275 case bfd_reloc_overflow:
1a72702b
AM
2276 (*info->callbacks->reloc_overflow)
2277 (info, (h ? &h->root : NULL), name, howto->name,
2278 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
252b5132
RH
2279 break;
2280
2281 case bfd_reloc_undefined:
1a72702b
AM
2282 (*info->callbacks->undefined_symbol)
2283 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
252b5132
RH
2284 break;
2285
2286 case bfd_reloc_outofrange:
2287 msg = _("internal error: out of range error");
2288 goto common_error;
2289
2290 case bfd_reloc_notsupported:
2291 msg = _("internal error: unsupported relocation error");
2292 goto common_error;
2293
2294 case bfd_reloc_dangerous:
2295 msg = _("internal error: dangerous relocation");
2296 goto common_error;
2297
5cec6941 2298 case bfd_reloc_gp_not_found:
252b5132
RH
2299 msg = _("could not locate special linker symbol __gp");
2300 goto common_error;
2301
5cec6941 2302 case bfd_reloc_ep_not_found:
252b5132
RH
2303 msg = _("could not locate special linker symbol __ep");
2304 goto common_error;
2305
5cec6941 2306 case bfd_reloc_ctbp_not_found:
252b5132
RH
2307 msg = _("could not locate special linker symbol __ctbp");
2308 goto common_error;
435b1e90 2309
252b5132
RH
2310 default:
2311 msg = _("internal error: unknown error");
2312 /* fall through */
2313
2314 common_error:
1a72702b
AM
2315 (*info->callbacks->warning) (info, msg, name, input_bfd,
2316 input_section, rel->r_offset);
252b5132
RH
2317 break;
2318 }
2319 }
2320 }
2321
b34976b6 2322 return TRUE;
252b5132
RH
2323}
2324
252b5132 2325static asection *
47b0e7ad 2326v850_elf_gc_mark_hook (asection *sec,
07adf181 2327 struct bfd_link_info *info,
47b0e7ad
NC
2328 Elf_Internal_Rela *rel,
2329 struct elf_link_hash_entry *h,
2330 Elf_Internal_Sym *sym)
252b5132
RH
2331{
2332 if (h != NULL)
07adf181 2333 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH
2334 {
2335 case R_V850_GNU_VTINHERIT:
2336 case R_V850_GNU_VTENTRY:
07adf181
AM
2337 return NULL;
2338 }
9ad5cbcf 2339
07adf181 2340 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132 2341}
e12dd2ea 2342
685080f2
NC
2343static void
2344v850_set_note (bfd * abfd, asection * s, enum v850_notes note, unsigned int val)
2345{
2346 bfd_byte * data = s->contents + ((note - 1) * SIZEOF_V850_NOTE);
2347
2348 bfd_put_32 (abfd, 4, data + 0);
2349 bfd_put_32 (abfd, 4, data + 4);
2350 bfd_put_32 (abfd, note, data + 8);
2351 memcpy (data + 12, V850_NOTE_NAME, 4);
2352 bfd_put_32 (abfd, val, data + 16);
2353}
2354
2355/* Create the note section if not already present. This is done early so
2356 that the linker maps the sections to the right place in the output. */
2357
2358static asection *
2359v850_elf_make_note_section (bfd * abfd)
1b786873 2360{
685080f2
NC
2361 asection *s;
2362 bfd_byte *data;
2363 flagword flags;
2364 enum v850_notes id;
2365
2366 /* Make the note section. */
2367 flags = SEC_READONLY | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_MERGE;
2368
2369 s = bfd_make_section_anyway_with_flags (abfd, V850_NOTE_SECNAME, flags);
2370 if (s == NULL)
2371 return NULL;
2372
2373 if (!bfd_set_section_alignment (abfd, s, 2))
2374 return NULL;
2375
2376 /* Allocate space for all known notes. */
2377 if (!bfd_set_section_size (abfd, s, NUM_V850_NOTES * SIZEOF_V850_NOTE))
2378 return NULL;
2379
2380 data = bfd_zalloc (abfd, NUM_V850_NOTES * SIZEOF_V850_NOTE);
2381 if (data == NULL)
2382 return NULL;
2383
2384 s->contents = data;
2385
2386 /* Provide default (= uninitilaised) values for all of the notes. */
2387 for (id = V850_NOTE_ALIGNMENT; id <= NUM_V850_NOTES; id++)
2388 v850_set_note (abfd, s, id, 0);
2389
2390 return s;
2391}
2392
2393/* Create the note section if not already present. This is done early so
2394 that the linker maps the sections to the right place in the output. */
2395
2396bfd_boolean
2397v850_elf_create_sections (struct bfd_link_info * info)
2398{
2399 bfd * ibfd;
2400
2401 /* If we already have a note section, do not make another. */
2402 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
2403 if (bfd_get_section_by_name (ibfd, V850_NOTE_SECNAME) != NULL)
2404 return TRUE;
2405
2406 return v850_elf_make_note_section (info->input_bfds) != NULL;
2407}
2408
2409bfd_boolean
2410v850_elf_set_note (bfd * abfd, enum v850_notes note, unsigned int val)
2411{
2412 asection * notes = bfd_get_section_by_name (abfd, V850_NOTE_SECNAME);
2413
2414 if (val > 2)
2415 /* At the moment, no known note has a value over 2. */
2416 return FALSE;
2417
2418 if (notes == NULL)
2419 notes = v850_elf_make_note_section (abfd);
2420 if (notes == NULL)
2421 return FALSE;
2422
2423 v850_set_note (abfd, notes, note, val);
2424 return TRUE;
2425}
2426
71de3413 2427/* Copy a v850 note section from one object module to another. */
685080f2 2428
71de3413
MR
2429static void
2430v850_elf_copy_notes (bfd *ibfd, bfd *obfd)
685080f2
NC
2431{
2432 asection * onotes;
2433 asection * inotes;
2434
2435 /* If the output bfd does not have a note section, then
2436 skip the merge. The normal input to output section
2437 copying will take care of everythng for us. */
2438 if ((onotes = bfd_get_section_by_name (obfd, V850_NOTE_SECNAME)) == NULL)
71de3413 2439 return;
685080f2 2440
e43fb831 2441 if ((inotes = bfd_get_section_by_name (ibfd, V850_NOTE_SECNAME)) == NULL)
71de3413 2442 return;
e43fb831
AM
2443
2444 if (bfd_section_size (ibfd, inotes) == bfd_section_size (obfd, onotes))
685080f2
NC
2445 {
2446 bfd_byte * icont;
2447 bfd_byte * ocont;
2448
685080f2
NC
2449 if ((icont = elf_section_data (inotes)->this_hdr.contents) == NULL)
2450 BFD_ASSERT (bfd_malloc_and_get_section (ibfd, inotes, & icont));
2451
2452 if ((ocont = elf_section_data (onotes)->this_hdr.contents) == NULL)
cfd14a50
NC
2453 /* If the output is being stripped then it is possible for
2454 the notes section to disappear. In this case do nothing. */
2455 return;
685080f2
NC
2456
2457 /* Copy/overwrite notes from the input to the output. */
2458 memcpy (ocont, icont, bfd_section_size (obfd, onotes));
2459 }
71de3413 2460}
685080f2 2461
71de3413
MR
2462/* Copy backend specific data from one object module to another. */
2463
2464static bfd_boolean
2465v850_elf_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
2466{
2467 v850_elf_copy_notes (ibfd, obfd);
2468 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
685080f2
NC
2469}
2470#define bfd_elf32_bfd_copy_private_bfd_data v850_elf_copy_private_bfd_data
2471
1b786873 2472static bfd_boolean
685080f2
NC
2473v850_elf_merge_notes (bfd * ibfd, bfd *obfd)
2474{
2475 asection * onotes;
2476 asection * inotes;
2477 bfd_boolean result = TRUE;
2478
2479 /* If the output bfd does not have a note section, then
2480 skip the merge. The normal input to output section
2481 copying will take care of everythng for us. */
2482 if ((onotes = bfd_get_section_by_name (obfd, V850_NOTE_SECNAME)) == NULL)
2483 return TRUE;
2484
2485 if ((inotes = bfd_get_section_by_name (ibfd, V850_NOTE_SECNAME)) != NULL)
2486 {
2487 enum v850_notes id;
2488 bfd_byte * icont;
2489 bfd_byte * ocont;
2490
2491 BFD_ASSERT (bfd_section_size (ibfd, inotes) == bfd_section_size (obfd, onotes));
2492
2493 if ((icont = elf_section_data (inotes)->this_hdr.contents) == NULL)
2494 BFD_ASSERT (bfd_malloc_and_get_section (ibfd, inotes, & icont));
2495
2496 if ((ocont = elf_section_data (onotes)->this_hdr.contents) == NULL)
2497 BFD_ASSERT (bfd_malloc_and_get_section (obfd, onotes, & ocont));
2498
2499 for (id = V850_NOTE_ALIGNMENT; id <= NUM_V850_NOTES; id++)
2500 {
2501 unsigned int ival;
2502 unsigned int oval;
2503 bfd_byte * idata = icont + ((id - 1) * SIZEOF_V850_NOTE) + 16;
2504 bfd_byte * odata = ocont + ((id - 1) * SIZEOF_V850_NOTE) + 16;
2505
2506 ival = bfd_get_32 (ibfd, idata);
2507 oval = bfd_get_32 (obfd, odata);
2508
2509 if (ival == 0 || ival == oval)
2510 continue;
1b786873 2511
685080f2
NC
2512 if (oval == 0)
2513 {
2514 bfd_put_32 (obfd, ival, odata);
2515 v850_set_note (obfd, onotes, id, ival);
2516 continue;
2517 }
2518
2519 /* We have a mismatch. The ABI defines how to handle
2520 this siutation on a per note type basis. */
2521 switch (id)
2522 {
2523 case V850_NOTE_ALIGNMENT:
2524 if (oval == EF_RH850_DATA_ALIGN4)
2525 {
2526 _bfd_error_handler
695344c0 2527 /* xgettext:c-format */
871b3ab2 2528 (_("error: %pB needs 8-byte alignment but %pB is set for 4-byte alignment"),
685080f2
NC
2529 ibfd, obfd);
2530 result = FALSE;
2531 }
2532 else
2533 /* ibfd uses 4-byte alignment, obfd uses 8-byte alignment.
2534 Leave the obfd alignment as it is. */
2535 BFD_ASSERT (oval == EF_RH850_DATA_ALIGN8);
2536
2537 break;
2538
2539 case V850_NOTE_DATA_SIZE:
2540 if (oval == EF_RH850_DOUBLE32)
2541 {
4eca0228 2542 _bfd_error_handler
695344c0 2543 /* xgettext:c-format */
871b3ab2
AM
2544 (_("error: %pB uses 64-bit doubles but "
2545 "%pB uses 32-bit doubles"), ibfd, obfd);
685080f2
NC
2546 result = FALSE;
2547 }
2548 else
2549 /* ibfd uses 32-bit doubles, obfd uses 64-bit doubles.
2550 This is acceptable. Honest, that is what the ABI says. */
2551 BFD_ASSERT (oval == EF_RH850_DOUBLE64);
2552 break;
2553
2554 case V850_NOTE_FPU_INFO:
2555 if (oval == EF_RH850_FPU20)
2556 {
4eca0228 2557 _bfd_error_handler
695344c0 2558 /* xgettext:c-format */
871b3ab2 2559 (_("error: %pB uses FPU-3.0 but %pB only supports FPU-2.0"),
4eca0228 2560 ibfd, obfd);
685080f2
NC
2561 result = FALSE;
2562 }
2563 else
2564 /* ibfd uses FPU-2.0, obfd uses FPU-3.0. Leave obfd as it is. */
2565 BFD_ASSERT (oval == EF_RH850_FPU30);
2566
2567 break;
2568
2569 default:
2570 /* None of the other conflicts matter.
2571 Stick with the current output values. */
2572 break;
2573 }
2574 }
2575
2576 /* FIXME: We should also check for conflicts between the notes
2577 and the EF flags in the ELF header. */
2578 }
2579
2580 return result;
2581}
2582
2583static void
2584print_v850_note (bfd * abfd, FILE * file, bfd_byte * data, enum v850_notes id)
2585{
2586 unsigned int value = bfd_get_32 (abfd, data + ((id - 1) * SIZEOF_V850_NOTE) + 16);
2587
2588 switch (id)
2589 {
2590 case V850_NOTE_ALIGNMENT:
2591 fprintf (file, _(" alignment of 8-byte entities: "));
2592 switch (value)
2593 {
2594 case EF_RH850_DATA_ALIGN4: fprintf (file, _("4-byte")); break;
2595 case EF_RH850_DATA_ALIGN8: fprintf (file, _("8-byte")); break;
2596 case 0: fprintf (file, _("not set")); break;
2597 default: fprintf (file, _("unknown: %x"), value); break;
2598 }
2599 fputc ('\n', file);
2600 break;
1b786873 2601
685080f2
NC
2602 case V850_NOTE_DATA_SIZE:
2603 fprintf (file, _(" size of doubles: "));
2604 switch (value)
2605 {
2606 case EF_RH850_DOUBLE32: fprintf (file, _("4-bytes")); break;
2607 case EF_RH850_DOUBLE64: fprintf (file, _("8-bytes")); break;
2608 case 0: fprintf (file, _("not set")); break;
2609 default: fprintf (file, _("unknown: %x"), value); break;
2610 }
2611 fputc ('\n', file);
2612 break;
1b786873 2613
685080f2
NC
2614 case V850_NOTE_FPU_INFO:
2615 fprintf (file, _(" FPU support required: "));
2616 switch (value)
2617 {
2618 case EF_RH850_FPU20: fprintf (file, _("FPU-2.0")); break;
2619 case EF_RH850_FPU30: fprintf (file, _("FPU-3.0")); break;
2620 case 0: fprintf (file, _("none")); break;
2621 default: fprintf (file, _("unknown: %x"), value); break;
2622 }
2623 fputc ('\n', file);
2624 break;
1b786873 2625
685080f2
NC
2626 case V850_NOTE_SIMD_INFO:
2627 fprintf (file, _("SIMD use: "));
2628 switch (value)
2629 {
2630 case EF_RH850_SIMD: fprintf (file, _("yes")); break;
2631 case 0: fprintf (file, _("no")); break;
2632 default: fprintf (file, _("unknown: %x"), value); break;
2633 }
2634 fputc ('\n', file);
2635 break;
1b786873 2636
685080f2
NC
2637 case V850_NOTE_CACHE_INFO:
2638 fprintf (file, _("CACHE use: "));
2639 switch (value)
2640 {
2641 case EF_RH850_CACHE: fprintf (file, _("yes")); break;
2642 case 0: fprintf (file, _("no")); break;
2643 default: fprintf (file, _("unknown: %x"), value); break;
2644 }
2645 fputc ('\n', file);
2646 break;
1b786873 2647
685080f2
NC
2648 case V850_NOTE_MMU_INFO:
2649 fprintf (file, _("MMU use: "));
2650 switch (value)
2651 {
2652 case EF_RH850_MMU: fprintf (file, _("yes")); break;
2653 case 0: fprintf (file, _("no")); break;
2654 default: fprintf (file, _("unknown: %x"), value); break;
2655 }
2656 fputc ('\n', file);
2657 break;
1b786873 2658
685080f2
NC
2659 default:
2660 BFD_ASSERT (0);
2661 }
2662}
2663
2664static void
2665v850_elf_print_notes (bfd * abfd, FILE * file)
2666{
2667 asection * notes = bfd_get_section_by_name (abfd, V850_NOTE_SECNAME);
2668 enum v850_notes id;
2669
2670 if (notes == NULL || notes->contents == NULL)
2671 return;
2672
2673 BFD_ASSERT (bfd_section_size (abfd, notes) == NUM_V850_NOTES * SIZEOF_V850_NOTE);
2674
2675 for (id = V850_NOTE_ALIGNMENT; id <= NUM_V850_NOTES; id++)
2676 print_v850_note (abfd, file, notes->contents, id);
2677}
2678
de863c74 2679/* Set the right machine number and architecture. */
e12dd2ea 2680
b34976b6 2681static bfd_boolean
47b0e7ad 2682v850_elf_object_p (bfd *abfd)
252b5132 2683{
de863c74
NC
2684 enum bfd_architecture arch;
2685 unsigned long mach;
2686
2687 switch (elf_elfheader (abfd)->e_machine)
252b5132 2688 {
de863c74
NC
2689 case EM_V800:
2690 arch = bfd_arch_v850_rh850;
78c8d46c
NC
2691 mach = (elf_elfheader (abfd)->e_flags & EF_V800_850E3)
2692 ? bfd_mach_v850e3v5 : bfd_mach_v850e2v3;
8ad30312 2693 break;
de863c74
NC
2694
2695 case EM_CYGNUS_V850:
2696 case EM_V850:
2697 arch = bfd_arch_v850;
2698 switch (elf_elfheader (abfd)->e_flags & EF_V850_ARCH)
2699 {
2700 default:
2701 case E_V850_ARCH: mach = bfd_mach_v850; break;
2702 case E_V850E_ARCH: mach = bfd_mach_v850e; break;
2703 case E_V850E1_ARCH: mach = bfd_mach_v850e1; break;
2704 case E_V850E2_ARCH: mach = bfd_mach_v850e2; break;
2705 case E_V850E2V3_ARCH: mach = bfd_mach_v850e2v3; break;
78c8d46c 2706 case E_V850E3V5_ARCH: mach = bfd_mach_v850e3v5; break;
de863c74 2707 }
1cd986c5 2708 break;
de863c74
NC
2709
2710 default:
2711 return FALSE;
252b5132 2712 }
de863c74
NC
2713
2714 return bfd_default_set_arch_mach (abfd, arch, mach);
252b5132
RH
2715}
2716
2717/* Store the machine number in the flags field. */
e12dd2ea 2718
252b5132 2719static void
47b0e7ad
NC
2720v850_elf_final_write_processing (bfd *abfd,
2721 bfd_boolean linker ATTRIBUTE_UNUSED)
252b5132
RH
2722{
2723 unsigned long val;
2724
de863c74 2725 switch (bfd_get_arch (abfd))
252b5132 2726 {
de863c74
NC
2727 case bfd_arch_v850_rh850:
2728 val = EF_RH850_ABI;
78c8d46c
NC
2729 if (bfd_get_mach (abfd) == bfd_mach_v850e3v5)
2730 val |= EF_V800_850E3;
de863c74
NC
2731 elf_elfheader (abfd)->e_flags |= val;
2732 break;
2733
2734 case bfd_arch_v850:
2735 switch (bfd_get_mach (abfd))
2736 {
2737 default:
2738 case bfd_mach_v850: val = E_V850_ARCH; break;
2739 case bfd_mach_v850e: val = E_V850E_ARCH; break;
2740 case bfd_mach_v850e1: val = E_V850E1_ARCH; break;
2741 case bfd_mach_v850e2: val = E_V850E2_ARCH; break;
2742 case bfd_mach_v850e2v3: val = E_V850E2V3_ARCH; break;
78c8d46c 2743 case bfd_mach_v850e3v5: val = E_V850E3V5_ARCH; break;
de863c74
NC
2744 }
2745 elf_elfheader (abfd)->e_flags &=~ EF_V850_ARCH;
2746 elf_elfheader (abfd)->e_flags |= val;
2747 break;
b34976b6 2748 default:
de863c74 2749 break;
252b5132 2750 }
252b5132
RH
2751}
2752
435b1e90 2753/* Function to keep V850 specific file flags. */
e12dd2ea 2754
b34976b6 2755static bfd_boolean
47b0e7ad 2756v850_elf_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH
2757{
2758 BFD_ASSERT (!elf_flags_init (abfd)
2759 || elf_elfheader (abfd)->e_flags == flags);
2760
2761 elf_elfheader (abfd)->e_flags = flags;
b34976b6
AM
2762 elf_flags_init (abfd) = TRUE;
2763 return TRUE;
252b5132
RH
2764}
2765
e12dd2ea
NC
2766/* Merge backend specific data from an object file
2767 to the output object file when linking. */
47b0e7ad 2768
b34976b6 2769static bfd_boolean
50e03d47 2770v850_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
252b5132 2771{
50e03d47 2772 bfd *obfd = info->output_bfd;
252b5132
RH
2773 flagword out_flags;
2774 flagword in_flags;
685080f2 2775 bfd_boolean result = TRUE;
252b5132
RH
2776
2777 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
2778 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
b34976b6 2779 return TRUE;
252b5132 2780
685080f2
NC
2781 result &= v850_elf_merge_notes (ibfd, obfd);
2782
252b5132
RH
2783 in_flags = elf_elfheader (ibfd)->e_flags;
2784 out_flags = elf_elfheader (obfd)->e_flags;
2785
2786 if (! elf_flags_init (obfd))
2787 {
2788 /* If the input is the default architecture then do not
2789 bother setting the flags for the output architecture,
2790 instead allow future merges to do this. If no future
2791 merges ever set these flags then they will retain their
2792 unitialised values, which surprise surprise, correspond
2793 to the default values. */
2794 if (bfd_get_arch_info (ibfd)->the_default)
b34976b6 2795 return TRUE;
435b1e90 2796
b34976b6 2797 elf_flags_init (obfd) = TRUE;
252b5132
RH
2798 elf_elfheader (obfd)->e_flags = in_flags;
2799
2800 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
2801 && bfd_get_arch_info (obfd)->the_default)
685080f2 2802 result &= bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
252b5132 2803
685080f2 2804 return result;
252b5132
RH
2805 }
2806
2807 /* Check flag compatibility. */
2808 if (in_flags == out_flags)
685080f2 2809 return result;
252b5132 2810
de863c74
NC
2811 if (bfd_get_arch (obfd) == bfd_arch_v850_rh850)
2812 {
2813 if ((in_flags & EF_V800_850E3) != (out_flags & EF_V800_850E3))
2814 {
4eca0228 2815 _bfd_error_handler
38f14ab8 2816 (_("%pB: architecture mismatch with previous modules"), ibfd);
de863c74
NC
2817 elf_elfheader (obfd)->e_flags |= EF_V800_850E3;
2818 }
2819
685080f2 2820 return result;
de863c74
NC
2821 }
2822
252b5132
RH
2823 if ((in_flags & EF_V850_ARCH) != (out_flags & EF_V850_ARCH)
2824 && (in_flags & EF_V850_ARCH) != E_V850_ARCH)
8ad30312 2825 {
de863c74 2826 /* Allow earlier architecture binaries to be linked with later binaries.
07d6d2b8
AM
2827 Set the output binary to the later architecture, except for v850e1,
2828 which we set to v850e. */
de863c74 2829 if ( (in_flags & EF_V850_ARCH) == E_V850E1_ARCH
07d6d2b8
AM
2830 && (out_flags & EF_V850_ARCH) == E_V850E_ARCH)
2831 return result;
8ad30312 2832
de863c74 2833 if ( (in_flags & EF_V850_ARCH) == E_V850_ARCH
1cd986c5 2834 && (out_flags & EF_V850_ARCH) == E_V850E_ARCH)
8ad30312
NC
2835 {
2836 elf_elfheader (obfd)->e_flags =
2837 ((out_flags & ~ EF_V850_ARCH) | E_V850E_ARCH);
685080f2 2838 return result;
8ad30312
NC
2839 }
2840
de863c74 2841 if (( (in_flags & EF_V850_ARCH) == E_V850_ARCH
1cd986c5
NC
2842 || (in_flags & EF_V850_ARCH) == E_V850E_ARCH)
2843 && (out_flags & EF_V850_ARCH) == E_V850E2_ARCH)
2844 {
2845 elf_elfheader (obfd)->e_flags =
2846 ((out_flags & ~ EF_V850_ARCH) | E_V850E2_ARCH);
685080f2 2847 return result;
1cd986c5
NC
2848 }
2849
de863c74 2850 if (( (in_flags & EF_V850_ARCH) == E_V850_ARCH
1cd986c5
NC
2851 || (in_flags & EF_V850_ARCH) == E_V850E_ARCH
2852 || (in_flags & EF_V850_ARCH) == E_V850E2_ARCH)
2853 && (out_flags & EF_V850_ARCH) == E_V850E2V3_ARCH)
2854 {
2855 elf_elfheader (obfd)->e_flags =
2856 ((out_flags & ~ EF_V850_ARCH) | E_V850E2V3_ARCH);
685080f2 2857 return result;
1cd986c5
NC
2858 }
2859
78c8d46c
NC
2860 if (( (in_flags & EF_V850_ARCH) == E_V850_ARCH
2861 || (in_flags & EF_V850_ARCH) == E_V850E_ARCH
2862 || (in_flags & EF_V850_ARCH) == E_V850E2_ARCH
07d6d2b8 2863 || (in_flags & EF_V850_ARCH) == E_V850E2V3_ARCH)
78c8d46c
NC
2864 && (out_flags & EF_V850_ARCH) == E_V850E3V5_ARCH)
2865 {
2866 elf_elfheader (obfd)->e_flags =
2867 ((out_flags & ~ EF_V850_ARCH) | E_V850E3V5_ARCH);
685080f2 2868 return result;
78c8d46c
NC
2869 }
2870
4eca0228 2871 _bfd_error_handler
38f14ab8 2872 (_("%pB: architecture mismatch with previous modules"), ibfd);
8ad30312 2873 }
252b5132 2874
685080f2 2875 return result;
252b5132 2876}
e12dd2ea
NC
2877
2878/* Display the flags field. */
252b5132 2879
b34976b6 2880static bfd_boolean
47b0e7ad 2881v850_elf_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132
RH
2882{
2883 FILE * file = (FILE *) ptr;
435b1e90 2884
252b5132 2885 BFD_ASSERT (abfd != NULL && ptr != NULL);
435b1e90 2886
252b5132 2887 _bfd_elf_print_private_bfd_data (abfd, ptr);
435b1e90 2888
1cd986c5 2889 /* xgettext:c-format. */
252b5132 2890 fprintf (file, _("private flags = %lx: "), elf_elfheader (abfd)->e_flags);
435b1e90 2891
de863c74 2892 if (bfd_get_arch (abfd) == bfd_arch_v850_rh850)
252b5132 2893 {
de863c74 2894 if ((elf_elfheader (abfd)->e_flags & EF_RH850_ABI) != EF_RH850_ABI)
68ffbac6 2895 fprintf (file, _("unknown v850 architecture"));
de863c74
NC
2896 else if (elf_elfheader (abfd)->e_flags & EF_V800_850E3)
2897 fprintf (file, _("v850 E3 architecture"));
2898 else
2899 fprintf (file, _("v850 architecture"));
de863c74
NC
2900 }
2901 else
2902 {
2903 switch (elf_elfheader (abfd)->e_flags & EF_V850_ARCH)
2904 {
2905 default:
2906 case E_V850_ARCH: fprintf (file, _("v850 architecture")); break;
2907 case E_V850E_ARCH: fprintf (file, _("v850e architecture")); break;
2908 case E_V850E1_ARCH: fprintf (file, _("v850e1 architecture")); break;
2909 case E_V850E2_ARCH: fprintf (file, _("v850e2 architecture")); break;
2910 case E_V850E2V3_ARCH: fprintf (file, _("v850e2v3 architecture")); break;
78c8d46c 2911 case E_V850E3V5_ARCH: fprintf (file, _("v850e3v5 architecture")); break;
de863c74 2912 }
252b5132 2913 }
435b1e90 2914
252b5132 2915 fputc ('\n', file);
435b1e90 2916
685080f2
NC
2917 v850_elf_print_notes (abfd, file);
2918
b34976b6 2919 return TRUE;
252b5132
RH
2920}
2921
2922/* V850 ELF uses four common sections. One is the usual one, and the
2923 others are for (small) objects in one of the special data areas:
2924 small, tiny and zero. All the objects are kept together, and then
2925 referenced via the gp register, the ep register or the r0 register
2926 respectively, which yields smaller, faster assembler code. This
2927 approach is copied from elf32-mips.c. */
2928
2929static asection v850_elf_scom_section;
2930static asymbol v850_elf_scom_symbol;
2931static asymbol * v850_elf_scom_symbol_ptr;
2932static asection v850_elf_tcom_section;
2933static asymbol v850_elf_tcom_symbol;
2934static asymbol * v850_elf_tcom_symbol_ptr;
2935static asection v850_elf_zcom_section;
2936static asymbol v850_elf_zcom_symbol;
2937static asymbol * v850_elf_zcom_symbol_ptr;
2938
e12dd2ea
NC
2939/* Given a BFD section, try to locate the
2940 corresponding ELF section index. */
252b5132 2941
b34976b6 2942static bfd_boolean
47b0e7ad
NC
2943v850_elf_section_from_bfd_section (bfd *abfd ATTRIBUTE_UNUSED,
2944 asection *sec,
2945 int *retval)
252b5132
RH
2946{
2947 if (strcmp (bfd_get_section_name (abfd, sec), ".scommon") == 0)
2948 *retval = SHN_V850_SCOMMON;
2949 else if (strcmp (bfd_get_section_name (abfd, sec), ".tcommon") == 0)
2950 *retval = SHN_V850_TCOMMON;
2951 else if (strcmp (bfd_get_section_name (abfd, sec), ".zcommon") == 0)
2952 *retval = SHN_V850_ZCOMMON;
2953 else
b34976b6 2954 return FALSE;
435b1e90 2955
b34976b6 2956 return TRUE;
252b5132
RH
2957}
2958
2959/* Handle the special V850 section numbers that a symbol may use. */
2960
2961static void
47b0e7ad 2962v850_elf_symbol_processing (bfd *abfd, asymbol *asym)
252b5132
RH
2963{
2964 elf_symbol_type * elfsym = (elf_symbol_type *) asym;
9ad5cbcf 2965 unsigned int indx;
435b1e90 2966
9ad5cbcf 2967 indx = elfsym->internal_elf_sym.st_shndx;
252b5132
RH
2968
2969 /* If the section index is an "ordinary" index, then it may
2970 refer to a v850 specific section created by the assembler.
2971 Check the section's type and change the index it matches.
435b1e90 2972
252b5132 2973 FIXME: Should we alter the st_shndx field as well ? */
435b1e90 2974
9ad5cbcf 2975 if (indx < elf_numsections (abfd))
1cd986c5 2976 switch (elf_elfsections (abfd)[indx]->sh_type)
252b5132
RH
2977 {
2978 case SHT_V850_SCOMMON:
9ad5cbcf 2979 indx = SHN_V850_SCOMMON;
252b5132 2980 break;
435b1e90 2981
252b5132 2982 case SHT_V850_TCOMMON:
9ad5cbcf 2983 indx = SHN_V850_TCOMMON;
252b5132 2984 break;
435b1e90 2985
252b5132 2986 case SHT_V850_ZCOMMON:
9ad5cbcf 2987 indx = SHN_V850_ZCOMMON;
252b5132 2988 break;
435b1e90 2989
252b5132
RH
2990 default:
2991 break;
2992 }
435b1e90 2993
9ad5cbcf 2994 switch (indx)
252b5132
RH
2995 {
2996 case SHN_V850_SCOMMON:
2997 if (v850_elf_scom_section.name == NULL)
2998 {
2999 /* Initialize the small common section. */
07d6d2b8
AM
3000 v850_elf_scom_section.name = ".scommon";
3001 v850_elf_scom_section.flags = SEC_IS_COMMON | SEC_ALLOC | SEC_DATA;
252b5132 3002 v850_elf_scom_section.output_section = & v850_elf_scom_section;
07d6d2b8 3003 v850_elf_scom_section.symbol = & v850_elf_scom_symbol;
252b5132 3004 v850_elf_scom_section.symbol_ptr_ptr = & v850_elf_scom_symbol_ptr;
07d6d2b8
AM
3005 v850_elf_scom_symbol.name = ".scommon";
3006 v850_elf_scom_symbol.flags = BSF_SECTION_SYM;
3007 v850_elf_scom_symbol.section = & v850_elf_scom_section;
3008 v850_elf_scom_symbol_ptr = & v850_elf_scom_symbol;
252b5132
RH
3009 }
3010 asym->section = & v850_elf_scom_section;
3011 asym->value = elfsym->internal_elf_sym.st_size;
3012 break;
435b1e90 3013
252b5132
RH
3014 case SHN_V850_TCOMMON:
3015 if (v850_elf_tcom_section.name == NULL)
3016 {
3017 /* Initialize the tcommon section. */
07d6d2b8
AM
3018 v850_elf_tcom_section.name = ".tcommon";
3019 v850_elf_tcom_section.flags = SEC_IS_COMMON;
252b5132 3020 v850_elf_tcom_section.output_section = & v850_elf_tcom_section;
07d6d2b8 3021 v850_elf_tcom_section.symbol = & v850_elf_tcom_symbol;
252b5132 3022 v850_elf_tcom_section.symbol_ptr_ptr = & v850_elf_tcom_symbol_ptr;
07d6d2b8
AM
3023 v850_elf_tcom_symbol.name = ".tcommon";
3024 v850_elf_tcom_symbol.flags = BSF_SECTION_SYM;
3025 v850_elf_tcom_symbol.section = & v850_elf_tcom_section;
3026 v850_elf_tcom_symbol_ptr = & v850_elf_tcom_symbol;
252b5132
RH
3027 }
3028 asym->section = & v850_elf_tcom_section;
3029 asym->value = elfsym->internal_elf_sym.st_size;
3030 break;
3031
3032 case SHN_V850_ZCOMMON:
3033 if (v850_elf_zcom_section.name == NULL)
3034 {
3035 /* Initialize the zcommon section. */
07d6d2b8
AM
3036 v850_elf_zcom_section.name = ".zcommon";
3037 v850_elf_zcom_section.flags = SEC_IS_COMMON;
252b5132 3038 v850_elf_zcom_section.output_section = & v850_elf_zcom_section;
07d6d2b8 3039 v850_elf_zcom_section.symbol = & v850_elf_zcom_symbol;
252b5132 3040 v850_elf_zcom_section.symbol_ptr_ptr = & v850_elf_zcom_symbol_ptr;
07d6d2b8
AM
3041 v850_elf_zcom_symbol.name = ".zcommon";
3042 v850_elf_zcom_symbol.flags = BSF_SECTION_SYM;
3043 v850_elf_zcom_symbol.section = & v850_elf_zcom_section;
3044 v850_elf_zcom_symbol_ptr = & v850_elf_zcom_symbol;
252b5132
RH
3045 }
3046 asym->section = & v850_elf_zcom_section;
3047 asym->value = elfsym->internal_elf_sym.st_size;
3048 break;
3049 }
3050}
3051
3052/* Hook called by the linker routine which adds symbols from an object
3053 file. We must handle the special v850 section numbers here. */
3054
b34976b6 3055static bfd_boolean
47b0e7ad
NC
3056v850_elf_add_symbol_hook (bfd *abfd,
3057 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3058 Elf_Internal_Sym *sym,
3059 const char **namep ATTRIBUTE_UNUSED,
3060 flagword *flagsp ATTRIBUTE_UNUSED,
3061 asection **secp,
3062 bfd_vma *valp)
252b5132 3063{
9ad5cbcf 3064 unsigned int indx = sym->st_shndx;
435b1e90 3065
252b5132
RH
3066 /* If the section index is an "ordinary" index, then it may
3067 refer to a v850 specific section created by the assembler.
3068 Check the section's type and change the index it matches.
435b1e90 3069
252b5132 3070 FIXME: Should we alter the st_shndx field as well ? */
435b1e90 3071
9ad5cbcf 3072 if (indx < elf_numsections (abfd))
1cd986c5 3073 switch (elf_elfsections (abfd)[indx]->sh_type)
252b5132
RH
3074 {
3075 case SHT_V850_SCOMMON:
9ad5cbcf 3076 indx = SHN_V850_SCOMMON;
252b5132 3077 break;
435b1e90 3078
252b5132 3079 case SHT_V850_TCOMMON:
9ad5cbcf 3080 indx = SHN_V850_TCOMMON;
252b5132 3081 break;
435b1e90 3082
252b5132 3083 case SHT_V850_ZCOMMON:
9ad5cbcf 3084 indx = SHN_V850_ZCOMMON;
252b5132 3085 break;
435b1e90 3086
252b5132
RH
3087 default:
3088 break;
3089 }
435b1e90 3090
9ad5cbcf 3091 switch (indx)
252b5132
RH
3092 {
3093 case SHN_V850_SCOMMON:
3094 *secp = bfd_make_section_old_way (abfd, ".scommon");
3095 (*secp)->flags |= SEC_IS_COMMON;
3096 *valp = sym->st_size;
3097 break;
435b1e90 3098
252b5132
RH
3099 case SHN_V850_TCOMMON:
3100 *secp = bfd_make_section_old_way (abfd, ".tcommon");
3101 (*secp)->flags |= SEC_IS_COMMON;
3102 *valp = sym->st_size;
3103 break;
435b1e90 3104
252b5132
RH
3105 case SHN_V850_ZCOMMON:
3106 *secp = bfd_make_section_old_way (abfd, ".zcommon");
3107 (*secp)->flags |= SEC_IS_COMMON;
3108 *valp = sym->st_size;
3109 break;
3110 }
3111
b34976b6 3112 return TRUE;
252b5132
RH
3113}
3114
6e0b88f1 3115static int
47b0e7ad
NC
3116v850_elf_link_output_symbol_hook (struct bfd_link_info *info ATTRIBUTE_UNUSED,
3117 const char *name ATTRIBUTE_UNUSED,
3118 Elf_Internal_Sym *sym,
3119 asection *input_sec,
3dd2d30b 3120 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
252b5132
RH
3121{
3122 /* If we see a common symbol, which implies a relocatable link, then
3123 if a symbol was in a special common section in an input file, mark
3124 it as a special common in the output file. */
435b1e90 3125
252b5132
RH
3126 if (sym->st_shndx == SHN_COMMON)
3127 {
3128 if (strcmp (input_sec->name, ".scommon") == 0)
3129 sym->st_shndx = SHN_V850_SCOMMON;
3130 else if (strcmp (input_sec->name, ".tcommon") == 0)
3131 sym->st_shndx = SHN_V850_TCOMMON;
3132 else if (strcmp (input_sec->name, ".zcommon") == 0)
3133 sym->st_shndx = SHN_V850_ZCOMMON;
3134 }
3135
d4c87fc1
AM
3136 /* The price we pay for using h->other unused bits as flags in the
3137 linker is cleaning up after ourselves. */
3dd2d30b
AM
3138
3139 sym->st_other &= ~(V850_OTHER_SDA | V850_OTHER_ZDA | V850_OTHER_TDA
3140 | V850_OTHER_ERROR);
d4c87fc1 3141
6e0b88f1 3142 return 1;
252b5132
RH
3143}
3144
b34976b6 3145static bfd_boolean
6dc132d9
L
3146v850_elf_section_from_shdr (bfd *abfd,
3147 Elf_Internal_Shdr *hdr,
3148 const char *name,
3149 int shindex)
252b5132
RH
3150{
3151 /* There ought to be a place to keep ELF backend specific flags, but
3152 at the moment there isn't one. We just keep track of the
3153 sections by their name, instead. */
3154
6dc132d9 3155 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
b34976b6 3156 return FALSE;
252b5132
RH
3157
3158 switch (hdr->sh_type)
3159 {
3160 case SHT_V850_SCOMMON:
3161 case SHT_V850_TCOMMON:
3162 case SHT_V850_ZCOMMON:
3163 if (! bfd_set_section_flags (abfd, hdr->bfd_section,
3164 (bfd_get_section_flags (abfd,
3165 hdr->bfd_section)
3166 | SEC_IS_COMMON)))
b34976b6 3167 return FALSE;
252b5132
RH
3168 }
3169
b34976b6 3170 return TRUE;
252b5132
RH
3171}
3172
e12dd2ea
NC
3173/* Set the correct type for a V850 ELF section. We do this
3174 by the section name, which is a hack, but ought to work. */
3175
b34976b6 3176static bfd_boolean
47b0e7ad
NC
3177v850_elf_fake_sections (bfd *abfd ATTRIBUTE_UNUSED,
3178 Elf_Internal_Shdr *hdr,
3179 asection *sec)
252b5132 3180{
47b0e7ad 3181 const char * name;
252b5132
RH
3182
3183 name = bfd_get_section_name (abfd, sec);
3184
3185 if (strcmp (name, ".scommon") == 0)
47b0e7ad 3186 hdr->sh_type = SHT_V850_SCOMMON;
252b5132 3187 else if (strcmp (name, ".tcommon") == 0)
47b0e7ad 3188 hdr->sh_type = SHT_V850_TCOMMON;
252b5132
RH
3189 else if (strcmp (name, ".zcommon") == 0)
3190 hdr->sh_type = SHT_V850_ZCOMMON;
685080f2
NC
3191 /* Tweak the section type of .note.renesas. */
3192 else if (strcmp (name, V850_NOTE_SECNAME) == 0)
3193 {
3194 hdr->sh_type = SHT_RENESAS_INFO;
3195 hdr->sh_entsize = SIZEOF_V850_NOTE;
3196 }
435b1e90 3197
b34976b6 3198 return TRUE;
252b5132 3199}
86aba9db
NC
3200
3201/* Delete some bytes from a section while relaxing. */
3202
b34976b6 3203static bfd_boolean
47b0e7ad
NC
3204v850_elf_relax_delete_bytes (bfd *abfd,
3205 asection *sec,
3206 bfd_vma addr,
3207 bfd_vma toaddr,
3208 int count)
86aba9db 3209{
b34976b6
AM
3210 Elf_Internal_Shdr *symtab_hdr;
3211 Elf32_External_Sym *extsyms;
3212 Elf32_External_Sym *esym;
3213 Elf32_External_Sym *esymend;
91d6fa6a 3214 int sym_index;
b34976b6
AM
3215 unsigned int sec_shndx;
3216 bfd_byte *contents;
3217 Elf_Internal_Rela *irel;
3218 Elf_Internal_Rela *irelend;
3219 struct elf_link_hash_entry *sym_hash;
b34976b6 3220 Elf_External_Sym_Shndx *shndx;
86aba9db
NC
3221
3222 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
3223 extsyms = (Elf32_External_Sym *) symtab_hdr->contents;
3224
3225 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
3226
3227 contents = elf_section_data (sec)->this_hdr.contents;
3228
3229 /* The deletion must stop at the next ALIGN reloc for an alignment
3230 power larger than the number of bytes we are deleting. */
3231
3232 /* Actually delete the bytes. */
3233#if (DEBUG_RELAX & 2)
3234 fprintf (stderr, "relax_delete: contents: sec: %s %p .. %p %x\n",
3235 sec->name, addr, toaddr, count );
3236#endif
3237 memmove (contents + addr, contents + addr + count,
3238 toaddr - addr - count);
3239 memset (contents + toaddr-count, 0, count);
3240
3241 /* Adjust all the relocs. */
3242 irel = elf_section_data (sec)->relocs;
3243 irelend = irel + sec->reloc_count;
6a40cf0c
NC
3244 if (elf_symtab_shndx_list (abfd))
3245 {
3246 Elf_Internal_Shdr *shndx_hdr;
3247
3248 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
3249 shndx = (Elf_External_Sym_Shndx *) shndx_hdr->contents;
3250 }
3251 else
3252 {
3253 shndx = NULL;
3254 }
86aba9db
NC
3255
3256 for (; irel < irelend; irel++)
3257 {
3258 bfd_vma raddr, paddr, symval;
3259 Elf_Internal_Sym isym;
3260
3261 /* Get the new reloc address. */
3262 raddr = irel->r_offset;
3263 if ((raddr >= (addr + count) && raddr < toaddr))
b34976b6 3264 irel->r_offset -= count;
86aba9db
NC
3265
3266 if (raddr >= addr && raddr < addr + count)
3267 {
3268 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
3269 (int) R_V850_NONE);
3270 continue;
3271 }
b34976b6 3272
86aba9db
NC
3273 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN)
3274 continue;
3275
3276 bfd_elf32_swap_symbol_in (abfd,
3277 extsyms + ELF32_R_SYM (irel->r_info),
3278 shndx ? shndx + ELF32_R_SYM (irel->r_info) : NULL,
3279 & isym);
b34976b6 3280
86aba9db
NC
3281 if (isym.st_shndx != sec_shndx)
3282 continue;
3283
3284 /* Get the value of the symbol referred to by the reloc. */
3285 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
3286 {
3287 symval = isym.st_value;
3288#if (DEBUG_RELAX & 2)
3289 {
3290 char * name = bfd_elf_string_from_elf_section
07d6d2b8 3291 (abfd, symtab_hdr->sh_link, isym.st_name);
86aba9db
NC
3292 fprintf (stderr,
3293 "relax_delete: local: sec: %s, sym: %s (%d), value: %x + %x + %x addend %x\n",
3294 sec->name, name, isym.st_name,
3295 sec->output_section->vma, sec->output_offset,
3296 isym.st_value, irel->r_addend);
3297 }
3298#endif
3299 }
3300 else
3301 {
3302 unsigned long indx;
3303 struct elf_link_hash_entry * h;
3304
3305 /* An external symbol. */
3306 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
3307
3308 h = elf_sym_hashes (abfd) [indx];
3309 BFD_ASSERT (h != NULL);
3310
3311 symval = h->root.u.def.value;
3312#if (DEBUG_RELAX & 2)
3313 fprintf (stderr,
3314 "relax_delete: defined: sec: %s, name: %s, value: %x + %x + %x addend %x\n",
3315 sec->name, h->root.root.string, h->root.u.def.value,
3316 sec->output_section->vma, sec->output_offset, irel->r_addend);
3317#endif
3318 }
b34976b6 3319
86aba9db 3320 paddr = symval + irel->r_addend;
b34976b6 3321
86aba9db
NC
3322 if ( (symval >= addr + count && symval < toaddr)
3323 && (paddr < addr + count || paddr >= toaddr))
3324 irel->r_addend += count;
3325 else if ( (symval < addr + count || symval >= toaddr)
07d6d2b8 3326 && (paddr >= addr + count && paddr < toaddr))
86aba9db
NC
3327 irel->r_addend -= count;
3328 }
3329
3330 /* Adjust the local symbols defined in this section. */
3331 esym = extsyms;
3332 esymend = esym + symtab_hdr->sh_info;
3333
3334 for (; esym < esymend; esym++, shndx = (shndx ? shndx + 1 : NULL))
3335 {
3336 Elf_Internal_Sym isym;
3337
3338 bfd_elf32_swap_symbol_in (abfd, esym, shndx, & isym);
3339
3340 if (isym.st_shndx == sec_shndx
3341 && isym.st_value >= addr + count
3342 && isym.st_value < toaddr)
3343 {
3344 isym.st_value -= count;
3345
3346 if (isym.st_value + isym.st_size >= toaddr)
b34976b6
AM
3347 isym.st_size += count;
3348
63a23799 3349 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
3350 }
3351 else if (isym.st_shndx == sec_shndx
3352 && isym.st_value < addr + count)
3353 {
3354 if (isym.st_value+isym.st_size >= addr + count
3355 && isym.st_value+isym.st_size < toaddr)
3356 isym.st_size -= count;
3357
3358 if (isym.st_value >= addr
3359 && isym.st_value < addr + count)
3360 isym.st_value = addr;
3361
63a23799 3362 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
3363 }
3364 }
3365
3366 /* Now adjust the global symbols defined in this section. */
3367 esym = extsyms + symtab_hdr->sh_info;
3368 esymend = extsyms + (symtab_hdr->sh_size / sizeof (Elf32_External_Sym));
3369
91d6fa6a 3370 for (sym_index = 0; esym < esymend; esym ++, sym_index ++)
86aba9db
NC
3371 {
3372 Elf_Internal_Sym isym;
3373
3374 bfd_elf32_swap_symbol_in (abfd, esym, shndx, & isym);
91d6fa6a 3375 sym_hash = elf_sym_hashes (abfd) [sym_index];
86aba9db
NC
3376
3377 if (isym.st_shndx == sec_shndx
3378 && ((sym_hash)->root.type == bfd_link_hash_defined
3379 || (sym_hash)->root.type == bfd_link_hash_defweak)
3380 && (sym_hash)->root.u.def.section == sec
3381 && (sym_hash)->root.u.def.value >= addr + count
3382 && (sym_hash)->root.u.def.value < toaddr)
3383 {
3384 if ((sym_hash)->root.u.def.value + isym.st_size >= toaddr)
3385 {
3386 isym.st_size += count;
63a23799 3387 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
3388 }
3389
3390 (sym_hash)->root.u.def.value -= count;
3391 }
3392 else if (isym.st_shndx == sec_shndx
3393 && ((sym_hash)->root.type == bfd_link_hash_defined
3394 || (sym_hash)->root.type == bfd_link_hash_defweak)
3395 && (sym_hash)->root.u.def.section == sec
3396 && (sym_hash)->root.u.def.value < addr + count)
3397 {
3398 if ((sym_hash)->root.u.def.value+isym.st_size >= addr + count
3399 && (sym_hash)->root.u.def.value+isym.st_size < toaddr)
3400 isym.st_size -= count;
3401
3402 if ((sym_hash)->root.u.def.value >= addr
3403 && (sym_hash)->root.u.def.value < addr + count)
3404 (sym_hash)->root.u.def.value = addr;
3405
63a23799 3406 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
3407 }
3408
3409 if (shndx)
3410 ++ shndx;
3411 }
3412
b34976b6 3413 return TRUE;
86aba9db
NC
3414}
3415
07d6d2b8
AM
3416#define NOP_OPCODE (0x0000)
3417#define MOVHI 0x0640 /* 4byte. */
3418#define MOVHI_MASK 0x07e0
1cd986c5 3419#define MOVHI_R1(insn) ((insn) & 0x1f) /* 4byte. */
86aba9db 3420#define MOVHI_R2(insn) ((insn) >> 11)
07d6d2b8
AM
3421#define MOVEA 0x0620 /* 2byte. */
3422#define MOVEA_MASK 0x07e0
86aba9db
NC
3423#define MOVEA_R1(insn) ((insn) & 0x1f)
3424#define MOVEA_R2(insn) ((insn) >> 11)
07d6d2b8
AM
3425#define JARL_4 0x00040780 /* 4byte. */
3426#define JARL_4_MASK 0xFFFF07FF
86aba9db 3427#define JARL_R2(insn) (int)(((insn) & (~JARL_4_MASK)) >> 11)
07d6d2b8
AM
3428#define ADD_I 0x0240 /* 2byte. */
3429#define ADD_I_MASK 0x07e0
1cd986c5 3430#define ADD_I5(insn) ((((insn) & 0x001f) << 11) >> 11) /* 2byte. */
86aba9db 3431#define ADD_R2(insn) ((insn) >> 11)
07d6d2b8
AM
3432#define JMP_R 0x0060 /* 2byte. */
3433#define JMP_R_MASK 0xFFE0
86aba9db
NC
3434#define JMP_R1(insn) ((insn) & 0x1f)
3435
b34976b6 3436static bfd_boolean
47b0e7ad
NC
3437v850_elf_relax_section (bfd *abfd,
3438 asection *sec,
3439 struct bfd_link_info *link_info,
3440 bfd_boolean *again)
86aba9db 3441{
b34976b6
AM
3442 Elf_Internal_Shdr *symtab_hdr;
3443 Elf_Internal_Rela *internal_relocs;
3444 Elf_Internal_Rela *irel;
3445 Elf_Internal_Rela *irelend;
3446 Elf_Internal_Rela *irelalign = NULL;
3447 Elf_Internal_Sym *isymbuf = NULL;
3448 bfd_byte *contents = NULL;
3449 bfd_vma addr = 0;
3450 bfd_vma toaddr;
3451 int align_pad_size = 0;
3452 bfd_boolean result = TRUE;
3453
3454 *again = FALSE;
86aba9db 3455
0e1862bb 3456 if (bfd_link_relocatable (link_info)
86aba9db
NC
3457 || (sec->flags & SEC_RELOC) == 0
3458 || sec->reloc_count == 0)
b34976b6 3459 return TRUE;
86aba9db 3460
86aba9db
NC
3461 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
3462
45d6a902 3463 internal_relocs = (_bfd_elf_link_read_relocs
47b0e7ad 3464 (abfd, sec, NULL, NULL, link_info->keep_memory));
86aba9db
NC
3465 if (internal_relocs == NULL)
3466 goto error_return;
86aba9db
NC
3467
3468 irelend = internal_relocs + sec->reloc_count;
b34976b6 3469
eea6121a 3470 while (addr < sec->size)
86aba9db 3471 {
eea6121a 3472 toaddr = sec->size;
86aba9db
NC
3473
3474 for (irel = internal_relocs; irel < irelend; irel ++)
3475 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN
3476 && irel->r_offset > addr
3477 && irel->r_offset < toaddr)
3478 toaddr = irel->r_offset;
b34976b6 3479
86aba9db
NC
3480#ifdef DEBUG_RELAX
3481 fprintf (stderr, "relax region 0x%x to 0x%x align pad %d\n",
3482 addr, toaddr, align_pad_size);
3483#endif
3484 if (irelalign)
3485 {
3486 bfd_vma alignto;
3487 bfd_vma alignmoveto;
3488
3489 alignmoveto = BFD_ALIGN (addr - align_pad_size, 1 << irelalign->r_addend);
3490 alignto = BFD_ALIGN (addr, 1 << irelalign->r_addend);
3491
3492 if (alignmoveto < alignto)
3493 {
544008aa 3494 bfd_vma i;
86aba9db
NC
3495
3496 align_pad_size = alignto - alignmoveto;
3497#ifdef DEBUG_RELAX
3498 fprintf (stderr, "relax move region 0x%x to 0x%x delete size 0x%x\n",
3499 alignmoveto, toaddr, align_pad_size);
3500#endif
3501 if (!v850_elf_relax_delete_bytes (abfd, sec, alignmoveto,
3502 toaddr, align_pad_size))
b34976b6 3503 goto error_return;
86aba9db
NC
3504
3505 for (i = BFD_ALIGN (toaddr - align_pad_size, 1);
3506 (i + 1) < toaddr; i += 2)
3507 bfd_put_16 (abfd, NOP_OPCODE, contents + i);
3508
3509 addr = alignmoveto;
3510 }
3511 else
3512 align_pad_size = 0;
3513 }
3514
3515 for (irel = internal_relocs; irel < irelend; irel++)
3516 {
b34976b6
AM
3517 bfd_vma laddr;
3518 bfd_vma addend;
3519 bfd_vma symval;
3520 int insn[5];
3521 int no_match = -1;
3522 Elf_Internal_Rela *hi_irelfn;
3523 Elf_Internal_Rela *lo_irelfn;
3524 Elf_Internal_Rela *irelcall;
3525 bfd_signed_vma foff;
de863c74 3526 unsigned int r_type;
86aba9db
NC
3527
3528 if (! (irel->r_offset >= addr && irel->r_offset < toaddr
3529 && (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGCALL
3530 || ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGJUMP)))
3531 continue;
3532
3533#ifdef DEBUG_RELAX
3534 fprintf (stderr, "relax check r_info 0x%x r_offset 0x%x r_addend 0x%x\n",
3535 irel->r_info,
3536 irel->r_offset,
3537 irel->r_addend );
3538#endif
3539
3540 /* Get the section contents. */
3541 if (contents == NULL)
3542 {
3543 if (elf_section_data (sec)->this_hdr.contents != NULL)
3544 contents = elf_section_data (sec)->this_hdr.contents;
3545 else
3546 {
47b0e7ad 3547 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
86aba9db
NC
3548 goto error_return;
3549 }
3550 }
3551
5cec6941
NC
3552 /* Read this BFD's local symbols if we haven't done so already. */
3553 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
86aba9db 3554 {
5cec6941
NC
3555 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
3556 if (isymbuf == NULL)
3557 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
3558 symtab_hdr->sh_info, 0,
3559 NULL, NULL, NULL);
3560 if (isymbuf == NULL)
3561 goto error_return;
86aba9db
NC
3562 }
3563
3564 laddr = irel->r_offset;
3565
3566 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGCALL)
3567 {
3568 /* Check code for -mlong-calls output. */
eea6121a 3569 if (laddr + 16 <= (bfd_vma) sec->size)
86aba9db
NC
3570 {
3571 insn[0] = bfd_get_16 (abfd, contents + laddr);
3572 insn[1] = bfd_get_16 (abfd, contents + laddr + 4);
3573 insn[2] = bfd_get_32 (abfd, contents + laddr + 8);
3574 insn[3] = bfd_get_16 (abfd, contents + laddr + 12);
3575 insn[4] = bfd_get_16 (abfd, contents + laddr + 14);
b34976b6 3576
86aba9db
NC
3577 if ((insn[0] & MOVHI_MASK) != MOVHI
3578 || MOVHI_R1 (insn[0]) != 0)
3579 no_match = 0;
3580
3581 if (no_match < 0
3582 && ((insn[1] & MOVEA_MASK) != MOVEA
3583 || MOVHI_R2 (insn[0]) != MOVEA_R1 (insn[1])))
3584 no_match = 1;
3585
3586 if (no_match < 0
3587 && (insn[2] & JARL_4_MASK) != JARL_4)
3588 no_match = 2;
3589
3590 if (no_match < 0
3591 && ((insn[3] & ADD_I_MASK) != ADD_I
3592 || ADD_I5 (insn[3]) != 4
3593 || JARL_R2 (insn[2]) != ADD_R2 (insn[3])))
3594 no_match = 3;
3595
3596 if (no_match < 0
3597 && ((insn[4] & JMP_R_MASK) != JMP_R
3598 || MOVEA_R2 (insn[1]) != JMP_R1 (insn[4])))
3599 no_match = 4;
3600 }
3601 else
3602 {
4eca0228 3603 _bfd_error_handler
695344c0 3604 /* xgettext:c-format */
38f14ab8 3605 (_("%pB: %#" PRIx64 ": warning: %s points to "
695344c0 3606 "unrecognized insns"),
38f14ab8 3607 abfd, (uint64_t) irel->r_offset, "R_V850_LONGCALL");
86aba9db
NC
3608 continue;
3609 }
3610
3611 if (no_match >= 0)
3612 {
4eca0228 3613 _bfd_error_handler
695344c0 3614 /* xgettext:c-format */
38f14ab8 3615 (_("%pB: %#" PRIx64 ": warning: %s points to "
d42c267e 3616 "unrecognized insn %#x"),
dae82561 3617 abfd,
2dcf00ce 3618 (uint64_t) (irel->r_offset + no_match),
38f14ab8 3619 "R_V850_LONGCALL",
4eca0228 3620 insn[no_match]);
86aba9db 3621 continue;
b34976b6 3622 }
86aba9db
NC
3623
3624 /* Get the reloc for the address from which the register is
07d6d2b8
AM
3625 being loaded. This reloc will tell us which function is
3626 actually being called. */
68ffbac6 3627
86aba9db 3628 for (hi_irelfn = internal_relocs; hi_irelfn < irelend; hi_irelfn ++)
de863c74
NC
3629 {
3630 r_type = ELF32_R_TYPE (hi_irelfn->r_info);
3631
3632 if (hi_irelfn->r_offset == laddr + 2
3633 && (r_type == (int) R_V850_HI16_S || r_type == (int) R_V810_WHI1))
3634 break;
3635 }
86aba9db
NC
3636
3637 for (lo_irelfn = internal_relocs; lo_irelfn < irelend; lo_irelfn ++)
de863c74
NC
3638 {
3639 r_type = ELF32_R_TYPE (lo_irelfn->r_info);
3640
3641 if (lo_irelfn->r_offset == laddr + 6
3642 && (r_type == (int) R_V850_LO16 || r_type == (int) R_V810_WLO))
3643 break;
3644 }
86aba9db
NC
3645
3646 for (irelcall = internal_relocs; irelcall < irelend; irelcall ++)
de863c74
NC
3647 {
3648 r_type = ELF32_R_TYPE (irelcall->r_info);
3649
3650 if (irelcall->r_offset == laddr + 8
3651 && (r_type == (int) R_V850_22_PCREL || r_type == (int) R_V850_PCR22))
3652 break;
3653 }
86aba9db
NC
3654
3655 if ( hi_irelfn == irelend
3656 || lo_irelfn == irelend
3657 || irelcall == irelend)
3658 {
4eca0228 3659 _bfd_error_handler
695344c0 3660 /* xgettext:c-format */
38f14ab8 3661 (_("%pB: %#" PRIx64 ": warning: %s points to "
695344c0 3662 "unrecognized reloc"),
38f14ab8 3663 abfd, (uint64_t) irel->r_offset, "R_V850_LONGCALL");
86aba9db
NC
3664
3665 continue;
3666 }
b34976b6 3667
86aba9db
NC
3668 if (ELF32_R_SYM (irelcall->r_info) < symtab_hdr->sh_info)
3669 {
5cec6941 3670 Elf_Internal_Sym * isym;
86aba9db
NC
3671
3672 /* A local symbol. */
5cec6941 3673 isym = isymbuf + ELF32_R_SYM (irelcall->r_info);
86aba9db 3674
5cec6941 3675 symval = isym->st_value;
86aba9db
NC
3676 }
3677 else
3678 {
3679 unsigned long indx;
3680 struct elf_link_hash_entry * h;
3681
3682 /* An external symbol. */
3683 indx = ELF32_R_SYM (irelcall->r_info) - symtab_hdr->sh_info;
3684 h = elf_sym_hashes (abfd)[indx];
3685 BFD_ASSERT (h != NULL);
3686
3687 if ( h->root.type != bfd_link_hash_defined
3688 && h->root.type != bfd_link_hash_defweak)
3689 /* This appears to be a reference to an undefined
3690 symbol. Just ignore it--it will be caught by the
3691 regular reloc processing. */
3692 continue;
3693
3694 symval = h->root.u.def.value;
3695 }
3696
3697 if (symval + irelcall->r_addend != irelcall->r_offset + 4)
3698 {
4eca0228 3699 _bfd_error_handler
695344c0 3700 /* xgettext:c-format */
38f14ab8 3701 (_("%pB: %#" PRIx64 ": warning: %s points to "
2dcf00ce 3702 "unrecognized reloc %#" PRIx64),
38f14ab8 3703 abfd, (uint64_t) irel->r_offset, "R_V850_LONGCALL",
2dcf00ce 3704 (uint64_t) irelcall->r_offset);
86aba9db
NC
3705 continue;
3706 }
3707
3708 /* Get the value of the symbol referred to by the reloc. */
3709 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
3710 {
b34976b6
AM
3711 Elf_Internal_Sym *isym;
3712 asection *sym_sec;
86aba9db
NC
3713
3714 /* A local symbol. */
5cec6941 3715 isym = isymbuf + ELF32_R_SYM (hi_irelfn->r_info);
b34976b6 3716
5cec6941 3717 if (isym->st_shndx == SHN_UNDEF)
86aba9db 3718 sym_sec = bfd_und_section_ptr;
5cec6941 3719 else if (isym->st_shndx == SHN_ABS)
86aba9db 3720 sym_sec = bfd_abs_section_ptr;
5cec6941 3721 else if (isym->st_shndx == SHN_COMMON)
86aba9db
NC
3722 sym_sec = bfd_com_section_ptr;
3723 else
5cec6941
NC
3724 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
3725 symval = (isym->st_value
86aba9db
NC
3726 + sym_sec->output_section->vma
3727 + sym_sec->output_offset);
3728 }
3729 else
3730 {
3731 unsigned long indx;
b34976b6 3732 struct elf_link_hash_entry *h;
86aba9db
NC
3733
3734 /* An external symbol. */
5cec6941 3735 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
86aba9db
NC
3736 h = elf_sym_hashes (abfd)[indx];
3737 BFD_ASSERT (h != NULL);
3738
3739 if ( h->root.type != bfd_link_hash_defined
3740 && h->root.type != bfd_link_hash_defweak)
3741 /* This appears to be a reference to an undefined
3742 symbol. Just ignore it--it will be caught by the
3743 regular reloc processing. */
3744 continue;
3745
3746 symval = (h->root.u.def.value
3747 + h->root.u.def.section->output_section->vma
3748 + h->root.u.def.section->output_offset);
3749 }
3750
3751 addend = irel->r_addend;
3752
3753 foff = (symval + addend
3754 - (irel->r_offset
3755 + sec->output_section->vma
3756 + sec->output_offset
3757 + 4));
3758#ifdef DEBUG_RELAX
3759 fprintf (stderr, "relax longcall r_offset 0x%x ptr 0x%x symbol 0x%x addend 0x%x distance 0x%x\n",
3760 irel->r_offset,
3761 (irel->r_offset
3762 + sec->output_section->vma
3763 + sec->output_offset),
3764 symval, addend, foff);
3765#endif
3766
3767 if (foff < -0x100000 || foff >= 0x100000)
3768 /* After all that work, we can't shorten this function call. */
3769 continue;
3770
3771 /* For simplicity of coding, we are going to modify the section
07d6d2b8
AM
3772 contents, the section relocs, and the BFD symbol table. We
3773 must tell the rest of the code not to free up this
3774 information. It would be possible to instead create a table
3775 of changes which have to be made, as is done in coff-mips.c;
3776 that would be more work, but would require less memory when
3777 the linker is run. */
86aba9db 3778 elf_section_data (sec)->relocs = internal_relocs;
86aba9db 3779 elf_section_data (sec)->this_hdr.contents = contents;
5cec6941 3780 symtab_hdr->contents = (bfd_byte *) isymbuf;
b34976b6 3781
86aba9db 3782 /* Replace the long call with a jarl. */
de863c74
NC
3783 if (bfd_get_arch (abfd) == bfd_arch_v850_rh850)
3784 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_PCR22);
3785 else
3786 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_22_PCREL);
86aba9db
NC
3787
3788 addend = 0;
3789
3790 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
3791 /* If this needs to be changed because of future relaxing,
3792 it will be handled here like other internal IND12W
3793 relocs. */
3794 bfd_put_32 (abfd,
3795 0x00000780 | (JARL_R2 (insn[2])<<11) | ((addend << 16) & 0xffff) | ((addend >> 16) & 0xf),
3796 contents + irel->r_offset);
3797 else
3798 /* We can't fully resolve this yet, because the external
3799 symbol value may be changed by future relaxing.
3800 We let the final link phase handle it. */
3801 bfd_put_32 (abfd, 0x00000780 | (JARL_R2 (insn[2])<<11),
3802 contents + irel->r_offset);
3803
b34976b6 3804 hi_irelfn->r_info =
86aba9db
NC
3805 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE);
3806 lo_irelfn->r_info =
3807 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE);
3808 irelcall->r_info =
3809 ELF32_R_INFO (ELF32_R_SYM (irelcall->r_info), R_V850_NONE);
3810
3811 if (! v850_elf_relax_delete_bytes (abfd, sec,
3812 irel->r_offset + 4, toaddr, 12))
3813 goto error_return;
3814
3815 align_pad_size += 12;
3816 }
3817 else if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGJUMP)
3818 {
3819 /* Check code for -mlong-jumps output. */
eea6121a 3820 if (laddr + 10 <= (bfd_vma) sec->size)
86aba9db
NC
3821 {
3822 insn[0] = bfd_get_16 (abfd, contents + laddr);
3823 insn[1] = bfd_get_16 (abfd, contents + laddr + 4);
3824 insn[2] = bfd_get_16 (abfd, contents + laddr + 8);
3825
3826 if ((insn[0] & MOVHI_MASK) != MOVHI
3827 || MOVHI_R1 (insn[0]) != 0)
3828 no_match = 0;
3829
3830 if (no_match < 0
3831 && ((insn[1] & MOVEA_MASK) != MOVEA
3832 || MOVHI_R2 (insn[0]) != MOVEA_R1 (insn[1])))
3833 no_match = 1;
3834
3835 if (no_match < 0
3836 && ((insn[2] & JMP_R_MASK) != JMP_R
3837 || MOVEA_R2 (insn[1]) != JMP_R1 (insn[2])))
3838 no_match = 4;
3839 }
3840 else
3841 {
4eca0228 3842 _bfd_error_handler
695344c0 3843 /* xgettext:c-format */
38f14ab8 3844 (_("%pB: %#" PRIx64 ": warning: %s points to "
695344c0 3845 "unrecognized insns"),
38f14ab8 3846 abfd, (uint64_t) irel->r_offset, "R_V850_LONGJUMP");
86aba9db
NC
3847 continue;
3848 }
3849
3850 if (no_match >= 0)
3851 {
4eca0228 3852 _bfd_error_handler
695344c0 3853 /* xgettext:c-format */
38f14ab8 3854 (_("%pB: %#" PRIx64 ": warning: %s points to "
d42c267e 3855 "unrecognized insn %#x"),
dae82561 3856 abfd,
2dcf00ce 3857 (uint64_t) (irel->r_offset + no_match),
38f14ab8 3858 "R_V850_LONGJUMP",
4eca0228 3859 insn[no_match]);
86aba9db
NC
3860 continue;
3861 }
3862
3863 /* Get the reloc for the address from which the register is
07d6d2b8
AM
3864 being loaded. This reloc will tell us which function is
3865 actually being called. */
86aba9db 3866 for (hi_irelfn = internal_relocs; hi_irelfn < irelend; hi_irelfn ++)
de863c74
NC
3867 {
3868 r_type = ELF32_R_TYPE (hi_irelfn->r_info);
3869
3870 if (hi_irelfn->r_offset == laddr + 2
3871 && ((r_type == (int) R_V850_HI16_S) || r_type == (int) R_V810_WHI1))
3872 break;
3873 }
86aba9db
NC
3874
3875 for (lo_irelfn = internal_relocs; lo_irelfn < irelend; lo_irelfn ++)
de863c74
NC
3876 {
3877 r_type = ELF32_R_TYPE (lo_irelfn->r_info);
3878
3879 if (lo_irelfn->r_offset == laddr + 6
3880 && (r_type == (int) R_V850_LO16 || r_type == (int) R_V810_WLO))
3881 break;
3882 }
86aba9db
NC
3883
3884 if ( hi_irelfn == irelend
3885 || lo_irelfn == irelend)
3886 {
4eca0228 3887 _bfd_error_handler
695344c0 3888 /* xgettext:c-format */
38f14ab8 3889 (_("%pB: %#" PRIx64 ": warning: %s points to "
695344c0 3890 "unrecognized reloc"),
38f14ab8 3891 abfd, (uint64_t) irel->r_offset, "R_V850_LONGJUMP");
86aba9db
NC
3892 continue;
3893 }
b34976b6 3894
86aba9db
NC
3895 /* Get the value of the symbol referred to by the reloc. */
3896 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
3897 {
5cec6941 3898 Elf_Internal_Sym * isym;
07d6d2b8 3899 asection * sym_sec;
86aba9db
NC
3900
3901 /* A local symbol. */
5cec6941
NC
3902 isym = isymbuf + ELF32_R_SYM (hi_irelfn->r_info);
3903
3904 if (isym->st_shndx == SHN_UNDEF)
86aba9db 3905 sym_sec = bfd_und_section_ptr;
5cec6941 3906 else if (isym->st_shndx == SHN_ABS)
86aba9db 3907 sym_sec = bfd_abs_section_ptr;
5cec6941 3908 else if (isym->st_shndx == SHN_COMMON)
86aba9db
NC
3909 sym_sec = bfd_com_section_ptr;
3910 else
5cec6941
NC
3911 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
3912 symval = (isym->st_value
86aba9db
NC
3913 + sym_sec->output_section->vma
3914 + sym_sec->output_offset);
3915#ifdef DEBUG_RELAX
3916 {
3917 char * name = bfd_elf_string_from_elf_section
5cec6941 3918 (abfd, symtab_hdr->sh_link, isym->st_name);
86aba9db
NC
3919
3920 fprintf (stderr, "relax long jump local: sec: %s, sym: %s (%d), value: %x + %x + %x addend %x\n",
5cec6941
NC
3921 sym_sec->name, name, isym->st_name,
3922 sym_sec->output_section->vma,
3923 sym_sec->output_offset,
3924 isym->st_value, irel->r_addend);
86aba9db
NC
3925 }
3926#endif
3927 }
3928 else
3929 {
3930 unsigned long indx;
3931 struct elf_link_hash_entry * h;
3932
3933 /* An external symbol. */
3934 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
3935 h = elf_sym_hashes (abfd)[indx];
3936 BFD_ASSERT (h != NULL);
3937
3938 if ( h->root.type != bfd_link_hash_defined
3939 && h->root.type != bfd_link_hash_defweak)
3940 /* This appears to be a reference to an undefined
3941 symbol. Just ignore it--it will be caught by the
3942 regular reloc processing. */
3943 continue;
3944
3945 symval = (h->root.u.def.value
3946 + h->root.u.def.section->output_section->vma
3947 + h->root.u.def.section->output_offset);
3948#ifdef DEBUG_RELAX
3949 fprintf (stderr,
3950 "relax longjump defined: sec: %s, name: %s, value: %x + %x + %x addend %x\n",
3951 sec->name, h->root.root.string, h->root.u.def.value,
3952 sec->output_section->vma, sec->output_offset, irel->r_addend);
3953#endif
3954 }
3955
3956 addend = irel->r_addend;
3957
3958 foff = (symval + addend
3959 - (irel->r_offset
3960 + sec->output_section->vma
3961 + sec->output_offset
3962 + 4));
3963#ifdef DEBUG_RELAX
3964 fprintf (stderr, "relax longjump r_offset 0x%x ptr 0x%x symbol 0x%x addend 0x%x distance 0x%x\n",
3965 irel->r_offset,
3966 (irel->r_offset
3967 + sec->output_section->vma
3968 + sec->output_offset),
3969 symval, addend, foff);
3970#endif
3971 if (foff < -0x100000 || foff >= 0x100000)
3972 /* After all that work, we can't shorten this function call. */
3973 continue;
3974
3975 /* For simplicity of coding, we are going to modify the section
07d6d2b8
AM
3976 contents, the section relocs, and the BFD symbol table. We
3977 must tell the rest of the code not to free up this
3978 information. It would be possible to instead create a table
3979 of changes which have to be made, as is done in coff-mips.c;
3980 that would be more work, but would require less memory when
3981 the linker is run. */
86aba9db 3982 elf_section_data (sec)->relocs = internal_relocs;
86aba9db 3983 elf_section_data (sec)->this_hdr.contents = contents;
5cec6941 3984 symtab_hdr->contents = (bfd_byte *) isymbuf;
86aba9db
NC
3985
3986 if (foff < -0x100 || foff >= 0x100)
3987 {
3988 /* Replace the long jump with a jr. */
3989
de863c74
NC
3990 if (bfd_get_arch (abfd) == bfd_arch_v850_rh850)
3991 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_PCR22);
3992 else
3993 irel->r_info =
3994 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_22_PCREL);
b34976b6 3995
86aba9db
NC
3996 irel->r_addend = addend;
3997 addend = 0;
3998
3999 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
4000 /* If this needs to be changed because of future relaxing,
4001 it will be handled here like other internal IND12W
4002 relocs. */
4003 bfd_put_32 (abfd,
4004 0x00000780 | ((addend << 15) & 0xffff0000) | ((addend >> 17) & 0xf),
4005 contents + irel->r_offset);
4006 else
4007 /* We can't fully resolve this yet, because the external
4008 symbol value may be changed by future relaxing.
4009 We let the final link phase handle it. */
4010 bfd_put_32 (abfd, 0x00000780, contents + irel->r_offset);
4011
4012 hi_irelfn->r_info =
4013 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE);
4014 lo_irelfn->r_info =
4015 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE);
4016 if (!v850_elf_relax_delete_bytes (abfd, sec,
4017 irel->r_offset + 4, toaddr, 6))
4018 goto error_return;
4019
4020 align_pad_size += 6;
4021 }
4022 else
4023 {
4024 /* Replace the long jump with a br. */
4025
de863c74
NC
4026 if (bfd_get_arch (abfd) == bfd_arch_v850_rh850)
4027 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_PC9);
4028 else
4029 irel->r_info =
4030 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_9_PCREL);
86aba9db
NC
4031
4032 irel->r_addend = addend;
4033 addend = 0;
4034
4035 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
4036 /* If this needs to be changed because of future relaxing,
4037 it will be handled here like other internal IND12W
4038 relocs. */
4039 bfd_put_16 (abfd,
4040 0x0585 | ((addend << 10) & 0xf800) | ((addend << 3) & 0x0070),
4041 contents + irel->r_offset);
4042 else
4043 /* We can't fully resolve this yet, because the external
4044 symbol value may be changed by future relaxing.
4045 We let the final link phase handle it. */
4046 bfd_put_16 (abfd, 0x0585, contents + irel->r_offset);
4047
4048 hi_irelfn->r_info =
4049 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE);
4050 lo_irelfn->r_info =
4051 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE);
4052 if (!v850_elf_relax_delete_bytes (abfd, sec,
4053 irel->r_offset + 2, toaddr, 8))
4054 goto error_return;
4055
4056 align_pad_size += 8;
4057 }
4058 }
4059 }
4060
4061 irelalign = NULL;
4062 for (irel = internal_relocs; irel < irelend; irel++)
4063 {
4064 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN
4065 && irel->r_offset == toaddr)
4066 {
4067 irel->r_offset -= align_pad_size;
4068
4069 if (irelalign == NULL || irelalign->r_addend > irel->r_addend)
4070 irelalign = irel;
4071 }
4072 }
4073
4074 addr = toaddr;
4075 }
4076
4077 if (!irelalign)
4078 {
4079#ifdef DEBUG_RELAX
4080 fprintf (stderr, "relax pad %d shorten %d -> %d\n",
4081 align_pad_size,
eea6121a
AM
4082 sec->size,
4083 sec->size - align_pad_size);
86aba9db 4084#endif
eea6121a 4085 sec->size -= align_pad_size;
86aba9db
NC
4086 }
4087
5cec6941
NC
4088 finish:
4089 if (internal_relocs != NULL
4090 && elf_section_data (sec)->relocs != internal_relocs)
4091 free (internal_relocs);
86aba9db 4092
5cec6941
NC
4093 if (contents != NULL
4094 && elf_section_data (sec)->this_hdr.contents != (unsigned char *) contents)
4095 free (contents);
86aba9db 4096
5cec6941
NC
4097 if (isymbuf != NULL
4098 && symtab_hdr->contents != (bfd_byte *) isymbuf)
4099 free (isymbuf);
86aba9db 4100
5cec6941 4101 return result;
86aba9db 4102
5cec6941 4103 error_return:
b34976b6 4104 result = FALSE;
5cec6941 4105 goto finish;
86aba9db 4106}
2f89ff8d 4107
b35d266b 4108static const struct bfd_elf_special_section v850_elf_special_sections[] =
7f4d3958 4109{
0112cd26
NC
4110 { STRING_COMMA_LEN (".call_table_data"), 0, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE) },
4111 { STRING_COMMA_LEN (".call_table_text"), 0, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
4112 + SHF_EXECINSTR) },
07d6d2b8 4113 { STRING_COMMA_LEN (".rosdata"), -2, SHT_PROGBITS, (SHF_ALLOC
0112cd26 4114 + SHF_V850_GPREL) },
07d6d2b8 4115 { STRING_COMMA_LEN (".rozdata"), -2, SHT_PROGBITS, (SHF_ALLOC
0112cd26 4116 + SHF_V850_R0REL) },
07d6d2b8 4117 { STRING_COMMA_LEN (".sbss"), -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE
0112cd26 4118 + SHF_V850_GPREL) },
07d6d2b8 4119 { STRING_COMMA_LEN (".scommon"), -2, SHT_V850_SCOMMON, (SHF_ALLOC + SHF_WRITE
0112cd26 4120 + SHF_V850_GPREL) },
07d6d2b8 4121 { STRING_COMMA_LEN (".sdata"), -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
0112cd26 4122 + SHF_V850_GPREL) },
07d6d2b8 4123 { STRING_COMMA_LEN (".tbss"), -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE
0112cd26 4124 + SHF_V850_EPREL) },
07d6d2b8 4125 { STRING_COMMA_LEN (".tcommon"), -2, SHT_V850_TCOMMON, (SHF_ALLOC + SHF_WRITE
0112cd26 4126 + SHF_V850_R0REL) },
07d6d2b8 4127 { STRING_COMMA_LEN (".tdata"), -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
0112cd26 4128 + SHF_V850_EPREL) },
07d6d2b8 4129 { STRING_COMMA_LEN (".zbss"), -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE
0112cd26 4130 + SHF_V850_R0REL) },
07d6d2b8 4131 { STRING_COMMA_LEN (".zcommon"), -2, SHT_V850_ZCOMMON, (SHF_ALLOC + SHF_WRITE
0112cd26 4132 + SHF_V850_R0REL) },
07d6d2b8 4133 { STRING_COMMA_LEN (".zdata"), -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
0112cd26 4134 + SHF_V850_R0REL) },
07d6d2b8 4135 { NULL, 0, 0, 0, 0 }
7f4d3958 4136};
252b5132 4137\f
6d00b590 4138#define TARGET_LITTLE_SYM v850_elf32_vec
252b5132
RH
4139#define TARGET_LITTLE_NAME "elf32-v850"
4140#define ELF_ARCH bfd_arch_v850
aa4f99bb
AO
4141#define ELF_MACHINE_CODE EM_V850
4142#define ELF_MACHINE_ALT1 EM_CYGNUS_V850
252b5132 4143#define ELF_MAXPAGESIZE 0x1000
435b1e90 4144
252b5132
RH
4145#define elf_info_to_howto v850_elf_info_to_howto_rela
4146#define elf_info_to_howto_rel v850_elf_info_to_howto_rel
4147
4148#define elf_backend_check_relocs v850_elf_check_relocs
07d6d2b8 4149#define elf_backend_relocate_section v850_elf_relocate_section
252b5132 4150#define elf_backend_object_p v850_elf_object_p
07d6d2b8
AM
4151#define elf_backend_final_write_processing v850_elf_final_write_processing
4152#define elf_backend_section_from_bfd_section v850_elf_section_from_bfd_section
252b5132
RH
4153#define elf_backend_symbol_processing v850_elf_symbol_processing
4154#define elf_backend_add_symbol_hook v850_elf_add_symbol_hook
07d6d2b8 4155#define elf_backend_link_output_symbol_hook v850_elf_link_output_symbol_hook
252b5132
RH
4156#define elf_backend_section_from_shdr v850_elf_section_from_shdr
4157#define elf_backend_fake_sections v850_elf_fake_sections
07d6d2b8 4158#define elf_backend_gc_mark_hook v850_elf_gc_mark_hook
29ef7005 4159#define elf_backend_special_sections v850_elf_special_sections
252b5132 4160
07d6d2b8 4161#define elf_backend_can_gc_sections 1
685080f2 4162#define elf_backend_rela_normal 1
252b5132 4163
252b5132 4164#define bfd_elf32_bfd_is_local_label_name v850_elf_is_local_label_name
41702d50
NC
4165#define bfd_elf32_bfd_is_target_special_symbol v850_elf_is_target_special_symbol
4166
252b5132 4167#define bfd_elf32_bfd_reloc_type_lookup v850_elf_reloc_type_lookup
07d6d2b8
AM
4168#define bfd_elf32_bfd_reloc_name_lookup v850_elf_reloc_name_lookup
4169#define bfd_elf32_bfd_merge_private_bfd_data v850_elf_merge_private_bfd_data
252b5132
RH
4170#define bfd_elf32_bfd_set_private_flags v850_elf_set_private_flags
4171#define bfd_elf32_bfd_print_private_bfd_data v850_elf_print_private_bfd_data
86aba9db 4172#define bfd_elf32_bfd_relax_section v850_elf_relax_section
252b5132
RH
4173
4174#define elf_symbol_leading_char '_'
4175
de863c74
NC
4176#undef elf32_bed
4177#define elf32_bed elf32_v850_bed
4178
4179#include "elf32-target.h"
4180
4181/* Map BFD reloc types to V800 ELF reloc types. */
4182
4183static const struct v850_elf_reloc_map v800_elf_reloc_map[] =
4184{
07d6d2b8
AM
4185 { BFD_RELOC_NONE, R_V810_NONE },
4186 { BFD_RELOC_8, R_V810_BYTE },
4187 { BFD_RELOC_16, R_V810_HWORD },
4188 { BFD_RELOC_32, R_V810_WORD },
4189 { BFD_RELOC_LO16, R_V810_WLO },
4190 { BFD_RELOC_HI16, R_V810_WHI },
4191 { BFD_RELOC_HI16_S, R_V810_WHI1 },
4192 { BFD_RELOC_V850_32_PCREL, R_V850_PC32 },
4193 { BFD_RELOC_V850_22_PCREL, R_V850_PCR22 },
4194 { BFD_RELOC_V850_17_PCREL, R_V850_PC17 },
4195 { BFD_RELOC_V850_16_PCREL, R_V850_PC16U },
de863c74 4196 { BFD_RELOC_V850_9_PCREL, R_V850_PC9 },
07d6d2b8
AM
4197 { BFD_RELOC_V850_LO16_S1, R_V810_WLO_1 }, /* Or R_V850_HWLO or R_V850_HWLO_1. */
4198 { BFD_RELOC_V850_23, R_V850_WLO23 },
de863c74
NC
4199 { BFD_RELOC_V850_LO16_SPLIT_OFFSET, R_V850_BLO },
4200 { BFD_RELOC_V850_ZDA_16_16_OFFSET, R_V810_HWORD },
4201 { BFD_RELOC_V850_TDA_16_16_OFFSET, R_V810_HWORD },
4202 { BFD_RELOC_V850_SDA_16_16_OFFSET, R_V810_HWORD },
4203 { BFD_RELOC_V850_SDA_15_16_OFFSET, R_V810_GPWLO_1 }
4204};
4205
4206/* Map a bfd relocation into the appropriate howto structure. */
4207
4208static reloc_howto_type *
4209v800_elf_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code)
4210{
4211 unsigned int i;
4212
4213 BFD_ASSERT (bfd_get_arch (abfd) == bfd_arch_v850_rh850);
4214
4215 for (i = ARRAY_SIZE (v800_elf_reloc_map); i --;)
4216 if (v800_elf_reloc_map[i].bfd_reloc_val == code)
4217 {
4218 unsigned int elf_reloc_val = v800_elf_reloc_map[i].elf_reloc_val;
4219 unsigned int idx = elf_reloc_val - R_V810_NONE;
4220
4221 BFD_ASSERT (v800_elf_howto_table[idx].type == elf_reloc_val);
4222
4223 return v800_elf_howto_table + idx;
4224 }
4225
4226#ifdef DEBUG
4227 fprintf (stderr, "failed to find v800 equiv of bfd reloc code %d\n", code);
4228#endif
4229 return NULL;
4230}
4231
4232static reloc_howto_type *
4233v800_elf_reloc_name_lookup (bfd * abfd, const char * r_name)
4234{
4235 unsigned int i;
4236
4237 BFD_ASSERT (bfd_get_arch (abfd) == bfd_arch_v850_rh850);
4238
4239 for (i = ARRAY_SIZE (v800_elf_howto_table); i--;)
4240 if (v800_elf_howto_table[i].name != NULL
4241 && strcasecmp (v800_elf_howto_table[i].name, r_name) == 0)
4242 return v800_elf_howto_table + i;
4243
4244 return NULL;
4245}
4246
4247
4248/* Set the howto pointer in CACHE_PTR for a V800 ELF reloc. */
4249
4250static void
07d6d2b8
AM
4251v800_elf_info_to_howto (bfd * abfd,
4252 arelent * cache_ptr,
de863c74
NC
4253 Elf_Internal_Rela * dst)
4254{
4255 unsigned int r_type = ELF32_R_TYPE (dst->r_info);
4256
4257 BFD_ASSERT (bfd_get_arch (abfd) == bfd_arch_v850_rh850);
4258
4259 BFD_ASSERT (r_type < (unsigned int) R_V800_max);
4260
4261 if (r_type == R_V800_NONE)
4262 r_type = R_V810_NONE;
4263
4264 BFD_ASSERT (r_type >= (unsigned int) R_V810_NONE);
4265 r_type -= R_V810_NONE;
4266 BFD_ASSERT (r_type < ARRAY_SIZE (v800_elf_howto_table));
4267
68ffbac6 4268 cache_ptr->howto = v800_elf_howto_table + r_type;
de863c74
NC
4269}
4270\f
de863c74 4271#undef TARGET_LITTLE_SYM
6d00b590 4272#define TARGET_LITTLE_SYM v800_elf32_vec
de863c74
NC
4273#undef TARGET_LITTLE_NAME
4274#define TARGET_LITTLE_NAME "elf32-v850-rh850"
4275#undef ELF_ARCH
4276#define ELF_ARCH bfd_arch_v850_rh850
4277#undef ELF_MACHINE_CODE
4278#define ELF_MACHINE_CODE EM_V800
4279#undef ELF_MACHINE_ALT1
4280
4281#undef elf32_bed
4282#define elf32_bed elf32_v850_rh850_bed
4283
4284#undef elf_info_to_howto
4285#define elf_info_to_howto v800_elf_info_to_howto
4286#undef elf_info_to_howto_rel
4287#define elf_info_to_howto_rel NULL
4288#undef bfd_elf32_bfd_reloc_type_lookup
4289#define bfd_elf32_bfd_reloc_type_lookup v800_elf_reloc_type_lookup
4290#undef bfd_elf32_bfd_reloc_name_lookup
4291#define bfd_elf32_bfd_reloc_name_lookup v800_elf_reloc_name_lookup
4292
252b5132 4293#include "elf32-target.h"