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3c3bdf30 1/* MMIX-specific support for 64-bit ELF.
fd67aa11 2 Copyright (C) 2001-2024 Free Software Foundation, Inc.
3c3bdf30
NC
3 Contributed by Hans-Peter Nilsson <hp@bitrange.com>
4
cd123cb7 5 This file is part of BFD, the Binary File Descriptor library.
3c3bdf30 6
cd123cb7
NC
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
3c3bdf30 11
cd123cb7
NC
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
3c3bdf30 21
3c3bdf30
NC
22
23/* No specific ABI or "processor-specific supplement" defined. */
24
25/* TODO:
f60ebe14
HPN
26 - "Traditional" linker relaxation (shrinking whole sections).
27 - Merge reloc stubs jumping to same location.
28 - GETA stub relaxation (call a stub for out of range new
29 R_MMIX_GETA_STUBBABLE). */
3c3bdf30 30
3c3bdf30 31#include "sysdep.h"
3db64b00 32#include "bfd.h"
3c3bdf30
NC
33#include "libbfd.h"
34#include "elf-bfd.h"
35#include "elf/mmix.h"
36#include "opcode/mmix.h"
37
38#define MINUS_ONE (((bfd_vma) 0) - 1)
39
f60ebe14
HPN
40#define MAX_PUSHJ_STUB_SIZE (5 * 4)
41
3c3bdf30
NC
42/* Put these everywhere in new code. */
43#define FATAL_DEBUG \
44 _bfd_abort (__FILE__, __LINE__, \
45 "Internal: Non-debugged code (test-case missing)")
46
47#define BAD_CASE(x) \
48 _bfd_abort (__FILE__, __LINE__, \
49 "bad case for " #x)
50
f0abc2a1
AM
51struct _mmix_elf_section_data
52{
53 struct bfd_elf_section_data elf;
54 union
55 {
56 struct bpo_reloc_section_info *reloc;
57 struct bpo_greg_section_info *greg;
58 } bpo;
f60ebe14
HPN
59
60 struct pushj_stub_info
61 {
62 /* Maximum number of stubs needed for this section. */
63 bfd_size_type n_pushj_relocs;
64
65 /* Size of stubs after a mmix_elf_relax_section round. */
66 bfd_size_type stubs_size_sum;
67
68 /* Per-reloc stubs_size_sum information. The stubs_size_sum member is the sum
69 of these. Allocated in mmix_elf_check_common_relocs. */
70 bfd_size_type *stub_size;
71
72 /* Offset of next stub during relocation. Somewhat redundant with the
73 above: error coverage is easier and we don't have to reset the
74 stubs_size_sum for relocation. */
75 bfd_size_type stub_offset;
76 } pjs;
18978b27
HPN
77
78 /* Whether there has been a warning that this section could not be
79 linked due to a specific cause. FIXME: a way to access the
80 linker info or output section, then stuff the limiter guard
81 there. */
0a1b45a2
AM
82 bool has_warned_bpo;
83 bool has_warned_pushj;
f0abc2a1
AM
84};
85
86#define mmix_elf_section_data(sec) \
68bfbfcc 87 ((struct _mmix_elf_section_data *) elf_section_data (sec))
f0abc2a1 88
930b4cb2 89/* For each section containing a base-plus-offset (BPO) reloc, we attach
f0abc2a1 90 this struct as mmix_elf_section_data (section)->bpo, which is otherwise
930b4cb2
HPN
91 NULL. */
92struct bpo_reloc_section_info
93 {
94 /* The base is 1; this is the first number in this section. */
95 size_t first_base_plus_offset_reloc;
96
97 /* Number of BPO-relocs in this section. */
98 size_t n_bpo_relocs_this_section;
99
100 /* Running index, used at relocation time. */
101 size_t bpo_index;
102
103 /* We don't have access to the bfd_link_info struct in
104 mmix_final_link_relocate. What we really want to get at is the
105 global single struct greg_relocation, so we stash it here. */
106 asection *bpo_greg_section;
107 };
108
109/* Helper struct (in global context) for the one below.
110 There's one of these created for every BPO reloc. */
111struct bpo_reloc_request
112 {
113 bfd_vma value;
114
115 /* Valid after relaxation. The base is 0; the first register number
116 must be added. The offset is in range 0..255. */
117 size_t regindex;
118 size_t offset;
119
120 /* The order number for this BPO reloc, corresponding to the order in
121 which BPO relocs were found. Used to create an index after reloc
122 requests are sorted. */
123 size_t bpo_reloc_no;
124
125 /* Set when the value is computed. Better than coding "guard values"
b34976b6 126 into the other members. Is FALSE only for BPO relocs in a GC:ed
930b4cb2 127 section. */
0a1b45a2 128 bool valid;
930b4cb2
HPN
129 };
130
f0abc2a1 131/* We attach this as mmix_elf_section_data (sec)->bpo in the linker-allocated
930b4cb2
HPN
132 greg contents section (MMIX_LD_ALLOCATED_REG_CONTENTS_SECTION_NAME),
133 which is linked into the register contents section
134 (MMIX_REG_CONTENTS_SECTION_NAME). This section is created by the
135 linker; using the same hook as for usual with BPO relocs does not
136 collide. */
137struct bpo_greg_section_info
138 {
139 /* After GC, this reflects the number of remaining, non-excluded
140 BPO-relocs. */
141 size_t n_bpo_relocs;
142
143 /* This is the number of allocated bpo_reloc_requests; the size of
144 sorted_indexes. Valid after the check.*relocs functions are called
145 for all incoming sections. It includes the number of BPO relocs in
146 sections that were GC:ed. */
147 size_t n_max_bpo_relocs;
148
149 /* A counter used to find out when to fold the BPO gregs, since we
150 don't have a single "after-relaxation" hook. */
151 size_t n_remaining_bpo_relocs_this_relaxation_round;
152
153 /* The number of linker-allocated GREGs resulting from BPO relocs.
f60ebe14
HPN
154 This is an approximation after _bfd_mmix_before_linker_allocation
155 and supposedly accurate after mmix_elf_relax_section is called for
156 all incoming non-collected sections. */
930b4cb2
HPN
157 size_t n_allocated_bpo_gregs;
158
159 /* Index into reloc_request[], sorted on increasing "value", secondary
160 by increasing index for strict sorting order. */
161 size_t *bpo_reloc_indexes;
162
163 /* An array of all relocations, with the "value" member filled in by
164 the relaxation function. */
165 struct bpo_reloc_request *reloc_request;
166 };
167
3c3bdf30 168
0a1b45a2 169extern bool mmix_elf_final_link (bfd *, struct bfd_link_info *);
3c3bdf30 170
2c3fc389 171extern void mmix_elf_symbol_processing (bfd *, asymbol *);
3c3bdf30 172
4fa5c2a8
HPN
173/* Only intended to be called from a debugger. */
174extern void mmix_dump_bpo_gregs
52d45da3 175 (struct bfd_link_info *, void (*) (const char *, ...));
4fa5c2a8 176
f60ebe14 177static void
2c3fc389
NC
178mmix_set_relaxable_size (bfd *, asection *, void *);
179static bfd_reloc_status_type
180mmix_elf_reloc (bfd *, arelent *, asymbol *, void *,
181 asection *, bfd *, char **);
182static bfd_reloc_status_type
183mmix_final_link_relocate (reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
184 bfd_signed_vma, bfd_vma, const char *, asection *,
185 char **);
f60ebe14 186
f60ebe14 187
3c3bdf30
NC
188/* Watch out: this currently needs to have elements with the same index as
189 their R_MMIX_ number. */
190static reloc_howto_type elf_mmix_howto_table[] =
191 {
192 /* This reloc does nothing. */
193 HOWTO (R_MMIX_NONE, /* type */
194 0, /* rightshift */
c94cb026 195 0, /* size */
6346d5ca 196 0, /* bitsize */
0a1b45a2 197 false, /* pc_relative */
3c3bdf30 198 0, /* bitpos */
6346d5ca 199 complain_overflow_dont, /* complain_on_overflow */
3c3bdf30
NC
200 bfd_elf_generic_reloc, /* special_function */
201 "R_MMIX_NONE", /* name */
0a1b45a2 202 false, /* partial_inplace */
3c3bdf30
NC
203 0, /* src_mask */
204 0, /* dst_mask */
0a1b45a2 205 false), /* pcrel_offset */
3c3bdf30
NC
206
207 /* An 8 bit absolute relocation. */
208 HOWTO (R_MMIX_8, /* type */
209 0, /* rightshift */
c94cb026 210 1, /* size */
3c3bdf30 211 8, /* bitsize */
0a1b45a2 212 false, /* pc_relative */
3c3bdf30
NC
213 0, /* bitpos */
214 complain_overflow_bitfield, /* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_MMIX_8", /* name */
0a1b45a2 217 false, /* partial_inplace */
930b4cb2 218 0, /* src_mask */
3c3bdf30 219 0xff, /* dst_mask */
0a1b45a2 220 false), /* pcrel_offset */
3c3bdf30
NC
221
222 /* An 16 bit absolute relocation. */
223 HOWTO (R_MMIX_16, /* type */
224 0, /* rightshift */
c94cb026 225 2, /* size */
3c3bdf30 226 16, /* bitsize */
0a1b45a2 227 false, /* pc_relative */
3c3bdf30
NC
228 0, /* bitpos */
229 complain_overflow_bitfield, /* complain_on_overflow */
230 bfd_elf_generic_reloc, /* special_function */
231 "R_MMIX_16", /* name */
0a1b45a2 232 false, /* partial_inplace */
930b4cb2 233 0, /* src_mask */
3c3bdf30 234 0xffff, /* dst_mask */
0a1b45a2 235 false), /* pcrel_offset */
3c3bdf30
NC
236
237 /* An 24 bit absolute relocation. */
238 HOWTO (R_MMIX_24, /* type */
239 0, /* rightshift */
c94cb026 240 4, /* size */
3c3bdf30 241 24, /* bitsize */
0a1b45a2 242 false, /* pc_relative */
3c3bdf30
NC
243 0, /* bitpos */
244 complain_overflow_bitfield, /* complain_on_overflow */
245 bfd_elf_generic_reloc, /* special_function */
246 "R_MMIX_24", /* name */
0a1b45a2 247 false, /* partial_inplace */
930b4cb2 248 ~0xffffff, /* src_mask */
3c3bdf30 249 0xffffff, /* dst_mask */
0a1b45a2 250 false), /* pcrel_offset */
3c3bdf30
NC
251
252 /* A 32 bit absolute relocation. */
253 HOWTO (R_MMIX_32, /* type */
254 0, /* rightshift */
c94cb026 255 4, /* size */
3c3bdf30 256 32, /* bitsize */
0a1b45a2 257 false, /* pc_relative */
3c3bdf30
NC
258 0, /* bitpos */
259 complain_overflow_bitfield, /* complain_on_overflow */
260 bfd_elf_generic_reloc, /* special_function */
261 "R_MMIX_32", /* name */
0a1b45a2 262 false, /* partial_inplace */
930b4cb2 263 0, /* src_mask */
3c3bdf30 264 0xffffffff, /* dst_mask */
0a1b45a2 265 false), /* pcrel_offset */
3c3bdf30
NC
266
267 /* 64 bit relocation. */
268 HOWTO (R_MMIX_64, /* type */
269 0, /* rightshift */
c94cb026 270 8, /* size */
3c3bdf30 271 64, /* bitsize */
0a1b45a2 272 false, /* pc_relative */
3c3bdf30
NC
273 0, /* bitpos */
274 complain_overflow_bitfield, /* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_MMIX_64", /* name */
0a1b45a2 277 false, /* partial_inplace */
930b4cb2 278 0, /* src_mask */
3c3bdf30 279 MINUS_ONE, /* dst_mask */
0a1b45a2 280 false), /* pcrel_offset */
3c3bdf30
NC
281
282 /* An 8 bit PC-relative relocation. */
283 HOWTO (R_MMIX_PC_8, /* type */
284 0, /* rightshift */
c94cb026 285 1, /* size */
3c3bdf30 286 8, /* bitsize */
0a1b45a2 287 true, /* pc_relative */
3c3bdf30
NC
288 0, /* bitpos */
289 complain_overflow_bitfield, /* complain_on_overflow */
290 bfd_elf_generic_reloc, /* special_function */
291 "R_MMIX_PC_8", /* name */
0a1b45a2 292 false, /* partial_inplace */
930b4cb2 293 0, /* src_mask */
3c3bdf30 294 0xff, /* dst_mask */
0a1b45a2 295 true), /* pcrel_offset */
3c3bdf30
NC
296
297 /* An 16 bit PC-relative relocation. */
298 HOWTO (R_MMIX_PC_16, /* type */
299 0, /* rightshift */
c94cb026 300 2, /* size */
3c3bdf30 301 16, /* bitsize */
0a1b45a2 302 true, /* pc_relative */
3c3bdf30
NC
303 0, /* bitpos */
304 complain_overflow_bitfield, /* complain_on_overflow */
305 bfd_elf_generic_reloc, /* special_function */
306 "R_MMIX_PC_16", /* name */
0a1b45a2 307 false, /* partial_inplace */
930b4cb2 308 0, /* src_mask */
3c3bdf30 309 0xffff, /* dst_mask */
0a1b45a2 310 true), /* pcrel_offset */
3c3bdf30
NC
311
312 /* An 24 bit PC-relative relocation. */
313 HOWTO (R_MMIX_PC_24, /* type */
314 0, /* rightshift */
c94cb026 315 4, /* size */
3c3bdf30 316 24, /* bitsize */
0a1b45a2 317 true, /* pc_relative */
3c3bdf30
NC
318 0, /* bitpos */
319 complain_overflow_bitfield, /* complain_on_overflow */
320 bfd_elf_generic_reloc, /* special_function */
321 "R_MMIX_PC_24", /* name */
0a1b45a2 322 false, /* partial_inplace */
930b4cb2 323 ~0xffffff, /* src_mask */
3c3bdf30 324 0xffffff, /* dst_mask */
0a1b45a2 325 true), /* pcrel_offset */
3c3bdf30
NC
326
327 /* A 32 bit absolute PC-relative relocation. */
328 HOWTO (R_MMIX_PC_32, /* type */
329 0, /* rightshift */
c94cb026 330 4, /* size */
3c3bdf30 331 32, /* bitsize */
0a1b45a2 332 true, /* pc_relative */
3c3bdf30
NC
333 0, /* bitpos */
334 complain_overflow_bitfield, /* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_MMIX_PC_32", /* name */
0a1b45a2 337 false, /* partial_inplace */
930b4cb2 338 0, /* src_mask */
3c3bdf30 339 0xffffffff, /* dst_mask */
0a1b45a2 340 true), /* pcrel_offset */
3c3bdf30
NC
341
342 /* 64 bit PC-relative relocation. */
343 HOWTO (R_MMIX_PC_64, /* type */
344 0, /* rightshift */
c94cb026 345 8, /* size */
3c3bdf30 346 64, /* bitsize */
0a1b45a2 347 true, /* pc_relative */
3c3bdf30
NC
348 0, /* bitpos */
349 complain_overflow_bitfield, /* complain_on_overflow */
350 bfd_elf_generic_reloc, /* special_function */
351 "R_MMIX_PC_64", /* name */
0a1b45a2 352 false, /* partial_inplace */
930b4cb2 353 0, /* src_mask */
3c3bdf30 354 MINUS_ONE, /* dst_mask */
0a1b45a2 355 true), /* pcrel_offset */
3c3bdf30
NC
356
357 /* GNU extension to record C++ vtable hierarchy. */
358 HOWTO (R_MMIX_GNU_VTINHERIT, /* type */
359 0, /* rightshift */
5d0feb98 360 0, /* size */
3c3bdf30 361 0, /* bitsize */
0a1b45a2 362 false, /* pc_relative */
3c3bdf30
NC
363 0, /* bitpos */
364 complain_overflow_dont, /* complain_on_overflow */
365 NULL, /* special_function */
366 "R_MMIX_GNU_VTINHERIT", /* name */
0a1b45a2 367 false, /* partial_inplace */
3c3bdf30
NC
368 0, /* src_mask */
369 0, /* dst_mask */
0a1b45a2 370 true), /* pcrel_offset */
3c3bdf30
NC
371
372 /* GNU extension to record C++ vtable member usage. */
373 HOWTO (R_MMIX_GNU_VTENTRY, /* type */
374 0, /* rightshift */
5d0feb98 375 0, /* size */
3c3bdf30 376 0, /* bitsize */
0a1b45a2 377 false, /* pc_relative */
3c3bdf30
NC
378 0, /* bitpos */
379 complain_overflow_dont, /* complain_on_overflow */
380 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
381 "R_MMIX_GNU_VTENTRY", /* name */
0a1b45a2 382 false, /* partial_inplace */
3c3bdf30
NC
383 0, /* src_mask */
384 0, /* dst_mask */
0a1b45a2 385 false), /* pcrel_offset */
3c3bdf30
NC
386
387 /* The GETA relocation is supposed to get any address that could
388 possibly be reached by the GETA instruction. It can silently expand
389 to get a 64-bit operand, but will complain if any of the two least
390 significant bits are set. The howto members reflect a simple GETA. */
391 HOWTO (R_MMIX_GETA, /* type */
392 2, /* rightshift */
c94cb026 393 4, /* size */
3c3bdf30 394 19, /* bitsize */
0a1b45a2 395 true, /* pc_relative */
3c3bdf30
NC
396 0, /* bitpos */
397 complain_overflow_signed, /* complain_on_overflow */
398 mmix_elf_reloc, /* special_function */
399 "R_MMIX_GETA", /* name */
0a1b45a2 400 false, /* partial_inplace */
930b4cb2 401 ~0x0100ffff, /* src_mask */
3c3bdf30 402 0x0100ffff, /* dst_mask */
0a1b45a2 403 true), /* pcrel_offset */
3c3bdf30
NC
404
405 HOWTO (R_MMIX_GETA_1, /* type */
406 2, /* rightshift */
c94cb026 407 4, /* size */
3c3bdf30 408 19, /* bitsize */
0a1b45a2 409 true, /* pc_relative */
3c3bdf30
NC
410 0, /* bitpos */
411 complain_overflow_signed, /* complain_on_overflow */
412 mmix_elf_reloc, /* special_function */
413 "R_MMIX_GETA_1", /* name */
0a1b45a2 414 false, /* partial_inplace */
930b4cb2 415 ~0x0100ffff, /* src_mask */
3c3bdf30 416 0x0100ffff, /* dst_mask */
0a1b45a2 417 true), /* pcrel_offset */
3c3bdf30
NC
418
419 HOWTO (R_MMIX_GETA_2, /* type */
420 2, /* rightshift */
c94cb026 421 4, /* size */
3c3bdf30 422 19, /* bitsize */
0a1b45a2 423 true, /* pc_relative */
3c3bdf30
NC
424 0, /* bitpos */
425 complain_overflow_signed, /* complain_on_overflow */
426 mmix_elf_reloc, /* special_function */
427 "R_MMIX_GETA_2", /* name */
0a1b45a2 428 false, /* partial_inplace */
930b4cb2 429 ~0x0100ffff, /* src_mask */
3c3bdf30 430 0x0100ffff, /* dst_mask */
0a1b45a2 431 true), /* pcrel_offset */
3c3bdf30
NC
432
433 HOWTO (R_MMIX_GETA_3, /* type */
434 2, /* rightshift */
c94cb026 435 4, /* size */
3c3bdf30 436 19, /* bitsize */
0a1b45a2 437 true, /* pc_relative */
3c3bdf30
NC
438 0, /* bitpos */
439 complain_overflow_signed, /* complain_on_overflow */
440 mmix_elf_reloc, /* special_function */
441 "R_MMIX_GETA_3", /* name */
0a1b45a2 442 false, /* partial_inplace */
930b4cb2 443 ~0x0100ffff, /* src_mask */
3c3bdf30 444 0x0100ffff, /* dst_mask */
0a1b45a2 445 true), /* pcrel_offset */
3c3bdf30
NC
446
447 /* The conditional branches are supposed to reach any (code) address.
448 It can silently expand to a 64-bit operand, but will emit an error if
449 any of the two least significant bits are set. The howto members
450 reflect a simple branch. */
451 HOWTO (R_MMIX_CBRANCH, /* type */
452 2, /* rightshift */
c94cb026 453 4, /* size */
3c3bdf30 454 19, /* bitsize */
0a1b45a2 455 true, /* pc_relative */
3c3bdf30
NC
456 0, /* bitpos */
457 complain_overflow_signed, /* complain_on_overflow */
458 mmix_elf_reloc, /* special_function */
459 "R_MMIX_CBRANCH", /* name */
0a1b45a2 460 false, /* partial_inplace */
930b4cb2 461 ~0x0100ffff, /* src_mask */
3c3bdf30 462 0x0100ffff, /* dst_mask */
0a1b45a2 463 true), /* pcrel_offset */
3c3bdf30
NC
464
465 HOWTO (R_MMIX_CBRANCH_J, /* type */
466 2, /* rightshift */
c94cb026 467 4, /* size */
3c3bdf30 468 19, /* bitsize */
0a1b45a2 469 true, /* pc_relative */
3c3bdf30
NC
470 0, /* bitpos */
471 complain_overflow_signed, /* complain_on_overflow */
472 mmix_elf_reloc, /* special_function */
473 "R_MMIX_CBRANCH_J", /* name */
0a1b45a2 474 false, /* partial_inplace */
930b4cb2 475 ~0x0100ffff, /* src_mask */
3c3bdf30 476 0x0100ffff, /* dst_mask */
0a1b45a2 477 true), /* pcrel_offset */
3c3bdf30
NC
478
479 HOWTO (R_MMIX_CBRANCH_1, /* type */
480 2, /* rightshift */
c94cb026 481 4, /* size */
3c3bdf30 482 19, /* bitsize */
0a1b45a2 483 true, /* pc_relative */
3c3bdf30
NC
484 0, /* bitpos */
485 complain_overflow_signed, /* complain_on_overflow */
486 mmix_elf_reloc, /* special_function */
487 "R_MMIX_CBRANCH_1", /* name */
0a1b45a2 488 false, /* partial_inplace */
930b4cb2 489 ~0x0100ffff, /* src_mask */
3c3bdf30 490 0x0100ffff, /* dst_mask */
0a1b45a2 491 true), /* pcrel_offset */
3c3bdf30
NC
492
493 HOWTO (R_MMIX_CBRANCH_2, /* type */
494 2, /* rightshift */
c94cb026 495 4, /* size */
3c3bdf30 496 19, /* bitsize */
0a1b45a2 497 true, /* pc_relative */
3c3bdf30
NC
498 0, /* bitpos */
499 complain_overflow_signed, /* complain_on_overflow */
500 mmix_elf_reloc, /* special_function */
501 "R_MMIX_CBRANCH_2", /* name */
0a1b45a2 502 false, /* partial_inplace */
930b4cb2 503 ~0x0100ffff, /* src_mask */
3c3bdf30 504 0x0100ffff, /* dst_mask */
0a1b45a2 505 true), /* pcrel_offset */
3c3bdf30
NC
506
507 HOWTO (R_MMIX_CBRANCH_3, /* type */
508 2, /* rightshift */
c94cb026 509 4, /* size */
3c3bdf30 510 19, /* bitsize */
0a1b45a2 511 true, /* pc_relative */
3c3bdf30
NC
512 0, /* bitpos */
513 complain_overflow_signed, /* complain_on_overflow */
514 mmix_elf_reloc, /* special_function */
515 "R_MMIX_CBRANCH_3", /* name */
0a1b45a2 516 false, /* partial_inplace */
930b4cb2 517 ~0x0100ffff, /* src_mask */
3c3bdf30 518 0x0100ffff, /* dst_mask */
0a1b45a2 519 true), /* pcrel_offset */
3c3bdf30
NC
520
521 /* The PUSHJ instruction can reach any (code) address, as long as it's
522 the beginning of a function (no usable restriction). It can silently
523 expand to a 64-bit operand, but will emit an error if any of the two
f60ebe14
HPN
524 least significant bits are set. It can also expand into a call to a
525 stub; see R_MMIX_PUSHJ_STUBBABLE. The howto members reflect a simple
3c3bdf30
NC
526 PUSHJ. */
527 HOWTO (R_MMIX_PUSHJ, /* type */
528 2, /* rightshift */
c94cb026 529 4, /* size */
3c3bdf30 530 19, /* bitsize */
0a1b45a2 531 true, /* pc_relative */
3c3bdf30
NC
532 0, /* bitpos */
533 complain_overflow_signed, /* complain_on_overflow */
534 mmix_elf_reloc, /* special_function */
535 "R_MMIX_PUSHJ", /* name */
0a1b45a2 536 false, /* partial_inplace */
930b4cb2 537 ~0x0100ffff, /* src_mask */
3c3bdf30 538 0x0100ffff, /* dst_mask */
0a1b45a2 539 true), /* pcrel_offset */
3c3bdf30
NC
540
541 HOWTO (R_MMIX_PUSHJ_1, /* type */
542 2, /* rightshift */
c94cb026 543 4, /* size */
3c3bdf30 544 19, /* bitsize */
0a1b45a2 545 true, /* pc_relative */
3c3bdf30
NC
546 0, /* bitpos */
547 complain_overflow_signed, /* complain_on_overflow */
548 mmix_elf_reloc, /* special_function */
549 "R_MMIX_PUSHJ_1", /* name */
0a1b45a2 550 false, /* partial_inplace */
930b4cb2 551 ~0x0100ffff, /* src_mask */
3c3bdf30 552 0x0100ffff, /* dst_mask */
0a1b45a2 553 true), /* pcrel_offset */
3c3bdf30
NC
554
555 HOWTO (R_MMIX_PUSHJ_2, /* type */
556 2, /* rightshift */
c94cb026 557 4, /* size */
3c3bdf30 558 19, /* bitsize */
0a1b45a2 559 true, /* pc_relative */
3c3bdf30
NC
560 0, /* bitpos */
561 complain_overflow_signed, /* complain_on_overflow */
562 mmix_elf_reloc, /* special_function */
563 "R_MMIX_PUSHJ_2", /* name */
0a1b45a2 564 false, /* partial_inplace */
930b4cb2 565 ~0x0100ffff, /* src_mask */
3c3bdf30 566 0x0100ffff, /* dst_mask */
0a1b45a2 567 true), /* pcrel_offset */
3c3bdf30
NC
568
569 HOWTO (R_MMIX_PUSHJ_3, /* type */
570 2, /* rightshift */
c94cb026 571 4, /* size */
3c3bdf30 572 19, /* bitsize */
0a1b45a2 573 true, /* pc_relative */
3c3bdf30
NC
574 0, /* bitpos */
575 complain_overflow_signed, /* complain_on_overflow */
576 mmix_elf_reloc, /* special_function */
577 "R_MMIX_PUSHJ_3", /* name */
0a1b45a2 578 false, /* partial_inplace */
930b4cb2 579 ~0x0100ffff, /* src_mask */
3c3bdf30 580 0x0100ffff, /* dst_mask */
0a1b45a2 581 true), /* pcrel_offset */
3c3bdf30
NC
582
583 /* A JMP is supposed to reach any (code) address. By itself, it can
584 reach +-64M; the expansion can reach all 64 bits. Note that the 64M
585 limit is soon reached if you link the program in wildly different
586 memory segments. The howto members reflect a trivial JMP. */
587 HOWTO (R_MMIX_JMP, /* type */
588 2, /* rightshift */
c94cb026 589 4, /* size */
3c3bdf30 590 27, /* bitsize */
0a1b45a2 591 true, /* pc_relative */
3c3bdf30
NC
592 0, /* bitpos */
593 complain_overflow_signed, /* complain_on_overflow */
594 mmix_elf_reloc, /* special_function */
595 "R_MMIX_JMP", /* name */
0a1b45a2 596 false, /* partial_inplace */
930b4cb2 597 ~0x1ffffff, /* src_mask */
3c3bdf30 598 0x1ffffff, /* dst_mask */
0a1b45a2 599 true), /* pcrel_offset */
3c3bdf30
NC
600
601 HOWTO (R_MMIX_JMP_1, /* type */
602 2, /* rightshift */
c94cb026 603 4, /* size */
3c3bdf30 604 27, /* bitsize */
0a1b45a2 605 true, /* pc_relative */
3c3bdf30
NC
606 0, /* bitpos */
607 complain_overflow_signed, /* complain_on_overflow */
608 mmix_elf_reloc, /* special_function */
609 "R_MMIX_JMP_1", /* name */
0a1b45a2 610 false, /* partial_inplace */
930b4cb2 611 ~0x1ffffff, /* src_mask */
3c3bdf30 612 0x1ffffff, /* dst_mask */
0a1b45a2 613 true), /* pcrel_offset */
3c3bdf30
NC
614
615 HOWTO (R_MMIX_JMP_2, /* type */
616 2, /* rightshift */
c94cb026 617 4, /* size */
3c3bdf30 618 27, /* bitsize */
0a1b45a2 619 true, /* pc_relative */
3c3bdf30
NC
620 0, /* bitpos */
621 complain_overflow_signed, /* complain_on_overflow */
622 mmix_elf_reloc, /* special_function */
623 "R_MMIX_JMP_2", /* name */
0a1b45a2 624 false, /* partial_inplace */
930b4cb2 625 ~0x1ffffff, /* src_mask */
3c3bdf30 626 0x1ffffff, /* dst_mask */
0a1b45a2 627 true), /* pcrel_offset */
3c3bdf30
NC
628
629 HOWTO (R_MMIX_JMP_3, /* type */
630 2, /* rightshift */
c94cb026 631 4, /* size */
3c3bdf30 632 27, /* bitsize */
0a1b45a2 633 true, /* pc_relative */
3c3bdf30
NC
634 0, /* bitpos */
635 complain_overflow_signed, /* complain_on_overflow */
636 mmix_elf_reloc, /* special_function */
637 "R_MMIX_JMP_3", /* name */
0a1b45a2 638 false, /* partial_inplace */
930b4cb2 639 ~0x1ffffff, /* src_mask */
3c3bdf30 640 0x1ffffff, /* dst_mask */
0a1b45a2 641 true), /* pcrel_offset */
3c3bdf30
NC
642
643 /* When we don't emit link-time-relaxable code from the assembler, or
644 when relaxation has done all it can do, these relocs are used. For
645 GETA/PUSHJ/branches. */
646 HOWTO (R_MMIX_ADDR19, /* type */
647 2, /* rightshift */
c94cb026 648 4, /* size */
3c3bdf30 649 19, /* bitsize */
0a1b45a2 650 true, /* pc_relative */
3c3bdf30
NC
651 0, /* bitpos */
652 complain_overflow_signed, /* complain_on_overflow */
653 mmix_elf_reloc, /* special_function */
654 "R_MMIX_ADDR19", /* name */
0a1b45a2 655 false, /* partial_inplace */
930b4cb2 656 ~0x0100ffff, /* src_mask */
3c3bdf30 657 0x0100ffff, /* dst_mask */
0a1b45a2 658 true), /* pcrel_offset */
3c3bdf30
NC
659
660 /* For JMP. */
661 HOWTO (R_MMIX_ADDR27, /* type */
662 2, /* rightshift */
c94cb026 663 4, /* size */
3c3bdf30 664 27, /* bitsize */
0a1b45a2 665 true, /* pc_relative */
3c3bdf30
NC
666 0, /* bitpos */
667 complain_overflow_signed, /* complain_on_overflow */
668 mmix_elf_reloc, /* special_function */
669 "R_MMIX_ADDR27", /* name */
0a1b45a2 670 false, /* partial_inplace */
930b4cb2 671 ~0x1ffffff, /* src_mask */
3c3bdf30 672 0x1ffffff, /* dst_mask */
0a1b45a2 673 true), /* pcrel_offset */
3c3bdf30
NC
674
675 /* A general register or the value 0..255. If a value, then the
676 instruction (offset -3) needs adjusting. */
677 HOWTO (R_MMIX_REG_OR_BYTE, /* type */
678 0, /* rightshift */
c94cb026 679 2, /* size */
3c3bdf30 680 8, /* bitsize */
0a1b45a2 681 false, /* pc_relative */
3c3bdf30
NC
682 0, /* bitpos */
683 complain_overflow_bitfield, /* complain_on_overflow */
684 mmix_elf_reloc, /* special_function */
685 "R_MMIX_REG_OR_BYTE", /* name */
0a1b45a2 686 false, /* partial_inplace */
930b4cb2 687 0, /* src_mask */
3c3bdf30 688 0xff, /* dst_mask */
0a1b45a2 689 false), /* pcrel_offset */
3c3bdf30
NC
690
691 /* A general register. */
692 HOWTO (R_MMIX_REG, /* type */
693 0, /* rightshift */
c94cb026 694 2, /* size */
3c3bdf30 695 8, /* bitsize */
0a1b45a2 696 false, /* pc_relative */
3c3bdf30
NC
697 0, /* bitpos */
698 complain_overflow_bitfield, /* complain_on_overflow */
699 mmix_elf_reloc, /* special_function */
700 "R_MMIX_REG", /* name */
0a1b45a2 701 false, /* partial_inplace */
930b4cb2 702 0, /* src_mask */
3c3bdf30 703 0xff, /* dst_mask */
0a1b45a2 704 false), /* pcrel_offset */
3c3bdf30
NC
705
706 /* A register plus an index, corresponding to the relocation expression.
707 The sizes must correspond to the valid range of the expression, while
708 the bitmasks correspond to what we store in the image. */
709 HOWTO (R_MMIX_BASE_PLUS_OFFSET, /* type */
710 0, /* rightshift */
c94cb026 711 8, /* size */
3c3bdf30 712 64, /* bitsize */
0a1b45a2 713 false, /* pc_relative */
3c3bdf30
NC
714 0, /* bitpos */
715 complain_overflow_bitfield, /* complain_on_overflow */
716 mmix_elf_reloc, /* special_function */
717 "R_MMIX_BASE_PLUS_OFFSET", /* name */
0a1b45a2 718 false, /* partial_inplace */
930b4cb2 719 0, /* src_mask */
3c3bdf30 720 0xffff, /* dst_mask */
0a1b45a2 721 false), /* pcrel_offset */
3c3bdf30
NC
722
723 /* A "magic" relocation for a LOCAL expression, asserting that the
724 expression is less than the number of global registers. No actual
725 modification of the contents is done. Implementing this as a
726 relocation was less intrusive than e.g. putting such expressions in a
727 section to discard *after* relocation. */
728 HOWTO (R_MMIX_LOCAL, /* type */
729 0, /* rightshift */
5d0feb98 730 0, /* size */
3c3bdf30 731 0, /* bitsize */
0a1b45a2 732 false, /* pc_relative */
3c3bdf30
NC
733 0, /* bitpos */
734 complain_overflow_dont, /* complain_on_overflow */
735 mmix_elf_reloc, /* special_function */
736 "R_MMIX_LOCAL", /* name */
0a1b45a2 737 false, /* partial_inplace */
3c3bdf30
NC
738 0, /* src_mask */
739 0, /* dst_mask */
0a1b45a2 740 false), /* pcrel_offset */
f60ebe14
HPN
741
742 HOWTO (R_MMIX_PUSHJ_STUBBABLE, /* type */
743 2, /* rightshift */
c94cb026 744 4, /* size */
f60ebe14 745 19, /* bitsize */
0a1b45a2 746 true, /* pc_relative */
f60ebe14
HPN
747 0, /* bitpos */
748 complain_overflow_signed, /* complain_on_overflow */
749 mmix_elf_reloc, /* special_function */
750 "R_MMIX_PUSHJ_STUBBABLE", /* name */
0a1b45a2 751 false, /* partial_inplace */
f60ebe14
HPN
752 ~0x0100ffff, /* src_mask */
753 0x0100ffff, /* dst_mask */
0a1b45a2 754 true) /* pcrel_offset */
3c3bdf30
NC
755 };
756
757
758/* Map BFD reloc types to MMIX ELF reloc types. */
759
760struct mmix_reloc_map
761 {
762 bfd_reloc_code_real_type bfd_reloc_val;
763 enum elf_mmix_reloc_type elf_reloc_val;
764 };
765
766
767static const struct mmix_reloc_map mmix_reloc_map[] =
768 {
769 {BFD_RELOC_NONE, R_MMIX_NONE},
770 {BFD_RELOC_8, R_MMIX_8},
771 {BFD_RELOC_16, R_MMIX_16},
772 {BFD_RELOC_24, R_MMIX_24},
773 {BFD_RELOC_32, R_MMIX_32},
774 {BFD_RELOC_64, R_MMIX_64},
775 {BFD_RELOC_8_PCREL, R_MMIX_PC_8},
776 {BFD_RELOC_16_PCREL, R_MMIX_PC_16},
777 {BFD_RELOC_24_PCREL, R_MMIX_PC_24},
778 {BFD_RELOC_32_PCREL, R_MMIX_PC_32},
779 {BFD_RELOC_64_PCREL, R_MMIX_PC_64},
780 {BFD_RELOC_VTABLE_INHERIT, R_MMIX_GNU_VTINHERIT},
781 {BFD_RELOC_VTABLE_ENTRY, R_MMIX_GNU_VTENTRY},
782 {BFD_RELOC_MMIX_GETA, R_MMIX_GETA},
783 {BFD_RELOC_MMIX_CBRANCH, R_MMIX_CBRANCH},
784 {BFD_RELOC_MMIX_PUSHJ, R_MMIX_PUSHJ},
785 {BFD_RELOC_MMIX_JMP, R_MMIX_JMP},
786 {BFD_RELOC_MMIX_ADDR19, R_MMIX_ADDR19},
787 {BFD_RELOC_MMIX_ADDR27, R_MMIX_ADDR27},
788 {BFD_RELOC_MMIX_REG_OR_BYTE, R_MMIX_REG_OR_BYTE},
789 {BFD_RELOC_MMIX_REG, R_MMIX_REG},
790 {BFD_RELOC_MMIX_BASE_PLUS_OFFSET, R_MMIX_BASE_PLUS_OFFSET},
f60ebe14
HPN
791 {BFD_RELOC_MMIX_LOCAL, R_MMIX_LOCAL},
792 {BFD_RELOC_MMIX_PUSHJ_STUBBABLE, R_MMIX_PUSHJ_STUBBABLE}
3c3bdf30
NC
793 };
794
795static reloc_howto_type *
2c3fc389
NC
796bfd_elf64_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
797 bfd_reloc_code_real_type code)
3c3bdf30
NC
798{
799 unsigned int i;
800
801 for (i = 0;
802 i < sizeof (mmix_reloc_map) / sizeof (mmix_reloc_map[0]);
803 i++)
804 {
805 if (mmix_reloc_map[i].bfd_reloc_val == code)
806 return &elf_mmix_howto_table[mmix_reloc_map[i].elf_reloc_val];
807 }
808
809 return NULL;
157090f7
AM
810}
811
812static reloc_howto_type *
813bfd_elf64_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
814 const char *r_name)
815{
816 unsigned int i;
817
818 for (i = 0;
819 i < sizeof (elf_mmix_howto_table) / sizeof (elf_mmix_howto_table[0]);
820 i++)
821 if (elf_mmix_howto_table[i].name != NULL
822 && strcasecmp (elf_mmix_howto_table[i].name, r_name) == 0)
823 return &elf_mmix_howto_table[i];
824
825 return NULL;
3c3bdf30
NC
826}
827
0a1b45a2 828static bool
2c3fc389 829mmix_elf_new_section_hook (bfd *abfd, asection *sec)
f0abc2a1 830{
f592407e
AM
831 if (!sec->used_by_bfd)
832 {
833 struct _mmix_elf_section_data *sdata;
986f0783 834 size_t amt = sizeof (*sdata);
f0abc2a1 835
f592407e
AM
836 sdata = bfd_zalloc (abfd, amt);
837 if (sdata == NULL)
0a1b45a2 838 return false;
f592407e
AM
839 sec->used_by_bfd = sdata;
840 }
f0abc2a1
AM
841
842 return _bfd_elf_new_section_hook (abfd, sec);
843}
844
3c3bdf30
NC
845
846/* This function performs the actual bitfiddling and sanity check for a
847 final relocation. Each relocation gets its *worst*-case expansion
848 in size when it arrives here; any reduction in size should have been
849 caught in linker relaxation earlier. When we get here, the relocation
850 looks like the smallest instruction with SWYM:s (nop:s) appended to the
851 max size. We fill in those nop:s.
852
853 R_MMIX_GETA: (FIXME: Relaxation should break this up in 1, 2, 3 tetra)
854 GETA $N,foo
855 ->
856 SETL $N,foo & 0xffff
857 INCML $N,(foo >> 16) & 0xffff
858 INCMH $N,(foo >> 32) & 0xffff
859 INCH $N,(foo >> 48) & 0xffff
860
861 R_MMIX_CBRANCH: (FIXME: Relaxation should break this up, but
862 condbranches needing relaxation might be rare enough to not be
863 worthwhile.)
864 [P]Bcc $N,foo
865 ->
866 [~P]B~cc $N,.+20
867 SETL $255,foo & ...
868 INCML ...
869 INCMH ...
870 INCH ...
871 GO $255,$255,0
872
873 R_MMIX_PUSHJ: (FIXME: Relaxation...)
874 PUSHJ $N,foo
875 ->
876 SETL $255,foo & ...
877 INCML ...
878 INCMH ...
879 INCH ...
880 PUSHGO $N,$255,0
881
882 R_MMIX_JMP: (FIXME: Relaxation...)
883 JMP foo
884 ->
885 SETL $255,foo & ...
886 INCML ...
887 INCMH ...
888 INCH ...
889 GO $255,$255,0
890
891 R_MMIX_ADDR19 and R_MMIX_ADDR27 are just filled in. */
892
893static bfd_reloc_status_type
18978b27
HPN
894mmix_elf_perform_relocation (asection *isec, reloc_howto_type *howto,
895 void *datap, bfd_vma addr, bfd_vma value,
896 char **error_message)
3c3bdf30
NC
897{
898 bfd *abfd = isec->owner;
899 bfd_reloc_status_type flag = bfd_reloc_ok;
900 bfd_reloc_status_type r;
901 int offs = 0;
902 int reg = 255;
903
904 /* The worst case bits are all similar SETL/INCML/INCMH/INCH sequences.
905 We handle the differences here and the common sequence later. */
906 switch (howto->type)
907 {
908 case R_MMIX_GETA:
909 offs = 0;
910 reg = bfd_get_8 (abfd, (bfd_byte *) datap + 1);
911
912 /* We change to an absolute value. */
913 value += addr;
914 break;
915
916 case R_MMIX_CBRANCH:
917 {
918 int in1 = bfd_get_16 (abfd, (bfd_byte *) datap) << 16;
919
920 /* Invert the condition and prediction bit, and set the offset
921 to five instructions ahead.
922
923 We *can* do better if we want to. If the branch is found to be
924 within limits, we could leave the branch as is; there'll just
925 be a bunch of NOP:s after it. But we shouldn't see this
926 sequence often enough that it's worth doing it. */
927
928 bfd_put_32 (abfd,
929 (((in1 ^ ((PRED_INV_BIT | COND_INV_BIT) << 24)) & ~0xffff)
930 | (24/4)),
931 (bfd_byte *) datap);
932
933 /* Put a "GO $255,$255,0" after the common sequence. */
934 bfd_put_32 (abfd,
935 ((GO_INSN_BYTE | IMM_OFFSET_BIT) << 24) | 0xffff00,
936 (bfd_byte *) datap + 20);
937
938 /* Common sequence starts at offset 4. */
939 offs = 4;
940
941 /* We change to an absolute value. */
942 value += addr;
943 }
944 break;
945
f60ebe14
HPN
946 case R_MMIX_PUSHJ_STUBBABLE:
947 /* If the address fits, we're fine. */
948 if ((value & 3) == 0
949 /* Note rightshift 0; see R_MMIX_JMP case below. */
950 && (r = bfd_check_overflow (complain_overflow_signed,
951 howto->bitsize,
952 0,
953 bfd_arch_bits_per_address (abfd),
954 value)) == bfd_reloc_ok)
955 goto pcrel_mmix_reloc_fits;
956 else
957 {
1a23a9e6 958 bfd_size_type size = isec->rawsize ? isec->rawsize : isec->size;
f60ebe14
HPN
959
960 /* We have the bytes at the PUSHJ insn and need to get the
961 position for the stub. There's supposed to be room allocated
962 for the stub. */
963 bfd_byte *stubcontents
f075ee0c 964 = ((bfd_byte *) datap
f60ebe14 965 - (addr - (isec->output_section->vma + isec->output_offset))
eea6121a 966 + size
f60ebe14
HPN
967 + mmix_elf_section_data (isec)->pjs.stub_offset);
968 bfd_vma stubaddr;
969
18978b27
HPN
970 if (mmix_elf_section_data (isec)->pjs.n_pushj_relocs == 0)
971 {
972 /* This shouldn't happen when linking to ELF or mmo, so
973 this is an attempt to link to "binary", right? We
974 can't access the output bfd, so we can't verify that
975 assumption. We only know that the critical
976 mmix_elf_check_common_relocs has not been called,
977 which happens when the output format is different
978 from the input format (and is not mmo). */
979 if (! mmix_elf_section_data (isec)->has_warned_pushj)
980 {
981 /* For the first such error per input section, produce
982 a verbose message. */
983 *error_message
984 = _("invalid input relocation when producing"
38f14ab8
AM
985 " non-ELF, non-mmo format output;"
986 " please use the objcopy program to convert from"
18978b27 987 " ELF or mmo,"
38f14ab8 988 " or assemble using"
18978b27 989 " \"-no-expand\" (for gcc, \"-Wa,-no-expand\"");
0a1b45a2 990 mmix_elf_section_data (isec)->has_warned_pushj = true;
18978b27
HPN
991 return bfd_reloc_dangerous;
992 }
993
994 /* For subsequent errors, return this one, which is
995 rate-limited but looks a little bit different,
996 hopefully without affecting user-friendliness. */
997 return bfd_reloc_overflow;
998 }
999
f60ebe14
HPN
1000 /* The address doesn't fit, so redirect the PUSHJ to the
1001 location of the stub. */
1002 r = mmix_elf_perform_relocation (isec,
1003 &elf_mmix_howto_table
1004 [R_MMIX_ADDR19],
1005 datap,
1006 addr,
1007 isec->output_section->vma
1008 + isec->output_offset
eea6121a 1009 + size
f60ebe14
HPN
1010 + (mmix_elf_section_data (isec)
1011 ->pjs.stub_offset)
18978b27
HPN
1012 - addr,
1013 error_message);
f60ebe14
HPN
1014 if (r != bfd_reloc_ok)
1015 return r;
1016
1017 stubaddr
1018 = (isec->output_section->vma
1019 + isec->output_offset
eea6121a 1020 + size
f60ebe14
HPN
1021 + mmix_elf_section_data (isec)->pjs.stub_offset);
1022
1023 /* We generate a simple JMP if that suffices, else the whole 5
1024 insn stub. */
1025 if (bfd_check_overflow (complain_overflow_signed,
1026 elf_mmix_howto_table[R_MMIX_ADDR27].bitsize,
1027 0,
1028 bfd_arch_bits_per_address (abfd),
1029 addr + value - stubaddr) == bfd_reloc_ok)
1030 {
1031 bfd_put_32 (abfd, JMP_INSN_BYTE << 24, stubcontents);
1032 r = mmix_elf_perform_relocation (isec,
1033 &elf_mmix_howto_table
1034 [R_MMIX_ADDR27],
1035 stubcontents,
1036 stubaddr,
18978b27
HPN
1037 value + addr - stubaddr,
1038 error_message);
f60ebe14
HPN
1039 mmix_elf_section_data (isec)->pjs.stub_offset += 4;
1040
eea6121a
AM
1041 if (size + mmix_elf_section_data (isec)->pjs.stub_offset
1042 > isec->size)
f60ebe14
HPN
1043 abort ();
1044
1045 return r;
1046 }
1047 else
1048 {
1049 /* Put a "GO $255,0" after the common sequence. */
1050 bfd_put_32 (abfd,
1051 ((GO_INSN_BYTE | IMM_OFFSET_BIT) << 24)
1052 | 0xff00, (bfd_byte *) stubcontents + 16);
1053
1054 /* Prepare for the general code to set the first part of the
1055 linker stub, and */
1056 value += addr;
1057 datap = stubcontents;
1058 mmix_elf_section_data (isec)->pjs.stub_offset
1059 += MAX_PUSHJ_STUB_SIZE;
1060 }
1061 }
1062 break;
1063
3c3bdf30
NC
1064 case R_MMIX_PUSHJ:
1065 {
1066 int inreg = bfd_get_8 (abfd, (bfd_byte *) datap + 1);
1067
1068 /* Put a "PUSHGO $N,$255,0" after the common sequence. */
1069 bfd_put_32 (abfd,
1070 ((PUSHGO_INSN_BYTE | IMM_OFFSET_BIT) << 24)
1071 | (inreg << 16)
1072 | 0xff00,
1073 (bfd_byte *) datap + 16);
1074
1075 /* We change to an absolute value. */
1076 value += addr;
1077 }
1078 break;
1079
1080 case R_MMIX_JMP:
1081 /* This one is a little special. If we get here on a non-relaxing
1082 link, and the destination is actually in range, we don't need to
1083 execute the nops.
1084 If so, we fall through to the bit-fiddling relocs.
1085
1086 FIXME: bfd_check_overflow seems broken; the relocation is
1087 rightshifted before testing, so supply a zero rightshift. */
1088
1089 if (! ((value & 3) == 0
1090 && (r = bfd_check_overflow (complain_overflow_signed,
1091 howto->bitsize,
1092 0,
1093 bfd_arch_bits_per_address (abfd),
1094 value)) == bfd_reloc_ok))
1095 {
1096 /* If the relocation doesn't fit in a JMP, we let the NOP:s be
1097 modified below, and put a "GO $255,$255,0" after the
1098 address-loading sequence. */
1099 bfd_put_32 (abfd,
1100 ((GO_INSN_BYTE | IMM_OFFSET_BIT) << 24)
1101 | 0xffff00,
1102 (bfd_byte *) datap + 16);
1103
1104 /* We change to an absolute value. */
1105 value += addr;
1106 break;
1107 }
cedb70c5 1108 /* FALLTHROUGH. */
3c3bdf30
NC
1109 case R_MMIX_ADDR19:
1110 case R_MMIX_ADDR27:
f60ebe14 1111 pcrel_mmix_reloc_fits:
3c3bdf30
NC
1112 /* These must be in range, or else we emit an error. */
1113 if ((value & 3) == 0
1114 /* Note rightshift 0; see above. */
1115 && (r = bfd_check_overflow (complain_overflow_signed,
1116 howto->bitsize,
1117 0,
1118 bfd_arch_bits_per_address (abfd),
1119 value)) == bfd_reloc_ok)
1120 {
1121 bfd_vma in1
1122 = bfd_get_32 (abfd, (bfd_byte *) datap);
1123 bfd_vma highbit;
1124
1125 if ((bfd_signed_vma) value < 0)
1126 {
f60ebe14 1127 highbit = 1 << 24;
3c3bdf30
NC
1128 value += (1 << (howto->bitsize - 1));
1129 }
1130 else
1131 highbit = 0;
1132
1133 value >>= 2;
1134
1135 bfd_put_32 (abfd,
930b4cb2 1136 (in1 & howto->src_mask)
3c3bdf30
NC
1137 | highbit
1138 | (value & howto->dst_mask),
1139 (bfd_byte *) datap);
1140
1141 return bfd_reloc_ok;
1142 }
1143 else
1144 return bfd_reloc_overflow;
1145
930b4cb2
HPN
1146 case R_MMIX_BASE_PLUS_OFFSET:
1147 {
1148 struct bpo_reloc_section_info *bpodata
f0abc2a1 1149 = mmix_elf_section_data (isec)->bpo.reloc;
18978b27
HPN
1150 asection *bpo_greg_section;
1151 struct bpo_greg_section_info *gregdata;
1152 size_t bpo_index;
1153
1154 if (bpodata == NULL)
1155 {
1156 /* This shouldn't happen when linking to ELF or mmo, so
1157 this is an attempt to link to "binary", right? We
1158 can't access the output bfd, so we can't verify that
1159 assumption. We only know that the critical
1160 mmix_elf_check_common_relocs has not been called, which
1161 happens when the output format is different from the
1162 input format (and is not mmo). */
1163 if (! mmix_elf_section_data (isec)->has_warned_bpo)
1164 {
1165 /* For the first such error per input section, produce
1166 a verbose message. */
1167 *error_message
1168 = _("invalid input relocation when producing"
38f14ab8
AM
1169 " non-ELF, non-mmo format output;"
1170 " please use the objcopy program to convert from"
18978b27 1171 " ELF or mmo,"
38f14ab8 1172 " or compile using the gcc-option"
18978b27 1173 " \"-mno-base-addresses\".");
0a1b45a2 1174 mmix_elf_section_data (isec)->has_warned_bpo = true;
18978b27
HPN
1175 return bfd_reloc_dangerous;
1176 }
1177
1178 /* For subsequent errors, return this one, which is
1179 rate-limited but looks a little bit different,
1180 hopefully without affecting user-friendliness. */
1181 return bfd_reloc_overflow;
1182 }
1183
1184 bpo_greg_section = bpodata->bpo_greg_section;
1185 gregdata = mmix_elf_section_data (bpo_greg_section)->bpo.greg;
1186 bpo_index = gregdata->bpo_reloc_indexes[bpodata->bpo_index++];
930b4cb2
HPN
1187
1188 /* A consistency check: The value we now have in "relocation" must
1189 be the same as the value we stored for that relocation. It
1190 doesn't cost much, so can be left in at all times. */
1191 if (value != gregdata->reloc_request[bpo_index].value)
1192 {
4eca0228 1193 _bfd_error_handler
695344c0 1194 /* xgettext:c-format */
871b3ab2 1195 (_("%pB: Internal inconsistency error for value for\n\
2dcf00ce 1196 linker-allocated global register: linked: %#" PRIx64 " != relaxed: %#" PRIx64 ""),
dae82561 1197 isec->owner,
2dcf00ce
AM
1198 (uint64_t) value,
1199 (uint64_t) gregdata->reloc_request[bpo_index].value);
930b4cb2
HPN
1200 bfd_set_error (bfd_error_bad_value);
1201 return bfd_reloc_overflow;
1202 }
1203
1204 /* Then store the register number and offset for that register
1205 into datap and datap + 1 respectively. */
1206 bfd_put_8 (abfd,
1207 gregdata->reloc_request[bpo_index].regindex
1208 + bpo_greg_section->output_section->vma / 8,
1209 datap);
1210 bfd_put_8 (abfd,
1211 gregdata->reloc_request[bpo_index].offset,
1212 ((unsigned char *) datap) + 1);
1213 return bfd_reloc_ok;
1214 }
1215
3c3bdf30
NC
1216 case R_MMIX_REG_OR_BYTE:
1217 case R_MMIX_REG:
1218 if (value > 255)
1219 return bfd_reloc_overflow;
1220 bfd_put_8 (abfd, value, datap);
1221 return bfd_reloc_ok;
1222
1223 default:
1224 BAD_CASE (howto->type);
1225 }
1226
1227 /* This code adds the common SETL/INCML/INCMH/INCH worst-case
1228 sequence. */
1229
1230 /* Lowest two bits must be 0. We return bfd_reloc_overflow for
1231 everything that looks strange. */
1232 if (value & 3)
1233 flag = bfd_reloc_overflow;
1234
1235 bfd_put_32 (abfd,
1236 (SETL_INSN_BYTE << 24) | (value & 0xffff) | (reg << 16),
1237 (bfd_byte *) datap + offs);
1238 bfd_put_32 (abfd,
1239 (INCML_INSN_BYTE << 24) | ((value >> 16) & 0xffff) | (reg << 16),
1240 (bfd_byte *) datap + offs + 4);
1241 bfd_put_32 (abfd,
1242 (INCMH_INSN_BYTE << 24) | ((value >> 32) & 0xffff) | (reg << 16),
1243 (bfd_byte *) datap + offs + 8);
1244 bfd_put_32 (abfd,
1245 (INCH_INSN_BYTE << 24) | ((value >> 48) & 0xffff) | (reg << 16),
1246 (bfd_byte *) datap + offs + 12);
1247
1248 return flag;
1249}
1250
1251/* Set the howto pointer for an MMIX ELF reloc (type RELA). */
1252
0a1b45a2 1253static bool
0aa13fee 1254mmix_info_to_howto_rela (bfd *abfd,
2c3fc389
NC
1255 arelent *cache_ptr,
1256 Elf_Internal_Rela *dst)
3c3bdf30
NC
1257{
1258 unsigned int r_type;
1259
1260 r_type = ELF64_R_TYPE (dst->r_info);
5860e3f8
NC
1261 if (r_type >= (unsigned int) R_MMIX_max)
1262 {
695344c0 1263 /* xgettext:c-format */
0aa13fee
AM
1264 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1265 abfd, r_type);
f3185997 1266 bfd_set_error (bfd_error_bad_value);
0a1b45a2 1267 return false;
5860e3f8 1268 }
3c3bdf30 1269 cache_ptr->howto = &elf_mmix_howto_table[r_type];
0a1b45a2 1270 return true;
3c3bdf30
NC
1271}
1272
1273/* Any MMIX-specific relocation gets here at assembly time or when linking
1274 to other formats (such as mmo); this is the relocation function from
1275 the reloc_table. We don't get here for final pure ELF linking. */
1276
1277static bfd_reloc_status_type
2c3fc389
NC
1278mmix_elf_reloc (bfd *abfd,
1279 arelent *reloc_entry,
1280 asymbol *symbol,
1281 void * data,
1282 asection *input_section,
1283 bfd *output_bfd,
1284 char **error_message)
3c3bdf30
NC
1285{
1286 bfd_vma relocation;
1287 bfd_reloc_status_type r;
1288 asection *reloc_target_output_section;
1289 bfd_reloc_status_type flag = bfd_reloc_ok;
1290 bfd_vma output_base = 0;
3c3bdf30
NC
1291
1292 r = bfd_elf_generic_reloc (abfd, reloc_entry, symbol, data,
1293 input_section, output_bfd, error_message);
1294
1295 /* If that was all that was needed (i.e. this isn't a final link, only
1296 some segment adjustments), we're done. */
1297 if (r != bfd_reloc_continue)
1298 return r;
1299
1300 if (bfd_is_und_section (symbol->section)
1301 && (symbol->flags & BSF_WEAK) == 0
1302 && output_bfd == (bfd *) NULL)
1303 return bfd_reloc_undefined;
1304
1305 /* Is the address of the relocation really within the section? */
07515404 1306 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
3c3bdf30
NC
1307 return bfd_reloc_outofrange;
1308
4cc11e76 1309 /* Work out which section the relocation is targeted at and the
3c3bdf30
NC
1310 initial relocation command value. */
1311
1312 /* Get symbol value. (Common symbols are special.) */
1313 if (bfd_is_com_section (symbol->section))
1314 relocation = 0;
1315 else
1316 relocation = symbol->value;
1317
e6f7f6d1 1318 reloc_target_output_section = bfd_asymbol_section (symbol)->output_section;
3c3bdf30
NC
1319
1320 /* Here the variable relocation holds the final address of the symbol we
1321 are relocating against, plus any addend. */
1322 if (output_bfd)
1323 output_base = 0;
1324 else
1325 output_base = reloc_target_output_section->vma;
1326
1327 relocation += output_base + symbol->section->output_offset;
1328
3c3bdf30
NC
1329 if (output_bfd != (bfd *) NULL)
1330 {
1331 /* Add in supplied addend. */
1332 relocation += reloc_entry->addend;
1333
1334 /* This is a partial relocation, and we want to apply the
1335 relocation to the reloc entry rather than the raw data.
1336 Modify the reloc inplace to reflect what we now know. */
1337 reloc_entry->addend = relocation;
1338 reloc_entry->address += input_section->output_offset;
1339 return flag;
1340 }
1341
1342 return mmix_final_link_relocate (reloc_entry->howto, input_section,
1343 data, reloc_entry->address,
1344 reloc_entry->addend, relocation,
1345 bfd_asymbol_name (symbol),
18978b27
HPN
1346 reloc_target_output_section,
1347 error_message);
3c3bdf30 1348}
e06fcc86 1349\f
3c3bdf30
NC
1350/* Relocate an MMIX ELF section. Modified from elf32-fr30.c; look to it
1351 for guidance if you're thinking of copying this. */
1352
0f684201 1353static int
2c3fc389
NC
1354mmix_elf_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
1355 struct bfd_link_info *info,
1356 bfd *input_bfd,
1357 asection *input_section,
1358 bfd_byte *contents,
1359 Elf_Internal_Rela *relocs,
1360 Elf_Internal_Sym *local_syms,
1361 asection **local_sections)
3c3bdf30
NC
1362{
1363 Elf_Internal_Shdr *symtab_hdr;
1364 struct elf_link_hash_entry **sym_hashes;
1365 Elf_Internal_Rela *rel;
1366 Elf_Internal_Rela *relend;
1a23a9e6 1367 bfd_size_type size;
f60ebe14 1368 size_t pjsno = 0;
3c3bdf30 1369
1a23a9e6 1370 size = input_section->rawsize ? input_section->rawsize : input_section->size;
3c3bdf30
NC
1371 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1372 sym_hashes = elf_sym_hashes (input_bfd);
1373 relend = relocs + input_section->reloc_count;
1374
1a23a9e6
AM
1375 /* Zero the stub area before we start. */
1376 if (input_section->rawsize != 0
1377 && input_section->size > input_section->rawsize)
1378 memset (contents + input_section->rawsize, 0,
1379 input_section->size - input_section->rawsize);
1380
3c3bdf30
NC
1381 for (rel = relocs; rel < relend; rel ++)
1382 {
1383 reloc_howto_type *howto;
1384 unsigned long r_symndx;
1385 Elf_Internal_Sym *sym;
1386 asection *sec;
1387 struct elf_link_hash_entry *h;
1388 bfd_vma relocation;
1389 bfd_reloc_status_type r;
1390 const char *name = NULL;
1391 int r_type;
0a1b45a2 1392 bool undefined_signalled = false;
3c3bdf30
NC
1393
1394 r_type = ELF64_R_TYPE (rel->r_info);
1395
1396 if (r_type == R_MMIX_GNU_VTINHERIT
1397 || r_type == R_MMIX_GNU_VTENTRY)
1398 continue;
1399
1400 r_symndx = ELF64_R_SYM (rel->r_info);
1401
ab96bf03
AM
1402 howto = elf_mmix_howto_table + ELF64_R_TYPE (rel->r_info);
1403 h = NULL;
1404 sym = NULL;
1405 sec = NULL;
1406
1407 if (r_symndx < symtab_hdr->sh_info)
1408 {
1409 sym = local_syms + r_symndx;
1410 sec = local_sections [r_symndx];
1411 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
1412
1413 name = bfd_elf_string_from_elf_section (input_bfd,
1414 symtab_hdr->sh_link,
1415 sym->st_name);
1416 if (name == NULL)
fd361982 1417 name = bfd_section_name (sec);
ab96bf03
AM
1418 }
1419 else
1420 {
0a1b45a2 1421 bool unresolved_reloc, ignored;
ab96bf03
AM
1422
1423 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
1424 r_symndx, symtab_hdr, sym_hashes,
1425 h, sec, relocation,
62d887d4
L
1426 unresolved_reloc, undefined_signalled,
1427 ignored);
ab96bf03
AM
1428 name = h->root.root.string;
1429 }
1430
dbaa2011 1431 if (sec != NULL && discarded_section (sec))
e4067dbb 1432 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 1433 rel, 1, relend, howto, 0, contents);
ab96bf03 1434
0e1862bb 1435 if (bfd_link_relocatable (info))
3c3bdf30 1436 {
f60ebe14
HPN
1437 /* This is a relocatable link. For most relocs we don't have to
1438 change anything, unless the reloc is against a section
1439 symbol, in which case we have to adjust according to where
1440 the section symbol winds up in the output section. */
ab96bf03
AM
1441 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
1442 rel->r_addend += sec->output_offset;
3c3bdf30 1443
f60ebe14
HPN
1444 /* For PUSHJ stub relocs however, we may need to change the
1445 reloc and the section contents, if the reloc doesn't reach
1446 beyond the end of the output section and previous stubs.
1447 Then we change the section contents to be a PUSHJ to the end
1448 of the input section plus stubs (we can do that without using
1449 a reloc), and then we change the reloc to be a R_MMIX_PUSHJ
1450 at the stub location. */
1451 if (r_type == R_MMIX_PUSHJ_STUBBABLE)
1452 {
1453 /* We've already checked whether we need a stub; use that
1454 knowledge. */
1455 if (mmix_elf_section_data (input_section)->pjs.stub_size[pjsno]
1456 != 0)
1457 {
1458 Elf_Internal_Rela relcpy;
1459
1460 if (mmix_elf_section_data (input_section)
1461 ->pjs.stub_size[pjsno] != MAX_PUSHJ_STUB_SIZE)
1462 abort ();
1463
1464 /* There's already a PUSHJ insn there, so just fill in
1465 the offset bits to the stub. */
1466 if (mmix_final_link_relocate (elf_mmix_howto_table
1467 + R_MMIX_ADDR19,
1468 input_section,
1469 contents,
1470 rel->r_offset,
1471 0,
1472 input_section
1473 ->output_section->vma
1474 + input_section->output_offset
eea6121a 1475 + size
f60ebe14
HPN
1476 + mmix_elf_section_data (input_section)
1477 ->pjs.stub_offset,
18978b27 1478 NULL, NULL, NULL) != bfd_reloc_ok)
0a1b45a2 1479 return false;
f60ebe14
HPN
1480
1481 /* Put a JMP insn at the stub; it goes with the
1482 R_MMIX_JMP reloc. */
1483 bfd_put_32 (output_bfd, JMP_INSN_BYTE << 24,
1484 contents
eea6121a 1485 + size
f60ebe14
HPN
1486 + mmix_elf_section_data (input_section)
1487 ->pjs.stub_offset);
1488
1489 /* Change the reloc to be at the stub, and to a full
1490 R_MMIX_JMP reloc. */
1491 rel->r_info = ELF64_R_INFO (r_symndx, R_MMIX_JMP);
1492 rel->r_offset
eea6121a 1493 = (size
f60ebe14
HPN
1494 + mmix_elf_section_data (input_section)
1495 ->pjs.stub_offset);
1496
1497 mmix_elf_section_data (input_section)->pjs.stub_offset
1498 += MAX_PUSHJ_STUB_SIZE;
1499
1500 /* Shift this reloc to the end of the relocs to maintain
1501 the r_offset sorted reloc order. */
1502 relcpy = *rel;
1503 memmove (rel, rel + 1, (char *) relend - (char *) rel);
1504 relend[-1] = relcpy;
1505
1506 /* Back up one reloc, or else we'd skip the next reloc
1507 in turn. */
1508 rel--;
1509 }
1510
1511 pjsno++;
1512 }
3c3bdf30
NC
1513 continue;
1514 }
1515
3c3bdf30
NC
1516 r = mmix_final_link_relocate (howto, input_section,
1517 contents, rel->r_offset,
18978b27 1518 rel->r_addend, relocation, name, sec, NULL);
3c3bdf30
NC
1519
1520 if (r != bfd_reloc_ok)
1521 {
3c3bdf30
NC
1522 const char * msg = (const char *) NULL;
1523
1524 switch (r)
1525 {
1526 case bfd_reloc_overflow:
1a72702b 1527 info->callbacks->reloc_overflow
dfeffb9f
L
1528 (info, (h ? &h->root : NULL), name, howto->name,
1529 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
3c3bdf30
NC
1530 break;
1531
1532 case bfd_reloc_undefined:
1533 /* We may have sent this message above. */
1534 if (! undefined_signalled)
1a72702b 1535 info->callbacks->undefined_symbol
0a1b45a2
AM
1536 (info, name, input_bfd, input_section, rel->r_offset, true);
1537 undefined_signalled = true;
3c3bdf30
NC
1538 break;
1539
1540 case bfd_reloc_outofrange:
1541 msg = _("internal error: out of range error");
1542 break;
1543
1544 case bfd_reloc_notsupported:
1545 msg = _("internal error: unsupported relocation error");
1546 break;
1547
1548 case bfd_reloc_dangerous:
1549 msg = _("internal error: dangerous relocation");
1550 break;
1551
1552 default:
1553 msg = _("internal error: unknown error");
1554 break;
1555 }
1556
1557 if (msg)
1a72702b
AM
1558 (*info->callbacks->warning) (info, msg, name, input_bfd,
1559 input_section, rel->r_offset);
3c3bdf30
NC
1560 }
1561 }
1562
0a1b45a2 1563 return true;
3c3bdf30 1564}
e06fcc86 1565\f
3c3bdf30
NC
1566/* Perform a single relocation. By default we use the standard BFD
1567 routines. A few relocs we have to do ourselves. */
1568
1569static bfd_reloc_status_type
18978b27
HPN
1570mmix_final_link_relocate (reloc_howto_type *howto, asection *input_section,
1571 bfd_byte *contents, bfd_vma r_offset,
1572 bfd_signed_vma r_addend, bfd_vma relocation,
1573 const char *symname, asection *symsec,
1574 char **error_message)
3c3bdf30
NC
1575{
1576 bfd_reloc_status_type r = bfd_reloc_ok;
1577 bfd_vma addr
1578 = (input_section->output_section->vma
1579 + input_section->output_offset
1580 + r_offset);
1581 bfd_signed_vma srel
1582 = (bfd_signed_vma) relocation + r_addend;
1583
1584 switch (howto->type)
1585 {
1586 /* All these are PC-relative. */
f60ebe14 1587 case R_MMIX_PUSHJ_STUBBABLE:
3c3bdf30
NC
1588 case R_MMIX_PUSHJ:
1589 case R_MMIX_CBRANCH:
1590 case R_MMIX_ADDR19:
1591 case R_MMIX_GETA:
1592 case R_MMIX_ADDR27:
1593 case R_MMIX_JMP:
1594 contents += r_offset;
1595
1596 srel -= (input_section->output_section->vma
1597 + input_section->output_offset
1598 + r_offset);
1599
1600 r = mmix_elf_perform_relocation (input_section, howto, contents,
18978b27 1601 addr, srel, error_message);
3c3bdf30
NC
1602 break;
1603
930b4cb2
HPN
1604 case R_MMIX_BASE_PLUS_OFFSET:
1605 if (symsec == NULL)
1606 return bfd_reloc_undefined;
1607
1608 /* Check that we're not relocating against a register symbol. */
fd361982 1609 if (strcmp (bfd_section_name (symsec),
930b4cb2 1610 MMIX_REG_CONTENTS_SECTION_NAME) == 0
fd361982 1611 || strcmp (bfd_section_name (symsec),
930b4cb2
HPN
1612 MMIX_REG_SECTION_NAME) == 0)
1613 {
1614 /* Note: This is separated out into two messages in order
1615 to ease the translation into other languages. */
1616 if (symname == NULL || *symname == 0)
4eca0228 1617 _bfd_error_handler
695344c0 1618 /* xgettext:c-format */
871b3ab2
AM
1619 (_("%pB: base-plus-offset relocation against register symbol:"
1620 " (unknown) in %pA"),
dae82561 1621 input_section->owner, symsec);
930b4cb2 1622 else
4eca0228 1623 _bfd_error_handler
695344c0 1624 /* xgettext:c-format */
871b3ab2
AM
1625 (_("%pB: base-plus-offset relocation against register symbol:"
1626 " %s in %pA"),
dae82561 1627 input_section->owner, symname, symsec);
930b4cb2
HPN
1628 return bfd_reloc_overflow;
1629 }
1630 goto do_mmix_reloc;
1631
3c3bdf30
NC
1632 case R_MMIX_REG_OR_BYTE:
1633 case R_MMIX_REG:
1634 /* For now, we handle these alike. They must refer to an register
1635 symbol, which is either relative to the register section and in
1636 the range 0..255, or is in the register contents section with vma
1637 regno * 8. */
1638
1639 /* FIXME: A better way to check for reg contents section?
1640 FIXME: Postpone section->scaling to mmix_elf_perform_relocation? */
1641 if (symsec == NULL)
1642 return bfd_reloc_undefined;
1643
fd361982 1644 if (strcmp (bfd_section_name (symsec),
3c3bdf30
NC
1645 MMIX_REG_CONTENTS_SECTION_NAME) == 0)
1646 {
1647 if ((srel & 7) != 0 || srel < 32*8 || srel > 255*8)
1648 {
1649 /* The bfd_reloc_outofrange return value, though intuitively
1650 a better value, will not get us an error. */
1651 return bfd_reloc_overflow;
1652 }
1653 srel /= 8;
1654 }
fd361982 1655 else if (strcmp (bfd_section_name (symsec),
3c3bdf30
NC
1656 MMIX_REG_SECTION_NAME) == 0)
1657 {
1658 if (srel < 0 || srel > 255)
1659 /* The bfd_reloc_outofrange return value, though intuitively a
1660 better value, will not get us an error. */
1661 return bfd_reloc_overflow;
1662 }
1663 else
1664 {
930b4cb2 1665 /* Note: This is separated out into two messages in order
ca09e32b
NC
1666 to ease the translation into other languages. */
1667 if (symname == NULL || *symname == 0)
4eca0228 1668 _bfd_error_handler
695344c0 1669 /* xgettext:c-format */
871b3ab2
AM
1670 (_("%pB: register relocation against non-register symbol:"
1671 " (unknown) in %pA"),
dae82561 1672 input_section->owner, symsec);
ca09e32b 1673 else
4eca0228 1674 _bfd_error_handler
695344c0 1675 /* xgettext:c-format */
871b3ab2
AM
1676 (_("%pB: register relocation against non-register symbol:"
1677 " %s in %pA"),
dae82561 1678 input_section->owner, symname, symsec);
3c3bdf30
NC
1679
1680 /* The bfd_reloc_outofrange return value, though intuitively a
1681 better value, will not get us an error. */
1682 return bfd_reloc_overflow;
1683 }
930b4cb2 1684 do_mmix_reloc:
3c3bdf30
NC
1685 contents += r_offset;
1686 r = mmix_elf_perform_relocation (input_section, howto, contents,
18978b27 1687 addr, srel, error_message);
3c3bdf30
NC
1688 break;
1689
1690 case R_MMIX_LOCAL:
1691 /* This isn't a real relocation, it's just an assertion that the
1692 final relocation value corresponds to a local register. We
1693 ignore the actual relocation; nothing is changed. */
1694 {
1695 asection *regsec
1696 = bfd_get_section_by_name (input_section->output_section->owner,
1697 MMIX_REG_CONTENTS_SECTION_NAME);
1698 bfd_vma first_global;
1699
1700 /* Check that this is an absolute value, or a reference to the
1701 register contents section or the register (symbol) section.
1702 Absolute numbers can get here as undefined section. Undefined
1703 symbols are signalled elsewhere, so there's no conflict in us
1704 accidentally handling it. */
1705 if (!bfd_is_abs_section (symsec)
1706 && !bfd_is_und_section (symsec)
fd361982 1707 && strcmp (bfd_section_name (symsec),
3c3bdf30 1708 MMIX_REG_CONTENTS_SECTION_NAME) != 0
fd361982 1709 && strcmp (bfd_section_name (symsec),
3c3bdf30
NC
1710 MMIX_REG_SECTION_NAME) != 0)
1711 {
4eca0228 1712 _bfd_error_handler
871b3ab2 1713 (_("%pB: directive LOCAL valid only with a register or absolute value"),
dae82561 1714 input_section->owner);
3c3bdf30
NC
1715
1716 return bfd_reloc_overflow;
1717 }
1718
1719 /* If we don't have a register contents section, then $255 is the
1720 first global register. */
1721 if (regsec == NULL)
1722 first_global = 255;
1723 else
1724 {
fd361982
AM
1725 first_global = bfd_section_vma (regsec) / 8;
1726 if (strcmp (bfd_section_name (symsec),
3c3bdf30
NC
1727 MMIX_REG_CONTENTS_SECTION_NAME) == 0)
1728 {
1729 if ((srel & 7) != 0 || srel < 32*8 || srel > 255*8)
1730 /* The bfd_reloc_outofrange return value, though
1731 intuitively a better value, will not get us an error. */
1732 return bfd_reloc_overflow;
1733 srel /= 8;
1734 }
1735 }
1736
1737 if ((bfd_vma) srel >= first_global)
1738 {
1739 /* FIXME: Better error message. */
4eca0228 1740 _bfd_error_handler
695344c0 1741 /* xgettext:c-format */
2dcf00ce 1742 (_("%pB: LOCAL directive: "
38f14ab8
AM
1743 "register $%" PRId64 " is not a local register;"
1744 " first global register is $%" PRId64),
2dcf00ce 1745 input_section->owner, (int64_t) srel, (int64_t) first_global);
3c3bdf30
NC
1746
1747 return bfd_reloc_overflow;
1748 }
1749 }
1750 r = bfd_reloc_ok;
1751 break;
1752
1753 default:
1754 r = _bfd_final_link_relocate (howto, input_section->owner, input_section,
1755 contents, r_offset,
1756 relocation, r_addend);
1757 }
1758
1759 return r;
1760}
e06fcc86 1761\f
3c3bdf30
NC
1762/* Return the section that should be marked against GC for a given
1763 relocation. */
1764
1765static asection *
07adf181
AM
1766mmix_elf_gc_mark_hook (asection *sec,
1767 struct bfd_link_info *info,
1768 Elf_Internal_Rela *rel,
1769 struct elf_link_hash_entry *h,
1770 Elf_Internal_Sym *sym)
3c3bdf30
NC
1771{
1772 if (h != NULL)
07adf181
AM
1773 switch (ELF64_R_TYPE (rel->r_info))
1774 {
1775 case R_MMIX_GNU_VTINHERIT:
1776 case R_MMIX_GNU_VTENTRY:
1777 return NULL;
1778 }
3c3bdf30 1779
07adf181 1780 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
3c3bdf30 1781}
e06fcc86 1782\f
3c3bdf30
NC
1783/* Sort register relocs to come before expanding relocs. */
1784
1785static int
2c3fc389 1786mmix_elf_sort_relocs (const void * p1, const void * p2)
3c3bdf30
NC
1787{
1788 const Elf_Internal_Rela *r1 = (const Elf_Internal_Rela *) p1;
1789 const Elf_Internal_Rela *r2 = (const Elf_Internal_Rela *) p2;
1790 int r1_is_reg, r2_is_reg;
1791
1792 /* Sort primarily on r_offset & ~3, so relocs are done to consecutive
1793 insns. */
1794 if ((r1->r_offset & ~(bfd_vma) 3) > (r2->r_offset & ~(bfd_vma) 3))
1795 return 1;
1796 else if ((r1->r_offset & ~(bfd_vma) 3) < (r2->r_offset & ~(bfd_vma) 3))
1797 return -1;
1798
1799 r1_is_reg
1800 = (ELF64_R_TYPE (r1->r_info) == R_MMIX_REG_OR_BYTE
1801 || ELF64_R_TYPE (r1->r_info) == R_MMIX_REG);
1802 r2_is_reg
1803 = (ELF64_R_TYPE (r2->r_info) == R_MMIX_REG_OR_BYTE
1804 || ELF64_R_TYPE (r2->r_info) == R_MMIX_REG);
1805 if (r1_is_reg != r2_is_reg)
1806 return r2_is_reg - r1_is_reg;
1807
1808 /* Neither or both are register relocs. Then sort on full offset. */
1809 if (r1->r_offset > r2->r_offset)
1810 return 1;
1811 else if (r1->r_offset < r2->r_offset)
1812 return -1;
1813 return 0;
1814}
1815
930b4cb2
HPN
1816/* Subset of mmix_elf_check_relocs, common to ELF and mmo linking. */
1817
0a1b45a2 1818static bool
2c3fc389
NC
1819mmix_elf_check_common_relocs (bfd *abfd,
1820 struct bfd_link_info *info,
1821 asection *sec,
1822 const Elf_Internal_Rela *relocs)
930b4cb2
HPN
1823{
1824 bfd *bpo_greg_owner = NULL;
1825 asection *allocated_gregs_section = NULL;
1826 struct bpo_greg_section_info *gregdata = NULL;
1827 struct bpo_reloc_section_info *bpodata = NULL;
1828 const Elf_Internal_Rela *rel;
1829 const Elf_Internal_Rela *rel_end;
1830
930b4cb2
HPN
1831 /* We currently have to abuse this COFF-specific member, since there's
1832 no target-machine-dedicated member. There's no alternative outside
1833 the bfd_link_info struct; we can't specialize a hash-table since
1834 they're different between ELF and mmo. */
1835 bpo_greg_owner = (bfd *) info->base_file;
1836
1837 rel_end = relocs + sec->reloc_count;
1838 for (rel = relocs; rel < rel_end; rel++)
1839 {
1840 switch (ELF64_R_TYPE (rel->r_info))
07d6d2b8 1841 {
930b4cb2
HPN
1842 /* This relocation causes a GREG allocation. We need to count
1843 them, and we need to create a section for them, so we need an
1844 object to fake as the owner of that section. We can't use
1845 the ELF dynobj for this, since the ELF bits assume lots of
1846 DSO-related stuff if that member is non-NULL. */
1847 case R_MMIX_BASE_PLUS_OFFSET:
f60ebe14 1848 /* We don't do anything with this reloc for a relocatable link. */
0e1862bb 1849 if (bfd_link_relocatable (info))
f60ebe14
HPN
1850 break;
1851
930b4cb2
HPN
1852 if (bpo_greg_owner == NULL)
1853 {
1854 bpo_greg_owner = abfd;
2c3fc389 1855 info->base_file = bpo_greg_owner;
930b4cb2
HPN
1856 }
1857
4fa5c2a8
HPN
1858 if (allocated_gregs_section == NULL)
1859 allocated_gregs_section
1860 = bfd_get_section_by_name (bpo_greg_owner,
1861 MMIX_LD_ALLOCATED_REG_CONTENTS_SECTION_NAME);
1862
930b4cb2
HPN
1863 if (allocated_gregs_section == NULL)
1864 {
1865 allocated_gregs_section
3496cb2a
L
1866 = bfd_make_section_with_flags (bpo_greg_owner,
1867 MMIX_LD_ALLOCATED_REG_CONTENTS_SECTION_NAME,
1868 (SEC_HAS_CONTENTS
1869 | SEC_IN_MEMORY
1870 | SEC_LINKER_CREATED));
930b4cb2
HPN
1871 /* Setting both SEC_ALLOC and SEC_LOAD means the section is
1872 treated like any other section, and we'd get errors for
1873 address overlap with the text section. Let's set none of
1874 those flags, as that is what currently happens for usual
1875 GREG allocations, and that works. */
1876 if (allocated_gregs_section == NULL
fd361982 1877 || !bfd_set_section_alignment (allocated_gregs_section, 3))
0a1b45a2 1878 return false;
930b4cb2
HPN
1879
1880 gregdata = (struct bpo_greg_section_info *)
1881 bfd_zalloc (bpo_greg_owner, sizeof (struct bpo_greg_section_info));
1882 if (gregdata == NULL)
0a1b45a2 1883 return false;
f0abc2a1
AM
1884 mmix_elf_section_data (allocated_gregs_section)->bpo.greg
1885 = gregdata;
930b4cb2
HPN
1886 }
1887 else if (gregdata == NULL)
f0abc2a1
AM
1888 gregdata
1889 = mmix_elf_section_data (allocated_gregs_section)->bpo.greg;
930b4cb2
HPN
1890
1891 /* Get ourselves some auxiliary info for the BPO-relocs. */
1892 if (bpodata == NULL)
1893 {
1894 /* No use doing a separate iteration pass to find the upper
1895 limit - just use the number of relocs. */
1896 bpodata = (struct bpo_reloc_section_info *)
1897 bfd_alloc (bpo_greg_owner,
1898 sizeof (struct bpo_reloc_section_info)
1899 * (sec->reloc_count + 1));
1900 if (bpodata == NULL)
0a1b45a2 1901 return false;
f0abc2a1 1902 mmix_elf_section_data (sec)->bpo.reloc = bpodata;
930b4cb2
HPN
1903 bpodata->first_base_plus_offset_reloc
1904 = bpodata->bpo_index
1905 = gregdata->n_max_bpo_relocs;
1906 bpodata->bpo_greg_section
1907 = allocated_gregs_section;
4fa5c2a8 1908 bpodata->n_bpo_relocs_this_section = 0;
930b4cb2
HPN
1909 }
1910
1911 bpodata->n_bpo_relocs_this_section++;
1912 gregdata->n_max_bpo_relocs++;
1913
1914 /* We don't get another chance to set this before GC; we've not
f60ebe14 1915 set up any hook that runs before GC. */
930b4cb2
HPN
1916 gregdata->n_bpo_relocs
1917 = gregdata->n_max_bpo_relocs;
1918 break;
f60ebe14
HPN
1919
1920 case R_MMIX_PUSHJ_STUBBABLE:
1921 mmix_elf_section_data (sec)->pjs.n_pushj_relocs++;
1922 break;
930b4cb2
HPN
1923 }
1924 }
1925
f60ebe14
HPN
1926 /* Allocate per-reloc stub storage and initialize it to the max stub
1927 size. */
1928 if (mmix_elf_section_data (sec)->pjs.n_pushj_relocs != 0)
1929 {
1930 size_t i;
1931
1932 mmix_elf_section_data (sec)->pjs.stub_size
1933 = bfd_alloc (abfd, mmix_elf_section_data (sec)->pjs.n_pushj_relocs
1934 * sizeof (mmix_elf_section_data (sec)
1935 ->pjs.stub_size[0]));
1936 if (mmix_elf_section_data (sec)->pjs.stub_size == NULL)
0a1b45a2 1937 return false;
f60ebe14
HPN
1938
1939 for (i = 0; i < mmix_elf_section_data (sec)->pjs.n_pushj_relocs; i++)
1940 mmix_elf_section_data (sec)->pjs.stub_size[i] = MAX_PUSHJ_STUB_SIZE;
1941 }
1942
0a1b45a2 1943 return true;
930b4cb2
HPN
1944}
1945
3c3bdf30
NC
1946/* Look through the relocs for a section during the first phase. */
1947
0a1b45a2 1948static bool
2c3fc389
NC
1949mmix_elf_check_relocs (bfd *abfd,
1950 struct bfd_link_info *info,
1951 asection *sec,
1952 const Elf_Internal_Rela *relocs)
3c3bdf30
NC
1953{
1954 Elf_Internal_Shdr *symtab_hdr;
5582a088 1955 struct elf_link_hash_entry **sym_hashes;
3c3bdf30
NC
1956 const Elf_Internal_Rela *rel;
1957 const Elf_Internal_Rela *rel_end;
1958
3c3bdf30
NC
1959 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1960 sym_hashes = elf_sym_hashes (abfd);
3c3bdf30
NC
1961
1962 /* First we sort the relocs so that any register relocs come before
1963 expansion-relocs to the same insn. FIXME: Not done for mmo. */
2c3fc389 1964 qsort ((void *) relocs, sec->reloc_count, sizeof (Elf_Internal_Rela),
3c3bdf30
NC
1965 mmix_elf_sort_relocs);
1966
930b4cb2
HPN
1967 /* Do the common part. */
1968 if (!mmix_elf_check_common_relocs (abfd, info, sec, relocs))
0a1b45a2 1969 return false;
930b4cb2 1970
0e1862bb 1971 if (bfd_link_relocatable (info))
0a1b45a2 1972 return true;
f60ebe14 1973
3c3bdf30
NC
1974 rel_end = relocs + sec->reloc_count;
1975 for (rel = relocs; rel < rel_end; rel++)
1976 {
1977 struct elf_link_hash_entry *h;
1978 unsigned long r_symndx;
1979
1980 r_symndx = ELF64_R_SYM (rel->r_info);
1981 if (r_symndx < symtab_hdr->sh_info)
07d6d2b8 1982 h = NULL;
3c3bdf30 1983 else
973a3492
L
1984 {
1985 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1986 while (h->root.type == bfd_link_hash_indirect
1987 || h->root.type == bfd_link_hash_warning)
1988 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1989 }
3c3bdf30
NC
1990
1991 switch (ELF64_R_TYPE (rel->r_info))
930b4cb2 1992 {
07d6d2b8
AM
1993 /* This relocation describes the C++ object vtable hierarchy.
1994 Reconstruct it for later use during GC. */
1995 case R_MMIX_GNU_VTINHERIT:
1996 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
0a1b45a2 1997 return false;
07d6d2b8
AM
1998 break;
1999
2000 /* This relocation describes which C++ vtable entries are actually
2001 used. Record for later use during GC. */
2002 case R_MMIX_GNU_VTENTRY:
a0ea3a14 2003 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
0a1b45a2 2004 return false;
07d6d2b8 2005 break;
930b4cb2
HPN
2006 }
2007 }
2008
0a1b45a2 2009 return true;
930b4cb2
HPN
2010}
2011
2012/* Wrapper for mmix_elf_check_common_relocs, called when linking to mmo.
2013 Copied from elf_link_add_object_symbols. */
2014
0a1b45a2 2015bool
2c3fc389 2016_bfd_mmix_check_all_relocs (bfd *abfd, struct bfd_link_info *info)
930b4cb2
HPN
2017{
2018 asection *o;
2019
2020 for (o = abfd->sections; o != NULL; o = o->next)
2021 {
2022 Elf_Internal_Rela *internal_relocs;
0a1b45a2 2023 bool ok;
930b4cb2
HPN
2024
2025 if ((o->flags & SEC_RELOC) == 0
2026 || o->reloc_count == 0
2027 || ((info->strip == strip_all || info->strip == strip_debugger)
2028 && (o->flags & SEC_DEBUGGING) != 0)
2029 || bfd_is_abs_section (o->output_section))
2030 continue;
2031
2032 internal_relocs
2c3fc389 2033 = _bfd_elf_link_read_relocs (abfd, o, NULL,
45d6a902
AM
2034 (Elf_Internal_Rela *) NULL,
2035 info->keep_memory);
930b4cb2 2036 if (internal_relocs == NULL)
0a1b45a2 2037 return false;
930b4cb2
HPN
2038
2039 ok = mmix_elf_check_common_relocs (abfd, info, o, internal_relocs);
2040
2041 if (! info->keep_memory)
2042 free (internal_relocs);
2043
2044 if (! ok)
0a1b45a2 2045 return false;
3c3bdf30
NC
2046 }
2047
0a1b45a2 2048 return true;
3c3bdf30 2049}
e06fcc86 2050\f
3c3bdf30
NC
2051/* Change symbols relative to the reg contents section to instead be to
2052 the register section, and scale them down to correspond to the register
2053 number. */
2054
6e0b88f1 2055static int
2c3fc389
NC
2056mmix_elf_link_output_symbol_hook (struct bfd_link_info *info ATTRIBUTE_UNUSED,
2057 const char *name ATTRIBUTE_UNUSED,
2058 Elf_Internal_Sym *sym,
2059 asection *input_sec,
2060 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
3c3bdf30
NC
2061{
2062 if (input_sec != NULL
2063 && input_sec->name != NULL
2064 && ELF_ST_TYPE (sym->st_info) != STT_SECTION
2065 && strcmp (input_sec->name, MMIX_REG_CONTENTS_SECTION_NAME) == 0)
2066 {
2067 sym->st_value /= 8;
2068 sym->st_shndx = SHN_REGISTER;
2069 }
2070
6e0b88f1 2071 return 1;
3c3bdf30
NC
2072}
2073
2074/* We fake a register section that holds values that are register numbers.
2075 Having a SHN_REGISTER and register section translates better to other
2076 formats (e.g. mmo) than for example a STT_REGISTER attribute.
2077 This section faking is based on a construct in elf32-mips.c. */
2078static asection mmix_elf_reg_section;
7f3a18cf
AM
2079static const asymbol mmix_elf_reg_section_symbol =
2080 GLOBAL_SYM_INIT (MMIX_REG_SECTION_NAME, &mmix_elf_reg_section);
2081static asection mmix_elf_reg_section =
2082 BFD_FAKE_SECTION (mmix_elf_reg_section, &mmix_elf_reg_section_symbol,
2083 MMIX_REG_SECTION_NAME, 0, SEC_NO_FLAGS);
3c3bdf30 2084
f60ebe14 2085/* Handle the special section numbers that a symbol may use. */
3c3bdf30
NC
2086
2087void
e6c7cdec 2088mmix_elf_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED, asymbol *asym)
3c3bdf30
NC
2089{
2090 elf_symbol_type *elfsym;
2091
2092 elfsym = (elf_symbol_type *) asym;
2093 switch (elfsym->internal_elf_sym.st_shndx)
2094 {
2095 case SHN_REGISTER:
3c3bdf30
NC
2096 asym->section = &mmix_elf_reg_section;
2097 break;
2098
2099 default:
2100 break;
2101 }
2102}
2103
2104/* Given a BFD section, try to locate the corresponding ELF section
2105 index. */
2106
0a1b45a2 2107static bool
2c3fc389
NC
2108mmix_elf_section_from_bfd_section (bfd * abfd ATTRIBUTE_UNUSED,
2109 asection * sec,
2110 int * retval)
3c3bdf30 2111{
fd361982 2112 if (strcmp (bfd_section_name (sec), MMIX_REG_SECTION_NAME) == 0)
3c3bdf30
NC
2113 *retval = SHN_REGISTER;
2114 else
0a1b45a2 2115 return false;
3c3bdf30 2116
0a1b45a2 2117 return true;
3c3bdf30
NC
2118}
2119
2120/* Hook called by the linker routine which adds symbols from an object
2121 file. We must handle the special SHN_REGISTER section number here.
2122
2123 We also check that we only have *one* each of the section-start
2124 symbols, since otherwise having two with the same value would cause
2125 them to be "merged", but with the contents serialized. */
2126
0a1b45a2 2127static bool
2c3fc389
NC
2128mmix_elf_add_symbol_hook (bfd *abfd,
2129 struct bfd_link_info *info ATTRIBUTE_UNUSED,
2130 Elf_Internal_Sym *sym,
2131 const char **namep ATTRIBUTE_UNUSED,
2132 flagword *flagsp ATTRIBUTE_UNUSED,
2133 asection **secp,
2134 bfd_vma *valp ATTRIBUTE_UNUSED)
3c3bdf30
NC
2135{
2136 if (sym->st_shndx == SHN_REGISTER)
46fda84e
AM
2137 {
2138 *secp = bfd_make_section_old_way (abfd, MMIX_REG_SECTION_NAME);
2139 (*secp)->flags |= SEC_LINKER_CREATED;
2140 }
3c3bdf30 2141 else if ((*namep)[0] == '_' && (*namep)[1] == '_' && (*namep)[2] == '.'
08dedd66 2142 && startswith (*namep, MMIX_LOC_SECTION_START_SYMBOL_PREFIX))
3c3bdf30
NC
2143 {
2144 /* See if we have another one. */
4ab82700
AM
2145 struct bfd_link_hash_entry *h = bfd_link_hash_lookup (info->hash,
2146 *namep,
0a1b45a2
AM
2147 false,
2148 false,
2149 false);
3c3bdf30 2150
4ab82700 2151 if (h != NULL && h->type != bfd_link_hash_undefined)
3c3bdf30
NC
2152 {
2153 /* How do we get the asymbol (or really: the filename) from h?
4ab82700 2154 h->u.def.section->owner is NULL. */
4eca0228 2155 _bfd_error_handler
695344c0 2156 /* xgettext:c-format */
38f14ab8
AM
2157 (_("%pB: error: multiple definition of `%s'; start of %s "
2158 "is set in a earlier linked file"),
dae82561 2159 abfd, *namep,
4eca0228 2160 *namep + strlen (MMIX_LOC_SECTION_START_SYMBOL_PREFIX));
3c3bdf30 2161 bfd_set_error (bfd_error_bad_value);
0a1b45a2 2162 return false;
3c3bdf30
NC
2163 }
2164 }
2165
0a1b45a2 2166 return true;
3c3bdf30
NC
2167}
2168
2169/* We consider symbols matching "L.*:[0-9]+" to be local symbols. */
2170
0a1b45a2 2171static bool
2c3fc389 2172mmix_elf_is_local_label_name (bfd *abfd, const char *name)
3c3bdf30
NC
2173{
2174 const char *colpos;
2175 int digits;
2176
2177 /* Also include the default local-label definition. */
2178 if (_bfd_elf_is_local_label_name (abfd, name))
0a1b45a2 2179 return true;
3c3bdf30
NC
2180
2181 if (*name != 'L')
0a1b45a2 2182 return false;
3c3bdf30
NC
2183
2184 /* If there's no ":", or more than one, it's not a local symbol. */
2185 colpos = strchr (name, ':');
2186 if (colpos == NULL || strchr (colpos + 1, ':') != NULL)
0a1b45a2 2187 return false;
3c3bdf30
NC
2188
2189 /* Check that there are remaining characters and that they are digits. */
2190 if (colpos[1] == 0)
0a1b45a2 2191 return false;
3c3bdf30
NC
2192
2193 digits = strspn (colpos + 1, "0123456789");
2194 return digits != 0 && colpos[1 + digits] == 0;
2195}
2196
2197/* We get rid of the register section here. */
2198
0a1b45a2 2199bool
2c3fc389 2200mmix_elf_final_link (bfd *abfd, struct bfd_link_info *info)
3c3bdf30
NC
2201{
2202 /* We never output a register section, though we create one for
2203 temporary measures. Check that nobody entered contents into it. */
2204 asection *reg_section;
3c3bdf30
NC
2205
2206 reg_section = bfd_get_section_by_name (abfd, MMIX_REG_SECTION_NAME);
2207
2208 if (reg_section != NULL)
2209 {
2210 /* FIXME: Pass error state gracefully. */
fd361982 2211 if (bfd_section_flags (reg_section) & SEC_HAS_CONTENTS)
38f14ab8 2212 _bfd_abort (__FILE__, __LINE__, _("register section has contents\n"));
3c3bdf30 2213
46fda84e
AM
2214 /* Really remove the section, if it hasn't already been done. */
2215 if (!bfd_section_removed_from_list (abfd, reg_section))
2216 {
2217 bfd_section_list_remove (abfd, reg_section);
2218 --abfd->section_count;
2219 }
3c3bdf30
NC
2220 }
2221
c152c796 2222 if (! bfd_elf_final_link (abfd, info))
0a1b45a2 2223 return false;
3c3bdf30 2224
930b4cb2
HPN
2225 /* Since this section is marked SEC_LINKER_CREATED, it isn't output by
2226 the regular linker machinery. We do it here, like other targets with
2227 special sections. */
2228 if (info->base_file != NULL)
2229 {
2230 asection *greg_section
2231 = bfd_get_section_by_name ((bfd *) info->base_file,
2232 MMIX_LD_ALLOCATED_REG_CONTENTS_SECTION_NAME);
2233 if (!bfd_set_section_contents (abfd,
2234 greg_section->output_section,
2235 greg_section->contents,
2236 (file_ptr) greg_section->output_offset,
eea6121a 2237 greg_section->size))
0a1b45a2 2238 return false;
930b4cb2 2239 }
0a1b45a2 2240 return true;
930b4cb2
HPN
2241}
2242
f60ebe14 2243/* We need to include the maximum size of PUSHJ-stubs in the initial
eea6121a 2244 section size. This is expected to shrink during linker relaxation. */
f60ebe14
HPN
2245
2246static void
2c3fc389
NC
2247mmix_set_relaxable_size (bfd *abfd ATTRIBUTE_UNUSED,
2248 asection *sec,
2249 void *ptr)
f60ebe14
HPN
2250{
2251 struct bfd_link_info *info = ptr;
2252
2253 /* Make sure we only do this for section where we know we want this,
2254 otherwise we might end up resetting the size of COMMONs. */
2255 if (mmix_elf_section_data (sec)->pjs.n_pushj_relocs == 0)
2256 return;
2257
1a23a9e6 2258 sec->rawsize = sec->size;
eea6121a
AM
2259 sec->size += (mmix_elf_section_data (sec)->pjs.n_pushj_relocs
2260 * MAX_PUSHJ_STUB_SIZE);
f60ebe14
HPN
2261
2262 /* For use in relocatable link, we start with a max stubs size. See
2263 mmix_elf_relax_section. */
0e1862bb 2264 if (bfd_link_relocatable (info) && sec->output_section)
f60ebe14
HPN
2265 mmix_elf_section_data (sec->output_section)->pjs.stubs_size_sum
2266 += (mmix_elf_section_data (sec)->pjs.n_pushj_relocs
2267 * MAX_PUSHJ_STUB_SIZE);
2268}
2269
930b4cb2
HPN
2270/* Initialize stuff for the linker-generated GREGs to match
2271 R_MMIX_BASE_PLUS_OFFSET relocs seen by the linker. */
2272
0a1b45a2 2273bool
2c3fc389
NC
2274_bfd_mmix_before_linker_allocation (bfd *abfd ATTRIBUTE_UNUSED,
2275 struct bfd_link_info *info)
930b4cb2
HPN
2276{
2277 asection *bpo_gregs_section;
2278 bfd *bpo_greg_owner;
2279 struct bpo_greg_section_info *gregdata;
2280 size_t n_gregs;
2281 bfd_vma gregs_size;
2282 size_t i;
2283 size_t *bpo_reloc_indexes;
f60ebe14
HPN
2284 bfd *ibfd;
2285
2286 /* Set the initial size of sections. */
c72f2fb2 2287 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
f60ebe14 2288 bfd_map_over_sections (ibfd, mmix_set_relaxable_size, info);
930b4cb2
HPN
2289
2290 /* The bpo_greg_owner bfd is supposed to have been set by
2291 mmix_elf_check_relocs when the first R_MMIX_BASE_PLUS_OFFSET is seen.
2292 If there is no such object, there was no R_MMIX_BASE_PLUS_OFFSET. */
2293 bpo_greg_owner = (bfd *) info->base_file;
2294 if (bpo_greg_owner == NULL)
0a1b45a2 2295 return true;
930b4cb2
HPN
2296
2297 bpo_gregs_section
2298 = bfd_get_section_by_name (bpo_greg_owner,
2299 MMIX_LD_ALLOCATED_REG_CONTENTS_SECTION_NAME);
2300
930b4cb2 2301 if (bpo_gregs_section == NULL)
0a1b45a2 2302 return true;
930b4cb2
HPN
2303
2304 /* We use the target-data handle in the ELF section data. */
f0abc2a1 2305 gregdata = mmix_elf_section_data (bpo_gregs_section)->bpo.greg;
930b4cb2 2306 if (gregdata == NULL)
0a1b45a2 2307 return false;
930b4cb2
HPN
2308
2309 n_gregs = gregdata->n_bpo_relocs;
2310 gregdata->n_allocated_bpo_gregs = n_gregs;
2311
2312 /* When this reaches zero during relaxation, all entries have been
2313 filled in and the size of the linker gregs can be calculated. */
2314 gregdata->n_remaining_bpo_relocs_this_relaxation_round = n_gregs;
2315
2316 /* Set the zeroth-order estimate for the GREGs size. */
2317 gregs_size = n_gregs * 8;
2318
fd361982 2319 if (!bfd_set_section_size (bpo_gregs_section, gregs_size))
0a1b45a2 2320 return false;
930b4cb2
HPN
2321
2322 /* Allocate and set up the GREG arrays. They're filled in at relaxation
2323 time. Note that we must use the max number ever noted for the array,
2324 since the index numbers were created before GC. */
2325 gregdata->reloc_request
2326 = bfd_zalloc (bpo_greg_owner,
2327 sizeof (struct bpo_reloc_request)
2328 * gregdata->n_max_bpo_relocs);
2329
2330 gregdata->bpo_reloc_indexes
2331 = bpo_reloc_indexes
2332 = bfd_alloc (bpo_greg_owner,
2333 gregdata->n_max_bpo_relocs
2334 * sizeof (size_t));
2335 if (bpo_reloc_indexes == NULL)
0a1b45a2 2336 return false;
930b4cb2
HPN
2337
2338 /* The default order is an identity mapping. */
2339 for (i = 0; i < gregdata->n_max_bpo_relocs; i++)
2340 {
2341 bpo_reloc_indexes[i] = i;
2342 gregdata->reloc_request[i].bpo_reloc_no = i;
2343 }
2344
0a1b45a2 2345 return true;
3c3bdf30 2346}
e06fcc86 2347\f
930b4cb2
HPN
2348/* Fill in contents in the linker allocated gregs. Everything is
2349 calculated at this point; we just move the contents into place here. */
2350
0a1b45a2 2351bool
2c3fc389
NC
2352_bfd_mmix_after_linker_allocation (bfd *abfd ATTRIBUTE_UNUSED,
2353 struct bfd_link_info *link_info)
930b4cb2
HPN
2354{
2355 asection *bpo_gregs_section;
2356 bfd *bpo_greg_owner;
2357 struct bpo_greg_section_info *gregdata;
2358 size_t n_gregs;
2359 size_t i, j;
2360 size_t lastreg;
2361 bfd_byte *contents;
2362
2363 /* The bpo_greg_owner bfd is supposed to have been set by mmix_elf_check_relocs
2364 when the first R_MMIX_BASE_PLUS_OFFSET is seen. If there is no such
2365 object, there was no R_MMIX_BASE_PLUS_OFFSET. */
2366 bpo_greg_owner = (bfd *) link_info->base_file;
2367 if (bpo_greg_owner == NULL)
0a1b45a2 2368 return true;
930b4cb2
HPN
2369
2370 bpo_gregs_section
2371 = bfd_get_section_by_name (bpo_greg_owner,
2372 MMIX_LD_ALLOCATED_REG_CONTENTS_SECTION_NAME);
2373
2374 /* This can't happen without DSO handling. When DSOs are handled
2375 without any R_MMIX_BASE_PLUS_OFFSET seen, there will be no such
2376 section. */
2377 if (bpo_gregs_section == NULL)
0a1b45a2 2378 return true;
930b4cb2
HPN
2379
2380 /* We use the target-data handle in the ELF section data. */
2381
f0abc2a1 2382 gregdata = mmix_elf_section_data (bpo_gregs_section)->bpo.greg;
930b4cb2 2383 if (gregdata == NULL)
0a1b45a2 2384 return false;
930b4cb2
HPN
2385
2386 n_gregs = gregdata->n_allocated_bpo_gregs;
2387
2388 bpo_gregs_section->contents
eea6121a 2389 = contents = bfd_alloc (bpo_greg_owner, bpo_gregs_section->size);
930b4cb2 2390 if (contents == NULL)
0a1b45a2 2391 return false;
930b4cb2 2392
7e799044
HPN
2393 /* Sanity check: If these numbers mismatch, some relocation has not been
2394 accounted for and the rest of gregdata is probably inconsistent.
2395 It's a bug, but it's more helpful to identify it than segfaulting
2396 below. */
2397 if (gregdata->n_remaining_bpo_relocs_this_relaxation_round
2398 != gregdata->n_bpo_relocs)
2399 {
4eca0228 2400 _bfd_error_handler
695344c0 2401 /* xgettext:c-format */
38f14ab8
AM
2402 (_("internal inconsistency: remaining %lu != max %lu;"
2403 " please report this bug"),
d42c267e
AM
2404 (unsigned long) gregdata->n_remaining_bpo_relocs_this_relaxation_round,
2405 (unsigned long) gregdata->n_bpo_relocs);
0a1b45a2 2406 return false;
7e799044
HPN
2407 }
2408
930b4cb2
HPN
2409 for (lastreg = 255, i = 0, j = 0; j < n_gregs; i++)
2410 if (gregdata->reloc_request[i].regindex != lastreg)
2411 {
2412 bfd_put_64 (bpo_greg_owner, gregdata->reloc_request[i].value,
2413 contents + j * 8);
2414 lastreg = gregdata->reloc_request[i].regindex;
2415 j++;
2416 }
2417
0a1b45a2 2418 return true;
930b4cb2
HPN
2419}
2420
2421/* Sort valid relocs to come before non-valid relocs, then on increasing
2422 value. */
2423
2424static int
2c3fc389 2425bpo_reloc_request_sort_fn (const void * p1, const void * p2)
930b4cb2
HPN
2426{
2427 const struct bpo_reloc_request *r1 = (const struct bpo_reloc_request *) p1;
2428 const struct bpo_reloc_request *r2 = (const struct bpo_reloc_request *) p2;
2429
2430 /* Primary function is validity; non-valid relocs sorted after valid
2431 ones. */
2432 if (r1->valid != r2->valid)
2433 return r2->valid - r1->valid;
2434
4fa5c2a8
HPN
2435 /* Then sort on value. Don't simplify and return just the difference of
2436 the values: the upper bits of the 64-bit value would be truncated on
2437 a host with 32-bit ints. */
930b4cb2 2438 if (r1->value != r2->value)
4fa5c2a8 2439 return r1->value > r2->value ? 1 : -1;
930b4cb2 2440
dfbbae4c
HPN
2441 /* As a last re-sort, use the relocation number, so we get a stable
2442 sort. The *addresses* aren't stable since items are swapped during
2443 sorting. It depends on the qsort implementation if this actually
2444 happens. */
2445 return r1->bpo_reloc_no > r2->bpo_reloc_no
2446 ? 1 : (r1->bpo_reloc_no < r2->bpo_reloc_no ? -1 : 0);
930b4cb2
HPN
2447}
2448
4fa5c2a8
HPN
2449/* For debug use only. Dumps the global register allocations resulting
2450 from base-plus-offset relocs. */
2451
2452void
e6c7cdec 2453mmix_dump_bpo_gregs (struct bfd_link_info *link_info,
52d45da3 2454 void (*pf) (const char *fmt, ...))
4fa5c2a8
HPN
2455{
2456 bfd *bpo_greg_owner;
2457 asection *bpo_gregs_section;
2458 struct bpo_greg_section_info *gregdata;
2459 unsigned int i;
2460
2461 if (link_info == NULL || link_info->base_file == NULL)
2462 return;
2463
2464 bpo_greg_owner = (bfd *) link_info->base_file;
2465
2466 bpo_gregs_section
2467 = bfd_get_section_by_name (bpo_greg_owner,
2468 MMIX_LD_ALLOCATED_REG_CONTENTS_SECTION_NAME);
2469
2470 if (bpo_gregs_section == NULL)
2471 return;
2472
f0abc2a1 2473 gregdata = mmix_elf_section_data (bpo_gregs_section)->bpo.greg;
4fa5c2a8
HPN
2474 if (gregdata == NULL)
2475 return;
2476
2477 if (pf == NULL)
2478 pf = _bfd_error_handler;
2479
2480 /* These format strings are not translated. They are for debug purposes
2481 only and never displayed to an end user. Should they escape, we
2482 surely want them in original. */
2483 (*pf) (" n_bpo_relocs: %u\n n_max_bpo_relocs: %u\n n_remain...round: %u\n\
2484 n_allocated_bpo_gregs: %u\n", gregdata->n_bpo_relocs,
2485 gregdata->n_max_bpo_relocs,
2486 gregdata->n_remaining_bpo_relocs_this_relaxation_round,
2487 gregdata->n_allocated_bpo_gregs);
2488
2489 if (gregdata->reloc_request)
2490 for (i = 0; i < gregdata->n_max_bpo_relocs; i++)
2491 (*pf) ("%4u (%4u)/%4u#%u: 0x%08lx%08lx r: %3u o: %3u\n",
2492 i,
cf3d882d
AM
2493 (gregdata->bpo_reloc_indexes != NULL
2494 ? gregdata->bpo_reloc_indexes[i] : (size_t) -1),
4fa5c2a8
HPN
2495 gregdata->reloc_request[i].bpo_reloc_no,
2496 gregdata->reloc_request[i].valid,
2497
2498 (unsigned long) (gregdata->reloc_request[i].value >> 32),
2499 (unsigned long) gregdata->reloc_request[i].value,
2500 gregdata->reloc_request[i].regindex,
2501 gregdata->reloc_request[i].offset);
2502}
2503
930b4cb2
HPN
2504/* This links all R_MMIX_BASE_PLUS_OFFSET relocs into a special array, and
2505 when the last such reloc is done, an index-array is sorted according to
2506 the values and iterated over to produce register numbers (indexed by 0
2507 from the first allocated register number) and offsets for use in real
80f540b7 2508 relocation. (N.B.: Relocatable runs are handled, not just punted.)
930b4cb2 2509
f60ebe14
HPN
2510 PUSHJ stub accounting is also done here.
2511
930b4cb2
HPN
2512 Symbol- and reloc-reading infrastructure copied from elf-m10200.c. */
2513
0a1b45a2 2514static bool
2c3fc389
NC
2515mmix_elf_relax_section (bfd *abfd,
2516 asection *sec,
2517 struct bfd_link_info *link_info,
0a1b45a2 2518 bool *again)
930b4cb2 2519{
930b4cb2 2520 Elf_Internal_Shdr *symtab_hdr;
930b4cb2 2521 Elf_Internal_Rela *internal_relocs;
930b4cb2
HPN
2522 Elf_Internal_Rela *irel, *irelend;
2523 asection *bpo_gregs_section = NULL;
2524 struct bpo_greg_section_info *gregdata;
2525 struct bpo_reloc_section_info *bpodata
f0abc2a1 2526 = mmix_elf_section_data (sec)->bpo.reloc;
f60ebe14
HPN
2527 /* The initialization is to quiet compiler warnings. The value is to
2528 spot a missing actual initialization. */
2529 size_t bpono = (size_t) -1;
2530 size_t pjsno = 0;
a8a48c75 2531 size_t pjsno_undefs = 0;
6cdc0ccc 2532 Elf_Internal_Sym *isymbuf = NULL;
1a23a9e6 2533 bfd_size_type size = sec->rawsize ? sec->rawsize : sec->size;
f60ebe14
HPN
2534
2535 mmix_elf_section_data (sec)->pjs.stubs_size_sum = 0;
930b4cb2
HPN
2536
2537 /* Assume nothing changes. */
0a1b45a2 2538 *again = false;
930b4cb2 2539
f60ebe14
HPN
2540 /* We don't have to do anything if this section does not have relocs, or
2541 if this is not a code section. */
2542 if ((sec->flags & SEC_RELOC) == 0
930b4cb2
HPN
2543 || sec->reloc_count == 0
2544 || (sec->flags & SEC_CODE) == 0
2545 || (sec->flags & SEC_LINKER_CREATED) != 0
f60ebe14 2546 /* If no R_MMIX_BASE_PLUS_OFFSET relocs and no PUSHJ-stub relocs,
07d6d2b8 2547 then nothing to do. */
f60ebe14
HPN
2548 || (bpodata == NULL
2549 && mmix_elf_section_data (sec)->pjs.n_pushj_relocs == 0))
0a1b45a2 2550 return true;
930b4cb2
HPN
2551
2552 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
930b4cb2 2553
f60ebe14
HPN
2554 if (bpodata != NULL)
2555 {
2556 bpo_gregs_section = bpodata->bpo_greg_section;
2557 gregdata = mmix_elf_section_data (bpo_gregs_section)->bpo.greg;
2558 bpono = bpodata->first_base_plus_offset_reloc;
2559 }
2560 else
2561 gregdata = NULL;
930b4cb2
HPN
2562
2563 /* Get a copy of the native relocations. */
2564 internal_relocs
2c3fc389 2565 = _bfd_elf_link_read_relocs (abfd, sec, NULL,
45d6a902
AM
2566 (Elf_Internal_Rela *) NULL,
2567 link_info->keep_memory);
930b4cb2
HPN
2568 if (internal_relocs == NULL)
2569 goto error_return;
930b4cb2
HPN
2570
2571 /* Walk through them looking for relaxing opportunities. */
2572 irelend = internal_relocs + sec->reloc_count;
2573 for (irel = internal_relocs; irel < irelend; irel++)
2574 {
2575 bfd_vma symval;
f60ebe14 2576 struct elf_link_hash_entry *h = NULL;
930b4cb2 2577
f60ebe14
HPN
2578 /* We only process two relocs. */
2579 if (ELF64_R_TYPE (irel->r_info) != (int) R_MMIX_BASE_PLUS_OFFSET
2580 && ELF64_R_TYPE (irel->r_info) != (int) R_MMIX_PUSHJ_STUBBABLE)
930b4cb2
HPN
2581 continue;
2582
f60ebe14
HPN
2583 /* We process relocs in a distinctly different way when this is a
2584 relocatable link (for one, we don't look at symbols), so we avoid
2585 mixing its code with that for the "normal" relaxation. */
0e1862bb 2586 if (bfd_link_relocatable (link_info))
f60ebe14
HPN
2587 {
2588 /* The only transformation in a relocatable link is to generate
2589 a full stub at the location of the stub calculated for the
2590 input section, if the relocated stub location, the end of the
2591 output section plus earlier stubs, cannot be reached. Thus
2592 relocatable linking can only lead to worse code, but it still
2593 works. */
2594 if (ELF64_R_TYPE (irel->r_info) == R_MMIX_PUSHJ_STUBBABLE)
2595 {
2596 /* If we can reach the end of the output-section and beyond
2597 any current stubs, then we don't need a stub for this
2598 reloc. The relaxed order of output stub allocation may
2599 not exactly match the straightforward order, so we always
2600 assume presence of output stubs, which will allow
2601 relaxation only on relocations indifferent to the
2602 presence of output stub allocations for other relocations
2603 and thus the order of output stub allocation. */
2604 if (bfd_check_overflow (complain_overflow_signed,
2605 19,
2606 0,
2607 bfd_arch_bits_per_address (abfd),
2608 /* Output-stub location. */
1a23a9e6 2609 sec->output_section->rawsize
f60ebe14
HPN
2610 + (mmix_elf_section_data (sec
2611 ->output_section)
2612 ->pjs.stubs_size_sum)
2613 /* Location of this PUSHJ reloc. */
2614 - (sec->output_offset + irel->r_offset)
2615 /* Don't count *this* stub twice. */
2616 - (mmix_elf_section_data (sec)
2617 ->pjs.stub_size[pjsno]
2618 + MAX_PUSHJ_STUB_SIZE))
2619 == bfd_reloc_ok)
2620 mmix_elf_section_data (sec)->pjs.stub_size[pjsno] = 0;
2621
2622 mmix_elf_section_data (sec)->pjs.stubs_size_sum
2623 += mmix_elf_section_data (sec)->pjs.stub_size[pjsno];
2624
2625 pjsno++;
2626 }
2627
2628 continue;
2629 }
2630
930b4cb2
HPN
2631 /* Get the value of the symbol referred to by the reloc. */
2632 if (ELF64_R_SYM (irel->r_info) < symtab_hdr->sh_info)
2633 {
2634 /* A local symbol. */
6cdc0ccc 2635 Elf_Internal_Sym *isym;
930b4cb2
HPN
2636 asection *sym_sec;
2637
6cdc0ccc
AM
2638 /* Read this BFD's local symbols if we haven't already. */
2639 if (isymbuf == NULL)
2640 {
2641 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
2642 if (isymbuf == NULL)
2643 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
2644 symtab_hdr->sh_info, 0,
2645 NULL, NULL, NULL);
2646 if (isymbuf == 0)
2647 goto error_return;
2648 }
930b4cb2 2649
6cdc0ccc
AM
2650 isym = isymbuf + ELF64_R_SYM (irel->r_info);
2651 if (isym->st_shndx == SHN_UNDEF)
930b4cb2 2652 sym_sec = bfd_und_section_ptr;
6cdc0ccc 2653 else if (isym->st_shndx == SHN_ABS)
930b4cb2 2654 sym_sec = bfd_abs_section_ptr;
6cdc0ccc 2655 else if (isym->st_shndx == SHN_COMMON)
930b4cb2
HPN
2656 sym_sec = bfd_com_section_ptr;
2657 else
6cdc0ccc
AM
2658 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
2659 symval = (isym->st_value
930b4cb2
HPN
2660 + sym_sec->output_section->vma
2661 + sym_sec->output_offset);
2662 }
2663 else
2664 {
2665 unsigned long indx;
930b4cb2
HPN
2666
2667 /* An external symbol. */
2668 indx = ELF64_R_SYM (irel->r_info) - symtab_hdr->sh_info;
2669 h = elf_sym_hashes (abfd)[indx];
2670 BFD_ASSERT (h != NULL);
284d826d
HPN
2671 if (h->root.type == bfd_link_hash_undefweak)
2672 /* FIXME: for R_MMIX_PUSHJ_STUBBABLE, there are alternatives to
2673 the canonical value 0 for an unresolved weak symbol to
2674 consider: as the debug-friendly approach, resolve to "abort"
2675 (or a port-specific function), or as the space-friendly
2676 approach resolve to the next instruction (like some other
2677 ports, notably ARM and AArch64). These alternatives require
2678 matching code in mmix_elf_perform_relocation or its caller. */
2679 symval = 0;
2680 else if (h->root.type == bfd_link_hash_defined
2681 || h->root.type == bfd_link_hash_defweak)
2682 symval = (h->root.u.def.value
2683 + h->root.u.def.section->output_section->vma
2684 + h->root.u.def.section->output_offset);
2685 else
930b4cb2 2686 {
f60ebe14
HPN
2687 /* This appears to be a reference to an undefined symbol. Just
2688 ignore it--it will be caught by the regular reloc processing.
2689 We need to keep BPO reloc accounting consistent, though
2690 else we'll abort instead of emitting an error message. */
2691 if (ELF64_R_TYPE (irel->r_info) == R_MMIX_BASE_PLUS_OFFSET
2692 && gregdata != NULL)
2693 {
2694 gregdata->n_remaining_bpo_relocs_this_relaxation_round--;
2695 bpono++;
2696 }
a8a48c75
HPN
2697
2698 /* Similarly, keep accounting consistent for PUSHJ
2699 referring to an undefined symbol. */
2700 if (ELF64_R_TYPE (irel->r_info) == R_MMIX_PUSHJ_STUBBABLE)
2701 pjsno_undefs++;
930b4cb2
HPN
2702 continue;
2703 }
930b4cb2
HPN
2704 }
2705
f60ebe14
HPN
2706 if (ELF64_R_TYPE (irel->r_info) == (int) R_MMIX_PUSHJ_STUBBABLE)
2707 {
2708 bfd_vma value = symval + irel->r_addend;
2709 bfd_vma dot
2710 = (sec->output_section->vma
2711 + sec->output_offset
2712 + irel->r_offset);
2713 bfd_vma stubaddr
2714 = (sec->output_section->vma
2715 + sec->output_offset
eea6121a 2716 + size
f60ebe14
HPN
2717 + mmix_elf_section_data (sec)->pjs.stubs_size_sum);
2718
2719 if ((value & 3) == 0
2720 && bfd_check_overflow (complain_overflow_signed,
2721 19,
2722 0,
2723 bfd_arch_bits_per_address (abfd),
2724 value - dot
2725 - (value > dot
2726 ? mmix_elf_section_data (sec)
2727 ->pjs.stub_size[pjsno]
2728 : 0))
2729 == bfd_reloc_ok)
2730 /* If the reloc fits, no stub is needed. */
2731 mmix_elf_section_data (sec)->pjs.stub_size[pjsno] = 0;
2732 else
2733 /* Maybe we can get away with just a JMP insn? */
2734 if ((value & 3) == 0
2735 && bfd_check_overflow (complain_overflow_signed,
2736 27,
2737 0,
2738 bfd_arch_bits_per_address (abfd),
2739 value - stubaddr
2740 - (value > dot
2741 ? mmix_elf_section_data (sec)
2742 ->pjs.stub_size[pjsno] - 4
2743 : 0))
2744 == bfd_reloc_ok)
2745 /* Yep, account for a stub consisting of a single JMP insn. */
2746 mmix_elf_section_data (sec)->pjs.stub_size[pjsno] = 4;
2747 else
2748 /* Nope, go for the full insn stub. It doesn't seem useful to
2749 emit the intermediate sizes; those will only be useful for
2750 a >64M program assuming contiguous code. */
2751 mmix_elf_section_data (sec)->pjs.stub_size[pjsno]
2752 = MAX_PUSHJ_STUB_SIZE;
2753
2754 mmix_elf_section_data (sec)->pjs.stubs_size_sum
2755 += mmix_elf_section_data (sec)->pjs.stub_size[pjsno];
2756 pjsno++;
2757 continue;
2758 }
2759
2760 /* We're looking at a R_MMIX_BASE_PLUS_OFFSET reloc. */
2761
930b4cb2
HPN
2762 gregdata->reloc_request[gregdata->bpo_reloc_indexes[bpono]].value
2763 = symval + irel->r_addend;
0a1b45a2 2764 gregdata->reloc_request[gregdata->bpo_reloc_indexes[bpono++]].valid = true;
930b4cb2
HPN
2765 gregdata->n_remaining_bpo_relocs_this_relaxation_round--;
2766 }
2767
2768 /* Check if that was the last BPO-reloc. If so, sort the values and
2769 calculate how many registers we need to cover them. Set the size of
2770 the linker gregs, and if the number of registers changed, indicate
2771 that we need to relax some more because we have more work to do. */
f60ebe14
HPN
2772 if (gregdata != NULL
2773 && gregdata->n_remaining_bpo_relocs_this_relaxation_round == 0)
930b4cb2
HPN
2774 {
2775 size_t i;
2776 bfd_vma prev_base;
2777 size_t regindex;
2778
2779 /* First, reset the remaining relocs for the next round. */
2780 gregdata->n_remaining_bpo_relocs_this_relaxation_round
2781 = gregdata->n_bpo_relocs;
2782
2c3fc389 2783 qsort (gregdata->reloc_request,
930b4cb2
HPN
2784 gregdata->n_max_bpo_relocs,
2785 sizeof (struct bpo_reloc_request),
2786 bpo_reloc_request_sort_fn);
2787
2788 /* Recalculate indexes. When we find a change (however unlikely
2789 after the initial iteration), we know we need to relax again,
2790 since items in the GREG-array are sorted by increasing value and
2791 stored in the relaxation phase. */
2792 for (i = 0; i < gregdata->n_max_bpo_relocs; i++)
2793 if (gregdata->bpo_reloc_indexes[gregdata->reloc_request[i].bpo_reloc_no]
2794 != i)
2795 {
2796 gregdata->bpo_reloc_indexes[gregdata->reloc_request[i].bpo_reloc_no]
2797 = i;
0a1b45a2 2798 *again = true;
930b4cb2
HPN
2799 }
2800
2801 /* Allocate register numbers (indexing from 0). Stop at the first
2802 non-valid reloc. */
2803 for (i = 0, regindex = 0, prev_base = gregdata->reloc_request[0].value;
2804 i < gregdata->n_bpo_relocs;
2805 i++)
2806 {
2807 if (gregdata->reloc_request[i].value > prev_base + 255)
2808 {
2809 regindex++;
2810 prev_base = gregdata->reloc_request[i].value;
2811 }
2812 gregdata->reloc_request[i].regindex = regindex;
2813 gregdata->reloc_request[i].offset
2814 = gregdata->reloc_request[i].value - prev_base;
2815 }
2816
2817 /* If it's not the same as the last time, we need to relax again,
2818 because the size of the section has changed. I'm not sure we
2819 actually need to do any adjustments since the shrinking happens
2820 at the start of this section, but better safe than sorry. */
2821 if (gregdata->n_allocated_bpo_gregs != regindex + 1)
2822 {
2823 gregdata->n_allocated_bpo_gregs = regindex + 1;
0a1b45a2 2824 *again = true;
930b4cb2
HPN
2825 }
2826
eea6121a 2827 bpo_gregs_section->size = (regindex + 1) * 8;
930b4cb2
HPN
2828 }
2829
6cdc0ccc 2830 if (isymbuf != NULL && (unsigned char *) isymbuf != symtab_hdr->contents)
930b4cb2
HPN
2831 {
2832 if (! link_info->keep_memory)
6cdc0ccc
AM
2833 free (isymbuf);
2834 else
930b4cb2 2835 {
6cdc0ccc
AM
2836 /* Cache the symbols for elf_link_input_bfd. */
2837 symtab_hdr->contents = (unsigned char *) isymbuf;
930b4cb2
HPN
2838 }
2839 }
2840
a8a48c75
HPN
2841 BFD_ASSERT(pjsno + pjsno_undefs
2842 == mmix_elf_section_data (sec)->pjs.n_pushj_relocs);
284d826d 2843
c9594989 2844 if (elf_section_data (sec)->relocs != internal_relocs)
6cdc0ccc
AM
2845 free (internal_relocs);
2846
eea6121a 2847 if (sec->size < size + mmix_elf_section_data (sec)->pjs.stubs_size_sum)
f60ebe14
HPN
2848 abort ();
2849
eea6121a 2850 if (sec->size > size + mmix_elf_section_data (sec)->pjs.stubs_size_sum)
f60ebe14 2851 {
eea6121a 2852 sec->size = size + mmix_elf_section_data (sec)->pjs.stubs_size_sum;
0a1b45a2 2853 *again = true;
f60ebe14
HPN
2854 }
2855
0a1b45a2 2856 return true;
930b4cb2
HPN
2857
2858 error_return:
c9594989 2859 if ((unsigned char *) isymbuf != symtab_hdr->contents)
6cdc0ccc 2860 free (isymbuf);
c9594989 2861 if (elf_section_data (sec)->relocs != internal_relocs)
6cdc0ccc 2862 free (internal_relocs);
0a1b45a2 2863 return false;
930b4cb2
HPN
2864}
2865\f
3c3bdf30 2866#define ELF_ARCH bfd_arch_mmix
07d6d2b8 2867#define ELF_MACHINE_CODE EM_MMIX
3c3bdf30
NC
2868
2869/* According to mmix-doc page 36 (paragraph 45), this should be (1LL << 48LL).
2870 However, that's too much for something somewhere in the linker part of
2871 BFD; perhaps the start-address has to be a non-zero multiple of this
2872 number, or larger than this number. The symptom is that the linker
2873 complains: "warning: allocated section `.text' not in segment". We
2874 settle for 64k; the page-size used in examples is 8k.
2875 #define ELF_MAXPAGESIZE 0x10000
2876
2877 Unfortunately, this causes excessive padding in the supposedly small
2878 for-education programs that are the expected usage (where people would
2879 inspect output). We stick to 256 bytes just to have *some* default
2880 alignment. */
2881#define ELF_MAXPAGESIZE 0x100
2882
6d00b590 2883#define TARGET_BIG_SYM mmix_elf64_vec
3c3bdf30
NC
2884#define TARGET_BIG_NAME "elf64-mmix"
2885
2886#define elf_info_to_howto_rel NULL
2887#define elf_info_to_howto mmix_info_to_howto_rela
2888#define elf_backend_relocate_section mmix_elf_relocate_section
2889#define elf_backend_gc_mark_hook mmix_elf_gc_mark_hook
930b4cb2 2890
3c3bdf30
NC
2891#define elf_backend_link_output_symbol_hook \
2892 mmix_elf_link_output_symbol_hook
2893#define elf_backend_add_symbol_hook mmix_elf_add_symbol_hook
2894
2895#define elf_backend_check_relocs mmix_elf_check_relocs
2896#define elf_backend_symbol_processing mmix_elf_symbol_processing
d00dd7dc 2897#define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all
3c3bdf30 2898
cd5b2bab
AM
2899#define bfd_elf64_bfd_copy_link_hash_symbol_type \
2900 _bfd_generic_copy_link_hash_symbol_type
2901
3c3bdf30
NC
2902#define bfd_elf64_bfd_is_local_label_name \
2903 mmix_elf_is_local_label_name
2904
2905#define elf_backend_may_use_rel_p 0
2906#define elf_backend_may_use_rela_p 1
2907#define elf_backend_default_use_rela_p 1
2908
2909#define elf_backend_can_gc_sections 1
2910#define elf_backend_section_from_bfd_section \
2911 mmix_elf_section_from_bfd_section
2912
f0abc2a1 2913#define bfd_elf64_new_section_hook mmix_elf_new_section_hook
3c3bdf30 2914#define bfd_elf64_bfd_final_link mmix_elf_final_link
930b4cb2 2915#define bfd_elf64_bfd_relax_section mmix_elf_relax_section
3c3bdf30
NC
2916
2917#include "elf64-target.h"