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Only check for valid Morello bounds on non-exec syms
[thirdparty/binutils-gdb.git] / bfd / elfnn-aarch64.c
CommitLineData
cec5225b 1/* AArch64-specific support for NN-bit ELF.
b3adc24a 2 Copyright (C) 2009-2020 Free Software Foundation, Inc.
a06ea964
NC		 3 Contributed by ARM Ltd.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; see the file COPYING3. If not,
19 see <http://www.gnu.org/licenses/>. */
20
21/* Notes on implementation:
22
23 Thread Local Store (TLS)
24
25 Overview:
26
27 The implementation currently supports both traditional TLS and TLS
28 descriptors, but only general dynamic (GD).
29
30 For traditional TLS the assembler will present us with code
31 fragments of the form:
32
33 adrp x0, :tlsgd:foo
07d6d2b8 34 R_AARCH64_TLSGD_ADR_PAGE21(foo)
a06ea964 35 add x0, :tlsgd_lo12:foo
07d6d2b8 36 R_AARCH64_TLSGD_ADD_LO12_NC(foo)
a06ea964
NC		 37 bl __tls_get_addr
38 nop
39
40 For TLS descriptors the assembler will present us with code
41 fragments of the form:
42
07d6d2b8
AM		 43 adrp x0, :tlsdesc:foo R_AARCH64_TLSDESC_ADR_PAGE21(foo)
44 ldr x1, [x0, #:tlsdesc_lo12:foo] R_AARCH64_TLSDESC_LD64_LO12(foo)
45 add x0, x0, #:tlsdesc_lo12:foo R_AARCH64_TLSDESC_ADD_LO12(foo)
a06ea964 46 .tlsdesccall foo
07d6d2b8 47 blr x1 R_AARCH64_TLSDESC_CALL(foo)
a06ea964
NC		 48
49 The relocations R_AARCH64_TLSGD_{ADR_PREL21,ADD_LO12_NC} against foo
50 indicate that foo is thread local and should be accessed via the
51 traditional TLS mechanims.
52
a6bb11b2 53 The relocations R_AARCH64_TLSDESC_{ADR_PAGE21,LD64_LO12_NC,ADD_LO12_NC}
a06ea964
NC		 54 against foo indicate that 'foo' is thread local and should be accessed
55 via a TLS descriptor mechanism.
56
57 The precise instruction sequence is only relevant from the
58 perspective of linker relaxation which is currently not implemented.
59
60 The static linker must detect that 'foo' is a TLS object and
61 allocate a double GOT entry. The GOT entry must be created for both
62 global and local TLS symbols. Note that this is different to none
63 TLS local objects which do not need a GOT entry.
64
65 In the traditional TLS mechanism, the double GOT entry is used to
66 provide the tls_index structure, containing module and offset
a6bb11b2 67 entries. The static linker places the relocation R_AARCH64_TLS_DTPMOD
a06ea964
NC		 68 on the module entry. The loader will subsequently fixup this
69 relocation with the module identity.
70
71 For global traditional TLS symbols the static linker places an
a6bb11b2 72 R_AARCH64_TLS_DTPREL relocation on the offset entry. The loader
a06ea964
NC		 73 will subsequently fixup the offset. For local TLS symbols the static
74 linker fixes up offset.
75
76 In the TLS descriptor mechanism the double GOT entry is used to
77 provide the descriptor. The static linker places the relocation
78 R_AARCH64_TLSDESC on the first GOT slot. The loader will
79 subsequently fix this up.
80
81 Implementation:
82
83 The handling of TLS symbols is implemented across a number of
84 different backend functions. The following is a top level view of
85 what processing is performed where.
86
87 The TLS implementation maintains state information for each TLS
88 symbol. The state information for local and global symbols is kept
89 in different places. Global symbols use generic BFD structures while
90 local symbols use backend specific structures that are allocated and
91 maintained entirely by the backend.
92
93 The flow:
94
cec5225b 95 elfNN_aarch64_check_relocs()
a06ea964
NC		 96
97 This function is invoked for each relocation.
98
99 The TLS relocations R_AARCH64_TLSGD_{ADR_PREL21,ADD_LO12_NC} and
a6bb11b2 100 R_AARCH64_TLSDESC_{ADR_PAGE21,LD64_LO12_NC,ADD_LO12_NC} are
a06ea964
NC		 101 spotted. One time creation of local symbol data structures are
102 created when the first local symbol is seen.
103
104 The reference count for a symbol is incremented. The GOT type for
105 each symbol is marked as general dynamic.
106
cec5225b 107 elfNN_aarch64_allocate_dynrelocs ()
a06ea964
NC		 108
109 For each global with positive reference count we allocate a double
110 GOT slot. For a traditional TLS symbol we allocate space for two
111 relocation entries on the GOT, for a TLS descriptor symbol we
112 allocate space for one relocation on the slot. Record the GOT offset
113 for this symbol.
114
cec5225b 115 elfNN_aarch64_size_dynamic_sections ()
a06ea964
NC		 116
117 Iterate all input BFDS, look for in the local symbol data structure
118 constructed earlier for local TLS symbols and allocate them double
119 GOT slots along with space for a single GOT relocation. Update the
120 local symbol structure to record the GOT offset allocated.
121
cec5225b 122 elfNN_aarch64_relocate_section ()
a06ea964 123
cec5225b 124 Calls elfNN_aarch64_final_link_relocate ()
a06ea964
NC		 125
126 Emit the relevant TLS relocations against the GOT for each TLS
127 symbol. For local TLS symbols emit the GOT offset directly. The GOT
128 relocations are emitted once the first time a TLS symbol is
129 encountered. The implementation uses the LSB of the GOT offset to
130 flag that the relevant GOT relocations for a symbol have been
131 emitted. All of the TLS code that uses the GOT offset needs to take
132 care to mask out this flag bit before using the offset.
133
cec5225b 134 elfNN_aarch64_final_link_relocate ()
a06ea964
NC		 135
136 Fixup the R_AARCH64_TLSGD_{ADR_PREL21, ADD_LO12_NC} relocations. */
137
138#include "sysdep.h"
139#include "bfd.h"
140#include "libiberty.h"
141#include "libbfd.h"
a06ea964
NC		 142#include "elf-bfd.h"
143#include "bfdlink.h"
1419bbe5 144#include "objalloc.h"
a06ea964 145#include "elf/aarch64.h"
caed7120 146#include "elfxx-aarch64.h"
a8bfaadb 147#include "cpu-aarch64.h"
a06ea964 148
cec5225b
YZ		 149#define ARCH_SIZE NN
150
151#if ARCH_SIZE == 64
152#define AARCH64_R(NAME) R_AARCH64_ ## NAME
153#define AARCH64_R_STR(NAME) "R_AARCH64_" #NAME
a6bb11b2
YZ		 154#define HOWTO64(...) HOWTO (__VA_ARGS__)
155#define HOWTO32(...) EMPTY_HOWTO (0)
cec5225b 156#define LOG_FILE_ALIGN 3
f955cccf 157#define BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC BFD_RELOC_AARCH64_TLSDESC_LD64_LO12
cec5225b
YZ		 158#endif
159
f7d2c675
SP		 160#define MORELLO_R(NAME) R_MORELLO_ ## NAME
161#define MORELLO_R_STR(NAME) "R_MORELLO_" #NAME
162
cec5225b
YZ		 163#if ARCH_SIZE == 32
164#define AARCH64_R(NAME) R_AARCH64_P32_ ## NAME
165#define AARCH64_R_STR(NAME) "R_AARCH64_P32_" #NAME
a6bb11b2
YZ		 166#define HOWTO64(...) EMPTY_HOWTO (0)
167#define HOWTO32(...) HOWTO (__VA_ARGS__)
cec5225b 168#define LOG_FILE_ALIGN 2
07d6d2b8
AM		 169#define BFD_RELOC_AARCH64_TLSDESC_LD32_LO12 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
170#define R_AARCH64_P32_TLSDESC_ADD_LO12 R_AARCH64_P32_TLSDESC_ADD_LO12_NC
cec5225b
YZ		 171#endif
172
a6bb11b2 173#define IS_AARCH64_TLS_RELOC(R_TYPE) \
4c0a9a6f
JW		 174 ((R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC \
175 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21 \
3c12b054 176 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PREL21 \
3e8286c0 177 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC \
1aa66fb1 178 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G1 \
1408e112
MM		 179 || (R_TYPE) == BFD_RELOC_MORELLO_TLSIE_ADR_GOTTPREL_PAGE20 \
180 || (R_TYPE) == BFD_RELOC_MORELLO_TLSIE_ADD_LO12 \
a6bb11b2 181 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 \
a6bb11b2 182 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC \
4c0a9a6f 183 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC \
a6bb11b2 184 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19 \
4c0a9a6f
JW		 185 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC \
186 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1 \
6ffe9a1b 187 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12 \
40fbed84 188 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12 \
753999c1 189 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC \
73f925cc 190 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC \
f69e4920 191 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 \
77a69ff8 192 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21 \
07c9aa07
JW		 193 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12 \
194 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC \
195 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12 \
196 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC \
197 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12 \
198 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC \
199 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12 \
200 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC \
6ffe9a1b
JW		 201 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0 \
202 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC \
203 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1 \
204 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC \
205 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2 \
26c32295
MM		 206 || (R_TYPE) == BFD_RELOC_AARCH64_TLS_DTPMOD \
207 || (R_TYPE) == BFD_RELOC_AARCH64_TLS_DTPREL \
208 || (R_TYPE) == BFD_RELOC_AARCH64_TLS_TPREL \
209 || IS_AARCH64_TLSLE_RELOC ((R_TYPE)) \
210 || IS_AARCH64_TLSDESC_RELOC ((R_TYPE)))
211
212#define IS_AARCH64_TLSLE_RELOC(R_TYPE) \
213 ((R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12 \
4c0a9a6f 214 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12 \
a6bb11b2 215 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC \
e04ef022
RL		 216 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12 \
217 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC \
218 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12 \
219 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC \
220 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12 \
221 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC \
222 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12 \
223 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC \
a6bb11b2
YZ		 224 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0 \
225 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC \
4c0a9a6f
JW		 226 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1 \
227 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC \
26c32295 228 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2)
a06ea964 229
9331eea1 230#define IS_AARCH64_TLS_RELAX_RELOC(R_TYPE) \
f955cccf
NC		 231 ((R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD \
232 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD_LO12 \
4ca9b406 233 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20 \
4af68b9c
JW		 234 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 \
235 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21 \
4ca9b406 236 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_CALL \
4af68b9c
JW		 237 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_CALL \
238 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD_PREL19 \
4ca9b406 239 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_LD128_LO12 \
4af68b9c 240 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC \
0484b454
RL		 241 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDR \
242 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC \
243 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G1 \
244 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDR \
4af68b9c 245 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21 \
9331eea1
JW		 246 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PREL21 \
247 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC \
ac734732
RL		 248 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC \
249 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G1 \
1408e112
MM		 250 || (R_TYPE) == BFD_RELOC_MORELLO_TLSIE_ADR_GOTTPREL_PAGE20 \
251 || (R_TYPE) == BFD_RELOC_MORELLO_TLSIE_ADD_LO12 \
9331eea1
JW		 252 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 \
253 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19 \
254 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC \
259364ad
JW		 255 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC \
256 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 \
4af68b9c 257 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21)
9331eea1 258
a6bb11b2 259#define IS_AARCH64_TLSDESC_RELOC(R_TYPE) \
4c0a9a6f
JW		 260 ((R_TYPE) == BFD_RELOC_AARCH64_TLSDESC \
261 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD \
f955cccf 262 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD_LO12 \
a6bb11b2 263 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 \
4ca9b406 264 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20 \
389b8029 265 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21 \
4c0a9a6f 266 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_CALL \
4ca9b406 267 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_CALL \
a6bb11b2 268 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC \
f955cccf 269 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD64_LO12 \
4ca9b406 270 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_LD128_LO12 \
a6bb11b2 271 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDR \
4c0a9a6f
JW		 272 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD_PREL19 \
273 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC \
274 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G1)
a06ea964 275
1408e112
MM		 276#define IS_MORELLO_SIZE_RELOC(R_TYPE) \
277 ((R_TYPE) == BFD_RELOC_MORELLO_MOVW_SIZE_G0 \
278 || (R_TYPE) == BFD_RELOC_MORELLO_MOVW_SIZE_G0_NC \
279 || (R_TYPE) == BFD_RELOC_MORELLO_MOVW_SIZE_G1 \
280 || (R_TYPE) == BFD_RELOC_MORELLO_MOVW_SIZE_G1_NC \
281 || (R_TYPE) == BFD_RELOC_MORELLO_MOVW_SIZE_G2 \
282 || (R_TYPE) == BFD_RELOC_MORELLO_MOVW_SIZE_G2_NC \
283 || (R_TYPE) == BFD_RELOC_MORELLO_MOVW_SIZE_G3) \
284
6353d82b 285#define ELIMINATE_COPY_RELOCS 1
a06ea964 286
a06ea964 287/* Return size of a relocation entry. HTAB is the bfd's
cec5225b
YZ		 288 elf_aarch64_link_hash_entry. */
289#define RELOC_SIZE(HTAB) (sizeof (ElfNN_External_Rela))
a06ea964 290
a1bdea65
SP		 291/* GOT Entry size - 16 bytes in C64, 8 bytes in ELF64 and 4 bytes in ELF32. */
292#define GOT_ENTRY_SIZE(htab) (ARCH_SIZE >> (3 - htab->c64_rel))
293#define GOT_RESERVED_HEADER_SLOTS (3)
07d6d2b8
AM		 294#define PLT_ENTRY_SIZE (32)
295#define PLT_SMALL_ENTRY_SIZE (16)
296#define PLT_TLSDESC_ENTRY_SIZE (32)
37c18eed 297/* PLT sizes with BTI insn. */
68bb0359 298#define PLT_BTI_SMALL_ENTRY_SIZE (24)
1dbade74 299/* PLT sizes with PAC insn. */
68bb0359 300#define PLT_PAC_SMALL_ENTRY_SIZE (24)
1dbade74 301/* PLT sizes with BTI and PAC insn. */
1dbade74 302#define PLT_BTI_PAC_SMALL_ENTRY_SIZE (24)
a06ea964 303
2d0ca824 304/* Encoding of the nop instruction. */
a06ea964
NC		 305#define INSN_NOP 0xd503201f
306
1408e112
MM		 307/* This is just a neater name for something we want to check here. The
308 difference between SYMBOL_CALLS_LOCAL and SYMBOL_REFERENCES_LOCAL is only in
309 their treating of protected symbols. For SYMBOL_REFERENCES_LOCAL protected
310 symbols are not treated as known to reference locally. This is because in
311 the case that the symbol is a function symbol it is possible that
312 `&protected_sym` could return an address in an executable (after function
313 equality has necessitated making the canonical address of that function the
314 PLT entry in the running executable).
315
316 SYMBOL_CALLS_LOCAL does not have the same treatment of protected symbols
317 since we know we will always *call* a protected symbol.
318
319 For TLS symbols we do not need to worry about this, since they can not be
320 function symbols. But we don't want to have a confusing name asking whether
321 we will be calling a TLS symbol, so we rename it to
322 TLS_SYMBOL_REFERENCES_LOCAL. */
323#define TLS_SYMBOL_REFERENCES_LOCAL(INFO, H) \
324 SYMBOL_CALLS_LOCAL ((INFO), (H))
325
a06ea964
NC		 326#define aarch64_compute_jump_table_size(htab) \
327 (((htab)->root.srelplt == NULL) ? 0 \
a1bdea65 328 : (htab)->root.srelplt->reloc_count * GOT_ENTRY_SIZE (htab))
a06ea964 329
aeba84b1
MM		 330/* Macro to check for a static non-PIE binary. Checking for this in incorrect
331 ways is something that has been the cause of a few bugs throughout Morello
332 development. Making a macro for the check should help make this easier to
333 check.
334 N.b. this macro can only be called after symbols have been loaded by the
335 generic linker. In practice this is not much of a restriction, since the
336 check_relocs, size_dynamic_sections, and relocate_section hooks are all done
337 after that point. */
338#define static_pde(info) (!elf_hash_table (info)->dynamic_sections_created \
339 && bfd_link_executable (info))
340
c0a10a86
MM		 341/* The only time that we want the value of a symbol but do not want a
342 relocation for it in Morello is when that symbol is undefined weak. In this
343 case we just need the zero capability and there's no point emitting a
344 relocation for it when we can get an untagged zero capability by just
345 loading some zeros. */
346#define c64_needs_relocation(info, h) \
ece841e8
MM		 347 (!((h) \
348 && (h)->root.type == bfd_link_hash_undefweak \
c0a10a86
MM		 349 && (UNDEFWEAK_NO_DYNAMIC_RELOC ((info), (h)) \
350 || !elf_hash_table ((info))->dynamic_sections_created)))
351
a06ea964
NC		 352/* The first entry in a procedure linkage table looks like this
353 if the distance between the PLTGOT and the PLT is < 4GB use
354 these PLT entries. Note that the dynamic linker gets &PLTGOT[2]
355 in x16 and needs to work out PLTGOT[1] by using an address of
cec5225b
YZ		 356 [x16,#-GOT_ENTRY_SIZE]. */
357static const bfd_byte elfNN_aarch64_small_plt0_entry[PLT_ENTRY_SIZE] =
a06ea964
NC		 358{
359 0xf0, 0x7b, 0xbf, 0xa9, /* stp x16, x30, [sp, #-16]! */
360 0x10, 0x00, 0x00, 0x90, /* adrp x16, (GOT+16) */
caed7120 361#if ARCH_SIZE == 64
a06ea964
NC		 362 0x11, 0x0A, 0x40, 0xf9, /* ldr x17, [x16, #PLT_GOT+0x10] */
363 0x10, 0x42, 0x00, 0x91, /* add x16, x16,#PLT_GOT+0x10 */
caed7120
YZ		 364#else
365 0x11, 0x0A, 0x40, 0xb9, /* ldr w17, [x16, #PLT_GOT+0x8] */
366 0x10, 0x22, 0x00, 0x11, /* add w16, w16,#PLT_GOT+0x8 */
367#endif
a06ea964
NC		 368 0x20, 0x02, 0x1f, 0xd6, /* br x17 */
369 0x1f, 0x20, 0x03, 0xd5, /* nop */
370 0x1f, 0x20, 0x03, 0xd5, /* nop */
371 0x1f, 0x20, 0x03, 0xd5, /* nop */
372};
373
68bb0359 374static const bfd_byte elfNN_aarch64_small_plt0_bti_entry[PLT_ENTRY_SIZE] =
37c18eed
SD		 375{
376 0x5f, 0x24, 0x03, 0xd5, /* bti c. */
377 0xf0, 0x7b, 0xbf, 0xa9, /* stp x16, x30, [sp, #-16]! */
378 0x10, 0x00, 0x00, 0x90, /* adrp x16, (GOT+16) */
379#if ARCH_SIZE == 64
380 0x11, 0x0A, 0x40, 0xf9, /* ldr x17, [x16, #PLT_GOT+0x10] */
381 0x10, 0x42, 0x00, 0x91, /* add x16, x16,#PLT_GOT+0x10 */
382#else
383 0x11, 0x0A, 0x40, 0xb9, /* ldr w17, [x16, #PLT_GOT+0x8] */
384 0x10, 0x22, 0x00, 0x11, /* add w16, w16,#PLT_GOT+0x8 */
385#endif
386 0x20, 0x02, 0x1f, 0xd6, /* br x17 */
387 0x1f, 0x20, 0x03, 0xd5, /* nop */
388 0x1f, 0x20, 0x03, 0xd5, /* nop */
1dbade74
SD		 389};
390
e19e9199
SP		 391/* The C64 PLT0. */
392static const bfd_byte elfNN_c64_small_plt0_entry[PLT_ENTRY_SIZE] =
393{
394 0xf0, 0x7b, 0xbf, 0x62, /* stp c16, c30, [csp, #-32]! */
395 0x10, 0x00, 0x80, 0x90, /* adrp c16, (GOT+16) */
396 0x11, 0x0a, 0x40, 0xc2, /* ldr c17, [c16, #PLT_GOT+0x10] */
397 0x10, 0x02, 0x00, 0x02, /* add c16, c16,#PLT_GOT+0x10 */
398 0x20, 0x12, 0xc2, 0xc2, /* br c17 */
399 0x1f, 0x20, 0x03, 0xd5, /* nop */
400 0x1f, 0x20, 0x03, 0xd5, /* nop */
401 0x1f, 0x20, 0x03, 0xd5, /* nop */
402};
403
a06ea964
NC		 404/* Per function entry in a procedure linkage table looks like this
405 if the distance between the PLTGOT and the PLT is < 4GB use
37c18eed 406 these PLT entries. Use BTI versions of the PLTs when enabled. */
cec5225b 407static const bfd_byte elfNN_aarch64_small_plt_entry[PLT_SMALL_ENTRY_SIZE] =
a06ea964
NC		 408{
409 0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
caed7120 410#if ARCH_SIZE == 64
a06ea964
NC		 411 0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
412 0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
caed7120
YZ		 413#else
414 0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
415 0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
416#endif
a06ea964
NC		 417 0x20, 0x02, 0x1f, 0xd6, /* br x17. */
418};
419
e19e9199
SP		 420/* The C64 PLT. */
421static const bfd_byte elfNN_c64_small_plt_entry[PLT_SMALL_ENTRY_SIZE] =
422{
423 0x10, 0x00, 0x80, 0x90, /* adrp c16, PLTGOT + offset */
424 0x11, 0x02, 0x40, 0xc2, /* ldr c17, [c16, PLTGOT + offset] */
425 0x10, 0x02, 0x00, 0x02, /* add c16, c16, :lo12:PLTGOT + offset */
426 0x20, 0x12, 0xc2, 0xc2, /* br c17. */
427};
428
37c18eed
SD		 429static const bfd_byte
430elfNN_aarch64_small_plt_bti_entry[PLT_BTI_SMALL_ENTRY_SIZE] =
431{
432 0x5f, 0x24, 0x03, 0xd5, /* bti c. */
433 0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
434#if ARCH_SIZE == 64
435 0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
436 0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
437#else
438 0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
439 0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
440#endif
441 0x20, 0x02, 0x1f, 0xd6, /* br x17. */
68bb0359 442 0x1f, 0x20, 0x03, 0xd5, /* nop */
37c18eed
SD		 443};
444
1dbade74
SD		 445static const bfd_byte
446elfNN_aarch64_small_plt_pac_entry[PLT_PAC_SMALL_ENTRY_SIZE] =
447{
448 0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
449#if ARCH_SIZE == 64
450 0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
451 0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
452#else
453 0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
454 0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
455#endif
456 0x9f, 0x21, 0x03, 0xd5, /* autia1716 */
457 0x20, 0x02, 0x1f, 0xd6, /* br x17. */
68bb0359 458 0x1f, 0x20, 0x03, 0xd5, /* nop */
1dbade74
SD		 459};
460
461static const bfd_byte
462elfNN_aarch64_small_plt_bti_pac_entry[PLT_BTI_PAC_SMALL_ENTRY_SIZE] =
463{
464 0x5f, 0x24, 0x03, 0xd5, /* bti c. */
465 0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
466#if ARCH_SIZE == 64
467 0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
468 0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
469#else
470 0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
471 0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
472#endif
473 0x9f, 0x21, 0x03, 0xd5, /* autia1716 */
474 0x20, 0x02, 0x1f, 0xd6, /* br x17. */
475};
476
a06ea964 477static const bfd_byte
cec5225b 478elfNN_aarch64_tlsdesc_small_plt_entry[PLT_TLSDESC_ENTRY_SIZE] =
a06ea964
NC		 479{
480 0xe2, 0x0f, 0xbf, 0xa9, /* stp x2, x3, [sp, #-16]! */
481 0x02, 0x00, 0x00, 0x90, /* adrp x2, 0 */
482 0x03, 0x00, 0x00, 0x90, /* adrp x3, 0 */
caed7120
YZ		 483#if ARCH_SIZE == 64
484 0x42, 0x00, 0x40, 0xf9, /* ldr x2, [x2, #0] */
a06ea964 485 0x63, 0x00, 0x00, 0x91, /* add x3, x3, 0 */
caed7120
YZ		 486#else
487 0x42, 0x00, 0x40, 0xb9, /* ldr w2, [x2, #0] */
488 0x63, 0x00, 0x00, 0x11, /* add w3, w3, 0 */
489#endif
490 0x40, 0x00, 0x1f, 0xd6, /* br x2 */
a06ea964
NC		 491 0x1f, 0x20, 0x03, 0xd5, /* nop */
492 0x1f, 0x20, 0x03, 0xd5, /* nop */
493};
494
37c18eed 495static const bfd_byte
68bb0359 496elfNN_aarch64_tlsdesc_small_plt_bti_entry[PLT_TLSDESC_ENTRY_SIZE] =
37c18eed
SD		 497{
498 0x5f, 0x24, 0x03, 0xd5, /* bti c. */
499 0xe2, 0x0f, 0xbf, 0xa9, /* stp x2, x3, [sp, #-16]! */
500 0x02, 0x00, 0x00, 0x90, /* adrp x2, 0 */
501 0x03, 0x00, 0x00, 0x90, /* adrp x3, 0 */
502#if ARCH_SIZE == 64
503 0x42, 0x00, 0x40, 0xf9, /* ldr x2, [x2, #0] */
504 0x63, 0x00, 0x00, 0x91, /* add x3, x3, 0 */
505#else
506 0x42, 0x00, 0x40, 0xb9, /* ldr w2, [x2, #0] */
507 0x63, 0x00, 0x00, 0x11, /* add w3, w3, 0 */
508#endif
509 0x40, 0x00, 0x1f, 0xd6, /* br x2 */
510 0x1f, 0x20, 0x03, 0xd5, /* nop */
37c18eed
SD		 511};
512
4ca9b406
SP		 513static const bfd_byte
514elfNN_aarch64_tlsdesc_small_plt_c64_entry[PLT_TLSDESC_ENTRY_SIZE] =
515{
516 0xe2, 0x8f, 0xbf, 0x62, /* stp c2, c3, [sp, #-16]! */
517 0x02, 0x00, 0x80, 0x90, /* adrp c2, 0 */
518 0x03, 0x00, 0x80, 0x90, /* adrp c3, 0 */
519 0x42, 0x00, 0x40, 0xc2, /* ldr c2, [c2, #0] */
520 0x63, 0x00, 0x00, 0x02, /* add c3, c3, 0 */
521 0x40, 0x10, 0xc2, 0xc2, /* br c2 */
522 0x1f, 0x20, 0x03, 0xd5, /* nop */
523 0x1f, 0x20, 0x03, 0xd5, /* nop */
524};
525
07d6d2b8
AM		 526#define elf_info_to_howto elfNN_aarch64_info_to_howto
527#define elf_info_to_howto_rel elfNN_aarch64_info_to_howto
a06ea964
NC		 528
529#define AARCH64_ELF_ABI_VERSION 0
a06ea964
NC		 530
531/* In case we're on a 32-bit machine, construct a 64-bit "-1" value. */
532#define ALL_ONES (~ (bfd_vma) 0)
533
a6bb11b2
YZ		 534/* Indexed by the bfd interal reloc enumerators.
535 Therefore, the table needs to be synced with BFD_RELOC_AARCH64_*
536 in reloc.c. */
a06ea964 537
a6bb11b2 538static reloc_howto_type elfNN_aarch64_howto_table[] =
a06ea964 539{
a6bb11b2 540 EMPTY_HOWTO (0),
a06ea964 541
a6bb11b2 542 /* Basic data relocations. */
a06ea964 543
b7f28d87
JW		 544 /* Deprecated, but retained for backwards compatibility. */
545 HOWTO64 (R_AARCH64_NULL, /* type */
a06ea964 546 0, /* rightshift */
6346d5ca 547 3, /* size (0 = byte, 1 = short, 2 = long) */
a6bb11b2 548 0, /* bitsize */
a06ea964
NC		 549 FALSE, /* pc_relative */
550 0, /* bitpos */
551 complain_overflow_dont, /* complain_on_overflow */
552 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 553 "R_AARCH64_NULL", /* name */
a06ea964
NC		 554 FALSE, /* partial_inplace */
555 0, /* src_mask */
a6bb11b2 556 0, /* dst_mask */
a06ea964 557 FALSE), /* pcrel_offset */
a6bb11b2 558 HOWTO (R_AARCH64_NONE, /* type */
a06ea964 559 0, /* rightshift */
6346d5ca 560 3, /* size (0 = byte, 1 = short, 2 = long) */
a06ea964
NC		 561 0, /* bitsize */
562 FALSE, /* pc_relative */
563 0, /* bitpos */
564 complain_overflow_dont, /* complain_on_overflow */
565 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 566 "R_AARCH64_NONE", /* name */
a06ea964
NC		 567 FALSE, /* partial_inplace */
568 0, /* src_mask */
569 0, /* dst_mask */
570 FALSE), /* pcrel_offset */
571
572 /* .xword: (S+A) */
a6bb11b2 573 HOWTO64 (AARCH64_R (ABS64), /* type */
a06ea964
NC		 574 0, /* rightshift */
575 4, /* size (4 = long long) */
576 64, /* bitsize */
577 FALSE, /* pc_relative */
578 0, /* bitpos */
579 complain_overflow_unsigned, /* complain_on_overflow */
580 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 581 AARCH64_R_STR (ABS64), /* name */
a06ea964
NC		 582 FALSE, /* partial_inplace */
583 ALL_ONES, /* src_mask */
584 ALL_ONES, /* dst_mask */
585 FALSE), /* pcrel_offset */
586
587 /* .word: (S+A) */
a6bb11b2 588 HOWTO (AARCH64_R (ABS32), /* type */
a06ea964
NC		 589 0, /* rightshift */
590 2, /* size (0 = byte, 1 = short, 2 = long) */
591 32, /* bitsize */
592 FALSE, /* pc_relative */
593 0, /* bitpos */
594 complain_overflow_unsigned, /* complain_on_overflow */
595 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 596 AARCH64_R_STR (ABS32), /* name */
a06ea964
NC		 597 FALSE, /* partial_inplace */
598 0xffffffff, /* src_mask */
599 0xffffffff, /* dst_mask */
600 FALSE), /* pcrel_offset */
601
602 /* .half: (S+A) */
a6bb11b2 603 HOWTO (AARCH64_R (ABS16), /* type */
a06ea964
NC		 604 0, /* rightshift */
605 1, /* size (0 = byte, 1 = short, 2 = long) */
606 16, /* bitsize */
607 FALSE, /* pc_relative */
608 0, /* bitpos */
609 complain_overflow_unsigned, /* complain_on_overflow */
610 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 611 AARCH64_R_STR (ABS16), /* name */
a06ea964
NC		 612 FALSE, /* partial_inplace */
613 0xffff, /* src_mask */
614 0xffff, /* dst_mask */
615 FALSE), /* pcrel_offset */
616
617 /* .xword: (S+A-P) */
a6bb11b2 618 HOWTO64 (AARCH64_R (PREL64), /* type */
a06ea964
NC		 619 0, /* rightshift */
620 4, /* size (4 = long long) */
621 64, /* bitsize */
622 TRUE, /* pc_relative */
623 0, /* bitpos */
624 complain_overflow_signed, /* complain_on_overflow */
625 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 626 AARCH64_R_STR (PREL64), /* name */
a06ea964
NC		 627 FALSE, /* partial_inplace */
628 ALL_ONES, /* src_mask */
629 ALL_ONES, /* dst_mask */
630 TRUE), /* pcrel_offset */
631
632 /* .word: (S+A-P) */
a6bb11b2 633 HOWTO (AARCH64_R (PREL32), /* type */
a06ea964
NC		 634 0, /* rightshift */
635 2, /* size (0 = byte, 1 = short, 2 = long) */
636 32, /* bitsize */
637 TRUE, /* pc_relative */
638 0, /* bitpos */
639 complain_overflow_signed, /* complain_on_overflow */
640 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 641 AARCH64_R_STR (PREL32), /* name */
a06ea964
NC		 642 FALSE, /* partial_inplace */
643 0xffffffff, /* src_mask */
644 0xffffffff, /* dst_mask */
645 TRUE), /* pcrel_offset */
646
647 /* .half: (S+A-P) */
a6bb11b2 648 HOWTO (AARCH64_R (PREL16), /* type */
a06ea964
NC		 649 0, /* rightshift */
650 1, /* size (0 = byte, 1 = short, 2 = long) */
651 16, /* bitsize */
652 TRUE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_signed, /* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 656 AARCH64_R_STR (PREL16), /* name */
a06ea964
NC		 657 FALSE, /* partial_inplace */
658 0xffff, /* src_mask */
659 0xffff, /* dst_mask */
660 TRUE), /* pcrel_offset */
661
662 /* Group relocations to create a 16, 32, 48 or 64 bit
663 unsigned data or abs address inline. */
664
665 /* MOVZ: ((S+A) >> 0) & 0xffff */
a6bb11b2 666 HOWTO (AARCH64_R (MOVW_UABS_G0), /* type */
a06ea964
NC		 667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 16, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_unsigned, /* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 674 AARCH64_R_STR (MOVW_UABS_G0), /* name */
a06ea964
NC		 675 FALSE, /* partial_inplace */
676 0xffff, /* src_mask */
677 0xffff, /* dst_mask */
678 FALSE), /* pcrel_offset */
679
680 /* MOVK: ((S+A) >> 0) & 0xffff [no overflow check] */
a6bb11b2 681 HOWTO (AARCH64_R (MOVW_UABS_G0_NC), /* type */
a06ea964
NC		 682 0, /* rightshift */
683 2, /* size (0 = byte, 1 = short, 2 = long) */
684 16, /* bitsize */
685 FALSE, /* pc_relative */
686 0, /* bitpos */
687 complain_overflow_dont, /* complain_on_overflow */
688 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 689 AARCH64_R_STR (MOVW_UABS_G0_NC), /* name */
a06ea964
NC		 690 FALSE, /* partial_inplace */
691 0xffff, /* src_mask */
692 0xffff, /* dst_mask */
693 FALSE), /* pcrel_offset */
694
695 /* MOVZ: ((S+A) >> 16) & 0xffff */
a6bb11b2 696 HOWTO (AARCH64_R (MOVW_UABS_G1), /* type */
a06ea964
NC		 697 16, /* rightshift */
698 2, /* size (0 = byte, 1 = short, 2 = long) */
699 16, /* bitsize */
700 FALSE, /* pc_relative */
701 0, /* bitpos */
702 complain_overflow_unsigned, /* complain_on_overflow */
703 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 704 AARCH64_R_STR (MOVW_UABS_G1), /* name */
a06ea964
NC		 705 FALSE, /* partial_inplace */
706 0xffff, /* src_mask */
707 0xffff, /* dst_mask */
708 FALSE), /* pcrel_offset */
709
710 /* MOVK: ((S+A) >> 16) & 0xffff [no overflow check] */
a6bb11b2 711 HOWTO64 (AARCH64_R (MOVW_UABS_G1_NC), /* type */
a06ea964
NC		 712 16, /* rightshift */
713 2, /* size (0 = byte, 1 = short, 2 = long) */
714 16, /* bitsize */
715 FALSE, /* pc_relative */
716 0, /* bitpos */
717 complain_overflow_dont, /* complain_on_overflow */
718 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 719 AARCH64_R_STR (MOVW_UABS_G1_NC), /* name */
a06ea964
NC		 720 FALSE, /* partial_inplace */
721 0xffff, /* src_mask */
722 0xffff, /* dst_mask */
723 FALSE), /* pcrel_offset */
724
725 /* MOVZ: ((S+A) >> 32) & 0xffff */
a6bb11b2 726 HOWTO64 (AARCH64_R (MOVW_UABS_G2), /* type */
a06ea964
NC		 727 32, /* rightshift */
728 2, /* size (0 = byte, 1 = short, 2 = long) */
729 16, /* bitsize */
730 FALSE, /* pc_relative */
731 0, /* bitpos */
732 complain_overflow_unsigned, /* complain_on_overflow */
733 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 734 AARCH64_R_STR (MOVW_UABS_G2), /* name */
a06ea964
NC		 735 FALSE, /* partial_inplace */
736 0xffff, /* src_mask */
737 0xffff, /* dst_mask */
738 FALSE), /* pcrel_offset */
739
740 /* MOVK: ((S+A) >> 32) & 0xffff [no overflow check] */
a6bb11b2 741 HOWTO64 (AARCH64_R (MOVW_UABS_G2_NC), /* type */
a06ea964
NC		 742 32, /* rightshift */
743 2, /* size (0 = byte, 1 = short, 2 = long) */
744 16, /* bitsize */
745 FALSE, /* pc_relative */
746 0, /* bitpos */
747 complain_overflow_dont, /* complain_on_overflow */
748 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 749 AARCH64_R_STR (MOVW_UABS_G2_NC), /* name */
a06ea964
NC		 750 FALSE, /* partial_inplace */
751 0xffff, /* src_mask */
752 0xffff, /* dst_mask */
753 FALSE), /* pcrel_offset */
754
755 /* MOVZ: ((S+A) >> 48) & 0xffff */
a6bb11b2 756 HOWTO64 (AARCH64_R (MOVW_UABS_G3), /* type */
a06ea964
NC		 757 48, /* rightshift */
758 2, /* size (0 = byte, 1 = short, 2 = long) */
759 16, /* bitsize */
760 FALSE, /* pc_relative */
761 0, /* bitpos */
762 complain_overflow_unsigned, /* complain_on_overflow */
763 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 764 AARCH64_R_STR (MOVW_UABS_G3), /* name */
a06ea964
NC		 765 FALSE, /* partial_inplace */
766 0xffff, /* src_mask */
767 0xffff, /* dst_mask */
768 FALSE), /* pcrel_offset */
769
770 /* Group relocations to create high part of a 16, 32, 48 or 64 bit
771 signed data or abs address inline. Will change instruction
772 to MOVN or MOVZ depending on sign of calculated value. */
773
774 /* MOV[ZN]: ((S+A) >> 0) & 0xffff */
a6bb11b2 775 HOWTO (AARCH64_R (MOVW_SABS_G0), /* type */
a06ea964
NC		 776 0, /* rightshift */
777 2, /* size (0 = byte, 1 = short, 2 = long) */
c5e3a364 778 17, /* bitsize */
a06ea964
NC		 779 FALSE, /* pc_relative */
780 0, /* bitpos */
781 complain_overflow_signed, /* complain_on_overflow */
782 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 783 AARCH64_R_STR (MOVW_SABS_G0), /* name */
a06ea964
NC		 784 FALSE, /* partial_inplace */
785 0xffff, /* src_mask */
786 0xffff, /* dst_mask */
787 FALSE), /* pcrel_offset */
788
789 /* MOV[ZN]: ((S+A) >> 16) & 0xffff */
a6bb11b2 790 HOWTO64 (AARCH64_R (MOVW_SABS_G1), /* type */
a06ea964
NC		 791 16, /* rightshift */
792 2, /* size (0 = byte, 1 = short, 2 = long) */
c5e3a364 793 17, /* bitsize */
a06ea964
NC		 794 FALSE, /* pc_relative */
795 0, /* bitpos */
796 complain_overflow_signed, /* complain_on_overflow */
797 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 798 AARCH64_R_STR (MOVW_SABS_G1), /* name */
a06ea964
NC		 799 FALSE, /* partial_inplace */
800 0xffff, /* src_mask */
801 0xffff, /* dst_mask */
802 FALSE), /* pcrel_offset */
803
804 /* MOV[ZN]: ((S+A) >> 32) & 0xffff */
a6bb11b2 805 HOWTO64 (AARCH64_R (MOVW_SABS_G2), /* type */
a06ea964
NC		 806 32, /* rightshift */
807 2, /* size (0 = byte, 1 = short, 2 = long) */
c5e3a364 808 17, /* bitsize */
a06ea964
NC		 809 FALSE, /* pc_relative */
810 0, /* bitpos */
811 complain_overflow_signed, /* complain_on_overflow */
812 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 813 AARCH64_R_STR (MOVW_SABS_G2), /* name */
a06ea964
NC		 814 FALSE, /* partial_inplace */
815 0xffff, /* src_mask */
816 0xffff, /* dst_mask */
817 FALSE), /* pcrel_offset */
818
32247401
RL		 819 /* Group relocations to create a 16, 32, 48 or 64 bit
820 PC relative address inline. */
821
822 /* MOV[NZ]: ((S+A-P) >> 0) & 0xffff */
e30d1fa1 823 HOWTO (AARCH64_R (MOVW_PREL_G0), /* type */
32247401
RL		 824 0, /* rightshift */
825 2, /* size (0 = byte, 1 = short, 2 = long) */
826 17, /* bitsize */
827 TRUE, /* pc_relative */
828 0, /* bitpos */
829 complain_overflow_signed, /* complain_on_overflow */
830 bfd_elf_generic_reloc, /* special_function */
831 AARCH64_R_STR (MOVW_PREL_G0), /* name */
832 FALSE, /* partial_inplace */
833 0xffff, /* src_mask */
834 0xffff, /* dst_mask */
835 TRUE), /* pcrel_offset */
836
837 /* MOVK: ((S+A-P) >> 0) & 0xffff [no overflow check] */
e30d1fa1 838 HOWTO (AARCH64_R (MOVW_PREL_G0_NC), /* type */
32247401
RL		 839 0, /* rightshift */
840 2, /* size (0 = byte, 1 = short, 2 = long) */
841 16, /* bitsize */
842 TRUE, /* pc_relative */
843 0, /* bitpos */
844 complain_overflow_dont, /* complain_on_overflow */
845 bfd_elf_generic_reloc, /* special_function */
846 AARCH64_R_STR (MOVW_PREL_G0_NC), /* name */
847 FALSE, /* partial_inplace */
848 0xffff, /* src_mask */
849 0xffff, /* dst_mask */
850 TRUE), /* pcrel_offset */
851
852 /* MOV[NZ]: ((S+A-P) >> 16) & 0xffff */
e30d1fa1 853 HOWTO (AARCH64_R (MOVW_PREL_G1), /* type */
32247401
RL		 854 16, /* rightshift */
855 2, /* size (0 = byte, 1 = short, 2 = long) */
856 17, /* bitsize */
857 TRUE, /* pc_relative */
858 0, /* bitpos */
859 complain_overflow_signed, /* complain_on_overflow */
860 bfd_elf_generic_reloc, /* special_function */
861 AARCH64_R_STR (MOVW_PREL_G1), /* name */
862 FALSE, /* partial_inplace */
863 0xffff, /* src_mask */
864 0xffff, /* dst_mask */
865 TRUE), /* pcrel_offset */
866
867 /* MOVK: ((S+A-P) >> 16) & 0xffff [no overflow check] */
868 HOWTO64 (AARCH64_R (MOVW_PREL_G1_NC), /* type */
869 16, /* rightshift */
870 2, /* size (0 = byte, 1 = short, 2 = long) */
871 16, /* bitsize */
872 TRUE, /* pc_relative */
873 0, /* bitpos */
874 complain_overflow_dont, /* complain_on_overflow */
875 bfd_elf_generic_reloc, /* special_function */
876 AARCH64_R_STR (MOVW_PREL_G1_NC), /* name */
877 FALSE, /* partial_inplace */
878 0xffff, /* src_mask */
879 0xffff, /* dst_mask */
880 TRUE), /* pcrel_offset */
881
882 /* MOV[NZ]: ((S+A-P) >> 32) & 0xffff */
883 HOWTO64 (AARCH64_R (MOVW_PREL_G2), /* type */
884 32, /* rightshift */
885 2, /* size (0 = byte, 1 = short, 2 = long) */
886 17, /* bitsize */
887 TRUE, /* pc_relative */
888 0, /* bitpos */
889 complain_overflow_signed, /* complain_on_overflow */
890 bfd_elf_generic_reloc, /* special_function */
891 AARCH64_R_STR (MOVW_PREL_G2), /* name */
892 FALSE, /* partial_inplace */
893 0xffff, /* src_mask */
894 0xffff, /* dst_mask */
895 TRUE), /* pcrel_offset */
896
897 /* MOVK: ((S+A-P) >> 32) & 0xffff [no overflow check] */
898 HOWTO64 (AARCH64_R (MOVW_PREL_G2_NC), /* type */
899 32, /* rightshift */
900 2, /* size (0 = byte, 1 = short, 2 = long) */
901 16, /* bitsize */
902 TRUE, /* pc_relative */
903 0, /* bitpos */
904 complain_overflow_dont, /* complain_on_overflow */
905 bfd_elf_generic_reloc, /* special_function */
906 AARCH64_R_STR (MOVW_PREL_G2_NC), /* name */
907 FALSE, /* partial_inplace */
908 0xffff, /* src_mask */
909 0xffff, /* dst_mask */
910 TRUE), /* pcrel_offset */
911
912 /* MOV[NZ]: ((S+A-P) >> 48) & 0xffff */
913 HOWTO64 (AARCH64_R (MOVW_PREL_G3), /* type */
914 48, /* rightshift */
915 2, /* size (0 = byte, 1 = short, 2 = long) */
916 16, /* bitsize */
917 TRUE, /* pc_relative */
918 0, /* bitpos */
919 complain_overflow_dont, /* complain_on_overflow */
920 bfd_elf_generic_reloc, /* special_function */
921 AARCH64_R_STR (MOVW_PREL_G3), /* name */
922 FALSE, /* partial_inplace */
923 0xffff, /* src_mask */
924 0xffff, /* dst_mask */
925 TRUE), /* pcrel_offset */
926
1408e112
MM		 927 /* Relocations to get the size of a symbol. Used for Morello. */
928 /* MOVZ: ((S+A) >> 0) & 0xffff */
929 HOWTO64 (MORELLO_R (MOVW_SIZE_G0), /* type */
930 0, /* rightshift */
931 2, /* size (0 = byte, 1 = short, 2 = long) */
932 16, /* bitsize */
933 FALSE, /* pc_relative */
934 0, /* bitpos */
935 complain_overflow_unsigned, /* complain_on_overflow */
936 bfd_elf_generic_reloc, /* special_function */
937 MORELLO_R_STR (MOVW_SIZE_G0), /* name */
938 FALSE, /* partial_inplace */
939 0xffff, /* src_mask */
940 0xffff, /* dst_mask */
941 FALSE), /* pcrel_offset */
942
943 /* MOVK: ((S+A) >> 0) & 0xffff [no overflow check] */
944 HOWTO64 (MORELLO_R (MOVW_SIZE_G0_NC), /* type */
945 0, /* rightshift */
946 2, /* size (0 = byte, 1 = short, 2 = long) */
947 16, /* bitsize */
948 FALSE, /* pc_relative */
949 0, /* bitpos */
950 complain_overflow_dont, /* complain_on_overflow */
951 bfd_elf_generic_reloc, /* special_function */
952 MORELLO_R_STR (MOVW_SIZE_G0_NC), /* name */
953 FALSE, /* partial_inplace */
954 0xffff, /* src_mask */
955 0xffff, /* dst_mask */
956 FALSE), /* pcrel_offset */
957
958 /* MOVZ: ((S+A) >> 16) & 0xffff */
959 HOWTO64 (MORELLO_R (MOVW_SIZE_G1), /* type */
960 16, /* rightshift */
961 2, /* size (0 = byte, 1 = short, 2 = long) */
962 16, /* bitsize */
963 FALSE, /* pc_relative */
964 0, /* bitpos */
965 complain_overflow_unsigned, /* complain_on_overflow */
966 bfd_elf_generic_reloc, /* special_function */
967 MORELLO_R_STR (MOVW_SIZE_G1), /* name */
968 FALSE, /* partial_inplace */
969 0xffff, /* src_mask */
970 0xffff, /* dst_mask */
971 FALSE), /* pcrel_offset */
972
973 /* MOVK: ((S+A) >> 16) & 0xffff [no overflow check] */
974 HOWTO64 (MORELLO_R (MOVW_SIZE_G1_NC), /* type */
975 16, /* rightshift */
976 2, /* size (0 = byte, 1 = short, 2 = long) */
977 16, /* bitsize */
978 FALSE, /* pc_relative */
979 0, /* bitpos */
980 complain_overflow_dont, /* complain_on_overflow */
981 bfd_elf_generic_reloc, /* special_function */
982 MORELLO_R_STR (MOVW_SIZE_G1_NC), /* name */
983 FALSE, /* partial_inplace */
984 0xffff, /* src_mask */
985 0xffff, /* dst_mask */
986 FALSE), /* pcrel_offset */
987
988 /* MOVZ: ((S+A) >> 32) & 0xffff */
989 HOWTO64 (MORELLO_R (MOVW_SIZE_G2), /* type */
990 32, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 16, /* bitsize */
993 FALSE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_unsigned, /* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 MORELLO_R_STR (MOVW_SIZE_G2), /* name */
998 FALSE, /* partial_inplace */
999 0xffff, /* src_mask */
1000 0xffff, /* dst_mask */
1001 FALSE), /* pcrel_offset */
1002
1003 /* MOVK: ((S+A) >> 32) & 0xffff [no overflow check] */
1004 HOWTO64 (MORELLO_R (MOVW_SIZE_G2_NC), /* type */
1005 32, /* rightshift */
1006 2, /* size (0 = byte, 1 = short, 2 = long) */
1007 16, /* bitsize */
1008 FALSE, /* pc_relative */
1009 0, /* bitpos */
1010 complain_overflow_dont, /* complain_on_overflow */
1011 bfd_elf_generic_reloc, /* special_function */
1012 MORELLO_R_STR (MOVW_SIZE_G2_NC), /* name */
1013 FALSE, /* partial_inplace */
1014 0xffff, /* src_mask */
1015 0xffff, /* dst_mask */
1016 FALSE), /* pcrel_offset */
1017
1018 /* MOVZ: ((S+A) >> 48) & 0xffff */
1019 HOWTO64 (MORELLO_R (MOVW_SIZE_G3), /* type */
1020 48, /* rightshift */
1021 2, /* size (0 = byte, 1 = short, 2 = long) */
1022 16, /* bitsize */
1023 FALSE, /* pc_relative */
1024 0, /* bitpos */
1025 complain_overflow_unsigned, /* complain_on_overflow */
1026 bfd_elf_generic_reloc, /* special_function */
1027 MORELLO_R_STR (MOVW_SIZE_G3), /* name */
1028 FALSE, /* partial_inplace */
1029 0xffff, /* src_mask */
1030 0xffff, /* dst_mask */
1031 FALSE), /* pcrel_offset */
1032
a06ea964
NC		 1033/* Relocations to generate 19, 21 and 33 bit PC-relative load/store
1034 addresses: PG(x) is (x & ~0xfff). */
1035
f7d2c675
SP		 1036 /* LD-lit: ((S+A-P) >> 4) & 0x1ffff */
1037 HOWTO64 (MORELLO_R (LD_PREL_LO17), /* type */
1038 4, /* rightshift */
1039 2, /* size (0 = byte, 1 = short, 2 = long) */
1040 17, /* bitsize */
1041 TRUE, /* pc_relative */
1042 0, /* bitpos */
1043 complain_overflow_signed, /* complain_on_overflow */
1044 bfd_elf_generic_reloc, /* special_function */
1045 MORELLO_R_STR (LD_PREL_LO17), /* name */
1046 FALSE, /* partial_inplace */
1047 0x1ffff, /* src_mask */
1048 0x1ffff, /* dst_mask */
1049 TRUE), /* pcrel_offset */
1050
a06ea964 1051 /* LD-lit: ((S+A-P) >> 2) & 0x7ffff */
a6bb11b2 1052 HOWTO (AARCH64_R (LD_PREL_LO19), /* type */
a06ea964
NC		 1053 2, /* rightshift */
1054 2, /* size (0 = byte, 1 = short, 2 = long) */
1055 19, /* bitsize */
1056 TRUE, /* pc_relative */
1057 0, /* bitpos */
1058 complain_overflow_signed, /* complain_on_overflow */
1059 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1060 AARCH64_R_STR (LD_PREL_LO19), /* name */
a06ea964
NC		 1061 FALSE, /* partial_inplace */
1062 0x7ffff, /* src_mask */
1063 0x7ffff, /* dst_mask */
1064 TRUE), /* pcrel_offset */
1065
92504105
SP		 1066 /* C64 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0xfffff */
1067 HOWTO64 (MORELLO_R (ADR_PREL_PG_HI20), /* type */
1068 12, /* rightshift */
1069 2, /* size (0 = byte, 1 = short, 2 = long) */
1070 20, /* bitsize */
1071 TRUE, /* pc_relative */
1072 0, /* bitpos */
1073 complain_overflow_signed, /* complain_on_overflow */
1074 bfd_elf_generic_reloc, /* special_function */
1075 MORELLO_R_STR (ADR_PREL_PG_HI20), /* name */
1076 FALSE, /* partial_inplace */
1077 0xfffff, /* src_mask */
1078 0xfffff, /* dst_mask */
1079 TRUE), /* pcrel_offset */
1080
1081 /* C64 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0xfffff [no overflow check] */
1082 HOWTO64 (MORELLO_R (ADR_PREL_PG_HI20_NC), /* type */
1083 12, /* rightshift */
1084 2, /* size (0 = byte, 1 = short, 2 = long) */
1085 20, /* bitsize */
1086 TRUE, /* pc_relative */
1087 0, /* bitpos */
1088 complain_overflow_dont, /* complain_on_overflow */
1089 bfd_elf_generic_reloc, /* special_function */
1090 MORELLO_R_STR (ADR_PREL_PG_HI20_NC), /* name */
1091 FALSE, /* partial_inplace */
1092 0xfffff, /* src_mask */
1093 0xfffff, /* dst_mask */
1094 TRUE), /* pcrel_offset */
1095
a06ea964 1096 /* ADR: (S+A-P) & 0x1fffff */
a6bb11b2 1097 HOWTO (AARCH64_R (ADR_PREL_LO21), /* type */
a06ea964
NC		 1098 0, /* rightshift */
1099 2, /* size (0 = byte, 1 = short, 2 = long) */
1100 21, /* bitsize */
1101 TRUE, /* pc_relative */
1102 0, /* bitpos */
1103 complain_overflow_signed, /* complain_on_overflow */
1104 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1105 AARCH64_R_STR (ADR_PREL_LO21), /* name */
a06ea964
NC		 1106 FALSE, /* partial_inplace */
1107 0x1fffff, /* src_mask */
1108 0x1fffff, /* dst_mask */
1109 TRUE), /* pcrel_offset */
1110
1111 /* ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
a6bb11b2 1112 HOWTO (AARCH64_R (ADR_PREL_PG_HI21), /* type */
a06ea964
NC		 1113 12, /* rightshift */
1114 2, /* size (0 = byte, 1 = short, 2 = long) */
1115 21, /* bitsize */
1116 TRUE, /* pc_relative */
1117 0, /* bitpos */
1118 complain_overflow_signed, /* complain_on_overflow */
1119 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1120 AARCH64_R_STR (ADR_PREL_PG_HI21), /* name */
a06ea964
NC		 1121 FALSE, /* partial_inplace */
1122 0x1fffff, /* src_mask */
1123 0x1fffff, /* dst_mask */
1124 TRUE), /* pcrel_offset */
1125
1126 /* ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff [no overflow check] */
a6bb11b2 1127 HOWTO64 (AARCH64_R (ADR_PREL_PG_HI21_NC), /* type */
a06ea964
NC		 1128 12, /* rightshift */
1129 2, /* size (0 = byte, 1 = short, 2 = long) */
1130 21, /* bitsize */
1131 TRUE, /* pc_relative */
1132 0, /* bitpos */
1133 complain_overflow_dont, /* complain_on_overflow */
1134 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1135 AARCH64_R_STR (ADR_PREL_PG_HI21_NC), /* name */
a06ea964
NC		 1136 FALSE, /* partial_inplace */
1137 0x1fffff, /* src_mask */
1138 0x1fffff, /* dst_mask */
1139 TRUE), /* pcrel_offset */
1140
1141 /* ADD: (S+A) & 0xfff [no overflow check] */
a6bb11b2 1142 HOWTO (AARCH64_R (ADD_ABS_LO12_NC), /* type */
a06ea964
NC		 1143 0, /* rightshift */
1144 2, /* size (0 = byte, 1 = short, 2 = long) */
1145 12, /* bitsize */
1146 FALSE, /* pc_relative */
1147 10, /* bitpos */
1148 complain_overflow_dont, /* complain_on_overflow */
1149 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1150 AARCH64_R_STR (ADD_ABS_LO12_NC), /* name */
a06ea964
NC		 1151 FALSE, /* partial_inplace */
1152 0x3ffc00, /* src_mask */
1153 0x3ffc00, /* dst_mask */
1154 FALSE), /* pcrel_offset */
1155
1156 /* LD/ST8: (S+A) & 0xfff */
a6bb11b2 1157 HOWTO (AARCH64_R (LDST8_ABS_LO12_NC), /* type */
a06ea964
NC		 1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 12, /* bitsize */
1161 FALSE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont, /* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1165 AARCH64_R_STR (LDST8_ABS_LO12_NC), /* name */
a06ea964
NC		 1166 FALSE, /* partial_inplace */
1167 0xfff, /* src_mask */
1168 0xfff, /* dst_mask */
1169 FALSE), /* pcrel_offset */
1170
1171 /* Relocations for control-flow instructions. */
1172
1173 /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff */
a6bb11b2 1174 HOWTO (AARCH64_R (TSTBR14), /* type */
a06ea964
NC		 1175 2, /* rightshift */
1176 2, /* size (0 = byte, 1 = short, 2 = long) */
1177 14, /* bitsize */
1178 TRUE, /* pc_relative */
1179 0, /* bitpos */
1180 complain_overflow_signed, /* complain_on_overflow */
1181 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1182 AARCH64_R_STR (TSTBR14), /* name */
a06ea964
NC		 1183 FALSE, /* partial_inplace */
1184 0x3fff, /* src_mask */
1185 0x3fff, /* dst_mask */
1186 TRUE), /* pcrel_offset */
1187
1188 /* B.cond: ((S+A-P) >> 2) & 0x7ffff */
a6bb11b2 1189 HOWTO (AARCH64_R (CONDBR19), /* type */
a06ea964
NC		 1190 2, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 19, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_signed, /* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1197 AARCH64_R_STR (CONDBR19), /* name */
a06ea964
NC		 1198 FALSE, /* partial_inplace */
1199 0x7ffff, /* src_mask */
1200 0x7ffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
a06ea964 1203 /* B: ((S+A-P) >> 2) & 0x3ffffff */
a6bb11b2 1204 HOWTO (AARCH64_R (JUMP26), /* type */
a06ea964
NC		 1205 2, /* rightshift */
1206 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 26, /* bitsize */
1208 TRUE, /* pc_relative */
1209 0, /* bitpos */
1210 complain_overflow_signed, /* complain_on_overflow */
1211 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1212 AARCH64_R_STR (JUMP26), /* name */
a06ea964
NC		 1213 FALSE, /* partial_inplace */
1214 0x3ffffff, /* src_mask */
1215 0x3ffffff, /* dst_mask */
1216 TRUE), /* pcrel_offset */
1217
1218 /* BL: ((S+A-P) >> 2) & 0x3ffffff */
a6bb11b2 1219 HOWTO (AARCH64_R (CALL26), /* type */
a06ea964
NC		 1220 2, /* rightshift */
1221 2, /* size (0 = byte, 1 = short, 2 = long) */
1222 26, /* bitsize */
1223 TRUE, /* pc_relative */
1224 0, /* bitpos */
1225 complain_overflow_signed, /* complain_on_overflow */
1226 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1227 AARCH64_R_STR (CALL26), /* name */
a06ea964
NC		 1228 FALSE, /* partial_inplace */
1229 0x3ffffff, /* src_mask */
1230 0x3ffffff, /* dst_mask */
1231 TRUE), /* pcrel_offset */
1232
e19e9199
SP		 1233 /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff */
1234 HOWTO64 (MORELLO_R (TSTBR14), /* type */
1235 2, /* rightshift */
1236 2, /* size (0 = byte, 1 = short, 2 = long) */
1237 14, /* bitsize */
1238 TRUE, /* pc_relative */
1239 0, /* bitpos */
1240 complain_overflow_signed, /* complain_on_overflow */
1241 bfd_elf_generic_reloc, /* special_function */
1242 MORELLO_R_STR (TSTBR14), /* name */
1243 FALSE, /* partial_inplace */
1244 0x3fff, /* src_mask */
1245 0x3fff, /* dst_mask */
1246 TRUE), /* pcrel_offset */
1247
1248 /* B.cond: ((S+A-P) >> 2) & 0x7ffff */
1249 HOWTO64 (MORELLO_R (CONDBR19), /* type */
1250 2, /* rightshift */
1251 2, /* size (0 = byte, 1 = short, 2 = long) */
1252 19, /* bitsize */
1253 TRUE, /* pc_relative */
1254 0, /* bitpos */
1255 complain_overflow_signed, /* complain_on_overflow */
1256 bfd_elf_generic_reloc, /* special_function */
1257 MORELLO_R_STR (CONDBR19), /* name */
1258 FALSE, /* partial_inplace */
1259 0x7ffff, /* src_mask */
1260 0x7ffff, /* dst_mask */
1261 TRUE), /* pcrel_offset */
1262
1263 /* B: ((S+A-P) >> 2) & 0x3ffffff */
1264 HOWTO64 (MORELLO_R (JUMP26), /* type */
1265 2, /* rightshift */
1266 2, /* size (0 = byte, 1 = short, 2 = long) */
1267 26, /* bitsize */
1268 TRUE, /* pc_relative */
1269 0, /* bitpos */
1270 complain_overflow_signed, /* complain_on_overflow */
1271 bfd_elf_generic_reloc, /* special_function */
1272 MORELLO_R_STR (JUMP26), /* name */
1273 FALSE, /* partial_inplace */
1274 0x3ffffff, /* src_mask */
1275 0x3ffffff, /* dst_mask */
1276 TRUE), /* pcrel_offset */
1277
1278 /* BL: ((S+A-P) >> 2) & 0x3ffffff */
1279 HOWTO64 (MORELLO_R (CALL26), /* type */
1280 2, /* rightshift */
1281 2, /* size (0 = byte, 1 = short, 2 = long) */
1282 26, /* bitsize */
1283 TRUE, /* pc_relative */
1284 0, /* bitpos */
1285 complain_overflow_signed, /* complain_on_overflow */
1286 bfd_elf_generic_reloc, /* special_function */
1287 MORELLO_R_STR (CALL26), /* name */
1288 FALSE, /* partial_inplace */
1289 0x3ffffff, /* src_mask */
1290 0x3ffffff, /* dst_mask */
1291 TRUE), /* pcrel_offset */
1292
a06ea964 1293 /* LD/ST16: (S+A) & 0xffe */
a6bb11b2 1294 HOWTO (AARCH64_R (LDST16_ABS_LO12_NC), /* type */
a06ea964
NC		 1295 1, /* rightshift */
1296 2, /* size (0 = byte, 1 = short, 2 = long) */
1297 12, /* bitsize */
1298 FALSE, /* pc_relative */
1299 0, /* bitpos */
1300 complain_overflow_dont, /* complain_on_overflow */
1301 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1302 AARCH64_R_STR (LDST16_ABS_LO12_NC), /* name */
a06ea964
NC		 1303 FALSE, /* partial_inplace */
1304 0xffe, /* src_mask */
1305 0xffe, /* dst_mask */
1306 FALSE), /* pcrel_offset */
1307
1308 /* LD/ST32: (S+A) & 0xffc */
a6bb11b2 1309 HOWTO (AARCH64_R (LDST32_ABS_LO12_NC), /* type */
a06ea964
NC		 1310 2, /* rightshift */
1311 2, /* size (0 = byte, 1 = short, 2 = long) */
1312 12, /* bitsize */
1313 FALSE, /* pc_relative */
1314 0, /* bitpos */
1315 complain_overflow_dont, /* complain_on_overflow */
1316 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1317 AARCH64_R_STR (LDST32_ABS_LO12_NC), /* name */
a06ea964
NC		 1318 FALSE, /* partial_inplace */
1319 0xffc, /* src_mask */
1320 0xffc, /* dst_mask */
1321 FALSE), /* pcrel_offset */
1322
1323 /* LD/ST64: (S+A) & 0xff8 */
a6bb11b2 1324 HOWTO (AARCH64_R (LDST64_ABS_LO12_NC), /* type */
a06ea964
NC		 1325 3, /* rightshift */
1326 2, /* size (0 = byte, 1 = short, 2 = long) */
1327 12, /* bitsize */
1328 FALSE, /* pc_relative */
1329 0, /* bitpos */
1330 complain_overflow_dont, /* complain_on_overflow */
1331 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1332 AARCH64_R_STR (LDST64_ABS_LO12_NC), /* name */
a06ea964
NC		 1333 FALSE, /* partial_inplace */
1334 0xff8, /* src_mask */
1335 0xff8, /* dst_mask */
1336 FALSE), /* pcrel_offset */
1337
a06ea964 1338 /* LD/ST128: (S+A) & 0xff0 */
a6bb11b2 1339 HOWTO (AARCH64_R (LDST128_ABS_LO12_NC), /* type */
a06ea964
NC		 1340 4, /* rightshift */
1341 2, /* size (0 = byte, 1 = short, 2 = long) */
1342 12, /* bitsize */
1343 FALSE, /* pc_relative */
1344 0, /* bitpos */
1345 complain_overflow_dont, /* complain_on_overflow */
1346 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1347 AARCH64_R_STR (LDST128_ABS_LO12_NC), /* name */
a06ea964
NC		 1348 FALSE, /* partial_inplace */
1349 0xff0, /* src_mask */
1350 0xff0, /* dst_mask */
1351 FALSE), /* pcrel_offset */
1352
f41aef5f
RE		 1353 /* Set a load-literal immediate field to bits
1354 0x1FFFFC of G(S)-P */
a6bb11b2 1355 HOWTO (AARCH64_R (GOT_LD_PREL19), /* type */
f41aef5f
RE		 1356 2, /* rightshift */
1357 2, /* size (0 = byte,1 = short,2 = long) */
1358 19, /* bitsize */
1359 TRUE, /* pc_relative */
1360 0, /* bitpos */
1361 complain_overflow_signed, /* complain_on_overflow */
1362 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1363 AARCH64_R_STR (GOT_LD_PREL19), /* name */
f41aef5f
RE		 1364 FALSE, /* partial_inplace */
1365 0xffffe0, /* src_mask */
1366 0xffffe0, /* dst_mask */
1367 TRUE), /* pcrel_offset */
1368
a06ea964
NC		 1369 /* Get to the page for the GOT entry for the symbol
1370 (G(S) - P) using an ADRP instruction. */
a6bb11b2 1371 HOWTO (AARCH64_R (ADR_GOT_PAGE), /* type */
a06ea964
NC		 1372 12, /* rightshift */
1373 2, /* size (0 = byte, 1 = short, 2 = long) */
1374 21, /* bitsize */
1375 TRUE, /* pc_relative */
1376 0, /* bitpos */
1377 complain_overflow_dont, /* complain_on_overflow */
1378 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1379 AARCH64_R_STR (ADR_GOT_PAGE), /* name */
a06ea964
NC		 1380 FALSE, /* partial_inplace */
1381 0x1fffff, /* src_mask */
1382 0x1fffff, /* dst_mask */
1383 TRUE), /* pcrel_offset */
1384
92504105
SP		 1385 /* Get to the page for the GOT entry for the symbol
1386 (G(S) - P) using a C64 ADRP instruction. */
1387 HOWTO64 (MORELLO_R (ADR_GOT_PAGE), /* type */
1388 12, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 20, /* bitsize */
1391 TRUE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_dont, /* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 MORELLO_R_STR (ADR_GOT_PAGE), /* name */
1396 FALSE, /* partial_inplace */
1397 0xfffff, /* src_mask */
1398 0xfffff, /* dst_mask */
1399 TRUE), /* pcrel_offset */
1400
a6bb11b2
YZ		 1401 /* LD64: GOT offset G(S) & 0xff8 */
1402 HOWTO64 (AARCH64_R (LD64_GOT_LO12_NC), /* type */
a06ea964
NC		 1403 3, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 12, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_dont, /* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1410 AARCH64_R_STR (LD64_GOT_LO12_NC), /* name */
a06ea964
NC		 1411 FALSE, /* partial_inplace */
1412 0xff8, /* src_mask */
1413 0xff8, /* dst_mask */
a6bb11b2 1414 FALSE), /* pcrel_offset */
a06ea964 1415
a1bdea65
SP		 1416 /* LD128: GOT offset G(S) & 0xff0 */
1417 HOWTO64 (MORELLO_R (LD128_GOT_LO12_NC), /* type */
1418 4, /* rightshift */
1419 2, /* size (0 = byte, 1 = short, 2 = long) */
1420 12, /* bitsize */
1421 FALSE, /* pc_relative */
1422 0, /* bitpos */
1423 complain_overflow_dont, /* complain_on_overflow */
1424 bfd_elf_generic_reloc, /* special_function */
1425 MORELLO_R_STR (LD128_GOT_LO12_NC), /* name */
1426 FALSE, /* partial_inplace */
1427 0xff0, /* src_mask */
1428 0xff0, /* dst_mask */
1429 FALSE), /* pcrel_offset */
1430
a6bb11b2
YZ		 1431 /* LD32: GOT offset G(S) & 0xffc */
1432 HOWTO32 (AARCH64_R (LD32_GOT_LO12_NC), /* type */
1433 2, /* rightshift */
1434 2, /* size (0 = byte, 1 = short, 2 = long) */
1435 12, /* bitsize */
1436 FALSE, /* pc_relative */
1437 0, /* bitpos */
1438 complain_overflow_dont, /* complain_on_overflow */
1439 bfd_elf_generic_reloc, /* special_function */
1440 AARCH64_R_STR (LD32_GOT_LO12_NC), /* name */
1441 FALSE, /* partial_inplace */
1442 0xffc, /* src_mask */
1443 0xffc, /* dst_mask */
1444 FALSE), /* pcrel_offset */
a06ea964 1445
ca632371
RL		 1446 /* Lower 16 bits of GOT offset for the symbol. */
1447 HOWTO64 (AARCH64_R (MOVW_GOTOFF_G0_NC), /* type */
1448 0, /* rightshift */
1449 2, /* size (0 = byte, 1 = short, 2 = long) */
1450 16, /* bitsize */
1451 FALSE, /* pc_relative */
1452 0, /* bitpos */
1453 complain_overflow_dont, /* complain_on_overflow */
1454 bfd_elf_generic_reloc, /* special_function */
1455 AARCH64_R_STR (MOVW_GOTOFF_G0_NC), /* name */
1456 FALSE, /* partial_inplace */
1457 0xffff, /* src_mask */
1458 0xffff, /* dst_mask */
1459 FALSE), /* pcrel_offset */
1460
654248e7
RL		 1461 /* Higher 16 bits of GOT offset for the symbol. */
1462 HOWTO64 (AARCH64_R (MOVW_GOTOFF_G1), /* type */
1463 16, /* rightshift */
1464 2, /* size (0 = byte, 1 = short, 2 = long) */
1465 16, /* bitsize */
1466 FALSE, /* pc_relative */
1467 0, /* bitpos */
1468 complain_overflow_unsigned, /* complain_on_overflow */
1469 bfd_elf_generic_reloc, /* special_function */
1470 AARCH64_R_STR (MOVW_GOTOFF_G1), /* name */
1471 FALSE, /* partial_inplace */
1472 0xffff, /* src_mask */
1473 0xffff, /* dst_mask */
1474 FALSE), /* pcrel_offset */
1475
87f5fbcc
RL		 1476 /* LD64: GOT offset for the symbol. */
1477 HOWTO64 (AARCH64_R (LD64_GOTOFF_LO15), /* type */
1478 3, /* rightshift */
1479 2, /* size (0 = byte, 1 = short, 2 = long) */
1480 12, /* bitsize */
1481 FALSE, /* pc_relative */
1482 0, /* bitpos */
1483 complain_overflow_unsigned, /* complain_on_overflow */
1484 bfd_elf_generic_reloc, /* special_function */
1485 AARCH64_R_STR (LD64_GOTOFF_LO15), /* name */
1486 FALSE, /* partial_inplace */
1487 0x7ff8, /* src_mask */
1488 0x7ff8, /* dst_mask */
1489 FALSE), /* pcrel_offset */
1490
3d715ce4
JW		 1491 /* LD32: GOT offset to the page address of GOT table.
1492 (G(S) - PAGE (_GLOBAL_OFFSET_TABLE_)) & 0x5ffc. */
1493 HOWTO32 (AARCH64_R (LD32_GOTPAGE_LO14), /* type */
1494 2, /* rightshift */
1495 2, /* size (0 = byte, 1 = short, 2 = long) */
1496 12, /* bitsize */
1497 FALSE, /* pc_relative */
1498 0, /* bitpos */
1499 complain_overflow_unsigned, /* complain_on_overflow */
1500 bfd_elf_generic_reloc, /* special_function */
1501 AARCH64_R_STR (LD32_GOTPAGE_LO14), /* name */
1502 FALSE, /* partial_inplace */
1503 0x5ffc, /* src_mask */
1504 0x5ffc, /* dst_mask */
1505 FALSE), /* pcrel_offset */
1506
a921b5bd
JW		 1507 /* LD64: GOT offset to the page address of GOT table.
1508 (G(S) - PAGE (_GLOBAL_OFFSET_TABLE_)) & 0x7ff8. */
1509 HOWTO64 (AARCH64_R (LD64_GOTPAGE_LO15), /* type */
1510 3, /* rightshift */
1511 2, /* size (0 = byte, 1 = short, 2 = long) */
1512 12, /* bitsize */
1513 FALSE, /* pc_relative */
1514 0, /* bitpos */
1515 complain_overflow_unsigned, /* complain_on_overflow */
1516 bfd_elf_generic_reloc, /* special_function */
1517 AARCH64_R_STR (LD64_GOTPAGE_LO15), /* name */
1518 FALSE, /* partial_inplace */
1519 0x7ff8, /* src_mask */
1520 0x7ff8, /* dst_mask */
1521 FALSE), /* pcrel_offset */
1522
a06ea964
NC		 1523 /* Get to the page for the GOT entry for the symbol
1524 (G(S) - P) using an ADRP instruction. */
a6bb11b2 1525 HOWTO (AARCH64_R (TLSGD_ADR_PAGE21), /* type */
a06ea964
NC		 1526 12, /* rightshift */
1527 2, /* size (0 = byte, 1 = short, 2 = long) */
1528 21, /* bitsize */
1529 TRUE, /* pc_relative */
1530 0, /* bitpos */
1531 complain_overflow_dont, /* complain_on_overflow */
1532 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1533 AARCH64_R_STR (TLSGD_ADR_PAGE21), /* name */
a06ea964
NC		 1534 FALSE, /* partial_inplace */
1535 0x1fffff, /* src_mask */
1536 0x1fffff, /* dst_mask */
1537 TRUE), /* pcrel_offset */
1538
3c12b054
MS		 1539 HOWTO (AARCH64_R (TLSGD_ADR_PREL21), /* type */
1540 0, /* rightshift */
1541 2, /* size (0 = byte, 1 = short, 2 = long) */
1542 21, /* bitsize */
1543 TRUE, /* pc_relative */
1544 0, /* bitpos */
1545 complain_overflow_dont, /* complain_on_overflow */
1546 bfd_elf_generic_reloc, /* special_function */
1547 AARCH64_R_STR (TLSGD_ADR_PREL21), /* name */
1548 FALSE, /* partial_inplace */
1549 0x1fffff, /* src_mask */
1550 0x1fffff, /* dst_mask */
1551 TRUE), /* pcrel_offset */
1552
a06ea964 1553 /* ADD: GOT offset G(S) & 0xff8 [no overflow check] */
a6bb11b2 1554 HOWTO (AARCH64_R (TLSGD_ADD_LO12_NC), /* type */
a06ea964
NC		 1555 0, /* rightshift */
1556 2, /* size (0 = byte, 1 = short, 2 = long) */
1557 12, /* bitsize */
1558 FALSE, /* pc_relative */
1559 0, /* bitpos */
1560 complain_overflow_dont, /* complain_on_overflow */
1561 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1562 AARCH64_R_STR (TLSGD_ADD_LO12_NC), /* name */
a06ea964
NC		 1563 FALSE, /* partial_inplace */
1564 0xfff, /* src_mask */
1565 0xfff, /* dst_mask */
1566 FALSE), /* pcrel_offset */
1567
3e8286c0
RL		 1568 /* Lower 16 bits of GOT offset to tls_index. */
1569 HOWTO64 (AARCH64_R (TLSGD_MOVW_G0_NC), /* type */
1570 0, /* rightshift */
1571 2, /* size (0 = byte, 1 = short, 2 = long) */
1572 16, /* bitsize */
1573 FALSE, /* pc_relative */
1574 0, /* bitpos */
1575 complain_overflow_dont, /* complain_on_overflow */
1576 bfd_elf_generic_reloc, /* special_function */
1577 AARCH64_R_STR (TLSGD_MOVW_G0_NC), /* name */
1578 FALSE, /* partial_inplace */
1579 0xffff, /* src_mask */
1580 0xffff, /* dst_mask */
1581 FALSE), /* pcrel_offset */
1582
1aa66fb1
RL		 1583 /* Higher 16 bits of GOT offset to tls_index. */
1584 HOWTO64 (AARCH64_R (TLSGD_MOVW_G1), /* type */
1585 16, /* rightshift */
1586 2, /* size (0 = byte, 1 = short, 2 = long) */
1587 16, /* bitsize */
1588 FALSE, /* pc_relative */
1589 0, /* bitpos */
1590 complain_overflow_unsigned, /* complain_on_overflow */
1591 bfd_elf_generic_reloc, /* special_function */
1592 AARCH64_R_STR (TLSGD_MOVW_G1), /* name */
1593 FALSE, /* partial_inplace */
1594 0xffff, /* src_mask */
1595 0xffff, /* dst_mask */
1596 FALSE), /* pcrel_offset */
1597
a6bb11b2 1598 HOWTO (AARCH64_R (TLSIE_ADR_GOTTPREL_PAGE21), /* type */
a06ea964
NC		 1599 12, /* rightshift */
1600 2, /* size (0 = byte, 1 = short, 2 = long) */
1601 21, /* bitsize */
1602 FALSE, /* pc_relative */
1603 0, /* bitpos */
1604 complain_overflow_dont, /* complain_on_overflow */
1605 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1606 AARCH64_R_STR (TLSIE_ADR_GOTTPREL_PAGE21), /* name */
a06ea964
NC		 1607 FALSE, /* partial_inplace */
1608 0x1fffff, /* src_mask */
1609 0x1fffff, /* dst_mask */
1610 FALSE), /* pcrel_offset */
1611
a6bb11b2 1612 HOWTO64 (AARCH64_R (TLSIE_LD64_GOTTPREL_LO12_NC), /* type */
a06ea964
NC		 1613 3, /* rightshift */
1614 2, /* size (0 = byte, 1 = short, 2 = long) */
1615 12, /* bitsize */
1616 FALSE, /* pc_relative */
1617 0, /* bitpos */
1618 complain_overflow_dont, /* complain_on_overflow */
1619 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1620 AARCH64_R_STR (TLSIE_LD64_GOTTPREL_LO12_NC), /* name */
a06ea964
NC		 1621 FALSE, /* partial_inplace */
1622 0xff8, /* src_mask */
1623 0xff8, /* dst_mask */
1624 FALSE), /* pcrel_offset */
1625
a6bb11b2
YZ		 1626 HOWTO32 (AARCH64_R (TLSIE_LD32_GOTTPREL_LO12_NC), /* type */
1627 2, /* rightshift */
1628 2, /* size (0 = byte, 1 = short, 2 = long) */
1629 12, /* bitsize */
1630 FALSE, /* pc_relative */
1631 0, /* bitpos */
1632 complain_overflow_dont, /* complain_on_overflow */
1633 bfd_elf_generic_reloc, /* special_function */
1634 AARCH64_R_STR (TLSIE_LD32_GOTTPREL_LO12_NC), /* name */
1635 FALSE, /* partial_inplace */
1636 0xffc, /* src_mask */
1637 0xffc, /* dst_mask */
1638 FALSE), /* pcrel_offset */
1639
1640 HOWTO (AARCH64_R (TLSIE_LD_GOTTPREL_PREL19), /* type */
bb3f9ed8 1641 2, /* rightshift */
a06ea964 1642 2, /* size (0 = byte, 1 = short, 2 = long) */
043bf05a 1643 19, /* bitsize */
a06ea964
NC		 1644 FALSE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_dont, /* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1648 AARCH64_R_STR (TLSIE_LD_GOTTPREL_PREL19), /* name */
a06ea964
NC		 1649 FALSE, /* partial_inplace */
1650 0x1ffffc, /* src_mask */
1651 0x1ffffc, /* dst_mask */
1652 FALSE), /* pcrel_offset */
1653
3b957e5b
RL		 1654 HOWTO64 (AARCH64_R (TLSIE_MOVW_GOTTPREL_G0_NC), /* type */
1655 0, /* rightshift */
1656 2, /* size (0 = byte, 1 = short, 2 = long) */
1657 16, /* bitsize */
1658 FALSE, /* pc_relative */
1659 0, /* bitpos */
1660 complain_overflow_dont, /* complain_on_overflow */
1661 bfd_elf_generic_reloc, /* special_function */
1662 AARCH64_R_STR (TLSIE_MOVW_GOTTPREL_G0_NC), /* name */
1663 FALSE, /* partial_inplace */
1664 0xffff, /* src_mask */
1665 0xffff, /* dst_mask */
1666 FALSE), /* pcrel_offset */
1667
1668 HOWTO64 (AARCH64_R (TLSIE_MOVW_GOTTPREL_G1), /* type */
1669 16, /* rightshift */
1670 2, /* size (0 = byte, 1 = short, 2 = long) */
1671 16, /* bitsize */
1672 FALSE, /* pc_relative */
1673 0, /* bitpos */
1674 complain_overflow_unsigned, /* complain_on_overflow */
1675 bfd_elf_generic_reloc, /* special_function */
1676 AARCH64_R_STR (TLSIE_MOVW_GOTTPREL_G1), /* name */
1677 FALSE, /* partial_inplace */
1678 0xffff, /* src_mask */
1679 0xffff, /* dst_mask */
1680 FALSE), /* pcrel_offset */
1681
49df5539
JW		 1682 /* ADD: bit[23:12] of byte offset to module TLS base address. */
1683 HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_HI12), /* type */
1684 12, /* rightshift */
1685 2, /* size (0 = byte, 1 = short, 2 = long) */
1686 12, /* bitsize */
1687 FALSE, /* pc_relative */
1688 0, /* bitpos */
1689 complain_overflow_unsigned, /* complain_on_overflow */
1690 bfd_elf_generic_reloc, /* special_function */
1691 AARCH64_R_STR (TLSLD_ADD_DTPREL_HI12), /* name */
1692 FALSE, /* partial_inplace */
1693 0xfff, /* src_mask */
1694 0xfff, /* dst_mask */
1695 FALSE), /* pcrel_offset */
1696
70151fb5
JW		 1697 /* Unsigned 12 bit byte offset to module TLS base address. */
1698 HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_LO12), /* type */
1699 0, /* rightshift */
1700 2, /* size (0 = byte, 1 = short, 2 = long) */
1701 12, /* bitsize */
1702 FALSE, /* pc_relative */
1703 0, /* bitpos */
1704 complain_overflow_unsigned, /* complain_on_overflow */
1705 bfd_elf_generic_reloc, /* special_function */
1706 AARCH64_R_STR (TLSLD_ADD_DTPREL_LO12), /* name */
1707 FALSE, /* partial_inplace */
1708 0xfff, /* src_mask */
1709 0xfff, /* dst_mask */
1710 FALSE), /* pcrel_offset */
13289c10
JW		 1711
1712 /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. */
1713 HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_LO12_NC), /* type */
1714 0, /* rightshift */
1715 2, /* size (0 = byte, 1 = short, 2 = long) */
1716 12, /* bitsize */
1717 FALSE, /* pc_relative */
1718 0, /* bitpos */
1719 complain_overflow_dont, /* complain_on_overflow */
1720 bfd_elf_generic_reloc, /* special_function */
1721 AARCH64_R_STR (TLSLD_ADD_DTPREL_LO12_NC), /* name */
1722 FALSE, /* partial_inplace */
1723 0xfff, /* src_mask */
1724 0xfff, /* dst_mask */
1725 FALSE), /* pcrel_offset */
70151fb5 1726
a12fad50
JW		 1727 /* ADD: GOT offset G(S) & 0xff8 [no overflow check] */
1728 HOWTO (AARCH64_R (TLSLD_ADD_LO12_NC), /* type */
1729 0, /* rightshift */
1730 2, /* size (0 = byte, 1 = short, 2 = long) */
1731 12, /* bitsize */
1732 FALSE, /* pc_relative */
1733 0, /* bitpos */
1734 complain_overflow_dont, /* complain_on_overflow */
1735 bfd_elf_generic_reloc, /* special_function */
1736 AARCH64_R_STR (TLSLD_ADD_LO12_NC), /* name */
1737 FALSE, /* partial_inplace */
1738 0xfff, /* src_mask */
1739 0xfff, /* dst_mask */
1740 FALSE), /* pcrel_offset */
1741
1107e076
JW		 1742 /* Get to the page for the GOT entry for the symbol
1743 (G(S) - P) using an ADRP instruction. */
1744 HOWTO (AARCH64_R (TLSLD_ADR_PAGE21), /* type */
1745 12, /* rightshift */
1746 2, /* size (0 = byte, 1 = short, 2 = long) */
1747 21, /* bitsize */
1748 TRUE, /* pc_relative */
1749 0, /* bitpos */
1750 complain_overflow_signed, /* complain_on_overflow */
1751 bfd_elf_generic_reloc, /* special_function */
1752 AARCH64_R_STR (TLSLD_ADR_PAGE21), /* name */
1753 FALSE, /* partial_inplace */
1754 0x1fffff, /* src_mask */
1755 0x1fffff, /* dst_mask */
1756 TRUE), /* pcrel_offset */
1757
6c37fedc
JW		 1758 HOWTO (AARCH64_R (TLSLD_ADR_PREL21), /* type */
1759 0, /* rightshift */
1760 2, /* size (0 = byte, 1 = short, 2 = long) */
1761 21, /* bitsize */
1762 TRUE, /* pc_relative */
1763 0, /* bitpos */
1764 complain_overflow_signed, /* complain_on_overflow */
1765 bfd_elf_generic_reloc, /* special_function */
1766 AARCH64_R_STR (TLSLD_ADR_PREL21), /* name */
1767 FALSE, /* partial_inplace */
1768 0x1fffff, /* src_mask */
1769 0x1fffff, /* dst_mask */
1770 TRUE), /* pcrel_offset */
1771
4c562523
JW		 1772 /* LD/ST16: bit[11:1] of byte offset to module TLS base address. */
1773 HOWTO64 (AARCH64_R (TLSLD_LDST16_DTPREL_LO12), /* type */
1774 1, /* rightshift */
1775 2, /* size (0 = byte, 1 = short, 2 = long) */
1776 11, /* bitsize */
1777 FALSE, /* pc_relative */
1778 10, /* bitpos */
1779 complain_overflow_unsigned, /* complain_on_overflow */
1780 bfd_elf_generic_reloc, /* special_function */
1781 AARCH64_R_STR (TLSLD_LDST16_DTPREL_LO12), /* name */
1782 FALSE, /* partial_inplace */
1783 0x1ffc00, /* src_mask */
1784 0x1ffc00, /* dst_mask */
1785 FALSE), /* pcrel_offset */
1786
1787 /* Same as BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, but no overflow check. */
1788 HOWTO64 (AARCH64_R (TLSLD_LDST16_DTPREL_LO12_NC), /* type */
1789 1, /* rightshift */
1790 2, /* size (0 = byte, 1 = short, 2 = long) */
1791 11, /* bitsize */
1792 FALSE, /* pc_relative */
1793 10, /* bitpos */
1794 complain_overflow_dont, /* complain_on_overflow */
1795 bfd_elf_generic_reloc, /* special_function */
1796 AARCH64_R_STR (TLSLD_LDST16_DTPREL_LO12_NC), /* name */
1797 FALSE, /* partial_inplace */
1798 0x1ffc00, /* src_mask */
1799 0x1ffc00, /* dst_mask */
1800 FALSE), /* pcrel_offset */
1801
1802 /* LD/ST32: bit[11:2] of byte offset to module TLS base address. */
1803 HOWTO64 (AARCH64_R (TLSLD_LDST32_DTPREL_LO12), /* type */
1804 2, /* rightshift */
1805 2, /* size (0 = byte, 1 = short, 2 = long) */
1806 10, /* bitsize */
1807 FALSE, /* pc_relative */
1808 10, /* bitpos */
1809 complain_overflow_unsigned, /* complain_on_overflow */
1810 bfd_elf_generic_reloc, /* special_function */
1811 AARCH64_R_STR (TLSLD_LDST32_DTPREL_LO12), /* name */
1812 FALSE, /* partial_inplace */
1813 0x3ffc00, /* src_mask */
1814 0x3ffc00, /* dst_mask */
1815 FALSE), /* pcrel_offset */
1816
1817 /* Same as BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, but no overflow check. */
1818 HOWTO64 (AARCH64_R (TLSLD_LDST32_DTPREL_LO12_NC), /* type */
1819 2, /* rightshift */
1820 2, /* size (0 = byte, 1 = short, 2 = long) */
1821 10, /* bitsize */
1822 FALSE, /* pc_relative */
1823 10, /* bitpos */
1824 complain_overflow_dont, /* complain_on_overflow */
1825 bfd_elf_generic_reloc, /* special_function */
1826 AARCH64_R_STR (TLSLD_LDST32_DTPREL_LO12_NC), /* name */
1827 FALSE, /* partial_inplace */
1828 0xffc00, /* src_mask */
1829 0xffc00, /* dst_mask */
1830 FALSE), /* pcrel_offset */
1831
1832 /* LD/ST64: bit[11:3] of byte offset to module TLS base address. */
1833 HOWTO64 (AARCH64_R (TLSLD_LDST64_DTPREL_LO12), /* type */
1834 3, /* rightshift */
1835 2, /* size (0 = byte, 1 = short, 2 = long) */
1836 9, /* bitsize */
1837 FALSE, /* pc_relative */
1838 10, /* bitpos */
1839 complain_overflow_unsigned, /* complain_on_overflow */
1840 bfd_elf_generic_reloc, /* special_function */
1841 AARCH64_R_STR (TLSLD_LDST64_DTPREL_LO12), /* name */
1842 FALSE, /* partial_inplace */
1843 0x3ffc00, /* src_mask */
1844 0x3ffc00, /* dst_mask */
1845 FALSE), /* pcrel_offset */
1846
1847 /* Same as BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, but no overflow check. */
1848 HOWTO64 (AARCH64_R (TLSLD_LDST64_DTPREL_LO12_NC), /* type */
1849 3, /* rightshift */
1850 2, /* size (0 = byte, 1 = short, 2 = long) */
1851 9, /* bitsize */
1852 FALSE, /* pc_relative */
1853 10, /* bitpos */
1854 complain_overflow_dont, /* complain_on_overflow */
1855 bfd_elf_generic_reloc, /* special_function */
1856 AARCH64_R_STR (TLSLD_LDST64_DTPREL_LO12_NC), /* name */
1857 FALSE, /* partial_inplace */
1858 0x7fc00, /* src_mask */
1859 0x7fc00, /* dst_mask */
1860 FALSE), /* pcrel_offset */
1861
1862 /* LD/ST8: bit[11:0] of byte offset to module TLS base address. */
1863 HOWTO64 (AARCH64_R (TLSLD_LDST8_DTPREL_LO12), /* type */
1864 0, /* rightshift */
1865 2, /* size (0 = byte, 1 = short, 2 = long) */
1866 12, /* bitsize */
1867 FALSE, /* pc_relative */
1868 10, /* bitpos */
1869 complain_overflow_unsigned, /* complain_on_overflow */
1870 bfd_elf_generic_reloc, /* special_function */
1871 AARCH64_R_STR (TLSLD_LDST8_DTPREL_LO12), /* name */
1872 FALSE, /* partial_inplace */
1873 0x3ffc00, /* src_mask */
1874 0x3ffc00, /* dst_mask */
1875 FALSE), /* pcrel_offset */
1876
1877 /* Same as BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, but no overflow check. */
1878 HOWTO64 (AARCH64_R (TLSLD_LDST8_DTPREL_LO12_NC), /* type */
1879 0, /* rightshift */
1880 2, /* size (0 = byte, 1 = short, 2 = long) */
1881 12, /* bitsize */
1882 FALSE, /* pc_relative */
1883 10, /* bitpos */
1884 complain_overflow_dont, /* complain_on_overflow */
1885 bfd_elf_generic_reloc, /* special_function */
1886 AARCH64_R_STR (TLSLD_LDST8_DTPREL_LO12_NC), /* name */
1887 FALSE, /* partial_inplace */
1888 0x3ffc00, /* src_mask */
1889 0x3ffc00, /* dst_mask */
1890 FALSE), /* pcrel_offset */
1891
49df5539
JW		 1892 /* MOVZ: bit[15:0] of byte offset to module TLS base address. */
1893 HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G0), /* type */
1894 0, /* rightshift */
1895 2, /* size (0 = byte, 1 = short, 2 = long) */
1896 16, /* bitsize */
1897 FALSE, /* pc_relative */
1898 0, /* bitpos */
1899 complain_overflow_unsigned, /* complain_on_overflow */
1900 bfd_elf_generic_reloc, /* special_function */
1901 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G0), /* name */
1902 FALSE, /* partial_inplace */
1903 0xffff, /* src_mask */
1904 0xffff, /* dst_mask */
1905 FALSE), /* pcrel_offset */
1906
1907 /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0. */
1908 HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G0_NC), /* type */
1909 0, /* rightshift */
1910 2, /* size (0 = byte, 1 = short, 2 = long) */
1911 16, /* bitsize */
1912 FALSE, /* pc_relative */
1913 0, /* bitpos */
1914 complain_overflow_dont, /* complain_on_overflow */
1915 bfd_elf_generic_reloc, /* special_function */
1916 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G0_NC), /* name */
1917 FALSE, /* partial_inplace */
1918 0xffff, /* src_mask */
1919 0xffff, /* dst_mask */
1920 FALSE), /* pcrel_offset */
1921
1922 /* MOVZ: bit[31:16] of byte offset to module TLS base address. */
1923 HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G1), /* type */
1924 16, /* rightshift */
1925 2, /* size (0 = byte, 1 = short, 2 = long) */
1926 16, /* bitsize */
1927 FALSE, /* pc_relative */
1928 0, /* bitpos */
1929 complain_overflow_unsigned, /* complain_on_overflow */
1930 bfd_elf_generic_reloc, /* special_function */
1931 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G1), /* name */
1932 FALSE, /* partial_inplace */
1933 0xffff, /* src_mask */
1934 0xffff, /* dst_mask */
1935 FALSE), /* pcrel_offset */
1936
1937 /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1. */
1938 HOWTO64 (AARCH64_R (TLSLD_MOVW_DTPREL_G1_NC), /* type */
1939 16, /* rightshift */
1940 2, /* size (0 = byte, 1 = short, 2 = long) */
1941 16, /* bitsize */
1942 FALSE, /* pc_relative */
1943 0, /* bitpos */
1944 complain_overflow_dont, /* complain_on_overflow */
1945 bfd_elf_generic_reloc, /* special_function */
1946 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G1_NC), /* name */
1947 FALSE, /* partial_inplace */
1948 0xffff, /* src_mask */
1949 0xffff, /* dst_mask */
1950 FALSE), /* pcrel_offset */
1951
1952 /* MOVZ: bit[47:32] of byte offset to module TLS base address. */
1953 HOWTO64 (AARCH64_R (TLSLD_MOVW_DTPREL_G2), /* type */
1954 32, /* rightshift */
1955 2, /* size (0 = byte, 1 = short, 2 = long) */
1956 16, /* bitsize */
1957 FALSE, /* pc_relative */
1958 0, /* bitpos */
1959 complain_overflow_unsigned, /* complain_on_overflow */
1960 bfd_elf_generic_reloc, /* special_function */
1961 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G2), /* name */
1962 FALSE, /* partial_inplace */
1963 0xffff, /* src_mask */
1964 0xffff, /* dst_mask */
1965 FALSE), /* pcrel_offset */
1966
a6bb11b2 1967 HOWTO64 (AARCH64_R (TLSLE_MOVW_TPREL_G2), /* type */
bb3f9ed8 1968 32, /* rightshift */
a06ea964 1969 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1970 16, /* bitsize */
a06ea964
NC		 1971 FALSE, /* pc_relative */
1972 0, /* bitpos */
0172429c 1973 complain_overflow_unsigned, /* complain_on_overflow */
a06ea964 1974 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1975 AARCH64_R_STR (TLSLE_MOVW_TPREL_G2), /* name */
a06ea964
NC		 1976 FALSE, /* partial_inplace */
1977 0xffff, /* src_mask */
1978 0xffff, /* dst_mask */
1979 FALSE), /* pcrel_offset */
1980
a6bb11b2 1981 HOWTO (AARCH64_R (TLSLE_MOVW_TPREL_G1), /* type */
bb3f9ed8 1982 16, /* rightshift */
a06ea964 1983 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1984 16, /* bitsize */
a06ea964
NC		 1985 FALSE, /* pc_relative */
1986 0, /* bitpos */
1987 complain_overflow_dont, /* complain_on_overflow */
1988 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1989 AARCH64_R_STR (TLSLE_MOVW_TPREL_G1), /* name */
a06ea964
NC		 1990 FALSE, /* partial_inplace */
1991 0xffff, /* src_mask */
1992 0xffff, /* dst_mask */
1993 FALSE), /* pcrel_offset */
1994
a6bb11b2 1995 HOWTO64 (AARCH64_R (TLSLE_MOVW_TPREL_G1_NC), /* type */
bb3f9ed8 1996 16, /* rightshift */
a06ea964 1997 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1998 16, /* bitsize */
a06ea964
NC		 1999 FALSE, /* pc_relative */
2000 0, /* bitpos */
2001 complain_overflow_dont, /* complain_on_overflow */
2002 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2003 AARCH64_R_STR (TLSLE_MOVW_TPREL_G1_NC), /* name */
a06ea964
NC		 2004 FALSE, /* partial_inplace */
2005 0xffff, /* src_mask */
2006 0xffff, /* dst_mask */
2007 FALSE), /* pcrel_offset */
2008
a6bb11b2 2009 HOWTO (AARCH64_R (TLSLE_MOVW_TPREL_G0), /* type */
a06ea964
NC		 2010 0, /* rightshift */
2011 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 2012 16, /* bitsize */
a06ea964
NC		 2013 FALSE, /* pc_relative */
2014 0, /* bitpos */
2015 complain_overflow_dont, /* complain_on_overflow */
2016 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2017 AARCH64_R_STR (TLSLE_MOVW_TPREL_G0), /* name */
a06ea964
NC		 2018 FALSE, /* partial_inplace */
2019 0xffff, /* src_mask */
2020 0xffff, /* dst_mask */
2021 FALSE), /* pcrel_offset */
2022
a6bb11b2 2023 HOWTO (AARCH64_R (TLSLE_MOVW_TPREL_G0_NC), /* type */
a06ea964
NC		 2024 0, /* rightshift */
2025 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 2026 16, /* bitsize */
a06ea964
NC		 2027 FALSE, /* pc_relative */
2028 0, /* bitpos */
2029 complain_overflow_dont, /* complain_on_overflow */
2030 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2031 AARCH64_R_STR (TLSLE_MOVW_TPREL_G0_NC), /* name */
a06ea964
NC		 2032 FALSE, /* partial_inplace */
2033 0xffff, /* src_mask */
2034 0xffff, /* dst_mask */
2035 FALSE), /* pcrel_offset */
2036
a6bb11b2 2037 HOWTO (AARCH64_R (TLSLE_ADD_TPREL_HI12), /* type */
bb3f9ed8 2038 12, /* rightshift */
a06ea964
NC		 2039 2, /* size (0 = byte, 1 = short, 2 = long) */
2040 12, /* bitsize */
2041 FALSE, /* pc_relative */
2042 0, /* bitpos */
bab91cce 2043 complain_overflow_unsigned, /* complain_on_overflow */
a06ea964 2044 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2045 AARCH64_R_STR (TLSLE_ADD_TPREL_HI12), /* name */
a06ea964
NC		 2046 FALSE, /* partial_inplace */
2047 0xfff, /* src_mask */
2048 0xfff, /* dst_mask */
2049 FALSE), /* pcrel_offset */
2050
a6bb11b2 2051 HOWTO (AARCH64_R (TLSLE_ADD_TPREL_LO12), /* type */
a06ea964
NC		 2052 0, /* rightshift */
2053 2, /* size (0 = byte, 1 = short, 2 = long) */
2054 12, /* bitsize */
2055 FALSE, /* pc_relative */
2056 0, /* bitpos */
36e6c140 2057 complain_overflow_unsigned, /* complain_on_overflow */
a06ea964 2058 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2059 AARCH64_R_STR (TLSLE_ADD_TPREL_LO12), /* name */
a06ea964
NC		 2060 FALSE, /* partial_inplace */
2061 0xfff, /* src_mask */
2062 0xfff, /* dst_mask */
2063 FALSE), /* pcrel_offset */
2064
a6bb11b2 2065 HOWTO (AARCH64_R (TLSLE_ADD_TPREL_LO12_NC), /* type */
a06ea964
NC		 2066 0, /* rightshift */
2067 2, /* size (0 = byte, 1 = short, 2 = long) */
2068 12, /* bitsize */
2069 FALSE, /* pc_relative */
2070 0, /* bitpos */
2071 complain_overflow_dont, /* complain_on_overflow */
2072 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2073 AARCH64_R_STR (TLSLE_ADD_TPREL_LO12_NC), /* name */
a06ea964
NC		 2074 FALSE, /* partial_inplace */
2075 0xfff, /* src_mask */
2076 0xfff, /* dst_mask */
2077 FALSE), /* pcrel_offset */
a06ea964 2078
84f1b9fb
RL		 2079 /* LD/ST16: bit[11:1] of byte offset to module TLS base address. */
2080 HOWTO (AARCH64_R (TLSLE_LDST16_TPREL_LO12), /* type */
2081 1, /* rightshift */
2082 2, /* size (0 = byte, 1 = short, 2 = long) */
2083 11, /* bitsize */
2084 FALSE, /* pc_relative */
2085 10, /* bitpos */
2086 complain_overflow_unsigned, /* complain_on_overflow */
2087 bfd_elf_generic_reloc, /* special_function */
2088 AARCH64_R_STR (TLSLE_LDST16_TPREL_LO12), /* name */
2089 FALSE, /* partial_inplace */
2090 0x1ffc00, /* src_mask */
2091 0x1ffc00, /* dst_mask */
2092 FALSE), /* pcrel_offset */
2093
2094 /* Same as BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, but no overflow check. */
2095 HOWTO (AARCH64_R (TLSLE_LDST16_TPREL_LO12_NC), /* type */
2096 1, /* rightshift */
2097 2, /* size (0 = byte, 1 = short, 2 = long) */
2098 11, /* bitsize */
2099 FALSE, /* pc_relative */
2100 10, /* bitpos */
2101 complain_overflow_dont, /* complain_on_overflow */
2102 bfd_elf_generic_reloc, /* special_function */
2103 AARCH64_R_STR (TLSLE_LDST16_TPREL_LO12_NC), /* name */
2104 FALSE, /* partial_inplace */
2105 0x1ffc00, /* src_mask */
2106 0x1ffc00, /* dst_mask */
2107 FALSE), /* pcrel_offset */
2108
2109 /* LD/ST32: bit[11:2] of byte offset to module TLS base address. */
2110 HOWTO (AARCH64_R (TLSLE_LDST32_TPREL_LO12), /* type */
2111 2, /* rightshift */
2112 2, /* size (0 = byte, 1 = short, 2 = long) */
2113 10, /* bitsize */
2114 FALSE, /* pc_relative */
2115 10, /* bitpos */
2116 complain_overflow_unsigned, /* complain_on_overflow */
2117 bfd_elf_generic_reloc, /* special_function */
2118 AARCH64_R_STR (TLSLE_LDST32_TPREL_LO12), /* name */
2119 FALSE, /* partial_inplace */
2120 0xffc00, /* src_mask */
2121 0xffc00, /* dst_mask */
2122 FALSE), /* pcrel_offset */
2123
2124 /* Same as BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, but no overflow check. */
2125 HOWTO (AARCH64_R (TLSLE_LDST32_TPREL_LO12_NC), /* type */
2126 2, /* rightshift */
2127 2, /* size (0 = byte, 1 = short, 2 = long) */
2128 10, /* bitsize */
2129 FALSE, /* pc_relative */
2130 10, /* bitpos */
2131 complain_overflow_dont, /* complain_on_overflow */
2132 bfd_elf_generic_reloc, /* special_function */
2133 AARCH64_R_STR (TLSLE_LDST32_TPREL_LO12_NC), /* name */
2134 FALSE, /* partial_inplace */
2135 0xffc00, /* src_mask */
2136 0xffc00, /* dst_mask */
2137 FALSE), /* pcrel_offset */
2138
2139 /* LD/ST64: bit[11:3] of byte offset to module TLS base address. */
2140 HOWTO (AARCH64_R (TLSLE_LDST64_TPREL_LO12), /* type */
2141 3, /* rightshift */
2142 2, /* size (0 = byte, 1 = short, 2 = long) */
2143 9, /* bitsize */
2144 FALSE, /* pc_relative */
2145 10, /* bitpos */
2146 complain_overflow_unsigned, /* complain_on_overflow */
2147 bfd_elf_generic_reloc, /* special_function */
2148 AARCH64_R_STR (TLSLE_LDST64_TPREL_LO12), /* name */
2149 FALSE, /* partial_inplace */
2150 0x7fc00, /* src_mask */
2151 0x7fc00, /* dst_mask */
2152 FALSE), /* pcrel_offset */
2153
2154 /* Same as BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, but no overflow check. */
2155 HOWTO (AARCH64_R (TLSLE_LDST64_TPREL_LO12_NC), /* type */
2156 3, /* rightshift */
2157 2, /* size (0 = byte, 1 = short, 2 = long) */
2158 9, /* bitsize */
2159 FALSE, /* pc_relative */
2160 10, /* bitpos */
2161 complain_overflow_dont, /* complain_on_overflow */
2162 bfd_elf_generic_reloc, /* special_function */
2163 AARCH64_R_STR (TLSLE_LDST64_TPREL_LO12_NC), /* name */
2164 FALSE, /* partial_inplace */
2165 0x7fc00, /* src_mask */
2166 0x7fc00, /* dst_mask */
2167 FALSE), /* pcrel_offset */
2168
2169 /* LD/ST8: bit[11:0] of byte offset to module TLS base address. */
2170 HOWTO (AARCH64_R (TLSLE_LDST8_TPREL_LO12), /* type */
2171 0, /* rightshift */
2172 2, /* size (0 = byte, 1 = short, 2 = long) */
2173 12, /* bitsize */
2174 FALSE, /* pc_relative */
2175 10, /* bitpos */
2176 complain_overflow_unsigned, /* complain_on_overflow */
2177 bfd_elf_generic_reloc, /* special_function */
2178 AARCH64_R_STR (TLSLE_LDST8_TPREL_LO12), /* name */
2179 FALSE, /* partial_inplace */
2180 0x3ffc00, /* src_mask */
2181 0x3ffc00, /* dst_mask */
2182 FALSE), /* pcrel_offset */
2183
2184 /* Same as BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, but no overflow check. */
2185 HOWTO (AARCH64_R (TLSLE_LDST8_TPREL_LO12_NC), /* type */
2186 0, /* rightshift */
2187 2, /* size (0 = byte, 1 = short, 2 = long) */
2188 12, /* bitsize */
2189 FALSE, /* pc_relative */
2190 10, /* bitpos */
2191 complain_overflow_dont, /* complain_on_overflow */
2192 bfd_elf_generic_reloc, /* special_function */
2193 AARCH64_R_STR (TLSLE_LDST8_TPREL_LO12_NC), /* name */
2194 FALSE, /* partial_inplace */
2195 0x3ffc00, /* src_mask */
2196 0x3ffc00, /* dst_mask */
2197 FALSE), /* pcrel_offset */
2198
a6bb11b2 2199 HOWTO (AARCH64_R (TLSDESC_LD_PREL19), /* type */
bb3f9ed8 2200 2, /* rightshift */
a06ea964 2201 2, /* size (0 = byte, 1 = short, 2 = long) */
1ada945d 2202 19, /* bitsize */
a06ea964
NC		 2203 TRUE, /* pc_relative */
2204 0, /* bitpos */
2205 complain_overflow_dont, /* complain_on_overflow */
2206 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2207 AARCH64_R_STR (TLSDESC_LD_PREL19), /* name */
a06ea964 2208 FALSE, /* partial_inplace */
1ada945d
MS		 2209 0x0ffffe0, /* src_mask */
2210 0x0ffffe0, /* dst_mask */
a06ea964
NC		 2211 TRUE), /* pcrel_offset */
2212
a6bb11b2 2213 HOWTO (AARCH64_R (TLSDESC_ADR_PREL21), /* type */
a06ea964
NC		 2214 0, /* rightshift */
2215 2, /* size (0 = byte, 1 = short, 2 = long) */
2216 21, /* bitsize */
2217 TRUE, /* pc_relative */
2218 0, /* bitpos */
2219 complain_overflow_dont, /* complain_on_overflow */
2220 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2221 AARCH64_R_STR (TLSDESC_ADR_PREL21), /* name */
a06ea964
NC		 2222 FALSE, /* partial_inplace */
2223 0x1fffff, /* src_mask */
2224 0x1fffff, /* dst_mask */
2225 TRUE), /* pcrel_offset */
2226
2227 /* Get to the page for the GOT entry for the symbol
2228 (G(S) - P) using an ADRP instruction. */
a6bb11b2 2229 HOWTO (AARCH64_R (TLSDESC_ADR_PAGE21), /* type */
a06ea964
NC		 2230 12, /* rightshift */
2231 2, /* size (0 = byte, 1 = short, 2 = long) */
2232 21, /* bitsize */
2233 TRUE, /* pc_relative */
2234 0, /* bitpos */
2235 complain_overflow_dont, /* complain_on_overflow */
2236 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2237 AARCH64_R_STR (TLSDESC_ADR_PAGE21), /* name */
a06ea964
NC		 2238 FALSE, /* partial_inplace */
2239 0x1fffff, /* src_mask */
2240 0x1fffff, /* dst_mask */
2241 TRUE), /* pcrel_offset */
2242
a6bb11b2 2243 /* LD64: GOT offset G(S) & 0xff8. */
f955cccf 2244 HOWTO64 (AARCH64_R (TLSDESC_LD64_LO12), /* type */
a06ea964
NC		 2245 3, /* rightshift */
2246 2, /* size (0 = byte, 1 = short, 2 = long) */
2247 12, /* bitsize */
2248 FALSE, /* pc_relative */
2249 0, /* bitpos */
2250 complain_overflow_dont, /* complain_on_overflow */
2251 bfd_elf_generic_reloc, /* special_function */
f955cccf 2252 AARCH64_R_STR (TLSDESC_LD64_LO12), /* name */
a06ea964 2253 FALSE, /* partial_inplace */
a6bb11b2
YZ		 2254 0xff8, /* src_mask */
2255 0xff8, /* dst_mask */
2256 FALSE), /* pcrel_offset */
2257
2258 /* LD32: GOT offset G(S) & 0xffc. */
2259 HOWTO32 (AARCH64_R (TLSDESC_LD32_LO12_NC), /* type */
2260 2, /* rightshift */
2261 2, /* size (0 = byte, 1 = short, 2 = long) */
2262 12, /* bitsize */
2263 FALSE, /* pc_relative */
2264 0, /* bitpos */
2265 complain_overflow_dont, /* complain_on_overflow */
2266 bfd_elf_generic_reloc, /* special_function */
2267 AARCH64_R_STR (TLSDESC_LD32_LO12_NC), /* name */
2268 FALSE, /* partial_inplace */
2269 0xffc, /* src_mask */
2270 0xffc, /* dst_mask */
a06ea964
NC		 2271 FALSE), /* pcrel_offset */
2272
2273 /* ADD: GOT offset G(S) & 0xfff. */
f955cccf 2274 HOWTO (AARCH64_R (TLSDESC_ADD_LO12), /* type */
a06ea964
NC		 2275 0, /* rightshift */
2276 2, /* size (0 = byte, 1 = short, 2 = long) */
2277 12, /* bitsize */
2278 FALSE, /* pc_relative */
2279 0, /* bitpos */
f955cccf 2280 complain_overflow_dont,/* complain_on_overflow */
a06ea964 2281 bfd_elf_generic_reloc, /* special_function */
f955cccf 2282 AARCH64_R_STR (TLSDESC_ADD_LO12), /* name */
a06ea964
NC		 2283 FALSE, /* partial_inplace */
2284 0xfff, /* src_mask */
2285 0xfff, /* dst_mask */
2286 FALSE), /* pcrel_offset */
2287
a6bb11b2 2288 HOWTO64 (AARCH64_R (TLSDESC_OFF_G1), /* type */
bb3f9ed8 2289 16, /* rightshift */
a06ea964
NC		 2290 2, /* size (0 = byte, 1 = short, 2 = long) */
2291 12, /* bitsize */
2292 FALSE, /* pc_relative */
2293 0, /* bitpos */
43a357f9 2294 complain_overflow_unsigned, /* complain_on_overflow */
a06ea964 2295 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2296 AARCH64_R_STR (TLSDESC_OFF_G1), /* name */
a06ea964
NC		 2297 FALSE, /* partial_inplace */
2298 0xffff, /* src_mask */
2299 0xffff, /* dst_mask */
2300 FALSE), /* pcrel_offset */
2301
a6bb11b2 2302 HOWTO64 (AARCH64_R (TLSDESC_OFF_G0_NC), /* type */
a06ea964
NC		 2303 0, /* rightshift */
2304 2, /* size (0 = byte, 1 = short, 2 = long) */
2305 12, /* bitsize */
2306 FALSE, /* pc_relative */
2307 0, /* bitpos */
2308 complain_overflow_dont, /* complain_on_overflow */
2309 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2310 AARCH64_R_STR (TLSDESC_OFF_G0_NC), /* name */
a06ea964
NC		 2311 FALSE, /* partial_inplace */
2312 0xffff, /* src_mask */
2313 0xffff, /* dst_mask */
2314 FALSE), /* pcrel_offset */
2315
a6bb11b2 2316 HOWTO64 (AARCH64_R (TLSDESC_LDR), /* type */
a06ea964
NC		 2317 0, /* rightshift */
2318 2, /* size (0 = byte, 1 = short, 2 = long) */
2319 12, /* bitsize */
2320 FALSE, /* pc_relative */
2321 0, /* bitpos */
2322 complain_overflow_dont, /* complain_on_overflow */
2323 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2324 AARCH64_R_STR (TLSDESC_LDR), /* name */
a06ea964
NC		 2325 FALSE, /* partial_inplace */
2326 0x0, /* src_mask */
2327 0x0, /* dst_mask */
2328 FALSE), /* pcrel_offset */
2329
a6bb11b2 2330 HOWTO64 (AARCH64_R (TLSDESC_ADD), /* type */
a06ea964
NC		 2331 0, /* rightshift */
2332 2, /* size (0 = byte, 1 = short, 2 = long) */
2333 12, /* bitsize */
2334 FALSE, /* pc_relative */
2335 0, /* bitpos */
2336 complain_overflow_dont, /* complain_on_overflow */
2337 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2338 AARCH64_R_STR (TLSDESC_ADD), /* name */
a06ea964
NC		 2339 FALSE, /* partial_inplace */
2340 0x0, /* src_mask */
2341 0x0, /* dst_mask */
2342 FALSE), /* pcrel_offset */
2343
a6bb11b2 2344 HOWTO (AARCH64_R (TLSDESC_CALL), /* type */
a06ea964
NC		 2345 0, /* rightshift */
2346 2, /* size (0 = byte, 1 = short, 2 = long) */
7366006f 2347 0, /* bitsize */
a06ea964
NC		 2348 FALSE, /* pc_relative */
2349 0, /* bitpos */
2350 complain_overflow_dont, /* complain_on_overflow */
2351 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2352 AARCH64_R_STR (TLSDESC_CALL), /* name */
a06ea964
NC		 2353 FALSE, /* partial_inplace */
2354 0x0, /* src_mask */
2355 0x0, /* dst_mask */
2356 FALSE), /* pcrel_offset */
a6bb11b2 2357
4ca9b406
SP		 2358 /* Get to the page for the GOT entry for the symbol
2359 (G(S) - P) using an ADRP instruction. */
2360 HOWTO64 (MORELLO_R (TLSDESC_ADR_PAGE20), /* type */
2361 12, /* rightshift */
2362 2, /* size (0 = byte, 1 = short, 2 = long) */
2363 20, /* bitsize */
2364 TRUE, /* pc_relative */
2365 0, /* bitpos */
2366 complain_overflow_dont, /* complain_on_overflow */
2367 bfd_elf_generic_reloc, /* special_function */
2368 MORELLO_R_STR (TLSDESC_ADR_PAGE20), /* name */
2369 FALSE, /* partial_inplace */
2370 0xfffff, /* src_mask */
2371 0xfffff, /* dst_mask */
2372 TRUE), /* pcrel_offset */
2373
2374 /* LD128: GOT offset G(S) & 0xff0. */
2375 HOWTO64 (MORELLO_R (TLSDESC_LD128_LO12), /* type */
2376 4, /* rightshift */
2377 2, /* size (0 = byte, 1 = short, 2 = long) */
2378 12, /* bitsize */
2379 FALSE, /* pc_relative */
2380 0, /* bitpos */
2381 complain_overflow_dont, /* complain_on_overflow */
2382 bfd_elf_generic_reloc, /* special_function */
2383 MORELLO_R_STR (TLSDESC_LD128_LO12), /* name */
2384 FALSE, /* partial_inplace */
2385 0xff0, /* src_mask */
2386 0xff0, /* dst_mask */
2387 FALSE), /* pcrel_offset */
2388
2389 HOWTO64 (MORELLO_R (TLSDESC_CALL), /* type */
2390 0, /* rightshift */
2391 2, /* size (0 = byte, 1 = short, 2 = long) */
2392 0, /* bitsize */
2393 FALSE, /* pc_relative */
2394 0, /* bitpos */
2395 complain_overflow_dont, /* complain_on_overflow */
2396 bfd_elf_generic_reloc, /* special_function */
2397 MORELLO_R_STR (TLSDESC_CALL), /* name */
2398 FALSE, /* partial_inplace */
2399 0x0, /* src_mask */
2400 0x0, /* dst_mask */
2401 FALSE), /* pcrel_offset */
2402
1408e112
MM		 2403 HOWTO64 (MORELLO_R (TLSIE_ADR_GOTTPREL_PAGE20), /* type */
2404 12, /* rightshift */
2405 2, /* size (0 = byte, 1 = short, 2 = long) */
2406 20, /* bitsize */
2407 TRUE, /* pc_relative */
2408 0, /* bitpos */
2409 complain_overflow_signed, /* complain_on_overflow */
2410 bfd_elf_generic_reloc, /* special_function */
2411 MORELLO_R_STR (TLSIE_ADR_GOTTPREL_PAGE20), /* name */
2412 FALSE, /* partial_inplace */
2413 0xfffff, /* src_mask */
2414 0xfffff, /* dst_mask */
2415 TRUE), /* pcrel_offset */
2416
2417 HOWTO64 (MORELLO_R (TLSIE_ADD_LO12), /* type */
2418 0, /* rightshift */
2419 2, /* size (0 = byte, 1 = short, 2 = long) */
2420 12, /* bitsize */
2421 FALSE, /* pc_relative */
2422 0, /* bitpos */
2423 complain_overflow_dont, /* complain_on_overflow */
2424 bfd_elf_generic_reloc, /* special_function */
2425 MORELLO_R_STR (TLSIE_ADD_LO12), /* name */
2426 FALSE, /* partial_inplace */
2427 0xfff, /* src_mask */
2428 0xfff, /* dst_mask */
2429 FALSE), /* pcrel_offset */
2430
a6bb11b2
YZ		 2431 HOWTO (AARCH64_R (COPY), /* type */
2432 0, /* rightshift */
2433 2, /* size (0 = byte, 1 = short, 2 = long) */
2434 64, /* bitsize */
2435 FALSE, /* pc_relative */
2436 0, /* bitpos */
2437 complain_overflow_bitfield, /* complain_on_overflow */
2438 bfd_elf_generic_reloc, /* special_function */
2439 AARCH64_R_STR (COPY), /* name */
2440 TRUE, /* partial_inplace */
2441 0xffffffff, /* src_mask */
2442 0xffffffff, /* dst_mask */
2443 FALSE), /* pcrel_offset */
2444
2445 HOWTO (AARCH64_R (GLOB_DAT), /* type */
2446 0, /* rightshift */
2447 2, /* size (0 = byte, 1 = short, 2 = long) */
2448 64, /* bitsize */
2449 FALSE, /* pc_relative */
2450 0, /* bitpos */
2451 complain_overflow_bitfield, /* complain_on_overflow */
2452 bfd_elf_generic_reloc, /* special_function */
2453 AARCH64_R_STR (GLOB_DAT), /* name */
2454 TRUE, /* partial_inplace */
2455 0xffffffff, /* src_mask */
2456 0xffffffff, /* dst_mask */
2457 FALSE), /* pcrel_offset */
2458
2459 HOWTO (AARCH64_R (JUMP_SLOT), /* type */
2460 0, /* rightshift */
2461 2, /* size (0 = byte, 1 = short, 2 = long) */
2462 64, /* bitsize */
2463 FALSE, /* pc_relative */
2464 0, /* bitpos */
2465 complain_overflow_bitfield, /* complain_on_overflow */
2466 bfd_elf_generic_reloc, /* special_function */
2467 AARCH64_R_STR (JUMP_SLOT), /* name */
2468 TRUE, /* partial_inplace */
2469 0xffffffff, /* src_mask */
2470 0xffffffff, /* dst_mask */
2471 FALSE), /* pcrel_offset */
2472
2473 HOWTO (AARCH64_R (RELATIVE), /* type */
2474 0, /* rightshift */
2475 2, /* size (0 = byte, 1 = short, 2 = long) */
2476 64, /* bitsize */
2477 FALSE, /* pc_relative */
2478 0, /* bitpos */
2479 complain_overflow_bitfield, /* complain_on_overflow */
2480 bfd_elf_generic_reloc, /* special_function */
2481 AARCH64_R_STR (RELATIVE), /* name */
2482 TRUE, /* partial_inplace */
2483 ALL_ONES, /* src_mask */
2484 ALL_ONES, /* dst_mask */
2485 FALSE), /* pcrel_offset */
2486
2487 HOWTO (AARCH64_R (TLS_DTPMOD), /* type */
2488 0, /* rightshift */
2489 2, /* size (0 = byte, 1 = short, 2 = long) */
2490 64, /* bitsize */
2491 FALSE, /* pc_relative */
2492 0, /* bitpos */
2493 complain_overflow_dont, /* complain_on_overflow */
2494 bfd_elf_generic_reloc, /* special_function */
da0781dc
YZ		 2495#if ARCH_SIZE == 64
2496 AARCH64_R_STR (TLS_DTPMOD64), /* name */
2497#else
a6bb11b2 2498 AARCH64_R_STR (TLS_DTPMOD), /* name */
da0781dc 2499#endif
a6bb11b2
YZ		 2500 FALSE, /* partial_inplace */
2501 0, /* src_mask */
2502 ALL_ONES, /* dst_mask */
2503 FALSE), /* pc_reloffset */
2504
2505 HOWTO (AARCH64_R (TLS_DTPREL), /* type */
2506 0, /* rightshift */
2507 2, /* size (0 = byte, 1 = short, 2 = long) */
2508 64, /* bitsize */
2509 FALSE, /* pc_relative */
2510 0, /* bitpos */
2511 complain_overflow_dont, /* complain_on_overflow */
2512 bfd_elf_generic_reloc, /* special_function */
da0781dc
YZ		 2513#if ARCH_SIZE == 64
2514 AARCH64_R_STR (TLS_DTPREL64), /* name */
2515#else
a6bb11b2 2516 AARCH64_R_STR (TLS_DTPREL), /* name */
da0781dc 2517#endif
a6bb11b2
YZ		 2518 FALSE, /* partial_inplace */
2519 0, /* src_mask */
2520 ALL_ONES, /* dst_mask */
2521 FALSE), /* pcrel_offset */
2522
2523 HOWTO (AARCH64_R (TLS_TPREL), /* type */
2524 0, /* rightshift */
2525 2, /* size (0 = byte, 1 = short, 2 = long) */
2526 64, /* bitsize */
2527 FALSE, /* pc_relative */
2528 0, /* bitpos */
2529 complain_overflow_dont, /* complain_on_overflow */
2530 bfd_elf_generic_reloc, /* special_function */
da0781dc
YZ		 2531#if ARCH_SIZE == 64
2532 AARCH64_R_STR (TLS_TPREL64), /* name */
2533#else
a6bb11b2 2534 AARCH64_R_STR (TLS_TPREL), /* name */
da0781dc 2535#endif
a6bb11b2
YZ		 2536 FALSE, /* partial_inplace */
2537 0, /* src_mask */
2538 ALL_ONES, /* dst_mask */
2539 FALSE), /* pcrel_offset */
2540
2541 HOWTO (AARCH64_R (TLSDESC), /* type */
2542 0, /* rightshift */
2543 2, /* size (0 = byte, 1 = short, 2 = long) */
2544 64, /* bitsize */
2545 FALSE, /* pc_relative */
2546 0, /* bitpos */
2547 complain_overflow_dont, /* complain_on_overflow */
2548 bfd_elf_generic_reloc, /* special_function */
2549 AARCH64_R_STR (TLSDESC), /* name */
2550 FALSE, /* partial_inplace */
2551 0, /* src_mask */
2552 ALL_ONES, /* dst_mask */
2553 FALSE), /* pcrel_offset */
2554
2555 HOWTO (AARCH64_R (IRELATIVE), /* type */
2556 0, /* rightshift */
2557 2, /* size (0 = byte, 1 = short, 2 = long) */
2558 64, /* bitsize */
2559 FALSE, /* pc_relative */
2560 0, /* bitpos */
2561 complain_overflow_bitfield, /* complain_on_overflow */
2562 bfd_elf_generic_reloc, /* special_function */
2563 AARCH64_R_STR (IRELATIVE), /* name */
2564 FALSE, /* partial_inplace */
2565 0, /* src_mask */
2566 ALL_ONES, /* dst_mask */
2567 FALSE), /* pcrel_offset */
2568
40bbb79e
SP		 2569 HOWTO64 (MORELLO_R (CAPINIT), /* type */
2570 0, /* rightshift */
2571 4, /* size (0 = byte, 1 = short, 2 = long) */
2572 0, /* bitsize */
2573 FALSE, /* pc_relative */
2574 0, /* bitpos */
2575 complain_overflow_dont, /* complain_on_overflow */
2576 bfd_elf_generic_reloc, /* special_function */
2577 MORELLO_R_STR (CAPINIT), /* name */
2578 FALSE, /* partial_inplace */
2579 ALL_ONES, /* src_mask */
2580 ALL_ONES, /* dst_mask */
2581 FALSE), /* pcrel_offset */
2582
a1bdea65
SP		 2583 HOWTO64 (MORELLO_R (GLOB_DAT),/* type */
2584 0, /* rightshift */
2585 2, /* size (0 = byte, 1 = short, 2 = long) */
2586 64, /* bitsize */
2587 FALSE, /* pc_relative */
2588 0, /* bitpos */
2589 complain_overflow_bitfield, /* complain_on_overflow */
2590 bfd_elf_generic_reloc, /* special_function */
2591 MORELLO_R_STR (GLOB_DAT), /* name */
2592 TRUE, /* partial_inplace */
2593 0xffffffff, /* src_mask */
2594 0xffffffff, /* dst_mask */
2595 FALSE), /* pcrel_offset */
2596
e19e9199
SP		 2597 HOWTO64 (MORELLO_R (JUMP_SLOT), /* type */
2598 0, /* rightshift */
2599 2, /* size (0 = byte, 1 = short, 2 = long) */
2600 64, /* bitsize */
2601 FALSE, /* pc_relative */
2602 0, /* bitpos */
2603 complain_overflow_bitfield, /* complain_on_overflow */
2604 bfd_elf_generic_reloc, /* special_function */
2605 MORELLO_R_STR (JUMP_SLOT), /* name */
2606 TRUE, /* partial_inplace */
2607 0xffffffff, /* src_mask */
2608 0xffffffff, /* dst_mask */
2609 FALSE), /* pcrel_offset */
2610
2611 HOWTO64 (MORELLO_R (RELATIVE), /* type */
40bbb79e
SP		 2612 0, /* rightshift */
2613 2, /* size (0 = byte, 1 = short, 2 = long) */
2614 64, /* bitsize */
2615 FALSE, /* pc_relative */
2616 0, /* bitpos */
2617 complain_overflow_bitfield, /* complain_on_overflow */
2618 bfd_elf_generic_reloc, /* special_function */
2619 MORELLO_R_STR (RELATIVE), /* name */
2620 TRUE, /* partial_inplace */
2621 ALL_ONES, /* src_mask */
2622 ALL_ONES, /* dst_mask */
2623 FALSE), /* pcrel_offset */
2624
e19e9199
SP		 2625 HOWTO64 (MORELLO_R (IRELATIVE), /* type */
2626 0, /* rightshift */
2627 2, /* size (0 = byte, 1 = short, 2 = long) */
2628 64, /* bitsize */
2629 FALSE, /* pc_relative */
2630 0, /* bitpos */
2631 complain_overflow_bitfield, /* complain_on_overflow */
2632 bfd_elf_generic_reloc, /* special_function */
2633 MORELLO_R_STR (IRELATIVE), /* name */
2634 FALSE, /* partial_inplace */
2635 0, /* src_mask */
2636 ALL_ONES, /* dst_mask */
2637 FALSE), /* pcrel_offset */
2638
4ca9b406
SP		 2639 HOWTO64 (MORELLO_R (TLSDESC), /* type */
2640 0, /* rightshift */
2641 2, /* size (0 = byte, 1 = short, 2 = long) */
2642 64, /* bitsize */
2643 FALSE, /* pc_relative */
2644 0, /* bitpos */
2645 complain_overflow_dont, /* complain_on_overflow */
2646 bfd_elf_generic_reloc, /* special_function */
2647 MORELLO_R_STR (TLSDESC), /* name */
2648 FALSE, /* partial_inplace */
2649 0, /* src_mask */
2650 ALL_ONES, /* dst_mask */
2651 FALSE), /* pcrel_offset */
2652
1408e112
MM		 2653 HOWTO64 (MORELLO_R (TPREL128), /* type */
2654 0, /* rightshift */
2655 2, /* size (0 = byte, 1 = short, 2 = long) */
2656 64, /* bitsize */
2657 FALSE, /* pc_relative */
2658 0, /* bitpos */
2659 complain_overflow_dont, /* complain_on_overflow */
2660 bfd_elf_generic_reloc, /* special_function */
2661 MORELLO_R_STR (TPREL128), /* name */
2662 FALSE, /* partial_inplace */
2663 0, /* src_mask */
2664 ALL_ONES, /* dst_mask */
2665 FALSE), /* pcrel_offset */
2666
a6bb11b2 2667 EMPTY_HOWTO (0),
a06ea964
NC		 2668};
2669
a6bb11b2
YZ		 2670static reloc_howto_type elfNN_aarch64_howto_none =
2671 HOWTO (R_AARCH64_NONE, /* type */
2672 0, /* rightshift */
6346d5ca 2673 3, /* size (0 = byte, 1 = short, 2 = long) */
a6bb11b2
YZ		 2674 0, /* bitsize */
2675 FALSE, /* pc_relative */
2676 0, /* bitpos */
2677 complain_overflow_dont,/* complain_on_overflow */
2678 bfd_elf_generic_reloc, /* special_function */
2679 "R_AARCH64_NONE", /* name */
2680 FALSE, /* partial_inplace */
2681 0, /* src_mask */
2682 0, /* dst_mask */
2683 FALSE); /* pcrel_offset */
2684
2685/* Given HOWTO, return the bfd internal relocation enumerator. */
2686
2687static bfd_reloc_code_real_type
2688elfNN_aarch64_bfd_reloc_from_howto (reloc_howto_type *howto)
2689{
2690 const int size
2691 = (int) ARRAY_SIZE (elfNN_aarch64_howto_table);
2692 const ptrdiff_t offset
2693 = howto - elfNN_aarch64_howto_table;
2694
2695 if (offset > 0 && offset < size - 1)
2696 return BFD_RELOC_AARCH64_RELOC_START + offset;
2697
2698 if (howto == &elfNN_aarch64_howto_none)
2699 return BFD_RELOC_AARCH64_NONE;
2700
2701 return BFD_RELOC_AARCH64_RELOC_START;
2702}
2703
2704/* Given R_TYPE, return the bfd internal relocation enumerator. */
2705
2706static bfd_reloc_code_real_type
0aa13fee 2707elfNN_aarch64_bfd_reloc_from_type (bfd *abfd, unsigned int r_type)
a6bb11b2
YZ		 2708{
2709 static bfd_boolean initialized_p = FALSE;
2710 /* Indexed by R_TYPE, values are offsets in the howto_table. */
2711 static unsigned int offsets[R_AARCH64_end];
2712
535b785f 2713 if (!initialized_p)
a6bb11b2
YZ		 2714 {
2715 unsigned int i;
2716
2717 for (i = 1; i < ARRAY_SIZE (elfNN_aarch64_howto_table) - 1; ++i)
2718 if (elfNN_aarch64_howto_table[i].type != 0)
2719 offsets[elfNN_aarch64_howto_table[i].type] = i;
2720
2721 initialized_p = TRUE;
2722 }
2723
2724 if (r_type == R_AARCH64_NONE || r_type == R_AARCH64_NULL)
2725 return BFD_RELOC_AARCH64_NONE;
2726
5860e3f8
NC		 2727 /* PR 17512: file: b371e70a. */
2728 if (r_type >= R_AARCH64_end)
2729 {
0aa13fee
AM		 2730 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
2731 abfd, r_type);
5860e3f8
NC		 2732 bfd_set_error (bfd_error_bad_value);
2733 return BFD_RELOC_AARCH64_NONE;
2734 }
2735
a6bb11b2
YZ		 2736 return BFD_RELOC_AARCH64_RELOC_START + offsets[r_type];
2737}
2738
2739struct elf_aarch64_reloc_map
2740{
2741 bfd_reloc_code_real_type from;
2742 bfd_reloc_code_real_type to;
2743};
2744
2745/* Map bfd generic reloc to AArch64-specific reloc. */
2746static const struct elf_aarch64_reloc_map elf_aarch64_reloc_map[] =
2747{
2748 {BFD_RELOC_NONE, BFD_RELOC_AARCH64_NONE},
2749
2750 /* Basic data relocations. */
2751 {BFD_RELOC_CTOR, BFD_RELOC_AARCH64_NN},
2752 {BFD_RELOC_64, BFD_RELOC_AARCH64_64},
2753 {BFD_RELOC_32, BFD_RELOC_AARCH64_32},
2754 {BFD_RELOC_16, BFD_RELOC_AARCH64_16},
2755 {BFD_RELOC_64_PCREL, BFD_RELOC_AARCH64_64_PCREL},
2756 {BFD_RELOC_32_PCREL, BFD_RELOC_AARCH64_32_PCREL},
2757 {BFD_RELOC_16_PCREL, BFD_RELOC_AARCH64_16_PCREL},
2758};
2759
2760/* Given the bfd internal relocation enumerator in CODE, return the
2761 corresponding howto entry. */
2762
2763static reloc_howto_type *
2764elfNN_aarch64_howto_from_bfd_reloc (bfd_reloc_code_real_type code)
2765{
2766 unsigned int i;
2767
2768 /* Convert bfd generic reloc to AArch64-specific reloc. */
2769 if (code < BFD_RELOC_AARCH64_RELOC_START
2770 || code > BFD_RELOC_AARCH64_RELOC_END)
2771 for (i = 0; i < ARRAY_SIZE (elf_aarch64_reloc_map); i++)
2772 if (elf_aarch64_reloc_map[i].from == code)
2773 {
2774 code = elf_aarch64_reloc_map[i].to;
2775 break;
2776 }
2777
2778 if (code > BFD_RELOC_AARCH64_RELOC_START
2779 && code < BFD_RELOC_AARCH64_RELOC_END)
2780 if (elfNN_aarch64_howto_table[code - BFD_RELOC_AARCH64_RELOC_START].type)
2781 return &elfNN_aarch64_howto_table[code - BFD_RELOC_AARCH64_RELOC_START];
2782
54757ed1
AP		 2783 if (code == BFD_RELOC_AARCH64_NONE)
2784 return &elfNN_aarch64_howto_none;
2785
a6bb11b2
YZ		 2786 return NULL;
2787}
2788
a06ea964 2789static reloc_howto_type *
0aa13fee 2790elfNN_aarch64_howto_from_type (bfd *abfd, unsigned int r_type)
a06ea964 2791{
a6bb11b2
YZ		 2792 bfd_reloc_code_real_type val;
2793 reloc_howto_type *howto;
2794
cec5225b
YZ		 2795#if ARCH_SIZE == 32
2796 if (r_type > 256)
2797 {
2798 bfd_set_error (bfd_error_bad_value);
2799 return NULL;
2800 }
2801#endif
2802
a6bb11b2
YZ		 2803 if (r_type == R_AARCH64_NONE)
2804 return &elfNN_aarch64_howto_none;
a06ea964 2805
0aa13fee 2806 val = elfNN_aarch64_bfd_reloc_from_type (abfd, r_type);
a6bb11b2 2807 howto = elfNN_aarch64_howto_from_bfd_reloc (val);
a06ea964 2808
a6bb11b2
YZ		 2809 if (howto != NULL)
2810 return howto;
a06ea964 2811
a06ea964
NC		 2812 bfd_set_error (bfd_error_bad_value);
2813 return NULL;
2814}
2815
f3185997 2816static bfd_boolean
0aa13fee 2817elfNN_aarch64_info_to_howto (bfd *abfd, arelent *bfd_reloc,
a06ea964
NC		 2818 Elf_Internal_Rela *elf_reloc)
2819{
2820 unsigned int r_type;
2821
cec5225b 2822 r_type = ELFNN_R_TYPE (elf_reloc->r_info);
0aa13fee 2823 bfd_reloc->howto = elfNN_aarch64_howto_from_type (abfd, r_type);
f3185997
NC		 2824
2825 if (bfd_reloc->howto == NULL)
2826 {
2827 /* xgettext:c-format */
2828 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), abfd, r_type);
2829 return FALSE;
2830 }
2831 return TRUE;
a06ea964
NC		 2832}
2833
a06ea964 2834static reloc_howto_type *
cec5225b 2835elfNN_aarch64_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
a06ea964
NC		 2836 bfd_reloc_code_real_type code)
2837{
a6bb11b2 2838 reloc_howto_type *howto = elfNN_aarch64_howto_from_bfd_reloc (code);
a06ea964 2839
a6bb11b2
YZ		 2840 if (howto != NULL)
2841 return howto;
a06ea964
NC		 2842
2843 bfd_set_error (bfd_error_bad_value);
2844 return NULL;
2845}
2846
2847static reloc_howto_type *
cec5225b 2848elfNN_aarch64_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
a06ea964
NC		 2849 const char *r_name)
2850{
2851 unsigned int i;
2852
a6bb11b2
YZ		 2853 for (i = 1; i < ARRAY_SIZE (elfNN_aarch64_howto_table) - 1; ++i)
2854 if (elfNN_aarch64_howto_table[i].name != NULL
2855 && strcasecmp (elfNN_aarch64_howto_table[i].name, r_name) == 0)
2856 return &elfNN_aarch64_howto_table[i];
a06ea964
NC		 2857
2858 return NULL;
2859}
2860
07d6d2b8
AM		 2861#define TARGET_LITTLE_SYM aarch64_elfNN_le_vec
2862#define TARGET_LITTLE_NAME "elfNN-littleaarch64"
2863#define TARGET_BIG_SYM aarch64_elfNN_be_vec
2864#define TARGET_BIG_NAME "elfNN-bigaarch64"
a06ea964 2865
a06ea964
NC		 2866/* The linker script knows the section names for placement.
2867 The entry_names are used to do simple name mangling on the stubs.
2868 Given a function name, and its type, the stub can be found. The
2869 name can be changed. The only requirement is the %s be present. */
50e192f0 2870#define STUB_ENTRY_NAME "__%s%s_veneer"
a06ea964
NC		 2871
2872/* The name of the dynamic interpreter. This is put in the .interp
2873 section. */
2874#define ELF_DYNAMIC_INTERPRETER "/lib/ld.so.1"
2875
2876#define AARCH64_MAX_FWD_BRANCH_OFFSET \
2877 (((1 << 25) - 1) << 2)
2878#define AARCH64_MAX_BWD_BRANCH_OFFSET \
2879 (-((1 << 25) << 2))
2880
2881#define AARCH64_MAX_ADRP_IMM ((1 << 20) - 1)
2882#define AARCH64_MIN_ADRP_IMM (-(1 << 20))
2883
50e192f0
SP		 2884#define C64_MAX_ADRP_IMM ((1 << 19) - 1)
2885#define C64_MIN_ADRP_IMM (-(1 << 19))
2886
2887static bfd_boolean
2888aarch64_branch_reloc_p (unsigned int r_type)
2889{
2890 switch (r_type)
2891 {
2892 case MORELLO_R (JUMP26):
2893 case MORELLO_R (CALL26):
2894 case AARCH64_R (JUMP26):
2895 case AARCH64_R (CALL26):
2896 return TRUE;
2897
2898 default: break;
2899 }
2900
2901 return FALSE;
2902}
2903
a06ea964
NC		 2904static int
2905aarch64_valid_for_adrp_p (bfd_vma value, bfd_vma place)
2906{
2907 bfd_signed_vma offset = (bfd_signed_vma) (PG (value) - PG (place)) >> 12;
2908 return offset <= AARCH64_MAX_ADRP_IMM && offset >= AARCH64_MIN_ADRP_IMM;
2909}
2910
50e192f0
SP		 2911static bfd_boolean
2912c64_valid_for_adrp_p (bfd_vma value, bfd_vma place)
2913{
2914 bfd_signed_vma offset = (bfd_signed_vma) (PG (value) - PG (place)) >> 12;
2915 return offset <= C64_MAX_ADRP_IMM && offset >= C64_MIN_ADRP_IMM;
2916}
2917
a06ea964
NC		 2918static int
2919aarch64_valid_branch_p (bfd_vma value, bfd_vma place)
2920{
2921 bfd_signed_vma offset = (bfd_signed_vma) (value - place);
2922 return (offset <= AARCH64_MAX_FWD_BRANCH_OFFSET
2923 && offset >= AARCH64_MAX_BWD_BRANCH_OFFSET);
2924}
2925
2926static const uint32_t aarch64_adrp_branch_stub [] =
2927{
2928 0x90000010, /* adrp ip0, X */
2929 /* R_AARCH64_ADR_HI21_PCREL(X) */
2930 0x91000210, /* add ip0, ip0, :lo12:X */
2931 /* R_AARCH64_ADD_ABS_LO12_NC(X) */
2932 0xd61f0200, /* br ip0 */
2933};
2934
2935static const uint32_t aarch64_long_branch_stub[] =
2936{
cec5225b 2937#if ARCH_SIZE == 64
a06ea964 2938 0x58000090, /* ldr ip0, 1f */
cec5225b
YZ		 2939#else
2940 0x18000090, /* ldr wip0, 1f */
2941#endif
a06ea964
NC		 2942 0x10000011, /* adr ip1, #0 */
2943 0x8b110210, /* add ip0, ip0, ip1 */
2944 0xd61f0200, /* br ip0 */
cec5225b
YZ		 2945 0x00000000, /* 1: .xword or .word
2946 R_AARCH64_PRELNN(X) + 12
a06ea964
NC		 2947 */
2948 0x00000000,
2949};
2950
68fcca92
JW		 2951static const uint32_t aarch64_erratum_835769_stub[] =
2952{
2953 0x00000000, /* Placeholder for multiply accumulate. */
2954 0x14000000, /* b <label> */
2955};
2956
4106101c
MS		 2957static const uint32_t aarch64_erratum_843419_stub[] =
2958{
2959 0x00000000, /* Placeholder for LDR instruction. */
2960 0x14000000, /* b <label> */
2961};
2962
50e192f0
SP		 2963static const uint32_t aarch64_c64_branch_stub [] =
2964{
2965 0xc2c273e0, /* bx #4 */
2966 0x90800010, /* adrp c16, X */
2967 /* R_MORELLO_ADR_HI20_PCREL(X) */
2968 0x02000210, /* add c16, c16, :lo12:X */
2969 /* R_AARCH64_ADD_ABS_LO12_NC(X) */
2970 0xc2c21200, /* br c16 */
2971};
2972
2973static const uint32_t c64_aarch64_branch_stub [] =
2974{
2975 0x90800010, /* adrp c16, X */
2976 /* R_MORELLO_ADR_HI20_PCREL(X) */
2977 0x02000210, /* add c16, c16, :lo12:X */
2978 /* R_AARCH64_ADD_ABS_LO12_NC(X) */
2979 0xc2c21200, /* br c16 */
2980};
2981
a06ea964
NC		 2982/* Section name for stubs is the associated section name plus this
2983 string. */
2984#define STUB_SUFFIX ".stub"
2985
cec5225b 2986enum elf_aarch64_stub_type
a06ea964
NC		 2987{
2988 aarch64_stub_none,
2989 aarch64_stub_adrp_branch,
2990 aarch64_stub_long_branch,
68fcca92 2991 aarch64_stub_erratum_835769_veneer,
4106101c 2992 aarch64_stub_erratum_843419_veneer,
50e192f0
SP		 2993 aarch64_stub_branch_c64,
2994 c64_stub_branch_aarch64,
2995 c64_stub_branch_c64,
a06ea964
NC		 2996};
2997
cec5225b 2998struct elf_aarch64_stub_hash_entry
a06ea964
NC		 2999{
3000 /* Base hash table entry structure. */
3001 struct bfd_hash_entry root;
3002
3003 /* The stub section. */
3004 asection *stub_sec;
3005
3006 /* Offset within stub_sec of the beginning of this stub. */
3007 bfd_vma stub_offset;
3008
3009 /* Given the symbol's value and its section we can determine its final
3010 value when building the stubs (so the stub knows where to jump). */
3011 bfd_vma target_value;
3012 asection *target_section;
3013
cec5225b 3014 enum elf_aarch64_stub_type stub_type;
a06ea964
NC		 3015
3016 /* The symbol table entry, if any, that this was derived from. */
cec5225b 3017 struct elf_aarch64_link_hash_entry *h;
a06ea964
NC		 3018
3019 /* Destination symbol type */
3020 unsigned char st_type;
3021
3022 /* Where this stub is being called from, or, in the case of combined
3023 stub sections, the first input section in the group. */
3024 asection *id_sec;
3025
3026 /* The name for the local symbol at the start of this stub. The
3027 stub name in the hash table has to be unique; this does not, so
3028 it can be friendlier. */
3029 char *output_name;
68fcca92
JW		 3030
3031 /* The instruction which caused this stub to be generated (only valid for
3032 erratum 835769 workaround stubs at present). */
3033 uint32_t veneered_insn;
4106101c
MS		 3034
3035 /* In an erratum 843419 workaround stub, the ADRP instruction offset. */
3036 bfd_vma adrp_offset;
a06ea964
NC		 3037};
3038
ece841e8
MM		 3039struct elf_c64_tls_data_stub_hash_entry
3040{
3041 /* Symbol table entry, if any, for which this stub is made. */
3042 struct elf_aarch64_link_hash_entry *h;
3043 /* Local symbol table index and BFD associated with it, if required, for
3044 which this stub is made. These are only used when `h` is NULL. */
3045 unsigned long r_symndx;
3046 bfd *input_bfd;
3047 /* Offset within htab->sc64_tls_stubs of the beginning of this stub. */
3048 bfd_vma tls_stub_offset;
3049 bfd_boolean populated;
3050};
3051
36b60023
MM		 3052struct elf_c64_ifunc_capinit_record
3053{
3054 struct elf_link_hash_entry *h;
3055 /* Number of CAPINIT relocations this hash entry has against it. */
3056 unsigned long count;
3057};
3058
a06ea964
NC		 3059/* Used to build a map of a section. This is required for mixed-endian
3060 code/data. */
3061
cec5225b 3062typedef struct elf_elf_section_map
a06ea964
NC		 3063{
3064 bfd_vma vma;
3065 char type;
3066}
cec5225b 3067elf_aarch64_section_map;
a06ea964
NC		 3068
3069
3070typedef struct _aarch64_elf_section_data
3071{
3072 struct bfd_elf_section_data elf;
3073 unsigned int mapcount;
3074 unsigned int mapsize;
cec5225b 3075 elf_aarch64_section_map *map;
f0070c1e 3076 bfd_boolean sorted;
a06ea964
NC		 3077}
3078_aarch64_elf_section_data;
3079
cec5225b 3080#define elf_aarch64_section_data(sec) \
a06ea964
NC		 3081 ((_aarch64_elf_section_data *) elf_section_data (sec))
3082
f0070c1e
SP		 3083/* Used to order a list of mapping symbols by address. */
3084
3085static int
3086elf_aarch64_compare_mapping (const void *a, const void *b)
3087{
3088 const elf_aarch64_section_map *amap = (const elf_aarch64_section_map *) a;
3089 const elf_aarch64_section_map *bmap = (const elf_aarch64_section_map *) b;
3090
3091 if (amap->vma > bmap->vma)
3092 return 1;
3093 else if (amap->vma < bmap->vma)
3094 return -1;
3095 else if (amap->type > bmap->type)
3096 /* Ensure results do not depend on the host qsort for objects with
3097 multiple mapping symbols at the same address by sorting on type
3098 after vma. */
3099 return 1;
3100 else if (amap->type < bmap->type)
3101 return -1;
3102 else
3103 return 0;
3104}
3105
3106static _aarch64_elf_section_data *
3107elf_aarch64_section_data_get (asection *sec)
3108{
3109 _aarch64_elf_section_data *sec_data = elf_aarch64_section_data(sec);
3110
3111 /* A section that does not have aarch64 section data, so it does not have any
3112 map information. Assume A64. */
3113 if (sec_data == NULL || !sec_data->elf.is_target_section_data)
3114 return NULL;
3115
3116 if (sec_data->sorted)
3117 goto done;
3118
3119 qsort (sec_data->map, sec_data->mapcount, sizeof (elf_aarch64_section_map),
3120 elf_aarch64_compare_mapping);
3121
3122 sec_data->sorted = TRUE;
3123
3124done:
3125 return sec_data;
3126}
3127
3128/* Returns TRUE if the label with st_value as VALUE is within a C64 code
3129 section or not. */
3130
3131static bfd_boolean
3132c64_value_p (asection *section, unsigned int value)
3133{
3134 struct _aarch64_elf_section_data *sec_data =
3135 elf_aarch64_section_data_get (section);
3136
3137 if (sec_data == NULL)
3138 return FALSE;
3139
3140 unsigned int span;
3141
3142 for (span = 0; span < sec_data->mapcount; span++)
3143 {
3144 unsigned int span_start = sec_data->map[span].vma;
3145 unsigned int span_end = ((span == sec_data->mapcount - 1)
3146 ? sec_data->map[0].vma + section->size
3147 : sec_data->map[span + 1].vma);
3148 char span_type = sec_data->map[span].type;
3149
3150 if (span_start <= value && value < span_end && span_type == 'c')
3151 return TRUE;
3152 }
3153 return FALSE;
3154}
3155
4e8516b2 3156/* The size of the thread control block which is defined to be two pointers. */
bf3eaebd
MM		 3157#define TCB_SIZE(cur_bfd) \
3158 elf_elfheader(cur_bfd)->e_flags & EF_AARCH64_CHERI_PURECAP ? 32 : (ARCH_SIZE/8)*2
a06ea964
NC		 3159
3160struct elf_aarch64_local_symbol
3161{
3162 unsigned int got_type;
3163 bfd_signed_vma got_refcount;
3164 bfd_vma got_offset;
3165
3166 /* Offset of the GOTPLT entry reserved for the TLS descriptor. The
3167 offset is from the end of the jump table and reserved entries
3168 within the PLTGOT.
3169
3170 The magic value (bfd_vma) -1 indicates that an offset has not be
3171 allocated. */
3172 bfd_vma tlsdesc_got_jump_table_offset;
3173};
3174
3175struct elf_aarch64_obj_tdata
3176{
3177 struct elf_obj_tdata root;
3178
3179 /* local symbol descriptors */
3180 struct elf_aarch64_local_symbol *locals;
3181
3182 /* Zero to warn when linking objects with incompatible enum sizes. */
3183 int no_enum_size_warning;
3184
3185 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3186 int no_wchar_size_warning;
cd702818
SD		 3187
3188 /* All GNU_PROPERTY_AARCH64_FEATURE_1_AND properties. */
3189 uint32_t gnu_and_prop;
37c18eed
SD		 3190
3191 /* Zero to warn when linking objects with incompatible
3192 GNU_PROPERTY_AARCH64_FEATURE_1_BTI. */
3193 int no_bti_warn;
3194
3195 /* PLT type based on security. */
3196 aarch64_plt_type plt_type;
f0070c1e
SP		 3197
3198 /* Flag to check if section maps have been initialised for all sections in
3199 this object. */
3200 bfd_boolean secmaps_initialised;
a06ea964
NC		 3201};
3202
3203#define elf_aarch64_tdata(bfd) \
3204 ((struct elf_aarch64_obj_tdata *) (bfd)->tdata.any)
3205
cec5225b 3206#define elf_aarch64_locals(bfd) (elf_aarch64_tdata (bfd)->locals)
a06ea964
NC		 3207
3208#define is_aarch64_elf(bfd) \
3209 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3210 && elf_tdata (bfd) != NULL \
3211 && elf_object_id (bfd) == AARCH64_ELF_DATA)
3212
3213static bfd_boolean
cec5225b 3214elfNN_aarch64_mkobject (bfd *abfd)
a06ea964
NC		 3215{
3216 return bfd_elf_allocate_object (abfd, sizeof (struct elf_aarch64_obj_tdata),
3217 AARCH64_ELF_DATA);
3218}
3219
cec5225b
YZ		 3220#define elf_aarch64_hash_entry(ent) \
3221 ((struct elf_aarch64_link_hash_entry *)(ent))
a06ea964
NC		 3222
3223#define GOT_UNKNOWN 0
3224#define GOT_NORMAL 1
3225#define GOT_TLS_GD 2
3226#define GOT_TLS_IE 4
3227#define GOT_TLSDESC_GD 8
3228
3229#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLSDESC_GD))
3230
3231/* AArch64 ELF linker hash entry. */
cec5225b 3232struct elf_aarch64_link_hash_entry
a06ea964
NC		 3233{
3234 struct elf_link_hash_entry root;
3235
a06ea964
NC		 3236 /* Since PLT entries have variable size, we need to record the
3237 index into .got.plt instead of recomputing it from the PLT
3238 offset. */
3239 bfd_signed_vma plt_got_offset;
3240
3241 /* Bit mask representing the type of GOT entry(s) if any required by
3242 this symbol. */
3243 unsigned int got_type;
3244
3245 /* A pointer to the most recently used stub hash entry against this
3246 symbol. */
cec5225b 3247 struct elf_aarch64_stub_hash_entry *stub_cache;
a06ea964
NC		 3248
3249 /* Offset of the GOTPLT entry reserved for the TLS descriptor. The offset
3250 is from the end of the jump table and reserved entries within the PLTGOT.
3251
3252 The magic value (bfd_vma) -1 indicates that an offset has not
3253 be allocated. */
3254 bfd_vma tlsdesc_got_jump_table_offset;
3255};
3256
3257static unsigned int
cec5225b 3258elfNN_aarch64_symbol_got_type (struct elf_link_hash_entry *h,
a06ea964
NC		 3259 bfd *abfd,
3260 unsigned long r_symndx)
3261{
3262 if (h)
cec5225b 3263 return elf_aarch64_hash_entry (h)->got_type;
a06ea964 3264
cec5225b 3265 if (! elf_aarch64_locals (abfd))
a06ea964
NC		 3266 return GOT_UNKNOWN;
3267
cec5225b 3268 return elf_aarch64_locals (abfd)[r_symndx].got_type;
a06ea964
NC		 3269}
3270
a06ea964 3271/* Get the AArch64 elf linker hash table from a link_info structure. */
cec5225b
YZ		 3272#define elf_aarch64_hash_table(info) \
3273 ((struct elf_aarch64_link_hash_table *) ((info)->hash))
a06ea964
NC		 3274
3275#define aarch64_stub_hash_lookup(table, string, create, copy) \
cec5225b 3276 ((struct elf_aarch64_stub_hash_entry *) \
a06ea964
NC		 3277 bfd_hash_lookup ((table), (string), (create), (copy)))
3278
3279/* AArch64 ELF linker hash table. */
cec5225b 3280struct elf_aarch64_link_hash_table
a06ea964
NC		 3281{
3282 /* The main hash table. */
3283 struct elf_link_hash_table root;
3284
3285 /* Nonzero to force PIC branch veneers. */
3286 int pic_veneer;
3287
68fcca92
JW		 3288 /* Fix erratum 835769. */
3289 int fix_erratum_835769;
3290
4106101c 3291 /* Fix erratum 843419. */
739b5c9c 3292 erratum_84319_opts fix_erratum_843419;
4106101c 3293
1f56df9d
JW		 3294 /* Don't apply link-time values for dynamic relocations. */
3295 int no_apply_dynamic_relocs;
3296
a06ea964
NC		 3297 /* The number of bytes in the initial entry in the PLT. */
3298 bfd_size_type plt_header_size;
3299
37c18eed
SD		 3300 /* The bytes of the initial PLT entry. */
3301 const bfd_byte *plt0_entry;
3302
3303 /* The number of bytes in the subsequent PLT entries. */
a06ea964
NC		 3304 bfd_size_type plt_entry_size;
3305
37c18eed
SD		 3306 /* The bytes of the subsequent PLT entry. */
3307 const bfd_byte *plt_entry;
3308
a06ea964
NC		 3309 /* For convenience in allocate_dynrelocs. */
3310 bfd *obfd;
3311
3312 /* The amount of space used by the reserved portion of the sgotplt
3313 section, plus whatever space is used by the jump slots. */
3314 bfd_vma sgotplt_jump_table_size;
3315
3316 /* The stub hash table. */
3317 struct bfd_hash_table stub_hash_table;
3318
3319 /* Linker stub bfd. */
3320 bfd *stub_bfd;
3321
3322 /* Linker call-backs. */
3323 asection *(*add_stub_section) (const char *, asection *);
3324 void (*layout_sections_again) (void);
8504495a
AC		 3325 c64_section_padding_setter_t c64_set_section_padding;
3326 c64_section_padding_getter_t c64_get_section_padding;
3327 c64_pad_after_section_t c64_pad_after_section;
a06ea964
NC		 3328
3329 /* Array to keep track of which stub sections have been created, and
3330 information on stub grouping. */
3331 struct map_stub
3332 {
3333 /* This is the section to which stubs in the group will be
3334 attached. */
3335 asection *link_sec;
3336 /* The stub section. */
3337 asection *stub_sec;
3338 } *stub_group;
3339
cec5225b 3340 /* Assorted information used by elfNN_aarch64_size_stubs. */
a06ea964 3341 unsigned int bfd_count;
7292b3ac 3342 unsigned int top_index;
a06ea964
NC		 3343 asection **input_list;
3344
823710d5
SN		 3345 /* JUMP_SLOT relocs for variant PCS symbols may be present. */
3346 int variant_pcs;
3347
37c18eed
SD		 3348 /* The number of bytes in the PLT enty for the TLS descriptor. */
3349 bfd_size_type tlsdesc_plt_entry_size;
3350
1419bbe5
WN		 3351 /* Used by local STT_GNU_IFUNC symbols. */
3352 htab_t loc_hash_table;
3353 void * loc_hash_memory;
40bbb79e
SP		 3354
3355 /* Used for capability relocations. */
3356 asection *srelcaps;
ece841e8 3357 asection *sc64_tls_stubs;
a1bdea65 3358 int c64_rel;
7ff36d1a 3359 bfd_boolean c64_output;
ece841e8
MM		 3360 htab_t c64_tls_data_stub_hash_table;
3361 void * tls_data_stub_memory;
8504495a
AC		 3362
3363 /* Bookkeeping for padding we add to sections in C64. */
3364 void **c64_sec_info;
3365 unsigned min_output_section_id;
3366 unsigned max_output_section_id;
36b60023
MM		 3367
3368 /* Used for CAPINIT relocations on a STT_GNU_IFUNC symbols in a static PDE.
3369 * */
3370 htab_t c64_ifunc_capinit_hash_table;
3371 void * c64_ifunc_capinit_memory;
a06ea964
NC		 3372};
3373
a06ea964
NC		 3374/* Create an entry in an AArch64 ELF linker hash table. */
3375
3376static struct bfd_hash_entry *
cec5225b 3377elfNN_aarch64_link_hash_newfunc (struct bfd_hash_entry *entry,
a06ea964
NC		 3378 struct bfd_hash_table *table,
3379 const char *string)
3380{
cec5225b
YZ		 3381 struct elf_aarch64_link_hash_entry *ret =
3382 (struct elf_aarch64_link_hash_entry *) entry;
a06ea964
NC		 3383
3384 /* Allocate the structure if it has not already been allocated by a
3385 subclass. */
3386 if (ret == NULL)
3387 ret = bfd_hash_allocate (table,
cec5225b 3388 sizeof (struct elf_aarch64_link_hash_entry));
a06ea964
NC		 3389 if (ret == NULL)
3390 return (struct bfd_hash_entry *) ret;
3391
3392 /* Call the allocation method of the superclass. */
cec5225b 3393 ret = ((struct elf_aarch64_link_hash_entry *)
a06ea964
NC		 3394 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3395 table, string));
3396 if (ret != NULL)
3397 {
a06ea964
NC		 3398 ret->got_type = GOT_UNKNOWN;
3399 ret->plt_got_offset = (bfd_vma) - 1;
3400 ret->stub_cache = NULL;
3401 ret->tlsdesc_got_jump_table_offset = (bfd_vma) - 1;
3402 }
3403
3404 return (struct bfd_hash_entry *) ret;
3405}
3406
3407/* Initialize an entry in the stub hash table. */
3408
3409static struct bfd_hash_entry *
3410stub_hash_newfunc (struct bfd_hash_entry *entry,
3411 struct bfd_hash_table *table, const char *string)
3412{
3413 /* Allocate the structure if it has not already been allocated by a
3414 subclass. */
3415 if (entry == NULL)
3416 {
3417 entry = bfd_hash_allocate (table,
3418 sizeof (struct
cec5225b 3419 elf_aarch64_stub_hash_entry));
a06ea964
NC		 3420 if (entry == NULL)
3421 return entry;
3422 }
3423
3424 /* Call the allocation method of the superclass. */
3425 entry = bfd_hash_newfunc (entry, table, string);
3426 if (entry != NULL)
3427 {
cec5225b 3428 struct elf_aarch64_stub_hash_entry *eh;
a06ea964
NC		 3429
3430 /* Initialize the local fields. */
cec5225b 3431 eh = (struct elf_aarch64_stub_hash_entry *) entry;
4106101c 3432 eh->adrp_offset = 0;
a06ea964
NC		 3433 eh->stub_sec = NULL;
3434 eh->stub_offset = 0;
3435 eh->target_value = 0;
3436 eh->target_section = NULL;
3437 eh->stub_type = aarch64_stub_none;
3438 eh->h = NULL;
3439 eh->id_sec = NULL;
3440 }
3441
3442 return entry;
3443}
3444
ece841e8
MM		 3445static hashval_t
3446c64_tls_data_stub_hash (const void *ptr)
3447{
3448 struct elf_c64_tls_data_stub_hash_entry *entry
3449 = (struct elf_c64_tls_data_stub_hash_entry *) ptr;
3450 if (entry->h)
3451 return htab_hash_pointer (entry->h);
3452 struct elf_aarch64_local_symbol *l;
3453 l = elf_aarch64_locals (entry->input_bfd);
3454 return htab_hash_pointer (l + entry->r_symndx);
3455}
3456
3457static int
3458c64_tls_data_stub_eq (const void *ptr1, const void *ptr2)
3459{
3460 struct elf_c64_tls_data_stub_hash_entry *entry1
3461 = (struct elf_c64_tls_data_stub_hash_entry *) ptr1;
3462 struct elf_c64_tls_data_stub_hash_entry *entry2
3463 = (struct elf_c64_tls_data_stub_hash_entry *) ptr2;
3464
3465 if (entry1->h && !entry2->h)
3466 return 0;
3467 if (!entry1->h && entry2->h)
3468 return 0;
3469 if (entry1->h && entry2->h)
3470 return entry1->h == entry2->h;
3471
3472 if (entry1->input_bfd != entry2->input_bfd)
3473 return 0;
3474 return entry1->r_symndx == entry2->r_symndx;
3475}
3476
3477static bfd_boolean
3478c64_record_tls_stub (struct elf_aarch64_link_hash_table *htab,
3479 bfd *input_bfd,
3480 struct elf_link_hash_entry *h,
3481 unsigned long r_symndx)
3482{
3483 if (htab->root.dynobj == NULL)
3484 htab->root.dynobj = input_bfd;
3485
3486 if (!htab->sc64_tls_stubs)
3487 {
3488 asection *stub_sec;
3489 flagword flags;
3490
3491 flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY
3492 | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_KEEP
3493 | SEC_LINKER_CREATED);
3494 /* Using the .rodata section is ABI -- N.b. I do have an outstanding
3495 clarification on this on the ABI PR.
3496 https://github.com/ARM-software/abi-aa/pull/80 */
3497 stub_sec = bfd_make_section_anyway_with_flags
3498 (htab->root.dynobj, ".rodata", flags);
3499 if (stub_sec == NULL)
3500 return FALSE;
3501
3502 /* Section contains stubs of 64 bit values, hence requires 8 byte
3503 alignment. */
3504 bfd_set_section_alignment (stub_sec, 3);
3505 htab->sc64_tls_stubs = stub_sec;
3506 BFD_ASSERT (htab->sc64_tls_stubs->size == 0);
3507 }
3508
3509 if (h)
3510 BFD_ASSERT (h->type == STT_TLS);
3511
3512 void **slot;
3513 struct elf_c64_tls_data_stub_hash_entry e, *new_entry;
3514 e.h = (struct elf_aarch64_link_hash_entry *)h;
3515 e.r_symndx = r_symndx;
3516 e.input_bfd = input_bfd;
3517
3518 slot = htab_find_slot (htab->c64_tls_data_stub_hash_table, &e, INSERT);
3519 if (!slot)
3520 return FALSE;
3521
3522 if (*slot)
3523 return TRUE;
3524 new_entry = (struct elf_c64_tls_data_stub_hash_entry *)
3525 objalloc_alloc ((struct objalloc *) htab->tls_data_stub_memory,
3526 sizeof (struct elf_c64_tls_data_stub_hash_entry));
3527 if (new_entry)
3528 {
3529 new_entry->h = (struct elf_aarch64_link_hash_entry *)h;
3530 new_entry->r_symndx = r_symndx;
3531 new_entry->input_bfd = input_bfd;
3532 new_entry->tls_stub_offset = htab->sc64_tls_stubs->size;
3533 new_entry->populated = FALSE;
3534 /* Size of a Morello data stub is 2 * 8 byte integers. */
3535 htab->sc64_tls_stubs->size += 16;
3536 *slot = new_entry;
3537 return TRUE;
3538 }
3539 return FALSE;
3540}
3541
3542static struct elf_c64_tls_data_stub_hash_entry *
3543c64_tls_stub_find (struct elf_link_hash_entry *h,
3544 bfd *input_bfd,
3545 unsigned long r_symndx,
3546 struct elf_aarch64_link_hash_table *htab)
3547{
3548 void *ret;
3549 struct elf_c64_tls_data_stub_hash_entry e;
3550 e.h = (struct elf_aarch64_link_hash_entry *)h;
3551 e.r_symndx = r_symndx;
3552 e.input_bfd = input_bfd;
3553
3554 ret = htab_find (htab->c64_tls_data_stub_hash_table, &e);
3555 return (struct elf_c64_tls_data_stub_hash_entry *)ret;
3556}
3557
36b60023
MM		 3558static hashval_t
3559c64_ifunc_capinit_hash (const void *ptr)
3560{
3561 struct elf_c64_ifunc_capinit_record *entry
3562 = (struct elf_c64_ifunc_capinit_record *) ptr;
3563 return htab_hash_pointer (entry->h);
3564}
3565
3566static int
3567c64_ifunc_capinit_eq (const void *ptr1, const void *ptr2)
3568{
3569 struct elf_c64_ifunc_capinit_record *entry1
3570 = (struct elf_c64_ifunc_capinit_record *) ptr1;
3571 struct elf_c64_ifunc_capinit_record *entry2
3572 = (struct elf_c64_ifunc_capinit_record *) ptr2;
3573
3574 return entry1->h == entry2->h;
3575}
3576
3577static bfd_boolean
3578c64_record_ifunc_capinit (struct elf_aarch64_link_hash_table *htab,
3579 struct elf_link_hash_entry *h)
3580{
3581 BFD_ASSERT (h && h->type == STT_GNU_IFUNC);
3582 struct elf_c64_ifunc_capinit_record e, *new_entry;
3583 e.h = h;
3584 void **slot = htab_find_slot (htab->c64_ifunc_capinit_hash_table, &e,
3585 INSERT);
3586 if (!slot)
3587 return FALSE;
3588 if (*slot)
3589 {
3590 ((struct elf_c64_ifunc_capinit_record *)*slot)->count += 1;
3591 return TRUE;
3592 }
3593
3594 new_entry = (struct elf_c64_ifunc_capinit_record *)
3595 objalloc_alloc ((struct objalloc *) htab->c64_ifunc_capinit_memory,
3596 sizeof (struct elf_c64_ifunc_capinit_record));
3597 if (new_entry)
3598 {
3599 new_entry->h = h;
3600 new_entry->count = 1;
3601 *slot = new_entry;
3602 return TRUE;
3603 }
3604 return FALSE;
3605}
3606
1419bbe5
WN		 3607/* Compute a hash of a local hash entry. We use elf_link_hash_entry
3608 for local symbol so that we can handle local STT_GNU_IFUNC symbols
3609 as global symbol. We reuse indx and dynstr_index for local symbol
3610 hash since they aren't used by global symbols in this backend. */
3611
3612static hashval_t
3613elfNN_aarch64_local_htab_hash (const void *ptr)
3614{
3615 struct elf_link_hash_entry *h
3616 = (struct elf_link_hash_entry *) ptr;
3617 return ELF_LOCAL_SYMBOL_HASH (h->indx, h->dynstr_index);
3618}
3619
3620/* Compare local hash entries. */
3621
3622static int
3623elfNN_aarch64_local_htab_eq (const void *ptr1, const void *ptr2)
3624{
3625 struct elf_link_hash_entry *h1
3626 = (struct elf_link_hash_entry *) ptr1;
3627 struct elf_link_hash_entry *h2
3628 = (struct elf_link_hash_entry *) ptr2;
3629
3630 return h1->indx == h2->indx && h1->dynstr_index == h2->dynstr_index;
3631}
3632
3633/* Find and/or create a hash entry for local symbol. */
3634
3635static struct elf_link_hash_entry *
3636elfNN_aarch64_get_local_sym_hash (struct elf_aarch64_link_hash_table *htab,
3637 bfd *abfd, const Elf_Internal_Rela *rel,
3638 bfd_boolean create)
3639{
3640 struct elf_aarch64_link_hash_entry e, *ret;
3641 asection *sec = abfd->sections;
3642 hashval_t h = ELF_LOCAL_SYMBOL_HASH (sec->id,
3643 ELFNN_R_SYM (rel->r_info));
3644 void **slot;
3645
3646 e.root.indx = sec->id;
3647 e.root.dynstr_index = ELFNN_R_SYM (rel->r_info);
3648 slot = htab_find_slot_with_hash (htab->loc_hash_table, &e, h,
3649 create ? INSERT : NO_INSERT);
3650
3651 if (!slot)
3652 return NULL;
3653
3654 if (*slot)
3655 {
3656 ret = (struct elf_aarch64_link_hash_entry *) *slot;
3657 return &ret->root;
3658 }
3659
3660 ret = (struct elf_aarch64_link_hash_entry *)
3661 objalloc_alloc ((struct objalloc *) htab->loc_hash_memory,
3662 sizeof (struct elf_aarch64_link_hash_entry));
3663 if (ret)
3664 {
3665 memset (ret, 0, sizeof (*ret));
3666 ret->root.indx = sec->id;
3667 ret->root.dynstr_index = ELFNN_R_SYM (rel->r_info);
3668 ret->root.dynindx = -1;
3669 *slot = ret;
3670 }
3671 return &ret->root;
3672}
a06ea964
NC		 3673
3674/* Copy the extra info we tack onto an elf_link_hash_entry. */
3675
3676static void
cec5225b 3677elfNN_aarch64_copy_indirect_symbol (struct bfd_link_info *info,
a06ea964
NC		 3678 struct elf_link_hash_entry *dir,
3679 struct elf_link_hash_entry *ind)
3680{
cec5225b 3681 struct elf_aarch64_link_hash_entry *edir, *eind;
a06ea964 3682
cec5225b
YZ		 3683 edir = (struct elf_aarch64_link_hash_entry *) dir;
3684 eind = (struct elf_aarch64_link_hash_entry *) ind;
a06ea964 3685
a06ea964
NC		 3686 if (ind->root.type == bfd_link_hash_indirect)
3687 {
3688 /* Copy over PLT info. */
3689 if (dir->got.refcount <= 0)
3690 {
3691 edir->got_type = eind->got_type;
3692 eind->got_type = GOT_UNKNOWN;
3693 }
3694 }
3695
ece841e8
MM		 3696 /* This function is called to take the indirect symbol information from eind
3697 and put it onto edir. We never create a TLS data stub for a symbol which
3698 needs such a transformation, hence there is no need to worry about
3699 removing the hash entry for the indirected symbol and ensuring there is
3700 now one for the final one. */
3701 BFD_ASSERT (!c64_tls_stub_find (ind, NULL, 0,
3702 elf_aarch64_hash_table (info)));
a06ea964
NC		 3703 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3704}
3705
823710d5
SN		 3706/* Merge non-visibility st_other attributes. */
3707
3708static void
3709elfNN_aarch64_merge_symbol_attribute (struct elf_link_hash_entry *h,
3710 const Elf_Internal_Sym *isym,
3711 bfd_boolean definition ATTRIBUTE_UNUSED,
3712 bfd_boolean dynamic ATTRIBUTE_UNUSED)
3713{
3714 unsigned int isym_sto = isym->st_other & ~ELF_ST_VISIBILITY (-1);
3715 unsigned int h_sto = h->other & ~ELF_ST_VISIBILITY (-1);
3716
3717 if (isym_sto == h_sto)
3718 return;
3719
3720 if (isym_sto & ~STO_AARCH64_VARIANT_PCS)
3721 /* Not fatal, this callback cannot fail. */
3722 _bfd_error_handler (_("unknown attribute for symbol `%s': 0x%02x"),
3723 h->root.root.string, isym_sto);
3724
3725 /* Note: Ideally we would warn about any attribute mismatch, but
3726 this api does not allow that without substantial changes. */
3727 if (isym_sto & STO_AARCH64_VARIANT_PCS)
3728 h->other |= STO_AARCH64_VARIANT_PCS;
3729}
3730
68faa637
AM		 3731/* Destroy an AArch64 elf linker hash table. */
3732
3733static void
d495ab0d 3734elfNN_aarch64_link_hash_table_free (bfd *obfd)
68faa637
AM		 3735{
3736 struct elf_aarch64_link_hash_table *ret
d495ab0d 3737 = (struct elf_aarch64_link_hash_table *) obfd->link.hash;
68faa637
AM		 3738
3739 if (ret->loc_hash_table)
3740 htab_delete (ret->loc_hash_table);
3741 if (ret->loc_hash_memory)
3742 objalloc_free ((struct objalloc *) ret->loc_hash_memory);
3743
ece841e8
MM		 3744 if (ret->c64_tls_data_stub_hash_table)
3745 htab_delete (ret->c64_tls_data_stub_hash_table);
3746 if (ret->tls_data_stub_memory)
3747 objalloc_free ((struct objalloc *) ret->tls_data_stub_memory);
3748
36b60023
MM		 3749 if (ret->c64_ifunc_capinit_hash_table)
3750 htab_delete (ret->c64_ifunc_capinit_hash_table);
3751 if (ret->c64_ifunc_capinit_memory)
3752 objalloc_free ((struct objalloc *) ret->c64_ifunc_capinit_memory);
3753
68faa637 3754 bfd_hash_table_free (&ret->stub_hash_table);
d495ab0d 3755 _bfd_elf_link_hash_table_free (obfd);
68faa637
AM		 3756}
3757
a06ea964
NC		 3758/* Create an AArch64 elf linker hash table. */
3759
3760static struct bfd_link_hash_table *
cec5225b 3761elfNN_aarch64_link_hash_table_create (bfd *abfd)
a06ea964 3762{
cec5225b 3763 struct elf_aarch64_link_hash_table *ret;
986f0783 3764 size_t amt = sizeof (struct elf_aarch64_link_hash_table);
a06ea964 3765
7bf52ea2 3766 ret = bfd_zmalloc (amt);
a06ea964
NC		 3767 if (ret == NULL)
3768 return NULL;
3769
3770 if (!_bfd_elf_link_hash_table_init
cec5225b
YZ		 3771 (&ret->root, abfd, elfNN_aarch64_link_hash_newfunc,
3772 sizeof (struct elf_aarch64_link_hash_entry), AARCH64_ELF_DATA))
a06ea964
NC		 3773 {
3774 free (ret);
3775 return NULL;
3776 }
3777
a06ea964 3778 ret->plt_header_size = PLT_ENTRY_SIZE;
37c18eed 3779 ret->plt0_entry = elfNN_aarch64_small_plt0_entry;
a06ea964 3780 ret->plt_entry_size = PLT_SMALL_ENTRY_SIZE;
37c18eed
SD		 3781 ret->plt_entry = elfNN_aarch64_small_plt_entry;
3782 ret->tlsdesc_plt_entry_size = PLT_TLSDESC_ENTRY_SIZE;
a06ea964 3783 ret->obfd = abfd;
9bcc30e4 3784 ret->root.tlsdesc_got = (bfd_vma) - 1;
a06ea964
NC		 3785
3786 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
cec5225b 3787 sizeof (struct elf_aarch64_stub_hash_entry)))
a06ea964 3788 {
d495ab0d 3789 _bfd_elf_link_hash_table_free (abfd);
a06ea964
NC		 3790 return NULL;
3791 }
3792
ece841e8
MM		 3793 ret->c64_tls_data_stub_hash_table
3794 = htab_try_create (256, c64_tls_data_stub_hash, c64_tls_data_stub_eq,
3795 NULL);
3796 ret->tls_data_stub_memory = objalloc_create ();
3797 if (!ret->c64_tls_data_stub_hash_table || !ret->tls_data_stub_memory)
3798 {
3799 elfNN_aarch64_link_hash_table_free (abfd);
3800 return NULL;
3801 }
3802
36b60023
MM		 3803 ret->c64_ifunc_capinit_hash_table
3804 = htab_try_create (256, c64_ifunc_capinit_hash, c64_ifunc_capinit_eq,
3805 NULL);
3806 ret->c64_ifunc_capinit_memory = objalloc_create ();
3807 if (!ret->c64_ifunc_capinit_hash_table || !ret->c64_ifunc_capinit_memory)
3808 {
3809 elfNN_aarch64_link_hash_table_free (abfd);
3810 return NULL;
3811 }
3812
1419bbe5
WN		 3813 ret->loc_hash_table = htab_try_create (1024,
3814 elfNN_aarch64_local_htab_hash,
3815 elfNN_aarch64_local_htab_eq,
3816 NULL);
3817 ret->loc_hash_memory = objalloc_create ();
3818 if (!ret->loc_hash_table || !ret->loc_hash_memory)
3819 {
d495ab0d 3820 elfNN_aarch64_link_hash_table_free (abfd);
1419bbe5
WN		 3821 return NULL;
3822 }
d495ab0d 3823 ret->root.root.hash_table_free = elfNN_aarch64_link_hash_table_free;
1419bbe5 3824
a06ea964
NC		 3825 return &ret->root.root;
3826}
3827
1d75a8e2
NC		 3828/* Perform relocation R_TYPE. Returns TRUE upon success, FALSE otherwise. */
3829
a06ea964
NC		 3830static bfd_boolean
3831aarch64_relocate (unsigned int r_type, bfd *input_bfd, asection *input_section,
3832 bfd_vma offset, bfd_vma value)
3833{
3834 reloc_howto_type *howto;
3835 bfd_vma place;
3836
0aa13fee 3837 howto = elfNN_aarch64_howto_from_type (input_bfd, r_type);
a06ea964
NC		 3838 place = (input_section->output_section->vma + input_section->output_offset
3839 + offset);
caed7120 3840
0aa13fee 3841 r_type = elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type);
652afeef
TC		 3842 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, r_type, place,
3843 value, 0, FALSE);
caed7120
YZ		 3844 return _bfd_aarch64_elf_put_addend (input_bfd,
3845 input_section->contents + offset, r_type,
1d75a8e2 3846 howto, value) == bfd_reloc_ok;
a06ea964
NC		 3847}
3848
50e192f0
SP		 3849/* Return interworking stub for a relocation. */
3850
3851static enum elf_aarch64_stub_type
3852aarch64_interwork_stub (unsigned int r_type,
3853 bfd_boolean branch_to_c64)
3854{
3855 switch (r_type)
3856 {
3857 case MORELLO_R (JUMP26):
3858 case MORELLO_R (CALL26):
3859 if (!branch_to_c64)
3860 return c64_stub_branch_aarch64;
3861 break;
3862 case AARCH64_R (JUMP26):
3863 case AARCH64_R (CALL26):
3864 if (branch_to_c64)
3865 return aarch64_stub_branch_c64;
3866 break;
3867 default:
3868 break;
3869 }
3870
3871 return aarch64_stub_none;
3872}
3873
cec5225b 3874static enum elf_aarch64_stub_type
a06ea964
NC		 3875aarch64_select_branch_stub (bfd_vma value, bfd_vma place)
3876{
3877 if (aarch64_valid_for_adrp_p (value, place))
3878 return aarch64_stub_adrp_branch;
3879 return aarch64_stub_long_branch;
3880}
3881
3882/* Determine the type of stub needed, if any, for a call. */
3883
cec5225b 3884static enum elf_aarch64_stub_type
9a228467 3885aarch64_type_of_stub (asection *input_sec,
a06ea964 3886 const Elf_Internal_Rela *rel,
f678ded7 3887 asection *sym_sec,
a06ea964 3888 unsigned char st_type,
a06ea964
NC		 3889 bfd_vma destination)
3890{
3891 bfd_vma location;
3892 bfd_signed_vma branch_offset;
50e192f0 3893 unsigned int r_type = ELFNN_R_TYPE (rel->r_info);
cec5225b 3894 enum elf_aarch64_stub_type stub_type = aarch64_stub_none;
a06ea964 3895
f678ded7 3896 if (st_type != STT_FUNC
2f340668 3897 && (sym_sec == input_sec))
a06ea964
NC		 3898 return stub_type;
3899
a06ea964
NC		 3900 /* Determine where the call point is. */
3901 location = (input_sec->output_offset
3902 + input_sec->output_section->vma + rel->r_offset);
3903
3904 branch_offset = (bfd_signed_vma) (destination - location);
3905
50e192f0
SP		 3906 /* For A64 <-> C64 branches we only come here for jumps to PLT. Treat them
3907 as regular branches and leave the interworking to PLT. */
3908 if (branch_offset > AARCH64_MAX_FWD_BRANCH_OFFSET
3909 || branch_offset < AARCH64_MAX_BWD_BRANCH_OFFSET)
a06ea964 3910 {
50e192f0
SP		 3911 switch (r_type)
3912 {
3913 /* We don't want to redirect any old unconditional jump in this way,
3914 only one which is being used for a sibcall, where it is
3915 acceptable for the IP0 and IP1 registers to be clobbered. */
3916 case AARCH64_R (CALL26):
3917 case AARCH64_R (JUMP26):
3918 return aarch64_stub_long_branch;
3919 case MORELLO_R (CALL26):
3920 case MORELLO_R (JUMP26):
3921 return c64_stub_branch_c64;
3922 default:
3923 break;
3924 }
a06ea964
NC		 3925 }
3926
50e192f0
SP		 3927 return aarch64_stub_none;
3928}
3929
3930/* Return a string to add as suffix to a veneer name. */
3931
3932static const char *
3933aarch64_lookup_stub_type_suffix (enum elf_aarch64_stub_type stub_type)
3934{
3935 switch (stub_type)
3936 {
3937 case aarch64_stub_branch_c64:
3938 return "_a64c64";
3939 case c64_stub_branch_aarch64:
3940 return "_c64a64";
3941 break;
3942 default:
3943 return "";
3944 }
a06ea964
NC		 3945}
3946
3947/* Build a name for an entry in the stub hash table. */
3948
3949static char *
cec5225b 3950elfNN_aarch64_stub_name (const asection *input_section,
a06ea964 3951 const asection *sym_sec,
cec5225b 3952 const struct elf_aarch64_link_hash_entry *hash,
50e192f0
SP		 3953 const Elf_Internal_Rela *rel,
3954 enum elf_aarch64_stub_type stub_type)
a06ea964
NC		 3955{
3956 char *stub_name;
3957 bfd_size_type len;
50e192f0 3958 const char *suffix = aarch64_lookup_stub_type_suffix (stub_type);;
a06ea964
NC		 3959
3960 if (hash)
3961 {
3962 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 16 + 1;
3963 stub_name = bfd_malloc (len);
3964 if (stub_name != NULL)
50e192f0 3965 snprintf (stub_name, len, "%08x_%s%s+%" BFD_VMA_FMT "x",
a06ea964
NC		 3966 (unsigned int) input_section->id,
3967 hash->root.root.root.string,
50e192f0 3968 suffix, rel->r_addend);
a06ea964
NC		 3969 }
3970 else
3971 {
3972 len = 8 + 1 + 8 + 1 + 8 + 1 + 16 + 1;
3973 stub_name = bfd_malloc (len);
3974 if (stub_name != NULL)
50e192f0 3975 snprintf (stub_name, len, "%08x_%x:%x%s+%" BFD_VMA_FMT "x",
a06ea964
NC		 3976 (unsigned int) input_section->id,
3977 (unsigned int) sym_sec->id,
cec5225b 3978 (unsigned int) ELFNN_R_SYM (rel->r_info),
50e192f0 3979 suffix, rel->r_addend);
a06ea964
NC		 3980 }
3981
3982 return stub_name;
3983}
3984
7f784814
JW		 3985/* Return TRUE if symbol H should be hashed in the `.gnu.hash' section. For
3986 executable PLT slots where the executable never takes the address of those
3987 functions, the function symbols are not added to the hash table. */
3988
3989static bfd_boolean
3990elf_aarch64_hash_symbol (struct elf_link_hash_entry *h)
3991{
3992 if (h->plt.offset != (bfd_vma) -1
3993 && !h->def_regular
3994 && !h->pointer_equality_needed)
3995 return FALSE;
3996
3997 return _bfd_elf_hash_symbol (h);
3998}
3999
a06ea964
NC		 4000/* Look up an entry in the stub hash. Stub entries are cached because
4001 creating the stub name takes a bit of time. */
4002
cec5225b
YZ		 4003static struct elf_aarch64_stub_hash_entry *
4004elfNN_aarch64_get_stub_entry (const asection *input_section,
a06ea964
NC		 4005 const asection *sym_sec,
4006 struct elf_link_hash_entry *hash,
4007 const Elf_Internal_Rela *rel,
50e192f0
SP		 4008 struct elf_aarch64_link_hash_table *htab,
4009 enum elf_aarch64_stub_type stub_type)
a06ea964 4010{
cec5225b
YZ		 4011 struct elf_aarch64_stub_hash_entry *stub_entry;
4012 struct elf_aarch64_link_hash_entry *h =
4013 (struct elf_aarch64_link_hash_entry *) hash;
a06ea964
NC		 4014 const asection *id_sec;
4015
4016 if ((input_section->flags & SEC_CODE) == 0)
4017 return NULL;
4018
4019 /* If this input section is part of a group of sections sharing one
4020 stub section, then use the id of the first section in the group.
4021 Stub names need to include a section id, as there may well be
4022 more than one stub used to reach say, printf, and we need to
4023 distinguish between them. */
4024 id_sec = htab->stub_group[input_section->id].link_sec;
4025
4026 if (h != NULL && h->stub_cache != NULL
4027 && h->stub_cache->h == h && h->stub_cache->id_sec == id_sec)
4028 {
4029 stub_entry = h->stub_cache;
4030 }
4031 else
4032 {
4033 char *stub_name;
4034
50e192f0 4035 stub_name = elfNN_aarch64_stub_name (id_sec, sym_sec, h, rel, stub_type);
a06ea964
NC		 4036 if (stub_name == NULL)
4037 return NULL;
4038
4039 stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table,
4040 stub_name, FALSE, FALSE);
4041 if (h != NULL)
4042 h->stub_cache = stub_entry;
4043
4044 free (stub_name);
4045 }
4046
4047 return stub_entry;
4048}
4049
a06ea964 4050
66585675
MS		 4051/* Create a stub section. */
4052
4053static asection *
4054_bfd_aarch64_create_stub_section (asection *section,
4055 struct elf_aarch64_link_hash_table *htab)
4056{
4057 size_t namelen;
4058 bfd_size_type len;
4059 char *s_name;
4060
4061 namelen = strlen (section->name);
4062 len = namelen + sizeof (STUB_SUFFIX);
4063 s_name = bfd_alloc (htab->stub_bfd, len);
4064 if (s_name == NULL)
4065 return NULL;
4066
4067 memcpy (s_name, section->name, namelen);
4068 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4069 return (*htab->add_stub_section) (s_name, section);
4070}
4071
4072
fc6d53be
MS		 4073/* Find or create a stub section for a link section.
4074
4075 Fix or create the stub section used to collect stubs attached to
4076 the specified link section. */
4077
4078static asection *
4079_bfd_aarch64_get_stub_for_link_section (asection *link_section,
4080 struct elf_aarch64_link_hash_table *htab)
4081{
4082 if (htab->stub_group[link_section->id].stub_sec == NULL)
4083 htab->stub_group[link_section->id].stub_sec
4084 = _bfd_aarch64_create_stub_section (link_section, htab);
4085 return htab->stub_group[link_section->id].stub_sec;
4086}
4087
4088
ef857521
MS		 4089/* Find or create a stub section in the stub group for an input
4090 section. */
4091
4092static asection *
4093_bfd_aarch64_create_or_find_stub_sec (asection *section,
4094 struct elf_aarch64_link_hash_table *htab)
a06ea964 4095{
fc6d53be
MS		 4096 asection *link_sec = htab->stub_group[section->id].link_sec;
4097 return _bfd_aarch64_get_stub_for_link_section (link_sec, htab);
ef857521
MS		 4098}
4099
4100
4101/* Add a new stub entry in the stub group associated with an input
4102 section to the stub hash. Not all fields of the new stub entry are
4103 initialised. */
4104
4105static struct elf_aarch64_stub_hash_entry *
4106_bfd_aarch64_add_stub_entry_in_group (const char *stub_name,
4107 asection *section,
4108 struct elf_aarch64_link_hash_table *htab)
4109{
4110 asection *link_sec;
4111 asection *stub_sec;
4112 struct elf_aarch64_stub_hash_entry *stub_entry;
4113
4114 link_sec = htab->stub_group[section->id].link_sec;
4115 stub_sec = _bfd_aarch64_create_or_find_stub_sec (section, htab);
4116
a06ea964
NC		 4117 /* Enter this entry into the linker stub hash table. */
4118 stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4119 TRUE, FALSE);
4120 if (stub_entry == NULL)
4121 {
695344c0 4122 /* xgettext:c-format */
871b3ab2 4123 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4eca0228 4124 section->owner, stub_name);
a06ea964
NC		 4125 return NULL;
4126 }
4127
4128 stub_entry->stub_sec = stub_sec;
4129 stub_entry->stub_offset = 0;
4130 stub_entry->id_sec = link_sec;
4131
4132 return stub_entry;
4133}
4134
4106101c
MS		 4135/* Add a new stub entry in the final stub section to the stub hash.
4136 Not all fields of the new stub entry are initialised. */
4137
4138static struct elf_aarch64_stub_hash_entry *
4139_bfd_aarch64_add_stub_entry_after (const char *stub_name,
4140 asection *link_section,
4141 struct elf_aarch64_link_hash_table *htab)
4142{
4143 asection *stub_sec;
4144 struct elf_aarch64_stub_hash_entry *stub_entry;
4145
739b5c9c
TC		 4146 stub_sec = NULL;
4147 /* Only create the actual stub if we will end up needing it. */
4148 if (htab->fix_erratum_843419 & ERRAT_ADRP)
4149 stub_sec = _bfd_aarch64_get_stub_for_link_section (link_section, htab);
4106101c
MS		 4150 stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4151 TRUE, FALSE);
4152 if (stub_entry == NULL)
4153 {
4eca0228 4154 _bfd_error_handler (_("cannot create stub entry %s"), stub_name);
4106101c
MS		 4155 return NULL;
4156 }
4157
4158 stub_entry->stub_sec = stub_sec;
4159 stub_entry->stub_offset = 0;
4160 stub_entry->id_sec = link_section;
4161
4162 return stub_entry;
4163}
4164
4165
a06ea964
NC		 4166static bfd_boolean
4167aarch64_build_one_stub (struct bfd_hash_entry *gen_entry,
abf874aa 4168 void *in_arg)
a06ea964 4169{
cec5225b 4170 struct elf_aarch64_stub_hash_entry *stub_entry;
a06ea964
NC		 4171 asection *stub_sec;
4172 bfd *stub_bfd;
4173 bfd_byte *loc;
4174 bfd_vma sym_value;
68fcca92
JW		 4175 bfd_vma veneered_insn_loc;
4176 bfd_vma veneer_entry_loc;
4177 bfd_signed_vma branch_offset = 0;
a06ea964
NC		 4178 unsigned int template_size;
4179 const uint32_t *template;
4180 unsigned int i;
abf874aa 4181 struct bfd_link_info *info;
a06ea964
NC		 4182
4183 /* Massage our args to the form they really have. */
cec5225b 4184 stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
a06ea964 4185
abf874aa
CL		 4186 info = (struct bfd_link_info *) in_arg;
4187
4188 /* Fail if the target section could not be assigned to an output
4189 section. The user should fix his linker script. */
4190 if (stub_entry->target_section->output_section == NULL
4191 && info->non_contiguous_regions)
53215f21
CL		 4192 info->callbacks->einfo (_("%F%P: Could not assign '%pA' to an output section. "
4193 "Retry without "
4194 "--enable-non-contiguous-regions.\n"),
4195 stub_entry->target_section);
abf874aa 4196
a06ea964
NC		 4197 stub_sec = stub_entry->stub_sec;
4198
4199 /* Make a note of the offset within the stubs for this entry. */
4200 stub_entry->stub_offset = stub_sec->size;
4201 loc = stub_sec->contents + stub_entry->stub_offset;
4202
4203 stub_bfd = stub_sec->owner;
4204
4205 /* This is the address of the stub destination. */
4206 sym_value = (stub_entry->target_value
4207 + stub_entry->target_section->output_offset
4208 + stub_entry->target_section->output_section->vma);
4209
50e192f0
SP		 4210 bfd_vma place = (stub_entry->stub_offset + stub_sec->output_section->vma
4211 + stub_sec->output_offset);
4212
a06ea964
NC		 4213 if (stub_entry->stub_type == aarch64_stub_long_branch)
4214 {
a06ea964
NC		 4215 /* See if we can relax the stub. */
4216 if (aarch64_valid_for_adrp_p (sym_value, place))
4217 stub_entry->stub_type = aarch64_select_branch_stub (sym_value, place);
4218 }
4219
50e192f0
SP		 4220 if ((stub_entry->stub_type == aarch64_stub_branch_c64
4221 || stub_entry->stub_type == c64_stub_branch_aarch64
4222 || stub_entry->stub_type == c64_stub_branch_c64)
4223 && !c64_valid_for_adrp_p (sym_value, place))
4224 {
4225 _bfd_error_handler
4226 (_("%s: stub target out of range for %s branch"),
4227 stub_entry->output_name,
4228 (stub_entry->stub_type == aarch64_stub_branch_c64
4229 ? "A64 to C64" : "C64 to A64"));
4230 bfd_set_error (bfd_error_bad_value);
4231 return FALSE;
4232 }
4233
a06ea964
NC		 4234 switch (stub_entry->stub_type)
4235 {
4236 case aarch64_stub_adrp_branch:
4237 template = aarch64_adrp_branch_stub;
4238 template_size = sizeof (aarch64_adrp_branch_stub);
4239 break;
4240 case aarch64_stub_long_branch:
4241 template = aarch64_long_branch_stub;
4242 template_size = sizeof (aarch64_long_branch_stub);
4243 break;
68fcca92
JW		 4244 case aarch64_stub_erratum_835769_veneer:
4245 template = aarch64_erratum_835769_stub;
4246 template_size = sizeof (aarch64_erratum_835769_stub);
4247 break;
4106101c
MS		 4248 case aarch64_stub_erratum_843419_veneer:
4249 template = aarch64_erratum_843419_stub;
4250 template_size = sizeof (aarch64_erratum_843419_stub);
4251 break;
50e192f0
SP		 4252 case aarch64_stub_branch_c64:
4253 template = aarch64_c64_branch_stub;
4254 template_size = sizeof (aarch64_c64_branch_stub);
4255 break;
4256 case c64_stub_branch_aarch64:
4257 case c64_stub_branch_c64:
4258 template = c64_aarch64_branch_stub;
4259 template_size = sizeof (c64_aarch64_branch_stub);
4260 break;
a06ea964 4261 default:
8e2fe09f 4262 abort ();
a06ea964
NC		 4263 }
4264
4265 for (i = 0; i < (template_size / sizeof template[0]); i++)
4266 {
4267 bfd_putl32 (template[i], loc);
4268 loc += 4;
4269 }
4270
4271 template_size = (template_size + 7) & ~7;
4272 stub_sec->size += template_size;
4273
50e192f0
SP		 4274 bfd_vma stub_offset = stub_entry->stub_offset;
4275
a06ea964
NC		 4276 switch (stub_entry->stub_type)
4277 {
4278 case aarch64_stub_adrp_branch:
1d75a8e2
NC		 4279 if (!aarch64_relocate (AARCH64_R (ADR_PREL_PG_HI21), stub_bfd, stub_sec,
4280 stub_entry->stub_offset, sym_value))
a06ea964
NC		 4281 /* The stub would not have been relaxed if the offset was out
4282 of range. */
4283 BFD_FAIL ();
4284
1d75a8e2
NC		 4285 if (!aarch64_relocate (AARCH64_R (ADD_ABS_LO12_NC), stub_bfd, stub_sec,
4286 stub_entry->stub_offset + 4, sym_value))
93ca8569 4287 BFD_FAIL ();
a06ea964
NC		 4288 break;
4289
4290 case aarch64_stub_long_branch:
4291 /* We want the value relative to the address 12 bytes back from the
07d6d2b8 4292 value itself. */
1d75a8e2
NC		 4293 if (!aarch64_relocate (AARCH64_R (PRELNN), stub_bfd, stub_sec,
4294 stub_entry->stub_offset + 16, sym_value + 12))
93ca8569 4295 BFD_FAIL ();
a06ea964 4296 break;
68fcca92
JW		 4297
4298 case aarch64_stub_erratum_835769_veneer:
4299 veneered_insn_loc = stub_entry->target_section->output_section->vma
4300 + stub_entry->target_section->output_offset
4301 + stub_entry->target_value;
4302 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
4303 + stub_entry->stub_sec->output_offset
4304 + stub_entry->stub_offset;
4305 branch_offset = veneered_insn_loc - veneer_entry_loc;
4306 branch_offset >>= 2;
4307 branch_offset &= 0x3ffffff;
4308 bfd_putl32 (stub_entry->veneered_insn,
4309 stub_sec->contents + stub_entry->stub_offset);
4310 bfd_putl32 (template[1] | branch_offset,
4311 stub_sec->contents + stub_entry->stub_offset + 4);
4312 break;
4313
4106101c 4314 case aarch64_stub_erratum_843419_veneer:
1d75a8e2
NC		 4315 if (!aarch64_relocate (AARCH64_R (JUMP26), stub_bfd, stub_sec,
4316 stub_entry->stub_offset + 4, sym_value + 4))
4106101c
MS		 4317 BFD_FAIL ();
4318 break;
4319
50e192f0
SP		 4320 case aarch64_stub_branch_c64:
4321 stub_offset += 4;
4322 /* Fall through. */
4323 case c64_stub_branch_aarch64:
4324 case c64_stub_branch_c64:
4325 if (!aarch64_relocate (R_MORELLO_ADR_PREL_PG_HI20, stub_bfd, stub_sec,
4326 stub_offset, sym_value))
4327 /* We fail early if offset is out of range. */
4328 BFD_FAIL ();
4329
4330 if (!aarch64_relocate (AARCH64_R (ADD_ABS_LO12_NC), stub_bfd, stub_sec,
4331 stub_offset + 4, sym_value))
4332 BFD_FAIL ();
4333 break;
4334
a06ea964 4335 default:
8e2fe09f 4336 abort ();
a06ea964
NC		 4337 }
4338
4339 return TRUE;
4340}
4341
4342/* As above, but don't actually build the stub. Just bump offset so
4343 we know stub section sizes. */
4344
4345static bfd_boolean
739b5c9c 4346aarch64_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
a06ea964 4347{
cec5225b 4348 struct elf_aarch64_stub_hash_entry *stub_entry;
739b5c9c 4349 struct elf_aarch64_link_hash_table *htab;
a06ea964
NC		 4350 int size;
4351
4352 /* Massage our args to the form they really have. */
cec5225b 4353 stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
739b5c9c 4354 htab = (struct elf_aarch64_link_hash_table *) in_arg;
a06ea964
NC		 4355
4356 switch (stub_entry->stub_type)
4357 {
4358 case aarch64_stub_adrp_branch:
4359 size = sizeof (aarch64_adrp_branch_stub);
4360 break;
4361 case aarch64_stub_long_branch:
4362 size = sizeof (aarch64_long_branch_stub);
4363 break;
68fcca92
JW		 4364 case aarch64_stub_erratum_835769_veneer:
4365 size = sizeof (aarch64_erratum_835769_stub);
4366 break;
4106101c 4367 case aarch64_stub_erratum_843419_veneer:
739b5c9c
TC		 4368 {
4369 if (htab->fix_erratum_843419 == ERRAT_ADR)
4370 return TRUE;
4371 size = sizeof (aarch64_erratum_843419_stub);
4372 }
4106101c 4373 break;
50e192f0
SP		 4374 case aarch64_stub_branch_c64:
4375 size = sizeof (aarch64_c64_branch_stub);
4376 break;
4377 case c64_stub_branch_aarch64:
4378 case c64_stub_branch_c64:
4379 size = sizeof (c64_aarch64_branch_stub);
4380 break;
a06ea964 4381 default:
8e2fe09f 4382 abort ();
a06ea964
NC		 4383 }
4384
4385 size = (size + 7) & ~7;
4386 stub_entry->stub_sec->size += size;
4387 return TRUE;
4388}
4389
4390/* External entry points for sizing and building linker stubs. */
4391
4392/* Set up various things so that we can make a list of input sections
4393 for each output section included in the link. Returns -1 on error,
4394 0 when no stubs will be needed, and 1 on success. */
4395
4396int
cec5225b 4397elfNN_aarch64_setup_section_lists (bfd *output_bfd,
a06ea964
NC		 4398 struct bfd_link_info *info)
4399{
4400 bfd *input_bfd;
4401 unsigned int bfd_count;
7292b3ac 4402 unsigned int top_id, top_index;
a06ea964
NC		 4403 asection *section;
4404 asection **input_list, **list;
986f0783 4405 size_t amt;
cec5225b
YZ		 4406 struct elf_aarch64_link_hash_table *htab =
4407 elf_aarch64_hash_table (info);
a06ea964 4408
8504495a
AC		 4409 /* XXX: in practice, we believe this branch should never be taken.
4410 This function is only ever called from gld*_after_allocation
4411 (defined in ld/emultempl/aarch64elf.em), which can only ever be
4412 called if the LD emulation is an AArch64 ELF emulation. The branch
4413 can only be taken if the BFD backend is not an ELF backend. In
4414 practice, this isn't supported, see PR29649 for details. */
a06ea964
NC		 4415 if (!is_elf_hash_table (htab))
4416 return 0;
4417
4418 /* Count the number of input BFDs and find the top input section id. */
4419 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
c72f2fb2 4420 input_bfd != NULL; input_bfd = input_bfd->link.next)
a06ea964
NC		 4421 {
4422 bfd_count += 1;
4423 for (section = input_bfd->sections;
4424 section != NULL; section = section->next)
4425 {
4426 if (top_id < section->id)
4427 top_id = section->id;
4428 }
4429 }
4430 htab->bfd_count = bfd_count;
4431
4432 amt = sizeof (struct map_stub) * (top_id + 1);
4433 htab->stub_group = bfd_zmalloc (amt);
4434 if (htab->stub_group == NULL)
4435 return -1;
4436
4437 /* We can't use output_bfd->section_count here to find the top output
4438 section index as some sections may have been removed, and
4439 _bfd_strip_section_from_output doesn't renumber the indices. */
4440 for (section = output_bfd->sections, top_index = 0;
4441 section != NULL; section = section->next)
4442 {
4443 if (top_index < section->index)
4444 top_index = section->index;
4445 }
4446
4447 htab->top_index = top_index;
4448 amt = sizeof (asection *) * (top_index + 1);
4449 input_list = bfd_malloc (amt);
4450 htab->input_list = input_list;
4451 if (input_list == NULL)
4452 return -1;
4453
4454 /* For sections we aren't interested in, mark their entries with a
4455 value we can check later. */
4456 list = input_list + top_index;
4457 do
4458 *list = bfd_abs_section_ptr;
4459 while (list-- != input_list);
4460
4461 for (section = output_bfd->sections;
4462 section != NULL; section = section->next)
4463 {
4464 if ((section->flags & SEC_CODE) != 0)
4465 input_list[section->index] = NULL;
4466 }
4467
4468 return 1;
4469}
4470
cec5225b 4471/* Used by elfNN_aarch64_next_input_section and group_sections. */
a06ea964
NC		 4472#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4473
4474/* The linker repeatedly calls this function for each input section,
4475 in the order that input sections are linked into output sections.
4476 Build lists of input sections to determine groupings between which
4477 we may insert linker stubs. */
4478
4479void
cec5225b 4480elfNN_aarch64_next_input_section (struct bfd_link_info *info, asection *isec)
a06ea964 4481{
cec5225b
YZ		 4482 struct elf_aarch64_link_hash_table *htab =
4483 elf_aarch64_hash_table (info);
a06ea964
NC		 4484
4485 if (isec->output_section->index <= htab->top_index)
4486 {
4487 asection **list = htab->input_list + isec->output_section->index;
4488
cff69cf4 4489 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
a06ea964
NC		 4490 {
4491 /* Steal the link_sec pointer for our list. */
4492 /* This happens to make the list in reverse order,
4493 which is what we want. */
4494 PREV_SEC (isec) = *list;
4495 *list = isec;
4496 }
4497 }
4498}
4499
4500/* See whether we can group stub sections together. Grouping stub
4501 sections may result in fewer stubs. More importantly, we need to
4502 put all .init* and .fini* stubs at the beginning of the .init or
4503 .fini output sections respectively, because glibc splits the
4504 _init and _fini functions into multiple parts. Putting a stub in
4505 the middle of a function is not a good idea. */
4506
4507static void
cec5225b 4508group_sections (struct elf_aarch64_link_hash_table *htab,
a06ea964 4509 bfd_size_type stub_group_size,
cff69cf4 4510 bfd_boolean stubs_always_after_branch)
a06ea964 4511{
cff69cf4 4512 asection **list = htab->input_list;
a06ea964
NC		 4513
4514 do
4515 {
4516 asection *tail = *list;
cff69cf4 4517 asection *head;
a06ea964
NC		 4518
4519 if (tail == bfd_abs_section_ptr)
4520 continue;
4521
cff69cf4
WD		 4522 /* Reverse the list: we must avoid placing stubs at the
4523 beginning of the section because the beginning of the text
4524 section may be required for an interrupt vector in bare metal
4525 code. */
4526#define NEXT_SEC PREV_SEC
4527 head = NULL;
a06ea964 4528 while (tail != NULL)
cff69cf4
WD		 4529 {
4530 /* Pop from tail. */
4531 asection *item = tail;
4532 tail = PREV_SEC (item);
4533
4534 /* Push on head. */
4535 NEXT_SEC (item) = head;
4536 head = item;
4537 }
4538
4539 while (head != NULL)
a06ea964
NC		 4540 {
4541 asection *curr;
cff69cf4
WD		 4542 asection *next;
4543 bfd_vma stub_group_start = head->output_offset;
4544 bfd_vma end_of_next;
a06ea964 4545
cff69cf4
WD		 4546 curr = head;
4547 while (NEXT_SEC (curr) != NULL)
4548 {
4549 next = NEXT_SEC (curr);
4550 end_of_next = next->output_offset + next->size;
4551 if (end_of_next - stub_group_start >= stub_group_size)
4552 /* End of NEXT is too far from start, so stop. */
4553 break;
4554 /* Add NEXT to the group. */
4555 curr = next;
4556 }
a06ea964 4557
cff69cf4 4558 /* OK, the size from the start to the start of CURR is less
a06ea964 4559 than stub_group_size and thus can be handled by one stub
cff69cf4 4560 section. (Or the head section is itself larger than
a06ea964
NC		 4561 stub_group_size, in which case we may be toast.)
4562 We should really be keeping track of the total size of
4563 stubs added here, as stubs contribute to the final output
4564 section size. */
4565 do
4566 {
cff69cf4 4567 next = NEXT_SEC (head);
a06ea964 4568 /* Set up this stub group. */
cff69cf4 4569 htab->stub_group[head->id].link_sec = curr;
a06ea964 4570 }
cff69cf4 4571 while (head != curr && (head = next) != NULL);
a06ea964
NC		 4572
4573 /* But wait, there's more! Input sections up to stub_group_size
cff69cf4
WD		 4574 bytes after the stub section can be handled by it too. */
4575 if (!stubs_always_after_branch)
a06ea964 4576 {
cff69cf4
WD		 4577 stub_group_start = curr->output_offset + curr->size;
4578
4579 while (next != NULL)
a06ea964 4580 {
cff69cf4
WD		 4581 end_of_next = next->output_offset + next->size;
4582 if (end_of_next - stub_group_start >= stub_group_size)
4583 /* End of NEXT is too far from stubs, so stop. */
4584 break;
4585 /* Add NEXT to the stub group. */
4586 head = next;
4587 next = NEXT_SEC (head);
4588 htab->stub_group[head->id].link_sec = curr;
a06ea964
NC		 4589 }
4590 }
cff69cf4 4591 head = next;
a06ea964
NC		 4592 }
4593 }
cff69cf4 4594 while (list++ != htab->input_list + htab->top_index);
a06ea964
NC		 4595
4596 free (htab->input_list);
4597}
4598
cff69cf4 4599#undef PREV_SEC
a06ea964
NC		 4600#undef PREV_SEC
4601
68fcca92
JW		 4602#define AARCH64_BITS(x, pos, n) (((x) >> (pos)) & ((1 << (n)) - 1))
4603
4604#define AARCH64_RT(insn) AARCH64_BITS (insn, 0, 5)
4605#define AARCH64_RT2(insn) AARCH64_BITS (insn, 10, 5)
4606#define AARCH64_RA(insn) AARCH64_BITS (insn, 10, 5)
4607#define AARCH64_RD(insn) AARCH64_BITS (insn, 0, 5)
4608#define AARCH64_RN(insn) AARCH64_BITS (insn, 5, 5)
4609#define AARCH64_RM(insn) AARCH64_BITS (insn, 16, 5)
4610
4611#define AARCH64_MAC(insn) (((insn) & 0xff000000) == 0x9b000000)
4612#define AARCH64_BIT(insn, n) AARCH64_BITS (insn, n, 1)
4613#define AARCH64_OP31(insn) AARCH64_BITS (insn, 21, 3)
4614#define AARCH64_ZR 0x1f
4615
4616/* All ld/st ops. See C4-182 of the ARM ARM. The encoding space for
4617 LD_PCREL, LDST_RO, LDST_UI and LDST_UIMM cover prefetch ops. */
4618
4619#define AARCH64_LD(insn) (AARCH64_BIT (insn, 22) == 1)
4620#define AARCH64_LDST(insn) (((insn) & 0x0a000000) == 0x08000000)
4621#define AARCH64_LDST_EX(insn) (((insn) & 0x3f000000) == 0x08000000)
4622#define AARCH64_LDST_PCREL(insn) (((insn) & 0x3b000000) == 0x18000000)
4623#define AARCH64_LDST_NAP(insn) (((insn) & 0x3b800000) == 0x28000000)
4624#define AARCH64_LDSTP_PI(insn) (((insn) & 0x3b800000) == 0x28800000)
4625#define AARCH64_LDSTP_O(insn) (((insn) & 0x3b800000) == 0x29000000)
4626#define AARCH64_LDSTP_PRE(insn) (((insn) & 0x3b800000) == 0x29800000)
4627#define AARCH64_LDST_UI(insn) (((insn) & 0x3b200c00) == 0x38000000)
4628#define AARCH64_LDST_PIIMM(insn) (((insn) & 0x3b200c00) == 0x38000400)
4629#define AARCH64_LDST_U(insn) (((insn) & 0x3b200c00) == 0x38000800)
4630#define AARCH64_LDST_PREIMM(insn) (((insn) & 0x3b200c00) == 0x38000c00)
4631#define AARCH64_LDST_RO(insn) (((insn) & 0x3b200c00) == 0x38200800)
4632#define AARCH64_LDST_UIMM(insn) (((insn) & 0x3b000000) == 0x39000000)
4633#define AARCH64_LDST_SIMD_M(insn) (((insn) & 0xbfbf0000) == 0x0c000000)
4634#define AARCH64_LDST_SIMD_M_PI(insn) (((insn) & 0xbfa00000) == 0x0c800000)
4635#define AARCH64_LDST_SIMD_S(insn) (((insn) & 0xbf9f0000) == 0x0d000000)
4636#define AARCH64_LDST_SIMD_S_PI(insn) (((insn) & 0xbf800000) == 0x0d800000)
4637
3d14faea
MS		 4638/* Classify an INSN if it is indeed a load/store.
4639
4640 Return TRUE if INSN is a LD/ST instruction otherwise return FALSE.
4641
4642 For scalar LD/ST instructions PAIR is FALSE, RT is returned and RT2
4643 is set equal to RT.
4644
2d0ca824 4645 For LD/ST pair instructions PAIR is TRUE, RT and RT2 are returned. */
68fcca92
JW		 4646
4647static bfd_boolean
3d14faea 4648aarch64_mem_op_p (uint32_t insn, unsigned int *rt, unsigned int *rt2,
68fcca92
JW		 4649 bfd_boolean *pair, bfd_boolean *load)
4650{
4651 uint32_t opcode;
4652 unsigned int r;
4653 uint32_t opc = 0;
4654 uint32_t v = 0;
4655 uint32_t opc_v = 0;
4656
de194d85 4657 /* Bail out quickly if INSN doesn't fall into the load-store
68fcca92
JW		 4658 encoding space. */
4659 if (!AARCH64_LDST (insn))
4660 return FALSE;
4661
4662 *pair = FALSE;
4663 *load = FALSE;
4664 if (AARCH64_LDST_EX (insn))
4665 {
4666 *rt = AARCH64_RT (insn);
3d14faea 4667 *rt2 = *rt;
68fcca92 4668 if (AARCH64_BIT (insn, 21) == 1)
07d6d2b8 4669 {
68fcca92 4670 *pair = TRUE;
3d14faea 4671 *rt2 = AARCH64_RT2 (insn);
68fcca92
JW		 4672 }
4673 *load = AARCH64_LD (insn);
4674 return TRUE;
4675 }
4676 else if (AARCH64_LDST_NAP (insn)
4677 || AARCH64_LDSTP_PI (insn)
4678 || AARCH64_LDSTP_O (insn)
4679 || AARCH64_LDSTP_PRE (insn))
4680 {
4681 *pair = TRUE;
4682 *rt = AARCH64_RT (insn);
3d14faea 4683 *rt2 = AARCH64_RT2 (insn);
68fcca92
JW		 4684 *load = AARCH64_LD (insn);
4685 return TRUE;
4686 }
4687 else if (AARCH64_LDST_PCREL (insn)
4688 || AARCH64_LDST_UI (insn)
4689 || AARCH64_LDST_PIIMM (insn)
4690 || AARCH64_LDST_U (insn)
4691 || AARCH64_LDST_PREIMM (insn)
4692 || AARCH64_LDST_RO (insn)
4693 || AARCH64_LDST_UIMM (insn))
4694 {
4695 *rt = AARCH64_RT (insn);
3d14faea 4696 *rt2 = *rt;
68fcca92
JW		 4697 if (AARCH64_LDST_PCREL (insn))
4698 *load = TRUE;
4699 opc = AARCH64_BITS (insn, 22, 2);
4700 v = AARCH64_BIT (insn, 26);
4701 opc_v = opc | (v << 2);
4702 *load = (opc_v == 1 || opc_v == 2 || opc_v == 3
4703 || opc_v == 5 || opc_v == 7);
4704 return TRUE;
4705 }
4706 else if (AARCH64_LDST_SIMD_M (insn)
4707 || AARCH64_LDST_SIMD_M_PI (insn))
4708 {
4709 *rt = AARCH64_RT (insn);
4710 *load = AARCH64_BIT (insn, 22);
4711 opcode = (insn >> 12) & 0xf;
4712 switch (opcode)
4713 {
4714 case 0:
4715 case 2:
3d14faea 4716 *rt2 = *rt + 3;
68fcca92
JW		 4717 break;
4718
4719 case 4:
4720 case 6:
3d14faea 4721 *rt2 = *rt + 2;
68fcca92
JW		 4722 break;
4723
4724 case 7:
3d14faea 4725 *rt2 = *rt;
68fcca92
JW		 4726 break;
4727
4728 case 8:
4729 case 10:
3d14faea 4730 *rt2 = *rt + 1;
68fcca92
JW		 4731 break;
4732
4733 default:
4734 return FALSE;
4735 }
4736 return TRUE;
4737 }
4738 else if (AARCH64_LDST_SIMD_S (insn)
4739 || AARCH64_LDST_SIMD_S_PI (insn))
4740 {
4741 *rt = AARCH64_RT (insn);
4742 r = (insn >> 21) & 1;
4743 *load = AARCH64_BIT (insn, 22);
4744 opcode = (insn >> 13) & 0x7;
4745 switch (opcode)
4746 {
4747 case 0:
4748 case 2:
4749 case 4:
3d14faea 4750 *rt2 = *rt + r;
68fcca92
JW		 4751 break;
4752
4753 case 1:
4754 case 3:
4755 case 5:
3d14faea 4756 *rt2 = *rt + (r == 0 ? 2 : 3);
68fcca92
JW		 4757 break;
4758
4759 case 6:
3d14faea 4760 *rt2 = *rt + r;
68fcca92
JW		 4761 break;
4762
4763 case 7:
3d14faea 4764 *rt2 = *rt + (r == 0 ? 2 : 3);
68fcca92
JW		 4765 break;
4766
4767 default:
4768 return FALSE;
4769 }
4770 return TRUE;
4771 }
4772
4773 return FALSE;
4774}
4775
4776/* Return TRUE if INSN is multiply-accumulate. */
4777
4778static bfd_boolean
4779aarch64_mlxl_p (uint32_t insn)
4780{
4781 uint32_t op31 = AARCH64_OP31 (insn);
4782
4783 if (AARCH64_MAC (insn)
4784 && (op31 == 0 || op31 == 1 || op31 == 5)
4785 /* Exclude MUL instructions which are encoded as a multiple accumulate
4786 with RA = XZR. */
4787 && AARCH64_RA (insn) != AARCH64_ZR)
4788 return TRUE;
4789
4790 return FALSE;
4791}
4792
4793/* Some early revisions of the Cortex-A53 have an erratum (835769) whereby
4794 it is possible for a 64-bit multiply-accumulate instruction to generate an
4795 incorrect result. The details are quite complex and hard to
4796 determine statically, since branches in the code may exist in some
4797 circumstances, but all cases end with a memory (load, store, or
4798 prefetch) instruction followed immediately by the multiply-accumulate
4799 operation. We employ a linker patching technique, by moving the potentially
4800 affected multiply-accumulate instruction into a patch region and replacing
4801 the original instruction with a branch to the patch. This function checks
4802 if INSN_1 is the memory operation followed by a multiply-accumulate
4803 operation (INSN_2). Return TRUE if an erratum sequence is found, FALSE
4804 if INSN_1 and INSN_2 are safe. */
4805
4806static bfd_boolean
4807aarch64_erratum_sequence (uint32_t insn_1, uint32_t insn_2)
4808{
4809 uint32_t rt;
3d14faea 4810 uint32_t rt2;
68fcca92
JW		 4811 uint32_t rn;
4812 uint32_t rm;
4813 uint32_t ra;
4814 bfd_boolean pair;
4815 bfd_boolean load;
4816
4817 if (aarch64_mlxl_p (insn_2)
3d14faea 4818 && aarch64_mem_op_p (insn_1, &rt, &rt2, &pair, &load))
68fcca92
JW		 4819 {
4820 /* Any SIMD memory op is independent of the subsequent MLA
4821 by definition of the erratum. */
4822 if (AARCH64_BIT (insn_1, 26))
4823 return TRUE;
4824
4825 /* If not SIMD, check for integer memory ops and MLA relationship. */
4826 rn = AARCH64_RN (insn_2);
4827 ra = AARCH64_RA (insn_2);
4828 rm = AARCH64_RM (insn_2);
4829
4830 /* If this is a load and there's a true(RAW) dependency, we are safe
4831 and this is not an erratum sequence. */
4832 if (load &&
4833 (rt == rn || rt == rm || rt == ra
3d14faea 4834 || (pair && (rt2 == rn || rt2 == rm || rt2 == ra))))
68fcca92
JW		 4835 return FALSE;
4836
4837 /* We conservatively put out stubs for all other cases (including
4838 writebacks). */
4839 return TRUE;
4840 }
4841
4842 return FALSE;
4843}
4844
2144188d 4845
35fee8b7
MS		 4846static char *
4847_bfd_aarch64_erratum_835769_stub_name (unsigned num_fixes)
4848{
4849 char *stub_name = (char *) bfd_malloc
4850 (strlen ("__erratum_835769_veneer_") + 16);
bb69498c
NC		 4851 if (stub_name != NULL)
4852 sprintf (stub_name,"__erratum_835769_veneer_%d", num_fixes);
35fee8b7
MS		 4853 return stub_name;
4854}
4855
4106101c 4856/* Scan for Cortex-A53 erratum 835769 sequence.
2144188d
MS		 4857
4858 Return TRUE else FALSE on abnormal termination. */
4859
68fcca92 4860static bfd_boolean
5421cc6e
MS		 4861_bfd_aarch64_erratum_835769_scan (bfd *input_bfd,
4862 struct bfd_link_info *info,
4863 unsigned int *num_fixes_p)
68fcca92
JW		 4864{
4865 asection *section;
4866 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
68fcca92 4867 unsigned int num_fixes = *num_fixes_p;
68fcca92
JW		 4868
4869 if (htab == NULL)
2144188d 4870 return TRUE;
68fcca92
JW		 4871
4872 for (section = input_bfd->sections;
4873 section != NULL;
4874 section = section->next)
4875 {
4876 bfd_byte *contents = NULL;
4877 struct _aarch64_elf_section_data *sec_data;
4878 unsigned int span;
4879
4880 if (elf_section_type (section) != SHT_PROGBITS
4881 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4882 || (section->flags & SEC_EXCLUDE) != 0
4883 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4884 || (section->output_section == bfd_abs_section_ptr))
4885 continue;
4886
4887 if (elf_section_data (section)->this_hdr.contents != NULL)
4888 contents = elf_section_data (section)->this_hdr.contents;
4889 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
2144188d 4890 return FALSE;
68fcca92
JW		 4891
4892 sec_data = elf_aarch64_section_data (section);
520c7b56 4893
ccf61261
NC		 4894 if (sec_data->mapcount)
4895 qsort (sec_data->map, sec_data->mapcount,
4896 sizeof (elf_aarch64_section_map), elf_aarch64_compare_mapping);
520c7b56 4897
68fcca92
JW		 4898 for (span = 0; span < sec_data->mapcount; span++)
4899 {
4900 unsigned int span_start = sec_data->map[span].vma;
4901 unsigned int span_end = ((span == sec_data->mapcount - 1)
4902 ? sec_data->map[0].vma + section->size
4903 : sec_data->map[span + 1].vma);
4904 unsigned int i;
4905 char span_type = sec_data->map[span].type;
4906
4907 if (span_type == 'd')
4908 continue;
4909
4910 for (i = span_start; i + 4 < span_end; i += 4)
4911 {
4912 uint32_t insn_1 = bfd_getl32 (contents + i);
4913 uint32_t insn_2 = bfd_getl32 (contents + i + 4);
4914
4915 if (aarch64_erratum_sequence (insn_1, insn_2))
4916 {
5421cc6e 4917 struct elf_aarch64_stub_hash_entry *stub_entry;
35fee8b7
MS		 4918 char *stub_name = _bfd_aarch64_erratum_835769_stub_name (num_fixes);
4919 if (! stub_name)
2144188d 4920 return FALSE;
68fcca92 4921
5421cc6e
MS		 4922 stub_entry = _bfd_aarch64_add_stub_entry_in_group (stub_name,
4923 section,
4924 htab);
4925 if (! stub_entry)
4926 return FALSE;
68fcca92 4927
5421cc6e
MS		 4928 stub_entry->stub_type = aarch64_stub_erratum_835769_veneer;
4929 stub_entry->target_section = section;
4930 stub_entry->target_value = i + 4;
4931 stub_entry->veneered_insn = insn_2;
4932 stub_entry->output_name = stub_name;
68fcca92
JW		 4933 num_fixes++;
4934 }
4935 }
4936 }
4937 if (elf_section_data (section)->this_hdr.contents == NULL)
4938 free (contents);
4939 }
4940
357d1523
MS		 4941 *num_fixes_p = num_fixes;
4942
2144188d 4943 return TRUE;
68fcca92
JW		 4944}
4945
13f622ec 4946
4106101c
MS		 4947/* Test if instruction INSN is ADRP. */
4948
4949static bfd_boolean
4950_bfd_aarch64_adrp_p (uint32_t insn)
4951{
9fca35fc 4952 return ((insn & AARCH64_ADRP_OP_MASK) == AARCH64_ADRP_OP);
4106101c
MS		 4953}
4954
4955
4956/* Helper predicate to look for cortex-a53 erratum 843419 sequence 1. */
4957
4958static bfd_boolean
4959_bfd_aarch64_erratum_843419_sequence_p (uint32_t insn_1, uint32_t insn_2,
4960 uint32_t insn_3)
4961{
4962 uint32_t rt;
4963 uint32_t rt2;
4964 bfd_boolean pair;
4965 bfd_boolean load;
4966
4967 return (aarch64_mem_op_p (insn_2, &rt, &rt2, &pair, &load)
4968 && (!pair
4969 || (pair && !load))
4970 && AARCH64_LDST_UIMM (insn_3)
4971 && AARCH64_RN (insn_3) == AARCH64_RD (insn_1));
4972}
4973
4974
4975/* Test for the presence of Cortex-A53 erratum 843419 instruction sequence.
4976
4977 Return TRUE if section CONTENTS at offset I contains one of the
4978 erratum 843419 sequences, otherwise return FALSE. If a sequence is
4979 seen set P_VENEER_I to the offset of the final LOAD/STORE
4980 instruction in the sequence.
4981 */
4982
4983static bfd_boolean
4984_bfd_aarch64_erratum_843419_p (bfd_byte *contents, bfd_vma vma,
4985 bfd_vma i, bfd_vma span_end,
4986 bfd_vma *p_veneer_i)
4987{
4988 uint32_t insn_1 = bfd_getl32 (contents + i);
4989
4990 if (!_bfd_aarch64_adrp_p (insn_1))
4991 return FALSE;
4992
4993 if (span_end < i + 12)
4994 return FALSE;
4995
4996 uint32_t insn_2 = bfd_getl32 (contents + i + 4);
4997 uint32_t insn_3 = bfd_getl32 (contents + i + 8);
4998
4999 if ((vma & 0xfff) != 0xff8 && (vma & 0xfff) != 0xffc)
5000 return FALSE;
5001
5002 if (_bfd_aarch64_erratum_843419_sequence_p (insn_1, insn_2, insn_3))
5003 {
5004 *p_veneer_i = i + 8;
5005 return TRUE;
5006 }
5007
5008 if (span_end < i + 16)
5009 return FALSE;
5010
5011 uint32_t insn_4 = bfd_getl32 (contents + i + 12);
5012
5013 if (_bfd_aarch64_erratum_843419_sequence_p (insn_1, insn_2, insn_4))
5014 {
5015 *p_veneer_i = i + 12;
5016 return TRUE;
5017 }
5018
5019 return FALSE;
5020}
5021
5022
13f622ec
MS		 5023/* Resize all stub sections. */
5024
5025static void
5026_bfd_aarch64_resize_stubs (struct elf_aarch64_link_hash_table *htab)
5027{
5028 asection *section;
5029
5030 /* OK, we've added some stubs. Find out the new size of the
5031 stub sections. */
5032 for (section = htab->stub_bfd->sections;
5033 section != NULL; section = section->next)
5034 {
5035 /* Ignore non-stub sections. */
5036 if (!strstr (section->name, STUB_SUFFIX))
5037 continue;
5038 section->size = 0;
5039 }
5040
5041 bfd_hash_traverse (&htab->stub_hash_table, aarch64_size_one_stub, htab);
13f622ec 5042
61865519
MS		 5043 for (section = htab->stub_bfd->sections;
5044 section != NULL; section = section->next)
5045 {
5046 if (!strstr (section->name, STUB_SUFFIX))
5047 continue;
5048
9a2ebffd
JW		 5049 /* Add space for a branch. Add 8 bytes to keep section 8 byte aligned,
5050 as long branch stubs contain a 64-bit address. */
61865519 5051 if (section->size)
9a2ebffd 5052 section->size += 8;
4106101c
MS		 5053
5054 /* Ensure all stub sections have a size which is a multiple of
5055 4096. This is important in order to ensure that the insertion
5056 of stub sections does not in itself move existing code around
739b5c9c
TC		 5057 in such a way that new errata sequences are created. We only do this
5058 when the ADRP workaround is enabled. If only the ADR workaround is
5059 enabled then the stubs workaround won't ever be used. */
5060 if (htab->fix_erratum_843419 & ERRAT_ADRP)
4106101c
MS		 5061 if (section->size)
5062 section->size = BFD_ALIGN (section->size, 0x1000);
5063 }
5064}
5065
9a2ebffd 5066/* Construct an erratum 843419 workaround stub name. */
4106101c
MS		 5067
5068static char *
5069_bfd_aarch64_erratum_843419_stub_name (asection *input_section,
5070 bfd_vma offset)
5071{
5072 const bfd_size_type len = 8 + 4 + 1 + 8 + 1 + 16 + 1;
5073 char *stub_name = bfd_malloc (len);
5074
5075 if (stub_name != NULL)
5076 snprintf (stub_name, len, "e843419@%04x_%08x_%" BFD_VMA_FMT "x",
5077 input_section->owner->id,
5078 input_section->id,
5079 offset);
5080 return stub_name;
5081}
5082
5083/* Build a stub_entry structure describing an 843419 fixup.
5084
5085 The stub_entry constructed is populated with the bit pattern INSN
5086 of the instruction located at OFFSET within input SECTION.
5087
5088 Returns TRUE on success. */
5089
5090static bfd_boolean
5091_bfd_aarch64_erratum_843419_fixup (uint32_t insn,
5092 bfd_vma adrp_offset,
5093 bfd_vma ldst_offset,
5094 asection *section,
5095 struct bfd_link_info *info)
5096{
5097 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
5098 char *stub_name;
5099 struct elf_aarch64_stub_hash_entry *stub_entry;
5100
5101 stub_name = _bfd_aarch64_erratum_843419_stub_name (section, ldst_offset);
bb69498c
NC		 5102 if (stub_name == NULL)
5103 return FALSE;
4106101c
MS		 5104 stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5105 FALSE, FALSE);
5106 if (stub_entry)
5107 {
5108 free (stub_name);
5109 return TRUE;
5110 }
5111
5112 /* We always place an 843419 workaround veneer in the stub section
5113 attached to the input section in which an erratum sequence has
5114 been found. This ensures that later in the link process (in
5115 elfNN_aarch64_write_section) when we copy the veneered
5116 instruction from the input section into the stub section the
5117 copied instruction will have had any relocations applied to it.
5118 If we placed workaround veneers in any other stub section then we
5119 could not assume that all relocations have been processed on the
5120 corresponding input section at the point we output the stub
bb69498c 5121 section. */
4106101c
MS		 5122
5123 stub_entry = _bfd_aarch64_add_stub_entry_after (stub_name, section, htab);
5124 if (stub_entry == NULL)
5125 {
5126 free (stub_name);
5127 return FALSE;
5128 }
5129
5130 stub_entry->adrp_offset = adrp_offset;
5131 stub_entry->target_value = ldst_offset;
5132 stub_entry->target_section = section;
5133 stub_entry->stub_type = aarch64_stub_erratum_843419_veneer;
5134 stub_entry->veneered_insn = insn;
5135 stub_entry->output_name = stub_name;
5136
5137 return TRUE;
5138}
5139
5140
5141/* Scan an input section looking for the signature of erratum 843419.
5142
5143 Scans input SECTION in INPUT_BFD looking for erratum 843419
5144 signatures, for each signature found a stub_entry is created
5145 describing the location of the erratum for subsequent fixup.
5146
5147 Return TRUE on successful scan, FALSE on failure to scan.
5148 */
5149
5150static bfd_boolean
5151_bfd_aarch64_erratum_843419_scan (bfd *input_bfd, asection *section,
5152 struct bfd_link_info *info)
5153{
5154 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
5155
5156 if (htab == NULL)
5157 return TRUE;
5158
5159 if (elf_section_type (section) != SHT_PROGBITS
5160 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5161 || (section->flags & SEC_EXCLUDE) != 0
5162 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5163 || (section->output_section == bfd_abs_section_ptr))
5164 return TRUE;
5165
5166 do
5167 {
5168 bfd_byte *contents = NULL;
5169 struct _aarch64_elf_section_data *sec_data;
5170 unsigned int span;
5171
5172 if (elf_section_data (section)->this_hdr.contents != NULL)
5173 contents = elf_section_data (section)->this_hdr.contents;
5174 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5175 return FALSE;
5176
5177 sec_data = elf_aarch64_section_data (section);
5178
ccf61261
NC		 5179 if (sec_data->mapcount)
5180 qsort (sec_data->map, sec_data->mapcount,
5181 sizeof (elf_aarch64_section_map), elf_aarch64_compare_mapping);
4106101c
MS		 5182
5183 for (span = 0; span < sec_data->mapcount; span++)
5184 {
5185 unsigned int span_start = sec_data->map[span].vma;
5186 unsigned int span_end = ((span == sec_data->mapcount - 1)
5187 ? sec_data->map[0].vma + section->size
5188 : sec_data->map[span + 1].vma);
5189 unsigned int i;
5190 char span_type = sec_data->map[span].type;
5191
5192 if (span_type == 'd')
5193 continue;
5194
5195 for (i = span_start; i + 8 < span_end; i += 4)
5196 {
5197 bfd_vma vma = (section->output_section->vma
5198 + section->output_offset
5199 + i);
5200 bfd_vma veneer_i;
5201
5202 if (_bfd_aarch64_erratum_843419_p
5203 (contents, vma, i, span_end, &veneer_i))
5204 {
5205 uint32_t insn = bfd_getl32 (contents + veneer_i);
5206
5207 if (!_bfd_aarch64_erratum_843419_fixup (insn, i, veneer_i,
5208 section, info))
5209 return FALSE;
5210 }
5211 }
5212 }
5213
5214 if (elf_section_data (section)->this_hdr.contents == NULL)
5215 free (contents);
61865519 5216 }
4106101c
MS		 5217 while (0);
5218
5219 return TRUE;
61865519 5220}
13f622ec 5221
7ff36d1a
SP		 5222static bfd_boolean
5223section_start_symbol (bfd *abfd ATTRIBUTE_UNUSED, asection *section,
5224 void *valp)
5225{
5226 return section->vma == *(bfd_vma *)valp;
5227}
5228
5229/* Capability format functions. */
5230
5231static unsigned
5232exponent (uint64_t len)
5233{
5234#define CAP_MAX_EXPONENT 50
5235 /* Size is a 65 bit value, so there's an implicit 0 MSB. */
5236 unsigned zeroes = __builtin_clzl (len) + 1;
5237
5238 /* All bits up to and including CAP_MW - 2 are zero. */
5239 if (CAP_MAX_EXPONENT < zeroes)
5240 return (unsigned) -1;
5241 else
5242 return CAP_MAX_EXPONENT - zeroes;
5243#undef CAP_MAX_EXPONENT
5244}
5245
dbd880c7 5246#define ONES(x) ((1ULL << (x)) - 1)
7ff36d1a
SP		 5247#define ALIGN_UP(x, a) (((x) + ONES (a)) & (~ONES (a)))
5248
5249static bfd_boolean
5a9e7a18 5250c64_valid_cap_range (bfd_vma *basep, bfd_vma *limitp, unsigned *alignmentp)
7ff36d1a
SP		 5251{
5252 bfd_vma base = *basep, size = *limitp - *basep;
5253
5254 unsigned e, old_e;
5a9e7a18 5255 *alignmentp = 1;
7ff36d1a
SP		 5256
5257 if ((e = exponent (size)) == (unsigned) -1)
5258 return TRUE;
5259
5260 size = ALIGN_UP (size, e + 3);
5261 old_e = e;
5262 e = exponent (size);
5263 if (old_e != e)
5264 size = ALIGN_UP (size, e + 3);
5265
5266 base = ALIGN_UP (base, e + 3);
5267
5a9e7a18 5268 *alignmentp = e+3;
7ff36d1a
SP		 5269 if (base == *basep && *limitp == base + size)
5270 return TRUE;
5271
5272 *basep = base;
5273 *limitp = base + size;
5274 return FALSE;
5275}
5276
8504495a
AC		 5277static bfd_boolean
5278c64_get_section_padding_info (struct elf_aarch64_link_hash_table *htab,
5279 asection *sec, void ***info)
5280{
5281 if (!htab->c64_sec_info)
5282 {
5283 unsigned min_os_id, max_os_id;
5284 min_os_id = max_os_id = sec->id;
5285 asection *iter;
5286 bfd *output_bfd = sec->owner;
5287 for (iter = output_bfd->sections; iter; iter = iter->next)
5288 {
5289 BFD_ASSERT (iter->output_section == iter);
5290 if (iter->id < min_os_id)
5291 min_os_id = iter->id;
5292 if (iter->id > max_os_id)
5293 max_os_id = iter->id;
5294 }
5295
5296 /* Create a sparse array mapping sections IDs onto cookies. */
5297 const int num_slots = max_os_id - min_os_id + 1;
5298 htab->min_output_section_id = min_os_id;
5299 htab->max_output_section_id = max_os_id;
5300 const size_t mem_sz = num_slots * sizeof (void *);
5301 htab->c64_sec_info = bfd_zalloc (output_bfd, mem_sz);
5302 if (!htab->c64_sec_info)
5303 {
5304 _bfd_error_handler (_("out of memory allocating padding info"));
5305 bfd_set_error (bfd_error_no_memory);
5306 return FALSE;
5307 }
5308 }
5309
5310 BFD_ASSERT (sec->id >= htab->min_output_section_id);
5311 BFD_ASSERT (sec->id <= htab->max_output_section_id);
5312 *info = htab->c64_sec_info + (sec->id - htab->min_output_section_id);
5313 return TRUE;
5314}
5315
396742bf
MM		 5316/* Check if the bounds of section SEC will get rounded off in the Morello
5317 capability format and if it would, adjust the section to ensure any
5318 capability spanning this section would have its bounds precise. */
8504495a 5319static bfd_boolean
396742bf
MM		 5320ensure_precisely_bounded_section (asection *sec,
5321 struct elf_aarch64_link_hash_table *htab,
8504495a 5322 bfd_boolean *changed_layout)
7ff36d1a 5323{
396742bf
MM		 5324 bfd_vma low = sec->vma;
5325 bfd_vma high = sec->vma + sec->size;
5326 unsigned alignment;
7ff36d1a 5327
8504495a
AC		 5328 void **info;
5329 if (!c64_get_section_padding_info (htab, sec, &info))
5330 return FALSE;
5331
5332 bfd_vma old_padding = htab->c64_get_section_padding (*info);
5333
5334 /* Ignore any existing padding when calculating bounds validity. */
5335 high -= old_padding;
5336
396742bf
MM		 5337 bfd_boolean did_change = FALSE;
5338 if (!c64_valid_cap_range (&low, &high, &alignment))
7ff36d1a 5339 {
8504495a
AC		 5340 bfd_vma padding = high - low - (sec->size - old_padding);
5341 if (padding != old_padding)
5342 {
5343 htab->c64_set_section_padding (sec, padding, info);
5344 did_change = TRUE;
5345 }
5346 }
5347 else if (old_padding)
5348 {
5349 /* If the range without the padding is valid, then
5350 we can drop the padding. This may happen e.g. if a stub gets
5351 added that happens to take up the space occupied by the
5352 padding. */
5353 htab->c64_set_section_padding (sec, 0, info);
396742bf 5354 did_change = TRUE;
7ff36d1a 5355 }
8504495a 5356
396742bf 5357 if (sec->alignment_power < alignment)
7ff36d1a 5358 {
396742bf
MM		 5359 sec->alignment_power = alignment;
5360 did_change = TRUE;
7ff36d1a
SP		 5361 }
5362
396742bf 5363 if (did_change)
8504495a
AC		 5364 {
5365 (*htab->layout_sections_again) ();
5366 if (changed_layout)
5367 *changed_layout = TRUE;
5368 }
5369
5370 return TRUE;
7ff36d1a
SP		 5371}
5372
5373/* Make sure that all capabilities that refer to sections have bounds that
5374 won't overlap with neighbouring sections. This is needed in two specific
5375 cases. The first case is that of PCC, which needs to span across all
5a9e7a18
MM		 5376 readonly sections as well as the GOT and PLT sections in the output binary.
5377 The second case is that of linker and ldscript defined symbols that indicate
5378 start and/or end of sections and/or zero-sized symbols.
7ff36d1a
SP		 5379
5380 In both cases, overlap of capability bounds are avoided by aligning the base
5381 of the section and if necessary, adding a pad at the end of the section so
5382 that the section following it starts only after the pad. */
5383
5fa80905
AC		 5384static bfd_vma pcc_low;
5385static bfd_vma pcc_high;
8504495a
AC		 5386static asection *pcc_low_sec;
5387static asection *pcc_high_sec;
5388
5389static bfd_boolean
5390c64_resize_sections (bfd *output_bfd, struct bfd_link_info *info,
5391 bfd_boolean *changed_layout)
7ff36d1a 5392{
4a74b265 5393 asection *sec;
7ff36d1a 5394 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
2d99dff6 5395 bfd *input_bfd;
e2314302 5396 unsigned align = 0;
7ff36d1a 5397
4a74b265
MM		 5398 /* If this is not a PURECAP binary, and has no C64 code in it, then this is
5399 just a stock AArch64 binary and the section padding is not necessary.
5400 We can have PURECAP shared libraries that are data-only, so just checking
5401 if there is C64 code in this executable is not enough. We can have HYBRID
5402 binaries, so just checking for PURECAP is not enough. */
5403 if (!(htab->c64_output
5404 || (elf_elfheader (output_bfd)->e_flags & EF_AARCH64_CHERI_PURECAP)))
8504495a 5405 return TRUE;
7ff36d1a 5406
7ff36d1a
SP		 5407 /* First, walk through all the relocations to find those referring to linker
5408 defined and ldscript defined symbols since we set their range to their
5409 output sections. */
2d99dff6 5410 for (input_bfd = info->input_bfds;
4a74b265
MM		 5411 /* No point iterating over all relocations to ensure each section that
5412 needs to give the bounds for a capability is padded accordingly if
5413 there are no capability relocations in the GOT and there are no
5414 CAPINIT relocations.
5415 N.b. It is possible that when creating a dynamic object a
5416 section-spanning symbol could be used by some other executable
5417 linking to it when we don't have a relocation to it in the given
5418 dynamic library. Rather than pad every section which has a linker
5419 defined symbol pointing into it we choose to allow such use-cases to
5420 have sizes which bleed into another section. */
5421 (htab->c64_rel || htab->srelcaps) && input_bfd != NULL;
5422 input_bfd = input_bfd->link.next)
7ff36d1a
SP		 5423 {
5424 Elf_Internal_Shdr *symtab_hdr;
5425
5426 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5427 if (symtab_hdr->sh_info == 0)
5428 continue;
5429
5430 for (sec = input_bfd->sections; sec != NULL; sec = sec->next)
5431 {
5432 Elf_Internal_Rela *irelaend, *irela;
5433
5434 /* If there aren't any relocs, then there's nothing more to do. */
5435 if ((sec->flags & SEC_RELOC) == 0 || sec->reloc_count == 0)
5436 continue;
5437
5438 irela = _bfd_elf_link_read_relocs (input_bfd, sec, NULL, NULL,
5439 info->keep_memory);
5440 if (irela == NULL)
5441 continue;
5442
5443 /* Now examine each relocation. */
5444 irelaend = irela + sec->reloc_count;
5445 for (; irela < irelaend; irela++)
5446 {
5447 unsigned int r_indx;
5448 struct elf_link_hash_entry *h;
5449 int e_indx;
5450 asection *os;
5451
5452 r_indx = ELFNN_R_SYM (irela->r_info);
5453
5454 /* Linker defined or linker script defined symbols are always in
5455 the symbol hash. */
5456 if (r_indx < symtab_hdr->sh_info)
5457 continue;
5458
5459 e_indx = r_indx - symtab_hdr->sh_info;
5460 h = elf_sym_hashes (input_bfd)[e_indx];
5461
5462 /* XXX Does this ever happen? */
5463 if (h == NULL)
5464 continue;
5465
5466 os = h->root.u.def.section->output_section;
5467
8504495a
AC		 5468 /* XXX: we may see some ldscript-defined
5469 symbols here whose output section is set to *ABS*.
5470 These symbols should get their output section resolved
5471 to a real output section in ldexp_finalize_syms, but
5472 because we are running earlier in the lang_process
5473 flow (specifically in ldemul_after_allocation here) we
5474 see these symbols as pointing into the *ABS* section.
5475
5476 For now, we just skip such symbols, but this should be
5477 fixed properly later on. */
5478 if (os == bfd_abs_section_ptr)
5479 continue;
5480
5481 if (h->root.linker_def || h->start_stop)
5482 {
5483 if (!ensure_precisely_bounded_section (os, htab,
5484 changed_layout))
5485 return FALSE;
5486 }
7ff36d1a
SP		 5487 else if (h->root.ldscript_def)
5488 {
5489 const char *name = h->root.root.string;
5490 size_t len = strlen (name);
ea41358b
MM		 5491 asection *altos = NULL;
5492 bfd_vma value = os->vma + os->size;
7ff36d1a
SP		 5493
5494 if (len > 8 && name[0] == '_' && name[1] == '_'
5495 && (!strncmp (name + 2, "start_", 6)
ea41358b
MM		 5496 || !strcmp (name + len - 6, "_start"))
5497 && ((altos = bfd_sections_find_if
5498 (info->output_bfd, section_start_symbol, &value))
5499 != NULL))
8504495a
AC		 5500 if (!ensure_precisely_bounded_section (altos, htab,
5501 changed_layout))
5502 return FALSE;
5503
7ff36d1a
SP		 5504 /* XXX We're overfitting here because the offset of H within
5505 the output section is not yet resolved and ldscript
5506 defined symbols do not have input section information. */
8504495a
AC		 5507 if (!ensure_precisely_bounded_section (os, htab,
5508 changed_layout))
5509 return FALSE;
7ff36d1a
SP		 5510 }
5511 }
5512 }
5513 }
5514
5515 /* Next, walk through output sections to find the PCC span and add a padding
5516 at the end to ensure that PCC bounds don't bleed into neighbouring
5517 sections. For now PCC needs to encompass all code sections, .got, .plt
4a74b265
MM		 5518 and .got.plt.
5519 If there is no C64 code in this binary, then we do not need to care about
5520 PCC bounds, hence skip this bit.
5521 It's tempting to also avoid padding the PCC range when we have no static
5522 relocations in this binary, since it would seem that we can never end up
5523 trying to access something "outside" the PCC bounds (any PCC bounded
5524 capability provided to an outside dynamic object would be sealed by the
5525 runtime, and hence can't be offset). Unfortunately it is still possible,
5526 since an `adr c0, 0` gives an unsealed capability to the current code
5527 which could then be offset by some other means.
5528 While that seems unlikely to happen, having no relocations in a file also
5529 seems quite unlikely, so we may as well play it safe. */
5530 if (!htab->c64_output)
8504495a 5531 return TRUE;
4a74b265
MM		 5532
5533 bfd_vma low = (bfd_vma) -1, high = 0;
8504495a 5534 pcc_low_sec = pcc_high_sec = NULL;
7ff36d1a
SP		 5535 for (sec = output_bfd->sections; sec != NULL; sec = sec->next)
5536 {
5537 /* XXX This is a good place to figure out if there are any readable or
5538 writable sections in the PCC range that are not in the list of
5539 sections we want the PCC to span and then warn the user of it. */
5540
5541#define NOT_OP_SECTION(s) ((s) == NULL || (s)->output_section != sec)
5542
0e02111b 5543 if ((sec->flags & SEC_READONLY) == 0
7ff36d1a
SP		 5544 && NOT_OP_SECTION (htab->root.sgotplt)
5545 && NOT_OP_SECTION (htab->root.igotplt)
5546 && NOT_OP_SECTION (htab->root.sgot)
5547 && NOT_OP_SECTION (htab->root.splt)
0e02111b
MM		 5548 && NOT_OP_SECTION (htab->root.iplt)
5549 && (sec->vma < info->relro_start
5550 || sec->vma >= info->relro_end))
5551 continue;
5552 if ((sec->flags & SEC_ALLOC) == 0)
7ff36d1a
SP		 5553 continue;
5554
5555 if (sec->vma < low)
5556 {
5557 low = sec->vma;
5558 pcc_low_sec = sec;
5559 }
5560 if (sec->vma + sec->size > high)
5561 {
5562 high = sec->vma + sec->size;
5563 pcc_high_sec = sec;
5564 }
5565
5566#undef NOT_OP_SECTION
5567 }
5568
4a74b265
MM		 5569 /* Set the PCC range to have precise bounds to ensure that PCC relative loads
5570 can not access outside of their given range. */
e2314302 5571 if (pcc_low_sec != NULL)
5fa80905 5572 {
e2314302
MM		 5573 BFD_ASSERT (pcc_high_sec);
5574
5575 bfd_vma pcc_low_tmp;
5576 bfd_vma pcc_high_tmp;
5577
5578 /* We have to be a little careful about the padding we introduce. The
5579 padding we could calculate here may not be the padding that we would
5580 want after the very first section in the PCC bounds has been aligned
5581 properly. That change in the start address propagated through a few
5582 different sections with their own alignment requirements can easily
5583 change the length of the region we want the PCC to span.
4a74b265 5584 Also, that change in length could change the alignment we want. We
8504495a 5585 don't prove that the alignment requirement converges, but believe
4a74b265
MM		 5586 that it should (there is only so much space that existing alignment
5587 requirements could trigger to be added -- a section with an alignment
5588 requirement of 16 can only really add 15 bytes to the length). */
e2314302
MM		 5589 while (TRUE) {
5590 pcc_low_tmp = pcc_low_sec->vma;
5591 pcc_high_tmp = pcc_high_sec->vma + pcc_high_sec->size;
8504495a 5592 c64_valid_cap_range (&pcc_low_tmp, &pcc_high_tmp, &align);
e2314302
MM		 5593 if (pcc_low_sec->alignment_power >= align)
5594 break;
5595 pcc_low_sec->alignment_power = align;
5596 (*htab->layout_sections_again) ();
8504495a
AC		 5597 if (changed_layout)
5598 *changed_layout = TRUE;
e2314302
MM		 5599 }
5600
8504495a
AC		 5601 /* We have aligned the base section appropriately, but we may
5602 still (later) need to add padding after pcc_high_sec to
5603 get representable PCC bounds. */
5604 BFD_ASSERT (pcc_low_tmp == pcc_low_sec->vma);
5605 pcc_low = pcc_low_tmp;
5606 pcc_high = pcc_high_tmp;
5fa80905 5607 }
8504495a
AC		 5608
5609 return TRUE;
5610}
5611
5612bfd_boolean
5613elfNN_c64_resize_sections (bfd *output_bfd, struct bfd_link_info *info,
5614 c64_section_padding_setter_t set_padding,
5615 c64_section_padding_getter_t get_padding,
5616 c64_pad_after_section_t pad_after_section,
5617 void (*layout_sections_again) (void))
5618{
5619 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
5620 htab->c64_set_section_padding = set_padding;
5621 htab->c64_get_section_padding = get_padding;
5622 htab->c64_pad_after_section = pad_after_section;
5623 htab->layout_sections_again = layout_sections_again;
5624
5625 /* We assert this here since we require elfNN_aarch64_size_stubs to be
5626 called to complete setting the PCC bounds, see the comment at the
5627 top of elfNN_aarch64_setup_section_lists. */
5628 BFD_ASSERT (is_elf_hash_table (htab));
5629
5630 return c64_resize_sections (output_bfd, info, NULL);
7ff36d1a 5631}
4106101c 5632
a06ea964
NC		 5633/* Determine and set the size of the stub section for a final link.
5634
5635 The basic idea here is to examine all the relocations looking for
50e192f0
SP		 5636 PC-relative calls to a target that either needs a PE state change (A64 to
5637 C64 or vice versa) or in case of unconditional branches (B/BL), is
5638 unreachable. */
a06ea964 5639
8504495a
AC		 5640static bfd_boolean
5641aarch64_size_stubs (bfd *output_bfd,
5642 struct bfd_link_info *info)
a06ea964 5643{
5421cc6e 5644 bfd_boolean stub_changed = FALSE;
cec5225b 5645 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
68fcca92 5646 unsigned int num_erratum_835769_fixes = 0;
a06ea964 5647
5421cc6e
MS		 5648 if (htab->fix_erratum_835769)
5649 {
5650 bfd *input_bfd;
5651
5652 for (input_bfd = info->input_bfds;
5653 input_bfd != NULL; input_bfd = input_bfd->link.next)
8c803a2d
AM		 5654 {
5655 if (!is_aarch64_elf (input_bfd)
5656 || (input_bfd->flags & BFD_LINKER_CREATED) != 0)
5657 continue;
5658
5659 if (!_bfd_aarch64_erratum_835769_scan (input_bfd, info,
5660 &num_erratum_835769_fixes))
5661 return FALSE;
5662 }
5421cc6e 5663
4106101c
MS		 5664 _bfd_aarch64_resize_stubs (htab);
5665 (*htab->layout_sections_again) ();
5666 }
5667
739b5c9c 5668 if (htab->fix_erratum_843419 != ERRAT_NONE)
4106101c
MS		 5669 {
5670 bfd *input_bfd;
5671
5672 for (input_bfd = info->input_bfds;
5673 input_bfd != NULL;
5674 input_bfd = input_bfd->link.next)
5675 {
5676 asection *section;
5677
8c803a2d
AM		 5678 if (!is_aarch64_elf (input_bfd)
5679 || (input_bfd->flags & BFD_LINKER_CREATED) != 0)
5680 continue;
5681
4106101c
MS		 5682 for (section = input_bfd->sections;
5683 section != NULL;
5684 section = section->next)
5685 if (!_bfd_aarch64_erratum_843419_scan (input_bfd, section, info))
5686 return FALSE;
5687 }
5688
5689 _bfd_aarch64_resize_stubs (htab);
5690 (*htab->layout_sections_again) ();
5421cc6e
MS		 5691 }
5692
a06ea964
NC		 5693 while (1)
5694 {
5695 bfd *input_bfd;
a06ea964 5696
9b9971aa
MS		 5697 for (input_bfd = info->input_bfds;
5698 input_bfd != NULL; input_bfd = input_bfd->link.next)
a06ea964
NC		 5699 {
5700 Elf_Internal_Shdr *symtab_hdr;
5701 asection *section;
a06ea964 5702
8c803a2d
AM		 5703 if (!is_aarch64_elf (input_bfd)
5704 || (input_bfd->flags & BFD_LINKER_CREATED) != 0)
5705 continue;
5706
a06ea964
NC		 5707 /* We'll need the symbol table in a second. */
5708 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5709 if (symtab_hdr->sh_info == 0)
5710 continue;
5711
5712 /* Walk over each section attached to the input bfd. */
5713 for (section = input_bfd->sections;
5714 section != NULL; section = section->next)
5715 {
5716 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5717
5718 /* If there aren't any relocs, then there's nothing more
5719 to do. */
5720 if ((section->flags & SEC_RELOC) == 0
5721 || section->reloc_count == 0
5722 || (section->flags & SEC_CODE) == 0)
5723 continue;
5724
5725 /* If this section is a link-once section that will be
5726 discarded, then don't create any stubs. */
5727 if (section->output_section == NULL
5728 || section->output_section->owner != output_bfd)
5729 continue;
5730
5731 /* Get the relocs. */
5732 internal_relocs
5733 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5734 NULL, info->keep_memory);
5735 if (internal_relocs == NULL)
5736 goto error_ret_free_local;
5737
5738 /* Now examine each relocation. */
5739 irela = internal_relocs;
5740 irelaend = irela + section->reloc_count;
5741 for (; irela < irelaend; irela++)
5742 {
5743 unsigned int r_type, r_indx;
50e192f0 5744 enum elf_aarch64_stub_type stub_type = aarch64_stub_none;
cec5225b 5745 struct elf_aarch64_stub_hash_entry *stub_entry;
a06ea964
NC		 5746 asection *sym_sec;
5747 bfd_vma sym_value;
5748 bfd_vma destination;
cec5225b 5749 struct elf_aarch64_link_hash_entry *hash;
a06ea964
NC		 5750 const char *sym_name;
5751 char *stub_name;
5752 const asection *id_sec;
5753 unsigned char st_type;
5754 bfd_size_type len;
50e192f0
SP		 5755 unsigned branch_to_c64 = FALSE;
5756 const char *suffix;
a06ea964 5757
cec5225b
YZ		 5758 r_type = ELFNN_R_TYPE (irela->r_info);
5759 r_indx = ELFNN_R_SYM (irela->r_info);
a06ea964
NC		 5760
5761 if (r_type >= (unsigned int) R_AARCH64_end)
5762 {
5763 bfd_set_error (bfd_error_bad_value);
5764 error_ret_free_internal:
5765 if (elf_section_data (section)->relocs == NULL)
5766 free (internal_relocs);
5767 goto error_ret_free_local;
5768 }
5769
5770 /* Only look for stubs on unconditional branch and
5771 branch and link instructions. */
50e192f0 5772 if (!aarch64_branch_reloc_p (r_type))
a06ea964
NC		 5773 continue;
5774
5775 /* Now determine the call target, its name, value,
5776 section. */
5777 sym_sec = NULL;
5778 sym_value = 0;
5779 destination = 0;
5780 hash = NULL;
5781 sym_name = NULL;
5782 if (r_indx < symtab_hdr->sh_info)
5783 {
5784 /* It's a local symbol. */
f0070c1e
SP		 5785 Elf_Internal_Sym *sym =
5786 bfd_sym_from_r_symndx (&htab->root.sym_cache,
5787 input_bfd, r_indx);
5788 if (sym == NULL)
5789 goto error_ret_free_internal;
a06ea964 5790
50e192f0
SP		 5791 branch_to_c64 |= (sym->st_target_internal
5792 & ST_BRANCH_TO_C64);
5793
f0070c1e
SP		 5794 Elf_Internal_Shdr *hdr =
5795 elf_elfsections (input_bfd)[sym->st_shndx];
a06ea964 5796
a06ea964
NC		 5797 sym_sec = hdr->bfd_section;
5798 if (!sym_sec)
5799 /* This is an undefined symbol. It can never
5800 be resolved. */
5801 continue;
5802
5803 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5804 sym_value = sym->st_value;
5805 destination = (sym_value + irela->r_addend
5806 + sym_sec->output_offset
5807 + sym_sec->output_section->vma);
5808 st_type = ELF_ST_TYPE (sym->st_info);
5809 sym_name
5810 = bfd_elf_string_from_elf_section (input_bfd,
5811 symtab_hdr->sh_link,
5812 sym->st_name);
50e192f0
SP		 5813
5814 /* Get the interworking stub if needed. */
5815 stub_type = aarch64_interwork_stub (r_type,
5816 branch_to_c64);
a06ea964
NC		 5817 }
5818 else
5819 {
5820 int e_indx;
50e192f0
SP		 5821 struct elf_aarch64_link_hash_table *globals =
5822 elf_aarch64_hash_table (info);
a06ea964
NC		 5823
5824 e_indx = r_indx - symtab_hdr->sh_info;
cec5225b 5825 hash = ((struct elf_aarch64_link_hash_entry *)
a06ea964
NC		 5826 elf_sym_hashes (input_bfd)[e_indx]);
5827
5828 while (hash->root.root.type == bfd_link_hash_indirect
5829 || hash->root.root.type == bfd_link_hash_warning)
cec5225b 5830 hash = ((struct elf_aarch64_link_hash_entry *)
a06ea964
NC		 5831 hash->root.root.u.i.link);
5832
50e192f0
SP		 5833 /* Static executable. */
5834 if (globals->root.splt == NULL || hash == NULL
5835 || hash->root.plt.offset == (bfd_vma) - 1)
5836 {
5837 branch_to_c64 |= (hash->root.target_internal
5838 & ST_BRANCH_TO_C64);
5839 stub_type = aarch64_interwork_stub (r_type,
5840 branch_to_c64);
5841 }
5842
a06ea964
NC		 5843 if (hash->root.root.type == bfd_link_hash_defined
5844 || hash->root.root.type == bfd_link_hash_defweak)
5845 {
a06ea964
NC		 5846 sym_sec = hash->root.root.u.def.section;
5847 sym_value = hash->root.root.u.def.value;
5848 /* For a destination in a shared library,
5849 use the PLT stub as target address to
5850 decide whether a branch stub is
5851 needed. */
5852 if (globals->root.splt != NULL && hash != NULL
5853 && hash->root.plt.offset != (bfd_vma) - 1)
5854 {
5855 sym_sec = globals->root.splt;
5856 sym_value = hash->root.plt.offset;
5857 if (sym_sec->output_section != NULL)
5858 destination = (sym_value
5859 + sym_sec->output_offset
5860 +
5861 sym_sec->output_section->vma);
5862 }
5863 else if (sym_sec->output_section != NULL)
5864 destination = (sym_value + irela->r_addend
5865 + sym_sec->output_offset
5866 + sym_sec->output_section->vma);
5867 }
5868 else if (hash->root.root.type == bfd_link_hash_undefined
5869 || (hash->root.root.type
5870 == bfd_link_hash_undefweak))
5871 {
5872 /* For a shared library, use the PLT stub as
5873 target address to decide whether a long
5874 branch stub is needed.
5875 For absolute code, they cannot be handled. */
a06ea964
NC		 5876
5877 if (globals->root.splt != NULL && hash != NULL
5878 && hash->root.plt.offset != (bfd_vma) - 1)
5879 {
5880 sym_sec = globals->root.splt;
5881 sym_value = hash->root.plt.offset;
5882 if (sym_sec->output_section != NULL)
5883 destination = (sym_value
5884 + sym_sec->output_offset
5885 +
5886 sym_sec->output_section->vma);
5887 }
5888 else
5889 continue;
5890 }
5891 else
5892 {
5893 bfd_set_error (bfd_error_bad_value);
5894 goto error_ret_free_internal;
5895 }
5896 st_type = ELF_ST_TYPE (hash->root.type);
5897 sym_name = hash->root.root.root.string;
5898 }
5899
5900 /* Determine what (if any) linker stub is needed. */
50e192f0
SP		 5901 if (stub_type == aarch64_stub_none)
5902 stub_type = aarch64_type_of_stub (section, irela, sym_sec,
5903 st_type, destination);
5904
a06ea964
NC		 5905 if (stub_type == aarch64_stub_none)
5906 continue;
5907
5908 /* Support for grouping stub sections. */
5909 id_sec = htab->stub_group[section->id].link_sec;
5910
5911 /* Get the name of this stub. */
cec5225b 5912 stub_name = elfNN_aarch64_stub_name (id_sec, sym_sec, hash,
50e192f0 5913 irela, stub_type);
a06ea964
NC		 5914 if (!stub_name)
5915 goto error_ret_free_internal;
5916
5917 stub_entry =
5918 aarch64_stub_hash_lookup (&htab->stub_hash_table,
5919 stub_name, FALSE, FALSE);
5920 if (stub_entry != NULL)
5921 {
5922 /* The proper stub has already been created. */
5923 free (stub_name);
3da64fe4
RA		 5924 /* Always update this stub's target since it may have
5925 changed after layout. */
5926 stub_entry->target_value = sym_value + irela->r_addend;
50e192f0
SP		 5927
5928 /* Set LSB for A64 to C64 branch. */
5929 if (branch_to_c64)
5930 stub_entry->target_value |= 1;
5931
a06ea964
NC		 5932 continue;
5933 }
5934
ef857521
MS		 5935 stub_entry = _bfd_aarch64_add_stub_entry_in_group
5936 (stub_name, section, htab);
a06ea964
NC		 5937 if (stub_entry == NULL)
5938 {
5939 free (stub_name);
5940 goto error_ret_free_internal;
5941 }
5942
2f340668 5943 stub_entry->target_value = sym_value + irela->r_addend;
50e192f0
SP		 5944 /* Set LSB for A64 to C64 branch. */
5945 if (branch_to_c64)
5946 stub_entry->target_value |= 1;
5947
a06ea964
NC		 5948 stub_entry->target_section = sym_sec;
5949 stub_entry->stub_type = stub_type;
5950 stub_entry->h = hash;
5951 stub_entry->st_type = st_type;
5952
50e192f0
SP		 5953 suffix = aarch64_lookup_stub_type_suffix (stub_type);
5954
a06ea964
NC		 5955 if (sym_name == NULL)
5956 sym_name = "unnamed";
50e192f0
SP		 5957 len = (sizeof (STUB_ENTRY_NAME) + strlen (sym_name)
5958 + strlen (suffix));
a06ea964
NC		 5959 stub_entry->output_name = bfd_alloc (htab->stub_bfd, len);
5960 if (stub_entry->output_name == NULL)
5961 {
5962 free (stub_name);
5963 goto error_ret_free_internal;
5964 }
5965
5966 snprintf (stub_entry->output_name, len, STUB_ENTRY_NAME,
50e192f0 5967 sym_name, suffix);
a06ea964
NC		 5968
5969 stub_changed = TRUE;
5970 }
5971
5972 /* We're done with the internal relocs, free them. */
5973 if (elf_section_data (section)->relocs == NULL)
5974 free (internal_relocs);
5975 }
5976 }
5977
5978 if (!stub_changed)
5979 break;
5980
13f622ec 5981 _bfd_aarch64_resize_stubs (htab);
a06ea964
NC		 5982
5983 /* Ask the linker to do its stuff. */
5984 (*htab->layout_sections_again) ();
5985 stub_changed = FALSE;
5986 }
5987
5988 return TRUE;
5989
dc1e8a47 5990 error_ret_free_local:
a06ea964
NC		 5991 return FALSE;
5992}
5993
8504495a
AC		 5994bfd_boolean
5995elfNN_aarch64_size_stubs (bfd *output_bfd,
5996 bfd *stub_bfd,
5997 struct bfd_link_info *info,
5998 bfd_signed_vma group_size,
5999 asection * (*add_stub_section) (const char *,
6000 asection *))
6001{
6002 bfd_size_type stub_group_size;
6003 bfd_boolean stubs_always_before_branch;
6004 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
6005
6006 /* Propagate mach to stub bfd, because it may not have been
6007 finalized when we created stub_bfd. */
6008 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6009 bfd_get_mach (output_bfd));
6010
6011 /* Stash our params away. */
6012 htab->stub_bfd = stub_bfd;
6013 htab->add_stub_section = add_stub_section;
6014
6015 stubs_always_before_branch = group_size < 0;
6016 if (group_size < 0)
6017 stub_group_size = -group_size;
6018 else
6019 stub_group_size = group_size;
6020
6021 if (stub_group_size == 1)
6022 {
6023 /* Default values. */
6024 /* AArch64 branch range is +-128MB. The value used is 1MB less. */
6025 stub_group_size = 127 * 1024 * 1024;
6026 }
6027
6028 group_sections (htab, stub_group_size, stubs_always_before_branch);
6029
6030 (*htab->layout_sections_again) ();
6031
6032 /* The layout changes we do in aarch64_size_stubs may mean we need to
6033 adjust the PCC base alignment (or individual section bounds) again,
6034 and vice versa. Here we run both in a loop until we no longer make
6035 further adjustments. */
6036 enum { max_tries = 10 };
6037 int tries;
6038 for (tries = 0; tries < max_tries; tries++)
6039 {
6040 if (!aarch64_size_stubs (output_bfd, info))
6041 return FALSE;
6042
6043 bfd_boolean changed_layout = FALSE;
6044 if (!c64_resize_sections (output_bfd, info, &changed_layout))
6045 return FALSE;
6046
6047 if (!changed_layout)
6048 break;
6049 }
6050
6051 if (tries >= max_tries)
6052 {
6053 _bfd_error_handler (_("looping in elfNN_aarch64_size_stubs"));
6054 abort ();
6055 }
6056
6057 if (pcc_high_sec)
6058 {
6059 /* Now that we've sized everything up, add any additional
6060 padding *after* the last section needed to get exact
6061 PCC bounds. */
6062 bfd_vma current_high = pcc_high_sec->vma + pcc_high_sec->size;
6063 bfd_vma desired_high = pcc_high;
6064 BFD_ASSERT (desired_high >= current_high);
6065 bfd_vma padding = desired_high - current_high;
6066 if (padding)
6067 {
6068 htab->c64_pad_after_section (pcc_high_sec, padding);
6069 htab->layout_sections_again ();
6070 }
6071 }
6072
6073 return TRUE;
6074}
6075
6076
a06ea964
NC		 6077/* Build all the stubs associated with the current output file. The
6078 stubs are kept in a hash table attached to the main linker hash
6079 table. We also set up the .plt entries for statically linked PIC
6080 functions here. This function is called via aarch64_elf_finish in the
6081 linker. */
6082
6083bfd_boolean
cec5225b 6084elfNN_aarch64_build_stubs (struct bfd_link_info *info)
a06ea964
NC		 6085{
6086 asection *stub_sec;
6087 struct bfd_hash_table *table;
cec5225b 6088 struct elf_aarch64_link_hash_table *htab;
a06ea964 6089
cec5225b 6090 htab = elf_aarch64_hash_table (info);
a06ea964
NC		 6091
6092 for (stub_sec = htab->stub_bfd->sections;
6093 stub_sec != NULL; stub_sec = stub_sec->next)
6094 {
6095 bfd_size_type size;
6096
6097 /* Ignore non-stub sections. */
6098 if (!strstr (stub_sec->name, STUB_SUFFIX))
6099 continue;
6100
6101 /* Allocate memory to hold the linker stubs. */
6102 size = stub_sec->size;
6103 stub_sec->contents = bfd_zalloc (htab->stub_bfd, size);
6104 if (stub_sec->contents == NULL && size != 0)
6105 return FALSE;
6106 stub_sec->size = 0;
61865519 6107
9a2ebffd
JW		 6108 /* Add a branch around the stub section, and a nop, to keep it 8 byte
6109 aligned, as long branch stubs contain a 64-bit address. */
61865519 6110 bfd_putl32 (0x14000000 | (size >> 2), stub_sec->contents);
9a2ebffd
JW		 6111 bfd_putl32 (INSN_NOP, stub_sec->contents + 4);
6112 stub_sec->size += 8;
a06ea964
NC		 6113 }
6114
6115 /* Build the stubs as directed by the stub hash table. */
6116 table = &htab->stub_hash_table;
50e192f0
SP		 6117
6118 bfd_error_type save_error = bfd_get_error ();
6119 bfd_set_error (bfd_error_no_error);
a06ea964
NC		 6120 bfd_hash_traverse (table, aarch64_build_one_stub, info);
6121
50e192f0
SP		 6122 if (bfd_get_error () != bfd_error_no_error)
6123 return FALSE;
6124
6125 bfd_set_error (save_error);
6126
a06ea964
NC		 6127 return TRUE;
6128}
6129
6130
6131/* Add an entry to the code/data map for section SEC. */
6132
6133static void
f0070c1e
SP		 6134elfNN_aarch64_section_map_add (bfd *abfd, asection *sec, char type,
6135 bfd_vma vma)
a06ea964
NC		 6136{
6137 struct _aarch64_elf_section_data *sec_data =
cec5225b 6138 elf_aarch64_section_data (sec);
a06ea964
NC		 6139 unsigned int newidx;
6140
f0070c1e
SP		 6141 /* The aarch64 section hook was not called for this section. */
6142 if (!sec_data->elf.is_target_section_data)
6143 {
6144 struct _aarch64_elf_section_data *newdata =
6145 bfd_zalloc (abfd, sizeof (*newdata));
6146
6147 if (newdata == NULL)
6148 return;
6149
6150 newdata->elf = sec_data->elf;
6151 newdata->elf.is_target_section_data = TRUE;
6152 free (sec_data);
6153 sec->used_by_bfd = sec_data = newdata;
6154 }
6155
a06ea964
NC		 6156 if (sec_data->map == NULL)
6157 {
cec5225b 6158 sec_data->map = bfd_malloc (sizeof (elf_aarch64_section_map));
a06ea964
NC		 6159 sec_data->mapcount = 0;
6160 sec_data->mapsize = 1;
6161 }
6162
6163 newidx = sec_data->mapcount++;
6164
6165 if (sec_data->mapcount > sec_data->mapsize)
6166 {
6167 sec_data->mapsize *= 2;
6168 sec_data->map = bfd_realloc_or_free
cec5225b 6169 (sec_data->map, sec_data->mapsize * sizeof (elf_aarch64_section_map));
a06ea964
NC		 6170 }
6171
6172 if (sec_data->map)
6173 {
6174 sec_data->map[newidx].vma = vma;
6175 sec_data->map[newidx].type = type;
6176 }
6177}
6178
6179
6180/* Initialise maps of insn/data for input BFDs. */
6181void
7ff36d1a 6182bfd_elfNN_aarch64_init_maps (bfd *abfd, struct bfd_link_info *info)
a06ea964
NC		 6183{
6184 Elf_Internal_Sym *isymbuf;
6185 Elf_Internal_Shdr *hdr;
6186 unsigned int i, localsyms;
6187
6188 /* Make sure that we are dealing with an AArch64 elf binary. */
6189 if (!is_aarch64_elf (abfd))
6190 return;
6191
f0070c1e
SP		 6192 if (elf_aarch64_tdata (abfd)->secmaps_initialised)
6193 return;
6194
a06ea964 6195 if ((abfd->flags & DYNAMIC) != 0)
68fcca92 6196 return;
a06ea964
NC		 6197
6198 hdr = &elf_symtab_hdr (abfd);
6199 localsyms = hdr->sh_info;
6200
6201 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6202 should contain the number of local symbols, which should come before any
6203 global symbols. Mapping symbols are always local. */
6204 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL, NULL);
6205
6206 /* No internal symbols read? Skip this BFD. */
6207 if (isymbuf == NULL)
6208 return;
6209
7ff36d1a
SP		 6210 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table ((info));
6211
a06ea964
NC		 6212 for (i = 0; i < localsyms; i++)
6213 {
6214 Elf_Internal_Sym *isym = &isymbuf[i];
6215 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6216 const char *name;
6217
6218 if (sec != NULL && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6219 {
6220 name = bfd_elf_string_from_elf_section (abfd,
6221 hdr->sh_link,
6222 isym->st_name);
6223
6224 if (bfd_is_aarch64_special_symbol_name
6225 (name, BFD_AARCH64_SPECIAL_SYM_TYPE_MAP))
7ff36d1a
SP		 6226 {
6227 elfNN_aarch64_section_map_add (abfd, sec, name[1],
6228 isym->st_value);
6229 if (!htab->c64_output && name[1] == 'c')
6230 htab->c64_output = TRUE;
6231 }
a06ea964
NC		 6232 }
6233 }
f0070c1e 6234 elf_aarch64_tdata (abfd)->secmaps_initialised = TRUE;
a06ea964
NC		 6235}
6236
37c18eed
SD		 6237static void
6238setup_plt_values (struct bfd_link_info *link_info,
6239 aarch64_plt_type plt_type)
6240{
6241 struct elf_aarch64_link_hash_table *globals;
6242 globals = elf_aarch64_hash_table (link_info);
6243
e19e9199
SP		 6244 /* Set up plt stubs in case we need C64 PLT. Override BTI/PAC since they're
6245 not compatible. PLT stub sizes are the same as the default ones. */
6246 if (globals->c64_rel)
6247 {
6248 if (plt_type != PLT_NORMAL)
6249 _bfd_error_handler
6250 (_("ignoring C64-incompatible extensions: %s"),
6251 (plt_type == PLT_BTI_PAC ? "BTI, PAC"
6252 : plt_type == PLT_BTI ? "BTI" : "PAC"));
6253
6254 globals->plt0_entry = elfNN_c64_small_plt0_entry;
6255 globals->plt_entry = elfNN_c64_small_plt_entry;
6256 return;
6257 }
6258
1dbade74
SD		 6259 if (plt_type == PLT_BTI_PAC)
6260 {
68bb0359 6261 globals->plt0_entry = elfNN_aarch64_small_plt0_bti_entry;
1dbade74
SD		 6262
6263 /* Only in ET_EXEC we need PLTn with BTI. */
6264 if (bfd_link_pde (link_info))
6265 {
6266 globals->plt_entry_size = PLT_BTI_PAC_SMALL_ENTRY_SIZE;
6267 globals->plt_entry = elfNN_aarch64_small_plt_bti_pac_entry;
6268 }
6269 else
6270 {
6271 globals->plt_entry_size = PLT_PAC_SMALL_ENTRY_SIZE;
6272 globals->plt_entry = elfNN_aarch64_small_plt_pac_entry;
6273 }
6274 }
6275 else if (plt_type == PLT_BTI)
37c18eed 6276 {
37c18eed 6277 globals->plt0_entry = elfNN_aarch64_small_plt0_bti_entry;
37c18eed
SD		 6278
6279 /* Only in ET_EXEC we need PLTn with BTI. */
6280 if (bfd_link_pde (link_info))
6281 {
6282 globals->plt_entry_size = PLT_BTI_SMALL_ENTRY_SIZE;
6283 globals->plt_entry = elfNN_aarch64_small_plt_bti_entry;
6284 }
6285 }
1dbade74
SD		 6286 else if (plt_type == PLT_PAC)
6287 {
1dbade74
SD		 6288 globals->plt_entry_size = PLT_PAC_SMALL_ENTRY_SIZE;
6289 globals->plt_entry = elfNN_aarch64_small_plt_pac_entry;
6290 }
37c18eed
SD		 6291}
6292
a06ea964
NC		 6293/* Set option values needed during linking. */
6294void
cec5225b 6295bfd_elfNN_aarch64_set_options (struct bfd *output_bfd,
a06ea964
NC		 6296 struct bfd_link_info *link_info,
6297 int no_enum_warn,
68fcca92 6298 int no_wchar_warn, int pic_veneer,
4106101c 6299 int fix_erratum_835769,
739b5c9c 6300 erratum_84319_opts fix_erratum_843419,
37c18eed
SD		 6301 int no_apply_dynamic_relocs,
6302 aarch64_bti_pac_info bp_info)
a06ea964 6303{
cec5225b 6304 struct elf_aarch64_link_hash_table *globals;
a06ea964 6305
cec5225b 6306 globals = elf_aarch64_hash_table (link_info);
a06ea964 6307 globals->pic_veneer = pic_veneer;
68fcca92 6308 globals->fix_erratum_835769 = fix_erratum_835769;
739b5c9c
TC		 6309 /* If the default options are used, then ERRAT_ADR will be set by default
6310 which will enable the ADRP->ADR workaround for the erratum 843419
6311 workaround. */
4106101c 6312 globals->fix_erratum_843419 = fix_erratum_843419;
1f56df9d 6313 globals->no_apply_dynamic_relocs = no_apply_dynamic_relocs;
a1bdea65 6314 globals->c64_rel = 0;
a06ea964
NC		 6315
6316 BFD_ASSERT (is_aarch64_elf (output_bfd));
6317 elf_aarch64_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
6318 elf_aarch64_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
37c18eed
SD		 6319
6320 switch (bp_info.bti_type)
6321 {
6322 case BTI_WARN:
6323 elf_aarch64_tdata (output_bfd)->no_bti_warn = 0;
6324 elf_aarch64_tdata (output_bfd)->gnu_and_prop
6325 |= GNU_PROPERTY_AARCH64_FEATURE_1_BTI;
6326 break;
6327
6328 default:
6329 break;
6330 }
6331 elf_aarch64_tdata (output_bfd)->plt_type = bp_info.plt_type;
f0070c1e 6332 elf_aarch64_tdata (output_bfd)->secmaps_initialised = FALSE;
a06ea964
NC		 6333}
6334
a06ea964
NC		 6335static bfd_vma
6336aarch64_calculate_got_entry_vma (struct elf_link_hash_entry *h,
cec5225b 6337 struct elf_aarch64_link_hash_table
a06ea964
NC		 6338 *globals, struct bfd_link_info *info,
6339 bfd_vma value, bfd *output_bfd,
6340 bfd_boolean *unresolved_reloc_p)
6341{
6342 bfd_vma off = (bfd_vma) - 1;
6343 asection *basegot = globals->root.sgot;
6344 bfd_boolean dyn = globals->root.dynamic_sections_created;
6345
6346 if (h != NULL)
6347 {
a6bb11b2 6348 BFD_ASSERT (basegot != NULL);
a06ea964
NC		 6349 off = h->got.offset;
6350 BFD_ASSERT (off != (bfd_vma) - 1);
0e1862bb
L		 6351 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
6352 || (bfd_link_pic (info)
a06ea964
NC		 6353 && SYMBOL_REFERENCES_LOCAL (info, h))
6354 || (ELF_ST_VISIBILITY (h->other)
6355 && h->root.type == bfd_link_hash_undefweak))
6356 {
6357 /* This is actually a static link, or it is a -Bsymbolic link
6358 and the symbol is defined locally. We must initialize this
6359 entry in the global offset table. Since the offset must
a6bb11b2
YZ		 6360 always be a multiple of 8 (4 in the case of ILP32), we use
6361 the least significant bit to record whether we have
6362 initialized it already.
a06ea964
NC		 6363 When doing a dynamic link, we create a .rel(a).got relocation
6364 entry to initialize the value. This is done in the
6365 finish_dynamic_symbol routine. */
6366 if ((off & 1) != 0)
6367 off &= ~1;
6368 else
6369 {
cec5225b 6370 bfd_put_NN (output_bfd, value, basegot->contents + off);
a06ea964
NC		 6371 h->got.offset |= 1;
6372 }
6373 }
6374 else
6375 *unresolved_reloc_p = FALSE;
6376
6377 off = off + basegot->output_section->vma + basegot->output_offset;
6378 }
6379
6380 return off;
6381}
6382
6383/* Change R_TYPE to a more efficient access model where possible,
6384 return the new reloc type. */
6385
a6bb11b2
YZ		 6386static bfd_reloc_code_real_type
6387aarch64_tls_transition_without_check (bfd_reloc_code_real_type r_type,
4ca9b406
SP		 6388 struct bfd_link_info *info,
6389 struct elf_link_hash_entry *h,
ece841e8 6390 bfd_boolean *requires_c64_tls_stub)
a06ea964 6391{
8a4f8507 6392 bfd_boolean local_exec = (bfd_link_executable (info)
1408e112 6393 && TLS_SYMBOL_REFERENCES_LOCAL (info, h));
a6bb11b2 6394
a06ea964
NC		 6395 switch (r_type)
6396 {
a6bb11b2 6397 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
ce336788 6398 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
8a4f8507 6399 return (local_exec
a6bb11b2
YZ		 6400 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
6401 : BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21);
6402
389b8029 6403 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
8a4f8507 6404 return (local_exec
389b8029
MS		 6405 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
6406 : r_type);
6407
1ada945d 6408 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
8a4f8507 6409 return (local_exec
1ada945d
MS		 6410 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
6411 : BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19);
6412
0484b454 6413 case BFD_RELOC_AARCH64_TLSDESC_LDR:
8a4f8507 6414 return (local_exec
0484b454
RL		 6415 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
6416 : BFD_RELOC_AARCH64_NONE);
6417
6418 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
8a4f8507 6419 return (local_exec
0484b454
RL		 6420 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
6421 : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC);
6422
6423 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
8a4f8507 6424 return (local_exec
0484b454
RL		 6425 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
6426 : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1);
6427
a6bb11b2 6428 case BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC:
ce336788 6429 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
8a4f8507 6430 return (local_exec
a6bb11b2
YZ		 6431 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
6432 : BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC);
6433
ece841e8
MM		 6434 case BFD_RELOC_MORELLO_TLSIE_ADR_GOTTPREL_PAGE20:
6435 if (!local_exec)
6436 return r_type;
6437 *requires_c64_tls_stub = TRUE;
6438 return BFD_RELOC_MORELLO_ADR_HI20_PCREL;
6439
6440 case BFD_RELOC_MORELLO_TLSIE_ADD_LO12:
6441 if (!local_exec)
6442 return r_type;
6443 *requires_c64_tls_stub = TRUE;
6444 return BFD_RELOC_AARCH64_ADD_LO12;
6445
a6bb11b2 6446 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
8a4f8507 6447 return local_exec ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1 : r_type;
a6bb11b2
YZ		 6448
6449 case BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC:
8a4f8507 6450 return local_exec ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC : r_type;
a6bb11b2 6451
043bf05a
MS		 6452 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
6453 return r_type;
6454
3c12b054 6455 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
8a4f8507 6456 return (local_exec
3c12b054
MS		 6457 ? BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
6458 : BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19);
6459
ece841e8
MM		 6460 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
6461 if (local_exec)
6462 {
6463 *requires_c64_tls_stub = TRUE;
6464 return BFD_RELOC_MORELLO_ADR_HI20_PCREL;
6465 }
6466 return BFD_RELOC_MORELLO_TLSIE_ADR_GOTTPREL_PAGE20;
6467
6468 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
6469 if (local_exec)
6470 {
6471 *requires_c64_tls_stub = TRUE;
6472 return BFD_RELOC_AARCH64_ADD_LO12;
6473 }
6474 return BFD_RELOC_MORELLO_TLSIE_ADD_LO12;
6475
4ca9b406 6476 case BFD_RELOC_MORELLO_TLSDESC_CALL:
ece841e8
MM		 6477 /* Instructions with this relocation will be fully resolved during the
6478 transition into an add and scbnds pair. */
6479 return BFD_RELOC_AARCH64_NONE;
4ca9b406 6480
f955cccf 6481 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
4ca9b406 6482 case BFD_RELOC_AARCH64_TLSDESC_ADD:
a6bb11b2 6483 case BFD_RELOC_AARCH64_TLSDESC_CALL:
4ca9b406 6484 /* Instructions with these relocations will be fully resolved during the
ece841e8 6485 transition into either a NOP in the A64 case or an ldp in C64. */
a6bb11b2
YZ		 6486 return BFD_RELOC_AARCH64_NONE;
6487
259364ad
JW		 6488 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
6489 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
6490 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
8a4f8507 6491 return local_exec ? BFD_RELOC_AARCH64_NONE : r_type;
259364ad 6492
ac734732
RL		 6493#if ARCH_SIZE == 64
6494 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
8a4f8507 6495 return local_exec
ac734732
RL		 6496 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
6497 : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC;
6498
6499 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
8a4f8507 6500 return local_exec
ac734732
RL		 6501 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
6502 : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1;
6503#endif
6504
a6bb11b2
YZ		 6505 default:
6506 break;
a06ea964
NC		 6507 }
6508
6509 return r_type;
6510}
6511
6512static unsigned int
a6bb11b2 6513aarch64_reloc_got_type (bfd_reloc_code_real_type r_type)
a06ea964
NC		 6514{
6515 switch (r_type)
6516 {
a6bb11b2
YZ		 6517 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
6518 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
7018c030 6519 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
ce336788 6520 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
a2e1db00 6521 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
99ad26cb 6522 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
ce336788 6523 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
dc8008f5 6524 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
74a1bfe1 6525 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
a06ea964
NC		 6526 return GOT_NORMAL;
6527
a1bdea65
SP		 6528 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
6529 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
60d18fc3 6530 return GOT_NORMAL;
a1bdea65 6531
ce336788 6532 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a6bb11b2 6533 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
3c12b054 6534 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
7ba7cfe4 6535 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
94facae3 6536 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
73f925cc 6537 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
f69e4920 6538 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
77a69ff8 6539 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
a06ea964
NC		 6540 return GOT_TLS_GD;
6541
4ca9b406
SP		 6542 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
6543 case BFD_RELOC_MORELLO_TLSDESC_CALL:
6544 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
0484b454 6545 case BFD_RELOC_AARCH64_TLSDESC_ADD:
f955cccf 6546 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
a6bb11b2 6547 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
389b8029 6548 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
a6bb11b2 6549 case BFD_RELOC_AARCH64_TLSDESC_CALL:
a6bb11b2 6550 case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
f955cccf 6551 case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
1ada945d 6552 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
0484b454
RL		 6553 case BFD_RELOC_AARCH64_TLSDESC_LDR:
6554 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
6555 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
a06ea964
NC		 6556 return GOT_TLSDESC_GD;
6557
1408e112
MM		 6558 case BFD_RELOC_MORELLO_TLSIE_ADR_GOTTPREL_PAGE20:
6559 case BFD_RELOC_MORELLO_TLSIE_ADD_LO12:
a6bb11b2 6560 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
a6bb11b2 6561 case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
ce336788 6562 case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
043bf05a 6563 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
3b957e5b
RL		 6564 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
6565 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
a06ea964
NC		 6566 return GOT_TLS_IE;
6567
a6bb11b2
YZ		 6568 default:
6569 break;
a06ea964
NC		 6570 }
6571 return GOT_UNKNOWN;
6572}
6573
6574static bfd_boolean
6575aarch64_can_relax_tls (bfd *input_bfd,
6576 struct bfd_link_info *info,
4ca9b406 6577 const Elf_Internal_Rela *rel,
a06ea964
NC		 6578 struct elf_link_hash_entry *h,
6579 unsigned long r_symndx)
6580{
6581 unsigned int symbol_got_type;
6582 unsigned int reloc_got_type;
6583
4ca9b406
SP		 6584 bfd_reloc_code_real_type bfd_r_type
6585 = elfNN_aarch64_bfd_reloc_from_type (input_bfd,
6586 ELFNN_R_TYPE (rel->r_info));
6587
6588 if (! IS_AARCH64_TLS_RELAX_RELOC (bfd_r_type))
a06ea964
NC		 6589 return FALSE;
6590
cec5225b 6591 symbol_got_type = elfNN_aarch64_symbol_got_type (h, input_bfd, r_symndx);
4ca9b406 6592 reloc_got_type = aarch64_reloc_got_type (bfd_r_type);
a06ea964
NC		 6593
6594 if (symbol_got_type == GOT_TLS_IE && GOT_TLS_GD_ANY_P (reloc_got_type))
6595 return TRUE;
6596
6dda7875 6597 if (!bfd_link_executable (info))
a06ea964
NC		 6598 return FALSE;
6599
6600 if (h && h->root.type == bfd_link_hash_undefweak)
6601 return FALSE;
6602
6603 return TRUE;
6604}
6605
a6bb11b2
YZ		 6606/* Given the relocation code R_TYPE, return the relaxed bfd reloc
6607 enumerator. */
6608
6609static bfd_reloc_code_real_type
a06ea964
NC		 6610aarch64_tls_transition (bfd *input_bfd,
6611 struct bfd_link_info *info,
4ca9b406 6612 const Elf_Internal_Rela *rel,
a06ea964 6613 struct elf_link_hash_entry *h,
ece841e8
MM		 6614 unsigned long r_symndx,
6615 bfd_boolean *requires_c64_tls_stub)
a06ea964 6616{
ece841e8
MM		 6617 /* Initialisation done here. The set to TRUE is done in
6618 aarch64_tls_transition_without_check if necessary. */
6619 *requires_c64_tls_stub = FALSE;
a6bb11b2 6620 bfd_reloc_code_real_type bfd_r_type
4ca9b406
SP		 6621 = elfNN_aarch64_bfd_reloc_from_type (input_bfd,
6622 ELFNN_R_TYPE (rel->r_info));
6623
6624 if (! aarch64_can_relax_tls (input_bfd, info, rel, h, r_symndx))
6625 return bfd_r_type;
a06ea964 6626
4ca9b406 6627 return aarch64_tls_transition_without_check (bfd_r_type, info, h,
ece841e8 6628 requires_c64_tls_stub);
a06ea964
NC		 6629}
6630
6631/* Return the base VMA address which should be subtracted from real addresses
a6bb11b2 6632 when resolving R_AARCH64_TLS_DTPREL relocation. */
a06ea964
NC		 6633
6634static bfd_vma
6635dtpoff_base (struct bfd_link_info *info)
6636{
6637 /* If tls_sec is NULL, we should have signalled an error already. */
6638 BFD_ASSERT (elf_hash_table (info)->tls_sec != NULL);
6639 return elf_hash_table (info)->tls_sec->vma;
6640}
6641
a06ea964
NC		 6642/* Return the base VMA address which should be subtracted from real addresses
6643 when resolving R_AARCH64_TLS_GOTTPREL64 relocations. */
6644
6645static bfd_vma
6646tpoff_base (struct bfd_link_info *info)
6647{
6648 struct elf_link_hash_table *htab = elf_hash_table (info);
6649
6650 /* If tls_sec is NULL, we should have signalled an error already. */
ac21917f 6651 BFD_ASSERT (htab->tls_sec != NULL);
a06ea964 6652
bf3eaebd 6653 bfd_vma base = align_power ((bfd_vma) TCB_SIZE (info->output_bfd),
a06ea964
NC		 6654 htab->tls_sec->alignment_power);
6655 return htab->tls_sec->vma - base;
6656}
6657
6658static bfd_vma *
6659symbol_got_offset_ref (bfd *input_bfd, struct elf_link_hash_entry *h,
6660 unsigned long r_symndx)
6661{
6662 /* Calculate the address of the GOT entry for symbol
6663 referred to in h. */
6664 if (h != NULL)
6665 return &h->got.offset;
6666 else
6667 {
6668 /* local symbol */
6669 struct elf_aarch64_local_symbol *l;
6670
cec5225b 6671 l = elf_aarch64_locals (input_bfd);
a06ea964
NC		 6672 return &l[r_symndx].got_offset;
6673 }
6674}
6675
6676static void
6677symbol_got_offset_mark (bfd *input_bfd, struct elf_link_hash_entry *h,
6678 unsigned long r_symndx)
6679{
6680 bfd_vma *p;
6681 p = symbol_got_offset_ref (input_bfd, h, r_symndx);
6682 *p |= 1;
6683}
6684
6685static int
6686symbol_got_offset_mark_p (bfd *input_bfd, struct elf_link_hash_entry *h,
6687 unsigned long r_symndx)
6688{
6689 bfd_vma value;
6690 value = * symbol_got_offset_ref (input_bfd, h, r_symndx);
6691 return value & 1;
6692}
6693
6694static bfd_vma
6695symbol_got_offset (bfd *input_bfd, struct elf_link_hash_entry *h,
6696 unsigned long r_symndx)
6697{
6698 bfd_vma value;
6699 value = * symbol_got_offset_ref (input_bfd, h, r_symndx);
6700 value &= ~1;
6701 return value;
6702}
6703
6704static bfd_vma *
6705symbol_tlsdesc_got_offset_ref (bfd *input_bfd, struct elf_link_hash_entry *h,
6706 unsigned long r_symndx)
6707{
6708 /* Calculate the address of the GOT entry for symbol
6709 referred to in h. */
6710 if (h != NULL)
6711 {
cec5225b
YZ		 6712 struct elf_aarch64_link_hash_entry *eh;
6713 eh = (struct elf_aarch64_link_hash_entry *) h;
a06ea964
NC		 6714 return &eh->tlsdesc_got_jump_table_offset;
6715 }
6716 else
6717 {
6718 /* local symbol */
6719 struct elf_aarch64_local_symbol *l;
6720
cec5225b 6721 l = elf_aarch64_locals (input_bfd);
a06ea964
NC		 6722 return &l[r_symndx].tlsdesc_got_jump_table_offset;
6723 }
6724}
6725
6726static void
6727symbol_tlsdesc_got_offset_mark (bfd *input_bfd, struct elf_link_hash_entry *h,
6728 unsigned long r_symndx)
6729{
6730 bfd_vma *p;
6731 p = symbol_tlsdesc_got_offset_ref (input_bfd, h, r_symndx);
6732 *p |= 1;
6733}
6734
6735static int
6736symbol_tlsdesc_got_offset_mark_p (bfd *input_bfd,
6737 struct elf_link_hash_entry *h,
6738 unsigned long r_symndx)
6739{
6740 bfd_vma value;
6741 value = * symbol_tlsdesc_got_offset_ref (input_bfd, h, r_symndx);
6742 return value & 1;
6743}
6744
6745static bfd_vma
6746symbol_tlsdesc_got_offset (bfd *input_bfd, struct elf_link_hash_entry *h,
6747 unsigned long r_symndx)
6748{
6749 bfd_vma value;
6750 value = * symbol_tlsdesc_got_offset_ref (input_bfd, h, r_symndx);
6751 value &= ~1;
6752 return value;
6753}
6754
68fcca92
JW		 6755/* Data for make_branch_to_erratum_835769_stub(). */
6756
6757struct erratum_835769_branch_to_stub_data
6758{
4106101c 6759 struct bfd_link_info *info;
68fcca92
JW		 6760 asection *output_section;
6761 bfd_byte *contents;
6762};
6763
6764/* Helper to insert branches to erratum 835769 stubs in the right
6765 places for a particular section. */
6766
6767static bfd_boolean
6768make_branch_to_erratum_835769_stub (struct bfd_hash_entry *gen_entry,
6769 void *in_arg)
6770{
6771 struct elf_aarch64_stub_hash_entry *stub_entry;
6772 struct erratum_835769_branch_to_stub_data *data;
6773 bfd_byte *contents;
6774 unsigned long branch_insn = 0;
6775 bfd_vma veneered_insn_loc, veneer_entry_loc;
6776 bfd_signed_vma branch_offset;
6777 unsigned int target;
6778 bfd *abfd;
6779
6780 stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
6781 data = (struct erratum_835769_branch_to_stub_data *) in_arg;
6782
6783 if (stub_entry->target_section != data->output_section
6784 || stub_entry->stub_type != aarch64_stub_erratum_835769_veneer)
6785 return TRUE;
6786
6787 contents = data->contents;
6788 veneered_insn_loc = stub_entry->target_section->output_section->vma
6789 + stub_entry->target_section->output_offset
6790 + stub_entry->target_value;
6791 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
6792 + stub_entry->stub_sec->output_offset
6793 + stub_entry->stub_offset;
6794 branch_offset = veneer_entry_loc - veneered_insn_loc;
6795
6796 abfd = stub_entry->target_section->owner;
6797 if (!aarch64_valid_branch_p (veneer_entry_loc, veneered_insn_loc))
4eca0228 6798 _bfd_error_handler
90b6238f 6799 (_("%pB: error: erratum 835769 stub out "
4eca0228 6800 "of range (input file too large)"), abfd);
68fcca92
JW		 6801
6802 target = stub_entry->target_value;
6803 branch_insn = 0x14000000;
6804 branch_offset >>= 2;
6805 branch_offset &= 0x3ffffff;
6806 branch_insn |= branch_offset;
6807 bfd_putl32 (branch_insn, &contents[target]);
6808
6809 return TRUE;
6810}
6811
4106101c
MS		 6812
6813static bfd_boolean
6814_bfd_aarch64_erratum_843419_branch_to_stub (struct bfd_hash_entry *gen_entry,
6815 void *in_arg)
6816{
6817 struct elf_aarch64_stub_hash_entry *stub_entry
6818 = (struct elf_aarch64_stub_hash_entry *) gen_entry;
6819 struct erratum_835769_branch_to_stub_data *data
6820 = (struct erratum_835769_branch_to_stub_data *) in_arg;
6821 struct bfd_link_info *info;
6822 struct elf_aarch64_link_hash_table *htab;
6823 bfd_byte *contents;
6824 asection *section;
6825 bfd *abfd;
6826 bfd_vma place;
6827 uint32_t insn;
6828
6829 info = data->info;
6830 contents = data->contents;
6831 section = data->output_section;
6832
6833 htab = elf_aarch64_hash_table (info);
6834
6835 if (stub_entry->target_section != section
6836 || stub_entry->stub_type != aarch64_stub_erratum_843419_veneer)
6837 return TRUE;
6838
739b5c9c
TC		 6839 BFD_ASSERT (((htab->fix_erratum_843419 & ERRAT_ADRP) && stub_entry->stub_sec)
6840 || (htab->fix_erratum_843419 & ERRAT_ADR));
6841
6842 /* Only update the stub section if we have one. We should always have one if
6843 we're allowed to use the ADRP errata workaround, otherwise it is not
6844 required. */
6845 if (stub_entry->stub_sec)
6846 {
6847 insn = bfd_getl32 (contents + stub_entry->target_value);
6848 bfd_putl32 (insn,
6849 stub_entry->stub_sec->contents + stub_entry->stub_offset);
6850 }
4106101c
MS		 6851
6852 place = (section->output_section->vma + section->output_offset
6853 + stub_entry->adrp_offset);
6854 insn = bfd_getl32 (contents + stub_entry->adrp_offset);
6855
9fca35fc 6856 if (!_bfd_aarch64_adrp_p (insn))
4106101c
MS		 6857 abort ();
6858
6859 bfd_signed_vma imm =
6860 (_bfd_aarch64_sign_extend
6861 ((bfd_vma) _bfd_aarch64_decode_adrp_imm (insn) << 12, 33)
6862 - (place & 0xfff));
6863
739b5c9c 6864 if ((htab->fix_erratum_843419 & ERRAT_ADR)
4106101c
MS		 6865 && (imm >= AARCH64_MIN_ADRP_IMM && imm <= AARCH64_MAX_ADRP_IMM))
6866 {
92504105 6867 insn = (_bfd_aarch64_reencode_adr_imm (AARCH64_ADR_OP, imm, 0)
4106101c
MS		 6868 | AARCH64_RT (insn));
6869 bfd_putl32 (insn, contents + stub_entry->adrp_offset);
739b5c9c
TC		 6870 /* Stub is not needed, don't map it out. */
6871 stub_entry->stub_type = aarch64_stub_none;
4106101c 6872 }
739b5c9c 6873 else if (htab->fix_erratum_843419 & ERRAT_ADRP)
4106101c
MS		 6874 {
6875 bfd_vma veneered_insn_loc;
6876 bfd_vma veneer_entry_loc;
6877 bfd_signed_vma branch_offset;
6878 uint32_t branch_insn;
6879
6880 veneered_insn_loc = stub_entry->target_section->output_section->vma
6881 + stub_entry->target_section->output_offset
6882 + stub_entry->target_value;
6883 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
6884 + stub_entry->stub_sec->output_offset
6885 + stub_entry->stub_offset;
6886 branch_offset = veneer_entry_loc - veneered_insn_loc;
6887
6888 abfd = stub_entry->target_section->owner;
6889 if (!aarch64_valid_branch_p (veneer_entry_loc, veneered_insn_loc))
4eca0228 6890 _bfd_error_handler
90b6238f 6891 (_("%pB: error: erratum 843419 stub out "
4106101c
MS		 6892 "of range (input file too large)"), abfd);
6893
6894 branch_insn = 0x14000000;
6895 branch_offset >>= 2;
6896 branch_offset &= 0x3ffffff;
6897 branch_insn |= branch_offset;
6898 bfd_putl32 (branch_insn, contents + stub_entry->target_value);
6899 }
739b5c9c
TC		 6900 else
6901 {
6902 abfd = stub_entry->target_section->owner;
6903 _bfd_error_handler
64672071 6904 (_("%pB: error: erratum 843419 immediate 0x%" BFD_VMA_FMT "x "
739b5c9c
TC		 6905 "out of range for ADR (input file too large) and "
6906 "--fix-cortex-a53-843419=adr used. Run the linker with "
6907 "--fix-cortex-a53-843419=full instead"), abfd, imm);
6908 bfd_set_error (bfd_error_bad_value);
6909 /* This function is called inside a hashtable traversal and the error
6910 handlers called above turn into non-fatal errors. Which means this
6911 case ld returns an exit code 0 and also produces a broken object file.
6912 To prevent this, issue a hard abort. */
6913 BFD_FAIL ();
6914 }
4106101c
MS		 6915 return TRUE;
6916}
6917
6918
68fcca92
JW		 6919static bfd_boolean
6920elfNN_aarch64_write_section (bfd *output_bfd ATTRIBUTE_UNUSED,
6921 struct bfd_link_info *link_info,
6922 asection *sec,
6923 bfd_byte *contents)
6924
6925{
6926 struct elf_aarch64_link_hash_table *globals =
f872121a 6927 elf_aarch64_hash_table (link_info);
68fcca92
JW		 6928
6929 if (globals == NULL)
6930 return FALSE;
6931
6932 /* Fix code to point to erratum 835769 stubs. */
6933 if (globals->fix_erratum_835769)
6934 {
6935 struct erratum_835769_branch_to_stub_data data;
6936
4106101c 6937 data.info = link_info;
68fcca92
JW		 6938 data.output_section = sec;
6939 data.contents = contents;
6940 bfd_hash_traverse (&globals->stub_hash_table,
6941 make_branch_to_erratum_835769_stub, &data);
6942 }
6943
4106101c
MS		 6944 if (globals->fix_erratum_843419)
6945 {
6946 struct erratum_835769_branch_to_stub_data data;
6947
6948 data.info = link_info;
6949 data.output_section = sec;
6950 data.contents = contents;
6951 bfd_hash_traverse (&globals->stub_hash_table,
6952 _bfd_aarch64_erratum_843419_branch_to_stub, &data);
6953 }
6954
68fcca92
JW		 6955 return FALSE;
6956}
6957
2aff25ba
JW		 6958/* Return TRUE if RELOC is a relocation against the base of GOT table. */
6959
6960static bfd_boolean
6961aarch64_relocation_aginst_gp_p (bfd_reloc_code_real_type reloc)
6962{
6963 return (reloc == BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14
6964 || reloc == BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
6965 || reloc == BFD_RELOC_AARCH64_LD64_GOTOFF_LO15
6966 || reloc == BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC
6967 || reloc == BFD_RELOC_AARCH64_MOVW_GOTOFF_G1);
6968}
6969
40bbb79e
SP		 6970/* Build capability meta data, i.e. size and permissions for a capability. */
6971
6972static bfd_vma
e10c835d 6973cap_meta (size_t size, const asection *sec, bfd_boolean *guessed)
40bbb79e
SP		 6974{
6975
6976 if (size >= (1ULL << 56))
6977 return (bfd_vma) -1;
6978
b235f0e0
MM		 6979 /* N.b. We are only ever using this function for Morello.
6980 Morello is little-endian.
6981 We are returning a 64bit sized integer.
6982 The format this metadata is supposed to fit is
6983 | 56 bit length | 8 bit permissions |
6984 This means that (in little endian layout) we need to put the 56 bit size
6985 in the *lower* bits of the uint64_t. */
6986 uint64_t flags = 0;
40bbb79e 6987 if (sec->flags & SEC_CODE)
b235f0e0
MM		 6988 flags = 4;
6989 else if (sec->flags & SEC_READONLY
6990 || sec->flags & SEC_ROM)
6991 flags = 1;
6992 else if (sec->flags & SEC_ALLOC)
6993 flags = 2;
40bbb79e 6994
e10c835d
MM		 6995 /* We should usually be able to derive a valid set of permissions
6996 from the section flags. We know that when a relocation is against an
6997 SHN_ABS symbol the section has no associated flags and we must guess.
6998
6999 As it stands we don't know of any other instances where we do not have
7000 permission flags on a section. We choose to allow instances that we do
7001 not know of rather than abort on them so that if the guess is correct we
7002 don't hamper anyone progressing. */
b235f0e0 7003 if (flags == 0)
e10c835d
MM		 7004 {
7005 flags = 2;
7006 *guessed = TRUE;
7007 }
7008
b235f0e0 7009 return size | (flags << 56);
40bbb79e
SP		 7010}
7011
5fa80905
AC		 7012enum c64_section_perm_type {
7013 C64_SYM_UNKNOWN = 0,
7014 C64_SYM_STANDARD,
7015 C64_SYM_LINKER_DEF,
7016 C64_SYM_LDSCRIPT_DEF,
7017 C64_SYM_LDSCRIPT_START,
7018};
7019
7020static enum c64_section_perm_type
7021c64_symbol_section_adjustment (struct elf_link_hash_entry *h, bfd_vma value,
7022 asection *sym_sec, asection **ret_sec,
7023 struct bfd_link_info *info)
7024{
7025 if (!sym_sec)
7026 return C64_SYM_UNKNOWN;
7027
7028 *ret_sec = sym_sec;
7029 if (!h)
7030 return C64_SYM_STANDARD;
7031
7032 /* Linker defined symbols are always at the start of the section they
7033 track. */
7034 if (h->root.linker_def)
7035 return C64_SYM_LINKER_DEF;
7036 else if (h->root.ldscript_def)
7037 {
7038 const char *name = h->root.root.string;
7039 size_t len = strlen (name);
7040
7041 bfd_vma size = sym_sec->size - (value - sym_sec->vma);
7042 /* The special case: the symbol is at the end of the section.
7043 This could either mean that it is an end symbol or it is the
7044 start of the output section following the symbol. We try to
7045 guess if it is a start of the next section by reading its
7046 name. This is a compatibility hack, ideally linker scripts
7047 should be written such that start symbols are defined within
7048 the output section it intends to track. */
7049 if (size == 0
7050 && (len > 8 && name[0] == '_' && name[1] == '_'
7051 && (!strncmp (name + 2, "start_", 6)
7052 || !strcmp (name + len - 6, "_start"))))
7053 {
7054 asection *s = bfd_sections_find_if (info->output_bfd,
7055 section_start_symbol,
7056 &value);
7057 if (s != NULL)
7058 {
7059 *ret_sec = s;
7060 return C64_SYM_LDSCRIPT_START;
7061 }
7062 }
7063 return C64_SYM_LDSCRIPT_DEF;
7064 }
47b91198
MM		 7065
7066 if (h->start_stop)
7067 {
7068 asection *s = h->u2.start_stop_section->output_section;
7069 BFD_ASSERT (s != NULL);
7070 *ret_sec = s;
7071 return C64_SYM_LDSCRIPT_DEF;
7072 }
7073
5fa80905
AC		 7074 return C64_SYM_STANDARD;
7075}
7076
40bbb79e
SP		 7077static bfd_reloc_status_type
7078c64_fixup_frag (bfd *input_bfd, struct bfd_link_info *info,
e10c835d
MM		 7079 bfd_reloc_code_real_type bfd_r_type, Elf_Internal_Sym *sym,
7080 struct elf_link_hash_entry *h, asection *sym_sec,
7081 asection *reloc_sec, bfd_byte *frag_loc, bfd_vma value,
7082 bfd_signed_vma addend, bfd_vma r_offset)
40bbb79e 7083{
5fa80905
AC		 7084 BFD_ASSERT (h || sym);
7085 bfd_vma size = sym ? sym->st_size : h->size;
40bbb79e
SP		 7086 asection *perm_sec = sym_sec;
7087 bfd_boolean bounds_ok = FALSE;
7088
e10c835d
MM		 7089 const int aarch64_reloc_idx = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7090 const char *reloc_name = elfNN_aarch64_howto_table[aarch64_reloc_idx].name;
7401203c
MM		 7091 const char *sym_name;
7092
7093 if (sym)
7094 {
7095 Elf_Internal_Shdr *symtab_hdr = &elf_symtab_hdr (input_bfd);
7096 sym_name = (bfd_elf_string_from_elf_section (input_bfd,
7097 symtab_hdr->sh_link,
7098 sym->st_name));
7099 }
7100 else
7101 sym_name = h->root.root.string;
7102
5fa80905 7103 if (size == 0 && sym_sec)
40bbb79e 7104 {
5fa80905
AC		 7105 bounds_ok = TRUE;
7106 enum c64_section_perm_type type
7107 = c64_symbol_section_adjustment (h, value, sym_sec, &perm_sec, info);
40bbb79e 7108
5fa80905 7109 switch (type)
40bbb79e 7110 {
5fa80905
AC		 7111 case C64_SYM_STANDARD:
7112 break;
7113 case C64_SYM_LINKER_DEF:
7114 size = perm_sec->output_section->size;
7115 break;
7116 case C64_SYM_LDSCRIPT_DEF:
7117 size = perm_sec->size - (value - perm_sec->vma);
7118 break;
7119 case C64_SYM_LDSCRIPT_START:
7120 size = perm_sec->size;
7121 break;
7122 default:
7123 abort ();
40bbb79e
SP		 7124 }
7125 }
7126
7127 /* Negative addends are not allowed for capability symbols. */
7128 if (addend < 0 || (bfd_vma) addend > size)
7129 return bfd_reloc_outofrange;
7130
5fa80905 7131 bfd_vma base = value, limit = value + size;
5a9e7a18 7132 unsigned align = 0;
40bbb79e 7133
5fa80905
AC		 7134 if (perm_sec && perm_sec->flags & SEC_CODE)
7135 {
7136 /* Any symbol pointing into an executable section gets bounds according
7137 to PCC. In this case the relocation is set up so that the value is
7138 the base of the PCC, the addend is the offset from the PCC base to the
7139 VA that we want, and the size is the length of the PCC range.
7140 In this function we only use `value` to check the bounds make sense,
7141 which is somewhat superfluous when we're using pcc_high and pcc_low
7142 since we already enforced that in elfNN_c64_resize_sections. No harm
7143 in instead checking that the bounds on the object that were requested
7144 made sense even if they were overridden because this symbol points
7145 into an executable section.
7146
7147 `size` on the other hand is part of the fragment that we output to and
7148 we need to change it in order to have functions that can access global
7149 data or jump to other functions. */
7150 size = pcc_high - pcc_low;
7151 }
eee3fada
MM		 7152 else if (!bounds_ok && !c64_valid_cap_range (&base, &limit, &align))
7153 {
7154 /* Just warn about this. It's not a requirement that bounds on
7155 objects should be precise, so there's no reason to error out on
7156 such an object. */
7157 /* xgettext:c-format */
7158 _bfd_error_handler
7159 (_("%pB: capability range for '%s' may exceed object bounds"),
7160 input_bfd, sym_name);
7161 }
5fa80905 7162
40bbb79e
SP		 7163 if (perm_sec != NULL)
7164 {
e10c835d
MM		 7165 bfd_boolean permissions_guessed = FALSE;
7166 bfd_vma frag = cap_meta (size, perm_sec, &permissions_guessed);
40bbb79e
SP		 7167
7168 if (frag == (bfd_vma) -1)
7169 return bfd_reloc_outofrange;
7170
e10c835d
MM		 7171 if (permissions_guessed)
7172 {
7173 _bfd_error_handler (_("%pB(%pA+%#" PRIx64 "): "
7174 "warning: relocation %s against symbol '%s' in "
7175 "section without permission flags '%s'. "
7176 "Assuming Read-Write."),
7177 input_bfd, reloc_sec, r_offset, reloc_name,
7178 sym_name, perm_sec->name);
7179 }
7180
40bbb79e
SP		 7181 bfd_put_64 (input_bfd, frag, frag_loc);
7182 }
7183
7184 return bfd_reloc_continue;
5fa80905 7185}
40bbb79e 7186
5fa80905
AC		 7187/* Given either a local symbol SYM or global symbol H, do we need to adjust
7188 capability relocations against the symbol due to the fact that it points to
7189 a code section? */
7190static bfd_boolean
7191c64_symbol_adjust (struct elf_link_hash_entry *h,
7192 bfd_vma value, asection *sym_sec, struct bfd_link_info *info,
7193 bfd_vma *adjust_addr)
7194{
7195 asection *tmp_sec;
7196 enum c64_section_perm_type type
7197 = c64_symbol_section_adjustment (h, value, sym_sec, &tmp_sec, info);
7198
7199 if (type == C64_SYM_UNKNOWN)
7200 return FALSE;
7201
7202 if (tmp_sec->flags & SEC_CODE)
40bbb79e 7203 {
5fa80905
AC		 7204 *adjust_addr = pcc_low;
7205 return TRUE;
40bbb79e 7206 }
5fa80905
AC		 7207
7208 return FALSE;
40bbb79e
SP		 7209}
7210
36b60023
MM		 7211static bfd_boolean
7212c64_ifunc_reloc_static_irelative (struct bfd_link_info *info,
7213 struct elf_link_hash_entry *h)
7214{
7215 return (static_pde (info) && !h->pointer_equality_needed);
7216}
7217
7218static asection *
7219c64_ifunc_got_reloc_section (struct bfd_link_info *info,
7220 struct elf_link_hash_entry *h)
7221{
7222 struct elf_aarch64_link_hash_table *htab;
7223 htab = elf_aarch64_hash_table (info);
7224 if (c64_ifunc_reloc_static_irelative (info, h))
7225 return htab->root.irelplt;
7226 if (static_pde (info))
7227 return htab->srelcaps;
7228 return htab->root.srelgot;
7229}
7230
4e7fbb34
JW		 7231/* Perform a relocation as part of a final link. The input relocation type
7232 should be TLS relaxed. */
7233
a06ea964 7234static bfd_reloc_status_type
cec5225b 7235elfNN_aarch64_final_link_relocate (reloc_howto_type *howto,
a06ea964
NC		 7236 bfd *input_bfd,
7237 bfd *output_bfd,
7238 asection *input_section,
7239 bfd_byte *contents,
7240 Elf_Internal_Rela *rel,
7241 bfd_vma value,
7242 struct bfd_link_info *info,
7243 asection *sym_sec,
7244 struct elf_link_hash_entry *h,
7245 bfd_boolean *unresolved_reloc_p,
7246 bfd_boolean save_addend,
1419bbe5
WN		 7247 bfd_vma *saved_addend,
7248 Elf_Internal_Sym *sym)
a06ea964 7249{
1419bbe5 7250 Elf_Internal_Shdr *symtab_hdr;
a06ea964 7251 unsigned int r_type = howto->type;
a6bb11b2
YZ		 7252 bfd_reloc_code_real_type bfd_r_type
7253 = elfNN_aarch64_bfd_reloc_from_howto (howto);
a06ea964
NC		 7254 unsigned long r_symndx;
7255 bfd_byte *hit_data = contents + rel->r_offset;
96d01d93 7256 bfd_vma place, off, got_entry_addr = 0;
a06ea964 7257 bfd_signed_vma signed_addend;
cec5225b 7258 struct elf_aarch64_link_hash_table *globals;
a06ea964 7259 bfd_boolean weak_undef_p;
ff07562f 7260 bfd_boolean relative_reloc;
808c324b 7261 bfd_boolean c64_needs_frag_fixup;
b53b1bed 7262 asection *base_got;
ff07562f 7263 bfd_vma orig_value = value;
ddb7fd0f 7264 bfd_boolean resolved_to_zero;
0c1ded8d 7265 bfd_boolean abs_symbol_p;
f0070c1e 7266 Elf_Internal_Sym *isym = NULL;
50e192f0
SP		 7267 bfd_boolean c64_rtype = FALSE;
7268 bfd_boolean to_c64 = FALSE;
a06ea964 7269
cec5225b 7270 globals = elf_aarch64_hash_table (info);
a06ea964 7271
1419bbe5
WN		 7272 symtab_hdr = &elf_symtab_hdr (input_bfd);
7273
a06ea964
NC		 7274 BFD_ASSERT (is_aarch64_elf (input_bfd));
7275
cec5225b 7276 r_symndx = ELFNN_R_SYM (rel->r_info);
a06ea964 7277
a06ea964
NC		 7278 place = input_section->output_section->vma
7279 + input_section->output_offset + rel->r_offset;
7280
7281 /* Get addend, accumulating the addend for consecutive relocs
7282 which refer to the same offset. */
7283 signed_addend = saved_addend ? *saved_addend : 0;
7284 signed_addend += rel->r_addend;
7285
7286 weak_undef_p = (h ? h->root.type == bfd_link_hash_undefweak
7287 : bfd_is_und_section (sym_sec));
c691de6a 7288 abs_symbol_p = h != NULL && bfd_is_abs_symbol (&h->root);
0c1ded8d 7289
f0070c1e 7290 if (sym)
50e192f0
SP		 7291 {
7292 isym = bfd_sym_from_r_symndx (&globals->root.sym_cache, input_bfd,
7293 r_symndx);
7294 BFD_ASSERT (isym != NULL);
7295 to_c64 = (isym->st_target_internal & ST_BRANCH_TO_C64) != 0;
7296 }
7297 else
7298 to_c64 = (h->target_internal & ST_BRANCH_TO_C64) != 0;
f0070c1e 7299
a6bb11b2 7300
1419bbe5
WN		 7301 /* Since STT_GNU_IFUNC symbol must go through PLT, we handle
7302 it here if it is defined in a non-shared object. */
7303 if (h != NULL
7304 && h->type == STT_GNU_IFUNC
7305 && h->def_regular)
7306 {
7307 asection *plt;
7308 const char *name;
99ad26cb 7309 bfd_vma addend = 0;
1419bbe5 7310
545bc2b3
SN		 7311 if ((input_section->flags & SEC_ALLOC) == 0)
7312 {
f657f8c4
NC		 7313 /* If this is a SHT_NOTE section without SHF_ALLOC, treat
7314 STT_GNU_IFUNC symbol as STT_FUNC. */
7315 if (elf_section_type (input_section) == SHT_NOTE)
7316 goto skip_ifunc;
7317
545bc2b3
SN		 7318 /* Dynamic relocs are not propagated for SEC_DEBUGGING
7319 sections because such sections are not SEC_ALLOC and
7320 thus ld.so will not process them. */
7321 if ((input_section->flags & SEC_DEBUGGING) != 0)
7322 return bfd_reloc_ok;
7323
7324 if (h->root.root.string)
7325 name = h->root.root.string;
7326 else
7327 name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym, NULL);
7328 _bfd_error_handler
7329 /* xgettext:c-format */
2dcf00ce
AM		 7330 (_("%pB(%pA+%#" PRIx64 "): "
7331 "unresolvable %s relocation against symbol `%s'"),
7332 input_bfd, input_section, (uint64_t) rel->r_offset,
7333 howto->name, name);
545bc2b3 7334 bfd_set_error (bfd_error_bad_value);
1d75a8e2 7335 return bfd_reloc_notsupported;
545bc2b3
SN		 7336 }
7337 else if (h->plt.offset == (bfd_vma) -1)
7338 goto bad_ifunc_reloc;
1419bbe5
WN		 7339
7340 /* STT_GNU_IFUNC symbol must go through PLT. */
7341 plt = globals->root.splt ? globals->root.splt : globals->root.iplt;
7342 value = (plt->output_section->vma + plt->output_offset + h->plt.offset);
7343
7344 switch (bfd_r_type)
7345 {
7346 default:
dc1e8a47 7347 bad_ifunc_reloc:
1419bbe5
WN		 7348 if (h->root.root.string)
7349 name = h->root.root.string;
7350 else
7351 name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym,
7352 NULL);
4eca0228 7353 _bfd_error_handler
695344c0 7354 /* xgettext:c-format */
871b3ab2 7355 (_("%pB: relocation %s against STT_GNU_IFUNC "
1419bbe5
WN		 7356 "symbol `%s' isn't handled by %s"), input_bfd,
7357 howto->name, name, __FUNCTION__);
7358 bfd_set_error (bfd_error_bad_value);
1d75a8e2 7359 return bfd_reloc_notsupported;
1419bbe5 7360
36b60023 7361 case BFD_RELOC_MORELLO_CAPINIT:
1419bbe5
WN		 7362 case BFD_RELOC_AARCH64_NN:
7363 if (rel->r_addend != 0)
7364 {
7365 if (h->root.root.string)
7366 name = h->root.root.string;
7367 else
7368 name = bfd_elf_sym_name (input_bfd, symtab_hdr,
7369 sym, NULL);
4eca0228 7370 _bfd_error_handler
695344c0 7371 /* xgettext:c-format */
871b3ab2 7372 (_("%pB: relocation %s against STT_GNU_IFUNC "
2dcf00ce
AM		 7373 "symbol `%s' has non-zero addend: %" PRId64),
7374 input_bfd, howto->name, name, (int64_t) rel->r_addend);
1419bbe5 7375 bfd_set_error (bfd_error_bad_value);
1d75a8e2 7376 return bfd_reloc_notsupported;
1419bbe5
WN		 7377 }
7378
36b60023
MM		 7379 /* N.b. Having an AARCH64_NN relocation (i.e. an ABS64
7380 relocation) against a capability ifunc is not yet defined. */
7381 if (globals->c64_rel && bfd_r_type == BFD_RELOC_AARCH64_NN)
7382 {
7383 if (h->root.root.string)
7384 name = h->root.root.string;
7385 else
7386 name = bfd_elf_sym_name (input_bfd, symtab_hdr,
7387 sym, NULL);
7388 _bfd_error_handler (_("%pB: relocation %s against a C64 "
7389 "STT_GNU_IFUNC symbol `%s'"),
7390 input_bfd, howto->name, name);
7391 bfd_set_error (bfd_error_bad_value);
7392 return bfd_reloc_notsupported;
7393 }
7394
7395 /* Generate dynamic relocation for AArch64 only when there is a
7396 non-GOT reference in a shared object.
7397 Need a dynamic relocation for a CAPINIT whenever
7398 c64_needs_relocation. */
7399 if ((bfd_link_pic (info) && h->non_got_ref)
7400 || (bfd_r_type == BFD_RELOC_MORELLO_CAPINIT
7401 && c64_needs_relocation (info, h)))
1419bbe5
WN		 7402 {
7403 Elf_Internal_Rela outrel;
7404 asection *sreloc;
7405
7406 /* Need a dynamic relocation to get the real function
7407 address. */
7408 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
7409 info,
7410 input_section,
7411 rel->r_offset);
7412 if (outrel.r_offset == (bfd_vma) -1
7413 || outrel.r_offset == (bfd_vma) -2)
7414 abort ();
7415
7416 outrel.r_offset += (input_section->output_section->vma
7417 + input_section->output_offset);
7418
36b60023 7419
1419bbe5
WN		 7420 if (h->dynindx == -1
7421 || h->forced_local
0e1862bb 7422 || bfd_link_executable (info))
1419bbe5 7423 {
36b60023
MM		 7424 /* This symbol is resolved locally.
7425 N.b. a MORELLO_IRELATIVE relocation is not suitable for
7426 populating an 8-byte value. We don't handle ABS64
7427 relocations against a capability IFUNC. */
7428 bfd_vma resolver_loc = (h->root.u.def.value
7429 + h->root.u.def.section->output_section->vma
7430 + h->root.u.def.section->output_offset);
7431
7432 if (bfd_r_type == BFD_RELOC_MORELLO_CAPINIT)
7433 {
7434 bfd_vma frag_value = 0, value_tmp;
7435 if (h->pointer_equality_needed && !bfd_link_pic (info))
7436 {
7437 outrel.r_info = ELFNN_R_INFO (0, MORELLO_R (RELATIVE));
7438 /* Use the PLT as the canonical address. */
7439 value_tmp = value;
7440 }
7441 else
7442 {
7443 outrel.r_info = ELFNN_R_INFO (0, MORELLO_R (IRELATIVE));
7444 value_tmp = resolver_loc;
7445 }
7446 BFD_ASSERT (c64_symbol_adjust (h, value_tmp, sym_sec, info,
7447 &frag_value));
7448 outrel.r_addend
7449 = (value_tmp | h->target_internal) - frag_value;
7450 /* Can feel safe asserting things here since we've
7451 created all of the values. I.e. nothing is coming
7452 from the user and hence we don't need gracious error
7453 handling. */
7454 BFD_ASSERT (_bfd_aarch64_elf_put_addend (input_bfd,
7455 hit_data,
7456 bfd_r_type,
7457 howto, frag_value)
7458 == bfd_reloc_ok);
7459 BFD_ASSERT (c64_fixup_frag (input_bfd, info, bfd_r_type,
7460 sym, h, sym_sec,
7461 input_section, hit_data + 8,
7462 value_tmp, 0, rel->r_offset)
7463 == bfd_reloc_continue);
7464 }
7465 else
7466 {
7467 outrel.r_info = ELFNN_R_INFO (0, AARCH64_R (IRELATIVE));
7468 outrel.r_addend = resolver_loc;
7469 }
1419bbe5
WN		 7470 }
7471 else
7472 {
7473 outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type);
7474 outrel.r_addend = 0;
7475 }
7476
36b60023
MM		 7477 if (c64_ifunc_reloc_static_irelative (info, h))
7478 {
7479 /* In the same way as TLS descriptor PLT stubs, we want
7480 IRELATIVE relocations coming from CAPINIT relocations to
7481 be after all the relocations for PLT stub entries. */
7482 BFD_ASSERT (bfd_r_type == BFD_RELOC_MORELLO_CAPINIT);
7483 sreloc = globals->root.irelplt;
7484 bfd_byte *loc = sreloc->contents
7485 + sreloc->reloc_count++ * RELOC_SIZE (globals);
7486 bfd_elfNN_swap_reloca_out (output_bfd, &outrel, loc);
7487 }
7488 else if (bfd_link_pic (info))
7489 elf_append_rela (output_bfd, globals->root.irelifunc, &outrel);
7490 else
7491 elf_append_rela (output_bfd, globals->srelcaps, &outrel);
1419bbe5
WN		 7492
7493 /* If this reloc is against an external symbol, we
7494 do not want to fiddle with the addend. Otherwise,
7495 we need to include the symbol value so that it
7496 becomes an addend for the dynamic reloc. For an
7497 internal symbol, we have updated addend. */
7498 return bfd_reloc_ok;
7499 }
7500 /* FALLTHROUGH */
e19e9199
SP		 7501 case BFD_RELOC_MORELLO_CALL26:
7502 case BFD_RELOC_MORELLO_JUMP26:
1419bbe5 7503 case BFD_RELOC_AARCH64_CALL26:
ce336788 7504 case BFD_RELOC_AARCH64_JUMP26:
652afeef
TC		 7505 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7506 place, value,
1419bbe5
WN		 7507 signed_addend,
7508 weak_undef_p);
7509 return _bfd_aarch64_elf_put_addend (input_bfd, hit_data, bfd_r_type,
7510 howto, value);
1419bbe5 7511 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
92504105 7512 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
1419bbe5 7513 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
7018c030 7514 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
ce336788 7515 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
99ad26cb 7516 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
dc8008f5 7517 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
74a1bfe1 7518 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
a2e1db00 7519 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
ce336788 7520 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
a1bdea65 7521 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
1419bbe5
WN		 7522 base_got = globals->root.sgot;
7523 off = h->got.offset;
7524
7525 if (base_got == NULL)
7526 abort ();
7527
36b60023 7528 value |= h->target_internal;
1419bbe5
WN		 7529 if (off == (bfd_vma) -1)
7530 {
7531 bfd_vma plt_index;
7532
7533 /* We can't use h->got.offset here to save state, or
7534 even just remember the offset, as finish_dynamic_symbol
7535 would use that as offset into .got. */
7536
7537 if (globals->root.splt != NULL)
7538 {
b1ee0cc4
WN		 7539 plt_index = ((h->plt.offset - globals->plt_header_size) /
7540 globals->plt_entry_size);
a1bdea65 7541 off = (plt_index + 3) * GOT_ENTRY_SIZE (globals);
1419bbe5
WN		 7542 base_got = globals->root.sgotplt;
7543 }
7544 else
7545 {
7546 plt_index = h->plt.offset / globals->plt_entry_size;
a1bdea65 7547 off = plt_index * GOT_ENTRY_SIZE (globals);
1419bbe5
WN		 7548 base_got = globals->root.igotplt;
7549 }
7550
7551 if (h->dynindx == -1
7552 || h->forced_local
7553 || info->symbolic)
7554 {
7555 /* This references the local definition. We must
7556 initialize this entry in the global offset table.
7557 Since the offset must always be a multiple of 8,
7558 we use the least significant bit to record
7559 whether we have initialized it already.
7560
7561 When doing a dynamic link, we create a .rela.got
7562 relocation entry to initialize the value. This
7563 is done in the finish_dynamic_symbol routine. */
7564 if ((off & 1) != 0)
7565 off &= ~1;
7566 else
7567 {
7568 bfd_put_NN (output_bfd, value,
7569 base_got->contents + off);
7570 /* Note that this is harmless as -1 | 1 still is -1. */
7571 h->got.offset |= 1;
7572 }
7573 }
7574 value = (base_got->output_section->vma
7575 + base_got->output_offset + off);
7576 }
7577 else
7578 value = aarch64_calculate_got_entry_vma (h, globals, info,
7579 value, output_bfd,
7580 unresolved_reloc_p);
a0becb89 7581
2aff25ba
JW		 7582 if (aarch64_relocation_aginst_gp_p (bfd_r_type))
7583 addend = (globals->root.sgot->output_section->vma
7584 + globals->root.sgot->output_offset);
a0becb89 7585
652afeef
TC		 7586 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7587 place, value,
99ad26cb 7588 addend, weak_undef_p);
1419bbe5 7589 return _bfd_aarch64_elf_put_addend (input_bfd, hit_data, bfd_r_type, howto, value);
1419bbe5 7590 case BFD_RELOC_AARCH64_ADD_LO12:
ce336788 7591 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
92504105 7592 case BFD_RELOC_MORELLO_ADR_HI20_PCREL:
1419bbe5
WN		 7593 break;
7594 }
7595 }
7596
f657f8c4 7597 skip_ifunc:
ddb7fd0f
L		 7598 resolved_to_zero = (h != NULL
7599 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
7600
a6bb11b2 7601 switch (bfd_r_type)
a06ea964 7602 {
a6bb11b2 7603 case BFD_RELOC_AARCH64_NONE:
0484b454 7604 case BFD_RELOC_AARCH64_TLSDESC_ADD:
a6bb11b2 7605 case BFD_RELOC_AARCH64_TLSDESC_CALL:
0484b454 7606 case BFD_RELOC_AARCH64_TLSDESC_LDR:
4ca9b406 7607 case BFD_RELOC_MORELLO_TLSDESC_CALL:
a06ea964
NC		 7608 *unresolved_reloc_p = FALSE;
7609 return bfd_reloc_ok;
7610
a6bb11b2 7611 case BFD_RELOC_AARCH64_NN:
7470bce3
MM		 7612 /* If we are relocating against a C64 symbol, then the value can't
7613 already have the LSB set (since STT_FUNC symbols are code labels and
7614 they will be aligned). Hence it's safe just to or-equal in order
7615 to ensure the LSB is set in that case. */
7616 value |= to_c64 ? 1 : 0;
a06ea964
NC		 7617
7618 /* When generating a shared object or relocatable executable, these
07d6d2b8
AM		 7619 relocations are copied into the output file to be resolved at
7620 run time. */
6353d82b
JW		 7621 if (((bfd_link_pic (info)
7622 || globals->root.is_relocatable_executable)
7623 && (input_section->flags & SEC_ALLOC)
7624 && (h == NULL
ddb7fd0f
L		 7625 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
7626 && !resolved_to_zero)
6353d82b
JW		 7627 || h->root.type != bfd_link_hash_undefweak))
7628 /* Or we are creating an executable, we may need to keep relocations
7629 for symbols satisfied by a dynamic library if we manage to avoid
7630 copy relocs for the symbol. */
7631 || (ELIMINATE_COPY_RELOCS
7632 && !bfd_link_pic (info)
7633 && h != NULL
7634 && (input_section->flags & SEC_ALLOC)
7635 && h->dynindx != -1
7636 && !h->non_got_ref
7637 && ((h->def_dynamic
7638 && !h->def_regular)
7639 || h->root.type == bfd_link_hash_undefweak
7640 || h->root.type == bfd_link_hash_undefined)))
a06ea964
NC		 7641 {
7642 Elf_Internal_Rela outrel;
7643 bfd_byte *loc;
7644 bfd_boolean skip, relocate;
7645 asection *sreloc;
7646
7647 *unresolved_reloc_p = FALSE;
7648
a06ea964
NC		 7649 skip = FALSE;
7650 relocate = FALSE;
7651
7652 outrel.r_addend = signed_addend;
7653 outrel.r_offset =
7654 _bfd_elf_section_offset (output_bfd, info, input_section,
7655 rel->r_offset);
7656 if (outrel.r_offset == (bfd_vma) - 1)
7657 skip = TRUE;
7658 else if (outrel.r_offset == (bfd_vma) - 2)
7659 {
7660 skip = TRUE;
7661 relocate = TRUE;
7662 }
0c1ded8d
RL		 7663 else if (abs_symbol_p)
7664 {
7665 /* Local absolute symbol. */
7666 skip = (h->forced_local || (h->dynindx == -1));
7667 relocate = skip;
7668 }
a06ea964
NC		 7669
7670 outrel.r_offset += (input_section->output_section->vma
7671 + input_section->output_offset);
7672
7673 if (skip)
7674 memset (&outrel, 0, sizeof outrel);
7675 else if (h != NULL
7676 && h->dynindx != -1
0e1862bb 7677 && (!bfd_link_pic (info)
0c1ded8d 7678 || !(bfd_link_pie (info) || SYMBOLIC_BIND (info, h))
0e1862bb 7679 || !h->def_regular))
cec5225b 7680 outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type);
a06ea964
NC		 7681 else
7682 {
7683 int symbol;
7684
7685 /* On SVR4-ish systems, the dynamic loader cannot
7686 relocate the text and data segments independently,
7687 so the symbol does not matter. */
7688 symbol = 0;
1f56df9d 7689 relocate = globals->no_apply_dynamic_relocs ? FALSE : TRUE;
a6bb11b2 7690 outrel.r_info = ELFNN_R_INFO (symbol, AARCH64_R (RELATIVE));
a06ea964
NC		 7691 outrel.r_addend += value;
7692 }
7693
1419bbe5
WN		 7694 sreloc = elf_section_data (input_section)->sreloc;
7695 if (sreloc == NULL || sreloc->contents == NULL)
7696 return bfd_reloc_notsupported;
7697
7698 loc = sreloc->contents + sreloc->reloc_count++ * RELOC_SIZE (globals);
cec5225b 7699 bfd_elfNN_swap_reloca_out (output_bfd, &outrel, loc);
a06ea964 7700
1419bbe5 7701 if (sreloc->reloc_count * RELOC_SIZE (globals) > sreloc->size)
a06ea964
NC		 7702 {
7703 /* Sanity to check that we have previously allocated
7704 sufficient space in the relocation section for the
7705 number of relocations we actually want to emit. */
7706 abort ();
7707 }
7708
7709 /* If this reloc is against an external symbol, we do not want to
7710 fiddle with the addend. Otherwise, we need to include the symbol
7711 value so that it becomes an addend for the dynamic reloc. */
7712 if (!relocate)
7713 return bfd_reloc_ok;
7714
7715 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7716 contents, rel->r_offset, value,
7717 signed_addend);
7718 }
7719 else
7720 value += signed_addend;
7721 break;
7722
e19e9199
SP		 7723 case BFD_RELOC_MORELLO_CALL26:
7724 case BFD_RELOC_MORELLO_JUMP26:
a6bb11b2 7725 case BFD_RELOC_AARCH64_CALL26:
ce336788 7726 case BFD_RELOC_AARCH64_JUMP26:
a06ea964
NC		 7727 {
7728 asection *splt = globals->root.splt;
c7cd2917
SP		 7729 bfd_boolean via_plt_p =
7730 splt != NULL && h != NULL && h->plt.offset != (bfd_vma) - 1;
a06ea964
NC		 7731
7732 /* A call to an undefined weak symbol is converted to a jump to
7733 the next instruction unless a PLT entry will be created.
7734 The jump to the next instruction is optimized as a NOP.
7735 Do the same for local undefined symbols. */
7736 if (weak_undef_p && ! via_plt_p)
7737 {
7738 bfd_putl32 (INSN_NOP, hit_data);
7739 return bfd_reloc_ok;
7740 }
7741
7742 /* If the call goes through a PLT entry, make sure to
7743 check distance to the right destination address. */
7744 if (via_plt_p)
07f9ddfe
JW		 7745 value = (splt->output_section->vma
7746 + splt->output_offset + h->plt.offset);
7747
7748 /* Check if a stub has to be inserted because the destination
7749 is too far away. */
7750 struct elf_aarch64_stub_hash_entry *stub_entry = NULL;
2f340668 7751
50e192f0
SP		 7752 enum elf_aarch64_stub_type c64_stub = aarch64_stub_none;
7753
7754 /* Figure out if we need an interworking stub and if yes, what
7755 kind. */
7756 if (!via_plt_p)
7757 c64_stub = aarch64_interwork_stub (r_type, to_c64);
7758
2f340668
JW		 7759 /* If the branch destination is directed to plt stub, "value" will be
7760 the final destination, otherwise we should plus signed_addend, it may
7761 contain non-zero value, for example call to local function symbol
7762 which are turned into "sec_sym + sec_off", and sec_off is kept in
7763 signed_addend. */
50e192f0
SP		 7764 if (c64_stub != aarch64_stub_none
7765 || (aarch64_branch_reloc_p (r_type)
7766 && !aarch64_valid_branch_p ((via_plt_p ? value
7767 : value + signed_addend), place)))
7768 {
7769 /* The target is out of reach, so redirect the branch to
7770 the local stub for this function. */
7771 stub_entry = elfNN_aarch64_get_stub_entry (input_section, sym_sec,
7772 h, rel, globals,
7773 c64_stub);
7774 }
7775
07f9ddfe 7776 if (stub_entry != NULL)
2f340668
JW		 7777 {
7778 value = (stub_entry->stub_offset
7779 + stub_entry->stub_sec->output_offset
7780 + stub_entry->stub_sec->output_section->vma);
7781
7782 /* We have redirected the destination to stub entry address,
7783 so ignore any addend record in the original rela entry. */
7784 signed_addend = 0;
7785 }
a06ea964 7786 }
652afeef
TC		 7787 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7788 place, value,
caed7120 7789 signed_addend, weak_undef_p);
07f9ddfe 7790 *unresolved_reloc_p = FALSE;
a06ea964
NC		 7791 break;
7792
dcbd20eb
JW		 7793 case BFD_RELOC_AARCH64_16_PCREL:
7794 case BFD_RELOC_AARCH64_32_PCREL:
7795 case BFD_RELOC_AARCH64_64_PCREL:
ce336788
JW		 7796 case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
7797 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
92504105
SP		 7798 case BFD_RELOC_MORELLO_ADR_HI20_NC_PCREL:
7799 case BFD_RELOC_MORELLO_ADR_HI20_PCREL:
ce336788
JW		 7800 case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
7801 case BFD_RELOC_AARCH64_LD_LO19_PCREL:
f7d2c675 7802 case BFD_RELOC_MORELLO_LD_LO17_PCREL:
1daf502a
RL		 7803 case BFD_RELOC_AARCH64_MOVW_PREL_G0:
7804 case BFD_RELOC_AARCH64_MOVW_PREL_G0_NC:
7805 case BFD_RELOC_AARCH64_MOVW_PREL_G1:
7806 case BFD_RELOC_AARCH64_MOVW_PREL_G1_NC:
7807 case BFD_RELOC_AARCH64_MOVW_PREL_G2:
7808 case BFD_RELOC_AARCH64_MOVW_PREL_G2_NC:
7809 case BFD_RELOC_AARCH64_MOVW_PREL_G3:
0e1862bb 7810 if (bfd_link_pic (info)
dcbd20eb
JW		 7811 && (input_section->flags & SEC_ALLOC) != 0
7812 && (input_section->flags & SEC_READONLY) != 0
d68f1976 7813 && !SYMBOL_REFERENCES_LOCAL (info, h))
dcbd20eb
JW		 7814 {
7815 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7816
4eca0228 7817 _bfd_error_handler
695344c0 7818 /* xgettext:c-format */
871b3ab2 7819 (_("%pB: relocation %s against symbol `%s' which may bind "
d68f1976
JW		 7820 "externally can not be used when making a shared object; "
7821 "recompile with -fPIC"),
dcbd20eb
JW		 7822 input_bfd, elfNN_aarch64_howto_table[howto_index].name,
7823 h->root.root.string);
7824 bfd_set_error (bfd_error_bad_value);
1d75a8e2 7825 return bfd_reloc_notsupported;
dcbd20eb 7826 }
c7cd2917
SP		 7827 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7828 place, value,
7829 signed_addend,
7830 weak_undef_p);
8b21361b 7831
7470bce3 7832 if (bfd_r_type == BFD_RELOC_AARCH64_ADR_LO21_PCREL && to_c64)
8b21361b 7833 value |= 1;
c7cd2917
SP		 7834 break;
7835
e19e9199
SP		 7836 case BFD_RELOC_MORELLO_BRANCH19:
7837 case BFD_RELOC_MORELLO_TSTBR14:
50e192f0
SP		 7838 c64_rtype = TRUE;
7839 /* Fall through. */
c7cd2917
SP		 7840 case BFD_RELOC_AARCH64_BRANCH19:
7841 case BFD_RELOC_AARCH64_TSTBR14:
7842 if (h && h->root.type == bfd_link_hash_undefined)
7843 {
7844 _bfd_error_handler
7845 /* xgettext:c-format */
7846 (_("%pB: conditional branch to undefined symbol `%s' "
7847 "not allowed"), input_bfd, h->root.root.string);
7848 bfd_set_error (bfd_error_bad_value);
7849 return bfd_reloc_notsupported;
7850 }
50e192f0
SP		 7851 {
7852 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7853
7854 if ((c64_rtype && !to_c64) || (!c64_rtype && to_c64))
7855 {
7856 _bfd_error_handler
7857 /* xgettext:c-format */
7858 (_("%pB: interworking not supported on relocation %s"),
7859 input_bfd, elfNN_aarch64_howto_table[howto_index].name);
7860 return bfd_reloc_notsupported;
7861 }
7862 }
1a0670f3 7863 /* Fall through. */
dcbd20eb 7864
a6bb11b2 7865 case BFD_RELOC_AARCH64_16:
92d77487
RL		 7866#if ARCH_SIZE == 64
7867 case BFD_RELOC_AARCH64_32:
7868#endif
a6bb11b2 7869 case BFD_RELOC_AARCH64_ADD_LO12:
ce336788 7870 case BFD_RELOC_AARCH64_LDST128_LO12:
a6bb11b2
YZ		 7871 case BFD_RELOC_AARCH64_LDST16_LO12:
7872 case BFD_RELOC_AARCH64_LDST32_LO12:
7873 case BFD_RELOC_AARCH64_LDST64_LO12:
ce336788 7874 case BFD_RELOC_AARCH64_LDST8_LO12:
a6bb11b2
YZ		 7875 case BFD_RELOC_AARCH64_MOVW_G0:
7876 case BFD_RELOC_AARCH64_MOVW_G0_NC:
ce336788 7877 case BFD_RELOC_AARCH64_MOVW_G0_S:
a6bb11b2
YZ		 7878 case BFD_RELOC_AARCH64_MOVW_G1:
7879 case BFD_RELOC_AARCH64_MOVW_G1_NC:
ce336788 7880 case BFD_RELOC_AARCH64_MOVW_G1_S:
a6bb11b2
YZ		 7881 case BFD_RELOC_AARCH64_MOVW_G2:
7882 case BFD_RELOC_AARCH64_MOVW_G2_NC:
ce336788 7883 case BFD_RELOC_AARCH64_MOVW_G2_S:
a6bb11b2 7884 case BFD_RELOC_AARCH64_MOVW_G3:
652afeef
TC		 7885 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7886 place, value,
caed7120 7887 signed_addend, weak_undef_p);
7470bce3
MM		 7888 if ((bfd_r_type == BFD_RELOC_AARCH64_ADD_LO12
7889 || bfd_r_type == BFD_RELOC_AARCH64_MOVW_G0
7890 || bfd_r_type == BFD_RELOC_AARCH64_MOVW_G0_S
7891 || bfd_r_type == BFD_RELOC_AARCH64_MOVW_G0_NC
7892 || bfd_r_type == BFD_RELOC_AARCH64_32
7893 || bfd_r_type == BFD_RELOC_AARCH64_16)
7894 && to_c64)
8b21361b
SP		 7895 value |= 1;
7896
a06ea964
NC		 7897 break;
7898
1408e112
MM		 7899 case BFD_RELOC_MORELLO_MOVW_SIZE_G0:
7900 case BFD_RELOC_MORELLO_MOVW_SIZE_G0_NC:
7901 case BFD_RELOC_MORELLO_MOVW_SIZE_G1:
7902 case BFD_RELOC_MORELLO_MOVW_SIZE_G1_NC:
7903 case BFD_RELOC_MORELLO_MOVW_SIZE_G2:
7904 case BFD_RELOC_MORELLO_MOVW_SIZE_G2_NC:
7905 case BFD_RELOC_MORELLO_MOVW_SIZE_G3:
26c32295
MM		 7906 if (weak_undef_p || !SYMBOL_REFERENCES_LOCAL (info, h))
7907 {
7908 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7909 const char *name;
7910 if (h && h->root.root.string)
7911 name = h->root.root.string;
7912 else
7913 name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym, NULL);
7914 _bfd_error_handler
7915 /* xgettext:c-format */
7916 (_("%pB: relocation %s against `%s' must be used against a "
7917 "non-interposable defined symbol"),
7918 input_bfd, elfNN_aarch64_howto_table[howto_index].name, name);
7919 bfd_set_error (bfd_error_bad_value);
7920 return bfd_reloc_continue;
7921 }
7922 /* signed addend should have been handled by relocate_section. */
7923 BFD_ASSERT (!signed_addend);
1408e112
MM		 7924 value = sym ? sym->st_size : h->size;
7925 /* N.b. the call to resolve relocation is not really necessary since
7926 the relocation does not allow any addend, the relocation is not
7927 PC-relative, and the relocation is against the base value. I.e. there
7928 is no modification to `value` that we need to perform. We keep it for
7929 consistency with other relocations. */
7930 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7931 place, value,
7932 signed_addend, weak_undef_p);
7933 break;
7934
a6bb11b2 7935 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
92504105 7936 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
a6bb11b2 7937 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
7018c030 7938 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
ce336788 7939 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
99ad26cb 7940 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
ce336788 7941 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
a1bdea65 7942 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
2aff25ba
JW		 7943 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
7944 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
7945 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
8d4edc5f
SP		 7946 off = symbol_got_offset (input_bfd, h, r_symndx);
7947 base_got = globals->root.sgot;
5fa80905 7948
d9f4f6fc 7949 bfd_boolean is_dynamic = elf_hash_table (info)->dynamic_sections_created;
8d4edc5f 7950
5fa80905
AC		 7951 if (signed_addend != 0)
7952 {
7953 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7954 _bfd_error_handler
7955 /* xgettext:c-format */
7956 (_("%pB: symbol plus addend can not be placed into the GOT "
7957 "for relocation %s"),
7958 input_bfd, elfNN_aarch64_howto_table[howto_index].name);
7959 abort ();
7960 }
7961
8d4edc5f 7962 if (base_got == NULL)
a06ea964
NC		 7963 BFD_ASSERT (h != NULL);
7964
ff07562f 7965 relative_reloc = FALSE;
808c324b 7966 c64_needs_frag_fixup = FALSE;
a06ea964
NC		 7967 if (h != NULL)
7968 {
99ad26cb 7969 bfd_vma addend = 0;
5fa80905 7970 bfd_vma frag_value;
ff07562f
JW		 7971
7972 /* If a symbol is not dynamic and is not undefined weak, bind it
7973 locally and generate a RELATIVE relocation under PIC mode.
7974
7975 NOTE: one symbol may be referenced by several relocations, we
7976 should only generate one RELATIVE relocation for that symbol.
c0a10a86
MM		 7977 Therefore, check GOT offset mark first. */
7978 if (h->dynindx == -1
7979 && !h->forced_local
7980 && h->root.type != bfd_link_hash_undefweak
7981 && bfd_link_pic (info)
ff07562f 7982 && !symbol_got_offset_mark_p (input_bfd, h, r_symndx))
808c324b 7983 {
c0a10a86
MM		 7984 /* Here we look for symbols which are not going to have their
7985 relocations added by finish_dynamic_symbol, but which still
7986 need a dynamic relocation because we're compiling for PIC.
7987
7988 Action on this clause and the one below is the same.
7989 Written that way to make the three different cases and their
7990 interpretation clear. */
8f5baae3
MM		 7991 BFD_ASSERT (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
7992 (is_dynamic, bfd_link_pic (info), h));
808c324b 7993 relative_reloc = TRUE;
d465be7b 7994 c64_needs_frag_fixup = globals->c64_rel ? TRUE : FALSE;
808c324b 7995 }
d465be7b 7996 else if (!globals->c64_rel || !c64_needs_relocation (info, h))
c0a10a86
MM		 7997 {
7998 /* Symbol references via GOT in C64 should always have
7999 relocations of some kind unless they are undefined weak
8000 symbols which cannot be provided at runtime. In those cases
8001 we need a plain zero.
8002
8003 This clause catches the case when we're not relocating for
8004 GOT, or when we're relocating an undefined weak symbol. */
8005 }
f0a8e7c6 8006 else if (!bfd_link_relocatable (info)
c0a10a86
MM		 8007 && !WILL_CALL_FINISH_DYNAMIC_SYMBOL (is_dynamic,
8008 bfd_link_pic (info), h)
c0a10a86
MM		 8009 && !symbol_got_offset_mark_p (input_bfd, h, r_symndx))
8010 {
8011 /* This clause is here to catch any c64 entries in the GOT which
8012 need a relocation, but whose relocation will not be provided
8013 by finish_dynamic_symbol. */
8014 relative_reloc = TRUE;
8015 c64_needs_frag_fixup = TRUE;
8016 }
8017 else if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (is_dynamic,
8018 bfd_link_pic (info), h)
808c324b
MM		 8019 && bfd_link_pic (info)
8020 && SYMBOL_REFERENCES_LOCAL (info, h))
8021 {
c0a10a86
MM		 8022 /* If this is a dynamic symbol that binds locally then the
8023 generic code and elfNN_aarch64_finish_dynamic_symbol will
8024 already handle creating the RELATIVE reloc pointing into the
8025 GOT for this symbol. That means that this function does not
8026 need to handle *creating* such a relocation. We already
8027 handle setting the base value in the fragment for that
8028 relocation below, but we also need to make sure we set the
8029 rest of the fragment correctly for C64 code (i.e. including
8030 the required permissions and bounds). */
808c324b
MM		 8031 c64_needs_frag_fixup = TRUE;
8032 }
ff07562f 8033
d465be7b 8034 if (globals->c64_rel
5fa80905
AC		 8035 && c64_symbol_adjust (h, value, sym_sec, info, &frag_value))
8036 signed_addend = (value | h->target_internal) - frag_value;
8037 else
8038 frag_value = value | h->target_internal;
8039
c50aec72 8040 value = aarch64_calculate_got_entry_vma (h, globals, info,
5fa80905 8041 frag_value,
a06ea964
NC		 8042 output_bfd,
8043 unresolved_reloc_p);
ff07562f
JW		 8044 /* Record the GOT entry address which will be used when generating
8045 RELATIVE relocation. */
8046 if (relative_reloc)
8d4edc5f 8047 got_entry_addr = value;
ff07562f 8048
2aff25ba 8049 if (aarch64_relocation_aginst_gp_p (bfd_r_type))
99ad26cb
JW		 8050 addend = (globals->root.sgot->output_section->vma
8051 + globals->root.sgot->output_offset);
652afeef
TC		 8052 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
8053 place, value,
99ad26cb 8054 addend, weak_undef_p);
a06ea964 8055 }
b53b1bed
JW		 8056 else
8057 {
99ad26cb 8058 bfd_vma addend = 0;
b53b1bed
JW		 8059 struct elf_aarch64_local_symbol *locals
8060 = elf_aarch64_locals (input_bfd);
8061
8062 if (locals == NULL)
8063 {
8064 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
4eca0228 8065 _bfd_error_handler
695344c0 8066 /* xgettext:c-format */
90b6238f 8067 (_("%pB: local symbol descriptor table be NULL when applying "
b53b1bed
JW		 8068 "relocation %s against local symbol"),
8069 input_bfd, elfNN_aarch64_howto_table[howto_index].name);
8070 abort ();
8071 }
8072
ff07562f
JW		 8073 got_entry_addr = (base_got->output_section->vma
8074 + base_got->output_offset + off);
b53b1bed
JW		 8075
8076 if (!symbol_got_offset_mark_p (input_bfd, h, r_symndx))
8077 {
5fa80905
AC		 8078 bfd_vma frag_value;
8079
d465be7b 8080 if (globals->c64_rel
5fa80905
AC		 8081 && c64_symbol_adjust (h, value, sym_sec, info, &frag_value))
8082 signed_addend = (value | sym->st_target_internal) - frag_value;
8083 else
8084 frag_value = value | sym->st_target_internal;
8085
8086 bfd_put_64 (output_bfd, frag_value, base_got->contents + off);
b53b1bed 8087
ff07562f
JW		 8088 /* For local symbol, we have done absolute relocation in static
8089 linking stage. While for shared library, we need to update the
8090 content of GOT entry according to the shared object's runtime
8091 base address. So, we need to generate a R_AARCH64_RELATIVE reloc
808c324b
MM		 8092 for dynamic linker.
8093
8094 For any C64 binary we need to ensure there are RELATIVE
8095 relocations to initialise the capabilities. The only case when
8096 we would not want to emit such relocations is when the producing
8097 a relocatable object file (since such files should not have
8098 dynamic relocations). */
c50aec72
MM		 8099 if (bfd_link_pic (info)
8100 || (!bfd_link_pic (info) && bfd_link_executable (info)
d465be7b 8101 && globals->c64_rel))
808c324b 8102 {
c0a10a86
MM		 8103 /* We have not handled the case for weak undefined symbols in
8104 this clause. That is because we believe there can not be
8105 weak undefined symbols as we reach this clause. We believe
8106 that any symbol with WEAK binding in an object file would be
8107 put into the hash table (and hence go into the `h != NULL`
8108 clause above). The only time that `weak_undef_p` should be
8109 set for something not in the hash table is when we have
8110 removed a relocation by marking it as against the undefined
8111 symbol (e.g. during TLS relaxation). We only ever do that
8112 while also setting the relocation to R_AARCH64_NONE, so we
8113 would not see it in this clause. */
8114 BFD_ASSERT (!weak_undef_p);
808c324b 8115 relative_reloc = TRUE;
d465be7b 8116 c64_needs_frag_fixup = globals->c64_rel ? TRUE : FALSE;
808c324b 8117 }
b53b1bed
JW		 8118
8119 symbol_got_offset_mark (input_bfd, h, r_symndx);
8120 }
8121
8122 /* Update the relocation value to GOT entry addr as we have transformed
8123 the direct data access into indirect data access through GOT. */
8124 value = got_entry_addr;
99ad26cb 8125
2aff25ba 8126 if (aarch64_relocation_aginst_gp_p (bfd_r_type))
99ad26cb
JW		 8127 addend = base_got->output_section->vma + base_got->output_offset;
8128
652afeef
TC		 8129 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
8130 place, value,
99ad26cb 8131 addend, weak_undef_p);
b53b1bed 8132 }
ff07562f 8133
808c324b
MM		 8134 if (c64_needs_frag_fixup)
8135 {
d465be7b 8136 BFD_ASSERT (globals->c64_rel);
808c324b
MM		 8137 /* For a C64 relative relocation, also add size and permissions into
8138 the frag. */
8139 bfd_reloc_status_type ret;
8140
8141 ret = c64_fixup_frag (input_bfd, info, bfd_r_type, sym, h,
8142 sym_sec, globals->root.srelgot,
8143 base_got->contents + off + 8,
8144 orig_value, 0, off);
8145
8146 if (ret != bfd_reloc_continue)
8147 return ret;
8148 }
8149
ff07562f
JW		 8150 if (relative_reloc)
8151 {
8152 asection *s;
8153 Elf_Internal_Rela outrel;
8154
a1bdea65
SP		 8155 enum elf_aarch64_reloc_type rtype = AARCH64_R (RELATIVE);
8156
8d4edc5f
SP		 8157 s = globals->root.srelgot;
8158
d465be7b 8159 if (globals->c64_rel)
a1bdea65 8160 {
a1bdea65 8161 rtype = MORELLO_R (RELATIVE);
8d4edc5f 8162
d9f4f6fc
MM		 8163 /* Ensure that Morello RELATIVE relocations for static non-PIE
8164 binaries are all stored in the same input section. This is
8165 done so that we can mark that section with
8166 __rela_dyn_{start,end} symbols for the runtime to find and
8167 initialise relocations with. */
aeba84b1 8168 if (static_pde (info))
8d4edc5f
SP		 8169 s = globals->srelcaps;
8170
5fa80905 8171 outrel.r_addend = signed_addend;
a1bdea65
SP		 8172 }
8173 else
8174 outrel.r_addend = orig_value;
8175
ff07562f
JW		 8176 if (s == NULL)
8177 abort ();
8178
8179 outrel.r_offset = got_entry_addr;
a1bdea65 8180 outrel.r_info = ELFNN_R_INFO (0, rtype);
ff07562f
JW		 8181 elf_append_rela (output_bfd, s, &outrel);
8182 }
a2e1db00
RL		 8183 break;
8184
1408e112
MM		 8185 case BFD_RELOC_MORELLO_TLSIE_ADR_GOTTPREL_PAGE20:
8186 case BFD_RELOC_MORELLO_TLSIE_ADD_LO12:
ce336788 8187 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a6bb11b2 8188 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
3c12b054 8189 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
a6bb11b2 8190 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
a6bb11b2 8191 case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
ce336788 8192 case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
043bf05a 8193 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
73f925cc 8194 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
f69e4920 8195 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
77a69ff8 8196 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
a06ea964
NC		 8197 if (globals->root.sgot == NULL)
8198 return bfd_reloc_notsupported;
8199
8200 value = (symbol_got_offset (input_bfd, h, r_symndx)
8201 + globals->root.sgot->output_section->vma
f44a1f8e 8202 + globals->root.sgot->output_offset);
a06ea964 8203
652afeef
TC		 8204 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
8205 place, value,
caed7120 8206 0, weak_undef_p);
a06ea964
NC		 8207 *unresolved_reloc_p = FALSE;
8208 break;
8209
7ba7cfe4 8210 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
94facae3 8211 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
3b957e5b
RL		 8212 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
8213 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
94facae3
RL		 8214 if (globals->root.sgot == NULL)
8215 return bfd_reloc_notsupported;
8216
8217 value = symbol_got_offset (input_bfd, h, r_symndx);
652afeef
TC		 8218 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
8219 place, value,
94facae3
RL		 8220 0, weak_undef_p);
8221 *unresolved_reloc_p = FALSE;
8222 break;
8223
6ffe9a1b 8224 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
40fbed84 8225 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
753999c1 8226 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
07c9aa07
JW		 8227 case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
8228 case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
8229 case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
8230 case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
8231 case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
8232 case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
8233 case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
8234 case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
6ffe9a1b
JW		 8235 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
8236 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
8237 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
8238 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
8239 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
652afeef
TC		 8240 {
8241 if (!(weak_undef_p || elf_hash_table (info)->tls_sec))
8242 {
8243 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
8244 _bfd_error_handler
8245 /* xgettext:c-format */
8246 (_("%pB: TLS relocation %s against undefined symbol `%s'"),
8247 input_bfd, elfNN_aarch64_howto_table[howto_index].name,
8248 h->root.root.string);
8249 bfd_set_error (bfd_error_bad_value);
8250 return bfd_reloc_notsupported;
8251 }
8252
8253 bfd_vma def_value
8254 = weak_undef_p ? 0 : signed_addend - dtpoff_base (info);
8255 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
8256 place, value,
8257 def_value, weak_undef_p);
8258 break;
8259 }
40fbed84 8260
a6bb11b2
YZ		 8261 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
8262 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
8263 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
e04ef022
RL		 8264 case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
8265 case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
8266 case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
8267 case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
8268 case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
8269 case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
8270 case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
8271 case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
a6bb11b2
YZ		 8272 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
8273 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
8274 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
8275 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
8276 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
652afeef
TC		 8277 {
8278 if (!(weak_undef_p || elf_hash_table (info)->tls_sec))
8279 {
8280 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
8281 _bfd_error_handler
8282 /* xgettext:c-format */
8283 (_("%pB: TLS relocation %s against undefined symbol `%s'"),
8284 input_bfd, elfNN_aarch64_howto_table[howto_index].name,
8285 h->root.root.string);
8286 bfd_set_error (bfd_error_bad_value);
8287 return bfd_reloc_notsupported;
8288 }
26c32295
MM		 8289 /* Cannot have a Local-Exec relocation against a symbol that is not in
8290 the current binary. */
8291 if (!TLS_SYMBOL_REFERENCES_LOCAL (info, h))
8292 {
8293 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
8294 _bfd_error_handler
8295 /* xgettext:c-format */
8296 (_("%pB: Local-Exec TLS relocation %s against non-local "
8297 "symbol `%s'"),
8298 input_bfd, elfNN_aarch64_howto_table[howto_index].name,
8299 h->root.root.string);
8300 bfd_set_error (bfd_error_bad_value);
8301 return bfd_reloc_notsupported;
8302 }
652afeef
TC		 8303
8304 bfd_vma def_value
8305 = weak_undef_p ? 0 : signed_addend - tpoff_base (info);
8306 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
8307 place, value,
8308 def_value, weak_undef_p);
8309 *unresolved_reloc_p = FALSE;
8310 break;
8311 }
a06ea964 8312
f955cccf 8313 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
a6bb11b2 8314 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
4ca9b406 8315 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
389b8029 8316 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
a6bb11b2 8317 case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
f955cccf 8318 case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
1ada945d 8319 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
4ca9b406 8320 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
a06ea964
NC		 8321 if (globals->root.sgot == NULL)
8322 return bfd_reloc_notsupported;
a06ea964
NC		 8323 value = (symbol_tlsdesc_got_offset (input_bfd, h, r_symndx)
8324 + globals->root.sgotplt->output_section->vma
f44a1f8e 8325 + globals->root.sgotplt->output_offset
a06ea964
NC		 8326 + globals->sgotplt_jump_table_size);
8327
652afeef
TC		 8328 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
8329 place, value,
caed7120 8330 0, weak_undef_p);
a06ea964
NC		 8331 *unresolved_reloc_p = FALSE;
8332 break;
8333
0484b454
RL		 8334 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
8335 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
8336 if (globals->root.sgot == NULL)
8337 return bfd_reloc_notsupported;
8338
8339 value = (symbol_tlsdesc_got_offset (input_bfd, h, r_symndx)
8340 + globals->root.sgotplt->output_section->vma
8341 + globals->root.sgotplt->output_offset
8342 + globals->sgotplt_jump_table_size);
8343
8344 value -= (globals->root.sgot->output_section->vma
8345 + globals->root.sgot->output_offset);
8346
652afeef
TC		 8347 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
8348 place, value,
0484b454
RL		 8349 0, weak_undef_p);
8350 *unresolved_reloc_p = FALSE;
8351 break;
8352
40bbb79e
SP		 8353 case BFD_RELOC_MORELLO_CAPINIT:
8354 {
8355 Elf_Internal_Rela outrel;
8356
8357 if (input_section->flags & SEC_READONLY)
8358 {
8359 _bfd_error_handler
8360 /* xgettext:c-format */
8361 (_("%pB: capability relocation section must be writable"),
8362 input_bfd);
8363 bfd_set_error (bfd_error_bad_value);
8364 return bfd_reloc_notsupported;
8365 }
8366
8367 outrel.r_offset = _bfd_elf_section_offset (output_bfd, info,
8368 input_section,
8369 rel->r_offset);
8370
8371 outrel.r_offset += (input_section->output_section->vma
8372 + input_section->output_offset);
8373
8374 /* Capability-aligned. */
8375 if (outrel.r_offset & 0xf)
8376 return bfd_reloc_overflow;
8377
40bbb79e
SP		 8378 outrel.r_addend = signed_addend;
8379
ece841e8 8380 if (!c64_needs_relocation (info, h))
c0a10a86
MM		 8381 {
8382 /* If we know this symbol does not need a C64 dynamic relocation
8383 then it must be because this is an undefined weak symbol which
8384 can not find a definition at runtime.
8385
8386 To handle that we just ensure that we've put a zero into the
8387 binary file at this point and mark the relocation as resolved.
8388 */
8389 value = 0;
8390 *unresolved_reloc_p = FALSE;
8391 break;
8392 }
9a68ca09
MM		 8393 /* Emit a dynamic relocation if we are handling a symbol which the
8394 dynamic linker will be told about. */
c0a10a86
MM		 8395 else if (h != NULL
8396 && h->dynindx != -1
8397 && globals->root.dynamic_sections_created
8398 && !SYMBOL_REFERENCES_LOCAL (info, h))
9a68ca09
MM		 8399 {
8400 outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type);
8401 /* Dynamic symbols will be handled by the dynamic loader. Hence
8402 there is no need to fill a fragment with a value even if there
8403 is a value that we would use assuming no interception. */
8404 value = 0;
8405 }
40bbb79e 8406 else
5fa80905 8407 {
9a68ca09
MM		 8408 /* This relocation will point into the object we are building
8409 (either because this is a statically linked executable and
8410 hence there is only one object it could point at, or because
8411 we know it will resolve locally even though this is
8412 dynamically linked).
8413
8414 Hence we want to emit a RELATIVE relocation rather than a
8415 CAPINIT one. */
8416 bfd_reloc_status_type ret;
8417
8418 value |= (h != NULL ? h->target_internal : sym->st_target_internal);
8419 ret = c64_fixup_frag (input_bfd, info, bfd_r_type, sym, h, sym_sec,
8420 input_section, hit_data + 8, value,
8421 signed_addend, rel->r_offset);
8422
8423 if (ret != bfd_reloc_continue)
8424 return ret;
8425
8426 outrel.r_info = ELFNN_R_INFO (0, MORELLO_R (RELATIVE));
8427
8428 /* Symbols without size information get bounds to the
8429 whole section: adjust the base of the capability to the
8430 start of the section and set the addend to obtain the
8431 correct address for the symbol. */
8432 bfd_vma new_value;
8433 if (c64_symbol_adjust (h, value, sym_sec, info, &new_value))
8434 {
8435 outrel.r_addend += (value - new_value);
8436 value = new_value;
8437 }
5fa80905 8438 }
40bbb79e
SP		 8439
8440 asection *s = globals->srelcaps;
8441
8442 elf_append_rela (output_bfd, s, &outrel);
8443 *unresolved_reloc_p = FALSE;
8444 }
8445 break;
8446
a06ea964
NC		 8447 default:
8448 return bfd_reloc_notsupported;
8449 }
8450
8451 if (saved_addend)
8452 *saved_addend = value;
8453
8454 /* Only apply the final relocation in a sequence. */
8455 if (save_addend)
8456 return bfd_reloc_continue;
8457
caed7120
YZ		 8458 return _bfd_aarch64_elf_put_addend (input_bfd, hit_data, bfd_r_type,
8459 howto, value);
a06ea964
NC		 8460}
8461
2d0ca824
YN		 8462/* LP64 and ILP32 operates on x- and w-registers respectively.
8463 Next definitions take into account the difference between
8464 corresponding machine codes. R means x-register if the target
8465 arch is LP64, and w-register if the target is ILP32. */
8466
8467#if ARCH_SIZE == 64
8468# define add_R0_R0 (0x91000000)
8469# define add_R0_R0_R1 (0x8b000020)
8470# define add_R0_R1 (0x91400020)
8471# define ldr_R0 (0x58000000)
8472# define ldr_R0_mask(i) (i & 0xffffffe0)
8473# define ldr_R0_x0 (0xf9400000)
8474# define ldr_hw_R0 (0xf2a00000)
8475# define movk_R0 (0xf2800000)
8476# define movz_R0 (0xd2a00000)
8477# define movz_hw_R0 (0xd2c00000)
8478#else /*ARCH_SIZE == 32 */
8479# define add_R0_R0 (0x11000000)
8480# define add_R0_R0_R1 (0x0b000020)
8481# define add_R0_R1 (0x11400020)
8482# define ldr_R0 (0x18000000)
8483# define ldr_R0_mask(i) (i & 0xbfffffe0)
8484# define ldr_R0_x0 (0xb9400000)
8485# define ldr_hw_R0 (0x72a00000)
8486# define movk_R0 (0x72800000)
8487# define movz_R0 (0x52a00000)
8488# define movz_hw_R0 (0x52c00000)
8489#endif
8490
ece841e8
MM		 8491/* C64 only instructions. */
8492#define add_C0_C0 (0x02000000)
8493#define ldp_X0_X1_C0 (0xa9400400)
8494#define add_C0_C2_X0 (0xc2a06040)
8495#define scbnds_C0_C0_X1 (0xc2c10000)
8496
9fca35fc
TC		 8497/* Structure to hold payload for _bfd_aarch64_erratum_843419_clear_stub,
8498 it is used to identify the stub information to reset. */
8499
8500struct erratum_843419_branch_to_stub_clear_data
8501{
8502 bfd_vma adrp_offset;
8503 asection *output_section;
8504};
8505
8506/* Clear the erratum information for GEN_ENTRY if the ADRP_OFFSET and
8507 section inside IN_ARG matches. The clearing is done by setting the
8508 stub_type to none. */
8509
8510static bfd_boolean
8511_bfd_aarch64_erratum_843419_clear_stub (struct bfd_hash_entry *gen_entry,
8512 void *in_arg)
8513{
8514 struct elf_aarch64_stub_hash_entry *stub_entry
8515 = (struct elf_aarch64_stub_hash_entry *) gen_entry;
8516 struct erratum_843419_branch_to_stub_clear_data *data
8517 = (struct erratum_843419_branch_to_stub_clear_data *) in_arg;
8518
8519 if (stub_entry->target_section != data->output_section
8520 || stub_entry->stub_type != aarch64_stub_erratum_843419_veneer
8521 || stub_entry->adrp_offset != data->adrp_offset)
8522 return TRUE;
8523
8524 /* Change the stub type instead of removing the entry, removing from the hash
8525 table would be slower and we have already reserved the memory for the entry
8526 so there wouldn't be much gain. Changing the stub also keeps around a
8527 record of what was there before. */
8528 stub_entry->stub_type = aarch64_stub_none;
8529
8530 /* We're done and there could have been only one matching stub at that
8531 particular offset, so abort further traversal. */
8532 return FALSE;
8533}
8534
8535/* TLS Relaxations may relax an adrp sequence that matches the erratum 843419
8536 sequence. In this case the erratum no longer applies and we need to remove
8537 the entry from the pending stub generation. This clears matching adrp insn
8538 at ADRP_OFFSET in INPUT_SECTION in the stub table defined in GLOBALS. */
8539
8540static void
8541clear_erratum_843419_entry (struct elf_aarch64_link_hash_table *globals,
8542 bfd_vma adrp_offset, asection *input_section)
8543{
739b5c9c 8544 if (globals->fix_erratum_843419 & ERRAT_ADRP)
9fca35fc
TC		 8545 {
8546 struct erratum_843419_branch_to_stub_clear_data data;
8547 data.adrp_offset = adrp_offset;
8548 data.output_section = input_section;
8549
8550 bfd_hash_traverse (&globals->stub_hash_table,
8551 _bfd_aarch64_erratum_843419_clear_stub, &data);
8552 }
8553}
8554
4ca9b406
SP		 8555#define BUILD_MOVZ(_reg, _imm) (movz_R0 \
8556 | ((((_imm) >> 16) & 0xffff) << 5) \
8557 | (_reg))
8558#define BUILD_MOVK(_reg, _imm) (movk_R0 | (((_imm) & 0xffff) << 5) | (_reg))
8559
a06ea964
NC		 8560/* Handle TLS relaxations. Relaxing is possible for symbols that use
8561 R_AARCH64_TLSDESC_ADR_{PAGE, LD64_LO12_NC, ADD_LO12_NC} during a static
8562 link.
8563
8564 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
8565 is to then call final_link_relocate. Return other values in the
8566 case of error. */
8567
8568static bfd_reloc_status_type
4ca9b406
SP		 8569elfNN_aarch64_tls_relax (bfd *input_bfd, struct bfd_link_info *info,
8570 asection *input_section,
9fca35fc 8571 bfd_byte *contents, Elf_Internal_Rela *rel,
ece841e8 8572 struct elf_link_hash_entry *h)
a06ea964 8573{
8a4f8507 8574 bfd_boolean local_exec = (bfd_link_executable (info)
1408e112 8575 && TLS_SYMBOL_REFERENCES_LOCAL (info, h));
cec5225b 8576 unsigned int r_type = ELFNN_R_TYPE (rel->r_info);
a06ea964 8577 unsigned long insn;
4ca9b406 8578 struct elf_aarch64_link_hash_table *globals = elf_aarch64_hash_table (info);
a06ea964
NC		 8579
8580 BFD_ASSERT (globals && input_bfd && contents && rel);
8581
0aa13fee 8582 switch (elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type))
a06ea964 8583 {
a6bb11b2 8584 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
ce336788 8585 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
8a4f8507 8586 if (local_exec)
a06ea964
NC		 8587 {
8588 /* GD->LE relaxation:
2d0ca824 8589 adrp x0, :tlsgd:var => movz R0, :tprel_g1:var
a06ea964 8590 or
2d0ca824
YN		 8591 adrp x0, :tlsdesc:var => movz R0, :tprel_g1:var
8592
8593 Where R is x for LP64, and w for ILP32. */
8594 bfd_putl32 (movz_R0, contents + rel->r_offset);
9fca35fc
TC		 8595 /* We have relaxed the adrp into a mov, we may have to clear any
8596 pending erratum fixes. */
8597 clear_erratum_843419_entry (globals, rel->r_offset, input_section);
a06ea964
NC		 8598 return bfd_reloc_continue;
8599 }
8600 else
8601 {
8602 /* GD->IE relaxation:
8603 adrp x0, :tlsgd:var => adrp x0, :gottprel:var
8604 or
8605 adrp x0, :tlsdesc:var => adrp x0, :gottprel:var
8606 */
a06ea964
NC		 8607 return bfd_reloc_continue;
8608 }
8609
389b8029
MS		 8610 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
8611 BFD_ASSERT (0);
8612 break;
8613
1ada945d 8614 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
8a4f8507 8615 if (local_exec)
1ada945d
MS		 8616 {
8617 /* Tiny TLSDESC->LE relaxation:
07d6d2b8
AM		 8618 ldr x1, :tlsdesc:var => movz R0, #:tprel_g1:var
8619 adr x0, :tlsdesc:var => movk R0, #:tprel_g0_nc:var
1ada945d 8620 .tlsdesccall var
07d6d2b8 8621 blr x1 => nop
2d0ca824
YN		 8622
8623 Where R is x for LP64, and w for ILP32. */
1ada945d
MS		 8624 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (TLSDESC_ADR_PREL21));
8625 BFD_ASSERT (ELFNN_R_TYPE (rel[2].r_info) == AARCH64_R (TLSDESC_CALL));
8626
8627 rel[1].r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
8628 AARCH64_R (TLSLE_MOVW_TPREL_G0_NC));
8629 rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
8630
2d0ca824
YN		 8631 bfd_putl32 (movz_R0, contents + rel->r_offset);
8632 bfd_putl32 (movk_R0, contents + rel->r_offset + 4);
1ada945d
MS		 8633 bfd_putl32 (INSN_NOP, contents + rel->r_offset + 8);
8634 return bfd_reloc_continue;
8635 }
8636 else
8637 {
8638 /* Tiny TLSDESC->IE relaxation:
07d6d2b8
AM		 8639 ldr x1, :tlsdesc:var => ldr x0, :gottprel:var
8640 adr x0, :tlsdesc:var => nop
1ada945d 8641 .tlsdesccall var
07d6d2b8 8642 blr x1 => nop
1ada945d
MS		 8643 */
8644 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (TLSDESC_ADR_PREL21));
8645 BFD_ASSERT (ELFNN_R_TYPE (rel[2].r_info) == AARCH64_R (TLSDESC_CALL));
8646
8647 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
8648 rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
8649
2d0ca824 8650 bfd_putl32 (ldr_R0, contents + rel->r_offset);
1ada945d
MS		 8651 bfd_putl32 (INSN_NOP, contents + rel->r_offset + 4);
8652 bfd_putl32 (INSN_NOP, contents + rel->r_offset + 8);
8653 return bfd_reloc_continue;
8654 }
8655
3c12b054 8656 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
8a4f8507 8657 if (local_exec)
3c12b054
MS		 8658 {
8659 /* Tiny GD->LE relaxation:
07d6d2b8
AM		 8660 adr x0, :tlsgd:var => mrs x1, tpidr_el0
8661 bl __tls_get_addr => add R0, R1, #:tprel_hi12:x, lsl #12
8662 nop => add R0, R0, #:tprel_lo12_nc:x
2d0ca824
YN		 8663
8664 Where R is x for LP64, and x for Ilp32. */
3c12b054
MS		 8665
8666 /* First kill the tls_get_addr reloc on the bl instruction. */
8667 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
8668
8669 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 0);
2d0ca824
YN		 8670 bfd_putl32 (add_R0_R1, contents + rel->r_offset + 4);
8671 bfd_putl32 (add_R0_R0, contents + rel->r_offset + 8);
3c12b054
MS		 8672
8673 rel[1].r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
8674 AARCH64_R (TLSLE_ADD_TPREL_LO12_NC));
8675 rel[1].r_offset = rel->r_offset + 8;
8676
8677 /* Move the current relocation to the second instruction in
8678 the sequence. */
8679 rel->r_offset += 4;
8680 rel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
8681 AARCH64_R (TLSLE_ADD_TPREL_HI12));
8682 return bfd_reloc_continue;
8683 }
8684 else
8685 {
8686 /* Tiny GD->IE relaxation:
07d6d2b8
AM		 8687 adr x0, :tlsgd:var => ldr R0, :gottprel:var
8688 bl __tls_get_addr => mrs x1, tpidr_el0
8689 nop => add R0, R0, R1
2d0ca824
YN		 8690
8691 Where R is x for LP64, and w for Ilp32. */
3c12b054
MS		 8692
8693 /* First kill the tls_get_addr reloc on the bl instruction. */
8694 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
8695 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
8696
2d0ca824 8697 bfd_putl32 (ldr_R0, contents + rel->r_offset);
3c12b054 8698 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 4);
2d0ca824 8699 bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 8);
3c12b054
MS		 8700 return bfd_reloc_continue;
8701 }
8702
ac734732
RL		 8703#if ARCH_SIZE == 64
8704 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
8705 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (TLSGD_MOVW_G0_NC));
8706 BFD_ASSERT (rel->r_offset + 12 == rel[2].r_offset);
8707 BFD_ASSERT (ELFNN_R_TYPE (rel[2].r_info) == AARCH64_R (CALL26));
8708
8a4f8507 8709 if (local_exec)
ac734732
RL		 8710 {
8711 /* Large GD->LE relaxation:
07d6d2b8 8712 movz x0, #:tlsgd_g1:var => movz x0, #:tprel_g2:var, lsl #32
ac734732 8713 movk x0, #:tlsgd_g0_nc:var => movk x0, #:tprel_g1_nc:var, lsl #16
07d6d2b8
AM		 8714 add x0, gp, x0 => movk x0, #:tprel_g0_nc:var
8715 bl __tls_get_addr => mrs x1, tpidr_el0
8716 nop => add x0, x0, x1
ac734732
RL		 8717 */
8718 rel[2].r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
8719 AARCH64_R (TLSLE_MOVW_TPREL_G0_NC));
8720 rel[2].r_offset = rel->r_offset + 8;
8721
2d0ca824
YN		 8722 bfd_putl32 (movz_hw_R0, contents + rel->r_offset + 0);
8723 bfd_putl32 (ldr_hw_R0, contents + rel->r_offset + 4);
8724 bfd_putl32 (movk_R0, contents + rel->r_offset + 8);
ac734732 8725 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 12);
2d0ca824 8726 bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 16);
ac734732
RL		 8727 }
8728 else
8729 {
8730 /* Large GD->IE relaxation:
07d6d2b8 8731 movz x0, #:tlsgd_g1:var => movz x0, #:gottprel_g1:var, lsl #16
ac734732 8732 movk x0, #:tlsgd_g0_nc:var => movk x0, #:gottprel_g0_nc:var
07d6d2b8
AM		 8733 add x0, gp, x0 => ldr x0, [gp, x0]
8734 bl __tls_get_addr => mrs x1, tpidr_el0
8735 nop => add x0, x0, x1
ac734732
RL		 8736 */
8737 rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
8738 bfd_putl32 (0xd2a80000, contents + rel->r_offset + 0);
2d0ca824 8739 bfd_putl32 (ldr_R0, contents + rel->r_offset + 8);
ac734732 8740 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 12);
2d0ca824 8741 bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 16);
ac734732
RL		 8742 }
8743 return bfd_reloc_continue;
8744
8745 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
8746 return bfd_reloc_continue;
8747#endif
8748
ece841e8
MM		 8749 case BFD_RELOC_MORELLO_TLSIE_ADR_GOTTPREL_PAGE20:
8750 /* IE->LE relaxation:
8751 adrp c0, :gottprel:var => adrp c0, __var_data
8752 Instruction does not change (just the relocation on it). */
8753 return bfd_reloc_continue;
8754
8755 case BFD_RELOC_MORELLO_TLSIE_ADD_LO12:
8756 /* IE->LE relaxation:
8757 add c0, c0, :gottprel_lo12:var => add c0, c0, :lo12:__var_data
8758 Instruction does not change (just the relocation on it). */
8759 return bfd_reloc_continue;
8760
043bf05a
MS		 8761 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
8762 return bfd_reloc_continue;
8763
a6bb11b2 8764 case BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC:
8a4f8507 8765 if (local_exec)
a06ea964
NC		 8766 {
8767 /* GD->LE relaxation:
8768 ldr xd, [x0, #:tlsdesc_lo12:var] => movk x0, :tprel_g0_nc:var
2d0ca824
YN		 8769
8770 Where R is x for lp64 mode, and w for ILP32 mode. */
8771 bfd_putl32 (movk_R0, contents + rel->r_offset);
a06ea964
NC		 8772 return bfd_reloc_continue;
8773 }
8774 else
8775 {
8776 /* GD->IE relaxation:
2d0ca824
YN		 8777 ldr xd, [x0, #:tlsdesc_lo12:var] => ldr R0, [x0, #:gottprel_lo12:var]
8778
8779 Where R is x for lp64 mode, and w for ILP32 mode. */
a06ea964 8780 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 8781 bfd_putl32 (ldr_R0_mask (insn), contents + rel->r_offset);
a06ea964
NC		 8782 return bfd_reloc_continue;
8783 }
8784
a6bb11b2 8785 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
8a4f8507 8786 if (local_exec)
a06ea964
NC		 8787 {
8788 /* GD->LE relaxation
07d6d2b8
AM		 8789 add x0, #:tlsgd_lo12:var => movk R0, :tprel_g0_nc:var
8790 bl __tls_get_addr => mrs x1, tpidr_el0
8791 nop => add R0, R1, R0
2d0ca824
YN		 8792
8793 Where R is x for lp64 mode, and w for ILP32 mode. */
a06ea964
NC		 8794
8795 /* First kill the tls_get_addr reloc on the bl instruction. */
8796 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
cec5225b 8797 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
a06ea964 8798
2d0ca824 8799 bfd_putl32 (movk_R0, contents + rel->r_offset);
a06ea964 8800 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 4);
2d0ca824 8801 bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 8);
a06ea964
NC		 8802 return bfd_reloc_continue;
8803 }
8804 else
8805 {
8806 /* GD->IE relaxation
07d6d2b8
AM		 8807 ADD x0, #:tlsgd_lo12:var => ldr R0, [x0, #:gottprel_lo12:var]
8808 BL __tls_get_addr => mrs x1, tpidr_el0
a06ea964 8809 R_AARCH64_CALL26
07d6d2b8 8810 NOP => add R0, R1, R0
5cd1d8bc
YN		 8811
8812 Where R is x for lp64 mode, and w for ilp32 mode. */
a06ea964 8813
a6bb11b2 8814 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
a06ea964
NC		 8815
8816 /* Remove the relocation on the BL instruction. */
cec5225b 8817 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
a06ea964 8818
a06ea964
NC		 8819 /* We choose to fixup the BL and NOP instructions using the
8820 offset from the second relocation to allow flexibility in
8821 scheduling instructions between the ADD and BL. */
2d0ca824 8822 bfd_putl32 (ldr_R0_x0, contents + rel->r_offset);
5cd1d8bc 8823 bfd_putl32 (0xd53bd041, contents + rel[1].r_offset);
2d0ca824 8824 bfd_putl32 (add_R0_R0_R1, contents + rel[1].r_offset + 4);
a06ea964
NC		 8825 return bfd_reloc_continue;
8826 }
8827
ece841e8
MM		 8828 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
8829 /* GD->IE relaxation:
8830 adrp c0, :tlsdesc:var => adrp c0, :gottprel:var
8831 GD->LE relaxation:
8832 adrp c0, :tlsdesc:var => adrp c0, __var_data
8833 (No change in instructions, just need a different relocation). */
8834 return bfd_reloc_continue;
8835
8836 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
4ca9b406 8837 /* GD->LE relaxation:
ece841e8
MM		 8838 ldr c1, [c0, #:tlsdesc_lo12:var] => add c0, c0, :lo12:__var_data
8839 GD->IE relaxation:
8840 ldr c1, [c0, #:tlsdesc_lo12:var] => add c0, c0, :gottprel_lo12:__var_data
8841 (same relaxation in terms of instruction change, only different in
8842 terms of relocation that is used). */
8843 bfd_putl32 (add_C0_C0, contents + rel->r_offset);
8844 return bfd_reloc_continue;
8845
8846 case BFD_RELOC_MORELLO_TLSDESC_CALL:
8847 /* GD->LE relaxation AND GD->IE relaxation:
8848 nop => add c0, c2, x0
8849 blr cd => scbnds c0, c0, x1 */
8850 bfd_putl32 (add_C0_C2_X0, contents + rel->r_offset - 4);
8851 bfd_putl32 (scbnds_C0_C0_X1, contents + rel->r_offset);
8852 return bfd_reloc_ok;
4ca9b406 8853
f955cccf 8854 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
ece841e8
MM		 8855 /* GD->LE relaxation AND GD->IE relaxation:
8856 add c0, c0, :tlsdesc_lo12:var => ldp x0, x1, [c0] */
8857 if (ELFNN_R_TYPE (rel[1].r_info) == MORELLO_R (TLSDESC_CALL))
4ca9b406 8858 {
ece841e8
MM		 8859 bfd_putl32 (ldp_X0_X1_C0, contents + rel->r_offset);
8860 return bfd_reloc_ok;
4ca9b406
SP		 8861 }
8862
8863 /* Fall through. */
8864 case BFD_RELOC_AARCH64_TLSDESC_ADD:
a6bb11b2 8865 case BFD_RELOC_AARCH64_TLSDESC_CALL:
a06ea964 8866 /* GD->IE/LE relaxation:
07d6d2b8
AM		 8867 add x0, x0, #:tlsdesc_lo12:var => nop
8868 blr xd => nop
a06ea964
NC		 8869 */
8870 bfd_putl32 (INSN_NOP, contents + rel->r_offset);
8871 return bfd_reloc_ok;
8872
0484b454 8873 case BFD_RELOC_AARCH64_TLSDESC_LDR:
8a4f8507 8874 if (local_exec)
0484b454
RL		 8875 {
8876 /* GD->LE relaxation:
2d0ca824
YN		 8877 ldr xd, [gp, xn] => movk R0, #:tprel_g0_nc:var
8878
8879 Where R is x for lp64 mode, and w for ILP32 mode. */
8880 bfd_putl32 (movk_R0, contents + rel->r_offset);
0484b454
RL		 8881 return bfd_reloc_continue;
8882 }
8883 else
8884 {
8885 /* GD->IE relaxation:
2d0ca824
YN		 8886 ldr xd, [gp, xn] => ldr R0, [gp, xn]
8887
8888 Where R is x for lp64 mode, and w for ILP32 mode. */
0484b454 8889 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 8890 bfd_putl32 (ldr_R0_mask (insn), contents + rel->r_offset);
0484b454
RL		 8891 return bfd_reloc_ok;
8892 }
8893
8894 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
8895 /* GD->LE relaxation:
2d0ca824 8896 movk xd, #:tlsdesc_off_g0_nc:var => movk R0, #:tprel_g1_nc:var, lsl #16
0484b454 8897 GD->IE relaxation:
2d0ca824
YN		 8898 movk xd, #:tlsdesc_off_g0_nc:var => movk Rd, #:gottprel_g0_nc:var
8899
8900 Where R is x for lp64 mode, and w for ILP32 mode. */
8a4f8507 8901 if (local_exec)
2d0ca824 8902 bfd_putl32 (ldr_hw_R0, contents + rel->r_offset);
0484b454
RL		 8903 return bfd_reloc_continue;
8904
8905 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
8a4f8507 8906 if (local_exec)
0484b454
RL		 8907 {
8908 /* GD->LE relaxation:
2d0ca824
YN		 8909 movz xd, #:tlsdesc_off_g1:var => movz R0, #:tprel_g2:var, lsl #32
8910
8911 Where R is x for lp64 mode, and w for ILP32 mode. */
8912 bfd_putl32 (movz_hw_R0, contents + rel->r_offset);
0484b454
RL		 8913 return bfd_reloc_continue;
8914 }
8915 else
8916 {
8917 /* GD->IE relaxation:
2d0ca824
YN		 8918 movz xd, #:tlsdesc_off_g1:var => movz Rd, #:gottprel_g1:var, lsl #16
8919
8920 Where R is x for lp64 mode, and w for ILP32 mode. */
0484b454 8921 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 8922 bfd_putl32 (movz_R0 | (insn & 0x1f), contents + rel->r_offset);
0484b454
RL		 8923 return bfd_reloc_continue;
8924 }
8925
a6bb11b2 8926 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
a06ea964 8927 /* IE->LE relaxation:
07d6d2b8 8928 adrp xd, :gottprel:var => movz Rd, :tprel_g1:var
2d0ca824
YN		 8929
8930 Where R is x for lp64 mode, and w for ILP32 mode. */
8a4f8507 8931 if (local_exec)
a06ea964
NC		 8932 {
8933 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 8934 bfd_putl32 (movz_R0 | (insn & 0x1f), contents + rel->r_offset);
9fca35fc
TC		 8935 /* We have relaxed the adrp into a mov, we may have to clear any
8936 pending erratum fixes. */
8937 clear_erratum_843419_entry (globals, rel->r_offset, input_section);
a06ea964
NC		 8938 }
8939 return bfd_reloc_continue;
8940
a6bb11b2 8941 case BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC:
a06ea964 8942 /* IE->LE relaxation:
07d6d2b8 8943 ldr xd, [xm, #:gottprel_lo12:var] => movk Rd, :tprel_g0_nc:var
2d0ca824
YN		 8944
8945 Where R is x for lp64 mode, and w for ILP32 mode. */
8a4f8507 8946 if (local_exec)
a06ea964
NC		 8947 {
8948 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 8949 bfd_putl32 (movk_R0 | (insn & 0x1f), contents + rel->r_offset);
a06ea964
NC		 8950 }
8951 return bfd_reloc_continue;
8952
259364ad
JW		 8953 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
8954 /* LD->LE relaxation (tiny):
8955 adr x0, :tlsldm:x => mrs x0, tpidr_el0
c1fc2d7e
YN		 8956 bl __tls_get_addr => add R0, R0, TCB_SIZE
8957
8958 Where R is x for lp64 mode, and w for ilp32 mode. */
8a4f8507 8959 if (local_exec)
259364ad
JW		 8960 {
8961 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
8962 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
8963 /* No need of CALL26 relocation for tls_get_addr. */
8964 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
8965 bfd_putl32 (0xd53bd040, contents + rel->r_offset + 0);
bf3eaebd 8966 bfd_putl32 (add_R0_R0 | (TCB_SIZE (input_bfd) << 10),
2d0ca824 8967 contents + rel->r_offset + 4);
259364ad
JW		 8968 return bfd_reloc_ok;
8969 }
8970 return bfd_reloc_continue;
8971
8972 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
8973 /* LD->LE relaxation (small):
8974 adrp x0, :tlsldm:x => mrs x0, tpidr_el0
8975 */
8a4f8507 8976 if (local_exec)
259364ad
JW		 8977 {
8978 bfd_putl32 (0xd53bd040, contents + rel->r_offset);
8979 return bfd_reloc_ok;
8980 }
8981 return bfd_reloc_continue;
8982
8983 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
8984 /* LD->LE relaxation (small):
c1fc2d7e 8985 add x0, #:tlsldm_lo12:x => add R0, R0, TCB_SIZE
259364ad 8986 bl __tls_get_addr => nop
c1fc2d7e
YN		 8987
8988 Where R is x for lp64 mode, and w for ilp32 mode. */
8a4f8507 8989 if (local_exec)
259364ad
JW		 8990 {
8991 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
8992 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
8993 /* No need of CALL26 relocation for tls_get_addr. */
8994 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
bf3eaebd 8995 bfd_putl32 (add_R0_R0 | (TCB_SIZE (input_bfd) << 10),
2d0ca824 8996 contents + rel->r_offset + 0);
c1fc2d7e 8997 bfd_putl32 (INSN_NOP, contents + rel->r_offset + 4);
259364ad
JW		 8998 return bfd_reloc_ok;
8999 }
9000 return bfd_reloc_continue;
9001
a06ea964
NC		 9002 default:
9003 return bfd_reloc_continue;
9004 }
9005
9006 return bfd_reloc_ok;
9007}
9008
9009/* Relocate an AArch64 ELF section. */
9010
ece841e8
MM		 9011static bfd_vma
9012c64_populate_tls_data_stub (struct elf_aarch64_link_hash_table *globals,
9013 bfd *input_bfd,
9014 struct elf_link_hash_entry *h,
9015 unsigned long r_symndx,
9016 bfd_vma offset, bfd_vma size,
9017 bfd *output_bfd)
9018{
9019 struct elf_c64_tls_data_stub_hash_entry *found
9020 = c64_tls_stub_find (h, input_bfd, r_symndx, globals);
9021 BFD_ASSERT (found);
9022
9023 if (!found->populated)
9024 {
9025 bfd_put_NN (output_bfd, offset,
9026 globals->sc64_tls_stubs->contents +
9027 found->tls_stub_offset);
9028 bfd_put_NN (output_bfd, size,
9029 globals->sc64_tls_stubs->contents +
9030 found->tls_stub_offset + 8);
9031 found->populated = TRUE;
9032 }
9033
9034 return globals->sc64_tls_stubs->output_section->vma
9035 + globals->sc64_tls_stubs->output_offset
9036 + found->tls_stub_offset;
9037}
9038
9039
a06ea964 9040static bfd_boolean
cec5225b 9041elfNN_aarch64_relocate_section (bfd *output_bfd,
a06ea964
NC		 9042 struct bfd_link_info *info,
9043 bfd *input_bfd,
9044 asection *input_section,
9045 bfd_byte *contents,
9046 Elf_Internal_Rela *relocs,
9047 Elf_Internal_Sym *local_syms,
9048 asection **local_sections)
9049{
26c32295 9050 bfd_boolean ret = TRUE;
a06ea964
NC		 9051 Elf_Internal_Shdr *symtab_hdr;
9052 struct elf_link_hash_entry **sym_hashes;
9053 Elf_Internal_Rela *rel;
9054 Elf_Internal_Rela *relend;
9055 const char *name;
cec5225b 9056 struct elf_aarch64_link_hash_table *globals;
a06ea964
NC		 9057 bfd_boolean save_addend = FALSE;
9058 bfd_vma addend = 0;
9059
cec5225b 9060 globals = elf_aarch64_hash_table (info);
a06ea964
NC		 9061
9062 symtab_hdr = &elf_symtab_hdr (input_bfd);
9063 sym_hashes = elf_sym_hashes (input_bfd);
9064
9065 rel = relocs;
9066 relend = relocs + input_section->reloc_count;
9067 for (; rel < relend; rel++)
9068 {
9069 unsigned int r_type;
a6bb11b2
YZ		 9070 bfd_reloc_code_real_type bfd_r_type;
9071 bfd_reloc_code_real_type relaxed_bfd_r_type;
a06ea964
NC		 9072 reloc_howto_type *howto;
9073 unsigned long r_symndx;
9074 Elf_Internal_Sym *sym;
9075 asection *sec;
9076 struct elf_link_hash_entry *h;
9077 bfd_vma relocation;
9078 bfd_reloc_status_type r;
9079 arelent bfd_reloc;
9080 char sym_type;
9081 bfd_boolean unresolved_reloc = FALSE;
9082 char *error_message = NULL;
9083
cec5225b
YZ		 9084 r_symndx = ELFNN_R_SYM (rel->r_info);
9085 r_type = ELFNN_R_TYPE (rel->r_info);
a06ea964 9086
0aa13fee
AM		 9087 bfd_reloc.howto = elfNN_aarch64_howto_from_type (input_bfd, r_type);
9088 howto = bfd_reloc.howto;
a06ea964 9089
7fcfd62d 9090 if (howto == NULL)
47aeb64c
NC		 9091 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
9092
a6bb11b2 9093 bfd_r_type = elfNN_aarch64_bfd_reloc_from_howto (howto);
7fcfd62d 9094
a06ea964
NC		 9095 h = NULL;
9096 sym = NULL;
9097 sec = NULL;
9098
9099 if (r_symndx < symtab_hdr->sh_info)
9100 {
9101 sym = local_syms + r_symndx;
cec5225b 9102 sym_type = ELFNN_ST_TYPE (sym->st_info);
a06ea964
NC		 9103 sec = local_sections[r_symndx];
9104
9105 /* An object file might have a reference to a local
9106 undefined symbol. This is a daft object file, but we
9107 should at least do something about it. */
9108 if (r_type != R_AARCH64_NONE && r_type != R_AARCH64_NULL
9109 && bfd_is_und_section (sec)
9110 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
1a72702b
AM		 9111 (*info->callbacks->undefined_symbol)
9112 (info, bfd_elf_string_from_elf_section
9113 (input_bfd, symtab_hdr->sh_link, sym->st_name),
9114 input_bfd, input_section, rel->r_offset, TRUE);
a06ea964 9115
a06ea964 9116 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
1419bbe5
WN		 9117
9118 /* Relocate against local STT_GNU_IFUNC symbol. */
0e1862bb 9119 if (!bfd_link_relocatable (info)
1419bbe5
WN		 9120 && ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC)
9121 {
9122 h = elfNN_aarch64_get_local_sym_hash (globals, input_bfd,
9123 rel, FALSE);
9124 if (h == NULL)
9125 abort ();
9126
9127 /* Set STT_GNU_IFUNC symbol value. */
9128 h->root.u.def.value = sym->st_value;
9129 h->root.u.def.section = sec;
9130 }
a06ea964
NC		 9131 }
9132 else
9133 {
62d887d4 9134 bfd_boolean warned, ignored;
a06ea964
NC		 9135
9136 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
9137 r_symndx, symtab_hdr, sym_hashes,
9138 h, sec, relocation,
62d887d4 9139 unresolved_reloc, warned, ignored);
a06ea964
NC		 9140
9141 sym_type = h->type;
9142 }
9143
9144 if (sec != NULL && discarded_section (sec))
9145 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
9146 rel, 1, relend, howto, 0, contents);
9147
0e1862bb 9148 if (bfd_link_relocatable (info))
2e0488d3 9149 continue;
a06ea964
NC		 9150
9151 if (h != NULL)
9152 name = h->root.root.string;
9153 else
9154 {
9155 name = (bfd_elf_string_from_elf_section
9156 (input_bfd, symtab_hdr->sh_link, sym->st_name));
9157 if (name == NULL || *name == '\0')
fd361982 9158 name = bfd_section_name (sec);
a06ea964
NC		 9159 }
9160
9161 if (r_symndx != 0
9162 && r_type != R_AARCH64_NONE
9163 && r_type != R_AARCH64_NULL
9164 && (h == NULL
9165 || h->root.type == bfd_link_hash_defined
9166 || h->root.type == bfd_link_hash_defweak)
1408e112
MM		 9167 && IS_AARCH64_TLS_RELOC (bfd_r_type) != (sym_type == STT_TLS)
9168 /* Morello SIZE relocation is allowed on TLS symbols and non-TLS
9169 symbols. */
9170 && !IS_MORELLO_SIZE_RELOC (bfd_r_type))
a06ea964 9171 {
4eca0228 9172 _bfd_error_handler
a06ea964 9173 ((sym_type == STT_TLS
695344c0 9174 /* xgettext:c-format */
2dcf00ce 9175 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
695344c0 9176 /* xgettext:c-format */
2dcf00ce 9177 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
a06ea964 9178 input_bfd,
2dcf00ce 9179 input_section, (uint64_t) rel->r_offset, howto->name, name);
a06ea964
NC		 9180 }
9181
f3ecc5c8
AC		 9182 if (r_symndx
9183 && h
9184 && IS_AARCH64_TLS_RELOC (bfd_r_type)
9185 && h->root.type == bfd_link_hash_undefweak)
9186 /* We have already warned about these in aarch64_check_relocs,
9187 so just skip over them. */
9188 continue;
9189
26c32295
MM		 9190 /* We check TLS relocations with an addend here rather than in the
9191 final_link_relocate function since we want to base our decision on if
9192 the original relocation was a TLS relocation and the relaxation below
9193 could turn this relocation into a plain MORELLO_ADR_PREL_PG_HI20 or
9194 AARCH64_ADD_ABS_LO12_NC. */
9195 if (((IS_AARCH64_TLS_RELOC (bfd_r_type)
9196 && !IS_AARCH64_TLSLE_RELOC (bfd_r_type))
9197 || IS_MORELLO_SIZE_RELOC (bfd_r_type))
9198 && (rel->r_addend != 0 || addend != 0))
9199 {
9200 _bfd_error_handler (_("%pB(%pA+%#" PRIx64 "): "
9201 "relocation %s against `%s' is disallowed "
9202 "with addend"),
9203 input_bfd, input_section,
9204 (uint64_t) rel->r_offset, howto->name, name);
9205 /* It could be confusing if there's not a TLS relocation with an
9206 addend but there was a TLS relocation with the previous relocation
9207 at the same spot. */
9208 if (rel->r_addend == 0 && addend != 0)
9209 info->callbacks->warning
9210 (info,
9211 _("note: addend comes from previous relocation"),
9212 name, input_bfd, input_section, rel->r_offset);
9213 ret = FALSE;
9214 continue;
9215 }
9216
a06ea964 9217 /* We relax only if we can see that there can be a valid transition
07d6d2b8
AM		 9218 from a reloc type to another.
9219 We call elfNN_aarch64_final_link_relocate unless we're completely
9220 done, i.e., the relaxation produced the final output we want. */
a06ea964 9221
ece841e8 9222 bfd_boolean requires_c64_tls_stub;
4ca9b406 9223 relaxed_bfd_r_type = aarch64_tls_transition (input_bfd, info, rel,
ece841e8
MM		 9224 h, r_symndx,
9225 &requires_c64_tls_stub);
a6bb11b2 9226 if (relaxed_bfd_r_type != bfd_r_type)
a06ea964 9227 {
a6bb11b2
YZ		 9228 bfd_r_type = relaxed_bfd_r_type;
9229 howto = elfNN_aarch64_howto_from_bfd_reloc (bfd_r_type);
9230 BFD_ASSERT (howto != NULL);
9231 r_type = howto->type;
ece841e8
MM		 9232 if (requires_c64_tls_stub)
9233 {
9234 relocation
9235 = c64_populate_tls_data_stub (globals, input_bfd, h, r_symndx,
9236 relocation - tpoff_base (info),
9237 h ? h->size : sym->st_size,
9238 output_bfd);
9239 }
4ca9b406 9240 r = elfNN_aarch64_tls_relax (input_bfd, info, input_section,
ece841e8 9241 contents, rel, h);
26c32295 9242 unresolved_reloc = FALSE;
a06ea964
NC		 9243 }
9244 else
9245 r = bfd_reloc_continue;
9246
9247 /* There may be multiple consecutive relocations for the
07d6d2b8
AM		 9248 same offset. In that case we are supposed to treat the
9249 output of each relocation as the addend for the next. */
a06ea964
NC		 9250 if (rel + 1 < relend
9251 && rel->r_offset == rel[1].r_offset
cec5225b
YZ		 9252 && ELFNN_R_TYPE (rel[1].r_info) != R_AARCH64_NONE
9253 && ELFNN_R_TYPE (rel[1].r_info) != R_AARCH64_NULL)
a06ea964
NC		 9254 save_addend = TRUE;
9255 else
9256 save_addend = FALSE;
9257
9258 if (r == bfd_reloc_continue)
cec5225b 9259 r = elfNN_aarch64_final_link_relocate (howto, input_bfd, output_bfd,
a06ea964
NC		 9260 input_section, contents, rel,
9261 relocation, info, sec,
9262 h, &unresolved_reloc,
1419bbe5 9263 save_addend, &addend, sym);
a06ea964 9264
4ca9b406
SP		 9265 bfd_boolean c64_rtype = FALSE;
9266
0aa13fee 9267 switch (elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type))
a06ea964 9268 {
ce336788 9269 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a6bb11b2 9270 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
3c12b054 9271 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
7ba7cfe4 9272 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
94facae3 9273 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
73f925cc 9274 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
f69e4920 9275 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
77a69ff8 9276 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
a06ea964
NC		 9277 if (! symbol_got_offset_mark_p (input_bfd, h, r_symndx))
9278 {
9279 bfd_boolean need_relocs = FALSE;
9280 bfd_byte *loc;
9281 int indx;
9282 bfd_vma off;
9283
9284 off = symbol_got_offset (input_bfd, h, r_symndx);
9285 indx = h && h->dynindx != -1 ? h->dynindx : 0;
9286
9287 need_relocs =
6dda7875 9288 (!bfd_link_executable (info) || indx != 0) &&
a06ea964
NC		 9289 (h == NULL
9290 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9291 || h->root.type != bfd_link_hash_undefweak);
9292
9293 BFD_ASSERT (globals->root.srelgot != NULL);
9294
9295 if (need_relocs)
9296 {
9297 Elf_Internal_Rela rela;
a6bb11b2 9298 rela.r_info = ELFNN_R_INFO (indx, AARCH64_R (TLS_DTPMOD));
a06ea964
NC		 9299 rela.r_addend = 0;
9300 rela.r_offset = globals->root.sgot->output_section->vma +
9301 globals->root.sgot->output_offset + off;
9302
9303
9304 loc = globals->root.srelgot->contents;
9305 loc += globals->root.srelgot->reloc_count++
ece841e8 9306 * RELOC_SIZE (globals);
cec5225b 9307 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964 9308
f69e4920 9309 bfd_reloc_code_real_type real_type =
0aa13fee 9310 elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type);
f69e4920
JW		 9311
9312 if (real_type == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
73f925cc
JW		 9313 || real_type == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
9314 || real_type == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC)
77a69ff8
JW		 9315 {
9316 /* For local dynamic, don't generate DTPREL in any case.
9317 Initialize the DTPREL slot into zero, so we get module
9318 base address when invoke runtime TLS resolver. */
9319 bfd_put_NN (output_bfd, 0,
9320 globals->root.sgot->contents + off
a1bdea65 9321 + GOT_ENTRY_SIZE (globals));
77a69ff8
JW		 9322 }
9323 else if (indx == 0)
a06ea964 9324 {
cec5225b 9325 bfd_put_NN (output_bfd,
a06ea964
NC		 9326 relocation - dtpoff_base (info),
9327 globals->root.sgot->contents + off
a1bdea65 9328 + GOT_ENTRY_SIZE (globals));
a06ea964
NC		 9329 }
9330 else
9331 {
9332 /* This TLS symbol is global. We emit a
9333 relocation to fixup the tls offset at load
9334 time. */
9335 rela.r_info =
a6bb11b2 9336 ELFNN_R_INFO (indx, AARCH64_R (TLS_DTPREL));
a06ea964
NC		 9337 rela.r_addend = 0;
9338 rela.r_offset =
9339 (globals->root.sgot->output_section->vma
9340 + globals->root.sgot->output_offset + off
a1bdea65 9341 + GOT_ENTRY_SIZE (globals));
a06ea964
NC		 9342
9343 loc = globals->root.srelgot->contents;
9344 loc += globals->root.srelgot->reloc_count++
9345 * RELOC_SIZE (globals);
cec5225b
YZ		 9346 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
9347 bfd_put_NN (output_bfd, (bfd_vma) 0,
a06ea964 9348 globals->root.sgot->contents + off
a1bdea65 9349 + GOT_ENTRY_SIZE (globals));
a06ea964
NC		 9350 }
9351 }
9352 else
9353 {
cec5225b 9354 bfd_put_NN (output_bfd, (bfd_vma) 1,
a06ea964 9355 globals->root.sgot->contents + off);
cec5225b 9356 bfd_put_NN (output_bfd,
a06ea964
NC		 9357 relocation - dtpoff_base (info),
9358 globals->root.sgot->contents + off
a1bdea65 9359 + GOT_ENTRY_SIZE (globals));
a06ea964
NC		 9360 }
9361
9362 symbol_got_offset_mark (input_bfd, h, r_symndx);
9363 }
9364 break;
9365
1408e112
MM		 9366 case BFD_RELOC_MORELLO_TLSIE_ADR_GOTTPREL_PAGE20:
9367 case BFD_RELOC_MORELLO_TLSIE_ADD_LO12:
ece841e8
MM		 9368 c64_rtype = TRUE;
9369 /* Fall through. */
9370
a6bb11b2
YZ		 9371 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
9372 case BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC:
043bf05a 9373 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
3b957e5b
RL		 9374 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
9375 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
a06ea964
NC		 9376 if (! symbol_got_offset_mark_p (input_bfd, h, r_symndx))
9377 {
9378 bfd_boolean need_relocs = FALSE;
9379 bfd_byte *loc;
9380 int indx;
9381 bfd_vma off;
9382
9383 off = symbol_got_offset (input_bfd, h, r_symndx);
9384
9385 indx = h && h->dynindx != -1 ? h->dynindx : 0;
9386
9387 need_relocs =
6dda7875 9388 (!bfd_link_executable (info) || indx != 0) &&
a06ea964
NC		 9389 (h == NULL
9390 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9391 || h->root.type != bfd_link_hash_undefweak);
ece841e8 9392 BFD_ASSERT (!c64_rtype || c64_needs_relocation (info, h));
1408e112 9393 need_relocs = need_relocs || c64_rtype;
a06ea964
NC		 9394
9395 BFD_ASSERT (globals->root.srelgot != NULL);
9396
9397 if (need_relocs)
9398 {
9399 Elf_Internal_Rela rela;
9400
9401 if (indx == 0)
9402 rela.r_addend = relocation - dtpoff_base (info);
9403 else
9404 rela.r_addend = 0;
9405
1408e112
MM		 9406 rela.r_info = ELFNN_R_INFO (indx,
9407 globals->c64_rel
9408 ? MORELLO_R (TPREL128)
9409 : AARCH64_R (TLS_TPREL));
a06ea964
NC		 9410 rela.r_offset = globals->root.sgot->output_section->vma +
9411 globals->root.sgot->output_offset + off;
9412
9413 loc = globals->root.srelgot->contents;
9414 loc += globals->root.srelgot->reloc_count++
ece841e8 9415 * RELOC_SIZE (globals);
a06ea964 9416
cec5225b 9417 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964 9418
cec5225b 9419 bfd_put_NN (output_bfd, rela.r_addend,
a06ea964 9420 globals->root.sgot->contents + off);
1408e112
MM		 9421 if (c64_rtype && TLS_SYMBOL_REFERENCES_LOCAL (info, h))
9422 {
9423 bfd_vma sym_size = h ? h->size : sym->st_size;
9424 bfd_put_NN (output_bfd, sym_size,
9425 globals->root.sgot->contents + off + 8);
9426 }
a06ea964
NC		 9427 }
9428 else
cec5225b 9429 bfd_put_NN (output_bfd, relocation - tpoff_base (info),
a06ea964
NC		 9430 globals->root.sgot->contents + off);
9431
9432 symbol_got_offset_mark (input_bfd, h, r_symndx);
9433 }
9434 break;
9435
4ca9b406
SP		 9436 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
9437 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
9438 c64_rtype = TRUE;
9439 /* Fall through. */
9440
f955cccf 9441 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
a6bb11b2 9442 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
389b8029 9443 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
a6bb11b2 9444 case BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC:
1ada945d 9445 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
0484b454
RL		 9446 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
9447 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
a06ea964
NC		 9448 if (! symbol_tlsdesc_got_offset_mark_p (input_bfd, h, r_symndx))
9449 {
9450 bfd_boolean need_relocs = FALSE;
9451 int indx = h && h->dynindx != -1 ? h->dynindx : 0;
9452 bfd_vma off = symbol_tlsdesc_got_offset (input_bfd, h, r_symndx);
9453
9454 need_relocs = (h == NULL
9455 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9456 || h->root.type != bfd_link_hash_undefweak);
ece841e8 9457 BFD_ASSERT (!c64_rtype || c64_needs_relocation (info, h));
1408e112 9458 need_relocs = need_relocs || c64_rtype;
a06ea964
NC		 9459
9460 BFD_ASSERT (globals->root.srelgot != NULL);
9461 BFD_ASSERT (globals->root.sgot != NULL);
9462
9463 if (need_relocs)
9464 {
9465 bfd_byte *loc;
9466 Elf_Internal_Rela rela;
4ca9b406
SP		 9467
9468 rela.r_info = ELFNN_R_INFO (indx,
9469 (c64_rtype ? MORELLO_R (TLSDESC)
9470 : AARCH64_R (TLSDESC)));
a6bb11b2 9471
a06ea964
NC		 9472 rela.r_addend = 0;
9473 rela.r_offset = (globals->root.sgotplt->output_section->vma
9474 + globals->root.sgotplt->output_offset
9475 + off + globals->sgotplt_jump_table_size);
9476
9477 if (indx == 0)
9478 rela.r_addend = relocation - dtpoff_base (info);
9479
9480 /* Allocate the next available slot in the PLT reloc
9481 section to hold our R_AARCH64_TLSDESC, the next
9482 available slot is determined from reloc_count,
9483 which we step. But note, reloc_count was
9484 artifically moved down while allocating slots for
9485 real PLT relocs such that all of the PLT relocs
9486 will fit above the initial reloc_count and the
9487 extra stuff will fit below. */
9488 loc = globals->root.srelplt->contents;
9489 loc += globals->root.srelplt->reloc_count++
9490 * RELOC_SIZE (globals);
9491
cec5225b 9492 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964 9493
1408e112
MM		 9494 if (!c64_rtype)
9495 {
9496 bfd_put_NN (output_bfd, (bfd_vma) 0,
9497 globals->root.sgotplt->contents + off +
9498 globals->sgotplt_jump_table_size);
9499 bfd_put_NN (output_bfd, (bfd_vma) 0,
9500 globals->root.sgotplt->contents + off +
9501 globals->sgotplt_jump_table_size +
9502 GOT_ENTRY_SIZE (globals));
9503 }
9504 else
9505 {
9506 void * fragment_start
9507 = globals->root.sgotplt->contents + off +
9508 globals->sgotplt_jump_table_size;
9509
9510 bfd_vma sym_size = !TLS_SYMBOL_REFERENCES_LOCAL (info, h)
9511 ? 0
9512 : h ? h->size : sym->st_size;
9513
9514 bfd_put_NN (output_bfd, (bfd_vma) 0, fragment_start);
9515 bfd_put_NN (output_bfd, (bfd_vma) 0, fragment_start + 8);
9516 bfd_put_NN (output_bfd, (bfd_vma) 0, fragment_start + 16);
9517 bfd_put_NN (output_bfd, sym_size, fragment_start + 24);
9518 }
a06ea964
NC		 9519 }
9520
9521 symbol_tlsdesc_got_offset_mark (input_bfd, h, r_symndx);
9522 }
9523 break;
a6bb11b2
YZ		 9524 default:
9525 break;
a06ea964
NC		 9526 }
9527
a06ea964 9528 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
07d6d2b8
AM		 9529 because such sections are not SEC_ALLOC and thus ld.so will
9530 not process them. */
a06ea964
NC		 9531 if (unresolved_reloc
9532 && !((input_section->flags & SEC_DEBUGGING) != 0
9533 && h->def_dynamic)
9534 && _bfd_elf_section_offset (output_bfd, info, input_section,
9535 +rel->r_offset) != (bfd_vma) - 1)
9536 {
4eca0228 9537 _bfd_error_handler
695344c0 9538 /* xgettext:c-format */
2dcf00ce
AM		 9539 (_("%pB(%pA+%#" PRIx64 "): "
9540 "unresolvable %s relocation against symbol `%s'"),
9541 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name,
a06ea964
NC		 9542 h->root.root.string);
9543 return FALSE;
9544 }
9545
9546 if (r != bfd_reloc_ok && r != bfd_reloc_continue)
9547 {
c674f5cd 9548 bfd_reloc_code_real_type real_r_type
0aa13fee 9549 = elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type);
c674f5cd 9550
a06ea964
NC		 9551 switch (r)
9552 {
9553 case bfd_reloc_overflow:
1a72702b
AM		 9554 (*info->callbacks->reloc_overflow)
9555 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
9556 input_bfd, input_section, rel->r_offset);
c674f5cd
JW		 9557 if (real_r_type == BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
9558 || real_r_type == BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14)
9559 {
9560 (*info->callbacks->warning)
9561 (info,
90b6238f 9562 _("too many GOT entries for -fpic, "
c674f5cd
JW		 9563 "please recompile with -fPIC"),
9564 name, input_bfd, input_section, rel->r_offset);
9565 return FALSE;
9566 }
027e9c75
NC		 9567 /* Overflow can occur when a variable is referenced with a type
9568 that has a larger alignment than the type with which it was
9569 declared. eg:
9570 file1.c: extern int foo; int a (void) { return foo; }
9571 file2.c: char bar, foo, baz;
9572 If the variable is placed into a data section at an offset
9573 that is incompatible with the larger alignment requirement
9574 overflow will occur. (Strictly speaking this is not overflow
9575 but rather an alignment problem, but the bfd_reloc_ error
9576 enum does not have a value to cover that situation).
9577
9578 Try to catch this situation here and provide a more helpful
9579 error message to the user. */
26009aa7 9580 if (addend & (((bfd_vma) 1 << howto->rightshift) - 1)
027e9c75
NC		 9581 /* FIXME: Are we testing all of the appropriate reloc
9582 types here ? */
9583 && (real_r_type == BFD_RELOC_AARCH64_LD_LO19_PCREL
9584 || real_r_type == BFD_RELOC_AARCH64_LDST16_LO12
9585 || real_r_type == BFD_RELOC_AARCH64_LDST32_LO12
9586 || real_r_type == BFD_RELOC_AARCH64_LDST64_LO12
9587 || real_r_type == BFD_RELOC_AARCH64_LDST128_LO12))
9588 {
9589 info->callbacks->warning
90b6238f 9590 (info, _("one possible cause of this error is that the \
027e9c75 9591symbol is being referenced in the indicated code as if it had a larger \
90b6238f 9592alignment than was declared where it was defined"),
027e9c75
NC		 9593 name, input_bfd, input_section, rel->r_offset);
9594 }
40bbb79e
SP		 9595
9596 if (real_r_type == BFD_RELOC_MORELLO_CAPINIT)
9597 info->callbacks->warning
9598 (info, _("relocation offset must be capability aligned"),
9599 name, input_bfd, input_section, rel->r_offset);
a06ea964
NC		 9600 break;
9601
9602 case bfd_reloc_undefined:
1a72702b
AM		 9603 (*info->callbacks->undefined_symbol)
9604 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
a06ea964
NC		 9605 break;
9606
9607 case bfd_reloc_outofrange:
9608 error_message = _("out of range");
9609 goto common_error;
9610
9611 case bfd_reloc_notsupported:
9612 error_message = _("unsupported relocation");
9613 goto common_error;
9614
9615 case bfd_reloc_dangerous:
9616 /* error_message should already be set. */
9617 goto common_error;
9618
9619 default:
9620 error_message = _("unknown error");
9621 /* Fall through. */
9622
9623 common_error:
9624 BFD_ASSERT (error_message != NULL);
1a72702b
AM		 9625 (*info->callbacks->reloc_dangerous)
9626 (info, error_message, input_bfd, input_section, rel->r_offset);
a06ea964
NC		 9627 break;
9628 }
9629 }
027e9c75
NC		 9630
9631 if (!save_addend)
9632 addend = 0;
a06ea964
NC		 9633 }
9634
26c32295 9635 return ret;
a06ea964
NC		 9636}
9637
9638/* Set the right machine number. */
9639
9640static bfd_boolean
cec5225b 9641elfNN_aarch64_object_p (bfd *abfd)
a06ea964 9642{
cec5225b
YZ		 9643#if ARCH_SIZE == 32
9644 bfd_default_set_arch_mach (abfd, bfd_arch_aarch64, bfd_mach_aarch64_ilp32);
9645#else
a06ea964 9646 bfd_default_set_arch_mach (abfd, bfd_arch_aarch64, bfd_mach_aarch64);
cec5225b 9647#endif
a06ea964
NC		 9648 return TRUE;
9649}
9650
9651/* Function to keep AArch64 specific flags in the ELF header. */
9652
9653static bfd_boolean
cec5225b 9654elfNN_aarch64_set_private_flags (bfd *abfd, flagword flags)
a06ea964
NC		 9655{
9656 if (elf_flags_init (abfd) && elf_elfheader (abfd)->e_flags != flags)
9657 {
9658 }
9659 else
9660 {
9661 elf_elfheader (abfd)->e_flags = flags;
9662 elf_flags_init (abfd) = TRUE;
9663 }
9664
9665 return TRUE;
9666}
9667
a06ea964
NC		 9668/* Merge backend specific data from an object file to the output
9669 object file when linking. */
9670
9671static bfd_boolean
50e03d47 9672elfNN_aarch64_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
a06ea964 9673{
50e03d47 9674 bfd *obfd = info->output_bfd;
a06ea964
NC		 9675 flagword out_flags;
9676 flagword in_flags;
f8180c20 9677 bfd_boolean flags_compatible = FALSE;
a06ea964
NC		 9678 asection *sec;
9679
9680 /* Check if we have the same endianess. */
50e03d47 9681 if (!_bfd_generic_verify_endian_match (ibfd, info))
a06ea964
NC		 9682 return FALSE;
9683
9684 if (!is_aarch64_elf (ibfd) || !is_aarch64_elf (obfd))
9685 return TRUE;
9686
9687 /* The input BFD must have had its flags initialised. */
9688 /* The following seems bogus to me -- The flags are initialized in
9689 the assembler but I don't think an elf_flags_init field is
9690 written into the object. */
9691 /* BFD_ASSERT (elf_flags_init (ibfd)); */
9692
9693 in_flags = elf_elfheader (ibfd)->e_flags;
9694 out_flags = elf_elfheader (obfd)->e_flags;
9695
9696 if (!elf_flags_init (obfd))
9697 {
f8180c20
MM		 9698 elf_flags_init (obfd) = TRUE;
9699
a06ea964 9700 /* If the input is the default architecture and had the default
07d6d2b8
AM		 9701 flags then do not bother setting the flags for the output
9702 architecture, instead allow future merges to do this. If no
9703 future merges ever set these flags then they will retain their
9704 uninitialised values, which surprise surprise, correspond
9705 to the default values. */
a06ea964
NC		 9706 if (bfd_get_arch_info (ibfd)->the_default
9707 && elf_elfheader (ibfd)->e_flags == 0)
9708 return TRUE;
9709
a06ea964 9710 elf_elfheader (obfd)->e_flags = in_flags;
60d18fc3
MM		 9711 /* Determine if we are linking purecap or not based on the flags of the
9712 input binaries. Among other things this decides the size of GOT
9713 entries. */
9714 if (in_flags & EF_AARCH64_CHERI_PURECAP)
9715 {
9716 struct elf_aarch64_link_hash_table *globals;
9717 globals = elf_aarch64_hash_table (info);
9718 globals->c64_rel = 1;
9719 }
a06ea964
NC		 9720
9721 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
9722 && bfd_get_arch_info (obfd)->the_default)
9723 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
9724 bfd_get_mach (ibfd));
9725
9726 return TRUE;
9727 }
9728
9729 /* Identical flags must be compatible. */
9730 if (in_flags == out_flags)
9731 return TRUE;
9732
9733 /* Check to see if the input BFD actually contains any sections. If
9734 not, its flags may not have been initialised either, but it
9735 cannot actually cause any incompatiblity. Do not short-circuit
9736 dynamic objects; their section list may be emptied by
9737 elf_link_add_object_symbols.
9738
9739 Also check to see if there are no code sections in the input.
9740 In this case there is no need to check for code specific flags.
9741 XXX - do we need to worry about floating-point format compatability
f8180c20
MM		 9742 in data sections ?
9743
9744 We definitely need to check for data sections if one set of flags is
9745 targetting the PURECAP abi and another is not. Pointers being
9746 capabilities in data sections can not be glossed over. */
a06ea964
NC		 9747 if (!(ibfd->flags & DYNAMIC))
9748 {
9749 bfd_boolean null_input_bfd = TRUE;
f8180c20
MM		 9750 bfd_boolean only_data_sections
9751 = !(in_flags & EF_AARCH64_CHERI_PURECAP
9752 || out_flags & EF_AARCH64_CHERI_PURECAP);
a06ea964
NC		 9753
9754 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
9755 {
fd361982 9756 if ((bfd_section_flags (sec)
a06ea964
NC		 9757 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
9758 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
9759 only_data_sections = FALSE;
9760
9761 null_input_bfd = FALSE;
9762 break;
9763 }
9764
9765 if (null_input_bfd || only_data_sections)
9766 return TRUE;
9767 }
9768
9769 return flags_compatible;
9770}
9771
9772/* Display the flags field. */
9773
9774static bfd_boolean
cec5225b 9775elfNN_aarch64_print_private_bfd_data (bfd *abfd, void *ptr)
a06ea964
NC		 9776{
9777 FILE *file = (FILE *) ptr;
9778 unsigned long flags;
9779
9780 BFD_ASSERT (abfd != NULL && ptr != NULL);
9781
9782 /* Print normal ELF private data. */
9783 _bfd_elf_print_private_bfd_data (abfd, ptr);
9784
9785 flags = elf_elfheader (abfd)->e_flags;
9786 /* Ignore init flag - it may not be set, despite the flags field
9787 containing valid data. */
9788
9789 /* xgettext:c-format */
9790 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
9791
9792 if (flags)
9793 fprintf (file, _("<Unrecognised flag bits set>"));
9794
9795 fputc ('\n', file);
9796
9797 return TRUE;
9798}
9799
6353d82b
JW		 9800/* Return true if we need copy relocation against EH. */
9801
9802static bfd_boolean
9803need_copy_relocation_p (struct elf_aarch64_link_hash_entry *eh)
9804{
9805 struct elf_dyn_relocs *p;
9806 asection *s;
9807
190eb1dd 9808 for (p = eh->root.dyn_relocs; p != NULL; p = p->next)
6353d82b
JW		 9809 {
9810 /* If there is any pc-relative reference, we need to keep copy relocation
9811 to avoid propagating the relocation into runtime that current glibc
9812 does not support. */
9813 if (p->pc_count)
9814 return TRUE;
9815
9816 s = p->sec->output_section;
9817 /* Need copy relocation if it's against read-only section. */
9818 if (s != NULL && (s->flags & SEC_READONLY) != 0)
9819 return TRUE;
9820 }
9821
9822 return FALSE;
9823}
9824
a06ea964
NC		 9825/* Adjust a symbol defined by a dynamic object and referenced by a
9826 regular object. The current definition is in some section of the
9827 dynamic object, but we're not including those sections. We have to
9828 change the definition to something the rest of the link can
9829 understand. */
9830
9831static bfd_boolean
cec5225b 9832elfNN_aarch64_adjust_dynamic_symbol (struct bfd_link_info *info,
a06ea964
NC		 9833 struct elf_link_hash_entry *h)
9834{
cec5225b 9835 struct elf_aarch64_link_hash_table *htab;
5474d94f 9836 asection *s, *srel;
a06ea964
NC		 9837
9838 /* If this is a function, put it in the procedure linkage table. We
9839 will fill in the contents of the procedure linkage table later,
9840 when we know the address of the .got section. */
1419bbe5 9841 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
a06ea964
NC		 9842 {
9843 if (h->plt.refcount <= 0
1419bbe5
WN		 9844 || (h->type != STT_GNU_IFUNC
9845 && (SYMBOL_CALLS_LOCAL (info, h)
9846 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
9847 && h->root.type == bfd_link_hash_undefweak))))
a06ea964
NC		 9848 {
9849 /* This case can occur if we saw a CALL26 reloc in
9850 an input file, but the symbol wasn't referred to
9851 by a dynamic object or all references were
9852 garbage collected. In which case we can end up
9853 resolving. */
9854 h->plt.offset = (bfd_vma) - 1;
9855 h->needs_plt = 0;
9856 }
9857
9858 return TRUE;
9859 }
9860 else
80de0c6d 9861 /* Otherwise, reset to -1. */
a06ea964
NC		 9862 h->plt.offset = (bfd_vma) - 1;
9863
9864
9865 /* If this is a weak symbol, and there is a real definition, the
9866 processor independent code will have arranged for us to see the
9867 real definition first, and we can just use the same value. */
60d67dc8 9868 if (h->is_weakalias)
a06ea964 9869 {
60d67dc8
AM		 9870 struct elf_link_hash_entry *def = weakdef (h);
9871 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
9872 h->root.u.def.section = def->root.u.def.section;
9873 h->root.u.def.value = def->root.u.def.value;
a06ea964 9874 if (ELIMINATE_COPY_RELOCS || info->nocopyreloc)
60d67dc8 9875 h->non_got_ref = def->non_got_ref;
a06ea964
NC		 9876 return TRUE;
9877 }
9878
9879 /* If we are creating a shared library, we must presume that the
9880 only references to the symbol are via the global offset table.
9881 For such cases we need not do anything here; the relocations will
9882 be handled correctly by relocate_section. */
0e1862bb 9883 if (bfd_link_pic (info))
a06ea964
NC		 9884 return TRUE;
9885
9886 /* If there are no references to this symbol that do not use the
9887 GOT, we don't need to generate a copy reloc. */
9888 if (!h->non_got_ref)
9889 return TRUE;
9890
9891 /* If -z nocopyreloc was given, we won't generate them either. */
9892 if (info->nocopyreloc)
9893 {
9894 h->non_got_ref = 0;
9895 return TRUE;
9896 }
9897
6353d82b
JW		 9898 if (ELIMINATE_COPY_RELOCS)
9899 {
9900 struct elf_aarch64_link_hash_entry *eh;
dce2246a 9901 /* If we don't find any dynamic relocs in read-only sections, then
6353d82b
JW		 9902 we'll be keeping the dynamic relocs and avoiding the copy reloc. */
9903 eh = (struct elf_aarch64_link_hash_entry *) h;
9904 if (!need_copy_relocation_p (eh))
9905 {
9906 h->non_got_ref = 0;
9907 return TRUE;
9908 }
9909 }
9910
a06ea964
NC		 9911 /* We must allocate the symbol in our .dynbss section, which will
9912 become part of the .bss section of the executable. There will be
9913 an entry for this symbol in the .dynsym section. The dynamic
9914 object will contain position independent code, so all references
9915 from the dynamic object to this symbol will go through the global
9916 offset table. The dynamic linker will use the .dynsym entry to
9917 determine the address it must put in the global offset table, so
9918 both the dynamic object and the regular object will refer to the
9919 same memory location for the variable. */
9920
cec5225b 9921 htab = elf_aarch64_hash_table (info);
a06ea964
NC		 9922
9923 /* We must generate a R_AARCH64_COPY reloc to tell the dynamic linker
9924 to copy the initial value out of the dynamic object and into the
9925 runtime process image. */
5474d94f
AM		 9926 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
9927 {
9928 s = htab->root.sdynrelro;
9929 srel = htab->root.sreldynrelro;
9930 }
9931 else
9932 {
9933 s = htab->root.sdynbss;
9934 srel = htab->root.srelbss;
9935 }
a06ea964
NC		 9936 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
9937 {
5474d94f 9938 srel->size += RELOC_SIZE (htab);
a06ea964
NC		 9939 h->needs_copy = 1;
9940 }
9941
6cabe1ea 9942 return _bfd_elf_adjust_dynamic_copy (info, h, s);
a06ea964
NC		 9943
9944}
9945
9946static bfd_boolean
cec5225b 9947elfNN_aarch64_allocate_local_symbols (bfd *abfd, unsigned number)
a06ea964
NC		 9948{
9949 struct elf_aarch64_local_symbol *locals;
cec5225b 9950 locals = elf_aarch64_locals (abfd);
a06ea964
NC		 9951 if (locals == NULL)
9952 {
9953 locals = (struct elf_aarch64_local_symbol *)
9954 bfd_zalloc (abfd, number * sizeof (struct elf_aarch64_local_symbol));
9955 if (locals == NULL)
9956 return FALSE;
cec5225b 9957 elf_aarch64_locals (abfd) = locals;
a06ea964
NC		 9958 }
9959 return TRUE;
9960}
9961
a1bdea65
SP		 9962/* Initialise the .got section to hold the global offset table. */
9963
9964static void
9965aarch64_elf_init_got_section (bfd *abfd, struct bfd_link_info *info)
9966{
9967 const struct elf_backend_data *bed = get_elf_backend_data (abfd);
9968 asection *s;
9969 struct elf_aarch64_link_hash_table *globals = elf_aarch64_hash_table (info);
9970 unsigned int align = bed->s->log_file_align + globals->c64_rel;
9971
9972 if (globals->root.sgot != NULL)
9973 {
9974 bfd_set_section_alignment (globals->root.srelgot,
9975 bed->s->log_file_align);
9976 bfd_set_section_alignment (globals->root.sgot, align);
9977 globals->root.sgot->size += GOT_ENTRY_SIZE (globals);
9978 }
9979
8d4edc5f 9980 /* Track capability initialisation for static non-PIE binaries. */
aeba84b1 9981 if (static_pde (info) && globals->srelcaps == NULL)
8d4edc5f
SP		 9982 globals->srelcaps = globals->root.srelgot;
9983
a1bdea65
SP		 9984 if (globals->root.igotplt != NULL)
9985 bfd_set_section_alignment (globals->root.igotplt, align);
9986
9987 s = globals->root.sgot;
9988
9989 if (globals->root.sgotplt != NULL)
9990 {
9991 bfd_set_section_alignment (globals->root.sgotplt, align);
9992 s = globals->root.sgotplt;
9993 }
9994
9995 /* The first bit of the global offset table is the header. */
9996 if (s != NULL)
9997 s->size += bed->got_header_size (info);
9998}
9999
cc0efaa8
MS		 10000/* Create the .got section to hold the global offset table. */
10001
10002static bfd_boolean
10003aarch64_elf_create_got_section (bfd *abfd, struct bfd_link_info *info)
10004{
10005 const struct elf_backend_data *bed = get_elf_backend_data (abfd);
10006 flagword flags;
10007 asection *s;
10008 struct elf_link_hash_entry *h;
10009 struct elf_link_hash_table *htab = elf_hash_table (info);
10010
10011 /* This function may be called more than once. */
ce558b89 10012 if (htab->sgot != NULL)
cc0efaa8
MS		 10013 return TRUE;
10014
10015 flags = bed->dynamic_sec_flags;
10016
10017 s = bfd_make_section_anyway_with_flags (abfd,
10018 (bed->rela_plts_and_copies_p
10019 ? ".rela.got" : ".rel.got"),
10020 (bed->dynamic_sec_flags
10021 | SEC_READONLY));
a1bdea65 10022 if (s == NULL)
cc0efaa8
MS		 10023 return FALSE;
10024 htab->srelgot = s;
10025
10026 s = bfd_make_section_anyway_with_flags (abfd, ".got", flags);
a1bdea65 10027 if (s == NULL)
cc0efaa8
MS		 10028 return FALSE;
10029 htab->sgot = s;
cc0efaa8
MS		 10030
10031 if (bed->want_got_sym)
10032 {
10033 /* Define the symbol _GLOBAL_OFFSET_TABLE_ at the start of the .got
10034 (or .got.plt) section. We don't do this in the linker script
10035 because we don't want to define the symbol if we are not creating
10036 a global offset table. */
10037 h = _bfd_elf_define_linkage_sym (abfd, info, s,
10038 "_GLOBAL_OFFSET_TABLE_");
10039 elf_hash_table (info)->hgot = h;
10040 if (h == NULL)
10041 return FALSE;
10042 }
10043
10044 if (bed->want_got_plt)
10045 {
10046 s = bfd_make_section_anyway_with_flags (abfd, ".got.plt", flags);
a1bdea65 10047 if (s == NULL)
cc0efaa8
MS		 10048 return FALSE;
10049 htab->sgotplt = s;
10050 }
10051
cc0efaa8
MS		 10052 return TRUE;
10053}
10054
a06ea964
NC		 10055/* Look through the relocs for a section during the first phase. */
10056
10057static bfd_boolean
cec5225b 10058elfNN_aarch64_check_relocs (bfd *abfd, struct bfd_link_info *info,
a06ea964
NC		 10059 asection *sec, const Elf_Internal_Rela *relocs)
10060{
10061 Elf_Internal_Shdr *symtab_hdr;
10062 struct elf_link_hash_entry **sym_hashes;
10063 const Elf_Internal_Rela *rel;
10064 const Elf_Internal_Rela *rel_end;
10065 asection *sreloc;
10066
cec5225b 10067 struct elf_aarch64_link_hash_table *htab;
a06ea964 10068
0e1862bb 10069 if (bfd_link_relocatable (info))
a06ea964
NC		 10070 return TRUE;
10071
10072 BFD_ASSERT (is_aarch64_elf (abfd));
10073
cec5225b 10074 htab = elf_aarch64_hash_table (info);
a06ea964
NC		 10075 sreloc = NULL;
10076
10077 symtab_hdr = &elf_symtab_hdr (abfd);
10078 sym_hashes = elf_sym_hashes (abfd);
a06ea964 10079
7ff36d1a 10080 bfd_elfNN_aarch64_init_maps (abfd, info);
f0070c1e 10081
a06ea964
NC		 10082 rel_end = relocs + sec->reloc_count;
10083 for (rel = relocs; rel < rel_end; rel++)
10084 {
10085 struct elf_link_hash_entry *h;
f3ecc5c8 10086 unsigned int r_symndx, r_type;
a6bb11b2 10087 bfd_reloc_code_real_type bfd_r_type;
1419bbe5 10088 Elf_Internal_Sym *isym;
a06ea964 10089
cec5225b 10090 r_symndx = ELFNN_R_SYM (rel->r_info);
f3ecc5c8
AC		 10091 r_type = ELFNN_R_TYPE (rel->r_info);
10092 bfd_r_type = elfNN_aarch64_bfd_reloc_from_type (abfd, r_type);
a06ea964
NC		 10093
10094 if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr))
10095 {
695344c0 10096 /* xgettext:c-format */
871b3ab2 10097 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd, r_symndx);
a06ea964
NC		 10098 return FALSE;
10099 }
10100
ed5acf27 10101 if (r_symndx < symtab_hdr->sh_info)
1419bbe5
WN		 10102 {
10103 /* A local symbol. */
f1dfbfdb 10104 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
1419bbe5
WN		 10105 abfd, r_symndx);
10106 if (isym == NULL)
10107 return FALSE;
10108
10109 /* Check relocation against local STT_GNU_IFUNC symbol. */
10110 if (ELF_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
10111 {
10112 h = elfNN_aarch64_get_local_sym_hash (htab, abfd, rel,
10113 TRUE);
10114 if (h == NULL)
10115 return FALSE;
10116
10117 /* Fake a STT_GNU_IFUNC symbol. */
10118 h->type = STT_GNU_IFUNC;
10119 h->def_regular = 1;
10120 h->ref_regular = 1;
10121 h->forced_local = 1;
10122 h->root.type = bfd_link_hash_defined;
36b60023 10123 h->target_internal = isym->st_target_internal;
1419bbe5
WN		 10124 }
10125 else
10126 h = NULL;
10127 }
a06ea964
NC		 10128 else
10129 {
10130 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10131 while (h->root.type == bfd_link_hash_indirect
10132 || h->root.type == bfd_link_hash_warning)
10133 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10134 }
10135
f3ecc5c8
AC		 10136 /* Ignore TLS relocations against weak undef symbols and warn about them.
10137 The behaviour of weak TLS variables is not well defined. Since making
10138 these well behaved is not a priority for Morello, we simply ignore
10139 TLS relocations against such symbols here to avoid the linker crashing
10140 on these and to enable making progress in other areas. */
10141 if (r_symndx
10142 && h
10143 && IS_AARCH64_TLS_RELOC (bfd_r_type)
10144 && h->root.type == bfd_link_hash_undefweak)
10145 {
10146 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
10147 _bfd_error_handler (_("%pB(%pA+%#" PRIx64 "): ignoring TLS relocation "
10148 "%s against undef weak symbol %s"),
10149 abfd, sec,
10150 (uint64_t) rel->r_offset,
10151 elfNN_aarch64_howto_table[howto_index].name,
10152 h->root.root.string);
10153 continue;
10154 }
10155
a06ea964 10156 /* Could be done earlier, if h were already available. */
ece841e8
MM		 10157 bfd_boolean requires_c64_tls_stub;
10158 bfd_r_type = aarch64_tls_transition (abfd, info, rel, h, r_symndx,
10159 &requires_c64_tls_stub);
10160 if (requires_c64_tls_stub
10161 && !c64_record_tls_stub (htab, abfd, h, r_symndx))
10162 {
10163 _bfd_error_handler (_("%pB: failed to record TLS stub"), abfd);
10164 bfd_set_error (bfd_error_no_memory);
10165 return FALSE;
10166 }
a06ea964 10167
1419bbe5
WN		 10168 if (h != NULL)
10169 {
18f822a0
JW		 10170 /* If a relocation refers to _GLOBAL_OFFSET_TABLE_, create the .got.
10171 This shows up in particular in an R_AARCH64_PREL64 in large model
10172 when calculating the pc-relative address to .got section which is
10173 used to initialize the gp register. */
10174 if (h->root.root.string
10175 && strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
10176 {
10177 if (htab->root.dynobj == NULL)
10178 htab->root.dynobj = abfd;
10179
10180 if (! aarch64_elf_create_got_section (htab->root.dynobj, info))
10181 return FALSE;
10182
10183 BFD_ASSERT (h == htab->root.hgot);
10184 }
10185
1419bbe5
WN		 10186 /* Create the ifunc sections for static executables. If we
10187 never see an indirect function symbol nor we are building
10188 a static executable, those sections will be empty and
10189 won't appear in output. */
10190 switch (bfd_r_type)
10191 {
10192 default:
10193 break;
10194
e19e9199
SP		 10195 case BFD_RELOC_MORELLO_CALL26:
10196 case BFD_RELOC_MORELLO_JUMP26:
ce336788
JW		 10197 case BFD_RELOC_AARCH64_ADD_LO12:
10198 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
92504105 10199 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
ce336788 10200 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
92504105 10201 case BFD_RELOC_MORELLO_ADR_HI20_PCREL:
1419bbe5 10202 case BFD_RELOC_AARCH64_CALL26:
ce336788 10203 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
1419bbe5 10204 case BFD_RELOC_AARCH64_JUMP26:
7018c030 10205 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
1419bbe5 10206 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
a2e1db00 10207 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
99ad26cb 10208 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
1419bbe5 10209 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
a1bdea65 10210 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
dc8008f5 10211 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
74a1bfe1 10212 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
ce336788 10213 case BFD_RELOC_AARCH64_NN:
36b60023 10214 case BFD_RELOC_MORELLO_CAPINIT:
1419bbe5
WN		 10215 if (htab->root.dynobj == NULL)
10216 htab->root.dynobj = abfd;
10217 if (!_bfd_elf_create_ifunc_sections (htab->root.dynobj, info))
10218 return FALSE;
10219 break;
10220 }
10221
2d0ca824 10222 /* It is referenced by a non-shared object. */
1419bbe5 10223 h->ref_regular = 1;
1419bbe5
WN		 10224 }
10225
a6bb11b2 10226 switch (bfd_r_type)
a06ea964 10227 {
79e74192
RL		 10228 case BFD_RELOC_AARCH64_16:
10229#if ARCH_SIZE == 64
10230 case BFD_RELOC_AARCH64_32:
10231#endif
279b2f94 10232 if (bfd_link_pic (info) && (sec->flags & SEC_ALLOC) != 0)
79e74192 10233 {
279b2f94
RL		 10234 if (h != NULL
10235 /* This is an absolute symbol. It represents a value instead
10236 of an address. */
c691de6a 10237 && (bfd_is_abs_symbol (&h->root)
279b2f94
RL		 10238 /* This is an undefined symbol. */
10239 || h->root.type == bfd_link_hash_undefined))
10240 break;
10241
10242 /* For local symbols, defined global symbols in a non-ABS section,
10243 it is assumed that the value is an address. */
79e74192
RL		 10244 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
10245 _bfd_error_handler
10246 /* xgettext:c-format */
871b3ab2 10247 (_("%pB: relocation %s against `%s' can not be used when making "
79e74192
RL		 10248 "a shared object"),
10249 abfd, elfNN_aarch64_howto_table[howto_index].name,
10250 (h) ? h->root.root.string : "a local symbol");
10251 bfd_set_error (bfd_error_bad_value);
10252 return FALSE;
10253 }
10254 else
10255 break;
10256
6353d82b
JW		 10257 case BFD_RELOC_AARCH64_MOVW_G0_NC:
10258 case BFD_RELOC_AARCH64_MOVW_G1_NC:
10259 case BFD_RELOC_AARCH64_MOVW_G2_NC:
10260 case BFD_RELOC_AARCH64_MOVW_G3:
10261 if (bfd_link_pic (info))
10262 {
10263 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
10264 _bfd_error_handler
10265 /* xgettext:c-format */
871b3ab2 10266 (_("%pB: relocation %s against `%s' can not be used when making "
6353d82b
JW		 10267 "a shared object; recompile with -fPIC"),
10268 abfd, elfNN_aarch64_howto_table[howto_index].name,
10269 (h) ? h->root.root.string : "a local symbol");
10270 bfd_set_error (bfd_error_bad_value);
10271 return FALSE;
10272 }
10273 /* Fall through. */
10274
10275 case BFD_RELOC_AARCH64_16_PCREL:
10276 case BFD_RELOC_AARCH64_32_PCREL:
10277 case BFD_RELOC_AARCH64_64_PCREL:
10278 case BFD_RELOC_AARCH64_ADD_LO12:
10279 case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
10280 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
92504105
SP		 10281 case BFD_RELOC_MORELLO_ADR_HI20_NC_PCREL:
10282 case BFD_RELOC_MORELLO_ADR_HI20_PCREL:
6353d82b
JW		 10283 case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
10284 case BFD_RELOC_AARCH64_LDST128_LO12:
10285 case BFD_RELOC_AARCH64_LDST16_LO12:
10286 case BFD_RELOC_AARCH64_LDST32_LO12:
10287 case BFD_RELOC_AARCH64_LDST64_LO12:
10288 case BFD_RELOC_AARCH64_LDST8_LO12:
10289 case BFD_RELOC_AARCH64_LD_LO19_PCREL:
f7d2c675 10290 case BFD_RELOC_MORELLO_LD_LO17_PCREL:
6353d82b
JW		 10291 if (h == NULL || bfd_link_pic (info))
10292 break;
10293 /* Fall through. */
10294
a6bb11b2 10295 case BFD_RELOC_AARCH64_NN:
a06ea964
NC		 10296
10297 /* We don't need to handle relocs into sections not going into
10298 the "real" output. */
10299 if ((sec->flags & SEC_ALLOC) == 0)
10300 break;
10301
10302 if (h != NULL)
10303 {
0e1862bb 10304 if (!bfd_link_pic (info))
a06ea964
NC		 10305 h->non_got_ref = 1;
10306
10307 h->plt.refcount += 1;
10308 h->pointer_equality_needed = 1;
10309 }
10310
10311 /* No need to do anything if we're not creating a shared
10312 object. */
6353d82b
JW		 10313 if (!(bfd_link_pic (info)
10314 /* If on the other hand, we are creating an executable, we
10315 may need to keep relocations for symbols satisfied by a
10316 dynamic library if we manage to avoid copy relocs for the
10317 symbol.
10318
10319 NOTE: Currently, there is no support of copy relocs
10320 elimination on pc-relative relocation types, because there is
10321 no dynamic relocation support for them in glibc. We still
10322 record the dynamic symbol reference for them. This is
10323 because one symbol may be referenced by both absolute
10324 relocation (for example, BFD_RELOC_AARCH64_NN) and
10325 pc-relative relocation. We need full symbol reference
10326 information to make correct decision later in
10327 elfNN_aarch64_adjust_dynamic_symbol. */
10328 || (ELIMINATE_COPY_RELOCS
10329 && !bfd_link_pic (info)
10330 && h != NULL
10331 && (h->root.type == bfd_link_hash_defweak
10332 || !h->def_regular))))
a06ea964
NC		 10333 break;
10334
10335 {
10336 struct elf_dyn_relocs *p;
10337 struct elf_dyn_relocs **head;
6353d82b 10338 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
a06ea964
NC		 10339
10340 /* We must copy these reloc types into the output file.
10341 Create a reloc section in dynobj and make room for
10342 this reloc. */
10343 if (sreloc == NULL)
10344 {
10345 if (htab->root.dynobj == NULL)
10346 htab->root.dynobj = abfd;
10347
10348 sreloc = _bfd_elf_make_dynamic_reloc_section
0608afa7 10349 (sec, htab->root.dynobj, LOG_FILE_ALIGN, abfd, /*rela? */ TRUE);
a06ea964
NC		 10350
10351 if (sreloc == NULL)
10352 return FALSE;
10353 }
10354
10355 /* If this is a global symbol, we count the number of
10356 relocations we need for this symbol. */
10357 if (h != NULL)
10358 {
190eb1dd 10359 head = &h->dyn_relocs;
a06ea964
NC		 10360 }
10361 else
10362 {
10363 /* Track dynamic relocs needed for local syms too.
10364 We really need local syms available to do this
10365 easily. Oh well. */
10366
10367 asection *s;
10368 void **vpp;
a06ea964 10369
f1dfbfdb 10370 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
a06ea964
NC		 10371 abfd, r_symndx);
10372 if (isym == NULL)
10373 return FALSE;
10374
10375 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
10376 if (s == NULL)
10377 s = sec;
10378
10379 /* Beware of type punned pointers vs strict aliasing
10380 rules. */
10381 vpp = &(elf_section_data (s)->local_dynrel);
10382 head = (struct elf_dyn_relocs **) vpp;
10383 }
10384
10385 p = *head;
10386 if (p == NULL || p->sec != sec)
10387 {
986f0783 10388 size_t amt = sizeof *p;
a06ea964
NC		 10389 p = ((struct elf_dyn_relocs *)
10390 bfd_zalloc (htab->root.dynobj, amt));
10391 if (p == NULL)
10392 return FALSE;
10393 p->next = *head;
10394 *head = p;
10395 p->sec = sec;
10396 }
10397
10398 p->count += 1;
10399
6353d82b
JW		 10400 if (elfNN_aarch64_howto_table[howto_index].pc_relative)
10401 p->pc_count += 1;
a06ea964
NC		 10402 }
10403 break;
10404
10405 /* RR: We probably want to keep a consistency check that
10406 there are no dangling GOT_PAGE relocs. */
92504105 10407 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
a1bdea65 10408 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
4ca9b406
SP		 10409 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
10410 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
1408e112
MM		 10411 case BFD_RELOC_MORELLO_TLSIE_ADR_GOTTPREL_PAGE20:
10412 case BFD_RELOC_MORELLO_TLSIE_ADD_LO12:
a1bdea65
SP		 10413 htab->c64_rel = 1;
10414 /* Fall through. */
10415
10416 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
7bcccb57 10417 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
7018c030 10418 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
7bcccb57 10419 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
a2e1db00 10420 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
99ad26cb 10421 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
7bcccb57 10422 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
dc8008f5 10423 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
74a1bfe1 10424 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
f955cccf 10425 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
7bcccb57 10426 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
389b8029 10427 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
7bcccb57 10428 case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
f955cccf 10429 case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
1ada945d 10430 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
0484b454
RL		 10431 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
10432 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
a6bb11b2 10433 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
7bcccb57 10434 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
3c12b054 10435 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
7ba7cfe4 10436 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
94facae3 10437 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
a6bb11b2 10438 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
a6bb11b2 10439 case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
7bcccb57 10440 case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
043bf05a 10441 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
3b957e5b
RL		 10442 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
10443 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
73f925cc 10444 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
f69e4920 10445 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
77a69ff8 10446 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
a06ea964
NC		 10447 {
10448 unsigned got_type;
10449 unsigned old_got_type;
10450
a6bb11b2 10451 got_type = aarch64_reloc_got_type (bfd_r_type);
a06ea964
NC		 10452
10453 if (h)
10454 {
10455 h->got.refcount += 1;
cec5225b 10456 old_got_type = elf_aarch64_hash_entry (h)->got_type;
a06ea964
NC		 10457 }
10458 else
10459 {
10460 struct elf_aarch64_local_symbol *locals;
10461
cec5225b 10462 if (!elfNN_aarch64_allocate_local_symbols
a06ea964
NC		 10463 (abfd, symtab_hdr->sh_info))
10464 return FALSE;
10465
cec5225b 10466 locals = elf_aarch64_locals (abfd);
a06ea964
NC		 10467 BFD_ASSERT (r_symndx < symtab_hdr->sh_info);
10468 locals[r_symndx].got_refcount += 1;
10469 old_got_type = locals[r_symndx].got_type;
10470 }
10471
10472 /* If a variable is accessed with both general dynamic TLS
10473 methods, two slots may be created. */
10474 if (GOT_TLS_GD_ANY_P (old_got_type) && GOT_TLS_GD_ANY_P (got_type))
10475 got_type |= old_got_type;
10476
10477 /* We will already have issued an error message if there
10478 is a TLS/non-TLS mismatch, based on the symbol type.
10479 So just combine any TLS types needed. */
60d18fc3
MM		 10480 if (old_got_type != GOT_UNKNOWN && old_got_type != GOT_NORMAL &&
10481 got_type != GOT_NORMAL)
a06ea964
NC		 10482 got_type |= old_got_type;
10483
10484 /* If the symbol is accessed by both IE and GD methods, we
10485 are able to relax. Turn off the GD flag, without
10486 messing up with any other kind of TLS types that may be
10487 involved. */
10488 if ((got_type & GOT_TLS_IE) && GOT_TLS_GD_ANY_P (got_type))
10489 got_type &= ~ (GOT_TLSDESC_GD | GOT_TLS_GD);
10490
4ca9b406 10491 if (old_got_type != got_type)
a06ea964
NC		 10492 {
10493 if (h != NULL)
cec5225b 10494 elf_aarch64_hash_entry (h)->got_type = got_type;
a06ea964
NC		 10495 else
10496 {
10497 struct elf_aarch64_local_symbol *locals;
cec5225b 10498 locals = elf_aarch64_locals (abfd);
a06ea964
NC		 10499 BFD_ASSERT (r_symndx < symtab_hdr->sh_info);
10500 locals[r_symndx].got_type = got_type;
10501 }
10502 }
10503
cc0efaa8
MS		 10504 if (htab->root.dynobj == NULL)
10505 htab->root.dynobj = abfd;
10506 if (! aarch64_elf_create_got_section (htab->root.dynobj, info))
10507 return FALSE;
a06ea964
NC		 10508 break;
10509 }
10510
e19e9199
SP		 10511 case BFD_RELOC_MORELLO_CALL26:
10512 case BFD_RELOC_MORELLO_JUMP26:
10513 htab->c64_rel = 1;
e19e9199 10514 /* Fall through. */
a6bb11b2
YZ		 10515 case BFD_RELOC_AARCH64_CALL26:
10516 case BFD_RELOC_AARCH64_JUMP26:
a06ea964 10517 if (h == NULL)
f0070c1e
SP		 10518 {
10519 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, abfd,
10520 r_symndx);
10521 if (isym == NULL)
10522 return FALSE;
10523
10524 asection *s = bfd_section_from_elf_index (abfd, isym->st_shndx);
10525
10526 if (s == NULL)
10527 s = sec;
10528
10529 if (c64_value_p (s, isym->st_value))
10530 isym->st_target_internal |= ST_BRANCH_TO_C64;
10531
10532 /* If this is a local symbol then we resolve it
10533 directly without creating a PLT entry. */
10534 continue;
10535 }
10536
10537 if (h->root.type == bfd_link_hash_defined
10538 || h->root.type == bfd_link_hash_defweak)
10539 {
10540 asection *sym_sec = h->root.u.def.section;
10541 bfd_vma sym_value = h->root.u.def.value;
10542
10543 if (sym_sec != NULL && c64_value_p (sym_sec, sym_value))
10544 h->target_internal |= ST_BRANCH_TO_C64;
10545 }
a06ea964
NC		 10546
10547 h->needs_plt = 1;
1419bbe5
WN		 10548 if (h->plt.refcount <= 0)
10549 h->plt.refcount = 1;
10550 else
10551 h->plt.refcount += 1;
a06ea964 10552 break;
a6bb11b2 10553
40bbb79e 10554 case BFD_RELOC_MORELLO_CAPINIT:
ece841e8 10555 if (!c64_needs_relocation (info, h))
c0a10a86
MM		 10556 /* If this symbol does not need a relocation, then there's no
10557 reason to increase the srelcaps size for a relocation. */
10558 break;
36b60023
MM		 10559 /* Always create srelcaps, even if there's the possibility that this
10560 relocation will not end up in srelcaps (i.e. in the special case
10561 that our CAPINIT relocation will end up as an IRELATIVE relocation
10562 in .rela.iplt for static PDE). If we don't actually put anything
10563 into this section it will be empty and won't appear in the output
10564 (similar to how we use `_bfd_elf_create_ifunc_sections` above).
10565 */
40bbb79e
SP		 10566 if (htab->srelcaps == NULL)
10567 {
10568 if (htab->root.dynobj == NULL)
10569 htab->root.dynobj = abfd;
10570
10571 sreloc = _bfd_elf_make_dynamic_reloc_section
10572 (sec, htab->root.dynobj, LOG_FILE_ALIGN,
10573 abfd, /*rela? */ TRUE);
10574
10575 if (sreloc == NULL)
10576 return FALSE;
10577
10578 htab->srelcaps = sreloc;
10579 }
36b60023
MM		 10580
10581 /* Mark any IFUNC symbol as requiring a PLT.
10582 We do not want to use dyn_relocs since generic code ignores this
10583 when not linking PIC but we need the dynamic relocation for
10584 capabilities.
10585 We would not benefit from using dyn_relocs since a CAPINIT
10586 relocation will never be reduced to a hand-coded value and hence
10587 can't be garbage collected (even if it may turn from a CAPINIT to
10588 an IRELATIVE).
10589 However, without dyn_relocs or a greater than zero plt.refcount,
10590 _bfd_elf_allocate_ifunc_dyn_relocs would garbage collect the PLT
10591 entry for this symbol believing that it is not used. */
10592 if (h && h->type == STT_GNU_IFUNC)
10593 {
10594 h->needs_plt = 1;
10595 h->plt.refcount = h->plt.refcount < 0
10596 ? 1 : h->plt.refcount + 1;
10597 /* The only time that a CAPINIT relocation should not trigger
10598 some dynamic relocation in the srelcaps section of the output
10599 binary is when the relocation is against an STT_GNU_IFUNC in
10600 a static PDE. In this case we need to emit the relocations in
10601 the .rela.iplt section. */
10602 if (static_pde (info))
10603 {
10604 /* As yet we do not know whether this symbol needs pointer
10605 equality or not. This means that we don't know which
10606 symbols (either __rela_dyn_{start,end} or
10607 __rela_iplt_{start,end}) we need to put this relocation
10608 between.
10609
10610 This problem does not exist outside of a static_pde since
10611 there the runtime reads all relocs rather than relying on
10612 symbols to point to where relocations are. */
10613 BFD_ASSERT (c64_record_ifunc_capinit (htab, h));
10614 break;
10615 }
10616 else if (bfd_link_pic (info))
10617 {
10618 htab->root.irelifunc->size += RELOC_SIZE (htab);
10619 break;
10620 }
10621 /* Otherwise put into the srelcaps section. */
10622 }
40bbb79e
SP		 10623 htab->srelcaps->size += RELOC_SIZE (htab);
10624
10625 break;
10626
a6bb11b2
YZ		 10627 default:
10628 break;
a06ea964
NC		 10629 }
10630 }
a6bb11b2 10631
a06ea964
NC		 10632 return TRUE;
10633}
10634
10635/* Treat mapping symbols as special target symbols. */
10636
10637static bfd_boolean
cec5225b 10638elfNN_aarch64_is_target_special_symbol (bfd *abfd ATTRIBUTE_UNUSED,
a06ea964
NC		 10639 asymbol *sym)
10640{
10641 return bfd_is_aarch64_special_symbol_name (sym->name,
10642 BFD_AARCH64_SPECIAL_SYM_TYPE_ANY);
10643}
10644
e7679060
AM		 10645/* If the ELF symbol SYM might be a function in SEC, return the
10646 function size and set *CODE_OFF to the function's entry point,
10647 otherwise return zero. */
a06ea964 10648
e7679060
AM		 10649static bfd_size_type
10650elfNN_aarch64_maybe_function_sym (const asymbol *sym, asection *sec,
10651 bfd_vma *code_off)
10652{
10653 bfd_size_type size;
a06ea964 10654
e7679060
AM		 10655 if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
10656 | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0
10657 || sym->section != sec)
10658 return 0;
a06ea964 10659
e7679060
AM		 10660 if (!(sym->flags & BSF_SYNTHETIC))
10661 switch (ELF_ST_TYPE (((elf_symbol_type *) sym)->internal_elf_sym.st_info))
10662 {
a06ea964
NC		 10663 case STT_FUNC:
10664 case STT_NOTYPE:
a06ea964 10665 break;
e7679060
AM		 10666 default:
10667 return 0;
10668 }
a06ea964 10669
e7679060
AM		 10670 if ((sym->flags & BSF_LOCAL)
10671 && bfd_is_aarch64_special_symbol_name (sym->name,
10672 BFD_AARCH64_SPECIAL_SYM_TYPE_ANY))
10673 return 0;
a06ea964 10674
e7679060
AM		 10675 *code_off = sym->value;
10676 size = 0;
10677 if (!(sym->flags & BSF_SYNTHETIC))
10678 size = ((elf_symbol_type *) sym)->internal_elf_sym.st_size;
10679 if (size == 0)
10680 size = 1;
10681 return size;
a06ea964
NC		 10682}
10683
10684static bfd_boolean
cec5225b 10685elfNN_aarch64_find_inliner_info (bfd *abfd,
a06ea964
NC		 10686 const char **filename_ptr,
10687 const char **functionname_ptr,
10688 unsigned int *line_ptr)
10689{
10690 bfd_boolean found;
10691 found = _bfd_dwarf2_find_inliner_info
10692 (abfd, filename_ptr,
10693 functionname_ptr, line_ptr, &elf_tdata (abfd)->dwarf2_find_line_info);
10694 return found;
10695}
10696
10697
ed7e9d0b
AM		 10698static bfd_boolean
10699elfNN_aarch64_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
a06ea964
NC		 10700{
10701 Elf_Internal_Ehdr *i_ehdrp; /* ELF file header, internal form. */
10702
ed7e9d0b
AM		 10703 if (!_bfd_elf_init_file_header (abfd, link_info))
10704 return FALSE;
10705
a06ea964 10706 i_ehdrp = elf_elfheader (abfd);
a06ea964 10707 i_ehdrp->e_ident[EI_ABIVERSION] = AARCH64_ELF_ABI_VERSION;
ed7e9d0b 10708 return TRUE;
a06ea964
NC		 10709}
10710
10711static enum elf_reloc_type_class
cec5225b 10712elfNN_aarch64_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
7e612e98
AM		 10713 const asection *rel_sec ATTRIBUTE_UNUSED,
10714 const Elf_Internal_Rela *rela)
a06ea964 10715{
f2e6a843
SN		 10716 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
10717
10718 if (htab->root.dynsym != NULL
10719 && htab->root.dynsym->contents != NULL)
10720 {
10721 /* Check relocation against STT_GNU_IFUNC symbol if there are
10722 dynamic symbols. */
10723 bfd *abfd = info->output_bfd;
10724 const struct elf_backend_data *bed = get_elf_backend_data (abfd);
10725 unsigned long r_symndx = ELFNN_R_SYM (rela->r_info);
10726 if (r_symndx != STN_UNDEF)
10727 {
10728 Elf_Internal_Sym sym;
10729 if (!bed->s->swap_symbol_in (abfd,
10730 (htab->root.dynsym->contents
10731 + r_symndx * bed->s->sizeof_sym),
10732 0, &sym))
10733 {
10734 /* xgettext:c-format */
871b3ab2 10735 _bfd_error_handler (_("%pB symbol number %lu references"
f2e6a843
SN		 10736 " nonexistent SHT_SYMTAB_SHNDX section"),
10737 abfd, r_symndx);
10738 /* Ideally an error class should be returned here. */
10739 }
10740 else if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
10741 return reloc_class_ifunc;
10742 }
10743 }
10744
cec5225b 10745 switch ((int) ELFNN_R_TYPE (rela->r_info))
a06ea964 10746 {
f2e6a843 10747 case AARCH64_R (IRELATIVE):
e19e9199 10748 case MORELLO_R (IRELATIVE):
f2e6a843 10749 return reloc_class_ifunc;
a6bb11b2 10750 case AARCH64_R (RELATIVE):
e19e9199 10751 case MORELLO_R (RELATIVE):
a06ea964 10752 return reloc_class_relative;
a6bb11b2 10753 case AARCH64_R (JUMP_SLOT):
e19e9199 10754 case MORELLO_R (JUMP_SLOT):
a06ea964 10755 return reloc_class_plt;
a6bb11b2 10756 case AARCH64_R (COPY):
a06ea964
NC		 10757 return reloc_class_copy;
10758 default:
10759 return reloc_class_normal;
10760 }
10761}
10762
a06ea964
NC		 10763/* Handle an AArch64 specific section when reading an object file. This is
10764 called when bfd_section_from_shdr finds a section with an unknown
10765 type. */
10766
10767static bfd_boolean
cec5225b 10768elfNN_aarch64_section_from_shdr (bfd *abfd,
a06ea964
NC		 10769 Elf_Internal_Shdr *hdr,
10770 const char *name, int shindex)
10771{
10772 /* There ought to be a place to keep ELF backend specific flags, but
10773 at the moment there isn't one. We just keep track of the
10774 sections by their name, instead. Fortunately, the ABI gives
10775 names for all the AArch64 specific sections, so we will probably get
10776 away with this. */
10777 switch (hdr->sh_type)
10778 {
10779 case SHT_AARCH64_ATTRIBUTES:
10780 break;
10781
10782 default:
10783 return FALSE;
10784 }
10785
10786 if (!_bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
10787 return FALSE;
10788
10789 return TRUE;
10790}
10791
a06ea964
NC		 10792typedef struct
10793{
10794 void *finfo;
10795 struct bfd_link_info *info;
10796 asection *sec;
10797 int sec_shndx;
10798 int (*func) (void *, const char *, Elf_Internal_Sym *,
10799 asection *, struct elf_link_hash_entry *);
10800} output_arch_syminfo;
10801
10802enum map_symbol_type
10803{
10804 AARCH64_MAP_INSN,
e19e9199
SP		 10805 AARCH64_MAP_DATA,
10806 AARCH64_MAP_C64,
a06ea964
NC		 10807};
10808
10809
10810/* Output a single mapping symbol. */
10811
10812static bfd_boolean
cec5225b 10813elfNN_aarch64_output_map_sym (output_arch_syminfo *osi,
a06ea964
NC		 10814 enum map_symbol_type type, bfd_vma offset)
10815{
3979cf50 10816 static const char *names[3] = { "$x", "$d", "$c" };
a06ea964
NC		 10817 Elf_Internal_Sym sym;
10818
10819 sym.st_value = (osi->sec->output_section->vma
10820 + osi->sec->output_offset + offset);
10821 sym.st_size = 0;
10822 sym.st_other = 0;
10823 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
10824 sym.st_shndx = osi->sec_shndx;
8b21361b 10825 sym.st_target_internal = 0;
a06ea964
NC		 10826 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
10827}
10828
a06ea964
NC		 10829/* Output a single local symbol for a generated stub. */
10830
10831static bfd_boolean
cec5225b 10832elfNN_aarch64_output_stub_sym (output_arch_syminfo *osi, const char *name,
a06ea964
NC		 10833 bfd_vma offset, bfd_vma size)
10834{
10835 Elf_Internal_Sym sym;
10836
10837 sym.st_value = (osi->sec->output_section->vma
10838 + osi->sec->output_offset + offset);
10839 sym.st_size = size;
10840 sym.st_other = 0;
10841 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
10842 sym.st_shndx = osi->sec_shndx;
8b21361b 10843 sym.st_target_internal = 0;
a06ea964
NC		 10844 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
10845}
10846
10847static bfd_boolean
10848aarch64_map_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
10849{
cec5225b 10850 struct elf_aarch64_stub_hash_entry *stub_entry;
a06ea964
NC		 10851 asection *stub_sec;
10852 bfd_vma addr;
10853 char *stub_name;
10854 output_arch_syminfo *osi;
10855
10856 /* Massage our args to the form they really have. */
cec5225b 10857 stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
a06ea964
NC		 10858 osi = (output_arch_syminfo *) in_arg;
10859
10860 stub_sec = stub_entry->stub_sec;
10861
10862 /* Ensure this stub is attached to the current section being
10863 processed. */
10864 if (stub_sec != osi->sec)
10865 return TRUE;
10866
10867 addr = (bfd_vma) stub_entry->stub_offset;
10868
10869 stub_name = stub_entry->output_name;
10870
10871 switch (stub_entry->stub_type)
10872 {
10873 case aarch64_stub_adrp_branch:
cec5225b 10874 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
a06ea964
NC		 10875 sizeof (aarch64_adrp_branch_stub)))
10876 return FALSE;
cec5225b 10877 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
a06ea964
NC		 10878 return FALSE;
10879 break;
10880 case aarch64_stub_long_branch:
cec5225b 10881 if (!elfNN_aarch64_output_stub_sym
a06ea964
NC		 10882 (osi, stub_name, addr, sizeof (aarch64_long_branch_stub)))
10883 return FALSE;
cec5225b 10884 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
a06ea964 10885 return FALSE;
cec5225b 10886 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_DATA, addr + 16))
a06ea964
NC		 10887 return FALSE;
10888 break;
68fcca92
JW		 10889 case aarch64_stub_erratum_835769_veneer:
10890 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
10891 sizeof (aarch64_erratum_835769_stub)))
10892 return FALSE;
10893 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
10894 return FALSE;
10895 break;
4106101c
MS		 10896 case aarch64_stub_erratum_843419_veneer:
10897 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
10898 sizeof (aarch64_erratum_843419_stub)))
10899 return FALSE;
10900 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
10901 return FALSE;
10902 break;
50e192f0
SP		 10903 case aarch64_stub_branch_c64:
10904 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
10905 sizeof (aarch64_c64_branch_stub)))
10906 return FALSE;
10907 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_C64, addr))
10908 return FALSE;
10909 break;
10910 case c64_stub_branch_aarch64:
10911 case c64_stub_branch_c64:
10912 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
10913 sizeof (c64_aarch64_branch_stub)))
10914 return FALSE;
10915 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_C64, addr))
10916 return FALSE;
10917 break;
9fca35fc
TC		 10918 case aarch64_stub_none:
10919 break;
4106101c 10920
a06ea964 10921 default:
8e2fe09f 10922 abort ();
a06ea964
NC		 10923 }
10924
10925 return TRUE;
10926}
10927
10928/* Output mapping symbols for linker generated sections. */
10929
10930static bfd_boolean
cec5225b 10931elfNN_aarch64_output_arch_local_syms (bfd *output_bfd,
a06ea964
NC		 10932 struct bfd_link_info *info,
10933 void *finfo,
10934 int (*func) (void *, const char *,
10935 Elf_Internal_Sym *,
10936 asection *,
10937 struct elf_link_hash_entry
10938 *))
10939{
10940 output_arch_syminfo osi;
cec5225b 10941 struct elf_aarch64_link_hash_table *htab;
a06ea964 10942
cec5225b 10943 htab = elf_aarch64_hash_table (info);
a06ea964
NC		 10944
10945 osi.finfo = finfo;
10946 osi.info = info;
10947 osi.func = func;
10948
10949 /* Long calls stubs. */
10950 if (htab->stub_bfd && htab->stub_bfd->sections)
10951 {
10952 asection *stub_sec;
10953
10954 for (stub_sec = htab->stub_bfd->sections;
10955 stub_sec != NULL; stub_sec = stub_sec->next)
10956 {
10957 /* Ignore non-stub sections. */
10958 if (!strstr (stub_sec->name, STUB_SUFFIX))
10959 continue;
10960
10961 osi.sec = stub_sec;
10962
10963 osi.sec_shndx = _bfd_elf_section_from_bfd_section
10964 (output_bfd, osi.sec->output_section);
10965
61865519
MS		 10966 /* The first instruction in a stub is always a branch. */
10967 if (!elfNN_aarch64_output_map_sym (&osi, AARCH64_MAP_INSN, 0))
10968 return FALSE;
10969
a06ea964
NC		 10970 bfd_hash_traverse (&htab->stub_hash_table, aarch64_map_one_stub,
10971 &osi);
10972 }
10973 }
10974
10975 /* Finally, output mapping symbols for the PLT. */
36b60023
MM		 10976 if ((!htab->root.splt || htab->root.splt->size == 0)
10977 && (!htab->root.iplt || htab->root.iplt->size == 0))
a06ea964
NC		 10978 return TRUE;
10979
36b60023
MM		 10980 if (htab->root.splt && htab->root.splt->size != 0)
10981 {
10982 osi.sec_shndx = _bfd_elf_section_from_bfd_section
10983 (output_bfd, htab->root.splt->output_section);
10984 osi.sec = htab->root.splt;
10985 }
10986 else
10987 {
10988 osi.sec_shndx = _bfd_elf_section_from_bfd_section
10989 (output_bfd, htab->root.iplt->output_section);
10990 osi.sec = htab->root.iplt;
10991 }
a06ea964 10992
e19e9199
SP		 10993 elfNN_aarch64_output_map_sym (&osi, (htab->c64_rel ? AARCH64_MAP_C64
10994 : AARCH64_MAP_INSN), 0);
a06ea964
NC		 10995
10996 return TRUE;
10997
10998}
10999
11000/* Allocate target specific section data. */
11001
11002static bfd_boolean
cec5225b 11003elfNN_aarch64_new_section_hook (bfd *abfd, asection *sec)
a06ea964
NC		 11004{
11005 if (!sec->used_by_bfd)
11006 {
11007 _aarch64_elf_section_data *sdata;
986f0783 11008 size_t amt = sizeof (*sdata);
a06ea964
NC		 11009
11010 sdata = bfd_zalloc (abfd, amt);
11011 if (sdata == NULL)
11012 return FALSE;
f0070c1e 11013 sdata->elf.is_target_section_data = TRUE;
a06ea964
NC		 11014 sec->used_by_bfd = sdata;
11015 }
11016
a06ea964
NC		 11017 return _bfd_elf_new_section_hook (abfd, sec);
11018}
11019
11020
a06ea964
NC		 11021/* Create dynamic sections. This is different from the ARM backend in that
11022 the got, plt, gotplt and their relocation sections are all created in the
11023 standard part of the bfd elf backend. */
11024
11025static bfd_boolean
cec5225b 11026elfNN_aarch64_create_dynamic_sections (bfd *dynobj,
a06ea964
NC		 11027 struct bfd_link_info *info)
11028{
cc0efaa8
MS		 11029 /* We need to create .got section. */
11030 if (!aarch64_elf_create_got_section (dynobj, info))
11031 return FALSE;
a06ea964 11032
9d19e4fd 11033 return _bfd_elf_create_dynamic_sections (dynobj, info);
a06ea964
NC		 11034}
11035
11036
11037/* Allocate space in .plt, .got and associated reloc sections for
11038 dynamic relocs. */
11039
11040static bfd_boolean
cec5225b 11041elfNN_aarch64_allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
a06ea964
NC		 11042{
11043 struct bfd_link_info *info;
cec5225b
YZ		 11044 struct elf_aarch64_link_hash_table *htab;
11045 struct elf_aarch64_link_hash_entry *eh;
a06ea964
NC		 11046 struct elf_dyn_relocs *p;
11047
11048 /* An example of a bfd_link_hash_indirect symbol is versioned
11049 symbol. For example: __gxx_personality_v0(bfd_link_hash_indirect)
11050 -> __gxx_personality_v0(bfd_link_hash_defined)
11051
11052 There is no need to process bfd_link_hash_indirect symbols here
11053 because we will also be presented with the concrete instance of
cec5225b 11054 the symbol and elfNN_aarch64_copy_indirect_symbol () will have been
a06ea964 11055 called to copy all relevant data from the generic to the concrete
2d0ca824 11056 symbol instance. */
a06ea964
NC		 11057 if (h->root.type == bfd_link_hash_indirect)
11058 return TRUE;
11059
11060 if (h->root.type == bfd_link_hash_warning)
11061 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11062
11063 info = (struct bfd_link_info *) inf;
cec5225b 11064 htab = elf_aarch64_hash_table (info);
a06ea964 11065
1419bbe5
WN		 11066 /* Since STT_GNU_IFUNC symbol must go through PLT, we handle it
11067 here if it is defined and referenced in a non-shared object. */
11068 if (h->type == STT_GNU_IFUNC
11069 && h->def_regular)
11070 return TRUE;
11071 else if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
a06ea964
NC		 11072 {
11073 /* Make sure this symbol is output as a dynamic symbol.
07d6d2b8 11074 Undefined weak syms won't yet be marked as dynamic. */
ff07562f
JW		 11075 if (h->dynindx == -1 && !h->forced_local
11076 && h->root.type == bfd_link_hash_undefweak)
a06ea964
NC		 11077 {
11078 if (!bfd_elf_link_record_dynamic_symbol (info, h))
11079 return FALSE;
11080 }
11081
0e1862bb 11082 if (bfd_link_pic (info) || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
a06ea964
NC		 11083 {
11084 asection *s = htab->root.splt;
11085
11086 /* If this is the first .plt entry, make room for the special
11087 first entry. */
11088 if (s->size == 0)
11089 s->size += htab->plt_header_size;
11090
11091 h->plt.offset = s->size;
11092
11093 /* If this symbol is not defined in a regular file, and we are
11094 not generating a shared library, then set the symbol to this
11095 location in the .plt. This is required to make function
11096 pointers compare as equal between the normal executable and
11097 the shared library. */
0e1862bb 11098 if (!bfd_link_pic (info) && !h->def_regular)
a06ea964
NC		 11099 {
11100 h->root.u.def.section = s;
11101 h->root.u.def.value = h->plt.offset;
11102 }
11103
11104 /* Make room for this entry. For now we only create the
11105 small model PLT entries. We later need to find a way
11106 of relaxing into these from the large model PLT entries. */
37c18eed 11107 s->size += htab->plt_entry_size;
a06ea964
NC		 11108
11109 /* We also need to make an entry in the .got.plt section, which
11110 will be placed in the .got section by the linker script. */
a1bdea65 11111 htab->root.sgotplt->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC		 11112
11113 /* We also need to make an entry in the .rela.plt section. */
11114 htab->root.srelplt->size += RELOC_SIZE (htab);
11115
11116 /* We need to ensure that all GOT entries that serve the PLT
11117 are consecutive with the special GOT slots [0] [1] and
11118 [2]. Any addtional relocations, such as
11119 R_AARCH64_TLSDESC, must be placed after the PLT related
11120 entries. We abuse the reloc_count such that during
11121 sizing we adjust reloc_count to indicate the number of
11122 PLT related reserved entries. In subsequent phases when
11123 filling in the contents of the reloc entries, PLT related
11124 entries are placed by computing their PLT index (0
11125 .. reloc_count). While other none PLT relocs are placed
11126 at the slot indicated by reloc_count and reloc_count is
36b60023
MM		 11127 updated.
11128 For reference, a similar abuse of the reloc_count is done for the
11129 irelplt section for Morello CAPINIT relocations. */
a06ea964
NC		 11130
11131 htab->root.srelplt->reloc_count++;
823710d5
SN		 11132
11133 /* Mark the DSO in case R_<CLS>_JUMP_SLOT relocs against
11134 variant PCS symbols are present. */
11135 if (h->other & STO_AARCH64_VARIANT_PCS)
11136 htab->variant_pcs = 1;
11137
a06ea964
NC		 11138 }
11139 else
11140 {
11141 h->plt.offset = (bfd_vma) - 1;
11142 h->needs_plt = 0;
11143 }
11144 }
11145 else
11146 {
11147 h->plt.offset = (bfd_vma) - 1;
11148 h->needs_plt = 0;
11149 }
11150
cec5225b 11151 eh = (struct elf_aarch64_link_hash_entry *) h;
a06ea964
NC		 11152 eh->tlsdesc_got_jump_table_offset = (bfd_vma) - 1;
11153
11154 if (h->got.refcount > 0)
11155 {
11156 bfd_boolean dyn;
cec5225b 11157 unsigned got_type = elf_aarch64_hash_entry (h)->got_type;
a06ea964
NC		 11158
11159 h->got.offset = (bfd_vma) - 1;
11160
11161 dyn = htab->root.dynamic_sections_created;
11162
11163 /* Make sure this symbol is output as a dynamic symbol.
07d6d2b8 11164 Undefined weak syms won't yet be marked as dynamic. */
ff07562f
JW		 11165 if (dyn && h->dynindx == -1 && !h->forced_local
11166 && h->root.type == bfd_link_hash_undefweak)
a06ea964
NC		 11167 {
11168 if (!bfd_elf_link_record_dynamic_symbol (info, h))
11169 return FALSE;
11170 }
11171
11172 if (got_type == GOT_UNKNOWN)
11173 {
11174 }
60d18fc3 11175 else if (got_type == GOT_NORMAL)
a06ea964
NC		 11176 {
11177 h->got.offset = htab->root.sgot->size;
a1bdea65 11178 htab->root.sgot->size += GOT_ENTRY_SIZE (htab);
c0a10a86
MM		 11179
11180 if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11181 || h->root.type != bfd_link_hash_undefweak)
11182 && (bfd_link_pic (info)
11183 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h))
11184 /* Undefined weak symbol in static PIE resolves to 0 without
11185 any dynamic relocations. */
11186 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
11187 {
11188 htab->root.srelgot->size += RELOC_SIZE (htab);
11189 }
11190 else if (!htab->c64_rel || !c64_needs_relocation (info, h))
a06ea964 11191 {
c0a10a86
MM		 11192 /* Either not relocating for C64, and hence all problematic
11193 relocations are handled above, or this is an undefined weak
11194 symbol that we know will not be resolved to anything by the
11195 runtime do not need a relocation. */
11196 }
aeba84b1
MM		 11197 else if (!static_pde (info))
11198 /* Any capability relocations required in something other than a
11199 static PDE should go in the srelgot. N.b. many capability
11200 relocations would be caught by the first clause in this if
11201 chain. */
11202 htab->root.srelgot->size += RELOC_SIZE (htab);
11203 else
11204 /* We want capability relocations in a statically linked
11205 PDE to go in the srelcaps section. */
11206 htab->srelcaps->size += RELOC_SIZE (htab);
a06ea964
NC		 11207 }
11208 else
11209 {
11210 int indx;
11211 if (got_type & GOT_TLSDESC_GD)
11212 {
11213 eh->tlsdesc_got_jump_table_offset =
11214 (htab->root.sgotplt->size
11215 - aarch64_compute_jump_table_size (htab));
a1bdea65 11216 htab->root.sgotplt->size += GOT_ENTRY_SIZE (htab) * 2;
a06ea964
NC		 11217 h->got.offset = (bfd_vma) - 2;
11218 }
11219
11220 if (got_type & GOT_TLS_GD)
11221 {
11222 h->got.offset = htab->root.sgot->size;
a1bdea65 11223 htab->root.sgot->size += GOT_ENTRY_SIZE (htab) * 2;
a06ea964
NC		 11224 }
11225
11226 if (got_type & GOT_TLS_IE)
11227 {
11228 h->got.offset = htab->root.sgot->size;
a1bdea65 11229 htab->root.sgot->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC		 11230 }
11231
ece841e8
MM		 11232 /* We avoid TLS relocations on undefweak symbols since it is not
11233 well defined. Hence we should not be seeing got entries
11234 on any symbol which would not need a relocation in a C64 binary.
11235 */
11236 BFD_ASSERT (c64_needs_relocation (info, h));
a06ea964
NC		 11237 indx = h && h->dynindx != -1 ? h->dynindx : 0;
11238 if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11239 || h->root.type != bfd_link_hash_undefweak)
6dda7875 11240 && (!bfd_link_executable (info)
a06ea964 11241 || indx != 0
4ca9b406 11242 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)
60d18fc3 11243 || htab->c64_rel))
a06ea964
NC		 11244 {
11245 if (got_type & GOT_TLSDESC_GD)
11246 {
11247 htab->root.srelplt->size += RELOC_SIZE (htab);
11248 /* Note reloc_count not incremented here! We have
11249 already adjusted reloc_count for this relocation
11250 type. */
11251
11252 /* TLSDESC PLT is now needed, but not yet determined. */
9bcc30e4 11253 htab->root.tlsdesc_plt = (bfd_vma) - 1;
a06ea964
NC		 11254 }
11255
11256 if (got_type & GOT_TLS_GD)
11257 htab->root.srelgot->size += RELOC_SIZE (htab) * 2;
11258
11259 if (got_type & GOT_TLS_IE)
11260 htab->root.srelgot->size += RELOC_SIZE (htab);
11261 }
11262 }
11263 }
11264 else
11265 {
11266 h->got.offset = (bfd_vma) - 1;
11267 }
11268
190eb1dd 11269 if (h->dyn_relocs == NULL)
a06ea964
NC		 11270 return TRUE;
11271
11272 /* In the shared -Bsymbolic case, discard space allocated for
11273 dynamic pc-relative relocs against symbols which turn out to be
11274 defined in regular objects. For the normal shared case, discard
11275 space for pc-relative relocs that have become local due to symbol
11276 visibility changes. */
11277
0e1862bb 11278 if (bfd_link_pic (info))
a06ea964
NC		 11279 {
11280 /* Relocs that use pc_count are those that appear on a call
07d6d2b8
AM		 11281 insn, or certain REL relocs that can generated via assembly.
11282 We want calls to protected symbols to resolve directly to the
11283 function rather than going via the plt. If people want
11284 function pointer comparisons to work as expected then they
11285 should avoid writing weird assembly. */
a06ea964
NC		 11286 if (SYMBOL_CALLS_LOCAL (info, h))
11287 {
11288 struct elf_dyn_relocs **pp;
11289
190eb1dd 11290 for (pp = &h->dyn_relocs; (p = *pp) != NULL;)
a06ea964
NC		 11291 {
11292 p->count -= p->pc_count;
11293 p->pc_count = 0;
11294 if (p->count == 0)
11295 *pp = p->next;
11296 else
11297 pp = &p->next;
11298 }
11299 }
11300
11301 /* Also discard relocs on undefined weak syms with non-default
07d6d2b8 11302 visibility. */
190eb1dd 11303 if (h->dyn_relocs != NULL && h->root.type == bfd_link_hash_undefweak)
a06ea964 11304 {
ddb7fd0f
L		 11305 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11306 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
190eb1dd 11307 h->dyn_relocs = NULL;
a06ea964
NC		 11308
11309 /* Make sure undefined weak symbols are output as a dynamic
11310 symbol in PIEs. */
11311 else if (h->dynindx == -1
11312 && !h->forced_local
ff07562f 11313 && h->root.type == bfd_link_hash_undefweak
a06ea964
NC		 11314 && !bfd_elf_link_record_dynamic_symbol (info, h))
11315 return FALSE;
11316 }
11317
11318 }
11319 else if (ELIMINATE_COPY_RELOCS)
11320 {
11321 /* For the non-shared case, discard space for relocs against
07d6d2b8
AM		 11322 symbols which turn out to need copy relocs or are not
11323 dynamic. */
a06ea964
NC		 11324
11325 if (!h->non_got_ref
11326 && ((h->def_dynamic
11327 && !h->def_regular)
11328 || (htab->root.dynamic_sections_created
11329 && (h->root.type == bfd_link_hash_undefweak
11330 || h->root.type == bfd_link_hash_undefined))))
11331 {
11332 /* Make sure this symbol is output as a dynamic symbol.
11333 Undefined weak syms won't yet be marked as dynamic. */
11334 if (h->dynindx == -1
11335 && !h->forced_local
ff07562f 11336 && h->root.type == bfd_link_hash_undefweak
a06ea964
NC		 11337 && !bfd_elf_link_record_dynamic_symbol (info, h))
11338 return FALSE;
11339
11340 /* If that succeeded, we know we'll be keeping all the
11341 relocs. */
11342 if (h->dynindx != -1)
11343 goto keep;
11344 }
11345
190eb1dd 11346 h->dyn_relocs = NULL;
a06ea964
NC		 11347
11348 keep:;
11349 }
11350
11351 /* Finally, allocate space. */
190eb1dd 11352 for (p = h->dyn_relocs; p != NULL; p = p->next)
a06ea964
NC		 11353 {
11354 asection *sreloc;
11355
11356 sreloc = elf_section_data (p->sec)->sreloc;
11357
11358 BFD_ASSERT (sreloc != NULL);
11359
11360 sreloc->size += p->count * RELOC_SIZE (htab);
11361 }
11362
11363 return TRUE;
11364}
11365
1419bbe5
WN		 11366/* Allocate space in .plt, .got and associated reloc sections for
11367 ifunc dynamic relocs. */
11368
11369static bfd_boolean
11370elfNN_aarch64_allocate_ifunc_dynrelocs (struct elf_link_hash_entry *h,
11371 void *inf)
11372{
11373 struct bfd_link_info *info;
11374 struct elf_aarch64_link_hash_table *htab;
1419bbe5
WN		 11375
11376 /* An example of a bfd_link_hash_indirect symbol is versioned
11377 symbol. For example: __gxx_personality_v0(bfd_link_hash_indirect)
11378 -> __gxx_personality_v0(bfd_link_hash_defined)
11379
11380 There is no need to process bfd_link_hash_indirect symbols here
11381 because we will also be presented with the concrete instance of
11382 the symbol and elfNN_aarch64_copy_indirect_symbol () will have been
11383 called to copy all relevant data from the generic to the concrete
2d0ca824 11384 symbol instance. */
1419bbe5
WN		 11385 if (h->root.type == bfd_link_hash_indirect)
11386 return TRUE;
11387
11388 if (h->root.type == bfd_link_hash_warning)
11389 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11390
11391 info = (struct bfd_link_info *) inf;
11392 htab = elf_aarch64_hash_table (info);
11393
1419bbe5
WN		 11394 /* Since STT_GNU_IFUNC symbol must go through PLT, we handle it
11395 here if it is defined and referenced in a non-shared object. */
11396 if (h->type == STT_GNU_IFUNC
11397 && h->def_regular)
36b60023
MM		 11398 {
11399 bfd_boolean ret
11400 = _bfd_elf_allocate_ifunc_dyn_relocs (info, h, &h->dyn_relocs,
11401 htab->plt_entry_size,
11402 htab->plt_header_size,
11403 GOT_ENTRY_SIZE (htab), FALSE);
11404 if (htab->c64_rel
11405 && ret
11406 && h->got.offset != (bfd_vma)-1
11407 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)
11408 && !bfd_link_pic (info)
11409 && !bfd_link_relocatable (info))
11410 /* got.offset is not -1 which indicates we have an entry in the got.
11411 For non-capabilities we would manually populate the GOT with the
11412 known location of the PLT in finish_dynamic_symbol, since this is a
11413 non-PIC executable. For capabilities we need to emit a relocation
11414 to populate that entry. */
11415 {
11416 asection *reloc_sec = c64_ifunc_got_reloc_section (info, h);
11417 reloc_sec->size += RELOC_SIZE (htab);
11418 }
11419 return ret;
11420 }
1419bbe5
WN		 11421 return TRUE;
11422}
11423
1419bbe5
WN		 11424/* Allocate space in .plt, .got and associated reloc sections for
11425 local ifunc dynamic relocs. */
11426
11427static bfd_boolean
11428elfNN_aarch64_allocate_local_ifunc_dynrelocs (void **slot, void *inf)
11429{
11430 struct elf_link_hash_entry *h
11431 = (struct elf_link_hash_entry *) *slot;
11432
11433 if (h->type != STT_GNU_IFUNC
11434 || !h->def_regular
11435 || !h->ref_regular
11436 || !h->forced_local
11437 || h->root.type != bfd_link_hash_defined)
11438 abort ();
11439
11440 return elfNN_aarch64_allocate_ifunc_dynrelocs (h, inf);
11441}
a06ea964 11442
36b60023
MM		 11443/* Allocate space for CAPINIT relocations against IFUNC symbols in a static
11444 PDE. This case is special since the IRELATIVE relocations and RELATIVE
11445 relocations need to be placed in different sections, and the decision about
11446 whether we need to emit an IRELATIVE or RELATIVE relocation is dependent on
11447 whether there are *other* relocations. */
11448static bfd_boolean
11449c64_allocate_ifunc_capinit_static_relocs (void **slot, void *inf)
11450{
11451 struct elf_link_hash_entry *h;
11452 struct elf_c64_ifunc_capinit_record *rec
11453 = (struct elf_c64_ifunc_capinit_record *) *slot;
11454 h = rec->h;
11455
11456 if (h->type != STT_GNU_IFUNC
11457 || !h->def_regular
11458 || !h->ref_regular
11459 || h->root.type != bfd_link_hash_defined)
11460 abort ();
11461
11462 struct bfd_link_info *info = (struct bfd_link_info *) inf;
11463 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
11464 if (c64_ifunc_reloc_static_irelative (info, h))
11465 htab->root.irelplt->size += rec->count * RELOC_SIZE (htab);
11466 else
11467 htab->srelcaps->size += rec->count * RELOC_SIZE (htab);
11468 return TRUE;
11469}
11470
a06ea964
NC		 11471/* This is the most important function of all . Innocuosly named
11472 though ! */
2d0ca824 11473
a06ea964 11474static bfd_boolean
a1bdea65 11475elfNN_aarch64_size_dynamic_sections (bfd *output_bfd,
a06ea964
NC		 11476 struct bfd_link_info *info)
11477{
cec5225b 11478 struct elf_aarch64_link_hash_table *htab;
a06ea964
NC		 11479 bfd *dynobj;
11480 asection *s;
11481 bfd_boolean relocs;
11482 bfd *ibfd;
11483
cec5225b 11484 htab = elf_aarch64_hash_table ((info));
a06ea964
NC		 11485 dynobj = htab->root.dynobj;
11486
11487 BFD_ASSERT (dynobj != NULL);
11488
11489 if (htab->root.dynamic_sections_created)
11490 {
9b8b325a 11491 if (bfd_link_executable (info) && !info->nointerp)
a06ea964
NC		 11492 {
11493 s = bfd_get_linker_section (dynobj, ".interp");
11494 if (s == NULL)
11495 abort ();
11496 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
11497 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
11498 }
11499 }
11500
a1bdea65
SP		 11501 aarch64_elf_init_got_section (output_bfd, info);
11502
e19e9199
SP		 11503 setup_plt_values (info, elf_aarch64_tdata (output_bfd)->plt_type);
11504
a06ea964
NC		 11505 /* Set up .got offsets for local syms, and space for local dynamic
11506 relocs. */
c72f2fb2 11507 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
a06ea964
NC		 11508 {
11509 struct elf_aarch64_local_symbol *locals = NULL;
11510 Elf_Internal_Shdr *symtab_hdr;
11511 asection *srel;
11512 unsigned int i;
11513
11514 if (!is_aarch64_elf (ibfd))
11515 continue;
11516
11517 for (s = ibfd->sections; s != NULL; s = s->next)
11518 {
11519 struct elf_dyn_relocs *p;
11520
11521 for (p = (struct elf_dyn_relocs *)
11522 (elf_section_data (s)->local_dynrel); p != NULL; p = p->next)
11523 {
11524 if (!bfd_is_abs_section (p->sec)
11525 && bfd_is_abs_section (p->sec->output_section))
11526 {
11527 /* Input section has been discarded, either because
11528 it is a copy of a linkonce section or due to
11529 linker script /DISCARD/, so we'll be discarding
11530 the relocs too. */
11531 }
11532 else if (p->count != 0)
11533 {
11534 srel = elf_section_data (p->sec)->sreloc;
11535 srel->size += p->count * RELOC_SIZE (htab);
11536 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
11537 info->flags |= DF_TEXTREL;
11538 }
11539 }
11540 }
11541
cec5225b 11542 locals = elf_aarch64_locals (ibfd);
a06ea964
NC		 11543 if (!locals)
11544 continue;
11545
11546 symtab_hdr = &elf_symtab_hdr (ibfd);
11547 srel = htab->root.srelgot;
11548 for (i = 0; i < symtab_hdr->sh_info; i++)
11549 {
11550 locals[i].got_offset = (bfd_vma) - 1;
11551 locals[i].tlsdesc_got_jump_table_offset = (bfd_vma) - 1;
11552 if (locals[i].got_refcount > 0)
11553 {
11554 unsigned got_type = locals[i].got_type;
11555 if (got_type & GOT_TLSDESC_GD)
11556 {
11557 locals[i].tlsdesc_got_jump_table_offset =
11558 (htab->root.sgotplt->size
11559 - aarch64_compute_jump_table_size (htab));
a1bdea65 11560 htab->root.sgotplt->size += GOT_ENTRY_SIZE (htab) * 2;
a06ea964
NC		 11561 locals[i].got_offset = (bfd_vma) - 2;
11562 }
11563
11564 if (got_type & GOT_TLS_GD)
11565 {
11566 locals[i].got_offset = htab->root.sgot->size;
a1bdea65 11567 htab->root.sgot->size += GOT_ENTRY_SIZE (htab) * 2;
a06ea964
NC		 11568 }
11569
b53b1bed 11570 if (got_type & GOT_TLS_IE
60d18fc3 11571 || got_type & GOT_NORMAL)
a06ea964
NC		 11572 {
11573 locals[i].got_offset = htab->root.sgot->size;
a1bdea65 11574 htab->root.sgot->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC		 11575 }
11576
11577 if (got_type == GOT_UNKNOWN)
11578 {
11579 }
11580
0e1862bb 11581 if (bfd_link_pic (info))
a06ea964
NC		 11582 {
11583 if (got_type & GOT_TLSDESC_GD)
11584 {
11585 htab->root.srelplt->size += RELOC_SIZE (htab);
11586 /* Note RELOC_COUNT not incremented here! */
9bcc30e4 11587 htab->root.tlsdesc_plt = (bfd_vma) - 1;
a06ea964
NC		 11588 }
11589
11590 if (got_type & GOT_TLS_GD)
11591 htab->root.srelgot->size += RELOC_SIZE (htab) * 2;
11592
b53b1bed 11593 if (got_type & GOT_TLS_IE
60d18fc3 11594 || got_type & GOT_NORMAL)
a06ea964
NC		 11595 htab->root.srelgot->size += RELOC_SIZE (htab);
11596 }
aeba84b1
MM		 11597 /* Static non-PIE; put relocs into srelcaps. */
11598 else if (static_pde (info) && htab->c64_rel)
8d4edc5f 11599 htab->srelcaps->size += RELOC_SIZE (htab);
d9f4f6fc 11600 /* Else capability relocation needs to go into srelgot. */
60d18fc3 11601 else if (htab->c64_rel)
d9f4f6fc 11602 htab->root.srelgot->size += RELOC_SIZE (htab);
a06ea964
NC		 11603 }
11604 else
11605 {
11606 locals[i].got_refcount = (bfd_vma) - 1;
11607 }
11608 }
11609 }
11610
11611
11612 /* Allocate global sym .plt and .got entries, and space for global
11613 sym dynamic relocs. */
cec5225b 11614 elf_link_hash_traverse (&htab->root, elfNN_aarch64_allocate_dynrelocs,
a06ea964
NC		 11615 info);
11616
1419bbe5
WN		 11617 /* Allocate global ifunc sym .plt and .got entries, and space for global
11618 ifunc sym dynamic relocs. */
11619 elf_link_hash_traverse (&htab->root, elfNN_aarch64_allocate_ifunc_dynrelocs,
11620 info);
11621
1419bbe5
WN		 11622 /* Allocate .plt and .got entries, and space for local ifunc symbols. */
11623 htab_traverse (htab->loc_hash_table,
11624 elfNN_aarch64_allocate_local_ifunc_dynrelocs,
11625 info);
a06ea964 11626
36b60023
MM		 11627 if (static_pde (info))
11628 {
11629 htab_traverse (htab->c64_ifunc_capinit_hash_table,
11630 c64_allocate_ifunc_capinit_static_relocs,
11631 info);
11632 htab_empty (htab->c64_ifunc_capinit_hash_table);
11633 }
11634
aeba84b1 11635 if (static_pde (info)
d6cf562a
MM		 11636 && htab->srelcaps
11637 && htab->srelcaps->size > 0)
11638 {
11639 struct elf_link_hash_entry *h;
11640
11641 h = _bfd_elf_define_linkage_sym (output_bfd, info,
11642 htab->srelcaps,
11643 "__rela_dyn_start");
11644 h = _bfd_elf_define_linkage_sym (output_bfd, info,
11645 htab->srelcaps,
11646 "__rela_dyn_end");
11647
11648 h->root.u.def.value = htab->srelcaps->vma + htab->srelcaps->size;
11649 }
11650
a06ea964
NC		 11651 /* For every jump slot reserved in the sgotplt, reloc_count is
11652 incremented. However, when we reserve space for TLS descriptors,
11653 it's not incremented, so in order to compute the space reserved
11654 for them, it suffices to multiply the reloc count by the jump
11655 slot size. */
11656
11657 if (htab->root.srelplt)
8847944f 11658 htab->sgotplt_jump_table_size = aarch64_compute_jump_table_size (htab);
a06ea964 11659
9bcc30e4 11660 if (htab->root.tlsdesc_plt)
a06ea964
NC		 11661 {
11662 if (htab->root.splt->size == 0)
37c18eed 11663 htab->root.splt->size += htab->plt_header_size;
a06ea964 11664
a06ea964 11665 /* If we're not using lazy TLS relocations, don't generate the
ce12121b 11666 GOT and PLT entry required. */
9bcc30e4
L		 11667 if ((info->flags & DF_BIND_NOW))
11668 htab->root.tlsdesc_plt = 0;
11669 else
a06ea964 11670 {
9bcc30e4 11671 htab->root.tlsdesc_plt = htab->root.splt->size;
ce12121b
TC		 11672 htab->root.splt->size += htab->tlsdesc_plt_entry_size;
11673
9bcc30e4 11674 htab->root.tlsdesc_got = htab->root.sgot->size;
a1bdea65 11675 htab->root.sgot->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC		 11676 }
11677 }
11678
68fcca92 11679 /* Init mapping symbols information to use later to distingush between
4106101c
MS		 11680 code and data while scanning for errata. */
11681 if (htab->fix_erratum_835769 || htab->fix_erratum_843419)
68fcca92
JW		 11682 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
11683 {
11684 if (!is_aarch64_elf (ibfd))
11685 continue;
7ff36d1a 11686 bfd_elfNN_aarch64_init_maps (ibfd, info);
68fcca92
JW		 11687 }
11688
a06ea964
NC		 11689 /* We now have determined the sizes of the various dynamic sections.
11690 Allocate memory for them. */
11691 relocs = FALSE;
11692 for (s = dynobj->sections; s != NULL; s = s->next)
11693 {
11694 if ((s->flags & SEC_LINKER_CREATED) == 0)
11695 continue;
11696
11697 if (s == htab->root.splt
11698 || s == htab->root.sgot
11699 || s == htab->root.sgotplt
11700 || s == htab->root.iplt
9d19e4fd 11701 || s == htab->root.igotplt
5474d94f 11702 || s == htab->root.sdynbss
ece841e8
MM		 11703 || s == htab->root.sdynrelro
11704 || s == htab->sc64_tls_stubs)
a06ea964
NC		 11705 {
11706 /* Strip this section if we don't need it; see the
11707 comment below. */
11708 }
fd361982 11709 else if (CONST_STRNEQ (bfd_section_name (s), ".rela"))
a06ea964
NC		 11710 {
11711 if (s->size != 0 && s != htab->root.srelplt)
11712 relocs = TRUE;
11713
11714 /* We use the reloc_count field as a counter if we need
11715 to copy relocs into the output file. */
36b60023
MM		 11716 if (s != htab->root.srelplt
11717 && s != htab->root.irelplt)
a06ea964
NC		 11718 s->reloc_count = 0;
11719 }
11720 else
11721 {
11722 /* It's not one of our sections, so don't allocate space. */
11723 continue;
11724 }
11725
11726 if (s->size == 0)
11727 {
11728 /* If we don't need this section, strip it from the
11729 output file. This is mostly to handle .rela.bss and
11730 .rela.plt. We must create both sections in
11731 create_dynamic_sections, because they must be created
11732 before the linker maps input sections to output
11733 sections. The linker does that before
11734 adjust_dynamic_symbol is called, and it is that
11735 function which decides whether anything needs to go
11736 into these sections. */
a06ea964
NC		 11737 s->flags |= SEC_EXCLUDE;
11738 continue;
11739 }
11740
11741 if ((s->flags & SEC_HAS_CONTENTS) == 0)
11742 continue;
11743
11744 /* Allocate memory for the section contents. We use bfd_zalloc
07d6d2b8
AM		 11745 here in case unused entries are not reclaimed before the
11746 section's contents are written out. This should not happen,
11747 but this way if it does, we get a R_AARCH64_NONE reloc instead
11748 of garbage. */
a06ea964
NC		 11749 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
11750 if (s->contents == NULL)
11751 return FALSE;
11752 }
11753
11754 if (htab->root.dynamic_sections_created)
11755 {
11756 /* Add some entries to the .dynamic section. We fill in the
07d6d2b8
AM		 11757 values later, in elfNN_aarch64_finish_dynamic_sections, but we
11758 must add the entries now so that we get the correct size for
11759 the .dynamic section. The DT_DEBUG entry is filled in by the
11760 dynamic linker and used by the debugger. */
a06ea964
NC		 11761#define add_dynamic_entry(TAG, VAL) \
11762 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
11763
3084d7a2
L		 11764 if (!_bfd_elf_add_dynamic_tags (output_bfd, info, relocs))
11765 return FALSE;
a06ea964
NC		 11766
11767 if (htab->root.splt->size != 0)
11768 {
823710d5
SN		 11769 if (htab->variant_pcs
11770 && !add_dynamic_entry (DT_AARCH64_VARIANT_PCS, 0))
11771 return FALSE;
11772
1dbade74
SD		 11773 if ((elf_aarch64_tdata (output_bfd)->plt_type == PLT_BTI_PAC)
11774 && (!add_dynamic_entry (DT_AARCH64_BTI_PLT, 0)
11775 || !add_dynamic_entry (DT_AARCH64_PAC_PLT, 0)))
11776 return FALSE;
11777
11778 else if ((elf_aarch64_tdata (output_bfd)->plt_type == PLT_BTI)
11779 && !add_dynamic_entry (DT_AARCH64_BTI_PLT, 0))
11780 return FALSE;
11781
11782 else if ((elf_aarch64_tdata (output_bfd)->plt_type == PLT_PAC)
11783 && !add_dynamic_entry (DT_AARCH64_PAC_PLT, 0))
37c18eed 11784 return FALSE;
a06ea964 11785 }
a06ea964
NC		 11786 }
11787#undef add_dynamic_entry
11788
11789 return TRUE;
a06ea964
NC		 11790}
11791
11792static inline void
caed7120
YZ		 11793elf_aarch64_update_plt_entry (bfd *output_bfd,
11794 bfd_reloc_code_real_type r_type,
11795 bfd_byte *plt_entry, bfd_vma value)
a06ea964 11796{
caed7120
YZ		 11797 reloc_howto_type *howto = elfNN_aarch64_howto_from_bfd_reloc (r_type);
11798
1d75a8e2
NC		 11799 /* FIXME: We should check the return value from this function call. */
11800 (void) _bfd_aarch64_elf_put_addend (output_bfd, plt_entry, r_type, howto, value);
a06ea964
NC		 11801}
11802
e19e9199
SP		 11803static void
11804aarch64_update_c64_plt_entry (bfd *output_bfd, bfd_byte *plt_entry,
11805 bfd_vma plt_base, bfd_vma plt_got_ent)
11806{
11807 /* Fill in the top 20 bits for this: ADRP c16, PLT_GOT + n * 16.
11808 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0xfffff */
11809 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_MORELLO_ADR_HI20_PCREL,
11810 plt_entry,
11811 PG (plt_got_ent) - PG (plt_base));
11812
11813 elf_aarch64_update_plt_entry (output_bfd,
11814 BFD_RELOC_AARCH64_LDST128_LO12,
11815 plt_entry + 4,
11816 PG_OFFSET (plt_got_ent));
11817
11818 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADD_LO12,
11819 plt_entry + 8,
11820 PG_OFFSET (plt_got_ent));
11821}
11822
a06ea964 11823static void
cec5225b
YZ		 11824elfNN_aarch64_create_small_pltn_entry (struct elf_link_hash_entry *h,
11825 struct elf_aarch64_link_hash_table
1419bbe5
WN		 11826 *htab, bfd *output_bfd,
11827 struct bfd_link_info *info)
a06ea964
NC		 11828{
11829 bfd_byte *plt_entry;
11830 bfd_vma plt_index;
11831 bfd_vma got_offset;
11832 bfd_vma gotplt_entry_address;
11833 bfd_vma plt_entry_address;
11834 Elf_Internal_Rela rela;
11835 bfd_byte *loc;
1419bbe5
WN		 11836 asection *plt, *gotplt, *relplt;
11837
11838 /* When building a static executable, use .iplt, .igot.plt and
11839 .rela.iplt sections for STT_GNU_IFUNC symbols. */
11840 if (htab->root.splt != NULL)
11841 {
11842 plt = htab->root.splt;
11843 gotplt = htab->root.sgotplt;
11844 relplt = htab->root.srelplt;
11845 }
11846 else
11847 {
11848 plt = htab->root.iplt;
11849 gotplt = htab->root.igotplt;
11850 relplt = htab->root.irelplt;
11851 }
11852
11853 /* Get the index in the procedure linkage table which
11854 corresponds to this symbol. This is the index of this symbol
11855 in all the symbols for which we are making plt entries. The
11856 first entry in the procedure linkage table is reserved.
a06ea964 11857
1419bbe5
WN		 11858 Get the offset into the .got table of the entry that
11859 corresponds to this function. Each .got entry is GOT_ENTRY_SIZE
11860 bytes. The first three are reserved for the dynamic linker.
692e2b8b 11861
1419bbe5
WN		 11862 For static executables, we don't reserve anything. */
11863
11864 if (plt == htab->root.splt)
11865 {
11866 plt_index = (h->plt.offset - htab->plt_header_size) / htab->plt_entry_size;
a1bdea65 11867 got_offset = (plt_index + 3) * GOT_ENTRY_SIZE (htab);
1419bbe5
WN		 11868 }
11869 else
11870 {
11871 plt_index = h->plt.offset / htab->plt_entry_size;
a1bdea65 11872 got_offset = plt_index * GOT_ENTRY_SIZE (htab);
1419bbe5
WN		 11873 }
11874
11875 plt_entry = plt->contents + h->plt.offset;
11876 plt_entry_address = plt->output_section->vma
f44a1f8e 11877 + plt->output_offset + h->plt.offset;
1419bbe5
WN		 11878 gotplt_entry_address = gotplt->output_section->vma +
11879 gotplt->output_offset + got_offset;
a06ea964
NC		 11880
11881 /* Copy in the boiler-plate for the PLTn entry. */
37c18eed
SD		 11882 memcpy (plt_entry, htab->plt_entry, htab->plt_entry_size);
11883
e19e9199
SP		 11884 if (htab->c64_rel)
11885 aarch64_update_c64_plt_entry (output_bfd, plt_entry, plt_entry_address,
11886 gotplt_entry_address);
11887 else
11888 {
a06ea964 11889
e19e9199
SP		 11890 /* First instruction in BTI enabled PLT stub is a BTI
11891 instruction so skip it. */
11892 if (elf_aarch64_tdata (output_bfd)->plt_type & PLT_BTI
11893 && elf_elfheader (output_bfd)->e_type == ET_EXEC)
11894 plt_entry = plt_entry + 4;
a06ea964 11895
e19e9199
SP		 11896 /* Fill in the top 21 bits for this: ADRP x16, PLT_GOT + n * 8.
11897 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
11898 elf_aarch64_update_plt_entry (output_bfd,
11899 BFD_RELOC_AARCH64_ADR_HI21_PCREL,
11900 plt_entry,
11901 PG (gotplt_entry_address) -
11902 PG (plt_entry_address));
a06ea964 11903
e19e9199
SP		 11904 /* Fill in the lo12 bits for the load from the pltgot. */
11905 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_LDSTNN_LO12,
11906 plt_entry + 4,
11907 PG_OFFSET (gotplt_entry_address));
a06ea964 11908
e19e9199
SP		 11909 /* Fill in the lo12 bits for the add from the pltgot entry. */
11910 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADD_LO12,
11911 plt_entry + 8,
11912 PG_OFFSET (gotplt_entry_address));
11913 }
11914
11915 /* All the GOTPLT Entries are essentially initialized to PLT0. Set LSB if
11916 the PLT is C64. */
11917 bfd_vma plt0 = ((plt->output_section->vma + plt->output_offset)
11918 | htab->c64_rel);
11919 bfd_put_NN (output_bfd, plt0, gotplt->contents + got_offset);
a06ea964 11920
a06ea964 11921 rela.r_offset = gotplt_entry_address;
1419bbe5
WN		 11922
11923 if (h->dynindx == -1
0e1862bb 11924 || ((bfd_link_executable (info)
1419bbe5
WN		 11925 || ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
11926 && h->def_regular
11927 && h->type == STT_GNU_IFUNC))
11928 {
11929 /* If an STT_GNU_IFUNC symbol is locally defined, generate
11930 R_AARCH64_IRELATIVE instead of R_AARCH64_JUMP_SLOT. */
1419bbe5
WN		 11931 rela.r_addend = (h->root.u.def.value
11932 + h->root.u.def.section->output_section->vma
11933 + h->root.u.def.section->output_offset);
36b60023
MM		 11934 if (htab->c64_rel)
11935 {
11936 /* A MORELLO_IRELATIVE relocation is the only kind of relocation that
11937 wants something other than PLT0 in the fragment. It requires the
11938 PCC base with associated permissions and size information. */
11939 bfd_vma frag_value = 0;
11940 bfd_vma orig_value = rela.r_addend;
11941 rela.r_info = ELFNN_R_INFO (0, MORELLO_R (IRELATIVE));
11942 BFD_ASSERT (c64_symbol_adjust (h, orig_value, plt, info,
11943 &frag_value));
11944 rela.r_addend = (orig_value | 1) - frag_value;
11945 bfd_put_NN (output_bfd, frag_value, gotplt->contents + got_offset);
11946 BFD_ASSERT (c64_fixup_frag (output_bfd, info,
11947 BFD_RELOC_MORELLO_CAPINIT,
11948 NULL, h, plt, gotplt,
11949 gotplt->contents + got_offset + 8,
11950 orig_value, 0, rela.r_offset)
11951 == bfd_reloc_continue);
11952 }
11953 else
11954 {
11955 rela.r_info = ELFNN_R_INFO (0, AARCH64_R (IRELATIVE));
11956 }
1419bbe5
WN		 11957 }
11958 else
11959 {
11960 /* Fill in the entry in the .rela.plt section. */
60d18fc3 11961 rela.r_info = (htab->c64_rel
e19e9199
SP		 11962 ? ELFNN_R_INFO (h->dynindx, MORELLO_R (JUMP_SLOT))
11963 : ELFNN_R_INFO (h->dynindx, AARCH64_R (JUMP_SLOT)));
1419bbe5
WN		 11964 rela.r_addend = 0;
11965 }
a06ea964
NC		 11966
11967 /* Compute the relocation entry to used based on PLT index and do
11968 not adjust reloc_count. The reloc_count has already been adjusted
11969 to account for this entry. */
1419bbe5 11970 loc = relplt->contents + plt_index * RELOC_SIZE (htab);
cec5225b 11971 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964
NC		 11972}
11973
11974/* Size sections even though they're not dynamic. We use it to setup
11975 _TLS_MODULE_BASE_, if needed. */
11976
11977static bfd_boolean
cec5225b 11978elfNN_aarch64_always_size_sections (bfd *output_bfd,
a06ea964
NC		 11979 struct bfd_link_info *info)
11980{
11981 asection *tls_sec;
11982
0e1862bb 11983 if (bfd_link_relocatable (info))
a06ea964
NC		 11984 return TRUE;
11985
11986 tls_sec = elf_hash_table (info)->tls_sec;
11987
11988 if (tls_sec)
11989 {
11990 struct elf_link_hash_entry *tlsbase;
11991
11992 tlsbase = elf_link_hash_lookup (elf_hash_table (info),
11993 "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
11994
11995 if (tlsbase)
11996 {
11997 struct bfd_link_hash_entry *h = NULL;
11998 const struct elf_backend_data *bed =
11999 get_elf_backend_data (output_bfd);
12000
12001 if (!(_bfd_generic_link_add_one_symbol
12002 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
12003 tls_sec, 0, NULL, FALSE, bed->collect, &h)))
12004 return FALSE;
12005
12006 tlsbase->type = STT_TLS;
12007 tlsbase = (struct elf_link_hash_entry *) h;
12008 tlsbase->def_regular = 1;
12009 tlsbase->other = STV_HIDDEN;
12010 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
12011 }
12012 }
12013
12014 return TRUE;
12015}
12016
12017/* Finish up dynamic symbol handling. We set the contents of various
12018 dynamic sections here. */
2d0ca824 12019
a06ea964 12020static bfd_boolean
cec5225b 12021elfNN_aarch64_finish_dynamic_symbol (bfd *output_bfd,
a06ea964
NC		 12022 struct bfd_link_info *info,
12023 struct elf_link_hash_entry *h,
12024 Elf_Internal_Sym *sym)
12025{
cec5225b
YZ		 12026 struct elf_aarch64_link_hash_table *htab;
12027 htab = elf_aarch64_hash_table (info);
a06ea964
NC		 12028
12029 if (h->plt.offset != (bfd_vma) - 1)
12030 {
1419bbe5
WN		 12031 asection *plt, *gotplt, *relplt;
12032
a06ea964 12033 /* This symbol has an entry in the procedure linkage table. Set
07d6d2b8 12034 it up. */
a06ea964 12035
1419bbe5
WN		 12036 /* When building a static executable, use .iplt, .igot.plt and
12037 .rela.iplt sections for STT_GNU_IFUNC symbols. */
12038 if (htab->root.splt != NULL)
12039 {
12040 plt = htab->root.splt;
12041 gotplt = htab->root.sgotplt;
12042 relplt = htab->root.srelplt;
12043 }
12044 else
12045 {
12046 plt = htab->root.iplt;
12047 gotplt = htab->root.igotplt;
12048 relplt = htab->root.irelplt;
12049 }
12050
12051 /* This symbol has an entry in the procedure linkage table. Set
12052 it up. */
12053 if ((h->dynindx == -1
0e1862bb 12054 && !((h->forced_local || bfd_link_executable (info))
1419bbe5
WN		 12055 && h->def_regular
12056 && h->type == STT_GNU_IFUNC))
12057 || plt == NULL
12058 || gotplt == NULL
12059 || relplt == NULL)
f955cccf 12060 return FALSE;
a06ea964 12061
1419bbe5 12062 elfNN_aarch64_create_small_pltn_entry (h, htab, output_bfd, info);
a06ea964
NC		 12063 if (!h->def_regular)
12064 {
12065 /* Mark the symbol as undefined, rather than as defined in
46b87d49 12066 the .plt section. */
a06ea964 12067 sym->st_shndx = SHN_UNDEF;
46b87d49
WN		 12068 /* If the symbol is weak we need to clear the value.
12069 Otherwise, the PLT entry would provide a definition for
12070 the symbol even if the symbol wasn't defined anywhere,
12071 and so the symbol would never be NULL. Leave the value if
12072 there were any relocations where pointer equality matters
12073 (this is a clue for the dynamic linker, to make function
12074 pointer comparisons work between an application and shared
12075 library). */
12076 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
12077 sym->st_value = 0;
a06ea964
NC		 12078 }
12079 }
12080
12081 if (h->got.offset != (bfd_vma) - 1
60d18fc3 12082 && elf_aarch64_hash_entry (h)->got_type == GOT_NORMAL
a377ae2a
SN		 12083 /* Undefined weak symbol in static PIE resolves to 0 without
12084 any dynamic relocations. */
12085 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
a06ea964
NC		 12086 {
12087 Elf_Internal_Rela rela;
12088 bfd_byte *loc;
12089
12090 /* This symbol has an entry in the global offset table. Set it
07d6d2b8 12091 up. */
a06ea964
NC		 12092 if (htab->root.sgot == NULL || htab->root.srelgot == NULL)
12093 abort ();
12094
12095 rela.r_offset = (htab->root.sgot->output_section->vma
12096 + htab->root.sgot->output_offset
12097 + (h->got.offset & ~(bfd_vma) 1));
12098
49206388
WN		 12099 if (h->def_regular
12100 && h->type == STT_GNU_IFUNC)
12101 {
0e1862bb 12102 if (bfd_link_pic (info))
49206388
WN		 12103 {
12104 /* Generate R_AARCH64_GLOB_DAT. */
12105 goto do_glob_dat;
12106 }
12107 else
12108 {
12109 asection *plt;
12110
12111 if (!h->pointer_equality_needed)
12112 abort ();
12113
12114 /* For non-shared object, we can't use .got.plt, which
12115 contains the real function address if we need pointer
12116 equality. We load the GOT entry with the PLT entry. */
12117 plt = htab->root.splt ? htab->root.splt : htab->root.iplt;
36b60023
MM		 12118
12119 bfd_vma value = (plt->output_section->vma + plt->output_offset
12120 + h->plt.offset);
12121 bfd_vma got_offset = h->got.offset & ~(bfd_vma)1;
12122 if (htab->c64_rel)
12123 {
12124 bfd_vma base_value = 0;
12125 BFD_ASSERT (c64_symbol_adjust (h, value, plt, info,
12126 &base_value));
12127 rela.r_info = ELFNN_R_INFO (0, MORELLO_R (RELATIVE));
12128 rela.r_addend = (value | h->target_internal) - base_value;
12129 asection *s = c64_ifunc_got_reloc_section (info, h);
12130 elf_append_rela (output_bfd, s, &rela);
12131
12132 /* N.b. we do not use c64_fixup_frag since in includes a
12133 bunch of features we do not use like error checking the
12134 size and ensuring figuring out whether we need to extend
12135 things depending on the kind of symbol. We know these due
12136 to the fact this is a STT_GNU_IFUNC symbol.
12137 In order to implement those features it requires quite a
12138 lot of arguments which we don't happen to have here. */
12139 bfd_boolean guessed = FALSE;
12140 bfd_vma meta = cap_meta (pcc_high - pcc_low, plt, &guessed);
12141 BFD_ASSERT (!guessed);
12142 bfd_put_NN (output_bfd, meta,
12143 htab->root.sgot->contents + got_offset + 8);
12144 value = base_value;
12145 }
12146
12147 bfd_put_NN (output_bfd, value,
12148 htab->root.sgot->contents + got_offset);
49206388
WN		 12149 return TRUE;
12150 }
12151 }
0e1862bb 12152 else if (bfd_link_pic (info) && SYMBOL_REFERENCES_LOCAL (info, h))
a06ea964 12153 {
0ee3a6db 12154 if (!(h->def_regular || ELF_COMMON_DEF_P (h)))
a06ea964
NC		 12155 return FALSE;
12156
12157 BFD_ASSERT ((h->got.offset & 1) != 0);
808c324b
MM		 12158 bfd_vma value = h->root.u.def.value
12159 + h->root.u.def.section->output_section->vma
12160 + h->root.u.def.section->output_offset;
60d18fc3 12161 if (htab->c64_rel)
a1bdea65
SP		 12162 {
12163 rela.r_info = ELFNN_R_INFO (0, MORELLO_R (RELATIVE));
808c324b
MM		 12164 bfd_vma base_value = 0;
12165 if (c64_symbol_adjust (h, value, h->root.u.def.section, info,
12166 &base_value))
12167 rela.r_addend = (value | h->target_internal) - base_value;
12168 else
12169 rela.r_addend = 0;
a1bdea65
SP		 12170 }
12171 else
12172 {
12173 rela.r_info = ELFNN_R_INFO (0, AARCH64_R (RELATIVE));
808c324b 12174 rela.r_addend = value;
a1bdea65 12175 }
a06ea964
NC		 12176 }
12177 else
12178 {
dc1e8a47 12179 do_glob_dat:
a06ea964 12180 BFD_ASSERT ((h->got.offset & 1) == 0);
cec5225b 12181 bfd_put_NN (output_bfd, (bfd_vma) 0,
a06ea964 12182 htab->root.sgot->contents + h->got.offset);
a1bdea65 12183 rela.r_info = ELFNN_R_INFO (h->dynindx,
60d18fc3
MM		 12184 (htab->c64_rel
12185 ? MORELLO_R (GLOB_DAT)
a1bdea65 12186 : AARCH64_R (GLOB_DAT)));
a06ea964
NC		 12187 rela.r_addend = 0;
12188 }
12189
12190 loc = htab->root.srelgot->contents;
12191 loc += htab->root.srelgot->reloc_count++ * RELOC_SIZE (htab);
cec5225b 12192 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964
NC		 12193 }
12194
12195 if (h->needs_copy)
12196 {
12197 Elf_Internal_Rela rela;
5474d94f 12198 asection *s;
a06ea964
NC		 12199 bfd_byte *loc;
12200
12201 /* This symbol needs a copy reloc. Set it up. */
a06ea964
NC		 12202 if (h->dynindx == -1
12203 || (h->root.type != bfd_link_hash_defined
12204 && h->root.type != bfd_link_hash_defweak)
9d19e4fd 12205 || htab->root.srelbss == NULL)
a06ea964
NC		 12206 abort ();
12207
12208 rela.r_offset = (h->root.u.def.value
12209 + h->root.u.def.section->output_section->vma
12210 + h->root.u.def.section->output_offset);
a6bb11b2 12211 rela.r_info = ELFNN_R_INFO (h->dynindx, AARCH64_R (COPY));
a06ea964 12212 rela.r_addend = 0;
afbf7e8e 12213 if (h->root.u.def.section == htab->root.sdynrelro)
5474d94f
AM		 12214 s = htab->root.sreldynrelro;
12215 else
12216 s = htab->root.srelbss;
12217 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
cec5225b 12218 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964
NC		 12219 }
12220
12221 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. SYM may
12222 be NULL for local symbols. */
12223 if (sym != NULL
9637f6ef 12224 && (h == elf_hash_table (info)->hdynamic
a06ea964
NC		 12225 || h == elf_hash_table (info)->hgot))
12226 sym->st_shndx = SHN_ABS;
12227
12228 return TRUE;
12229}
12230
1419bbe5
WN		 12231/* Finish up local dynamic symbol handling. We set the contents of
12232 various dynamic sections here. */
12233
12234static bfd_boolean
12235elfNN_aarch64_finish_local_dynamic_symbol (void **slot, void *inf)
12236{
12237 struct elf_link_hash_entry *h
12238 = (struct elf_link_hash_entry *) *slot;
12239 struct bfd_link_info *info
12240 = (struct bfd_link_info *) inf;
12241
12242 return elfNN_aarch64_finish_dynamic_symbol (info->output_bfd,
12243 info, h, NULL);
12244}
12245
a06ea964 12246static void
cec5225b
YZ		 12247elfNN_aarch64_init_small_plt0_entry (bfd *output_bfd ATTRIBUTE_UNUSED,
12248 struct elf_aarch64_link_hash_table
a06ea964
NC		 12249 *htab)
12250{
12251 /* Fill in PLT0. Fixme:RR Note this doesn't distinguish between
12252 small and large plts and at the minute just generates
12253 the small PLT. */
12254
cec5225b 12255 /* PLT0 of the small PLT looks like this in ELF64 -
a06ea964
NC		 12256 stp x16, x30, [sp, #-16]! // Save the reloc and lr on stack.
12257 adrp x16, PLT_GOT + 16 // Get the page base of the GOTPLT
12258 ldr x17, [x16, #:lo12:PLT_GOT+16] // Load the address of the
12259 // symbol resolver
12260 add x16, x16, #:lo12:PLT_GOT+16 // Load the lo12 bits of the
12261 // GOTPLT entry for this.
12262 br x17
cec5225b 12263 PLT0 will be slightly different in ELF32 due to different got entry
2d0ca824 12264 size. */
caed7120 12265 bfd_vma plt_got_2nd_ent; /* Address of GOT[2]. */
a06ea964
NC		 12266 bfd_vma plt_base;
12267
12268
37c18eed
SD		 12269 memcpy (htab->root.splt->contents, htab->plt0_entry,
12270 htab->plt_header_size);
4d3bb356
SN		 12271
12272 /* PR 26312: Explicitly set the sh_entsize to 0 so that
12273 consumers do not think that the section contains fixed
12274 sized objects. */
12275 elf_section_data (htab->root.splt->output_section)->this_hdr.sh_entsize = 0;
a06ea964 12276
caed7120
YZ		 12277 plt_got_2nd_ent = (htab->root.sgotplt->output_section->vma
12278 + htab->root.sgotplt->output_offset
a1bdea65 12279 + GOT_ENTRY_SIZE (htab) * 2);
a06ea964
NC		 12280
12281 plt_base = htab->root.splt->output_section->vma +
f44a1f8e 12282 htab->root.splt->output_offset;
a06ea964 12283
e19e9199
SP		 12284 bfd_byte *plt0_entry = htab->root.splt->contents;
12285
12286 if (htab->c64_rel)
12287 {
12288 aarch64_update_c64_plt_entry (output_bfd, plt0_entry + 4,
12289 plt_base + 4, plt_got_2nd_ent);
12290 return;
12291 }
12292
37c18eed
SD		 12293 /* First instruction in BTI enabled PLT stub is a BTI
12294 instruction so skip it. */
37c18eed
SD		 12295 if (elf_aarch64_tdata (output_bfd)->plt_type & PLT_BTI)
12296 plt0_entry = plt0_entry + 4;
12297
a06ea964
NC		 12298 /* Fill in the top 21 bits for this: ADRP x16, PLT_GOT + n * 8.
12299 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
caed7120 12300 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADR_HI21_PCREL,
37c18eed 12301 plt0_entry + 4,
caed7120 12302 PG (plt_got_2nd_ent) - PG (plt_base + 4));
a06ea964 12303
caed7120 12304 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_LDSTNN_LO12,
37c18eed 12305 plt0_entry + 8,
caed7120 12306 PG_OFFSET (plt_got_2nd_ent));
a06ea964 12307
caed7120 12308 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADD_LO12,
37c18eed 12309 plt0_entry + 12,
caed7120 12310 PG_OFFSET (plt_got_2nd_ent));
a06ea964
NC		 12311}
12312
12313static bfd_boolean
cec5225b 12314elfNN_aarch64_finish_dynamic_sections (bfd *output_bfd,
a06ea964
NC		 12315 struct bfd_link_info *info)
12316{
cec5225b 12317 struct elf_aarch64_link_hash_table *htab;
a06ea964
NC		 12318 bfd *dynobj;
12319 asection *sdyn;
12320
cec5225b 12321 htab = elf_aarch64_hash_table (info);
a06ea964
NC		 12322 dynobj = htab->root.dynobj;
12323 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
12324
12325 if (htab->root.dynamic_sections_created)
12326 {
b2cb8a19 12327 const char *name;
cec5225b 12328 ElfNN_External_Dyn *dyncon, *dynconend;
a06ea964
NC		 12329
12330 if (sdyn == NULL || htab->root.sgot == NULL)
12331 abort ();
12332
cec5225b
YZ		 12333 dyncon = (ElfNN_External_Dyn *) sdyn->contents;
12334 dynconend = (ElfNN_External_Dyn *) (sdyn->contents + sdyn->size);
a06ea964
NC		 12335 for (; dyncon < dynconend; dyncon++)
12336 {
12337 Elf_Internal_Dyn dyn;
12338 asection *s;
12339
cec5225b 12340 bfd_elfNN_swap_dyn_in (dynobj, dyncon, &dyn);
a06ea964
NC		 12341
12342 switch (dyn.d_tag)
12343 {
12344 default:
12345 continue;
12346
12347 case DT_PLTGOT:
12348 s = htab->root.sgotplt;
12349 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
12350 break;
12351
12352 case DT_JMPREL:
4ade44b7
AM		 12353 s = htab->root.srelplt;
12354 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
a06ea964
NC		 12355 break;
12356
12357 case DT_PLTRELSZ:
c955de36 12358 s = htab->root.srelplt;
a06ea964
NC		 12359 dyn.d_un.d_val = s->size;
12360 break;
12361
a06ea964
NC		 12362 case DT_TLSDESC_PLT:
12363 s = htab->root.splt;
12364 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset
9bcc30e4 12365 + htab->root.tlsdesc_plt;
a06ea964
NC		 12366 break;
12367
12368 case DT_TLSDESC_GOT:
12369 s = htab->root.sgot;
9bcc30e4 12370 BFD_ASSERT (htab->root.tlsdesc_got != (bfd_vma)-1);
a06ea964 12371 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset
9bcc30e4 12372 + htab->root.tlsdesc_got;
a06ea964 12373 break;
b2cb8a19
MM		 12374
12375 /* Set the bottom bit of DT_INIT/FINI if the
12376 corresponding function is C64. */
12377 case DT_INIT:
12378 name = info->init_function;
12379 goto get_sym;
12380 case DT_FINI:
12381 name = info->fini_function;
12382get_sym:
12383 /* If it wasn't set by elf_bfd_final_link
12384 then there is nothing to adjust. */
12385 if (dyn.d_un.d_val != 0)
12386 {
12387 struct elf_link_hash_entry * eh;
12388
12389 eh = elf_link_hash_lookup (elf_hash_table (info), name,
12390 FALSE, FALSE, TRUE);
12391 if (eh != NULL)
12392 dyn.d_un.d_val |= eh->target_internal;
12393 }
12394 break;
a06ea964
NC		 12395 }
12396
cec5225b 12397 bfd_elfNN_swap_dyn_out (output_bfd, &dyn, dyncon);
a06ea964
NC		 12398 }
12399
12400 }
12401
12402 /* Fill in the special first entry in the procedure linkage table. */
12403 if (htab->root.splt && htab->root.splt->size > 0)
12404 {
cec5225b 12405 elfNN_aarch64_init_small_plt0_entry (output_bfd, htab);
a06ea964 12406
9bcc30e4 12407 if (htab->root.tlsdesc_plt && !(info->flags & DF_BIND_NOW))
a06ea964 12408 {
9bcc30e4 12409 BFD_ASSERT (htab->root.tlsdesc_got != (bfd_vma)-1);
cec5225b 12410 bfd_put_NN (output_bfd, (bfd_vma) 0,
9bcc30e4 12411 htab->root.sgot->contents + htab->root.tlsdesc_got);
a06ea964 12412
37c18eed
SD		 12413 const bfd_byte *entry = elfNN_aarch64_tlsdesc_small_plt_entry;
12414 htab->tlsdesc_plt_entry_size = PLT_TLSDESC_ENTRY_SIZE;
12415
4ca9b406
SP		 12416 unsigned adrp_rtype = BFD_RELOC_AARCH64_ADR_HI21_PCREL;
12417 unsigned ldr_rtype = BFD_RELOC_AARCH64_LDSTNN_LO12;
12418
37c18eed 12419 aarch64_plt_type type = elf_aarch64_tdata (output_bfd)->plt_type;
4ca9b406
SP		 12420 if (htab->c64_rel)
12421 {
12422 entry = elfNN_aarch64_tlsdesc_small_plt_c64_entry;
12423 adrp_rtype = BFD_RELOC_MORELLO_ADR_HI20_PCREL;
12424 ldr_rtype = BFD_RELOC_AARCH64_LDST128_LO12;
12425 }
12426 else if (type == PLT_BTI || type == PLT_BTI_PAC)
37c18eed
SD		 12427 {
12428 entry = elfNN_aarch64_tlsdesc_small_plt_bti_entry;
37c18eed
SD		 12429 }
12430
9bcc30e4 12431 memcpy (htab->root.splt->contents + htab->root.tlsdesc_plt,
37c18eed 12432 entry, htab->tlsdesc_plt_entry_size);
a06ea964
NC		 12433
12434 {
12435 bfd_vma adrp1_addr =
12436 htab->root.splt->output_section->vma
9bcc30e4
L		 12437 + htab->root.splt->output_offset
12438 + htab->root.tlsdesc_plt + 4;
a06ea964 12439
caed7120 12440 bfd_vma adrp2_addr = adrp1_addr + 4;
a06ea964
NC		 12441
12442 bfd_vma got_addr =
12443 htab->root.sgot->output_section->vma
12444 + htab->root.sgot->output_offset;
12445
12446 bfd_vma pltgot_addr =
12447 htab->root.sgotplt->output_section->vma
12448 + htab->root.sgotplt->output_offset;
12449
9bcc30e4 12450 bfd_vma dt_tlsdesc_got = got_addr + htab->root.tlsdesc_got;
caed7120
YZ		 12451
12452 bfd_byte *plt_entry =
9bcc30e4 12453 htab->root.splt->contents + htab->root.tlsdesc_plt;
a06ea964 12454
37c18eed
SD		 12455 /* First instruction in BTI enabled PLT stub is a BTI
12456 instruction so skip it. */
12457 if (type & PLT_BTI)
12458 {
12459 plt_entry = plt_entry + 4;
12460 adrp1_addr = adrp1_addr + 4;
12461 adrp2_addr = adrp2_addr + 4;
12462 }
12463
a06ea964 12464 /* adrp x2, DT_TLSDESC_GOT */
caed7120 12465 elf_aarch64_update_plt_entry (output_bfd,
4ca9b406 12466 adrp_rtype,
caed7120
YZ		 12467 plt_entry + 4,
12468 (PG (dt_tlsdesc_got)
12469 - PG (adrp1_addr)));
a06ea964
NC		 12470
12471 /* adrp x3, 0 */
caed7120 12472 elf_aarch64_update_plt_entry (output_bfd,
4ca9b406 12473 adrp_rtype,
caed7120
YZ		 12474 plt_entry + 8,
12475 (PG (pltgot_addr)
12476 - PG (adrp2_addr)));
a06ea964
NC		 12477
12478 /* ldr x2, [x2, #0] */
caed7120 12479 elf_aarch64_update_plt_entry (output_bfd,
4ca9b406 12480 ldr_rtype,
caed7120
YZ		 12481 plt_entry + 12,
12482 PG_OFFSET (dt_tlsdesc_got));
a06ea964
NC		 12483
12484 /* add x3, x3, 0 */
caed7120
YZ		 12485 elf_aarch64_update_plt_entry (output_bfd,
12486 BFD_RELOC_AARCH64_ADD_LO12,
12487 plt_entry + 16,
12488 PG_OFFSET (pltgot_addr));
a06ea964
NC		 12489 }
12490 }
12491 }
12492
12493 if (htab->root.sgotplt)
12494 {
12495 if (bfd_is_abs_section (htab->root.sgotplt->output_section))
12496 {
4eca0228 12497 _bfd_error_handler
871b3ab2 12498 (_("discarded output section: `%pA'"), htab->root.sgotplt);
a06ea964
NC		 12499 return FALSE;
12500 }
12501
12502 /* Fill in the first three entries in the global offset table. */
12503 if (htab->root.sgotplt->size > 0)
12504 {
8db339a6
MS		 12505 bfd_put_NN (output_bfd, (bfd_vma) 0, htab->root.sgotplt->contents);
12506
a06ea964 12507 /* Write GOT[1] and GOT[2], needed for the dynamic linker. */
cec5225b 12508 bfd_put_NN (output_bfd,
a06ea964 12509 (bfd_vma) 0,
a1bdea65 12510 htab->root.sgotplt->contents + GOT_ENTRY_SIZE (htab));
cec5225b 12511 bfd_put_NN (output_bfd,
a06ea964 12512 (bfd_vma) 0,
a1bdea65
SP		 12513 (htab->root.sgotplt->contents
12514 + GOT_ENTRY_SIZE (htab) * 2));
a06ea964
NC		 12515 }
12516
8db339a6
MS		 12517 if (htab->root.sgot)
12518 {
12519 if (htab->root.sgot->size > 0)
12520 {
12521 bfd_vma addr =
12522 sdyn ? sdyn->output_section->vma + sdyn->output_offset : 0;
12523 bfd_put_NN (output_bfd, addr, htab->root.sgot->contents);
12524 }
12525 }
12526
a06ea964 12527 elf_section_data (htab->root.sgotplt->output_section)->
a1bdea65 12528 this_hdr.sh_entsize = GOT_ENTRY_SIZE (htab);
a06ea964
NC		 12529 }
12530
12531 if (htab->root.sgot && htab->root.sgot->size > 0)
12532 elf_section_data (htab->root.sgot->output_section)->this_hdr.sh_entsize
a1bdea65 12533 = GOT_ENTRY_SIZE (htab);
a06ea964 12534
1419bbe5
WN		 12535 /* Fill PLT and GOT entries for local STT_GNU_IFUNC symbols. */
12536 htab_traverse (htab->loc_hash_table,
12537 elfNN_aarch64_finish_local_dynamic_symbol,
12538 info);
12539
a06ea964
NC		 12540 return TRUE;
12541}
12542
37c18eed
SD		 12543/* Check if BTI enabled PLTs are needed. Returns the type needed. */
12544static aarch64_plt_type
12545get_plt_type (bfd *abfd)
12546{
12547 aarch64_plt_type ret = PLT_NORMAL;
12548 bfd_byte *contents, *extdyn, *extdynend;
12549 asection *sec = bfd_get_section_by_name (abfd, ".dynamic");
12550 if (!sec || !bfd_malloc_and_get_section (abfd, sec, &contents))
12551 return ret;
12552 extdyn = contents;
12553 extdynend = contents + sec->size;
12554 for (; extdyn < extdynend; extdyn += sizeof (ElfNN_External_Dyn))
12555 {
12556 Elf_Internal_Dyn dyn;
12557 bfd_elfNN_swap_dyn_in (abfd, extdyn, &dyn);
12558
12559 /* Let's check the processor specific dynamic array tags. */
12560 bfd_vma tag = dyn.d_tag;
12561 if (tag < DT_LOPROC || tag > DT_HIPROC)
12562 continue;
12563
12564 switch (tag)
12565 {
12566 case DT_AARCH64_BTI_PLT:
1dbade74
SD		 12567 ret |= PLT_BTI;
12568 break;
12569
12570 case DT_AARCH64_PAC_PLT:
12571 ret |= PLT_PAC;
37c18eed
SD		 12572 break;
12573
12574 default: break;
12575 }
12576 }
12577 free (contents);
12578 return ret;
12579}
12580
12581static long
12582elfNN_aarch64_get_synthetic_symtab (bfd *abfd,
12583 long symcount,
12584 asymbol **syms,
12585 long dynsymcount,
12586 asymbol **dynsyms,
12587 asymbol **ret)
12588{
12589 elf_aarch64_tdata (abfd)->plt_type = get_plt_type (abfd);
12590 return _bfd_elf_get_synthetic_symtab (abfd, symcount, syms,
12591 dynsymcount, dynsyms, ret);
12592}
12593
a06ea964
NC		 12594/* Return address for Ith PLT stub in section PLT, for relocation REL
12595 or (bfd_vma) -1 if it should not be included. */
12596
12597static bfd_vma
cec5225b 12598elfNN_aarch64_plt_sym_val (bfd_vma i, const asection *plt,
a06ea964
NC		 12599 const arelent *rel ATTRIBUTE_UNUSED)
12600{
37c18eed
SD		 12601 size_t plt0_size = PLT_ENTRY_SIZE;
12602 size_t pltn_size = PLT_SMALL_ENTRY_SIZE;
12603
1dbade74
SD		 12604 if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_BTI_PAC)
12605 {
1dbade74
SD		 12606 if (elf_elfheader (plt->owner)->e_type == ET_EXEC)
12607 pltn_size = PLT_BTI_PAC_SMALL_ENTRY_SIZE;
12608 else
12609 pltn_size = PLT_PAC_SMALL_ENTRY_SIZE;
12610 }
12611 else if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_BTI)
37c18eed 12612 {
37c18eed
SD		 12613 if (elf_elfheader (plt->owner)->e_type == ET_EXEC)
12614 pltn_size = PLT_BTI_SMALL_ENTRY_SIZE;
12615 }
1dbade74
SD		 12616 else if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_PAC)
12617 {
1dbade74
SD		 12618 pltn_size = PLT_PAC_SMALL_ENTRY_SIZE;
12619 }
12620
37c18eed 12621 return plt->vma + plt0_size + i * pltn_size;
a06ea964
NC		 12622}
12623
d691934d
NC		 12624/* Returns TRUE if NAME is an AArch64 mapping symbol.
12625 The ARM ELF standard defines $x (for A64 code) and $d (for data).
12626 It also allows a period initiated suffix to be added to the symbol, ie:
12627 "$[adtx]\.[:sym_char]+". */
12628
12629static bfd_boolean
12630is_aarch64_mapping_symbol (const char * name)
12631{
12632 return name != NULL /* Paranoia. */
12633 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
12634 the mapping symbols could have acquired a prefix.
12635 We do not support this here, since such symbols no
12636 longer conform to the ARM ELF ABI. */
3979cf50 12637 && (name[1] == 'd' || name[1] == 'x' || name[1] == 'c')
d691934d
NC		 12638 && (name[2] == 0 || name[2] == '.');
12639 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
12640 any characters that follow the period are legal characters for the body
12641 of a symbol's name. For now we just assume that this is the case. */
12642}
12643
12644/* Make sure that mapping symbols in object files are not removed via the
12645 "strip --strip-unneeded" tool. These symbols might needed in order to
12646 correctly generate linked files. Once an object file has been linked,
12647 it should be safe to remove them. */
12648
12649static void
12650elfNN_aarch64_backend_symbol_processing (bfd *abfd, asymbol *sym)
12651{
12652 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
12653 && sym->section != bfd_abs_section_ptr
12654 && is_aarch64_mapping_symbol (sym->name))
12655 sym->flags |= BSF_KEEP;
12656}
12657
cd702818
SD		 12658/* Implement elf_backend_setup_gnu_properties for AArch64. It serves as a
12659 wrapper function for _bfd_aarch64_elf_link_setup_gnu_properties to account
12660 for the effect of GNU properties of the output_bfd. */
12661static bfd *
12662elfNN_aarch64_link_setup_gnu_properties (struct bfd_link_info *info)
12663{
12664 uint32_t prop = elf_aarch64_tdata (info->output_bfd)->gnu_and_prop;
12665 bfd *pbfd = _bfd_aarch64_elf_link_setup_gnu_properties (info, &prop);
12666 elf_aarch64_tdata (info->output_bfd)->gnu_and_prop = prop;
37c18eed
SD		 12667 elf_aarch64_tdata (info->output_bfd)->plt_type
12668 |= (prop & GNU_PROPERTY_AARCH64_FEATURE_1_BTI) ? PLT_BTI : 0;
cd702818
SD		 12669 return pbfd;
12670}
12671
12672/* Implement elf_backend_merge_gnu_properties for AArch64. It serves as a
12673 wrapper function for _bfd_aarch64_elf_merge_gnu_properties to account
12674 for the effect of GNU properties of the output_bfd. */
12675static bfd_boolean
12676elfNN_aarch64_merge_gnu_properties (struct bfd_link_info *info,
4e539114 12677 bfd *abfd, bfd *bbfd,
cd702818
SD		 12678 elf_property *aprop,
12679 elf_property *bprop)
12680{
12681 uint32_t prop
12682 = elf_aarch64_tdata (info->output_bfd)->gnu_and_prop;
37c18eed
SD		 12683
12684 /* If output has been marked with BTI using command line argument, give out
12685 warning if necessary. */
4e539114
SD		 12686 /* Properties are merged per type, hence only check for warnings when merging
12687 GNU_PROPERTY_AARCH64_FEATURE_1_AND. */
12688 if (((aprop && aprop->pr_type == GNU_PROPERTY_AARCH64_FEATURE_1_AND)
12689 || (bprop && bprop->pr_type == GNU_PROPERTY_AARCH64_FEATURE_1_AND))
12690 && (prop & GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
37c18eed
SD		 12691 && (!elf_aarch64_tdata (info->output_bfd)->no_bti_warn))
12692 {
12693 if ((aprop && !(aprop->u.number & GNU_PROPERTY_AARCH64_FEATURE_1_BTI))
4e539114 12694 || !aprop)
37c18eed 12695 {
8bf6d176 12696 _bfd_error_handler (_("%pB: warning: BTI turned on by -z force-bti when "
4e539114
SD		 12697 "all inputs do not have BTI in NOTE section."),
12698 abfd);
12699 }
12700 if ((bprop && !(bprop->u.number & GNU_PROPERTY_AARCH64_FEATURE_1_BTI))
12701 || !bprop)
12702 {
8bf6d176 12703 _bfd_error_handler (_("%pB: warning: BTI turned on by -z force-bti when "
4e539114
SD		 12704 "all inputs do not have BTI in NOTE section."),
12705 bbfd);
37c18eed
SD		 12706 }
12707 }
12708
cd702818
SD		 12709 return _bfd_aarch64_elf_merge_gnu_properties (info, abfd, aprop,
12710 bprop, prop);
12711}
a06ea964 12712
8b21361b
SP		 12713/* Demangle c64 function symbols as we read them in. */
12714
12715static bfd_boolean
12716aarch64_elfNN_swap_symbol_in (bfd * abfd,
12717 const void *psrc,
12718 const void *pshn,
12719 Elf_Internal_Sym *dst)
12720{
12721 if (!bfd_elfNN_swap_symbol_in (abfd, psrc, pshn, dst))
12722 return FALSE;
12723
12724 dst->st_target_internal = 0;
12725
12726 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
12727 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
12728 {
12729 dst->st_target_internal = dst->st_value & ST_BRANCH_TO_C64;
12730 dst->st_value &= ~(bfd_vma) ST_BRANCH_TO_C64;
12731 }
12732
12733 return TRUE;
12734}
12735
12736
12737/* Mangle c64 function symbols as we write them out. */
12738
12739static void
12740aarch64_elfNN_swap_symbol_out (bfd *abfd,
12741 const Elf_Internal_Sym *src,
12742 void *cdst,
12743 void *shndx)
12744{
12745 Elf_Internal_Sym newsym = *src;
12746
12747 if ((ELF_ST_TYPE (newsym.st_info) == STT_FUNC
12748 || ELF_ST_TYPE (newsym.st_info) == STT_GNU_IFUNC)
12749 && newsym.st_shndx != SHN_UNDEF)
12750 newsym.st_value |= newsym.st_target_internal;
12751
12752 bfd_elfNN_swap_symbol_out (abfd, &newsym, cdst, shndx);
12753}
12754
a1bdea65
SP		 12755/* Define the size of a GOT element for the generic mid-end. */
12756
12757static bfd_vma
12758elfNN_aarch64_got_elt_size (bfd *abfd ATTRIBUTE_UNUSED,
12759 struct bfd_link_info *info,
12760 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED,
12761 bfd *ibfd ATTRIBUTE_UNUSED,
12762 unsigned long symndx ATTRIBUTE_UNUSED)
12763{
12764 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
12765
12766 return GOT_ENTRY_SIZE (htab);
12767}
12768
f938669f
SP		 12769/* Define the size of a GOT header, which is the minimum size of the GOT section
12770 when one is needed. */
12771
12772static bfd_vma
a1bdea65 12773elfNN_aarch64_got_header_size (struct bfd_link_info *info)
f938669f 12774{
a1bdea65
SP		 12775 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
12776
12777 return GOT_ENTRY_SIZE (htab) * GOT_RESERVED_HEADER_SLOTS;
f938669f
SP		 12778}
12779
fa6ca5e2
SP		 12780/* Identify the 'C' in the CIE augmentation string. */
12781
12782static bfd_boolean
12783elf64_aarch64_eh_frame_augmentation_char (const char aug)
12784{
12785 return aug == 'C';
12786}
12787
a06ea964
NC		 12788/* We use this so we can override certain functions
12789 (though currently we don't). */
12790
cec5225b 12791const struct elf_size_info elfNN_aarch64_size_info =
a06ea964 12792{
cec5225b
YZ		 12793 sizeof (ElfNN_External_Ehdr),
12794 sizeof (ElfNN_External_Phdr),
12795 sizeof (ElfNN_External_Shdr),
12796 sizeof (ElfNN_External_Rel),
12797 sizeof (ElfNN_External_Rela),
12798 sizeof (ElfNN_External_Sym),
12799 sizeof (ElfNN_External_Dyn),
a06ea964
NC		 12800 sizeof (Elf_External_Note),
12801 4, /* Hash table entry size. */
12802 1, /* Internal relocs per external relocs. */
cec5225b
YZ		 12803 ARCH_SIZE, /* Arch size. */
12804 LOG_FILE_ALIGN, /* Log_file_align. */
12805 ELFCLASSNN, EV_CURRENT,
12806 bfd_elfNN_write_out_phdrs,
12807 bfd_elfNN_write_shdrs_and_ehdr,
12808 bfd_elfNN_checksum_contents,
12809 bfd_elfNN_write_relocs,
8b21361b
SP		 12810 aarch64_elfNN_swap_symbol_in,
12811 aarch64_elfNN_swap_symbol_out,
cec5225b
YZ		 12812 bfd_elfNN_slurp_reloc_table,
12813 bfd_elfNN_slurp_symbol_table,
12814 bfd_elfNN_swap_dyn_in,
12815 bfd_elfNN_swap_dyn_out,
12816 bfd_elfNN_swap_reloc_in,
12817 bfd_elfNN_swap_reloc_out,
12818 bfd_elfNN_swap_reloca_in,
12819 bfd_elfNN_swap_reloca_out
a06ea964
NC		 12820};
12821
12822#define ELF_ARCH bfd_arch_aarch64
12823#define ELF_MACHINE_CODE EM_AARCH64
12824#define ELF_MAXPAGESIZE 0x10000
12825#define ELF_MINPAGESIZE 0x1000
12826#define ELF_COMMONPAGESIZE 0x1000
12827
cec5225b
YZ		 12828#define bfd_elfNN_bfd_is_target_special_symbol \
12829 elfNN_aarch64_is_target_special_symbol
a06ea964 12830
07d6d2b8 12831#define bfd_elfNN_bfd_link_hash_table_create \
cec5225b 12832 elfNN_aarch64_link_hash_table_create
a06ea964 12833
cec5225b
YZ		 12834#define bfd_elfNN_bfd_merge_private_bfd_data \
12835 elfNN_aarch64_merge_private_bfd_data
a06ea964 12836
cec5225b
YZ		 12837#define bfd_elfNN_bfd_print_private_bfd_data \
12838 elfNN_aarch64_print_private_bfd_data
a06ea964 12839
cec5225b
YZ		 12840#define bfd_elfNN_bfd_reloc_type_lookup \
12841 elfNN_aarch64_reloc_type_lookup
a06ea964 12842
cec5225b
YZ		 12843#define bfd_elfNN_bfd_reloc_name_lookup \
12844 elfNN_aarch64_reloc_name_lookup
a06ea964 12845
cec5225b
YZ		 12846#define bfd_elfNN_bfd_set_private_flags \
12847 elfNN_aarch64_set_private_flags
a06ea964 12848
cec5225b
YZ		 12849#define bfd_elfNN_find_inliner_info \
12850 elfNN_aarch64_find_inliner_info
a06ea964 12851
37c18eed
SD		 12852#define bfd_elfNN_get_synthetic_symtab \
12853 elfNN_aarch64_get_synthetic_symtab
12854
cec5225b
YZ		 12855#define bfd_elfNN_mkobject \
12856 elfNN_aarch64_mkobject
a06ea964 12857
cec5225b
YZ		 12858#define bfd_elfNN_new_section_hook \
12859 elfNN_aarch64_new_section_hook
a06ea964
NC		 12860
12861#define elf_backend_adjust_dynamic_symbol \
cec5225b 12862 elfNN_aarch64_adjust_dynamic_symbol
a06ea964
NC		 12863
12864#define elf_backend_always_size_sections \
cec5225b 12865 elfNN_aarch64_always_size_sections
a06ea964
NC		 12866
12867#define elf_backend_check_relocs \
cec5225b 12868 elfNN_aarch64_check_relocs
a06ea964
NC		 12869
12870#define elf_backend_copy_indirect_symbol \
cec5225b 12871 elfNN_aarch64_copy_indirect_symbol
a06ea964 12872
823710d5
SN		 12873#define elf_backend_merge_symbol_attribute \
12874 elfNN_aarch64_merge_symbol_attribute
12875
a06ea964
NC		 12876/* Create .dynbss, and .rela.bss sections in DYNOBJ, and set up shortcuts
12877 to them in our hash. */
12878#define elf_backend_create_dynamic_sections \
cec5225b 12879 elfNN_aarch64_create_dynamic_sections
a06ea964
NC		 12880
12881#define elf_backend_init_index_section \
12882 _bfd_elf_init_2_index_sections
12883
a06ea964 12884#define elf_backend_finish_dynamic_sections \
cec5225b 12885 elfNN_aarch64_finish_dynamic_sections
a06ea964
NC		 12886
12887#define elf_backend_finish_dynamic_symbol \
cec5225b 12888 elfNN_aarch64_finish_dynamic_symbol
a06ea964 12889
a06ea964 12890#define elf_backend_object_p \
cec5225b 12891 elfNN_aarch64_object_p
a06ea964 12892
07d6d2b8 12893#define elf_backend_output_arch_local_syms \
cec5225b 12894 elfNN_aarch64_output_arch_local_syms
a06ea964 12895
e7679060
AM		 12896#define elf_backend_maybe_function_sym \
12897 elfNN_aarch64_maybe_function_sym
12898
a06ea964 12899#define elf_backend_plt_sym_val \
cec5225b 12900 elfNN_aarch64_plt_sym_val
a06ea964 12901
ed7e9d0b
AM		 12902#define elf_backend_init_file_header \
12903 elfNN_aarch64_init_file_header
a06ea964
NC		 12904
12905#define elf_backend_relocate_section \
cec5225b 12906 elfNN_aarch64_relocate_section
a06ea964
NC		 12907
12908#define elf_backend_reloc_type_class \
cec5225b 12909 elfNN_aarch64_reloc_type_class
a06ea964 12910
a06ea964 12911#define elf_backend_section_from_shdr \
cec5225b 12912 elfNN_aarch64_section_from_shdr
a06ea964
NC		 12913
12914#define elf_backend_size_dynamic_sections \
cec5225b 12915 elfNN_aarch64_size_dynamic_sections
a06ea964
NC		 12916
12917#define elf_backend_size_info \
cec5225b 12918 elfNN_aarch64_size_info
a06ea964 12919
68fcca92
JW		 12920#define elf_backend_write_section \
12921 elfNN_aarch64_write_section
12922
d691934d
NC		 12923#define elf_backend_symbol_processing \
12924 elfNN_aarch64_backend_symbol_processing
12925
cd702818
SD		 12926#define elf_backend_setup_gnu_properties \
12927 elfNN_aarch64_link_setup_gnu_properties
12928
12929#define elf_backend_merge_gnu_properties \
12930 elfNN_aarch64_merge_gnu_properties
12931
f938669f
SP		 12932#define elf_backend_got_header_size \
12933 elfNN_aarch64_got_header_size
12934
a1bdea65
SP		 12935#define elf_backend_got_elt_size \
12936 elfNN_aarch64_got_elt_size
12937
fa6ca5e2
SP		 12938#define elf_backend_eh_frame_augmentation_char \
12939 elf64_aarch64_eh_frame_augmentation_char
12940
a06ea964 12941#define elf_backend_can_refcount 1
59c108f7 12942#define elf_backend_can_gc_sections 1
a06ea964
NC		 12943#define elf_backend_plt_readonly 1
12944#define elf_backend_want_got_plt 1
12945#define elf_backend_want_plt_sym 0
5474d94f 12946#define elf_backend_want_dynrelro 1
a06ea964
NC		 12947#define elf_backend_may_use_rel_p 0
12948#define elf_backend_may_use_rela_p 1
12949#define elf_backend_default_use_rela_p 1
07d6d2b8 12950#define elf_backend_rela_normal 1
64f52338 12951#define elf_backend_dtrel_excludes_plt 1
c495064d 12952#define elf_backend_default_execstack 0
32f573bc 12953#define elf_backend_extern_protected_data 1
7f784814 12954#define elf_backend_hash_symbol elf_aarch64_hash_symbol
a06ea964 12955
07d6d2b8 12956#undef elf_backend_obj_attrs_section
a06ea964
NC		 12957#define elf_backend_obj_attrs_section ".ARM.attributes"
12958
cec5225b 12959#include "elfNN-target.h"
a75cf613
ES		 12960
12961/* CloudABI support. */
12962
12963#undef TARGET_LITTLE_SYM
12964#define TARGET_LITTLE_SYM aarch64_elfNN_le_cloudabi_vec
12965#undef TARGET_LITTLE_NAME
12966#define TARGET_LITTLE_NAME "elfNN-littleaarch64-cloudabi"
12967#undef TARGET_BIG_SYM
12968#define TARGET_BIG_SYM aarch64_elfNN_be_cloudabi_vec
12969#undef TARGET_BIG_NAME
12970#define TARGET_BIG_NAME "elfNN-bigaarch64-cloudabi"
12971
12972#undef ELF_OSABI
12973#define ELF_OSABI ELFOSABI_CLOUDABI
12974
12975#undef elfNN_bed
12976#define elfNN_bed elfNN_aarch64_cloudabi_bed
12977
12978#include "elfNN-target.h"
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