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faf766e3
NC		 12018-01-13 Nick Clifton <nickc@redhat.com>
2
3 2.30 branch created.
4
4ea0266c
SH		 52017-03-15 Stafford Horne <shorne@gmail.com>
6
7 * or1kcommon.cpu: Add pc set semantics to also update ppc.
8
b781683b
AM		 92016-10-06 Alan Modra <amodra@gmail.com>
10
11 * mep.opc (expand_string): Add fall through comment.
12
439baf71
AM		 132016-03-03 Alan Modra <amodra@gmail.com>
14
15 * fr30.cpu (f-m4): Replace bogus comment with a better guess
16 at what is really going on.
17
62de1c63
AM		 182016-03-02 Alan Modra <amodra@gmail.com>
19
20 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
21
b89807c6
AB		 222016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
23
24 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
25 a constant to better align disassembler output.
26
018dc9be
SK		 272014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
28
29 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
30
c151b1c6
AM		 312014-06-12 Alan Modra <amodra@gmail.com>
32
33 * or1k.opc: Whitespace fixes.
34
999b995d
SK		 352014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
36
37 * or1korbis.cpu (h-atomic-reserve): New hardware.
38 (h-atomic-address): Likewise.
39 (insn-opcode): Add opcodes for LWA and SWA.
40 (atomic-reserve): New operand.
41 (atomic-address): Likewise.
42 (l-lwa, l-swa): New instructions.
43 (l-lbs): Fix typo in comment.
44 (store-insn): Clear atomic reserve on store to atomic-address.
45 Fix register names in fmt field.
46
73589c9d
CS		 472014-04-22 Christian Svensson <blue@cmd.nu>
48
49 * openrisc.cpu: Delete.
50 * openrisc.opc: Delete.
51 * or1k.cpu: New file.
52 * or1k.opc: New file.
53 * or1kcommon.cpu: New file.
54 * or1korbis.cpu: New file.
55 * or1korfpx.cpu: New file.
56
594d8fa8
MF		 572013-12-07 Mike Frysinger <vapier@gentoo.org>
58
59 * epiphany.opc: Remove +x file mode.
60
87a8d6cb
NC		 612013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
62
63 PR binutils/15241
64 * lm32.cpu (Control and status registers): Add CFG2, PSW,
65 TLBVADDR, TLBPADDR and TLBBADVADDR.
66
02a79b89
JR		 672012-11-30 Oleg Raikhman <oleg@adapteva.com>
68 Joern Rennecke <joern.rennecke@embecosm.com>
69
70 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
71 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
72 (testset-insn): Add NO_DIS attribute to t.l.
73 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
74 (move-insns): Add NO-DIS attribute to cmov.l.
75 (op-mmr-movts): Add NO-DIS attribute to movts.l.
76 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
77 (op-rrr): Add NO-DIS attribute to .l.
78 (shift-rrr): Add NO-DIS attribute to .l.
79 (op-shift-rri): Add NO-DIS attribute to i32.l.
80 (bitrl, movtl): Add NO-DIS attribute.
81 (op-iextrrr): Add NO-DIS attribute to .l
82 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
83 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
84
a597d2d3
AM		 852012-02-27 Alan Modra <amodra@gmail.com>
86
87 * mt.opc (print_dollarhex): Trim values to 32 bits.
88
5011093d
NC		 892011-12-15 Nick Clifton <nickc@redhat.com>
90
91 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
92 hosts.
93
fd936b4c
JR		 942011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
95
96 * epiphany.opc (parse_branch_addr): Fix type of valuep.
97 Cast value before printing it as a long.
98 (parse_postindex): Fix type of valuep.
99
cfb8c092
NC		 1002011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
101
102 * cpu/epiphany.cpu: New file.
103 * cpu/epiphany.opc: New file.
104
dc15e575
NC		 1052011-08-22 Nick Clifton <nickc@redhat.com>
106
107 * fr30.cpu: Newly contributed file.
108 * fr30.opc: Likewise.
109 * ip2k.cpu: Likewise.
110 * ip2k.opc: Likewise.
111 * mep-avc.cpu: Likewise.
112 * mep-avc2.cpu: Likewise.
113 * mep-c5.cpu: Likewise.
114 * mep-core.cpu: Likewise.
115 * mep-default.cpu: Likewise.
116 * mep-ext-cop.cpu: Likewise.
117 * mep-fmax.cpu: Likewise.
118 * mep-h1.cpu: Likewise.
119 * mep-ivc2.cpu: Likewise.
120 * mep-rhcop.cpu: Likewise.
121 * mep-sample-ucidsp.cpu: Likewise.
122 * mep.cpu: Likewise.
123 * mep.opc: Likewise.
124 * openrisc.cpu: Likewise.
125 * openrisc.opc: Likewise.
126 * xstormy16.cpu: Likewise.
127 * xstormy16.opc: Likewise.
128
9ccb8af9
AM		 1292010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
130
131 * frv.opc: #undef DEBUG.
132
21375995
DD		 1332010-07-03 DJ Delorie <dj@delorie.com>
134
135 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
136
5ff58fb0
DE		 1372010-02-11 Doug Evans <dje@sebabeach.org>
138
139 * m32r.cpu (HASH-PREFIX): Delete.
140 (duhpo, dshpo): New pmacros.
141 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
142 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
143 attribute, define with dshpo.
144 (uimm24): Delete HASH-PREFIX attribute.
145 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
146 (print_signed_with_hash_prefix): New function.
147 (print_unsigned_with_hash_prefix): New function.
148 * xc16x.cpu (dowh): New pmacro.
149 (upof16): Define with dowh, specify print handler.
150 (qbit, qlobit, qhibit): Ditto.
151 (upag16): Ditto.
152 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
153 (print_with_dot_prefix): New functions.
154 (print_with_pof_prefix, print_with_pag_prefix): New functions.
155
3fa5b97b
DE		 1562010-01-24 Doug Evans <dje@sebabeach.org>
157
158 * frv.cpu (floating-point-conversion): Update call to fp conv op.
159 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
160 conditional-floating-point-conversion, ne-floating-point-conversion,
161 float-parallel-mul-add-double-semantics): Ditto.
162
fe8afbc4
DE		 1632010-01-05 Doug Evans <dje@sebabeach.org>
164
165 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
166 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
167
caaf56fb
DE		 1682010-01-02 Doug Evans <dje@sebabeach.org>
169
170 * m32c.opc (parse_signed16): Fix typo.
171
91d6fa6a
NC		 1722009-12-11 Nick Clifton <nickc@redhat.com>
173
174 * frv.opc: Fix shadowed variable warnings.
175 * m32c.opc: Fix shadowed variable warnings.
176
ec84cc2b
DE		 1772009-11-14 Doug Evans <dje@sebabeach.org>
178
179 Must use VOID expression in VOID context.
180 * xc16x.cpu (mov4): Fix mode of `sequence'.
181 (mov9, mov10): Ditto.
182 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
183 (callr, callseg, calls, trap, rets, reti): Ditto.
184 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
185 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
186 (exts, exts1, extsr, extsr1, prior): Ditto.
187
ac1e9eca
DE		 1882009-10-23 Doug Evans <dje@sebabeach.org>
189
190 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
191 cgen-ops.h -> cgen/basic-ops.h.
192
b4744b17
AM		 1932009-09-25 Alan Modra <amodra@bigpond.net.au>
194
195 * m32r.cpu (stb-plus): Typo fix.
196
ab5f875d
DE		 1972009-09-23 Doug Evans <dje@sebabeach.org>
198
199 * m32r.cpu (sth-plus): Fix address mode and calculation.
200 (stb-plus): Ditto.
201 (clrpsw): Fix mask calculation.
202 (bset, bclr, btst): Make mode in bit calculation match expression.
203
204 * xc16x.cpu (rtl-version): Set to 0.8.
205 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
206 make uppercase. Remove unnecessary name-prefix spec.
207 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
208 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
209 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
210 (h-cr): New hardware.
211 (muls): Comment out parts that won't compile, add fixme.
212 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
213 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
214 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
215
0aaaf7c3
DE		 2162009-07-16 Doug Evans <dje@sebabeach.org>
217
218 * cpu/simplify.inc (*): One line doc strings don't need \n.
219 (df): Invoke define-full-ifield instead of claiming it's an alias.
220 (dno): Define.
221 (dnop): Mark as deprecated.
222
1998a8e0
AM		 2232009-06-22 Alan Modra <amodra@bigpond.net.au>
224
225 * m32c.opc (parse_lab_5_3): Use correct enum.
226
6347aad8
HPN		 2272009-01-07 Hans-Peter Nilsson <hp@axis.com>
228
229 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
230 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
231 (media-arith-sat-semantics): Explicitly sign- or zero-extend
232 arguments of "operation" to DI using "mode" and the new pmacros.
233
2c06b7a6
HPN		 2342009-01-03 Hans-Peter Nilsson <hp@axis.com>
235
236 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
237 of number 2, PID.
238
84e94c90
NC		 2392008-12-23 Jon Beniston <jon@beniston.com>
240
241 * lm32.cpu: New file.
242 * lm32.opc: New file.
243
90518ff4
AM		 2442008-01-29 Alan Modra <amodra@bigpond.net.au>
245
246 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
247 to source.
248
a69f60de
HPN		 2492007-10-22 Hans-Peter Nilsson <hp@axis.com>
250
251 * cris.cpu (movs, movu): Use result of extension operation when
252 updating flags.
253
9b201bb5
NC		 2542007-07-04 Nick Clifton <nickc@redhat.com>
255
256 * cris.cpu: Update copyright notice to refer to GPLv3.
257 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
258 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
259 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
260 xc16x.opc: Likewise.
261 * iq2000.cpu: Fix copyright notice to refer to FSF.
262
53289dcd
MS		 2632007-04-30 Mark Salter <msalter@sadr.localdomain>
264
265 * frv.cpu (spr-names): Support new coprocessor SPR registers.
266
f6da2ec2
NC		 2672007-04-20 Nick Clifton <nickc@redhat.com>
268
269 * xc16x.cpu: Restore after accidentally overwriting this file with
270 xc16x.opc.
271
144f4bc6
DD		 2722007-03-29 DJ Delorie <dj@redhat.com>
273
274 * m32c.cpu (Imm-8-s4n): Fix print hook.
275 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
276 (arith-jnz-imm4-dst-defn): Make relaxable.
277 (arith-jnz16-imm4-dst-defn): Fix encodings.
278
75b06e7b
DD		 2792007-03-20 DJ Delorie <dj@redhat.com>
280
281 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
282 mem20): New.
283 (src16-16-20-An-relative-*): New.
284 (dst16-*-20-An-relative-*): New.
285 (dst16-16-16sa-*): New
286 (dst16-16-16ar-*): New
287 (dst32-16-16sa-Unprefixed-*): New
288 (jsri): Fix operands.
289 (setzx): Fix encoding.
72f4393d 290
a5da764d
AM		 2912007-03-08 Alan Modra <amodra@bigpond.net.au>
292
293 * m32r.opc: Formatting.
294
b497d0b0
NC		 2952006-05-22 Nick Clifton <nickc@redhat.com>
296
297 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
298
e78efa90
DD		 2992006-04-10 DJ Delorie <dj@redhat.com>
300
301 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
302 decides if this function accepts symbolic constants or not.
303 (parse_signed_bitbase): Likewise.
304 (parse_unsigned_bitbase8): Pass the new parameter.
305 (parse_unsigned_bitbase11): Likewise.
306 (parse_unsigned_bitbase16): Likewise.
307 (parse_unsigned_bitbase19): Likewise.
308 (parse_unsigned_bitbase27): Likewise.
309 (parse_signed_bitbase8): Likewise.
310 (parse_signed_bitbase11): Likewise.
311 (parse_signed_bitbase19): Likewise.
72f4393d 312
8d0e2679
DD		 3132006-03-13 DJ Delorie <dj@redhat.com>
314
43aa3bb1
DD		 315 * m32c.cpu (Bit3-S): New.
316 (btst:s): New.
317 * m32c.opc (parse_bit3_S): New.
318
8d0e2679
DD		 319 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
320 (btst): Add optional :G suffix for MACH32.
321 (or.b:S): New.
322 (pop.w:G): Add optional :G suffix for MACH16.
323 (push.b.imm): Fix syntax.
324
253d272c
DD		 3252006-03-10 DJ Delorie <dj@redhat.com>
326
327 * m32c.cpu (mul.l): New.
328 (mulu.l): New.
329
c7d41dc5
NC		 3302006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
331
332 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
333 an error message otherwise.
334 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
335 Fix up comments to correctly describe the functions.
336
6772dd07
DD		 3372006-02-24 DJ Delorie <dj@redhat.com>
338
339 * m32c.cpu (RL_TYPE): New attribute, with macros.
340 (Lab-8-24): Add RELAX.
341 (unary-insn-defn-g, binary-arith-imm-dst-defn,
342 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
343 (binary-arith-src-dst-defn): Add 2ADDR attribute.
344 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
345 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
346 attribute.
347 (jsri16, jsri32): Add 1ADDR attribute.
348 (jsr32.w, jsr32.a): Add JUMP attribute.
72f4393d 349
d70c5fc7 3502006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
72f4393d
L		 351 Anil Paranjape <anilp1@kpitcummins.com>
352 Shilin Shakti <shilins@kpitcummins.com>
d70c5fc7
NC		 353
354 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
355 description.
356 * xc16x.opc: New file containing supporting XC16C routines.
357
8536c657
NC		 3582006-02-10 Nick Clifton <nickc@redhat.com>
359
360 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
361
458f7770
DD		 3622006-01-06 DJ Delorie <dj@redhat.com>
363
364 * m32c.cpu (mov.w:q): Fix mode.
365 (push32.b.imm): Likewise, for the comment.
366
d031aafb
NS		 3672005-12-16 Nathan Sidwell <nathan@codesourcery.com>
368
369 Second part of ms1 to mt renaming.
370 * mt.cpu (define-arch, define-isa): Set name to mt.
371 (define-mach): Adjust.
372 * mt.opc (CGEN_ASM_HASH): Update.
373 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
374 (parse_loopsize, parse_imm16): Adjust.
375
eda87aba
DD		 3762005-12-13 DJ Delorie <dj@redhat.com>
377
378 * m32c.cpu (jsri): Fix order so register names aren't treated as
379 symbols.
380 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
381 indexwd, indexws): Fix encodings.
382
4970f871
NS		 3832005-12-12 Nathan Sidwell <nathan@codesourcery.com>
384
385 * mt.cpu: Rename from ms1.cpu.
386 * mt.opc: Rename from ms1.opc.
387
48ad8298
HPN		 3882005-12-06 Hans-Peter Nilsson <hp@axis.com>
389
390 * cris.cpu (simplecris-common-writable-specregs)
391 (simplecris-common-readable-specregs): Split from
392 simplecris-common-specregs. All users changed.
393 (cris-implemented-writable-specregs-v0)
394 (cris-implemented-readable-specregs-v0): Similar from
395 cris-implemented-specregs-v0.
396 (cris-implemented-writable-specregs-v3)
397 (cris-implemented-readable-specregs-v3)
398 (cris-implemented-writable-specregs-v8)
399 (cris-implemented-readable-specregs-v8)
400 (cris-implemented-writable-specregs-v10)
401 (cris-implemented-readable-specregs-v10)
402 (cris-implemented-writable-specregs-v32)
403 (cris-implemented-readable-specregs-v32): Similar.
404 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
405 insns and specializations.
406
6f84a2a6
NS		 4072005-11-08 Nathan Sidwell <nathan@codesourcery.com>
408
409 Add ms2
410 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
411 model.
412 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
413 f-cb2incr, f-rc3): New fields.
414 (LOOP): New instruction.
415 (JAL-HAZARD): New hazard.
416 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
417 New operands.
418 (mul, muli, dbnz, iflush): Enable for ms2
419 (jal, reti): Has JAL-HAZARD.
420 (ldctxt, ldfb, stfb): Only ms1.
421 (fbcb): Only ms1,ms1-003.
422 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
423 fbcbincrs, mfbcbincrs): Enable for ms2.
424 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
425 * ms1.opc (parse_loopsize): New.
426 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
427 (print_pcrel): New.
428
95b96521
DB		 4292005-10-28 Dave Brolley <brolley@redhat.com>
430
431 Contribute the following change:
432 2003-09-24 Dave Brolley <brolley@redhat.com>
433
434 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
435 CGEN_ATTR_VALUE_TYPE.
436 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
437 Use cgen_bitset_intersect_p.
438
c6552317
DD		 4392005-10-27 DJ Delorie <dj@redhat.com>
440
441 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
442 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
443 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
444 imm operand is needed.
445 (adjnz, sbjnz): Pass the right operands.
446 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
447 unary-insn): Add -g variants for opcodes that need to support :G.
448 (not.BW:G, push.BW:G): Call it.
449 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
450 stzx16-imm8-imm8-abs16): Fix operand typos.
451 * m32c.opc (m32c_asm_hash): Support bnCND.
452 (parse_signed4n, print_signed4n): New.
72f4393d 453
f75eb1c0
DD		 4542005-10-26 DJ Delorie <dj@redhat.com>
455
456 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
457 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
458 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
459 dsp8[sp] is signed.
460 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
461 (mov.BW:S r0,r1): Fix typo r1l->r1.
462 (tst): Allow :G suffix.
463 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
464
e277c00b
AM		 4652005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
466
467 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
468
92e0a941
DD		 4692005-10-25 DJ Delorie <dj@redhat.com>
470
471 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
472 making one a macro of the other.
473
a1a280bb
DD		 4742005-10-21 DJ Delorie <dj@redhat.com>
475
476 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
477 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
478 indexld, indexls): .w variants have `1' bit.
479 (rot32.b): QI, not SI.
480 (rot32.w): HI, not SI.
481 (xchg16): HI for .w variant.
482
e74eb924
NC		 4832005-10-19 Nick Clifton <nickc@redhat.com>
484
485 * m32r.opc (parse_slo16): Fix bad application of previous patch.
486
5e03663f
NC		 4872005-10-18 Andreas Schwab <schwab@suse.de>
488
489 * m32r.opc (parse_slo16): Better version of previous patch.
490
ab7c9a26
NC		 4912005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
492
493 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
494 size.
495
fd54057a
DD		 4962005-07-25 DJ Delorie <dj@redhat.com>
497
498 * m32c.opc (parse_unsigned8): Add %dsp8().
499 (parse_signed8): Add %hi8().
500 (parse_unsigned16): Add %dsp16().
501 (parse_signed16): Add %lo16() and %hi16().
502 (parse_lab_5_3): Make valuep a bfd_vma *.
503
85da3a56
NC		 5042005-07-18 Nick Clifton <nickc@redhat.com>
505
506 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
507 components.
508 (f-lab32-jmp-s): Fix insertion sequence.
509 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
510 (Dsp-40-s8): Make parameter be signed.
511 (Dsp-40-s16): Likewise.
512 (Dsp-48-s8): Likewise.
513 (Dsp-48-s16): Likewise.
514 (Imm-13-u3): Likewise. (Despite its name!)
515 (BitBase16-16-s8): Make the parameter be unsigned.
516 (BitBase16-8-u11-S): Likewise.
517 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
518 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
519 relaxation.
520
521 * m32c.opc: Fix formatting.
522 Use safe-ctype.h instead of ctype.h
523 Move duplicated code sequences into a macro.
524 Fix compile time warnings about signedness mismatches.
525 Remove dead code.
526 (parse_lab_5_3): New parser function.
72f4393d 527
aa260854
JB		 5282005-07-16 Jim Blandy <jimb@redhat.com>
529
530 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
531 to represent isa sets.
532
0a665bfd
JB		 5332005-07-15 Jim Blandy <jimb@redhat.com>
534
535 * m32c.cpu, m32c.opc: Fix copyright.
536
49f58d10
JB		 5372005-07-14 Jim Blandy <jimb@redhat.com>
538
539 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
540
0e6b69be
AM		 5412005-07-14 Alan Modra <amodra@bigpond.net.au>
542
543 * ms1.opc (print_dollarhex): Correct format string.
544
f9210e37
AM		 5452005-07-06 Alan Modra <amodra@bigpond.net.au>
546
547 * iq2000.cpu: Include from binutils cpu dir.
548
3ec2b351
NC		 5492005-07-05 Nick Clifton <nickc@redhat.com>
550
551 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
552 unsigned in order to avoid compile time warnings about sign
553 conflicts.
554
555 * ms1.opc (parse_*): Likewise.
556 (parse_imm16): Use a "void *" as it is passed both signed and
557 unsigned arguments.
558
47b0e7ad
NC		 5592005-07-01 Nick Clifton <nickc@redhat.com>
560
561 * frv.opc: Update to ISO C90 function declaration style.
562 * iq2000.opc: Likewise.
563 * m32r.opc: Likewise.
564 * sh.opc: Likewise.
565
b081650b
DB		 5662005-06-15 Dave Brolley <brolley@redhat.com>
567
568 Contributed by Red Hat.
569 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
570 * ms1.opc: New file. Written by Stan Cox.
571
e172dbf8
NC		 5722005-05-10 Nick Clifton <nickc@redhat.com>
573
574 * Update the address and phone number of the FSF organization in
575 the GPL notices in the following files:
576 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
577 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
578 sh64-media.cpu, simplify.inc
579
b2d52a48
AM		 5802005-02-24 Alan Modra <amodra@bigpond.net.au>
581
582 * frv.opc (parse_A): Warning fix.
583
33b71eeb
NC		 5842005-02-23 Nick Clifton <nickc@redhat.com>
585
586 * frv.opc: Fixed compile time warnings about differing signed'ness
587 of pointers passed to functions.
588 * m32r.opc: Likewise.
589
bc18c937
NC		 5902005-02-11 Nick Clifton <nickc@redhat.com>
591
592 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
593 'bfd_vma *' in order avoid compile time warning message.
594
46da9a19
HPN		 5952005-01-28 Hans-Peter Nilsson <hp@axis.com>
596
597 * cris.cpu (mstep): Add missing insn.
598
90219bd0
AO		 5992005-01-25 Alexandre Oliva <aoliva@redhat.com>
600
601 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
602 * frv.cpu: Add support for TLS annotations in loads and calll.
603 * frv.opc (parse_symbolic_address): New.
604 (parse_ldd_annotation): New.
605 (parse_call_annotation): New.
606 (parse_ld_annotation): New.
607 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
608 Introduce TLS relocations.
609 (parse_d12, parse_s12, parse_u12): Likewise.
610 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
611 (parse_call_label, print_at): New.
612
c3d75c30
HPN		 6132004-12-21 Mikael Starvik <starvik@axis.com>
614
615 * cris.cpu (cris-set-mem): Correct integral write semantics.
616
68800d83
HPN		 6172004-11-29 Hans-Peter Nilsson <hp@axis.com>
618
619 * cris.cpu: New file.
620
4bd1d37b
NC		 6212004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
622
623 * iq2000.cpu: Added quotes around macro arguments so that they
624 will work with newer versions of guile.
625
4030fa5a
NC		 6262004-10-27 Nick Clifton <nickc@redhat.com>
627
628 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
629 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
630 operand.
631 * iq2000.cpu (dnop index): Rename to _index to avoid complications
632 with guile.
633
ac28a1cb
RS		 6342004-08-27 Richard Sandiford <rsandifo@redhat.com>
635
636 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
637
dc4c54bb
NC		 6382004-05-15 Nick Clifton <nickc@redhat.com>
639
640 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
641
f4453dfa
NC		 6422004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
643
644 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
645
676a64f4
RS		 6462004-03-01 Richard Sandiford <rsandifo@redhat.com>
647
648 * frv.cpu (define-arch frv): Add fr450 mach.
649 (define-mach fr450): New.
650 (define-model fr450): New. Add profile units to every fr450 insn.
651 (define-attr UNIT): Add MDCUTSSI.
652 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
653 (define-attr AUDIO): New boolean.
654 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
655 (f-LRA-null, f-TLBPR-null): New fields.
656 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
657 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
658 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
659 (LRA-null, TLBPR-null): New macros.
660 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
661 (load-real-address): New macro.
662 (lrai, lrad, tlbpr): New instructions.
663 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
664 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
665 (mdcutssi): Change UNIT attribute to MDCUTSSI.
666 (media-low-clear-semantics, media-scope-limit-semantics)
667 (media-quad-limit, media-quad-shift): New macros.
668 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
669 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
670 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
671 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
672 (fr450_unit_mapping): New array.
673 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
674 for new MDCUTSSI unit.
675 (fr450_check_insn_major_constraints): New function.
676 (check_insn_major_constraints): Use it.
677
c7a48b9a
RS		 6782004-03-01 Richard Sandiford <rsandifo@redhat.com>
679
680 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
681 (scutss): Change unit to I0.
682 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
683 (mqsaths): Fix FR400-MAJOR categorization.
684 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
685 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
686 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
687 combinations.
688
8ae0baa2
RS		 6892004-03-01 Richard Sandiford <rsandifo@redhat.com>
690
691 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
692 (rstb, rsth, rst, rstd, rstq): Delete.
693 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
694
8ee9a8b2
NC		 6952004-02-23 Nick Clifton <nickc@redhat.com>
696
697 * Apply these patches from Renesas:
698
699 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
700
701 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
702 disassembling codes for 0x*2 addresses.
703
704 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
705
706 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
707
708 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
709
710 * cpu/m32r.cpu : Add new model m32r2.
711 Add new instructions.
712 Replace occurrances of 'Mitsubishi' with 'Renesas'.
713 Changed PIPE attr of push from O to OS.
714 Care for Little-endian of M32R.
715 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
716 Care for Little-endian of M32R.
717 (parse_slo16): signed extension for value.
718
299d901c
AC		 7192004-02-20 Andrew Cagney <cagney@redhat.com>
720
e866a257
AC		 721 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
722 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
723
299d901c
AC		 724 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
725 written by Ben Elliston.
726
cb10e79a
RS		 7272004-01-14 Richard Sandiford <rsandifo@redhat.com>
728
729 * frv.cpu (UNIT): Add IACC.
730 (iacc-multiply-r-r): Use it.
731 * frv.opc (fr400_unit_mapping): Add entry for IACC.
732 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
733
d4e4dc14
AO		 7342004-01-06 Alexandre Oliva <aoliva@redhat.com>
735
736 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
737 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
738 cut&paste errors in shifting/truncating numerical operands.
739 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
740 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
741 (parse_uslo16): Likewise.
742 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
743 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
744 (parse_s12): Likewise.
745 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
746 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
747 (parse_uslo16): Likewise.
748 (parse_uhi16): Parse gothi and gotfuncdeschi.
749 (parse_d12): Parse got12 and gotfuncdesc12.
750 (parse_s12): Likewise.
751
1340b9a9
DB		 7522003-10-10 Dave Brolley <brolley@redhat.com>
753
754 * frv.cpu (dnpmop): New p-macro.
755 (GRdoublek): Use dnpmop.
756 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
757 (store-double-r-r): Use (.sym regtype doublek).
758 (r-store-double): Ditto.
759 (store-double-r-r-u): Ditto.
760 (conditional-store-double): Ditto.
761 (conditional-store-double-u): Ditto.
762 (store-double-r-simm): Ditto.
763 (fmovs): Assign to UNIT FMALL.
764
ac7c07ac
DB		 7652003-10-06 Dave Brolley <brolley@redhat.com>
766
767 * frv.cpu, frv.opc: Add support for fr550.
768
d0312406
DB		 7692003-09-24 Dave Brolley <brolley@redhat.com>
770
771 * frv.cpu (u-commit): New modelling unit for fr500.
772 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
773 (commit-r): Use u-commit model for fr500.
774 (commit): Ditto.
775 (conditional-float-binary-op): Take profiling data as an argument.
776 Update callers.
777 (ne-float-binary-op): Ditto.
778
c6945302
MS		 7792003-09-19 Michael Snyder <msnyder@redhat.com>
780
781 * frv.cpu (nldqi): Delete unimplemented instruction.
782
23600bb3
DB		 7832003-09-12 Dave Brolley <brolley@redhat.com>
784
785 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
786 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
787 frv_ref_SI to get input register referenced for profiling.
788 (clear-ne-flag-all): Pass insn profiling in as an argument.
789 (clrgr,clrfr,clrga,clrfa): Add profiling information.
790
6f18ad70
MS		 7912003-09-11 Michael Snyder <msnyder@redhat.com>
792
793 * frv.cpu: Typographical corrections.
794
96486995
DB		 7952003-09-09 Dave Brolley <brolley@redhat.com>
796
797 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
798 (conditional-media-dual-complex, media-quad-complex): Likewise.
799
0457efce
DB		 8002003-09-04 Dave Brolley <brolley@redhat.com>
801
802 * frv.cpu (register-transfer): Pass in all attributes in on argument.
803 Update all callers.
804 (conditional-register-transfer): Ditto.
805 (cache-preload): Ditto.
806 (floating-point-conversion): Ditto.
807 (floating-point-neg): Ditto.
808 (float-abs): Ditto.
809 (float-binary-op-s): Ditto.
810 (conditional-float-binary-op): Ditto.
811 (ne-float-binary-op): Ditto.
812 (float-dual-arith): Ditto.
813 (ne-float-dual-arith): Ditto.
814
8caa9169
DB		 8152003-09-03 Dave Brolley <brolley@redhat.com>
816
817 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
818 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
819 MCLRACC-1.
820 (A): Removed operand.
821 (A0,A1): New operands replace operand A.
822 (mnop): Now a real insn
823 (mclracc): Removed insn.
824 (mclracc-0, mclracc-1): New insns replace mclracc.
825 (all insns): Use new UNIT attributes.
826
6d9ab561
NC		 8272003-08-21 Nick Clifton <nickc@redhat.com>
828
829 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
830 and u-media-dual-btoh with output parameter.
831 (cmbtoh): Add profiling hack.
832
741a7751
NC		 8332003-08-19 Michael Snyder <msnyder@redhat.com>
834
835 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
836
5b5b78da
DE		 8372003-06-10 Doug Evans <dje@sebabeach.org>
838
839 * frv.cpu: Add IDOC attribute.
840
539ee71a
AC		 8412003-06-06 Andrew Cagney <cagney@redhat.com>
842
843 Contributed by Red Hat.
844 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
845 Stan Cox, and Frank Ch. Eigler.
846 * iq2000.opc: New file. Written by Ben Elliston, Frank
847 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
848 * iq2000m.cpu: New file. Written by Jeff Johnston.
849 * iq10.cpu: New file. Written by Jeff Johnston.
850
36c3ae24
NC		 8512003-06-05 Nick Clifton <nickc@redhat.com>
852
853 * frv.cpu (FRintieven): New operand. An even-numbered only
854 version of the FRinti operand.
855 (FRintjeven): Likewise for FRintj.
856 (FRintkeven): Likewise for FRintk.
857 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
858 media-quad-arith-sat-semantics, media-quad-arith-sat,
859 conditional-media-quad-arith-sat, mdunpackh,
860 media-quad-multiply-semantics, media-quad-multiply,
861 conditional-media-quad-multiply, media-quad-complex-i,
862 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
863 conditional-media-quad-multiply-acc, munpackh,
864 media-quad-multiply-cross-acc-semantics, mdpackh,
865 media-quad-multiply-cross-acc, mbtoh-semantics,
866 media-quad-cross-multiply-cross-acc-semantics,
867 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
868 media-quad-cross-multiply-acc-semantics, cmbtoh,
869 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
870 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
871 cmhtob): Use new operands.
872 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 873 (parse_even_register): New function.
36c3ae24 874
75798298
NC		 8752003-06-03 Nick Clifton <nickc@redhat.com>
876
877 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
878 immediate value not unsigned.
879
9aab5aa3
AC		 8802003-06-03 Andrew Cagney <cagney@redhat.com>
881
882 Contributed by Red Hat.
883 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
884 and Eric Christopher.
885 * frv.opc: New file. Written by Catherine Moore, and Dave
886 Brolley.
887 * simplify.inc: New file. Written by Doug Evans.
888
2739f79a
AC		 8892003-05-02 Andrew Cagney <cagney@redhat.com>
890
891 * New file.
892
893\f
752937aa
NC		 894Copyright (C) 2003-2012 Free Software Foundation, Inc.
895
896Copying and distribution of this file, with or without modification,
897are permitted in any medium without royalty provided the copyright
898notice and this notice are preserved.
899
2739f79a
AC		 900Local Variables:
901mode: change-log
902left-margin: 8
903fill-column: 74
904version-control: never
905End:
A mirror of the official binutils-gdb repository