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CommitLineData
c2e5c986
SD
12020-04-20 Sudakshina Das <sudi.das@arm.com>
2
3 * config/tc-aarch64.c (parse_barrier_psb): Update error messages
4 to include TSB.
5 * testsuite/gas/aarch64/system-2.d: Update -march and new tsb tests.
6 * testsuite/gas/aarch64/system-2.s: Add new tsb tests.
7 * testsuite/gas/aarch64/system.d: Update.
8
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92020-04-20 Sudakshina Das <sudi.das@arm.com>
10
11 * testsuite/gas/aarch64/bti.d: Update -march option.
12 * testsuite/gas/aarch64/illegal-bti.d: Remove.
13 * testsuite/gas/aarch64/illegal-bti.l: Remove.
14 * testsuite/gas/aarch64/illegal-ras-1.l: Remove esb.
15 * testsuite/gas/aarch64/illegal-ras-1.s: Remove esb.
16
49af2f5c
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172020-04-17 Alan Modra <amodra@gmail.com>
18
19 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Allow assignment to dot.
20
8e4979ac
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212020-04-16 Gagan Singh Sidhu <broly@mac.com>
22 Nick Clifton <nickc@redhat.com>
23
24 PR 25803
25 * config/obj-elf.c (obj_elf_type): Reject ifunc symbols on MIPS
26 targets.
27 * testsuite/gas/elf/elf.exp: Add MIPS targets to the list to skip
28 for the type-2 test.
29 * testsuite/gas/elf/type-noifunc.e: Update to allow for MIPS
30 targets running this test.
31
c54a9b56
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322020-02-16 David Faust <david.faust@oracle.com>
33
34 * testsuite/gas/bpf/bpf.exp: Run jump32 tests.
35 * testsuite/gas/bpf/jump32.s: New file.
36 * testsuite/gas/bpf/jump32.d: Likewise.
37
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382020-04-08 H.J. Lu <hongjiu.lu@intel.com>
39
40 * doc/c-i386.texi: Correct -mlfence-before-indirect-branch=
41 documentation.
42
6a3ab923
GN
432020-04-08 Gunther Nikl <gnikl@justmail.de>
44
45 * config/tc-moxie.h (MD_PCREL_FROM_SECTION): Delete define.
46 (md_pcrel_from): Remove prototytpe.
d9f19885
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47 * config/tc-m32c.h (MD_PCREL_FROM_SECTION): Delete duplicate
48 define.
49 (md_pcrel_from_section): Remove duplicate prototype.
9ad4cfa8
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50 * tc.h (md_pcrel_from_section): Add prototype.
51 * config/tc-aarch64.h (md_pcrel_from_section): Remove prototype.
52 * config/tc-arc.h (md_pcrel_from_section): Likewise.
53 * config/tc-arm.h (md_pcrel_from_section): Likewise.
54 * config/tc-avr.h (md_pcrel_from_section): Likewise.
55 * config/tc-bfin.h (md_pcrel_from_section): Likewise.
56 * config/tc-bpf.h (md_pcrel_from_section): Likewise.
57 * config/tc-csky.h (md_pcrel_from_section): Likewise.
58 * config/tc-d10v.h (md_pcrel_from_section): Likewise.
59 * config/tc-d30v.h (md_pcrel_from_section): Likewise.
60 * config/tc-epiphany.h (md_pcrel_from_section): Likewise.
61 * config/tc-fr30.h (md_pcrel_from_section): Likewise.
62 * config/tc-frv.h (md_pcrel_from_section): Likewise.
63 * config/tc-iq2000.h (md_pcrel_from_section): Likewise.
64 * config/tc-lm32.h (md_pcrel_from_section): Likewise.
65 * config/tc-m32c.h (md_pcrel_from_section): Likewise.
66 * config/tc-m32r.h (md_pcrel_from_section): Likewise.
67 * config/tc-mcore.h (md_pcrel_from_section): Likewise.
68 * config/tc-mep.h (md_pcrel_from_section): Likewise.
69 * config/tc-metag.h (md_pcrel_from_section): Likewise.
70 * config/tc-microblaze.h (md_pcrel_from_section): Likewise.
71 * config/tc-mmix.h (md_pcrel_from_section): Likewise.
72 * config/tc-moxie.h (md_pcrel_from_section): Likewise.
73 * config/tc-msp430.h (md_pcrel_from_section): Likewise.
74 * config/tc-mt.h (md_pcrel_from_section): Likewise.
75 * config/tc-or1k.h (md_pcrel_from_section): Likewise.
76 * config/tc-ppc.h (md_pcrel_from_section): Likewise.
77 * config/tc-rl78.h (md_pcrel_from_section): Likewise.
78 * config/tc-rx.h (md_pcrel_from_section): Likewise.
79 * config/tc-s390.h (md_pcrel_from_section): Likewise.
80 * config/tc-sh.h (md_pcrel_from_section): Likewise.
81 * config/tc-xc16x.h (md_pcrel_from_section): Likewise.
82 * config/tc-xstormy16.h (md_pcrel_from_section): Likewise.
4c09b8c4
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83 * config/tc-microblaze.h (md_begin, md_assemble, md_undefined_symbol,
84 md_show_usage, md_convert_frag, md_operand, md_number_to_chars,
85 md_estimate_size_before_relax, md_section_align, tc_gen_reloc,
86 md_apply_fix3): Delete prototypes.
6a3ab923 87
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882020-04-07 H.J. Lu <hongjiu.lu@intel.com>
89
90 * NEWS: Mention support for Intel SERIALIZE and TSXLDTRK
91 instructions.
92
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932020-04-07 H.J. Lu <hongjiu.lu@intel.com>
94
95 * doc/c-z80.texi: Fix @xref warnings.
96
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972020-04-07 Lili Cui <lili.cui@intel.com>
98
99 * config/tc-i386.c (cpu_arch): Add .TSXLDTRK.
100 (cpu_noarch): Likewise.
101 * doc/c-i386.texi: Document TSXLDTRK.
102 * testsuite/gas/i386/i386.exp: Run TSXLDTRK tests.
103 * testsuite/gas/i386/tsxldtrk.d: Likewise.
104 * testsuite/gas/i386/tsxldtrk.s: Likewise.
105 * testsuite/gas/i386/x86-64-tsxldtrk.d: Likewise.
106
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1072020-04-02 Lili Cui <lili.cui@intel.com>
108
109 * config/tc-i386.c (cpu_arch): Add .serialize.
110 (cpu_noarch): Likewise.
111 * doc/c-i386.texi: Document serialize.
112 * testsuite/gas/i386/i386.exp: Run serialize tests
113 * testsuite/gas/i386/serialize.d: Likewise.
114 * testsuite/gas/i386/x86-64-serialize.d: Likewise.
115 * testsuite/gas/i386/serialize.s: Likewise.
116
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1172020-04-02 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
118
119 * testsuite/gas/elf/section12a.d: Use notarget instead of xfail.
120 * testsuite/gas/elf/section12b.d: Likewise.
121 * testsuite/gas/elf/section16a.d: Likewise.
122 * testsuite/gas/elf/section16b.d: Likewise.
123
59e28a97
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1242020-04-02 Gunther Nikl <gnikl@justmail.de>
125
126 * config/tc-m68k.c (m68k_ip): Fix range check for index register
127 with a suppressed address register.
128
efc3a950
L
1292020-04-01 H.J. Lu <hongjiu.lu@intel.com>
130
131 PR gas/25756
132 * config/tc-i386.h (TC_FORCE_RELOCATION_ABS): New.
133 * testsuite/gas/i386/localpic.s: Add a test for relocation
134 against local absolute symbol.
135 * testsuite/gas/i386/x86-64-localpic.s: Likewise.
136 * testsuite/gas/i386/localpic.d: Updated.
137 * testsuite/gas/i386/x86-64-localpic.d: Likewise.
138 * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
139
15d47c3a
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1402020-04-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
141
142 PR gas/25732
143 * testsuite/gas/i386/solaris/x86-64-branch-2.d: New file.
144 * testsuite/gas/i386/solaris/x86-64-branch-3.d: New file.
145 * testsuite/gas/i386/solaris/x86-64-jump.d: Incorporate changes to
146 testsuite/gas/i386/x86-64-jump.d.
147 * gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d:
148 Incorporate changes to
149 gas/testsuite/gas/i386/x86-64-mpx-branch-1.d.
150 * testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d : Incorporate
151 changes to testsuite/gas/i386/x86-64-mpx-branch-2.d.
152 * testsuite/gas/i386/x86-64-branch-2.d: Skip on *-*-solaris*.
153 * testsuite/gas/i386/x86-64-branch-3.d: Likewise.
154
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1552020-03-31 Maciej W. Rozycki <macro@linux-mips.org>
156
157 PR 25611
158 PR 25614
159 * dwarf2dbg.c: Do not include "bignum.h".
160
d1a89da5
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1612020-03-30 Nelson Chu <nelson.chu@sifive.com>
162
163 * testsuite/gas/riscv/alias-csr.d: Move this to priv-reg-pseudo.
164 * testsuite/gas/riscv/alias-csr.s: Likewise.
165 * testsuite/gas/riscv/no-aliases-csr.d: Move this
166 to priv-reg-pseudo-noalias.
167 * testsuite/gas/riscv/bad-csr.d: Rename to priv-reg-fail-nonexistent.
168 * testsuite/gas/riscv/bad-csr.l: Likewise.
169 * testsuite/gas/riscv/bad-csr.s: Likewise.
170 * testsuite/gas/riscv/satp.d: Removed. Already included in priv-reg.
171 * testsuite/gas/riscv/satp.s: Likewise.
172 * testsuite/gas/riscv/priv-reg-pseudo.d: New testcase for all pseudo
173 csr instruction, including alias-csr testcase.
174 * testsuite/gas/riscv/priv-reg-pseudo.s: Likewise.
175 * testsuite/gas/riscv/priv-reg-pseudo-noalias.d: New testcase for all
176 pseudo instruction with objdump -Mno-aliases.
177 * testsuite/gas/riscv/priv-reg-fail-nonexistent.d: New testcase.
178 * testsuite/gas/riscv/priv-reg-fail-nonexistent.l: Likewise.
179 * testsuite/gas/riscv/priv-reg-fail-nonexistent.s: Likewise.
180 * testsuite/gas/riscv/priv-reg.d: Update CSR to 1.11.
181 * testsuite/gas/riscv/priv-reg.s: Likewise.
182 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
183 * testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
184 * testsuite/gas/riscv/csr-dw-regnums.s: Likewise.
185
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1862020-03-25 J.W. Jagersma <jwjagersma@gmail.com>
187
188 * config/obj-coff.c (obj_coff_section): Set the bss flag on
189 sections with the "b" attribute.
190
d1023b5d
AM
1912020-03-22 Alan Modra <amodra@gmail.com>
192
193 * testsuite/gas/s12z/truncated.d: Update expected output.
194
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1952020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
196
197 PR 25690
198 * config/tc-z80.c (md_pseudo_table): Add xdef anf xref pseudo ops.
199 * doc/c-z80.texi: Update documentation.
200
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NC
2012020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
202
203 PR 25641
204 PR 25668
205 PR 25633
206 Fix disassembling ED+A4/AC/B4/BC opcodes.
207 Fix assembling lines containing colonless label and instruction
208 with first operand inside parentheses.
209 Fix registration of unsupported by target CPU registers.
210 * config/tc-z80.c: See above.
211 * config/tc-z80.h: See above.
212 * testsuite/gas/z80/colonless.d: Update test.
213 * testsuite/gas/z80/colonless.s: Likewise.
214 * testsuite/gas/z80/ez80_adl_all.d: Likewise.
215 * testsuite/gas/z80/ez80_unsup_regs.d: Likewise.
216 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
217 * testsuite/gas/z80/gbz80_unsup_regs.d: Likewise.
218 * testsuite/gas/z80/r800_unsup_regs.d: Likewise.
219 * testsuite/gas/z80/unsup_regs.s: Likewise.
220 * testsuite/gas/z80/z180_unsup_regs.d: Likewise.
221 * testsuite/gas/z80/z80.exp: Likewise.
222 * testsuite/gas/z80/z80_strict_unsup_regs.d: Likewise.
223 * testsuite/gas/z80/z80_unsup_regs.d: Likewise.
224 * testsuite/gas/z80/z80n_unsup_regs.d: Likewise.
225
66d1f7cc
AV
2262020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
227
228 PR 25660
229 * config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ.
230 (parse_operands): Handle new operand codes.
231 (do_neon_dyadic_long): Make shape check accept the scalar variants.
232 (asm_opcode_insns): Fix operand codes for vaddl and vsubl.
233 * testsuite/gas/arm/mve-vaddsub-it.s: New test.
234 * testsuite/gas/arm/mve-vaddsub-it.d: New test.
235 * testsuite/gas/arm/mve-vaddsub-it-bad.s: New test.
236 * testsuite/gas/arm/mve-vaddsub-it-bad.l: New test.
237 * testsuite/gas/arm/mve-vaddsub-it-bad.d: New test.
238 * testsuite/gas/arm/nomve-vaddsub-it.d: New test.
239
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2402020-03-11 H.J. Lu <hongjiu.lu@intel.com>
241
242 * NEWS: Mention x86 assembler options for CVE-2020-0551.
243
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2442020-03-11 H.J. Lu <hongjiu.lu@intel.com>
245
246 * testsuite/gas/i386/i386.exp: Run new tests.
247 * testsuite/gas/i386/lfence-byte.d: New file.
248 * testsuite/gas/i386/lfence-byte.e: Likewise.
249 * testsuite/gas/i386/lfence-byte.s: Likewise.
250 * testsuite/gas/i386/lfence-indbr-a.d: Likewise.
251 * testsuite/gas/i386/lfence-indbr-b.d: Likewise.
252 * testsuite/gas/i386/lfence-indbr-c.d: Likewise.
253 * testsuite/gas/i386/lfence-indbr.e: Likewise.
254 * testsuite/gas/i386/lfence-indbr.s: Likewise.
255 * testsuite/gas/i386/lfence-load.d: Likewise.
256 * testsuite/gas/i386/lfence-load.s: Likewise.
257 * testsuite/gas/i386/lfence-ret-a.d: Likewise.
258 * testsuite/gas/i386/lfence-ret-b.d: Likewise.
259 * testsuite/gas/i386/lfence-ret.s: Likewise.
260 * testsuite/gas/i386/x86-64-lfence-byte.d: Likewise.
261 * testsuite/gas/i386/x86-64-lfence-byte.e: Likewise.
262 * testsuite/gas/i386/x86-64-lfence-byte.s: Likewise.
263 * testsuite/gas/i386/x86-64-lfence-indbr-a.d: Likewise.
264 * testsuite/gas/i386/x86-64-lfence-indbr-b.d: Likewise.
265 * testsuite/gas/i386/x86-64-lfence-indbr-c.d: Likewise.
266 * testsuite/gas/i386/x86-64-lfence-indbr.e: Likewise.
267 * testsuite/gas/i386/x86-64-lfence-indbr.s: Likewise.
268 * testsuite/gas/i386/x86-64-lfence-load.d: Likewise.
269 * testsuite/gas/i386/x86-64-lfence-load.s: Likewise.
270 * testsuite/gas/i386/x86-64-lfence-ret-a.d: Likewise.
271 * testsuite/gas/i386/x86-64-lfence-ret-b.d: Likewise.
272
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2732020-03-11 H.J. Lu <hongjiu.lu@intel.com>
274
275 * config/tc-i386.c (lfence_after_load): New.
276 (lfence_before_indirect_branch_kind): New.
277 (lfence_before_indirect_branch): New.
278 (lfence_before_ret_kind): New.
279 (lfence_before_ret): New.
280 (last_insn): New.
281 (load_insn_p): New.
282 (insert_lfence_after): New.
283 (insert_lfence_before): New.
284 (md_assemble): Call insert_lfence_before and insert_lfence_after.
285 Set last_insn.
286 (OPTION_MLFENCE_AFTER_LOAD): New.
287 (OPTION_MLFENCE_BEFORE_INDIRECT_BRANCH): New.
288 (OPTION_MLFENCE_BEFORE_RET): New.
289 (md_longopts): Add -mlfence-after-load=,
290 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
291 (md_parse_option): Handle -mlfence-after-load=,
292 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
293 (md_show_usage): Display -mlfence-after-load=,
294 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
295 (i386_cons_align): New.
296 * config/tc-i386.h (i386_cons_align): New.
297 (md_cons_align): New.
298 * doc/c-i386.texi: Document -mlfence-after-load=,
299 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
300
5496f3c6
NC
3012020-03-11 Nick Clifton <nickc@redhat.com>
302
303 PR 25611
304 PR 25614
305 * dwarf2dbg.c (DWARF2_FILE_TIME_NAME): Default to -1.
306 (DWARF2_FILE_SIZE_NAME): Default to -1.
307 (DWARF2_LINE_VERSION): Default to the current dwarf level or 3,
308 whichever is higher.
309 (DWARF2_LINE_MAX_OPS_PER_INSN): Provide a default value of 1.
310 (NUM_MD5_BYTES): Define.
311 (struct file entry): Add md5 field.
312 (get_filenum): Delete and replace with...
313 (get_basename): New function.
314 (get_directory_table_entry): New function.
315 (allocate_filenum): New function.
316 (allocate_filename_to_slot): New function.
317 (dwarf2_where): Use new functions.
318 (dwarf2_directive_filename): Add support for extended .file
319 pseudo-op.
320 (dwarf2_directive_loc): Allow the use of file number zero with
321 DWARF 5 or higher.
322 (out_file_list): Rename to...
323 (out_dir_and_file_list): Add DWARF 5 support.
324 (out_debug_line): Emit extra values into the section header for
325 DWARF 5.
326 (out_debug_str): Allow for file 0 to be used with DWARF 5.
327 * doc/as.texi (.file): Update the description of this pseudo-op.
328 * testsuite/gas/elf-dwarf-5-file0.s: Add more lines.
329 * testsuite/gas/elf-dwarf-5-file0.d: Update expected dump output.
330 * testsuite/gas/lns/lns-diag-1.l: Update expected error message.
331 * NEWS: Mention the new feature.
332
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AM
3332020-03-10 Alan Modra <amodra@gmail.com>
334
335 * config/tc-csky.c (get_operand_value): Rewrite 1 << 31 expressions
336 to avoid signed overflow.
337 * config/tc-mcore.c (md_assemble): Likewise.
338 * config/tc-mips.c (gpr_read_mask, gpr_write_mask): Likewise.
339 * config/tc-nds32.c (SET_ADDEND): Likewise.
340 * config/tc-nios2.c (nios2_assemble_arg_R): Likewise.
341
3fabc179
JB
3422020-03-09 Jan Beulich <jbeulich@suse.com>
343
344 * testsuite/gas/i386/avx.s: Add long-form VCMP[PS][SD] pseudos.
345 * testsuite/gas/i386/avx.d, testsuite/gas/i386/avx-16bit.d,
346 testsuite/gas/i386/avx-intel.d: Adjust expectations.
347
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AM
3482020-03-07 Alan Modra <amodra@gmail.com>
349
350 * testsuite/gas/elf/dwarf-5-file0.s: Don't start directives in
351 first column.
352
84d9ab33
NC
3532020-03-06 Nick Clifton <nickc@redhat.com>
354
355 PR 25614
356 * dwarf2dbg.c (dwarf2_directive_filename): Allow a file number of
357 0 if the dwarf_level is 5 or more. Complain if a filename follows
358 a file 0.
359 * testsuite/gas/elf/dwarf-5-file0.s: New test.
360 * testsuite/gas/elf/dwarf-5-file0.d: New test driver.
361 * testsuite/gas/elf/elf.exp: Run the new test.
362
363 PR 25612
364 * config/tc-ia64.h (DWARF2_VERISION): Fix typo.
365 * doc/as.texi: Fix another typo.
366
31bf1864
NC
3672020-03-06 Nick Clifton <nickc@redhat.com>
368
369 PR 25612
370 * as.c (dwarf_level): Define.
371 (show_usage): Add --gdwarf-3, --gdwarf-4 and --gdwarf-5.
372 (parse_args): Add support for the new options.
373 as.h (dwarf_level): Prototype.
374 * dwarf2dbg.c (DWARF2_VERSION): Use dwarf_level as default version
375 value.
376 * config/tc-ia64.h (DWARF2_VERISION): Update definition.
377 (DWARF2_LINE_VERSION): Remove definition.
378 * doc/as.texi: Document the new options.
379
3c968de5
NC
3802020-03-06 Nick Clifton <nickc@redhat.com>
381
382 PR 25572
383 * as.c (main): Allow matching input and outputs when they are
384 not regular files.
385
bc49bfd8
JB
3862020-03-06 Jan Beulich <jbeulich@suse.com>
387
388 * config/tc-i386.c (match_mem_size): Generalize broadcast special
389 casing.
390 (check_VecOperands): Zap xmmword/ymmword/zmmword when more than
391 one of byte/word/dword/qword is set alongside a SIMD register in
392 a template's operand.
393
4873e243
JB
3942020-03-06 Jan Beulich <jbeulich@suse.com>
395
396 * config/tc-i386.c (match_template): Extend code in logic
397 rejecting certain suffixes in certain modes to also cover mask
398 register use and VecSIB. Drop special casing of broadcast. Skip
399 immediates in the check.
400
e365e234
JB
4012020-03-06 Jan Beulich <jbeulich@suse.com>
402
403 * config/tc-i386.c (match_template): Fold duplicate code in
404 logic rejecting certain suffixes in certain modes. Drop
405 pointless "else".
406
4ed21b58
JB
4072020-03-06 Jan Beulich <jbeulich@suse.com>
408
409 * config/tc-i386.c (process_suffix): Exlucde !vexw insns
410 alongside !norex64 ones.
411 * testsuite/gas/i386/x86-64-avx512bw.s: Test VPEXTR* and VPINSR*
412 with both 32- and 64-bit GPR operands.
413 * testsuite/gas/i386/x86-64-avx512f.s: Test VEXTRACTPS with both
414 32- and 64-bit GPR operands.
415 * testsuite/gas/i386/x86-64-avx512bw-intel.d,
416 testsuite/gas/i386/x86-64-avx512bw.d,
417 testsuite/gas/i386/x86-64-avx512f-intel.d,
418 testsuite/gas/i386/x86-64-avx512f.d: Adjust expectations.
419
643bb870
JB
4202020-03-06 Jan Beulich <jbeulich@suse.com>
421
422 * config/tc-i386.c (md_assemble): Drop use of rex64.
423 (process_suffix): For REX.W for 64-bit CRC32.
424
a23b33b3
JB
4252020-03-06 Jan Beulich <jbeulich@suse.com>
426
427 * config/tc-i386.c (i386_addressing_mode): For 32-bit
428 addressing for MPX insns without base/index.
429 * testsuite/gas/i386/mpx-16bit.s,
430 * testsuite/gas/i386/mpx-16bit.d: New.
431 * testsuite/gas/i386/i386.exp: Run new test.
432
a0497384
JB
4332020-03-06 Jan Beulich <jbeulich@suse.com>
434
435 * testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
436 testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
437 testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
438 testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
439 * testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
440 as well as a BSWAP one.
441 * testsuite/gas/i386/rdpid.s: Add 16-bit case.
442 * testsuite/gas/i386/sse2-16bit.s: Cover more insns.
443 * testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
444 testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
445 testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
446 testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
447 testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
448 testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
449 testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
450 testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
451 testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
452 testsuite/gas/i386/vmx.d: Adjust expectations.
453
b630c145
JB
4542020-03-06 Jan Beulich <jbeulich@suse.com>
455
456 * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
457 from having their operands swapped.
458 * testsuite/gas/i386/waitpkg.s,
459 testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
460 3-operand cases as well as testing of 16-bit code generation.
461 * testsuite/gas/i386/waitpkg.d,
462 testsuite/gas/i386/waitpkg-intel.d,
463 testsuite/gas/i386/x86-64-waitpkg.d,
464 testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
465
de48783e
NC
4662020-03-04 Nelson Chu <nelson.chu@sifive.com>
467
dee35d02
NC
468 * config/tc-riscv.c (percent_op_utype): Support the modifier
469 %got_pcrel_hi.
470 * doc/c-riscv.texi: Add documentation.
471 * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
472 modifier %got_pcrel_hi.
473 * testsuite/gas/riscv/no-relax-reloc.s: Likewise.
474 * testsuite/gas/riscv/relax-reloc.d: Likewise.
475 * testsuite/gas/riscv/relax-reloc.s: Likewise.
476
de48783e
NC
477 * doc/c-riscv.texi (relocation modifiers): Add documentation.
478 (RISC-V-Formats): Update the section name from "Instruction Formats"
479 to "RISC-V Instruction Formats".
480
749479c8
AO
4812020-03-04 Alexandre Oliva <oliva@adacore.com>
482
483 * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
484 detected in a section which does not have at least 4 byte
485 alignment.
486 * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
487 * testsuite/gas/arm/ldr-t.s: Likewise.
488 * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
489 * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
490 disassembly, ignoring any NOPs that may have been inserted because
491 of section alignment.
492 * testsuite/gas/arm/ldr-t.d: Likewise.
493
a847e322
JB
4942020-03-04 Jan Beulich <jbeulich@suse.com>
495
496 * config/tc-i386.c (cpu_arch): Add .sev_es entry.
497 * doc/c-i386.texi: Mention sev_es.
498 * testsuite/gas/i386/arch-13.s: Add SEV-ES case.
499 * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
500 expectations.
501 * testsuite/gas/i386/arch-13-znver1.d,
502 testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
503
3cd7f3e3
L
5042020-03-03 H.J. Lu <hongjiu.lu@intel.com>
505
506 * config/tc-i386.c (match_template): Replace ignoresize and
507 defaultsize with mnemonicsize.
508 (process_suffix): Likewise.
509
b8ba1385
SB
5102020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
511
512 PR 25627
513 * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
514 instruction LD IY,(HL).
515 * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
516 * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
517 * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
518 * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
519
10d97a0f
L
5202020-03-03 H.J. Lu <hongjiu.lu@intel.com>
521
522 PR gas/25622
523 * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
524 x86-64-default-suffix-avx.
525 * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
526 vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
527 * testsuite/gas/i386/noreg64.d: Updated.
528 * testsuite/gas/i386/noreg64.l: Likewise.
529 * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
530 * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
531 * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
532
8326546e
SB
5332020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
534
535 PR 25604
536 * config/tc-z80.c (contains_register): Prevent an illegal memory
537 access when checking an expression for a register name.
538
e3e896e6
AM
5392020-03-03 Alan Modra <amodra@gmail.com>
540
541 * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
542 support.
543
a4dd6c97
AM
5442020-03-02 Alan Modra <amodra@gmail.com>
545
546 * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
547 * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
548 and .sbss sections.
549 * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
550 (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
551 (s3_s_score_lcomm): Likewise.
552 * config/tc-score7.c: Similarly.
553 * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
554
dec7b24b
YS
5552020-02-28 YunQiang Su <syq@debian.org>
556
557 PR gas/25539
558 * config/tc-mips.c (fix_loongson3_llsc): Compare label value
559 to handle multi-labels.
560 (has_label_name): New.
561
cceb53b8
MM
5622020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
563
564 * config/tc-arm.c (enum pred_instruction_type): Remove
565 NEUTRAL_IT_NO_VPT_INSN predication type.
566 (cxn_handle_predication): Modify to require condition suffixes.
567 (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
568 * testsuite/gas/arm/cde-scalar.s: Update test.
569 * testsuite/gas/arm/cde-warnings.l: Update test.
570 * testsuite/gas/arm/cde-warnings.s: Update test.
571
da3ec71f
AM
5722020-02-26 Alan Modra <amodra@gmail.com>
573
574 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
575 N_() on empty string.
576
42135cad
AM
5772020-02-26 Alan Modra <amodra@gmail.com>
578
579 * read.c (read_a_source_file): Call strncpy with length one
580 less than size of original_case_string.
581
dc1e8a47
AM
5822020-02-26 Alan Modra <amodra@gmail.com>
583
584 * config/obj-elf.c: Indent labels correctly.
585 * config/obj-macho.c: Likewise.
586 * config/tc-aarch64.c: Likewise.
587 * config/tc-alpha.c: Likewise.
588 * config/tc-arm.c: Likewise.
589 * config/tc-cr16.c: Likewise.
590 * config/tc-crx.c: Likewise.
591 * config/tc-frv.c: Likewise.
592 * config/tc-i386-intel.c: Likewise.
593 * config/tc-i386.c: Likewise.
594 * config/tc-ia64.c: Likewise.
595 * config/tc-mn10200.c: Likewise.
596 * config/tc-mn10300.c: Likewise.
597 * config/tc-nds32.c: Likewise.
598 * config/tc-riscv.c: Likewise.
599 * config/tc-s12z.c: Likewise.
600 * config/tc-xtensa.c: Likewise.
601 * config/tc-z80.c: Likewise.
602 * read.c: Likewise.
603 * symbols.c: Likewise.
604 * write.c: Likewise.
605
bd0cf5a6
NC
6062020-02-20 Nelson Chu <nelson.chu@sifive.com>
607
54b2aec1
NC
608 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
609 we are assembling instruction with CSR. Call riscv_csr_read_only_check
610 after parsing all arguments.
611 (enum csr_insn_type): New enum is used to classify the CSR instruction.
612 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
613 are used to check if we write a read-only CSR by the CSR instruction.
614 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
615 all CSR for the read-only CSR checking.
616 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
617 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
618 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
619 all CSR instructions for the read-only CSR checking.
620 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
621 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
622
2ca89224
NC
623 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
624 (riscv_opts): Initialize it.
625 (reg_lookup_internal): Check the `riscv_opts.csr_check`
626 before doing the CSR checking.
627 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
628 (md_longopts): Add mcsr-check and mno-csr-check.
629 (md_parse_option): Handle new enum option values.
630 (s_riscv_option): Handle new long options.
631 * doc/c-riscv.texi: Add description for the new .option and assembler
632 options.
633 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
634 the CSR checking.
635 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
636
bd0cf5a6
NC
637 * config/tc-riscv.c (csr_extra_hash): New.
638 (enum riscv_csr_class): New enum. Used to decide
639 whether or not this CSR is legal in the current ISA string.
640 (struct riscv_csr_extra): New structure to hold all extra information
641 of CSR.
642 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
643 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
644 Call hash_reg_name to insert CSR address into reg_names_hash.
645 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
646 Decide whether the CSR is valid according to the csr_extra_hash.
647 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
648 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
649 not a boolean. This is same as riscv_init_csr_hash, so keep the
650 consistent usage.
651 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
652 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
653 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
654 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
655 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
656 f-ext CSR are not allowed.
657 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
658 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
659 source file is `priv-reg.s`, and the ISA is rv64if, so the
660 rv32-only CSR are not allowed.
661 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
662
10a95fcc
AM
6632020-02-21 Alan Modra <amodra@gmail.com>
664
665 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
666 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
667
dda2980f
AM
6682020-02-21 Alan Modra <amodra@gmail.com>
669
670 PR 25569
671 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
672 on section size adjustment, instead perform another write if
673 exec header size is larger than section size.
674
bd3380bc
NC
6752020-02-19 Nelson Chu <nelson.chu@sifive.com>
676
677 * doc/c-riscv.texi: Add the doc entries for -march-attr/
678 -mno-arch-attr command line options.
679
fa164239
JW
6802020-02-19 Nelson Chu <nelson.chu@sifive.com>
681
682 * testsuite/gas/riscv/c-add-addi.d: New testcase.
683 * testsuite/gas/riscv/c-add-addi.s: Likewise.
684
fcaaac0a
SB
6852020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
686
687 PR 25576
688 * config/tc-z80.c (md_parse_option): Do not use an underscore
689 prefix for local labels in SDCC compatability mode.
690 (z80_start_line_hook): Remove SDCC dollar label support.
691 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
692 * testsuite/gas/z80/sdcc.s: Likewise.
693
6942020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
695
696 PR 25517
697 * config/tc-z80.c: Add -march option.
698 * doc/as.texi: Update Z80 documentation.
699 * doc/c-z80.texi: Likewise.
700 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
701 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
702 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
703 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
704 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
705 * testsuite/gas/z80/gbz80_all.d: Likewise.
706 * testsuite/gas/z80/r800_extra.d: Likewise.
707 * testsuite/gas/z80/r800_ii8.d: Likewise.
708 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
709 * testsuite/gas/z80/sdcc.d: Likewise.
710 * testsuite/gas/z80/z180.d: Likewise.
711 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
712 * testsuite/gas/z80/z80_doc.d: Likewise.
713 * testsuite/gas/z80/z80_ii8.d: Likewise.
714 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
715 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
716 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
717 * testsuite/gas/z80/z80_sli.d: Likewise.
718 * testsuite/gas/z80/z80n_all.d: Likewise.
719 * testsuite/gas/z80/z80n_reloc.d: Likewise.
720
a7e12755
L
7212020-02-19 H.J. Lu <hongjiu.lu@intel.com>
722
723 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
724 with GNU_PROPERTY_X86_FEATURE_2_MMX.
725 * testsuite/gas/i386/i386.exp: Run property-3 and
726 x86-64-property-3.
727 * testsuite/gas/i386/property-3.d: New file.
728 * testsuite/gas/i386/property-3.s: Likewise.
729 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
730
272a84b1
L
7312020-02-17 H.J. Lu <hongjiu.lu@intel.com>
732
733 * config/tc-i386.c (cpu_arch): Add .popcnt.
734 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
735 Add a tab before @samp{.sse4a}.
736
c8f8eebc
JB
7372020-02-17 Jan Beulich <jbeulich@suse.com>
738
739 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
740 for AddrPrefixOpReg templates. Combine the two pieces of
741 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
742 mode.
743
eedb0f2c
JB
7442020-02-17 Jan Beulich <jbeulich@suse.com>
745
746 PR gas/14439
747 * config/tc-i386.c (md_assemble): Also suppress operand
748 swapping for MONITOR{,X} and MWAIT{,X}.
749 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
750 Add Intel syntax monitor/mwait tests.
751 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
752 Adjust expectations.
753 *testsuite/gas/i386/sse3-intel.d,
754 testsuite/gas/i386/x86-64-sse3-intel.d: New.
755 * testsuite/gas/i386/i386.exp: Run new tests.
756
b9915cbc
JB
7572020-02-17 Jan Beulich <jbeulich@suse.com>
758
759 PR gas/6518
760 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
761 [XYZ]MMWord memory operand ambiguity recognition logic (largely
762 re-indentation).
763 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
764 cases.
765 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
766 * testsuite/gas/i386/avx512dq-inval.l,
767 testsuite/gas/i386/inval-avx.l,
768 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
769 * testsuite/gas/i386/avx512vl-ambig.s,
770 testsuite/gas/i386/avx512vl-ambig.l: New.
771 * testsuite/gas/i386/i386.exp: Run new test.
772
af5c13b0
L
7732020-02-16 H.J. Lu <hongjiu.lu@intel.com>
774
775 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
776 nosse4.
777 * doc/c-i386.texi: Document sse4a and nosse4a.
778
07d98387
L
7792020-02-14 H.J. Lu <hongjiu.lu@intel.com>
780
781 * doc/c-i386.texi: Remove the old movsx and movzx documentation
782 for AT&T syntax.
783
65fca059
JB
7842020-02-14 Jan Beulich <jbeulich@suse.com>
785
786 PR gas/25438
787 * config/tc-i386.c (md_assemble): Move movsx/movzx special
788 casing ...
789 (process_suffix): ... here. Consider just the first operand
790 initially.
791 (check_long_reg): Drop opcode 0x63 special case again.
792 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
793 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
794 Move ambiguous operand size tests ...
795 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
796 testsuite/gas/i386/noreg64.s: ... here.
797 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
798 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
799 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
800 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
801 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
802 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
803 testsuite/gas/i386/x86-64-movsxd.d,
804 testsuite/gas/i386/x86-64-movsxd-intel.d,
805 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
806 Adjust expectations.
807 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
808 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
809 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
810 * testsuite/gas/i386/i386.exp: Run new tests.
811
b6773884
JB
8122020-02-14 Jan Beulich <jbeulich@suse.com>
813
814 * config/tc-i386.c (process_operands): Also skip segment
815 override prefix emission if it matches an already present one.
816 * testsuite/gas/i386/prefix32.s: Add double segment override
817 cases.
818 * testsuite/gas/i386/prefix32.l: Adjust expectations.
819
92334ad2
JB
8202020-02-14 Jan Beulich <jbeulich@suse.com>
821
822 * config/tc-i386.c (process_operands): Drop ineffectual segment
823 overrides when optimizing.
824 * testsuite/gas/i386/lea-optimize.d: New.
825 * testsuite/gas/i386/i386.exp: Run new test.
826
8272020-02-14 Jan Beulich <jbeulich@suse.com>
514a8bb0
JB
828
829 * config/tc-i386.c (process_operands): Also check insn prefix
830 for ineffectual segment override warning. Don't cover possible
831 VEX/EVEX encoded insns there.
832 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
833 testsuite/gas/i386/lea.e: New.
834 * testsuite/gas/i386/i386.exp: Run new test.
835
0e6724de
L
8362020-02-14 H.J. Lu <hongjiu.lu@intel.com>
837
838 PR gas/25438
839 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
840 syntax.
841
292676c1
L
8422020-02-13 Fangrui Song <maskray@google.com>
843 H.J. Lu <hongjiu.lu@intel.com>
844
845 PR gas/25551
846 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
847 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
848 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
849 * testsuite/gas/i386/relax-5.d: New file.
850 * testsuite/gas/i386/relax-5.s: Likewise.
851 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
852 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
853
7deea9aa
JB
8542020-02-13 Jan Beulich <jbeulich@suse.com>
855
856 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
857 "nosse4" entry.
858
6c0946d0
JB
8592020-02-12 Jan Beulich <jbeulich@suse.com>
860
861 * config/tc-i386.c (avx512): New (at file scope), moved from
862 (check_VecOperands): ... here.
863 (process_suffix): Add [XYZ]MMword operand size handling.
864 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
865 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
866 tests.
867 * testsuite/gas/i386/avx512dq-inval.l,
868 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
869
5990e377
JB
8702020-02-12 Jan Beulich <jbeulich@suse.com>
871
872 PR gas/24546
873 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
874 code only.
875 * config/tc-i386-intel.c (i386_intel_operand): Also handle
876 CALL/JMP in O_tbyte_ptr case.
877 * doc/c-i386.texi: Mention far call and full pointer load ISA
878 differences.
879 * testsuite/gas/i386/x86-64-branch-3.s,
880 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
881 * testsuite/gas/i386/x86-64-branch-3.d,
882 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
883 * testsuite/gas/i386/x86-64-branch-5.l,
884 testsuite/gas/i386/x86-64-branch-5.s: New.
885 * testsuite/gas/i386/i386.exp: Run new test.
886
9706160a
JB
8872020-02-12 Jan Beulich <jbeulich@suse.com>
888
889 PR gas/25438
890 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
891 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
892 64-bit-only warning.
893 (check_word_reg): Consistently error on mismatching register
894 size and suffix.
895 * testsuite/gas/i386/general.s: Replace dword GPR with word one
896 for movw. Replace suffix / GPR for orb.
897 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
898 byte GPRs as well as ones for inb/outb with a word accumulator.
899 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
900 testsuite/gas/i386/inval.l: Adjust expectations.
901
5de4d9ef
JB
9022020-02-12 Jan Beulich <jbeulich@suse.com>
903
904 * config/tc-i386.c (operand_type_register_match): Also fall
905 through initial two if()-s when the template allows for a GPR
906 operand. Adjust comment.
907
50128d0c
JB
9082020-02-11 Jan Beulich <jbeulich@suse.com>
909
910 (struct _i386_insn): New field "short_form".
911 (optimize_encoding): Drop setting of shortform field.
912 (process_suffix): Set i.short_form. Replace shortform use.
913 (process_operands): Replace shortform use.
914
1ed818b4
MM
9152020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
916
917 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
918 loop initial declaration.
919
5aae9ae9
MM
9202020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
921
922 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
923 instructions that can have 5 arguments.
924 (enum operand_parse_code): Add new operands.
925 (parse_operands): Account for new operands.
926 (S5): New macro.
927 (enum neon_shape_el): Introduce P suffixes for coprocessor.
928 (neon_select_shape): Account for P suffix.
929 (LOW1): Move macro to global position.
930 (HI4): Move macro to global position.
931 (vcx_assign_vec_d): New.
932 (vcx_assign_vec_m): New.
933 (vcx_assign_vec_n): New.
934 (enum vcx_reg_type): New.
935 (vcx_get_reg_type): New.
936 (vcx_size_pos): New.
937 (vcx_vec_pos): New.
938 (vcx_handle_shape): New.
939 (vcx_ensure_register_in_range): New.
940 (vcx_handle_register_arguments): New.
941 (vcx_handle_insn_block): New.
942 (vcx_handle_common_checks): New.
943 (do_vcx1): New.
944 (do_vcx2): New.
945 (do_vcx3): New.
946 * testsuite/gas/arm/cde-missing-fp.d: New test.
947 * testsuite/gas/arm/cde-missing-fp.l: New test.
948 * testsuite/gas/arm/cde-missing-mve.d: New test.
949 * testsuite/gas/arm/cde-missing-mve.l: New test.
950 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
951 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
952 * testsuite/gas/arm/cde-mve.s: New test.
953 * testsuite/gas/arm/cde-warnings.l:
954 * testsuite/gas/arm/cde-warnings.s:
955 * testsuite/gas/arm/cde.d:
956 * testsuite/gas/arm/cde.s:
957
4934a27c
MM
9582020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
959 Matthew Malcomson <matthew.malcomson@arm.com>
960
961 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
962 CDE coprocessor that can be enabled.
963 (enum pred_instruction_type): New pred type.
964 (BAD_NO_VPT): New error message.
965 (BAD_CDE): New error message.
966 (BAD_CDE_COPROC): New error message.
967 (enum operand_parse_code): Add new immediate operands.
968 (parse_operands): Account for new immediate operands.
969 (check_cde_operand): New.
970 (cde_coproc_enabled): New.
971 (cde_coproc_pos): New.
972 (cde_handle_coproc): New.
973 (cxn_handle_predication): New.
974 (do_custom_instruction_1): New.
975 (do_custom_instruction_2): New.
976 (do_custom_instruction_3): New.
977 (do_cx1): New.
978 (do_cx1a): New.
979 (do_cx1d): New.
980 (do_cx1da): New.
981 (do_cx2): New.
982 (do_cx2a): New.
983 (do_cx2d): New.
984 (do_cx2da): New.
985 (do_cx3): New.
986 (do_cx3a): New.
987 (do_cx3d): New.
988 (do_cx3da): New.
989 (handle_pred_state): Define new IT block behaviour.
990 (insns): Add newn CX*{,d}{,a} instructions.
991 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
992 Define new cdecp extension strings.
993 * doc/c-arm.texi: Document new cdecp extension arguments.
994 * testsuite/gas/arm/cde-scalar.d: New test.
995 * testsuite/gas/arm/cde-scalar.s: New test.
996 * testsuite/gas/arm/cde-warnings.d: New test.
997 * testsuite/gas/arm/cde-warnings.l: New test.
998 * testsuite/gas/arm/cde-warnings.s: New test.
999 * testsuite/gas/arm/cde.d: New test.
1000 * testsuite/gas/arm/cde.s: New test.
1001
4b5aaf5f
L
10022020-02-10 H.J. Lu <hongjiu.lu@intel.com>
1003
1004 PR gas/25516
1005 * config/tc-i386.c (intel64): Renamed to ...
1006 (isa64): This.
1007 (match_template): Accept Intel64 only instruction by default.
1008 (i386_displacement): Updated.
1009 (md_parse_option): Updated.
1010 * c-i386.texi: Update -mamd64/-mintel64 documentation.
1011 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
1012 -mamd64 to x86-64-sysenter-amd.
1013 * testsuite/gas/i386/x86-64-sysenter.d: New file.
1014
33176d91
AM
10152020-02-10 Alan Modra <amodra@gmail.com>
1016
1017 * config/obj-elf.c (obj_elf_change_section): Error for section
1018 type, attr or entsize changes in assembly.
1019 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
1020 * testsuite/gas/elf/section5.l: Update.
1021
82194874
AM
10222020-02-10 Alan Modra <amodra@gmail.com>
1023
1024 * output-file.c (output_file_close): Do a normal close when
1025 flag_always_generate_output.
1026 * write.c (write_object_file): Don't stop output when
1027 flag_always_generate_output.
1028
9fc0b501
SB
10292020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
1030
1031 PR 25469
1032 * config/tc-z80.c: Add -gbz80 command line option to generate code
1033 for the GameBoy Z80. Add support for generating DWARF.
1034 * config/tc-z80.h: Add support for DWARF debug information
1035 generation.
1036 * doc/c-z80.texi: Document new command line option.
1037 * testsuite/gas/z80/gbz80_all.d: New file.
1038 * testsuite/gas/z80/gbz80_all.s: New file.
1039 * testsuite/gas/z80/z80.exp: Run the new tests.
1040 * testsuite/gas/z80/z80n_all.d: New file.
1041 * testsuite/gas/z80/z80n_all.s: New file.
1042 * testsuite/gas/z80/z80n_reloc.d: New file.
1043
b7d07216
L
10442020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1045
1046 PR gas/25381
1047 * config/obj-elf.c (get_section): Also check
1048 linked_to_symbol_name.
1049 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
1050 (obj_elf_parse_section_letters): Handle the 'o' flag.
1051 (build_group_lists): Renamed to ...
1052 (build_additional_section_info): This. Set elf_linked_to_section
1053 from map_head.linked_to_symbol_name.
1054 (elf_adjust_symtab): Updated.
1055 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
1056 * doc/as.texi: Document the 'o' flag.
1057 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
1058 * testsuite/gas/elf/section18.d: New file.
1059 * testsuite/gas/elf/section18.s: Likewise.
1060 * testsuite/gas/elf/section19.d: Likewise.
1061 * testsuite/gas/elf/section19.s: Likewise.
1062 * testsuite/gas/elf/section20.d: Likewise.
1063 * testsuite/gas/elf/section20.s: Likewise.
1064 * testsuite/gas/elf/section21.d: Likewise.
1065 * testsuite/gas/elf/section21.l: Likewise.
1066 * testsuite/gas/elf/section21.s: Likewise.
1067
5eb617a7
L
10682020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1069
1070 * NEWS: Mention x86 assembler options to align branches for
1071 binutils 2.34.
1072
986ac314
L
10732020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1074
1075 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
1076 only for ELF targets.
1077 * testsuite/gas/i386/unique.d: Don't xfail.
1078 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1079
19234a6d
AM
10802020-02-06 Alan Modra <amodra@gmail.com>
1081
1082 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
1083 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1084
02e0be69
AM
10852020-02-06 Alan Modra <amodra@gmail.com>
1086
1087 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
1088 xfail, and rename test.
1089 * testsuite/gas/elf/section12b.d: Likewise.
1090 * testsuite/gas/elf/section16a.d: Likewise.
1091 * testsuite/gas/elf/section16b.d: Likewise.
1092
a8c4d40b
L
10932020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1094
1095 PR gas/25380
1096 * config/obj-elf.c (section_match): Removed.
1097 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
1098 section_id.
1099 (obj_elf_change_section): Replace info and group_name arguments
1100 with match_p. Also update the section ID and flags from match_p.
1101 (obj_elf_section): Handle "unique,N". Update call to
1102 obj_elf_change_section.
1103 * config/obj-elf.h (elf_section_match): New.
1104 (obj_elf_change_section): Updated.
1105 * config/tc-arm.c (start_unwind_section): Update call to
1106 obj_elf_change_section.
1107 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
1108 * config/tc-microblaze.c (microblaze_s_data): Likewise.
1109 (microblaze_s_sdata): Likewise.
1110 (microblaze_s_rdata): Likewise.
1111 (microblaze_s_bss): Likewise.
1112 * config/tc-mips.c (s_change_section): Likewise.
1113 * config/tc-msp430.c (msp430_profiler): Likewise.
1114 * config/tc-rx.c (parse_rx_section): Likewise.
1115 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
1116 * doc/as.texi: Document "unique,N" in .section directive.
1117 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
1118 * testsuite/gas/elf/section15.d: New file.
1119 * testsuite/gas/elf/section15.s: Likewise.
1120 * testsuite/gas/elf/section16.s: Likewise.
1121 * testsuite/gas/elf/section16a.d: Likewise.
1122 * testsuite/gas/elf/section16b.d: Likewise.
1123 * testsuite/gas/elf/section17.d: Likewise.
1124 * testsuite/gas/elf/section17.l: Likewise.
1125 * testsuite/gas/elf/section17.s: Likewise.
1126 * testsuite/gas/i386/unique.d: Likewise.
1127 * testsuite/gas/i386/unique.s: Likewise.
1128 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1129 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
1130
575d37ae
L
11312020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1132
1133 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
1134
2384096c
G
11352020-02-01 Anthony Green <green@moxielogic.com>
1136
1137 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
1138
95441c43
SL
11392020-01-31 Sandra Loosemore <sandra@codesourcery.com>
1140
1141 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
1142 %tls_ldo.
1143
d465d695
AV
11442020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
1145
1146 PR gas/25472
1147 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
1148 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
1149 +mve.
1150 * testsuite/gas/arm/mve_dsp.d: New test.
1151
d26cc8a9
NC
11522020-01-31 Nick Clifton <nickc@redhat.com>
1153
1154 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
1155 rather than BFD_RELOC_NONE.
1156
90e9955a
SP
11572020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1158
1159 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
1160 to support VLDMIA instruction for MVE.
1161 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
1162 instruction for MVE.
1163 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
1164 instruction for MVE.
1165 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
1166 instruction for MVE.
1167 * testsuite/gas/arm/mve-ldst.d: New test.
1168 * testsuite/gas/arm/mve-ldst.s: Likewise.
1169
53943f32
NC
11702020-01-31 Nick Clifton <nickc@redhat.com>
1171
1172 * po/fr.po: Updated French translation.
1173 * po/ru.po: Updated Russian translation.
1174
c3036ed0
RS
11752020-01-31 Richard Sandiford <richard.sandiford@arm.com>
1176
1177 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
1178 .s for the movprfx.
1179 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
1180 * testsuite/gas/aarch64/sve-movprfx_28.d,
1181 * testsuite/gas/aarch64/sve-movprfx_28.l,
1182 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
1183
2ae4c703
JB
11842020-01-30 Jan Beulich <jbeulich@suse.com>
1185
1186 * config/tc-i386.c (output_disp): Tighten base_opcode check.
1187 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
1188 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
1189 Adjust expectations.
1190
bd434cc4
JM
11912020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
1192
1193 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
1194 * testsuite/gas/bpf/alu-be.d: Likewise.
1195 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
1196 * testsuite/gas/bpf/alu32-be.d: Likewise.
1197
aeab2b26
JB
11982020-01-30 Jan Beulich <jbeulich@suse.com>
1199
1200 * testsuite/gas/i386/x86-64-branch-2.s,
1201 testsuite/gas/i386/x86-64-branch-4.s,
1202 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
1203 * testsuite/gas/i386/ilp32/x86-64-branch.d,
1204 testsuite/gas/i386/x86-64-branch-2.d,
1205 testsuite/gas/i386/x86-64-branch-4.l,
1206 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
1207
873494c8
JB
12082020-01-30 Jan Beulich <jbeulich@suse.com>
1209
1210 * config/tc-i386.c (process_suffix): .
1211 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
1212 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
1213 Add LRETQ case.
1214 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
1215 suffix.
1216 testsuite/gas/i386/x86_64.s: Add RETF cases.
1217 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
1218 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
1219 testsuite/gas/i386/x86-64-opcode.d,
1220 testsuite/gas/i386/x86-64-suffix-intel.d,
1221 testsuite/gas/i386/x86-64-suffix.d,
1222 testsuite/gas/i386/x86_64-intel.d
1223 testsuite/gas/i386/x86_64.d: Adjust expectations.
1224 * testsuite/gas/i386/x86-64-suffix.e,
1225 testsuite/gas/i386/x86_64.e: New.
1226
62b3f548
JB
12272020-01-30 Jan Beulich <jbeulich@suse.com>
1228
1229 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
1230 special case.
1231
bc31405e
L
12322020-01-27 H.J. Lu <hongjiu.lu@intel.com>
1233
1234 PR binutils/25445
1235 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
1236 movsxd.
1237 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
1238 differences. Document movslq and movsxd.
1239 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
1240 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
1241 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
1242 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
1243 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
1244 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
1245 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
1246 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
1247 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
1248 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
1249 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
1250
e3696f67
AM
12512020-01-27 Alan Modra <amodra@gmail.com>
1252
1253 * testsuite/gas/all/gas.exp: Replace case statements with switch
1254 statements.
1255 * testsuite/gas/elf/elf.exp: Likewise.
1256 * testsuite/gas/macros/macros.exp: Likewise.
1257 * testsuite/lib/gas-defs.exp: Likewise.
1258
7568c93b
TC
12592020-01-27 Tamar Christina <tamar.christina@arm.com>
1260
1261 PR 25403
1262 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
1263 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
1264
403d1bd9
JW
12652020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
1266
1267 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
1268 s exts must be known, so rename *ok* to *fail*.
1269 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
1270 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
1271 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
1272 above change.
1273 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
1274 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
1275
be4c5e58
L
12762020-01-22 H.J. Lu <hongjiu.lu@intel.com>
1277
1278 PR gas/25438
1279 * config/tc-i386.c (check_long_reg): Always disallow double word
1280 suffix in mnemonic with word general register.
1281 * testsuite/gas/i386/general.s: Replace word general register
1282 with double word general register for movl.
1283 * testsuite/gas/i386/inval.s: Add tests for movl with word general
1284 register.
1285 * testsuite/gas/i386/general.l: Updated.
1286 * testsuite/gas/i386/inval.l: Likewise.
1287
9e7028aa
AM
12882020-01-22 Alan Modra <amodra@gmail.com>
1289
1290 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
1291 __tls_get_addr_desc and __tls_get_addr_opt.
1292
e3ed17f3
JB
12932020-01-21 Jan Beulich <jbeulich@suse.com>
1294
1295 * testsuite/gas/i386/inval-crc32.s,
1296 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
1297 * testsuite/gas/i386/inval-crc32.l,
1298 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
1299
1a035124
JB
13002020-01-21 Jan Beulich <jbeulich@suse.com>
1301
1302 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
1303 generic code path. Deal with No_lSuf being set in a template.
1304 * testsuite/gas/i386/inval-crc32.l,
1305 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
1306 instead of error(s) when operand size is ambiguous.
1307 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1308 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
1309 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
1310 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
1311 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
1312 Adjust expectations.
1313
c006a730
JB
13142020-01-21 Jan Beulich <jbeulich@suse.com>
1315
1316 * config/tc-i386.c (process_suffix): Drop SYSRET special case
1317 and an intel_syntax check. Re-write lack-of-suffix processing
1318 logic.
1319 * doc/c-i386.texi: Document operand size defaults for suffix-
1320 less AT&T syntax insns.
1321 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
1322 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
1323 testsuite/gas/i386/x86-64-avx-scalar.s,
1324 testsuite/gas/i386/x86-64-avx.s,
1325 testsuite/gas/i386/x86-64-bundle.s,
1326 testsuite/gas/i386/x86-64-intel64.s,
1327 testsuite/gas/i386/x86-64-lock-1.s,
1328 testsuite/gas/i386/x86-64-opcode.s,
1329 testsuite/gas/i386/x86-64-sse2avx.s,
1330 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
1331 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
1332 testsuite/gas/i386/x86-64-nops.s,
1333 testsuite/gas/i386/x86-64-ptwrite.s,
1334 testsuite/gas/i386/x86-64-simd.s,
1335 testsuite/gas/i386/x86-64-sse-noavx.s,
1336 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
1337 insns.
1338 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1339 testsuite/gas/i386/noreg64.s: Add further tests.
1340 * testsuite/gas/i386/ilp32/x86-64-nops.d,
1341 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
1342 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
1343 testsuite/gas/i386/sse-noavx.d,
1344 testsuite/gas/i386/x86-64-intel64.d,
1345 testsuite/gas/i386/x86-64-nops.d,
1346 testsuite/gas/i386/x86-64-opcode.d,
1347 testsuite/gas/i386/x86-64-ptwrite-intel.d,
1348 testsuite/gas/i386/x86-64-ptwrite.d,
1349 testsuite/gas/i386/x86-64-simd-intel.d,
1350 testsuite/gas/i386/x86-64-simd-suffix.d,
1351 testsuite/gas/i386/x86-64-simd.d,
1352 testsuite/gas/i386/x86-64-sse-noavx.d
1353 testsuite/gas/i386/x86-64-suffix.d,
1354 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
1355 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
1356 testsuite/gas/i386/noreg64.l: New.
1357 * testsuite/gas/i386/i386.exp: Run new tests.
1358
c906a69a
JB
13592020-01-21 Jan Beulich <jbeulich@suse.com>
1360
1361 * testsuite/gas/i386/avx512_bf16_vl.s,
1362 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
1363 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
1364 broadcast forms of VCVTNEPS2BF16.
1365 * testsuite/gas/i386/avx512_bf16_vl.d,
1366 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
1367
26916852
NC
13682020-01-20 Nick Clifton <nickc@redhat.com>
1369
1370 * po/uk.po: Updated Ukranian translation.
1371
14470f07
L
13722020-01-20 H.J. Lu <hongjiu.lu@intel.com>
1373
1374 PR ld/25416
1375 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
1376 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
1377 x32 object.
1378 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
1379 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
1380 R_X86_64_GOTPC32_TLSDESC relocation.
1381
1b1bb2c6
NC
13822020-01-18 Nick Clifton <nickc@redhat.com>
1383
1384 * configure: Regenerate.
1385 * po/gas.pot: Regenerate.
1386
ae774686
NC
13872020-01-18 Nick Clifton <nickc@redhat.com>
1388
1389 Binutils 2.34 branch created.
1390
42e04b36
L
13912020-01-17 H.J. Lu <hongjiu.lu@intel.com>
1392
1393 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
1394 with vex_encoding_vex.
1395 (parse_insn): Likewise.
1396 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
1397 and {vex3} documentation.
1398 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
1399 {vex}.
1400 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
1401
2da2eaf4
AV
14022020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
1403
1404 PR 25376
1405 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
1406 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
1407 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
1408 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
1409 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
1410 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
1411
45a4bb20
JB
14122020-01-16 Jan Beulich <jbeulich@suse.com>
1413
1414 * config/tc-i386.c (match_template): Drop found_cpu_match local
1415 variable.
1416
4814632e
JB
14172020-01-16 Jan Beulich <jbeulich@suse.com>
1418
1419 * testsuite/gas/i386/avx512dq-inval.l,
1420 testsuite/gas/i386/avx512dq-inval.s: New.
1421 * testsuite/gas/i386/i386.exp: Run new test.
1422
131cb553
JL
14232020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1424
1425 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
1426 relocations when the target is 430X, except when extracting part of an
1427 expression.
1428 (msp430_srcoperand): Adjust comment.
1429 Initialize the expp member of the msp430_operand_s struct as
1430 appropriate.
1431 (msp430_dstoperand): Likewise.
1432 * testsuite/gas/msp430/msp430.exp: Run new test.
1433 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
1434 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
1435
c24d0e8d
AM
14362020-01-15 Alan Modra <amodra@gmail.com>
1437
1438 * configure.tgt: Add sparc-*-freebsd case.
1439
e44925ae
LC
14402020-01-14 Lili Cui <lili.cui@intel.com>
1441
1442 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
1443 * testsuite/gas/i386/align-branch-1b.d: Likewise.
1444 * testsuite/gas/i386/align-branch-1c.d: Likewise.
1445 * testsuite/gas/i386/align-branch-1d.d: Likewise.
1446 * testsuite/gas/i386/align-branch-1e.d: Likewise.
1447 * testsuite/gas/i386/align-branch-1f.d: Likewise.
1448 * testsuite/gas/i386/align-branch-1g.d: Likewise.
1449 * testsuite/gas/i386/align-branch-1h.d: Likewise.
1450 * testsuite/gas/i386/align-branch-1i.d: Likewise.
1451 * testsuite/gas/i386/align-branch-5.d: Likewise.
1452 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
1453 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
1454 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
1455 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
1456 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
1457 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
1458 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
1459 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
1460 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
1461 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
1462 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
1463 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
1464
7a6bf3be
SB
14652020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
1466
1467 PR 25377
1468 * config/tc-z80.c: Add support for half precision, single
1469 precision and double precision floating point values.
1470 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
1471 * doc/as.texi: Add new z80 command line options.
1472 * doc/c-z80.texi: Document new z80 command line options.
1473 * testsuite/gas/z80/ez80_pref_dis.s: New test.
1474 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
1475 * testsuite/gas/z80/z80.exp: Run the new test.
1476 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
1477 * testsuite/gas/z80/fp_zeda32.d: Likewise.
1478 * testsuite/gas/z80/strings.d: Update expected output.
1479
82e9597c
MM
14802020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
1481
1482 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
1483 dependency.
1484
5e4f7e05
CZ
14852020-01-13 Claudiu Zissulescu <claziss@gmail.com>
1486
1487 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
1488 the CPU.
1489 * config/tc-arc.h: Add header if/defs.
1490 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
1491
febda64f
AM
14922020-01-13 Alan Modra <amodra@gmail.com>
1493
1494 * testsuite/gas/wasm32/allinsn.d: Update expected output.
1495
5496abe1
AM
14962020-01-13 Alan Modra <amodra@gmail.com>
1497
1498 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
1499 insertion.
1500
ec4181f2
AM
15012020-01-10 Alan Modra <amodra@gmail.com>
1502
1503 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
1504 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
1505
40c75bc8
SB
15062020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1507
1508 PR 25224
1509 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
1510 opcode byte values.
1511 (emit_ld_r_r): Likewise.
1512 (emit_ld_rr_m): Likewise.
1513 (emit_ld_rr_nn): Likewise.
1514
72aea328
JB
15152020-01-09 Jan Beulich <jbeulich@suse.com>
1516
1517 * config/tc-i386.c (optimize_encoding): Add
1518 is_any_vex_encoding() invocations. Drop respective
1519 i.tm.extension_opcode == None checks.
1520
3f93af61
JB
15212020-01-09 Jan Beulich <jbeulich@suse.com>
1522
1523 * config/tc-i386.c (md_assemble): Check RegRex is clear during
1524 REX transformations. Correct comment indentation.
1525
7697afb6
JB
15262020-01-09 Jan Beulich <jbeulich@suse.com>
1527
1528 * config/tc-i386.c (optimize_encoding): Generalize register
1529 transformation for TEST optimization.
1530
d835a58b
JB
15312020-01-09 Jan Beulich <jbeulich@suse.com>
1532
1533 * testsuite/gas/i386/x86-64-sysenter-amd.s,
1534 testsuite/gas/i386/x86-64-sysenter-amd.d,
1535 testsuite/gas/i386/x86-64-sysenter-amd.l,
1536 testsuite/gas/i386/x86-64-sysenter-intel.d,
1537 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
1538 * testsuite/gas/i386/i386.exp: Run new tests.
1539
915808f6
NC
15402020-01-08 Nick Clifton <nickc@redhat.com>
1541
1542 PR 25284
1543 * doc/as.texi (Align): Document the fact that all arguments can be
1544 omitted.
1545 (Balign): Likewise.
1546 (P2align): Likewise.
1547
f1f28025
NC
15482020-01-08 Nick Clifton <nickc@redhat.com>
1549
1550 PR 14891
1551 * config/obj-elf.c (obj_elf_section): Fail if the section name is
1552 already defined as a different symbol type.
1553 * testsuite/gas/elf/pr14891.s: New test source file.
1554 * testsuite/gas/elf/pr14891.d: New test driver.
1555 * testsuite/gas/elf/pr14891.s: New test expected error output.
1556 * testsuite/gas/elf/elf.exp: Run the new test.
1557
030a2e78
AM
15582020-01-08 Alan Modra <amodra@gmail.com>
1559
1560 * config/tc-z8k.c (md_begin): Make idx unsigned.
1561 (get_specific): Likewise for this_index.
1562
2a1ebfb2
CZ
15632020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
1564
1565 * onfig/tc-arc.c (parse_reloc_symbol): New function.
1566 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
1567 (md_operand): Set X_md to absent.
1568 (arc_parse_name): Check for X_md.
1569
16d87673
SB
15702020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1571
1572 PR 25311
1573 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1574 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1575 NO_STRING_ESCAPES.
1576 * read.c (next_char_of_string): Likewise.
1577 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1578 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1579
a2322019
NC
15802020-01-03 Nick Clifton <nickc@redhat.com>
1581
1582 * po/sv.po: Updated Swedish translation.
1583
5437a02a
JB
15842020-01-03 Jan Beulich <jbeulich@suse.com>
1585
1586 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1587 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1588
567dfba2
JB
15892020-01-03 Jan Beulich <jbeulich@suse.com>
1590
1591 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1592 by-element usdot. Add 64-bit form tests for by-element sudot.
1593 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1594
8c45011a
JB
15952020-01-03 Jan Beulich <jbeulich@suse.com>
1596
1597 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1598 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1599
f4950f76
JB
16002020-01-03 Jan Beulich <jbeulich@suse.com>
1601
1602 * testsuite/gas/aarch64/f64mm.d,
1603 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1604
6655dba2
SB
16052020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1606
1607 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1608 support for assembler code generated by SDCC. Add new relocation
1609 types. Add z80-elf target support.
1610 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1611 labels. Local labels starts from ".L".
1612 * NEWS: Mention the new support.
1613 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1614 * testsuite/gas/all/fwdexp.s: Likewise.
1615 * testsuite/gas/all/cond.l: Likewise.
1616 * testsuite/gas/all/cond.s: Likewise.
1617 * testsuite/gas/all/fwdexp.d: Likewise.
1618 * testsuite/gas/all/fwdexp.s: Likewise.
1619 * testsuite/gas/elf/section2.e-mips: Likewise.
1620 * testsuite/gas/elf/section2.l: Likewise.
1621 * testsuite/gas/elf/section2.s: Likewise.
1622 * testsuite/gas/macros/app1.d: Likewise.
1623 * testsuite/gas/macros/app1.s: Likewise.
1624 * testsuite/gas/macros/app2.d: Likewise.
1625 * testsuite/gas/macros/app2.s: Likewise.
1626 * testsuite/gas/macros/app3.d: Likewise.
1627 * testsuite/gas/macros/app3.s: Likewise.
1628 * testsuite/gas/macros/app4.d: Likewise.
1629 * testsuite/gas/macros/app4.s: Likewise.
1630 * testsuite/gas/macros/app4b.s: Likewise.
1631 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1632 * testsuite/gas/z80/z80.exp: Add new tests
1633 * testsuite/gas/z80/dollar.d: New file.
1634 * testsuite/gas/z80/dollar.s: New file.
1635 * testsuite/gas/z80/ez80_adl_all.d: New file.
1636 * testsuite/gas/z80/ez80_adl_all.s: New file.
1637 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1638 * testsuite/gas/z80/ez80_isuf.s: New file.
1639 * testsuite/gas/z80/ez80_z80_all.d: New file.
1640 * testsuite/gas/z80/ez80_z80_all.s: New file.
1641 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1642 * testsuite/gas/z80/r800_extra.d: New file.
1643 * testsuite/gas/z80/r800_extra.s: New file.
1644 * testsuite/gas/z80/r800_ii8.d: New file.
1645 * testsuite/gas/z80/r800_z80_doc.d: New file.
1646 * testsuite/gas/z80/z180.d: New file.
1647 * testsuite/gas/z80/z180.s: New file.
1648 * testsuite/gas/z80/z180_z80_doc.d: New file.
1649 * testsuite/gas/z80/z80_doc.d: New file.
1650 * testsuite/gas/z80/z80_doc.s: New file.
1651 * testsuite/gas/z80/z80_ii8.d: New file.
1652 * testsuite/gas/z80/z80_ii8.s: New file.
1653 * testsuite/gas/z80/z80_in_f_c.d: New file.
1654 * testsuite/gas/z80/z80_in_f_c.s: New file.
1655 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1656 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1657 * testsuite/gas/z80/z80_out_c_0.d: New file.
1658 * testsuite/gas/z80/z80_out_c_0.s: New file.
1659 * testsuite/gas/z80/z80_reloc.d: New file.
1660 * testsuite/gas/z80/z80_reloc.s: New file.
1661 * testsuite/gas/z80/z80_sli.d: New file.
1662 * testsuite/gas/z80/z80_sli.s: New file.
1663
a65b5de6
SN
16642020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1665
1666 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1667 REGLIST_RN.
1668
b14ce8bf
AM
16692020-01-01 Alan Modra <amodra@gmail.com>
1670
1671 Update year range in copyright notice of all files.
1672
0b114740 1673For older changes see ChangeLog-2019
3499769a 1674\f
0b114740 1675Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM
1676
1677Copying and distribution of this file, with or without modification,
1678are permitted in any medium without royalty provided the copyright
1679notice and this notice are preserved.
1680
1681Local Variables:
1682mode: change-log
1683left-margin: 8
1684fill-column: 74
1685version-control: never
1686End: