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252b5132 1-*- text -*-
6d96a594 2
0bd09323
NC
3Changes in 2.39:
4
c085ab00
JB
5* Remove (rudimentary) support for the x86-64 sub-architectures Intel L1OM and
6 Intel K1OM.
7
a74e1cb3
NC
8Changes in 2.38:
9
36cb9e7e
RS
10* Add support for AArch64 system registers that were missing in previous
11 releases.
12
4462d7c4 13* Add support for the LoongArch instruction set.
14
c8480b58
L
15* Add a command-line option, -muse-unaligned-vector-move, for x86 target
16 to encode aligned vector move as unaligned vector move.
17
80cfde76
PW
18* Add support for Cortex-R52+ for Arm.
19
50aaf5e6 20* Add support for Cortex-A510, Cortex-A710, Cortex-X2 for AArch64.
98ab23ab 21
14f45859
PW
22* Add support for Cortex-A710 for Arm.
23
57f02370
PW
24* Add support for Scalable Matrix Extension (SME) for AArch64.
25
578c64a4
NC
26* The --multibyte-handling=[allow|warn|warn-sym-only] option tells the
27 assembler what to when it encoutners multibyte characters in the input. The
28 default is to allow them. Setting the option to "warn" will generate a
29 warning message whenever any multibyte character is encountered. Using the
30 option to "warn-sym-only" will make the assembler generate a warning whenever a
31 symbol is defined containing multibyte characters. (References to undefined
32 symbols will not generate warnings).
33
ff01bb6c
L
34* Outputs of .ds.x directive and .tfloat directive with hex input from
35 x86 assembler have been reduced from 12 bytes to 10 bytes to match the
36 output of .tfloat directive.
37
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RS
38* Add support for 'armv8.8-a', 'armv9-a', 'armv9.1-a', 'armv9.2-a' and
39 'armv9.3-a' for -march in AArch64 GAS.
d5007f02 40
a2b1ea81
RS
41* Add support for 'armv8.7-a', 'armv8.8-a', 'armv9-a', 'armv9.1-a',
42 'armv9.2-a' and 'armv9.3-a' for -march in Arm GAS.
3197e593 43
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CL
44* Add support for Intel AVX512_FP16 instructions.
45
51419248
NC
46Changes in 2.37:
47
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AM
48* arm-symbianelf support removed.
49
02202574
PW
50* Add support for Realm Management Extension (RME) for AArch64.
51
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NC
52Changes in 2.36:
53
58bf9b6a
L
54* Add support for Intel AVX VNNI instructions.
55
c1fa250a
LC
56* Add support for Intel HRESET instruction.
57
f64c42a9
LC
58* Add support for Intel UINTR instructions.
59
6d96a594
C
60* Support non-absolute segment values for i386 lcall and ljmp.
61
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NC
62* When setting the link order attribute of ELF sections, it is now possible to
63 use a numeric section index instead of symbol name.
42c36b73 64
a3a02fe8
PW
65* Add support for Cortex-A78, Cortex-A78AE, Cortex-A78C and Cortex-X1 for
66 AArch64 and ARM.
b71702f1 67 Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
77718e5b 68
b71702f1 69* Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
82c70b08
KT
70 Extension), TRBE (Trace Buffer Extension)and BRBE (Branch Record Buffer
71 Extension) system registers for AArch64.
c81946ef 72
8926e54e 73* Add support for Armv8-R and Armv8.7-A AArch64.
c81946ef 74
a984d94a 75* Add support for DSB memory nXS barrier, WFET and WFIT instruction for Armv8.7
82503ca7 76 AArch64.
fd195909 77
e64441b1 78* Add support for +flagm feature for -march in Armv8.4 AArch64.
dd4a72c8 79
fd65497d
PW
80* Add support for +ls64 feature for -march in Armv8.7 AArch64. Add atomic
81 64-byte load/store instructions for this feature.
82
3f4ff088
PW
83* Add support for +pauth (Pointer Authentication) feature for -march in
84 AArch64.
85
81d54bb7 86* Add support for Intel TDX instructions.
96a84ea3 87
c4694f17
TG
88* Add support for Intel Key Locker instructions.
89
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90* Added a .nop directive to generate a single no-op instruction in a target
91 neutral manner. This instruction does have an effect on DWARF line number
92 generation, if that is active.
93
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ML
94* Removed --reduce-memory-overheads and --hash-size as gas now
95 uses hash tables that can be expand and shrink automatically.
96
789198ca
L
97* Add {disp16} pseudo prefix to x86 assembler.
98
260cd341
LC
99* Add support for Intel AMX instructions.
100
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L
101* Configure with --enable-x86-used-note by default for Linux/x86.
102
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JL
103* Add support for the SHF_GNU_RETAIN flag, which can be applied to
104 sections using the 'R' flag in the .section directive.
105 SHF_GNU_RETAIN specifies that the section should not be garbage
106 collected by the linker. It requires the GNU or FreeBSD ELF OSABIs.
107
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NC
108Changes in 2.35:
109
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L
110* X86 NaCl target support is removed.
111
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L
112* Extend .symver directive to update visibility of the original symbol
113 and assign one original symbol to different versioned symbols.
114
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L
115* Add support for Intel SERIALIZE and TSXLDTRK instructions.
116
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117* Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
118 -mlfence-before-ret= options to x86 assembler to help mitigate
119 CVE-2020-0551.
120
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NC
121* Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
122 (if such output is being generated). Added the ability to generate
123 version 5 .debug_line sections.
124
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TC
125* Add -mbig-obj support to i386 MingW targets.
126
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NC
127Changes in 2.34:
128
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129* Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
130 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
131 options to x86 assembler to align branches within a fixed boundary
132 with segment prefixes or NOPs.
133
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134* Add support for Zilog eZ80 and Zilog Z180 CPUs.
135
136* Add support for z80-elf target.
137
138* Add support for relocation of each byte or word of multibyte value to Z80
139 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
140 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
141
142* Add SDCC support for Z80 targets.
143
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PB
144Changes in 2.33:
145
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MM
146* Add support for the Arm Scalable Vector Extension version 2 (SVE2)
147 instructions.
148
149* Add support for the Arm Transactional Memory Extension (TME)
150 instructions.
151
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AV
152* Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
153 instructions.
154
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155* For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
156 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
157 time option to set the default behavior. Set the default if the configure
158 option is not used to "no".
6f2117ba 159
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DZ
160* Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
161 processors.
162
163* Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
164 Cortex-A76AE, and Cortex-A77 processors.
165
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166* Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
167 floating point literals. Add .float16_format directive and
168 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
169 encoding.
170
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AB
171* Add --gdwarf-cie-version command line flag. This allows control over which
172 version of DWARF CIE the assembler creates.
173
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174Changes in 2.32:
175
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176* Add -mvexwig=[0|1] option to x86 assembler to control encoding of
177 VEX.W-ignored (WIG) VEX instructions.
178
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179* Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
180 notes. Add a --enable-x86-used-note configure time option to set the
181 default behavior. Set the default if the configure option is not used
182 to "no".
183
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184* Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
185
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CX
186* Add support for the MIPS Loongson EXTensions (EXT) instructions.
187
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CX
188* Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
189
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AJ
190* Add support for the C-SKY processor series.
191
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CX
192* Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
193 ASE.
194
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195Changes in 2.31:
196
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197* The ADR and ADRL pseudo-instructions supported by the ARM assembler
198 now only set the bottom bit of the address of thumb function symbols
199 if the -mthumb-interwork command line option is active.
200
6f20c942
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201* Add support for the MIPS Global INValidate (GINV) ASE.
202
730c3174
SE
203* Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
204
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JD
205* Add support for the Freescale S12Z architecture.
206
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NC
207* Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
208 Build Attribute notes if none are present in the input sources. Add a
209 --enable-generate-build-notes=[yes|no] configure time option to set the
210 default behaviour. Set the default if the configure option is not used
211 to "no".
212
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213* Remove -mold-gcc command-line option for x86 targets.
214
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215* Add -O[2|s] command-line options to x86 assembler to enable alternate
216 shorter instruction encoding.
217
8f065d3b 218* Add support for .nops directive. It is currently supported only for
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219 x86 targets.
220
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NC
221Changes in 2.30:
222
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AO
223* Add support for loaction views in DWARF debug line information.
224
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TG
225Changes in 2.29:
226
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227* Add support for ELF SHF_GNU_MBIND.
228
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229* Add support for the WebAssembly file format and wasm32 ELF conversion.
230
7e0de605 231* PowerPC gas now checks that the correct register class is used in
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232 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
233 that the registers are invalid.
7e0de605 234
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235* Add support for the Texas Instruments PRU processor.
236
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TP
237* Support for the ARMv8-R architecture and Cortex-R52 processor has been
238 added to the ARM port.
ced40572 239
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TG
240Changes in 2.28:
241
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NC
242* Add support for the RISC-V architecture.
243
b19ea8d2 244* Add support for the ARM Cortex-M23 and Cortex-M33 processors.
ce1b0a45 245
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TG
246Changes in 2.27:
247
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L
248* Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
249
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250* Add --no-pad-sections to stop the assembler from padding the end of output
251 sections up to their alignment boundary.
252
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TP
253* Support for the ARMv8-M architecture has been added to the ARM port. Support
254 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
255 port.
256
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CZ
257* ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
258 .extCoreRegister pseudo-ops that allow an user to define custom
259 instructions, conditional codes, auxiliary and core registers.
260
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L
261* Add a configure option --enable-elf-stt-common to decide whether ELF
262 assembler should generate common symbols with the STT_COMMON type by
263 default. Default to no.
264
a05a5b64 265* New command-line option --elf-stt-common= for ELF targets to control
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266 whether to generate common symbols with the STT_COMMON type.
267
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268* Add ability to set section flags and types via numeric values for ELF
269 based targets.
81c23f82 270
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L
271* Add a configure option --enable-x86-relax-relocations to decide whether
272 x86 assembler should generate relax relocations by default. Default to
273 yes, except for x86 Solaris targets older than Solaris 12.
274
a05a5b64 275* New command-line option -mrelax-relocations= for x86 target to control
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L
276 whether to generate relax relocations.
277
a05a5b64 278* New command-line option -mfence-as-lock-add=yes for x86 target to encode
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279 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
280
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CZ
281* Add assembly-time relaxation option for ARC cpus.
282
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283* Add --with-cpu=TYPE configure option for ARC gas. This allows the default
284 cpu type to be adjusted at configure time.
285
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TG
286Changes in 2.26:
287
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288* Add a configure option --enable-compressed-debug-sections={all,gas} to
289 decide whether DWARF debug sections should be compressed by default.
e12fe555 290
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NC
291* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
292 assembler support for Argonaut RISC architectures.
293
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NC
294* Symbol and label names can now be enclosed in double quotes (") which allows
295 them to contain characters that are not part of valid symbol names in high
296 level languages.
297
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298* Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
299 previous spelling, -march=armv6zk, is still accepted.
300
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301* Support for the ARMv8.1 architecture has been added to the Aarch64 port.
302 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
303 extensions has also been added to the Aarch64 port.
304
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305* Support for the ARMv8.1 architecture has been added to the ARM port. Support
306 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
307 been added to the ARM port.
308
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309* Extend --compress-debug-sections option to support
310 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
311 targets.
312
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L
313* --compress-debug-sections is turned on for Linux/x86 by default.
314
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315Changes in 2.25:
316
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317* Add support for the AVR Tiny microcontrollers.
318
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319* Replace support for openrisc and or32 with support for or1k.
320
2e6976a8 321* Enhanced the ARM port to accept the assembler output from the CodeComposer
a05a5b64 322 Studio tool. Support is enabled via the new command-line option -mccs.
2e6976a8 323
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324* Add support for the Andes NDS32.
325
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TG
326Changes in 2.24:
327
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NC
328* Add support for the Texas Instruments MSP430X processor.
329
a05a5b64 330* Add -gdwarf-sections command-line option to enable per-code-section
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331 generation of DWARF .debug_line sections.
332
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SL
333* Add support for Altera Nios II.
334
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NC
335* Add support for the Imagination Technologies Meta processor.
336
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NC
337* Add support for the v850e3v5.
338
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339* Remove assembler support for MIPS ECOFF targets.
340
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341Changes in 2.23:
342
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NC
343* Add support for the 64-bit ARM architecture: AArch64.
344
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NC
345* Add support for S12X processor.
346
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JL
347* Add support for the VLE extension to the PowerPC architecture.
348
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NC
349* Add support for the Freescale XGATE architecture.
350
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RM
351* Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
352 directives. These are currently available only for x86 and ARM targets.
353
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DD
354* Add support for the Renesas RL78 architecture.
355
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NC
356* Add support for the Adapteva EPIPHANY architecture.
357
fe13e45b 358* For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
29c048b6 359
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TG
360Changes in 2.22:
361
69f56ae1 362* Add support for the Tilera TILEPro and TILE-Gx architectures.
44f45767 363
90b3661c 364Changes in 2.21:
44f45767 365
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L
366* Gas no longer requires doubling of ampersands in macros.
367
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JM
368* Add support for the TMS320C6000 (TI C6X) processor family.
369
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DK
370* GAS now understands an extended syntax in the .section directive flags
371 for COFF targets that allows the section's alignment to be specified. This
372 feature has also been backported to the 2.20 release series, starting with
373 2.20.1.
374
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NC
375* Add support for the Renesas RX processor.
376
a05a5b64 377* New command-line option, --compress-debug-sections, which requests
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CC
378 compression of DWARF debug information sections in the relocatable output
379 file. Compressed debug sections are supported by readelf, objdump, and
380 gold, but not currently by Gnu ld.
381
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TG
382Changes in 2.20:
383
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NC
384* Added support for v850e2 and v850e2v3.
385
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NC
386* GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
387 pseudo op. It marks the symbol as being globally unique in the entire
388 process.
389
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NC
390* ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
391 in binary rather than text.
6e33da12 392
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DK
393* Add support for common symbol alignment to PE formats.
394
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CC
395* Add support for the new discriminator column in the DWARF line table,
396 with a discriminator operand for the .loc directive.
397
c3b7224a
NC
398* Add support for Sunplus score architecture.
399
d8045f23
NC
400* The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
401 indicate that if the symbol is the target of a relocation, its value should
402 not be use. Instead the function should be invoked and its result used as
403 the value.
fa94de6b 404
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NC
405* Add support for Lattice Mico32 (lm32) architecture.
406
fa94de6b 407* Add support for Xilinx MicroBlaze architecture.
caa03924 408
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TG
409Changes in 2.19:
410
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DJ
411* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
412 tables without runtime relocation.
413
a05a5b64 414* New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
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DD
415 adds compatibility with H'00 style hex constants.
416
a05a5b64 417* New command-line option, -msse-check=[none|error|warning], for x86
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L
418 targets.
419
a05a5b64 420* New sub-option added to the assembler's -a command-line switch to
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NC
421 generate a listing output. The 'g' sub-option will insert into the listing
422 various information about the assembly, such as assembler version, the
a05a5b64 423 command-line options used, and a time stamp.
83f10cb2 424
a05a5b64 425* New command-line option -msse2avx for x86 target to encode SSE
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L
426 instructions with VEX prefix.
427
f1f8f695 428* Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
c0f3af97 429
a05a5b64 430* New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
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L
431 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
432 -mnaked-reg and -mold-gcc, for x86 targets.
433
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NC
434* Support for generating wide character strings has been added via the new
435 pseudo ops: .string16, .string32 and .string64.
436
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MM
437* Support for SSE5 has been added to the i386 port.
438
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NC
439Changes in 2.18:
440
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NC
441* The GAS sources are now released under the GPLv3.
442
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NC
443* Support for the National Semiconductor CR16 target has been added.
444
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AM
445* Added gas .reloc pseudo. This is a low-level interface for creating
446 relocations.
447
99ad8390
NC
448* Add support for x86_64 PE+ target.
449
1c0d3aa6 450* Add support for Score target.
83518699 451
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NC
452Changes in 2.17:
453
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NC
454* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
455
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NS
456* Support for ms2 architecture has been added.
457
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NC
458* Support for the Z80 processor family has been added.
459
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MM
460* Add support for the "@<file>" syntax to the command line, so that extra
461 switches can be read from <file>.
462
a05a5b64 463* The SH target supports a new command-line switch --enable-reg-prefix which,
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NC
464 if enabled, will allow register names to be optionally prefixed with a $
465 character. This allows register names to be distinguished from label names.
fa94de6b 466
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JB
467* Macros with a variable number of arguments are now supported. See the
468 documentation for how this works.
469
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NC
470* Added --reduce-memory-overheads switch to reduce the size of the hash
471 tables used, at the expense of longer assembly times, and
472 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
473
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JB
474* Macro names and macro parameter names can now be any identifier that would
475 also be legal as a symbol elsewhere. For macro parameter names, this is
476 known to cause problems in certain sources when the respective target uses
477 characters inconsistently, and thus macro parameter references may no longer
478 be recognized as such (see the documentation for details).
fa94de6b 479
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NC
480* Support the .f_floating, .d_floating, .g_floating and .h_floating directives
481 for the VAX target in order to be more compatible with the VAX MACRO
482 assembler.
483
a05a5b64 484* New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
8c2fda1d 485
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NC
486Changes in 2.16:
487
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JB
488* Redefinition of macros now results in an error.
489
a05a5b64 490* New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
91d777ee 491
a05a5b64 492* New command-line option -munwind-check=[warning|error] for IA64
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L
493 targets.
494
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JB
495* The IA64 port now uses automatic dependency violation removal as its default
496 mode.
497
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NC
498* Port to MAXQ processor contributed by HCL Tech.
499
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NC
500* Added support for generating unwind tables for ARM ELF targets.
501
a05a5b64 502* Add a -g command-line option to generate debug information in the target's
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NC
503 preferred debug format.
504
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NC
505* Support for the crx-elf target added.
506
1a320fbb 507* Support for the sh-symbianelf target added.
1fe1f39c 508
0503b355
BF
509* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
510 on pe[i]-i386; required for this target's DWARF 2 support.
511
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512* Support for Motorola MCF521x/5249/547x/548x added.
513
fd99574b
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514* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
515 instrucitons.
516
a05a5b64 517* New command-line option -mno-shared for MIPS ELF targets.
aa6975fb 518
a05a5b64 519* New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
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520 added to enter (and leave) alternate macro syntax mode.
521
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522Changes in 2.15:
523
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524* The MIPS -membedded-pic option (Embedded-PIC code generation) is
525 deprecated and will be removed in a future release.
526
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527* Added PIC m32r Linux (ELF) and support to M32R assembler.
528
09d92015
MM
529* Added support for ARM V6.
530
88da98f3
MS
531* Added support for sh4a and variants.
532
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533* Support for Renesas M32R2 added.
534
88da98f3
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535* Limited support for Mapping Symbols as specified in the ARM ELF
536 specification has been added to the arm assembler.
ed769ec1 537
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538* On ARM architectures, added a new gas directive ".unreq" that undoes
539 definitions created by ".req".
540
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541* Support for Motorola ColdFire MCF528x added.
542
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543* Added --gstabs+ switch to enable the generation of STABS debug format
544 information with GNU extensions.
fa94de6b 545
6a265366
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546* Added support for MIPS64 Release 2.
547
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548* Added support for v850e1.
549
12b55ccc
L
550* Added -n switch for x86 assembler. By default, x86 GAS replaces
551 multiple nop instructions used for alignment within code sections
552 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
553 switch disables the optimization.
554
78849248
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555* Removed -n option from MIPS assembler. It was not useful, and confused the
556 existing -non_shared option.
557
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558Changes in 2.14:
559
69be0a2b
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560* Added support for MIPS32 Release 2.
561
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562* Added support for Xtensa architecture.
563
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564* Support for Intel's iWMMXt processor (an ARM variant) added.
565
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566* An assembler test generator has been contributed and an example file that
567 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
fa94de6b 568
5177500f
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569* Support for SH2E added.
570
fea17916
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571* GASP has now been removed.
572
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573* Support for Texas Instruments TMS320C4x and TMS320C3x series of
574 DSP's contributed by Michael Hayes and Svein E. Seldal.
fa94de6b 575
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576* Support for the Ubicom IP2xxx microcontroller added.
577
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578Changes in 2.13:
579
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580* Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
581 and FR500 included.
0ebb9a87 582
a40cbfa3 583* Support for DLX processor added.
52216602 584
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585* GASP has now been deprecated and will be removed in a future release. Use
586 the macro facilities in GAS instead.
3f965e60 587
a40cbfa3
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588* GASP now correctly parses floating point numbers. Unless the base is
589 explicitly specified, they are interpreted as decimal numbers regardless of
590 the currently specified base.
1ac57253 591
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592Changes in 2.12:
593
a40cbfa3 594* Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
49fda6c8 595
a40cbfa3 596* Support for the OpenRISC 32-bit embedded processor by OpenCores.
3b16e843 597
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598* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
599 specifying the target instruction set. The old method of specifying the
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600 target processor has been deprecated, but is still accepted for
601 compatibility.
03b1477f 602
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603* Support for the VFP floating-point instruction set has been added to
604 the ARM assembler.
252b5132 605
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606* New psuedo op: .incbin to include a set of binary data at a given point
607 in the assembly. Contributed by Anders Norlander.
7e005732 608
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609* The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
610 but still works for compatability.
ec68c924 611
fa94de6b 612* The MIPS assembler no longer issues a warning by default when it
a05a5b64 613 generates a nop instruction from a macro. The new command-line option
a40cbfa3 614 -n will turn on the warning.
63486801 615
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616Changes in 2.11:
617
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618* Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
619
a40cbfa3 620* x86 gas now supports the full Pentium4 instruction set.
a167610d 621
a40cbfa3 622* Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
c0d8940f 623
a40cbfa3 624* Support for Motorola 68HC11 and 68HC12.
df86943d 625
a40cbfa3 626* Support for Texas Instruments TMS320C54x (tic54x).
39bec121 627
a40cbfa3 628* Support for IA-64.
2dac7317 629
a40cbfa3 630* Support for i860, by Jason Eckhardt.
22b36938 631
a40cbfa3 632* Support for CRIS (Axis Communications ETRAX series).
5bcac8a4 633
a40cbfa3 634* x86 gas has a new .arch pseudo op to specify the target CPU architecture.
a38cf1db 635
a05a5b64 636* x86 gas -q command-line option quietens warnings about register size changes
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637 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
638 translating various deprecated floating point instructions.
a38cf1db 639
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640Changes in 2.10:
641
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642* Support for the ARM msr instruction was changed to only allow an immediate
643 operand when altering the flags field.
d14442f4 644
a40cbfa3 645* Support for ATMEL AVR.
adde6300 646
a40cbfa3 647* Support for IBM 370 ELF. Somewhat experimental.
b5ebe70e 648
a40cbfa3 649* Support for numbers with suffixes.
3fd9f047 650
a40cbfa3 651* Added support for breaking to the end of repeat loops.
6a6987a9 652
a40cbfa3 653* Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
6a6987a9 654
a40cbfa3 655* New .elseif pseudo-op added.
3fd9f047 656
a40cbfa3 657* New --fatal-warnings option.
1f776aa5 658
a40cbfa3 659* picoJava architecture support added.
252b5132 660
a40cbfa3 661* Motorola MCore 210 processor support added.
041dd5a9 662
fa94de6b 663* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
a40cbfa3 664 assembly programs with intel syntax.
252b5132 665
a40cbfa3 666* New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
252b5132 667
a40cbfa3 668* Added -gdwarf2 option to generate DWARF 2 debugging information.
041dd5a9 669
a40cbfa3 670* Full 16-bit mode support for i386.
252b5132 671
fa94de6b 672* Greatly improved instruction operand checking for i386. This change will
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673 produce errors or warnings on incorrect assembly code that previous versions
674 of gas accepted. If you get unexpected messages from code that worked with
675 older versions of gas, please double check the code before reporting a bug.
252b5132 676
a40cbfa3 677* Weak symbol support added for COFF targets.
252b5132 678
a40cbfa3 679* Mitsubishi D30V support added.
252b5132 680
a40cbfa3 681* Texas Instruments c80 (tms320c80) support added.
252b5132 682
a40cbfa3 683* i960 ELF support added.
bedf545c 684
a40cbfa3 685* ARM ELF support added.
a057431b 686
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687Changes in 2.9:
688
a40cbfa3 689* Texas Instruments c30 (tms320c30) support added.
252b5132 690
fa94de6b 691* The assembler now optimizes the exception frame information generated by egcs
a40cbfa3 692 and gcc 2.8. The new --traditional-format option disables this optimization.
252b5132 693
a40cbfa3 694* Added --gstabs option to generate stabs debugging information.
252b5132 695
fa94de6b 696* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
a40cbfa3 697 listing.
252b5132 698
a40cbfa3 699* Added -MD option to print dependencies.
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700
701Changes in 2.8:
702
a40cbfa3 703* BeOS support added.
252b5132 704
a40cbfa3 705* MIPS16 support added.
252b5132 706
a40cbfa3 707* Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
252b5132 708
a40cbfa3 709* Alpha/VMS support added.
252b5132 710
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711* m68k options --base-size-default-16, --base-size-default-32,
712 --disp-size-default-16, and --disp-size-default-32 added.
252b5132 713
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714* The alignment directives now take an optional third argument, which is the
715 maximum number of bytes to skip. If doing the alignment would require
716 skipping more than the given number of bytes, the alignment is not done at
717 all.
252b5132 718
a40cbfa3 719* The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
252b5132 720
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721* The -a option takes a new suboption, c (e.g., -alc), to skip false
722 conditionals in listings.
252b5132 723
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724* Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
725 the symbol is already defined.
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726
727Changes in 2.7:
728
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729* The PowerPC assembler now allows the use of symbolic register names (r0,
730 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
731 can be used any time. PowerPC 860 move to/from SPR instructions have been
732 added.
252b5132 733
a40cbfa3 734* Alpha Linux (ELF) support added.
252b5132 735
a40cbfa3 736* PowerPC ELF support added.
252b5132 737
a40cbfa3 738* m68k Linux (ELF) support added.
252b5132 739
a40cbfa3 740* i960 Hx/Jx support added.
252b5132 741
a40cbfa3 742* i386/PowerPC gnu-win32 support added.
252b5132 743
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744* SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
745 default is to build COFF-only support. To get a set of tools that generate
fa94de6b 746 ELF (they'll understand both COFF and ELF), you must configure with
a40cbfa3 747 target=i386-unknown-sco3.2v5elf.
252b5132 748
a40cbfa3 749* m88k-motorola-sysv3* support added.
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750
751Changes in 2.6:
752
a40cbfa3 753* Gas now directly supports macros, without requiring GASP.
252b5132 754
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NC
755* Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
756 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
757 ``.mri 0'' is seen; this can be convenient for inline assembler code.
252b5132 758
a40cbfa3 759* Added --defsym SYM=VALUE option.
252b5132 760
a40cbfa3 761* Added -mips4 support to MIPS assembler.
252b5132 762
a40cbfa3 763* Added PIC support to Solaris and SPARC SunOS 4 assembler.
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764
765Changes in 2.4:
766
a40cbfa3 767* Converted this directory to use an autoconf-generated configure script.
252b5132 768
a40cbfa3 769* ARM support, from Richard Earnshaw.
252b5132 770
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771* Updated VMS support, from Pat Rankin, including considerably improved
772 debugging support.
252b5132 773
a40cbfa3 774* Support for the control registers in the 68060.
252b5132 775
a40cbfa3 776* Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
fa94de6b
RM
777 provide for possible future gcc changes, for targets where gas provides some
778 features not available in the native assembler. If the native assembler is
a40cbfa3 779 used, it should become obvious pretty quickly what the problem is.
252b5132 780
a40cbfa3 781* Usage message is available with "--help".
252b5132 782
fa94de6b 783* The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
a40cbfa3 784 also, but didn't get into the NEWS file.)
252b5132 785
a40cbfa3 786* Weak symbol support for a.out.
252b5132 787
fa94de6b 788* A bug in the listing code which could cause an infinite loop has been fixed.
a40cbfa3 789 Bugs in listings when generating a COFF object file have also been fixed.
252b5132 790
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NC
791* Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
792 Paul Kranenburg.
252b5132 793
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NC
794* Improved Alpha support. Immediate constants can have a much larger range
795 now. Support for the 21164 has been contributed by Digital.
252b5132 796
a40cbfa3 797* Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
252b5132
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798
799Changes in 2.3:
800
a40cbfa3 801* Mach i386 support, by David Mackenzie and Ken Raeburn.
252b5132 802
a40cbfa3 803* RS/6000 and PowerPC support by Ian Taylor.
252b5132 804
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NC
805* VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
806 based on mail received from various people. The `-h#' option should work
807 again too.
252b5132 808
a40cbfa3 809* HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
fa94de6b 810 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
a40cbfa3
NC
811 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
812 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
813 in the "dist" directory.
252b5132 814
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815* Vax support in gas fixed for BSD, so it builds and seems to run a couple
816 simple tests okay. I haven't put it through extensive testing. (GNU make is
817 currently required for BSD 4.3 builds.)
252b5132 818
fa94de6b 819* Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
a40cbfa3
NC
820 based on code donated by CMU, which used an a.out-based format. I'm afraid
821 the alpha-a.out support is pretty badly mangled, and much of it removed;
822 making it work will require rewriting it as BFD support for the format anyways.
252b5132 823
a40cbfa3 824* Irix 5 support.
252b5132 825
fa94de6b 826* The test suites have been fixed up a bit, so that they should work with a
a40cbfa3 827 couple different versions of expect and dejagnu.
252b5132 828
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RM
829* Symbols' values are now handled internally as expressions, permitting more
830 flexibility in evaluating them in some cases. Some details of relocation
a40cbfa3
NC
831 handling have also changed, and simple constant pool management has been
832 added, to make the Alpha port easier.
252b5132 833
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NC
834* New option "--statistics" for printing out program run times. This is
835 intended to be used with the gcc "-Q" option, which prints out times spent in
836 various phases of compilation. (You should be able to get all of them
837 printed out with "gcc -Q -Wa,--statistics", I think.)
252b5132
RH
838
839Changes in 2.2:
840
a40cbfa3 841* RS/6000 AIX and MIPS SGI Irix 5 support has been added.
252b5132 842
fa94de6b
RM
843* Configurations that are still in development (and therefore are convenient to
844 have listed in configure.in) still get rejected without a minor change to
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NC
845 gas/Makefile.in, so people not doing development work shouldn't get the
846 impression that support for such configurations is actually believed to be
847 reliable.
252b5132 848
fa94de6b 849* The program name (usually "as") is printed when a fatal error message is
a40cbfa3
NC
850 displayed. This should prevent some confusion about the source of occasional
851 messages about "internal errors".
252b5132 852
fa94de6b 853* ELF support is falling into place. Support for the 386 should be working.
a40cbfa3 854 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
252b5132 855
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856* Symbol values are maintained as expressions instead of being immediately
857 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
858 more complex calculations involving symbols whose values are not alreadey
859 known.
252b5132 860
a40cbfa3 861* DBX-style debugging info ("stabs") is now supported for COFF formats.
fa94de6b
RM
862 If any stabs directives are seen in the source, GAS will create two new
863 sections: a ".stab" and a ".stabstr" section. The format of the .stab
a40cbfa3
NC
864 section is nearly identical to the a.out symbol format, and .stabstr is
865 its string table. For this to be useful, you must have configured GCC
866 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
867 that can use the stab sections (4.11 or later).
252b5132 868
fa94de6b 869* LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
a40cbfa3 870 support is in progress.
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871
872Changes in 2.1:
873
fa94de6b 874* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
a40cbfa3 875 incorporated, but not well tested yet.
252b5132 876
fa94de6b 877* Altered the opcode table split for m68k; it should require less VM to compile
a40cbfa3 878 with gcc now.
252b5132 879
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880* Some minor adjustments to add (Convergent Technologies') Miniframe support,
881 suggested by Ronald Cole.
252b5132 882
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883* HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
884 includes improved ELF support, which I've started adapting for SPARC Solaris
885 2.x. Integration isn't completely, so it probably won't work.
252b5132 886
a40cbfa3 887* HP9000/300 support, donated by HP, has been merged in.
252b5132 888
a40cbfa3 889* Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
252b5132 890
a40cbfa3 891* Better error messages for unsupported configurations (e.g., hppa-hpux).
252b5132 892
a40cbfa3 893* Test suite framework is starting to become reasonable.
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894
895Changes in 2.0:
896
a40cbfa3 897* Mostly bug fixes.
252b5132 898
a40cbfa3 899* Some more merging of BFD and ELF code, but ELF still doesn't work.
252b5132
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900
901Changes in 1.94:
902
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903* BFD merge is partly done. Adventurous souls may try giving configure the
904 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
905 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
906 or "solaris". (ELF isn't really supported yet. It needs work. I've got
907 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
908 fully merged yet.)
252b5132 909
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910* The 68K opcode table has been split in half. It should now compile under gcc
911 without consuming ridiculous amounts of memory.
252b5132 912
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913* A couple data structures have been reduced in size. This should result in
914 saving a little bit of space at runtime.
252b5132 915
a40cbfa3
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916* Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
917 code provided ROSE format support, which I haven't merged in yet. (I can
918 make it available, if anyone wants to try it out.) Ralph's code, for BSD
919 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
920 coming.
252b5132 921
a40cbfa3 922* Support for the Hitachi H8/500 has been added.
252b5132 923
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924* VMS host and target support should be working now, thanks chiefly to Eric
925 Youngdale.
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926
927Changes in 1.93.01:
928
a40cbfa3 929* For m68k, support for more processors has been added: 68040, CPU32, 68851.
252b5132 930
a40cbfa3 931* For i386, .align is now power-of-two; was number-of-bytes.
252b5132 932
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933* For m68k, "%" is now accepted before register names. For COFF format, which
934 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
935 can be distinguished from the register.
252b5132 936
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937* Last public release was 1.38. Lots of configuration changes since then, lots
938 of new CPUs and formats, lots of bugs fixed.
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939
940\f
a2c58332 941Copyright (C) 2012-2022 Free Software Foundation, Inc.
5bf135a7
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942
943Copying and distribution of this file, with or without modification,
944are permitted in any medium without royalty provided the copyright
945notice and this notice are preserved.
946
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947Local variables:
948fill-column: 79
949End: