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* alpha-tdep.c (alpha_store_return_value): Avoid switch fallthru.
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c906108c 1/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
1e698235 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
b6ba6518 3 Free Software Foundation, Inc.
c906108c 4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
615967cb 23#include "doublest.h"
c906108c 24#include "frame.h"
d2427a71
RH
25#include "frame-unwind.h"
26#include "frame-base.h"
c906108c
SS
27#include "inferior.h"
28#include "symtab.h"
29#include "value.h"
30#include "gdbcmd.h"
31#include "gdbcore.h"
32#include "dis-asm.h"
33#include "symfile.h"
34#include "objfiles.h"
35#include "gdb_string.h"
c5f0f3d0 36#include "linespec.h"
4e052eda 37#include "regcache.h"
615967cb 38#include "reggroups.h"
dc129d82 39#include "arch-utils.h"
4be87837 40#include "osabi.h"
fe898f56 41#include "block.h"
dc129d82
JT
42
43#include "elf-bfd.h"
44
45#include "alpha-tdep.h"
46
c906108c 47\f
fa88f677 48static const char *
636a6dfc
JT
49alpha_register_name (int regno)
50{
5ab84872 51 static const char * const register_names[] =
636a6dfc
JT
52 {
53 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
54 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
55 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
56 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
57 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
58 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
59 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
60 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
44d88583 61 "pc", "", "unique"
636a6dfc
JT
62 };
63
64 if (regno < 0)
5ab84872 65 return NULL;
636a6dfc 66 if (regno >= (sizeof(register_names) / sizeof(*register_names)))
5ab84872
RH
67 return NULL;
68 return register_names[regno];
636a6dfc 69}
d734c450 70
dc129d82 71static int
d734c450
JT
72alpha_cannot_fetch_register (int regno)
73{
44d88583 74 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
75}
76
dc129d82 77static int
d734c450
JT
78alpha_cannot_store_register (int regno)
79{
44d88583 80 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
81}
82
dc129d82 83static int
d734c450
JT
84alpha_register_convertible (int regno)
85{
86 return (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31);
87}
0d056799 88
dc129d82 89static struct type *
0d056799
JT
90alpha_register_virtual_type (int regno)
91{
72667056
RH
92 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
93 return builtin_type_void_data_ptr;
94 if (regno == ALPHA_PC_REGNUM)
95 return builtin_type_void_func_ptr;
96
97 /* Don't need to worry about little vs big endian until
98 some jerk tries to port to alpha-unicosmk. */
99 if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 31)
100 return builtin_type_ieee_double_little;
101
102 return builtin_type_int64;
0d056799 103}
f8453e34 104
615967cb
RH
105/* Is REGNUM a member of REGGROUP? */
106
107static int
108alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
109 struct reggroup *group)
110{
111 /* Filter out any registers eliminated, but whose regnum is
112 reserved for backward compatibility, e.g. the vfp. */
113 if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0')
114 return 0;
115
116 /* Since we implement no pseudo registers, save/restore is equal to all. */
117 if (group == all_reggroup
118 || group == save_reggroup
119 || group == restore_reggroup)
120 return 1;
121
122 /* All other groups are non-overlapping. */
123
124 /* Since this is really a PALcode memory slot... */
125 if (regnum == ALPHA_UNIQUE_REGNUM)
126 return group == system_reggroup;
127
128 /* Force the FPCR to be considered part of the floating point state. */
129 if (regnum == ALPHA_FPCR_REGNUM)
130 return group == float_reggroup;
131
132 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31)
133 return group == float_reggroup;
134 else
135 return group == general_reggroup;
136}
137
dc129d82 138static int
f8453e34
JT
139alpha_register_byte (int regno)
140{
141 return (regno * 8);
142}
143
dc129d82 144static int
f8453e34
JT
145alpha_register_raw_size (int regno)
146{
147 return 8;
148}
149
dc129d82 150static int
f8453e34
JT
151alpha_register_virtual_size (int regno)
152{
153 return 8;
154}
636a6dfc 155
d2427a71
RH
156/* The alpha needs a conversion between register and memory format if the
157 register is a floating point register and memory format is float, as the
158 register format must be double or memory format is an integer with 4
159 bytes or less, as the representation of integers in floating point
160 registers is different. */
161
14696584
RH
162static void
163alpha_convert_flt_dbl (void *out, const void *in)
164{
165 DOUBLEST d = extract_typed_floating (in, builtin_type_ieee_single_little);
166 store_typed_floating (out, builtin_type_ieee_double_little, d);
167}
168
169static void
170alpha_convert_dbl_flt (void *out, const void *in)
171{
172 DOUBLEST d = extract_typed_floating (in, builtin_type_ieee_double_little);
173 store_typed_floating (out, builtin_type_ieee_single_little, d);
174}
175
d2427a71
RH
176static void
177alpha_register_convert_to_virtual (int regnum, struct type *valtype,
178 char *raw_buffer, char *virtual_buffer)
5868c862 179{
14696584 180 if (TYPE_LENGTH (valtype) >= ALPHA_REGISTER_SIZE)
d2427a71 181 {
14696584 182 memcpy (virtual_buffer, raw_buffer, ALPHA_REGISTER_SIZE);
d2427a71
RH
183 return;
184 }
185
14696584
RH
186 /* Note that everything below is less than 8 bytes long. */
187
d2427a71 188 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
14696584
RH
189 alpha_convert_dbl_flt (virtual_buffer, raw_buffer);
190 else if (TYPE_CODE (valtype) == TYPE_CODE_INT)
d2427a71
RH
191 {
192 ULONGEST l;
14696584 193 l = extract_unsigned_integer (raw_buffer, ALPHA_REGISTER_SIZE);
d2427a71
RH
194 l = ((l >> 32) & 0xc0000000) | ((l >> 29) & 0x3fffffff);
195 store_unsigned_integer (virtual_buffer, TYPE_LENGTH (valtype), l);
196 }
197 else
198 error ("Cannot retrieve value from floating point register");
199}
5868c862 200
d2427a71
RH
201static void
202alpha_register_convert_to_raw (struct type *valtype, int regnum,
203 char *virtual_buffer, char *raw_buffer)
204{
14696584 205 if (TYPE_LENGTH (valtype) >= ALPHA_REGISTER_SIZE)
d2427a71 206 {
14696584 207 memcpy (raw_buffer, virtual_buffer, ALPHA_REGISTER_SIZE);
d2427a71
RH
208 return;
209 }
5868c862 210
14696584
RH
211 /* Note that everything below is less than 8 bytes long. */
212
d2427a71 213 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
14696584
RH
214 alpha_convert_flt_dbl (raw_buffer, virtual_buffer);
215 else if (TYPE_CODE (valtype) == TYPE_CODE_INT)
d2427a71 216 {
14696584 217 ULONGEST l = unpack_long (valtype, virtual_buffer);
d2427a71 218 l = ((l & 0xc0000000) << 32) | ((l & 0x3fffffff) << 29);
14696584 219 store_unsigned_integer (raw_buffer, ALPHA_REGISTER_SIZE, l);
d2427a71
RH
220 }
221 else
222 error ("Cannot store value in floating point register");
5868c862
JT
223}
224
d2427a71
RH
225\f
226/* The alpha passes the first six arguments in the registers, the rest on
c88e30c0
RH
227 the stack. The register arguments are stored in ARG_REG_BUFFER, and
228 then moved into the register file; this simplifies the passing of a
229 large struct which extends from the registers to the stack, plus avoids
230 three ptrace invocations per word.
231
232 We don't bother tracking which register values should go in integer
233 regs or fp regs; we load the same values into both.
234
d2427a71
RH
235 If the called function is returning a structure, the address of the
236 structure to be returned is passed as a hidden first argument. */
c906108c 237
d2427a71 238static CORE_ADDR
c88e30c0
RH
239alpha_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
240 struct regcache *regcache, CORE_ADDR bp_addr,
241 int nargs, struct value **args, CORE_ADDR sp,
242 int struct_return, CORE_ADDR struct_addr)
c906108c 243{
d2427a71
RH
244 int i;
245 int accumulate_size = struct_return ? 8 : 0;
d2427a71 246 struct alpha_arg
c906108c 247 {
d2427a71
RH
248 char *contents;
249 int len;
250 int offset;
251 };
c88e30c0
RH
252 struct alpha_arg *alpha_args
253 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
d2427a71 254 register struct alpha_arg *m_arg;
c88e30c0 255 char arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
d2427a71 256 int required_arg_regs;
c906108c 257
c88e30c0
RH
258 /* The ABI places the address of the called function in T12. */
259 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
260
261 /* Set the return address register to point to the entry point
262 of the program, where a breakpoint lies in wait. */
263 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
264
265 /* Lay out the arguments in memory. */
d2427a71
RH
266 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
267 {
268 struct value *arg = args[i];
269 struct type *arg_type = check_typedef (VALUE_TYPE (arg));
c88e30c0 270
d2427a71
RH
271 /* Cast argument to long if necessary as the compiler does it too. */
272 switch (TYPE_CODE (arg_type))
c906108c 273 {
d2427a71
RH
274 case TYPE_CODE_INT:
275 case TYPE_CODE_BOOL:
276 case TYPE_CODE_CHAR:
277 case TYPE_CODE_RANGE:
278 case TYPE_CODE_ENUM:
0ede8eca 279 if (TYPE_LENGTH (arg_type) == 4)
d2427a71 280 {
0ede8eca
RH
281 /* 32-bit values must be sign-extended to 64 bits
282 even if the base data type is unsigned. */
283 arg_type = builtin_type_int32;
284 arg = value_cast (arg_type, arg);
285 }
286 if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE)
287 {
288 arg_type = builtin_type_int64;
d2427a71
RH
289 arg = value_cast (arg_type, arg);
290 }
291 break;
7b5e1cb3 292
c88e30c0
RH
293 case TYPE_CODE_FLT:
294 /* "float" arguments loaded in registers must be passed in
295 register format, aka "double". */
296 if (accumulate_size < sizeof (arg_reg_buffer)
297 && TYPE_LENGTH (arg_type) == 4)
298 {
eb4edb88 299 arg_type = builtin_type_ieee_double_little;
c88e30c0
RH
300 arg = value_cast (arg_type, arg);
301 }
302 /* Tru64 5.1 has a 128-bit long double, and passes this by
303 invisible reference. No one else uses this data type. */
304 else if (TYPE_LENGTH (arg_type) == 16)
305 {
306 /* Allocate aligned storage. */
307 sp = (sp & -16) - 16;
308
309 /* Write the real data into the stack. */
310 write_memory (sp, VALUE_CONTENTS (arg), 16);
311
312 /* Construct the indirection. */
313 arg_type = lookup_pointer_type (arg_type);
314 arg = value_from_pointer (arg_type, sp);
315 }
316 break;
7b5e1cb3
RH
317
318 case TYPE_CODE_COMPLEX:
319 /* ??? The ABI says that complex values are passed as two
320 separate scalar values. This distinction only matters
321 for complex float. However, GCC does not implement this. */
322
323 /* Tru64 5.1 has a 128-bit long double, and passes this by
324 invisible reference. */
325 if (TYPE_LENGTH (arg_type) == 32)
326 {
327 /* Allocate aligned storage. */
328 sp = (sp & -16) - 16;
329
330 /* Write the real data into the stack. */
331 write_memory (sp, VALUE_CONTENTS (arg), 32);
332
333 /* Construct the indirection. */
334 arg_type = lookup_pointer_type (arg_type);
335 arg = value_from_pointer (arg_type, sp);
336 }
337 break;
338
d2427a71
RH
339 default:
340 break;
c906108c 341 }
d2427a71
RH
342 m_arg->len = TYPE_LENGTH (arg_type);
343 m_arg->offset = accumulate_size;
344 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
345 m_arg->contents = VALUE_CONTENTS (arg);
c906108c
SS
346 }
347
d2427a71
RH
348 /* Determine required argument register loads, loading an argument register
349 is expensive as it uses three ptrace calls. */
350 required_arg_regs = accumulate_size / 8;
351 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
352 required_arg_regs = ALPHA_NUM_ARG_REGS;
c906108c 353
d2427a71 354 /* Make room for the arguments on the stack. */
c88e30c0
RH
355 if (accumulate_size < sizeof(arg_reg_buffer))
356 accumulate_size = 0;
357 else
358 accumulate_size -= sizeof(arg_reg_buffer);
d2427a71 359 sp -= accumulate_size;
c906108c 360
c88e30c0 361 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
d2427a71 362 sp &= ~15;
c906108c 363
d2427a71
RH
364 /* `Push' arguments on the stack. */
365 for (i = nargs; m_arg--, --i >= 0;)
c906108c 366 {
c88e30c0
RH
367 char *contents = m_arg->contents;
368 int offset = m_arg->offset;
369 int len = m_arg->len;
370
371 /* Copy the bytes destined for registers into arg_reg_buffer. */
372 if (offset < sizeof(arg_reg_buffer))
373 {
374 if (offset + len <= sizeof(arg_reg_buffer))
375 {
376 memcpy (arg_reg_buffer + offset, contents, len);
377 continue;
378 }
379 else
380 {
381 int tlen = sizeof(arg_reg_buffer) - offset;
382 memcpy (arg_reg_buffer + offset, contents, tlen);
383 offset += tlen;
384 contents += tlen;
385 len -= tlen;
386 }
387 }
388
389 /* Everything else goes to the stack. */
390 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
c906108c 391 }
c88e30c0
RH
392 if (struct_return)
393 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr);
c906108c 394
d2427a71
RH
395 /* Load the argument registers. */
396 for (i = 0; i < required_arg_regs; i++)
397 {
09cc52fd
RH
398 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
399 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
400 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
401 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
d2427a71 402 }
c906108c 403
09cc52fd
RH
404 /* Finally, update the stack pointer. */
405 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp);
406
c88e30c0 407 return sp;
c906108c
SS
408}
409
5ec2bb99
RH
410/* Extract from REGCACHE the value about to be returned from a function
411 and copy it into VALBUF. */
d2427a71 412
dc129d82 413static void
5ec2bb99
RH
414alpha_extract_return_value (struct type *valtype, struct regcache *regcache,
415 void *valbuf)
140f9984 416{
7b5e1cb3 417 int length = TYPE_LENGTH (valtype);
5ec2bb99
RH
418 char raw_buffer[ALPHA_REGISTER_SIZE];
419 ULONGEST l;
420
421 switch (TYPE_CODE (valtype))
422 {
423 case TYPE_CODE_FLT:
7b5e1cb3 424 switch (length)
5ec2bb99
RH
425 {
426 case 4:
427 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer);
428 alpha_convert_dbl_flt (valbuf, raw_buffer);
429 break;
430
431 case 8:
432 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
433 break;
434
24064b5c
RH
435 case 16:
436 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
437 read_memory (l, valbuf, 16);
438 break;
439
5ec2bb99 440 default:
67dfac52 441 internal_error (__FILE__, __LINE__, "unknown floating point width");
5ec2bb99
RH
442 }
443 break;
444
7b5e1cb3
RH
445 case TYPE_CODE_COMPLEX:
446 switch (length)
447 {
448 case 8:
449 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
450 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
451 break;
452
453 case 16:
454 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
455 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM+1,
456 (char *)valbuf + 8);
457 break;
458
459 case 32:
460 regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l);
461 read_memory (l, valbuf, 32);
462 break;
463
464 default:
67dfac52 465 internal_error (__FILE__, __LINE__, "unknown floating point width");
7b5e1cb3
RH
466 }
467 break;
468
5ec2bb99
RH
469 default:
470 /* Assume everything else degenerates to an integer. */
471 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
7b5e1cb3 472 store_unsigned_integer (valbuf, length, l);
5ec2bb99
RH
473 break;
474 }
140f9984
JT
475}
476
5ec2bb99
RH
477/* Extract from REGCACHE the address of a structure about to be returned
478 from a function. */
479
480static CORE_ADDR
481alpha_extract_struct_value_address (struct regcache *regcache)
482{
483 ULONGEST addr;
484 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr);
485 return addr;
486}
487
488/* Insert the given value into REGCACHE as if it was being
489 returned by a function. */
0d056799 490
d2427a71 491static void
5ec2bb99
RH
492alpha_store_return_value (struct type *valtype, struct regcache *regcache,
493 const void *valbuf)
c906108c 494{
d2427a71 495 int length = TYPE_LENGTH (valtype);
5ec2bb99
RH
496 char raw_buffer[ALPHA_REGISTER_SIZE];
497 ULONGEST l;
d2427a71 498
5ec2bb99 499 switch (TYPE_CODE (valtype))
c906108c 500 {
5ec2bb99
RH
501 case TYPE_CODE_FLT:
502 switch (length)
503 {
504 case 4:
505 alpha_convert_flt_dbl (raw_buffer, valbuf);
f75d70cc
RH
506 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer);
507 break;
5ec2bb99
RH
508
509 case 8:
510 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
511 break;
512
24064b5c
RH
513 case 16:
514 /* FIXME: 128-bit long doubles are returned like structures:
515 by writing into indirect storage provided by the caller
516 as the first argument. */
517 error ("Cannot set a 128-bit long double return value.");
518
5ec2bb99 519 default:
67dfac52 520 internal_error (__FILE__, __LINE__, "unknown floating point width");
5ec2bb99
RH
521 }
522 break;
d2427a71 523
7b5e1cb3
RH
524 case TYPE_CODE_COMPLEX:
525 switch (length)
526 {
527 case 8:
528 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
529 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
530 break;
531
532 case 16:
533 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
534 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM+1,
535 (const char *)valbuf + 8);
536 break;
537
538 case 32:
539 /* FIXME: 128-bit long doubles are returned like structures:
540 by writing into indirect storage provided by the caller
541 as the first argument. */
542 error ("Cannot set a 128-bit long double return value.");
543
544 default:
67dfac52 545 internal_error (__FILE__, __LINE__, "unknown floating point width");
7b5e1cb3
RH
546 }
547 break;
548
5ec2bb99
RH
549 default:
550 /* Assume everything else degenerates to an integer. */
0ede8eca
RH
551 /* 32-bit values must be sign-extended to 64 bits
552 even if the base data type is unsigned. */
553 if (length == 4)
554 valtype = builtin_type_int32;
5ec2bb99
RH
555 l = unpack_long (valtype, valbuf);
556 regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l);
557 break;
558 }
c906108c
SS
559}
560
d2427a71
RH
561static int
562alpha_use_struct_convention (int gcc_p, struct type *type)
c906108c 563{
d2427a71
RH
564 /* Structures are returned by ref in extra arg0. */
565 return 1;
566}
c906108c 567
d2427a71
RH
568\f
569static const unsigned char *
570alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
c906108c 571{
d2427a71
RH
572 static const unsigned char alpha_breakpoint[] =
573 { 0x80, 0, 0, 0 }; /* call_pal bpt */
c906108c 574
d2427a71
RH
575 *lenptr = sizeof(alpha_breakpoint);
576 return (alpha_breakpoint);
577}
c906108c 578
d2427a71
RH
579\f
580/* This returns the PC of the first insn after the prologue.
581 If we can't find the prologue, then return 0. */
c906108c 582
d2427a71
RH
583CORE_ADDR
584alpha_after_prologue (CORE_ADDR pc)
c906108c 585{
d2427a71
RH
586 struct symtab_and_line sal;
587 CORE_ADDR func_addr, func_end;
c906108c 588
d2427a71 589 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
c5aa993b 590 return 0;
c906108c 591
d2427a71
RH
592 sal = find_pc_line (func_addr, 0);
593 if (sal.end < func_end)
594 return sal.end;
c5aa993b 595
d2427a71
RH
596 /* The line after the prologue is after the end of the function. In this
597 case, tell the caller to find the prologue the hard way. */
598 return 0;
c906108c
SS
599}
600
d2427a71
RH
601/* Read an instruction from memory at PC, looking through breakpoints. */
602
603unsigned int
604alpha_read_insn (CORE_ADDR pc)
c906108c 605{
d2427a71
RH
606 char buf[4];
607 int status;
c5aa993b 608
d2427a71
RH
609 status = read_memory_nobpt (pc, buf, 4);
610 if (status)
611 memory_error (status, pc);
612 return extract_unsigned_integer (buf, 4);
613}
c5aa993b 614
d2427a71
RH
615/* To skip prologues, I use this predicate. Returns either PC itself
616 if the code at PC does not look like a function prologue; otherwise
617 returns an address that (if we're lucky) follows the prologue. If
618 LENIENT, then we must skip everything which is involved in setting
619 up the frame (it's OK to skip more, just so long as we don't skip
620 anything which might clobber the registers which are being saved. */
c906108c 621
d2427a71
RH
622static CORE_ADDR
623alpha_skip_prologue (CORE_ADDR pc)
624{
625 unsigned long inst;
626 int offset;
627 CORE_ADDR post_prologue_pc;
628 char buf[4];
c906108c 629
d2427a71
RH
630 /* Silently return the unaltered pc upon memory errors.
631 This could happen on OSF/1 if decode_line_1 tries to skip the
632 prologue for quickstarted shared library functions when the
633 shared library is not yet mapped in.
634 Reading target memory is slow over serial lines, so we perform
635 this check only if the target has shared libraries (which all
636 Alpha targets do). */
637 if (target_read_memory (pc, buf, 4))
638 return pc;
c906108c 639
d2427a71
RH
640 /* See if we can determine the end of the prologue via the symbol table.
641 If so, then return either PC, or the PC after the prologue, whichever
642 is greater. */
c906108c 643
d2427a71
RH
644 post_prologue_pc = alpha_after_prologue (pc);
645 if (post_prologue_pc != 0)
646 return max (pc, post_prologue_pc);
c906108c 647
d2427a71
RH
648 /* Can't determine prologue from the symbol table, need to examine
649 instructions. */
dc1b0db2 650
d2427a71
RH
651 /* Skip the typical prologue instructions. These are the stack adjustment
652 instruction and the instructions that save registers on the stack
653 or in the gcc frame. */
654 for (offset = 0; offset < 100; offset += 4)
655 {
656 inst = alpha_read_insn (pc + offset);
c906108c 657
d2427a71
RH
658 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
659 continue;
660 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
661 continue;
662 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
663 continue;
664 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
665 continue;
c906108c 666
d2427a71
RH
667 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
668 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
669 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
670 continue;
c906108c 671
d2427a71
RH
672 if (inst == 0x47de040f) /* bis sp,sp,fp */
673 continue;
674 if (inst == 0x47fe040f) /* bis zero,sp,fp */
675 continue;
c906108c 676
d2427a71 677 break;
c906108c 678 }
d2427a71
RH
679 return pc + offset;
680}
c906108c 681
d2427a71
RH
682\f
683/* Figure out where the longjmp will land.
684 We expect the first arg to be a pointer to the jmp_buf structure from
685 which we extract the PC (JB_PC) that we will land at. The PC is copied
686 into the "pc". This routine returns true on success. */
c906108c
SS
687
688static int
d2427a71 689alpha_get_longjmp_target (CORE_ADDR *pc)
c906108c 690{
d2427a71
RH
691 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
692 CORE_ADDR jb_addr;
5ab84872 693 char raw_buffer[ALPHA_REGISTER_SIZE];
c906108c 694
d2427a71 695 jb_addr = read_register (ALPHA_A0_REGNUM);
c906108c 696
d2427a71
RH
697 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
698 raw_buffer, tdep->jb_elt_size))
c906108c 699 return 0;
d2427a71 700
7c0b4a20 701 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size);
d2427a71 702 return 1;
c906108c
SS
703}
704
d2427a71
RH
705\f
706/* Frame unwinder for signal trampolines. We use alpha tdep bits that
707 describe the location and shape of the sigcontext structure. After
708 that, all registers are in memory, so it's easy. */
709/* ??? Shouldn't we be able to do this generically, rather than with
710 OSABI data specific to Alpha? */
711
712struct alpha_sigtramp_unwind_cache
c906108c 713{
d2427a71
RH
714 CORE_ADDR sigcontext_addr;
715};
c906108c 716
d2427a71
RH
717static struct alpha_sigtramp_unwind_cache *
718alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
719 void **this_prologue_cache)
720{
721 struct alpha_sigtramp_unwind_cache *info;
722 struct gdbarch_tdep *tdep;
c906108c 723
d2427a71
RH
724 if (*this_prologue_cache)
725 return *this_prologue_cache;
c906108c 726
d2427a71
RH
727 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
728 *this_prologue_cache = info;
c906108c 729
d2427a71
RH
730 tdep = gdbarch_tdep (current_gdbarch);
731 info->sigcontext_addr = tdep->sigcontext_addr (next_frame);
c906108c 732
d2427a71 733 return info;
c906108c
SS
734}
735
d2427a71
RH
736/* Return the address of REGNO in a sigtramp frame. Since this is all
737 arithmetic, it doesn't seem worthwhile to cache it. */
c5aa993b 738
d2427a71
RH
739#ifndef SIGFRAME_PC_OFF
740#define SIGFRAME_PC_OFF (2 * 8)
741#define SIGFRAME_REGSAVE_OFF (4 * 8)
742#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_REGSAVE_OFF + 32 * 8 + 8)
743#endif
c5aa993b 744
d2427a71
RH
745static CORE_ADDR
746alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, unsigned int regno)
747{
748 if (regno < 32)
749 return sigcontext_addr + SIGFRAME_REGSAVE_OFF + regno * 8;
750 if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
751 return sigcontext_addr + SIGFRAME_FPREGSAVE_OFF + regno * 8;
752 if (regno == PC_REGNUM)
753 return sigcontext_addr + SIGFRAME_PC_OFF;
c5aa993b 754
d2427a71 755 return 0;
c906108c
SS
756}
757
d2427a71
RH
758/* Given a GDB frame, determine the address of the calling function's
759 frame. This will be used to create a new GDB frame struct. */
140f9984 760
dc129d82 761static void
d2427a71
RH
762alpha_sigtramp_frame_this_id (struct frame_info *next_frame,
763 void **this_prologue_cache,
764 struct frame_id *this_id)
c906108c 765{
d2427a71
RH
766 struct alpha_sigtramp_unwind_cache *info
767 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
768 struct gdbarch_tdep *tdep;
769 CORE_ADDR stack_addr, code_addr;
770
771 /* If the OSABI couldn't locate the sigcontext, give up. */
772 if (info->sigcontext_addr == 0)
773 return;
774
775 /* If we have dynamic signal trampolines, find their start.
776 If we do not, then we must assume there is a symbol record
777 that can provide the start address. */
778 tdep = gdbarch_tdep (current_gdbarch);
779 if (tdep->dynamic_sigtramp_offset)
c906108c 780 {
d2427a71
RH
781 int offset;
782 code_addr = frame_pc_unwind (next_frame);
783 offset = tdep->dynamic_sigtramp_offset (code_addr);
784 if (offset >= 0)
785 code_addr -= offset;
c906108c 786 else
d2427a71 787 code_addr = 0;
c906108c 788 }
d2427a71
RH
789 else
790 code_addr = frame_func_unwind (next_frame);
c906108c 791
d2427a71
RH
792 /* The stack address is trivially read from the sigcontext. */
793 stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr,
794 ALPHA_SP_REGNUM);
795 stack_addr = read_memory_unsigned_integer (stack_addr, ALPHA_REGISTER_SIZE);
c906108c 796
d2427a71 797 *this_id = frame_id_build (stack_addr, code_addr);
c906108c
SS
798}
799
d2427a71 800/* Retrieve the value of REGNUM in FRAME. Don't give up! */
c906108c 801
d2427a71
RH
802static void
803alpha_sigtramp_frame_prev_register (struct frame_info *next_frame,
804 void **this_prologue_cache,
805 int regnum, int *optimizedp,
806 enum lval_type *lvalp, CORE_ADDR *addrp,
807 int *realnump, void *bufferp)
c906108c 808{
d2427a71
RH
809 struct alpha_sigtramp_unwind_cache *info
810 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
811 CORE_ADDR addr;
c906108c 812
d2427a71 813 if (info->sigcontext_addr != 0)
c906108c 814 {
d2427a71
RH
815 /* All integer and fp registers are stored in memory. */
816 addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum);
817 if (addr != 0)
c906108c 818 {
d2427a71
RH
819 *optimizedp = 0;
820 *lvalp = lval_memory;
821 *addrp = addr;
822 *realnump = -1;
823 if (bufferp != NULL)
824 read_memory (addr, bufferp, ALPHA_REGISTER_SIZE);
825 return;
c906108c 826 }
c906108c
SS
827 }
828
d2427a71
RH
829 /* This extra register may actually be in the sigcontext, but our
830 current description of it in alpha_sigtramp_frame_unwind_cache
831 doesn't include it. Too bad. Fall back on whatever's in the
832 outer frame. */
833 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
834 realnump, bufferp);
835}
c906108c 836
d2427a71
RH
837static const struct frame_unwind alpha_sigtramp_frame_unwind = {
838 SIGTRAMP_FRAME,
839 alpha_sigtramp_frame_this_id,
840 alpha_sigtramp_frame_prev_register
841};
c906108c 842
d2427a71
RH
843static const struct frame_unwind *
844alpha_sigtramp_frame_p (CORE_ADDR pc)
845{
846 char *name;
c906108c 847
d2427a71
RH
848 /* We shouldn't even bother to try if the OSABI didn't register
849 a sigcontext_addr handler. */
850 if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr)
851 return NULL;
c906108c 852
d2427a71
RH
853 /* Otherwise we should be in a signal frame. */
854 find_pc_partial_function (pc, &name, NULL, NULL);
855 if (PC_IN_SIGTRAMP (pc, name))
856 return &alpha_sigtramp_frame_unwind;
c906108c 857
d2427a71 858 return NULL;
c906108c 859}
d2427a71
RH
860\f
861/* Fallback alpha frame unwinder. Uses instruction scanning and knows
862 something about the traditional layout of alpha stack frames. */
c906108c 863
d2427a71 864struct alpha_heuristic_unwind_cache
c906108c 865{
d2427a71
RH
866 CORE_ADDR *saved_regs;
867 CORE_ADDR vfp;
868 CORE_ADDR start_pc;
869 int return_reg;
870};
c906108c 871
d2427a71
RH
872/* Heuristic_proc_start may hunt through the text section for a long
873 time across a 2400 baud serial line. Allows the user to limit this
874 search. */
875static unsigned int heuristic_fence_post = 0;
c906108c 876
d2427a71
RH
877/* Attempt to locate the start of the function containing PC. We assume that
878 the previous function ends with an about_to_return insn. Not foolproof by
879 any means, since gcc is happy to put the epilogue in the middle of a
880 function. But we're guessing anyway... */
c906108c 881
d2427a71
RH
882static CORE_ADDR
883alpha_heuristic_proc_start (CORE_ADDR pc)
884{
885 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
886 CORE_ADDR last_non_nop = pc;
887 CORE_ADDR fence = pc - heuristic_fence_post;
888 CORE_ADDR orig_pc = pc;
fbe586ae 889 CORE_ADDR func;
9e0b60a8 890
d2427a71
RH
891 if (pc == 0)
892 return 0;
9e0b60a8 893
fbe586ae
RH
894 /* First see if we can find the start of the function from minimal
895 symbol information. This can succeed with a binary that doesn't
896 have debug info, but hasn't been stripped. */
897 func = get_pc_function_start (pc);
898 if (func)
899 return func;
900
d2427a71
RH
901 if (heuristic_fence_post == UINT_MAX
902 || fence < tdep->vm_min_address)
903 fence = tdep->vm_min_address;
c906108c 904
d2427a71
RH
905 /* Search back for previous return; also stop at a 0, which might be
906 seen for instance before the start of a code section. Don't include
907 nops, since this usually indicates padding between functions. */
908 for (pc -= 4; pc >= fence; pc -= 4)
c906108c 909 {
d2427a71
RH
910 unsigned int insn = alpha_read_insn (pc);
911 switch (insn)
c906108c 912 {
d2427a71
RH
913 case 0: /* invalid insn */
914 case 0x6bfa8001: /* ret $31,($26),1 */
915 return last_non_nop;
916
917 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
918 case 0x47ff041f: /* nop: bis $31,$31,$31 */
919 break;
920
921 default:
922 last_non_nop = pc;
923 break;
c906108c 924 }
d2427a71 925 }
c906108c 926
d2427a71
RH
927 /* It's not clear to me why we reach this point when stopping quietly,
928 but with this test, at least we don't print out warnings for every
929 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
930 if (stop_soon == NO_STOP_QUIETLY)
931 {
932 static int blurb_printed = 0;
c906108c 933
d2427a71
RH
934 if (fence == tdep->vm_min_address)
935 warning ("Hit beginning of text section without finding");
c906108c 936 else
d2427a71
RH
937 warning ("Hit heuristic-fence-post without finding");
938 warning ("enclosing function for address 0x%s", paddr_nz (orig_pc));
c906108c 939
d2427a71
RH
940 if (!blurb_printed)
941 {
942 printf_filtered ("\
943This warning occurs if you are debugging a function without any symbols\n\
944(for example, in a stripped executable). In that case, you may wish to\n\
945increase the size of the search with the `set heuristic-fence-post' command.\n\
946\n\
947Otherwise, you told GDB there was a function where there isn't one, or\n\
948(more likely) you have encountered a bug in GDB.\n");
949 blurb_printed = 1;
950 }
951 }
c906108c 952
d2427a71
RH
953 return 0;
954}
c906108c 955
fbe586ae 956static struct alpha_heuristic_unwind_cache *
d2427a71
RH
957alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame,
958 void **this_prologue_cache,
959 CORE_ADDR start_pc)
960{
961 struct alpha_heuristic_unwind_cache *info;
962 ULONGEST val;
963 CORE_ADDR limit_pc, cur_pc;
964 int frame_reg, frame_size, return_reg, reg;
c906108c 965
d2427a71
RH
966 if (*this_prologue_cache)
967 return *this_prologue_cache;
c906108c 968
d2427a71
RH
969 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
970 *this_prologue_cache = info;
971 info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS);
c906108c 972
d2427a71
RH
973 limit_pc = frame_pc_unwind (next_frame);
974 if (start_pc == 0)
975 start_pc = alpha_heuristic_proc_start (limit_pc);
976 info->start_pc = start_pc;
c906108c 977
d2427a71
RH
978 frame_reg = ALPHA_SP_REGNUM;
979 frame_size = 0;
980 return_reg = -1;
c906108c 981
d2427a71
RH
982 /* If we've identified a likely place to start, do code scanning. */
983 if (start_pc != 0)
c5aa993b 984 {
d2427a71
RH
985 /* Limit the forward search to 50 instructions. */
986 if (start_pc + 200 < limit_pc)
987 limit_pc = start_pc + 200;
c5aa993b 988
d2427a71
RH
989 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4)
990 {
991 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 992
d2427a71
RH
993 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
994 {
995 if (word & 0x8000)
996 {
997 /* Consider only the first stack allocation instruction
998 to contain the static size of the frame. */
999 if (frame_size == 0)
1000 frame_size = (-word) & 0xffff;
1001 }
1002 else
1003 {
1004 /* Exit loop if a positive stack adjustment is found, which
1005 usually means that the stack cleanup code in the function
1006 epilogue is reached. */
1007 break;
1008 }
1009 }
1010 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1011 {
1012 reg = (word & 0x03e00000) >> 21;
1013
1014 if (reg == 31)
1015 continue;
1016
1017 /* Do not compute the address where the register was saved yet,
1018 because we don't know yet if the offset will need to be
1019 relative to $sp or $fp (we can not compute the address
1020 relative to $sp if $sp is updated during the execution of
1021 the current subroutine, for instance when doing some alloca).
1022 So just store the offset for the moment, and compute the
1023 address later when we know whether this frame has a frame
1024 pointer or not. */
1025 /* Hack: temporarily add one, so that the offset is non-zero
1026 and we can tell which registers have save offsets below. */
1027 info->saved_regs[reg] = (word & 0xffff) + 1;
1028
1029 /* Starting with OSF/1-3.2C, the system libraries are shipped
1030 without local symbols, but they still contain procedure
1031 descriptors without a symbol reference. GDB is currently
1032 unable to find these procedure descriptors and uses
1033 heuristic_proc_desc instead.
1034 As some low level compiler support routines (__div*, __add*)
1035 use a non-standard return address register, we have to
1036 add some heuristics to determine the return address register,
1037 or stepping over these routines will fail.
1038 Usually the return address register is the first register
1039 saved on the stack, but assembler optimization might
1040 rearrange the register saves.
1041 So we recognize only a few registers (t7, t9, ra) within
1042 the procedure prologue as valid return address registers.
1043 If we encounter a return instruction, we extract the
1044 the return address register from it.
1045
1046 FIXME: Rewriting GDB to access the procedure descriptors,
1047 e.g. via the minimal symbol table, might obviate this hack. */
1048 if (return_reg == -1
1049 && cur_pc < (start_pc + 80)
1050 && (reg == ALPHA_T7_REGNUM
1051 || reg == ALPHA_T9_REGNUM
1052 || reg == ALPHA_RA_REGNUM))
1053 return_reg = reg;
1054 }
1055 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1056 return_reg = (word >> 16) & 0x1f;
1057 else if (word == 0x47de040f) /* bis sp,sp,fp */
1058 frame_reg = ALPHA_GCC_FP_REGNUM;
1059 else if (word == 0x47fe040f) /* bis zero,sp,fp */
1060 frame_reg = ALPHA_GCC_FP_REGNUM;
1061 }
c5aa993b 1062
d2427a71
RH
1063 /* If we haven't found a valid return address register yet, keep
1064 searching in the procedure prologue. */
1065 if (return_reg == -1)
1066 {
1067 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
1068 {
1069 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 1070
d2427a71
RH
1071 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1072 {
1073 reg = (word & 0x03e00000) >> 21;
1074 if (reg == ALPHA_T7_REGNUM
1075 || reg == ALPHA_T9_REGNUM
1076 || reg == ALPHA_RA_REGNUM)
1077 {
1078 return_reg = reg;
1079 break;
1080 }
1081 }
1082 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1083 {
1084 return_reg = (word >> 16) & 0x1f;
1085 break;
1086 }
85b32d22
RH
1087
1088 cur_pc += 4;
d2427a71
RH
1089 }
1090 }
c906108c 1091 }
c906108c 1092
d2427a71
RH
1093 /* Failing that, do default to the customary RA. */
1094 if (return_reg == -1)
1095 return_reg = ALPHA_RA_REGNUM;
1096 info->return_reg = return_reg;
f8453e34 1097
d2427a71
RH
1098 frame_unwind_unsigned_register (next_frame, frame_reg, &val);
1099 info->vfp = val + frame_size;
c906108c 1100
d2427a71
RH
1101 /* Convert offsets to absolute addresses. See above about adding
1102 one to the offsets to make all detected offsets non-zero. */
1103 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
1104 if (info->saved_regs[reg])
1105 info->saved_regs[reg] += val - 1;
1106
1107 return info;
c906108c 1108}
c906108c 1109
d2427a71
RH
1110/* Given a GDB frame, determine the address of the calling function's
1111 frame. This will be used to create a new GDB frame struct. */
1112
fbe586ae 1113static void
d2427a71
RH
1114alpha_heuristic_frame_this_id (struct frame_info *next_frame,
1115 void **this_prologue_cache,
1116 struct frame_id *this_id)
c906108c 1117{
d2427a71
RH
1118 struct alpha_heuristic_unwind_cache *info
1119 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1120
fbe586ae
RH
1121 /* This is meant to halt the backtrace at "_start". Make sure we
1122 don't halt it at a generic dummy frame. */
1123 if (inside_entry_file (info->start_pc))
1124 return;
1125
d2427a71 1126 *this_id = frame_id_build (info->vfp, info->start_pc);
c906108c
SS
1127}
1128
d2427a71
RH
1129/* Retrieve the value of REGNUM in FRAME. Don't give up! */
1130
fbe586ae 1131static void
d2427a71
RH
1132alpha_heuristic_frame_prev_register (struct frame_info *next_frame,
1133 void **this_prologue_cache,
1134 int regnum, int *optimizedp,
1135 enum lval_type *lvalp, CORE_ADDR *addrp,
1136 int *realnump, void *bufferp)
c906108c 1137{
d2427a71
RH
1138 struct alpha_heuristic_unwind_cache *info
1139 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
1140
1141 /* The PC of the previous frame is stored in the link register of
1142 the current frame. Frob regnum so that we pull the value from
1143 the correct place. */
1144 if (regnum == ALPHA_PC_REGNUM)
1145 regnum = info->return_reg;
1146
1147 /* For all registers known to be saved in the current frame,
1148 do the obvious and pull the value out. */
1149 if (info->saved_regs[regnum])
c906108c 1150 {
d2427a71
RH
1151 *optimizedp = 0;
1152 *lvalp = lval_memory;
1153 *addrp = info->saved_regs[regnum];
1154 *realnump = -1;
1155 if (bufferp != NULL)
1156 read_memory (*addrp, bufferp, ALPHA_REGISTER_SIZE);
c906108c
SS
1157 return;
1158 }
1159
d2427a71
RH
1160 /* The stack pointer of the previous frame is computed by popping
1161 the current stack frame. */
1162 if (regnum == ALPHA_SP_REGNUM)
c906108c 1163 {
d2427a71
RH
1164 *optimizedp = 0;
1165 *lvalp = not_lval;
1166 *addrp = 0;
1167 *realnump = -1;
1168 if (bufferp != NULL)
1169 store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp);
1170 return;
c906108c 1171 }
95b80706 1172
d2427a71
RH
1173 /* Otherwise assume the next frame has the same register value. */
1174 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
1175 realnump, bufferp);
95b80706
JT
1176}
1177
d2427a71
RH
1178static const struct frame_unwind alpha_heuristic_frame_unwind = {
1179 NORMAL_FRAME,
1180 alpha_heuristic_frame_this_id,
1181 alpha_heuristic_frame_prev_register
1182};
c906108c 1183
d2427a71
RH
1184static const struct frame_unwind *
1185alpha_heuristic_frame_p (CORE_ADDR pc)
c906108c 1186{
d2427a71 1187 return &alpha_heuristic_frame_unwind;
c906108c
SS
1188}
1189
fbe586ae 1190static CORE_ADDR
d2427a71
RH
1191alpha_heuristic_frame_base_address (struct frame_info *next_frame,
1192 void **this_prologue_cache)
c906108c 1193{
d2427a71
RH
1194 struct alpha_heuristic_unwind_cache *info
1195 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1196
d2427a71 1197 return info->vfp;
c906108c
SS
1198}
1199
d2427a71
RH
1200static const struct frame_base alpha_heuristic_frame_base = {
1201 &alpha_heuristic_frame_unwind,
1202 alpha_heuristic_frame_base_address,
1203 alpha_heuristic_frame_base_address,
1204 alpha_heuristic_frame_base_address
1205};
1206
c906108c 1207/* Just like reinit_frame_cache, but with the right arguments to be
d2427a71 1208 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
c906108c
SS
1209
1210static void
fba45db2 1211reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
c906108c
SS
1212{
1213 reinit_frame_cache ();
1214}
1215
d2427a71
RH
1216\f
1217/* ALPHA stack frames are almost impenetrable. When execution stops,
1218 we basically have to look at symbol information for the function
1219 that we stopped in, which tells us *which* register (if any) is
1220 the base of the frame pointer, and what offset from that register
1221 the frame itself is at.
c906108c 1222
d2427a71
RH
1223 This presents a problem when trying to examine a stack in memory
1224 (that isn't executing at the moment), using the "frame" command. We
1225 don't have a PC, nor do we have any registers except SP.
c906108c 1226
d2427a71
RH
1227 This routine takes two arguments, SP and PC, and tries to make the
1228 cached frames look as if these two arguments defined a frame on the
1229 cache. This allows the rest of info frame to extract the important
1230 arguments without difficulty. */
ec32e4be 1231
d2427a71
RH
1232struct frame_info *
1233alpha_setup_arbitrary_frame (int argc, CORE_ADDR *argv)
0d056799 1234{
d2427a71
RH
1235 if (argc != 2)
1236 error ("ALPHA frame specifications require two arguments: sp and pc");
0d056799 1237
d2427a71 1238 return create_new_frame (argv[0], argv[1]);
0d056799
JT
1239}
1240
d2427a71
RH
1241/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1242 dummy frame. The frame ID's base needs to match the TOS value
1243 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1244 breakpoint. */
d734c450 1245
d2427a71
RH
1246static struct frame_id
1247alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
0d056799 1248{
d2427a71
RH
1249 ULONGEST base;
1250 frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base);
1251 return frame_id_build (base, frame_pc_unwind (next_frame));
0d056799
JT
1252}
1253
dc129d82 1254static CORE_ADDR
d2427a71 1255alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
accc6d1f 1256{
d2427a71
RH
1257 ULONGEST pc;
1258 frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc);
1259 return pc;
accc6d1f
JT
1260}
1261
d2427a71 1262\f
ec32e4be
JT
1263/* alpha_software_single_step() is called just before we want to resume
1264 the inferior, if we want to single-step it but there is no hardware
1265 or kernel single-step support (NetBSD on Alpha, for example). We find
1266 the target of the coming instruction and breakpoint it.
1267
1268 single_step is also called just after the inferior stops. If we had
1269 set up a simulated single-step, we undo our damage. */
1270
1271static CORE_ADDR
1272alpha_next_pc (CORE_ADDR pc)
1273{
1274 unsigned int insn;
1275 unsigned int op;
1276 int offset;
1277 LONGEST rav;
1278
1279 insn = read_memory_unsigned_integer (pc, sizeof (insn));
1280
1281 /* Opcode is top 6 bits. */
1282 op = (insn >> 26) & 0x3f;
1283
1284 if (op == 0x1a)
1285 {
1286 /* Jump format: target PC is:
1287 RB & ~3 */
1288 return (read_register ((insn >> 16) & 0x1f) & ~3);
1289 }
1290
1291 if ((op & 0x30) == 0x30)
1292 {
1293 /* Branch format: target PC is:
1294 (new PC) + (4 * sext(displacement)) */
1295 if (op == 0x30 || /* BR */
1296 op == 0x34) /* BSR */
1297 {
1298 branch_taken:
1299 offset = (insn & 0x001fffff);
1300 if (offset & 0x00100000)
1301 offset |= 0xffe00000;
1302 offset *= 4;
1303 return (pc + 4 + offset);
1304 }
1305
1306 /* Need to determine if branch is taken; read RA. */
1307 rav = (LONGEST) read_register ((insn >> 21) & 0x1f);
1308 switch (op)
1309 {
1310 case 0x38: /* BLBC */
1311 if ((rav & 1) == 0)
1312 goto branch_taken;
1313 break;
1314 case 0x3c: /* BLBS */
1315 if (rav & 1)
1316 goto branch_taken;
1317 break;
1318 case 0x39: /* BEQ */
1319 if (rav == 0)
1320 goto branch_taken;
1321 break;
1322 case 0x3d: /* BNE */
1323 if (rav != 0)
1324 goto branch_taken;
1325 break;
1326 case 0x3a: /* BLT */
1327 if (rav < 0)
1328 goto branch_taken;
1329 break;
1330 case 0x3b: /* BLE */
1331 if (rav <= 0)
1332 goto branch_taken;
1333 break;
1334 case 0x3f: /* BGT */
1335 if (rav > 0)
1336 goto branch_taken;
1337 break;
1338 case 0x3e: /* BGE */
1339 if (rav >= 0)
1340 goto branch_taken;
1341 break;
d2427a71
RH
1342
1343 /* ??? Missing floating-point branches. */
ec32e4be
JT
1344 }
1345 }
1346
1347 /* Not a branch or branch not taken; target PC is:
1348 pc + 4 */
1349 return (pc + 4);
1350}
1351
1352void
1353alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p)
1354{
1355 static CORE_ADDR next_pc;
1356 typedef char binsn_quantum[BREAKPOINT_MAX];
1357 static binsn_quantum break_mem;
1358 CORE_ADDR pc;
1359
1360 if (insert_breakpoints_p)
1361 {
1362 pc = read_pc ();
1363 next_pc = alpha_next_pc (pc);
1364
1365 target_insert_breakpoint (next_pc, break_mem);
1366 }
1367 else
1368 {
1369 target_remove_breakpoint (next_pc, break_mem);
1370 write_pc (next_pc);
1371 }
c906108c
SS
1372}
1373
dc129d82 1374\f
dc129d82
JT
1375/* Initialize the current architecture based on INFO. If possible, re-use an
1376 architecture from ARCHES, which is a list of architectures already created
1377 during this debugging session.
1378
1379 Called e.g. at program startup, when reading a core file, and when reading
1380 a binary file. */
1381
1382static struct gdbarch *
1383alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1384{
1385 struct gdbarch_tdep *tdep;
1386 struct gdbarch *gdbarch;
dc129d82
JT
1387
1388 /* Try to determine the ABI of the object we are loading. */
4be87837 1389 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
dc129d82 1390 {
4be87837
DJ
1391 /* If it's an ECOFF file, assume it's OSF/1. */
1392 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
aff87235 1393 info.osabi = GDB_OSABI_OSF1;
dc129d82
JT
1394 }
1395
1396 /* Find a candidate among extant architectures. */
4be87837
DJ
1397 arches = gdbarch_list_lookup_by_info (arches, &info);
1398 if (arches != NULL)
1399 return arches->gdbarch;
dc129d82
JT
1400
1401 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1402 gdbarch = gdbarch_alloc (&info, tdep);
1403
d2427a71
RH
1404 /* Lowest text address. This is used by heuristic_proc_start()
1405 to decide when to stop looking. */
d9b023cc
JT
1406 tdep->vm_min_address = (CORE_ADDR) 0x120000000;
1407
36a6271d 1408 tdep->dynamic_sigtramp_offset = NULL;
5868c862 1409 tdep->sigcontext_addr = NULL;
36a6271d 1410
accc6d1f
JT
1411 tdep->jb_pc = -1; /* longjmp support not enabled by default */
1412
dc129d82
JT
1413 /* Type sizes */
1414 set_gdbarch_short_bit (gdbarch, 16);
1415 set_gdbarch_int_bit (gdbarch, 32);
1416 set_gdbarch_long_bit (gdbarch, 64);
1417 set_gdbarch_long_long_bit (gdbarch, 64);
1418 set_gdbarch_float_bit (gdbarch, 32);
1419 set_gdbarch_double_bit (gdbarch, 64);
1420 set_gdbarch_long_double_bit (gdbarch, 64);
1421 set_gdbarch_ptr_bit (gdbarch, 64);
1422
1423 /* Register info */
1424 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1425 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
dc129d82
JT
1426 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1427 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1428
1429 set_gdbarch_register_name (gdbarch, alpha_register_name);
dc129d82
JT
1430 set_gdbarch_register_byte (gdbarch, alpha_register_byte);
1431 set_gdbarch_register_raw_size (gdbarch, alpha_register_raw_size);
dc129d82 1432 set_gdbarch_register_virtual_size (gdbarch, alpha_register_virtual_size);
dc129d82
JT
1433 set_gdbarch_register_virtual_type (gdbarch, alpha_register_virtual_type);
1434
1435 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1436 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1437
1438 set_gdbarch_register_convertible (gdbarch, alpha_register_convertible);
1439 set_gdbarch_register_convert_to_virtual (gdbarch,
1440 alpha_register_convert_to_virtual);
1441 set_gdbarch_register_convert_to_raw (gdbarch, alpha_register_convert_to_raw);
1442
615967cb
RH
1443 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p);
1444
d2427a71 1445 /* Prologue heuristics. */
dc129d82
JT
1446 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1447
5ef165c2
RH
1448 /* Disassembler. */
1449 set_gdbarch_print_insn (gdbarch, print_insn_alpha);
1450
d2427a71 1451 /* Call info. */
dc129d82
JT
1452 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1453 set_gdbarch_frameless_function_invocation (gdbarch,
1454 generic_frameless_function_invocation_not);
1455
dc129d82 1456 set_gdbarch_use_struct_convention (gdbarch, alpha_use_struct_convention);
5ec2bb99
RH
1457 set_gdbarch_extract_return_value (gdbarch, alpha_extract_return_value);
1458 set_gdbarch_store_return_value (gdbarch, alpha_store_return_value);
1459 set_gdbarch_extract_struct_value_address (gdbarch,
dc129d82
JT
1460 alpha_extract_struct_value_address);
1461
1462 /* Settings for calling functions in the inferior. */
c88e30c0 1463 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
d2427a71
RH
1464
1465 /* Methods for saving / extracting a dummy frame's ID. */
1466 set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id);
1467 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1468
1469 /* Return the unwound PC value. */
1470 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
dc129d82
JT
1471
1472 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
36a6271d 1473 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
dc129d82 1474
95b80706 1475 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
dc129d82 1476 set_gdbarch_decr_pc_after_break (gdbarch, 4);
95b80706
JT
1477
1478 set_gdbarch_function_start_offset (gdbarch, 0);
dc129d82
JT
1479 set_gdbarch_frame_args_skip (gdbarch, 0);
1480
44dffaac 1481 /* Hook in ABI-specific overrides, if they have been registered. */
4be87837 1482 gdbarch_init_osabi (info, gdbarch);
44dffaac 1483
accc6d1f
JT
1484 /* Now that we have tuned the configuration, set a few final things
1485 based on what the OS ABI has told us. */
1486
1487 if (tdep->jb_pc >= 0)
1488 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1489
d2427a71
RH
1490 frame_unwind_append_predicate (gdbarch, alpha_sigtramp_frame_p);
1491 frame_unwind_append_predicate (gdbarch, alpha_heuristic_frame_p);
dc129d82 1492
d2427a71 1493 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
accc6d1f 1494
d2427a71 1495 return gdbarch;
dc129d82
JT
1496}
1497
c906108c 1498void
fba45db2 1499_initialize_alpha_tdep (void)
c906108c
SS
1500{
1501 struct cmd_list_element *c;
1502
d2427a71 1503 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
c906108c
SS
1504
1505 /* Let the user set the fence post for heuristic_proc_start. */
1506
1507 /* We really would like to have both "0" and "unlimited" work, but
1508 command.c doesn't deal with that. So make it a var_zinteger
1509 because the user can always use "999999" or some such for unlimited. */
1510 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
1511 (char *) &heuristic_fence_post,
1512 "\
1513Set the distance searched for the start of a function.\n\
1514If you are debugging a stripped executable, GDB needs to search through the\n\
1515program for the start of a function. This command sets the distance of the\n\
1516search. The only need to set it is when debugging a stripped executable.",
1517 &setlist);
1518 /* We need to throw away the frame cache when we set this, since it
1519 might change our ability to get backtraces. */
9f60d481 1520 set_cmd_sfunc (c, reinit_frame_cache_sfunc);
c906108c
SS
1521 add_show_from_set (c, &showlist);
1522}