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a4b6fc86 1/* Native-dependent code for GNU/Linux x86-64.
0a65a603 2
42a4f53d 3 Copyright (C) 2001-2019 Free Software Foundation, Inc.
53e95fcf
JS
4 Contributed by Jiri Smid, SuSE Labs.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
a9762ec7 10 the Free Software Foundation; either version 3 of the License, or
53e95fcf
JS
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
a9762ec7 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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20
21#include "defs.h"
4de283e4
TT
22#include "inferior.h"
23#include "regcache.h"
24#include "elf/common.h"
25#include <sys/uio.h>
26#include "nat/gdb_ptrace.h"
c43af07c 27#include <asm/prctl.h>
33a0a2ac 28#include <sys/reg.h>
4de283e4
TT
29#include "gregset.h"
30#include "gdb_proc_service.h"
c4f35dd8 31
3116063b 32#include "amd64-nat.h"
9c1488cb 33#include "amd64-tdep.h"
4de283e4 34#include "amd64-linux-tdep.h"
d55e5aa6 35#include "i386-linux-tdep.h"
4de283e4
TT
36#include "common/x86-xstate.h"
37
d55e5aa6 38#include "x86-linux-nat.h"
4de283e4
TT
39#include "nat/linux-ptrace.h"
40#include "nat/amd64-linux-siginfo.h"
60fac5b8 41
2735833d
WT
42/* This definition comes from prctl.h. Kernels older than 2.5.64
43 do not have it. */
44#ifndef PTRACE_ARCH_PRCTL
45#define PTRACE_ARCH_PRCTL 30
46#endif
47
f6ac5f3d
PA
48struct amd64_linux_nat_target final : public x86_linux_nat_target
49{
50 /* Add our register access methods. */
51 void fetch_registers (struct regcache *, int) override;
52 void store_registers (struct regcache *, int) override;
135340af
PA
53
54 bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
55 override;
f6ac5f3d
PA
56};
57
58static amd64_linux_nat_target the_amd64_linux_nat_target;
59
60fac5b8
MK
60/* Mapping between the general-purpose registers in GNU/Linux x86-64
61 `struct user' format and GDB's register cache layout for GNU/Linux
62 i386.
63
64 Note that most GNU/Linux x86-64 registers are 64-bit, while the
65 GNU/Linux i386 registers are all 32-bit, but since we're
66 little-endian we get away with that. */
67
68/* From <sys/reg.h> on GNU/Linux i386. */
430eaf2e 69static int amd64_linux_gregset32_reg_offset[] =
60fac5b8 70{
f5859b4d
MK
71 RAX * 8, RCX * 8, /* %eax, %ecx */
72 RDX * 8, RBX * 8, /* %edx, %ebx */
73 RSP * 8, RBP * 8, /* %esp, %ebp */
74 RSI * 8, RDI * 8, /* %esi, %edi */
75 RIP * 8, EFLAGS * 8, /* %eip, %eflags */
76 CS * 8, SS * 8, /* %cs, %ss */
77 DS * 8, ES * 8, /* %ds, %es */
78 FS * 8, GS * 8, /* %fs, %gs */
60fac5b8
MK
79 -1, -1, -1, -1, -1, -1, -1, -1,
80 -1, -1, -1, -1, -1, -1, -1, -1,
81 -1, -1, -1, -1, -1, -1, -1, -1, -1,
a055a187 82 -1, -1, -1, -1, -1, -1, -1, -1,
01f9f808
MS
83 -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
84 -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
85 -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
86 -1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm7 (AVX512) */
51547df6 87 -1, /* PKEYS register PKRU */
01f9f808 88 ORIG_RAX * 8 /* "orig_eax" */
60fac5b8 89};
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90\f
91
92/* Transfering the general-purpose registers between GDB, inferiors
93 and core files. */
94
3f52fdbc
KB
95/* See amd64_collect_native_gregset. This linux specific version handles
96 issues with negative EAX values not being restored correctly upon syscall
97 return when debugging 32-bit targets. It has no effect on 64-bit
98 targets. */
99
100static void
101amd64_linux_collect_native_gregset (const struct regcache *regcache,
102 void *gregs, int regnum)
103{
104 amd64_collect_native_gregset (regcache, gregs, regnum);
105
106 struct gdbarch *gdbarch = regcache->arch ();
107 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
108 {
109 /* Sign extend EAX value to avoid potential syscall restart
110 problems.
111
112 On Linux, when a syscall is interrupted by a signal, the
113 (kernel function implementing the) syscall may return
114 -ERESTARTSYS when a signal occurs. Doing so indicates that
115 the syscall is restartable. Then, depending on settings
116 associated with the signal handler, and after the signal
117 handler is called, the kernel can then either return -EINTR
118 or it can cause the syscall to be restarted. We are
119 concerned with the latter case here.
120
121 On (32-bit) i386, the status (-ERESTARTSYS) is placed in the
122 EAX register. When debugging a 32-bit process from a 64-bit
123 (amd64) GDB, the debugger fetches 64-bit registers even
124 though the process being debugged is only 32-bit. The
125 register cache is only 32 bits wide though; GDB discards the
126 high 32 bits when placing 64-bit values in the 32-bit
127 regcache. Normally, this is not a problem since the 32-bit
128 process should only care about the lower 32-bit portions of
129 these registers. That said, it can happen that the 64-bit
130 value being restored will be different from the 64-bit value
131 that was originally retrieved from the kernel. The one place
132 (that we know of) where it does matter is in the kernel's
133 syscall restart code. The kernel's code for restarting a
134 syscall after a signal expects to see a negative value
135 (specifically -ERESTARTSYS) in the 64-bit RAX register in
136 order to correctly cause a syscall to be restarted.
137
138 The call to amd64_collect_native_gregset, above, is setting
139 the high 32 bits of RAX (and other registers too) to 0. For
140 syscall restart, we need to sign extend EAX so that RAX will
141 appear as a negative value when EAX is set to -ERESTARTSYS.
142 This in turn will cause the signal handling code in the
143 kernel to recognize -ERESTARTSYS which will in turn cause the
144 syscall to be restarted.
145
146 The test case gdb.base/interrupt.exp tests for this problem.
147 Without this sign extension code in place, it'll show
148 a number of failures when testing against unix/-m32. */
149
150 if (regnum == -1 || regnum == I386_EAX_REGNUM)
151 {
152 void *ptr = ((gdb_byte *) gregs
153 + amd64_linux_gregset32_reg_offset[I386_EAX_REGNUM]);
154
155 *(int64_t *) ptr = *(int32_t *) ptr;
156 }
157 }
158}
159
60fac5b8 160/* Fill GDB's register cache with the general-purpose register values
53e95fcf
JS
161 in *GREGSETP. */
162
163void
7f7fe91e 164supply_gregset (struct regcache *regcache, const elf_gregset_t *gregsetp)
53e95fcf 165{
7f7fe91e 166 amd64_supply_native_gregset (regcache, gregsetp, -1);
53e95fcf
JS
167}
168
60fac5b8
MK
169/* Fill register REGNUM (if it is a general-purpose register) in
170 *GREGSETP with the value in GDB's register cache. If REGNUM is -1,
53e95fcf
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171 do this for all registers. */
172
173void
7f7fe91e
UW
174fill_gregset (const struct regcache *regcache,
175 elf_gregset_t *gregsetp, int regnum)
53e95fcf 176{
3f52fdbc 177 amd64_linux_collect_native_gregset (regcache, gregsetp, regnum);
53e95fcf
JS
178}
179
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180/* Transfering floating-point registers between GDB, inferiors and cores. */
181
60fac5b8 182/* Fill GDB's register cache with the floating-point and SSE register
c4f35dd8 183 values in *FPREGSETP. */
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184
185void
7f7fe91e 186supply_fpregset (struct regcache *regcache, const elf_fpregset_t *fpregsetp)
53e95fcf 187{
7f7fe91e 188 amd64_supply_fxsave (regcache, -1, fpregsetp);
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189}
190
8dda9770 191/* Fill register REGNUM (if it is a floating-point or SSE register) in
60fac5b8 192 *FPREGSETP with the value in GDB's register cache. If REGNUM is
c4f35dd8 193 -1, do this for all registers. */
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194
195void
7f7fe91e
UW
196fill_fpregset (const struct regcache *regcache,
197 elf_fpregset_t *fpregsetp, int regnum)
53e95fcf 198{
7f7fe91e 199 amd64_collect_fxsave (regcache, regnum, fpregsetp);
53e95fcf 200}
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201\f
202
203/* Transferring arbitrary registers between GDB and inferior. */
204
60fac5b8 205/* Fetch register REGNUM from the child process. If REGNUM is -1, do
53e95fcf
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206 this for all registers (including the floating point and SSE
207 registers). */
208
f6ac5f3d
PA
209void
210amd64_linux_nat_target::fetch_registers (struct regcache *regcache, int regnum)
53e95fcf 211{
ac7936df 212 struct gdbarch *gdbarch = regcache->arch ();
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JS
213 int tid;
214
a4b6fc86 215 /* GNU/Linux LWP ID's are process ID's. */
e38504b3 216 tid = regcache->ptid ().lwp ();
c4f35dd8 217 if (tid == 0)
e99b03dc 218 tid = regcache->ptid ().pid (); /* Not a threaded program. */
53e95fcf 219
f8028488 220 if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum))
53e95fcf 221 {
99679982
MK
222 elf_gregset_t regs;
223
224 if (ptrace (PTRACE_GETREGS, tid, 0, (long) &regs) < 0)
edefbb7c 225 perror_with_name (_("Couldn't get registers"));
99679982 226
56be3814 227 amd64_supply_native_gregset (regcache, &regs, -1);
60fac5b8
MK
228 if (regnum != -1)
229 return;
53e95fcf
JS
230 }
231
f8028488 232 if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum))
53e95fcf 233 {
99679982 234 elf_fpregset_t fpregs;
53e95fcf 235
0bdb2f78 236 if (have_ptrace_getregset == TRIBOOL_TRUE)
a055a187 237 {
df7e5265 238 char xstateregs[X86_XSTATE_MAX_SIZE];
a055a187
L
239 struct iovec iov;
240
241 iov.iov_base = xstateregs;
242 iov.iov_len = sizeof (xstateregs);
243 if (ptrace (PTRACE_GETREGSET, tid,
244 (unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
245 perror_with_name (_("Couldn't get extended state status"));
99679982 246
a055a187
L
247 amd64_supply_xsave (regcache, -1, xstateregs);
248 }
249 else
250 {
251 if (ptrace (PTRACE_GETFPREGS, tid, 0, (long) &fpregs) < 0)
252 perror_with_name (_("Couldn't get floating point status"));
253
254 amd64_supply_fxsave (regcache, -1, &fpregs);
255 }
2735833d
WT
256#ifndef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
257 {
258 /* PTRACE_ARCH_PRCTL is obsolete since 2.6.25, where the
259 fs_base and gs_base fields of user_regs_struct can be
260 used directly. */
261 unsigned long base;
262
263 if (regnum == -1 || regnum == AMD64_FSBASE_REGNUM)
264 {
265 if (ptrace (PTRACE_ARCH_PRCTL, tid, &base, ARCH_GET_FS) < 0)
266 perror_with_name (_("Couldn't get segment register fs_base"));
267
73e1c03f 268 regcache->raw_supply (AMD64_FSBASE_REGNUM, &base);
2735833d
WT
269 }
270
271 if (regnum == -1 || regnum == AMD64_GSBASE_REGNUM)
272 {
273 if (ptrace (PTRACE_ARCH_PRCTL, tid, &base, ARCH_GET_GS) < 0)
274 perror_with_name (_("Couldn't get segment register gs_base"));
275
73e1c03f 276 regcache->raw_supply (AMD64_GSBASE_REGNUM, &base);
2735833d
WT
277 }
278 }
279#endif
99679982 280 }
53e95fcf
JS
281}
282
60fac5b8
MK
283/* Store register REGNUM back into the child process. If REGNUM is
284 -1, do this for all registers (including the floating-point and SSE
53e95fcf 285 registers). */
c4f35dd8 286
f6ac5f3d
PA
287void
288amd64_linux_nat_target::store_registers (struct regcache *regcache, int regnum)
53e95fcf 289{
ac7936df 290 struct gdbarch *gdbarch = regcache->arch ();
53e95fcf
JS
291 int tid;
292
a4b6fc86 293 /* GNU/Linux LWP ID's are process ID's. */
e38504b3 294 tid = regcache->ptid ().lwp ();
c4f35dd8 295 if (tid == 0)
e99b03dc 296 tid = regcache->ptid ().pid (); /* Not a threaded program. */
53e95fcf 297
f8028488 298 if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum))
53e95fcf 299 {
99679982
MK
300 elf_gregset_t regs;
301
302 if (ptrace (PTRACE_GETREGS, tid, 0, (long) &regs) < 0)
edefbb7c 303 perror_with_name (_("Couldn't get registers"));
99679982 304
3f52fdbc 305 amd64_linux_collect_native_gregset (regcache, &regs, regnum);
99679982
MK
306
307 if (ptrace (PTRACE_SETREGS, tid, 0, (long) &regs) < 0)
edefbb7c 308 perror_with_name (_("Couldn't write registers"));
99679982 309
60fac5b8
MK
310 if (regnum != -1)
311 return;
53e95fcf
JS
312 }
313
f8028488 314 if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum))
53e95fcf 315 {
99679982
MK
316 elf_fpregset_t fpregs;
317
0bdb2f78 318 if (have_ptrace_getregset == TRIBOOL_TRUE)
a055a187 319 {
df7e5265 320 char xstateregs[X86_XSTATE_MAX_SIZE];
a055a187
L
321 struct iovec iov;
322
323 iov.iov_base = xstateregs;
324 iov.iov_len = sizeof (xstateregs);
325 if (ptrace (PTRACE_GETREGSET, tid,
326 (unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
327 perror_with_name (_("Couldn't get extended state status"));
99679982 328
a055a187
L
329 amd64_collect_xsave (regcache, regnum, xstateregs, 0);
330
331 if (ptrace (PTRACE_SETREGSET, tid,
332 (unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
333 perror_with_name (_("Couldn't write extended state status"));
334 }
335 else
336 {
337 if (ptrace (PTRACE_GETFPREGS, tid, 0, (long) &fpregs) < 0)
338 perror_with_name (_("Couldn't get floating point status"));
99679982 339
a055a187 340 amd64_collect_fxsave (regcache, regnum, &fpregs);
99679982 341
a055a187
L
342 if (ptrace (PTRACE_SETFPREGS, tid, 0, (long) &fpregs) < 0)
343 perror_with_name (_("Couldn't write floating point status"));
344 }
2735833d
WT
345
346#ifndef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
347 {
348 /* PTRACE_ARCH_PRCTL is obsolete since 2.6.25, where the
349 fs_base and gs_base fields of user_regs_struct can be
350 used directly. */
351 void *base;
352
353 if (regnum == -1 || regnum == AMD64_FSBASE_REGNUM)
354 {
34a79281 355 regcache->raw_collect (AMD64_FSBASE_REGNUM, &base);
2735833d
WT
356
357 if (ptrace (PTRACE_ARCH_PRCTL, tid, base, ARCH_SET_FS) < 0)
358 perror_with_name (_("Couldn't write segment register fs_base"));
359 }
360 if (regnum == -1 || regnum == AMD64_GSBASE_REGNUM)
361 {
362
34a79281 363 regcache->raw_collect (AMD64_GSBASE_REGNUM, &base);
2735833d
WT
364 if (ptrace (PTRACE_ARCH_PRCTL, tid, base, ARCH_SET_GS) < 0)
365 perror_with_name (_("Couldn't write segment register gs_base"));
366 }
367 }
368#endif
53e95fcf 369 }
53e95fcf
JS
370}
371\f
1aa7e42c 372
50d71875
AC
373/* This function is called by libthread_db as part of its handling of
374 a request for a thread's local storage address. */
375
5bca7895 376ps_err_e
754653a7 377ps_get_thread_area (struct ps_prochandle *ph,
c43af07c
EZ
378 lwpid_t lwpid, int idx, void **base)
379{
f5656ead 380 if (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 32)
50d71875 381 {
8c420b8d
GB
382 unsigned int base_addr;
383 ps_err_e result;
384
385 result = x86_linux_get_thread_area (lwpid, (void *) (long) idx,
386 &base_addr);
387 if (result == PS_OK)
388 {
389 /* Extend the value to 64 bits. Here it's assumed that
390 a "long" and a "void *" are the same. */
391 (*base) = (void *) (long) base_addr;
392 }
393 return result;
50d71875
AC
394 }
395 else
396 {
2735833d 397
50d71875
AC
398 /* FIXME: ezannoni-2003-07-09 see comment above about include
399 file order. We could be getting bogus values for these two. */
400 gdb_assert (FS < ELF_NGREG);
401 gdb_assert (GS < ELF_NGREG);
402 switch (idx)
403 {
404 case FS:
6fea9e18
L
405#ifdef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
406 {
407 /* PTRACE_ARCH_PRCTL is obsolete since 2.6.25, where the
408 fs_base and gs_base fields of user_regs_struct can be
409 used directly. */
410 unsigned long fs;
411 errno = 0;
412 fs = ptrace (PTRACE_PEEKUSER, lwpid,
413 offsetof (struct user_regs_struct, fs_base), 0);
414 if (errno == 0)
415 {
416 *base = (void *) fs;
417 return PS_OK;
418 }
419 }
420#endif
50d71875
AC
421 if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_FS) == 0)
422 return PS_OK;
423 break;
424 case GS:
6fea9e18
L
425#ifdef HAVE_STRUCT_USER_REGS_STRUCT_GS_BASE
426 {
427 unsigned long gs;
428 errno = 0;
429 gs = ptrace (PTRACE_PEEKUSER, lwpid,
430 offsetof (struct user_regs_struct, gs_base), 0);
431 if (errno == 0)
432 {
433 *base = (void *) gs;
434 return PS_OK;
435 }
436 }
437#endif
50d71875
AC
438 if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_GS) == 0)
439 return PS_OK;
440 break;
441 default: /* Should not happen. */
442 return PS_BADADDR;
443 }
c43af07c 444 }
b6d42148 445 return PS_ERR; /* ptrace failed. */
c43af07c 446}
5bca7895 447\f
c43af07c 448
9cf12d57 449/* Convert a ptrace/host siginfo object, into/from the siginfo in the
5b009018
PA
450 layout of the inferiors' architecture. Returns true if any
451 conversion was done; false otherwise. If DIRECTION is 1, then copy
9cf12d57 452 from INF to PTRACE. If DIRECTION is 0, copy from PTRACE to
5b009018
PA
453 INF. */
454
135340af
PA
455bool
456amd64_linux_nat_target::low_siginfo_fixup (siginfo_t *ptrace,
457 gdb_byte *inf,
458 int direction)
5b009018 459{
ba224c70
L
460 struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
461
5b009018
PA
462 /* Is the inferior 32-bit? If so, then do fixup the siginfo
463 object. */
ba224c70 464 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
135340af
PA
465 return amd64_linux_siginfo_fixup_common (ptrace, inf, direction,
466 FIXUP_32);
ba224c70
L
467 /* No fixup for native x32 GDB. */
468 else if (gdbarch_addr_bit (gdbarch) == 32 && sizeof (void *) == 8)
135340af
PA
469 return amd64_linux_siginfo_fixup_common (ptrace, inf, direction,
470 FIXUP_X32);
5b009018 471 else
135340af 472 return false;
5b009018 473}
c1e246a0 474
c1e246a0
GB
475void
476_initialize_amd64_linux_nat (void)
477{
c1e246a0
GB
478 amd64_native_gregset32_reg_offset = amd64_linux_gregset32_reg_offset;
479 amd64_native_gregset32_num_regs = I386_LINUX_NUM_REGS;
480 amd64_native_gregset64_reg_offset = amd64_linux_gregset_reg_offset;
481 amd64_native_gregset64_num_regs = AMD64_LINUX_NUM_REGS;
482
483 gdb_assert (ARRAY_SIZE (amd64_linux_gregset32_reg_offset)
484 == amd64_native_gregset32_num_regs);
485
f6ac5f3d 486 linux_target = &the_amd64_linux_nat_target;
c1e246a0
GB
487
488 /* Add the target. */
d9f719f1 489 add_inf_child_target (linux_target);
c1e246a0 490}