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a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
42a4f53d 3 Copyright (C) 1986-2019 Free Software Foundation, Inc.
c906108c
SS
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
c5aa993b 8 This file is part of GDB.
c906108c 9
c5aa993b
JM
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
c5aa993b 13 (at your option) any later version.
c906108c 14
c5aa993b
JM
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
c906108c 19
c5aa993b 20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
22
23#include "defs.h"
c906108c
SS
24#include "bfd.h"
25#include "inferior.h"
4e052eda 26#include "regcache.h"
e5d66720 27#include "completer.h"
59623e27 28#include "osabi.h"
343af405 29#include "arch-utils.h"
1777feb0 30/* For argument passing to the inferior. */
c906108c 31#include "symtab.h"
fde2cceb 32#include "dis-asm.h"
26d08f08
AC
33#include "trad-frame.h"
34#include "frame-unwind.h"
35#include "frame-base.h"
c906108c 36
c906108c
SS
37#include "gdbcore.h"
38#include "gdbcmd.h"
e6bb342a 39#include "gdbtypes.h"
c906108c 40#include "objfiles.h"
3ff7cf9e 41#include "hppa-tdep.h"
325fac50 42#include <algorithm>
c906108c 43
369aa520
RC
44static int hppa_debug = 0;
45
60383d10 46/* Some local constants. */
3ff7cf9e
JB
47static const int hppa32_num_regs = 128;
48static const int hppa64_num_regs = 96;
49
61a12cfa
JK
50/* We use the objfile->obj_private pointer for two things:
51 * 1. An unwind table;
52 *
53 * 2. A pointer to any associated shared library object.
54 *
55 * #defines are used to help refer to these objects.
56 */
57
58/* Info about the unwind table associated with an object file.
59 * This is hung off of the "objfile->obj_private" pointer, and
60 * is allocated in the objfile's psymbol obstack. This allows
61 * us to have unique unwind info for each executable and shared
62 * library that we are debugging.
63 */
64struct hppa_unwind_info
65 {
66 struct unwind_table_entry *table; /* Pointer to unwind info */
67 struct unwind_table_entry *cache; /* Pointer to last entry we found */
68 int last; /* Index of last entry */
69 };
70
71struct hppa_objfile_private
72 {
73 struct hppa_unwind_info *unwind_info; /* a pointer */
74 struct so_list *so_info; /* a pointer */
75 CORE_ADDR dp;
76
77 int dummy_call_sequence_reg;
78 CORE_ADDR dummy_call_sequence_addr;
79 };
80
7c46b9fb
RC
81/* hppa-specific object data -- unwind and solib info.
82 TODO/maybe: think about splitting this into two parts; the unwind data is
83 common to all hppa targets, but is only used in this file; we can register
84 that separately and make this static. The solib data is probably hpux-
85 specific, so we can create a separate extern objfile_data that is registered
86 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
61a12cfa 87static const struct objfile_data *hppa_objfile_priv_data = NULL;
7c46b9fb 88
1777feb0 89/* Get at various relevent fields of an instruction word. */
e2ac8128
JB
90#define MASK_5 0x1f
91#define MASK_11 0x7ff
92#define MASK_14 0x3fff
93#define MASK_21 0x1fffff
94
e2ac8128
JB
95/* Sizes (in bytes) of the native unwind entries. */
96#define UNWIND_ENTRY_SIZE 16
97#define STUB_UNWIND_ENTRY_SIZE 8
98
c906108c 99/* Routines to extract various sized constants out of hppa
1777feb0 100 instructions. */
c906108c
SS
101
102/* This assumes that no garbage lies outside of the lower bits of
1777feb0 103 value. */
c906108c 104
63807e1d 105static int
abc485a1 106hppa_sign_extend (unsigned val, unsigned bits)
c906108c 107{
66c6502d 108 return (int) (val >> (bits - 1) ? (-(1 << bits)) | val : val);
c906108c
SS
109}
110
1777feb0 111/* For many immediate values the sign bit is the low bit! */
c906108c 112
63807e1d 113static int
abc485a1 114hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 115{
66c6502d 116 return (int) ((val & 0x1 ? (-(1 << (bits - 1))) : 0) | val >> 1);
c906108c
SS
117}
118
e2ac8128 119/* Extract the bits at positions between FROM and TO, using HP's numbering
1777feb0 120 (MSB = 0). */
e2ac8128 121
abc485a1
RC
122int
123hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
124{
125 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
126}
127
1777feb0 128/* Extract the immediate field from a ld{bhw}s instruction. */
c906108c 129
abc485a1
RC
130int
131hppa_extract_5_load (unsigned word)
c906108c 132{
abc485a1 133 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
134}
135
1777feb0 136/* Extract the immediate field from a break instruction. */
c906108c 137
abc485a1
RC
138unsigned
139hppa_extract_5r_store (unsigned word)
c906108c
SS
140{
141 return (word & MASK_5);
142}
143
1777feb0 144/* Extract the immediate field from a {sr}sm instruction. */
c906108c 145
abc485a1
RC
146unsigned
147hppa_extract_5R_store (unsigned word)
c906108c
SS
148{
149 return (word >> 16 & MASK_5);
150}
151
1777feb0 152/* Extract a 14 bit immediate field. */
c906108c 153
abc485a1
RC
154int
155hppa_extract_14 (unsigned word)
c906108c 156{
abc485a1 157 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
158}
159
1777feb0 160/* Extract a 21 bit constant. */
c906108c 161
abc485a1
RC
162int
163hppa_extract_21 (unsigned word)
c906108c
SS
164{
165 int val;
166
167 word &= MASK_21;
168 word <<= 11;
abc485a1 169 val = hppa_get_field (word, 20, 20);
c906108c 170 val <<= 11;
abc485a1 171 val |= hppa_get_field (word, 9, 19);
c906108c 172 val <<= 2;
abc485a1 173 val |= hppa_get_field (word, 5, 6);
c906108c 174 val <<= 5;
abc485a1 175 val |= hppa_get_field (word, 0, 4);
c906108c 176 val <<= 2;
abc485a1
RC
177 val |= hppa_get_field (word, 7, 8);
178 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
179}
180
c906108c 181/* extract a 17 bit constant from branch instructions, returning the
1777feb0 182 19 bit signed value. */
c906108c 183
abc485a1
RC
184int
185hppa_extract_17 (unsigned word)
c906108c 186{
abc485a1
RC
187 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
188 hppa_get_field (word, 29, 29) << 10 |
189 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
190 (word & 0x1) << 16, 17) << 2;
191}
3388d7ff
RC
192
193CORE_ADDR
194hppa_symbol_address(const char *sym)
195{
3b7344d5 196 struct bound_minimal_symbol minsym;
3388d7ff
RC
197
198 minsym = lookup_minimal_symbol (sym, NULL, NULL);
3b7344d5 199 if (minsym.minsym)
77e371c0 200 return BMSYMBOL_VALUE_ADDRESS (minsym);
3388d7ff
RC
201 else
202 return (CORE_ADDR)-1;
203}
77d18ded 204
61a12cfa 205static struct hppa_objfile_private *
77d18ded
RC
206hppa_init_objfile_priv_data (struct objfile *objfile)
207{
e39db4db
SM
208 hppa_objfile_private *priv
209 = OBSTACK_ZALLOC (&objfile->objfile_obstack, hppa_objfile_private);
77d18ded 210
77d18ded 211 set_objfile_data (objfile, hppa_objfile_priv_data, priv);
77d18ded
RC
212
213 return priv;
214}
c906108c
SS
215\f
216
217/* Compare the start address for two unwind entries returning 1 if
218 the first address is larger than the second, -1 if the second is
219 larger than the first, and zero if they are equal. */
220
221static int
fba45db2 222compare_unwind_entries (const void *arg1, const void *arg2)
c906108c 223{
9a3c8263
SM
224 const struct unwind_table_entry *a = (const struct unwind_table_entry *) arg1;
225 const struct unwind_table_entry *b = (const struct unwind_table_entry *) arg2;
c906108c
SS
226
227 if (a->region_start > b->region_start)
228 return 1;
229 else if (a->region_start < b->region_start)
230 return -1;
231 else
232 return 0;
233}
234
53a5351d 235static void
fdd72f95 236record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 237{
fdd72f95 238 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 239 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
240 {
241 bfd_vma value = section->vma - section->filepos;
242 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
243
244 if (value < *low_text_segment_address)
245 *low_text_segment_address = value;
246 }
53a5351d
JM
247}
248
c906108c 249static void
fba45db2 250internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
1777feb0 251 asection *section, unsigned int entries,
241fd515 252 size_t size, CORE_ADDR text_offset)
c906108c
SS
253{
254 /* We will read the unwind entries into temporary memory, then
255 fill in the actual unwind table. */
fdd72f95 256
c906108c
SS
257 if (size > 0)
258 {
5db8bbe5 259 struct gdbarch *gdbarch = get_objfile_arch (objfile);
c906108c
SS
260 unsigned long tmp;
261 unsigned i;
224c3ddb 262 char *buf = (char *) alloca (size);
fdd72f95 263 CORE_ADDR low_text_segment_address;
c906108c 264
fdd72f95 265 /* For ELF targets, then unwinds are supposed to
1777feb0 266 be segment relative offsets instead of absolute addresses.
c2c6d25f
JM
267
268 Note that when loading a shared library (text_offset != 0) the
269 unwinds are already relative to the text_offset that will be
270 passed in. */
5db8bbe5 271 if (gdbarch_tdep (gdbarch)->is_elf && text_offset == 0)
53a5351d 272 {
fdd72f95
RC
273 low_text_segment_address = -1;
274
53a5351d 275 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
276 record_text_segment_lowaddr,
277 &low_text_segment_address);
53a5351d 278
fdd72f95 279 text_offset = low_text_segment_address;
53a5351d 280 }
5db8bbe5 281 else if (gdbarch_tdep (gdbarch)->solib_get_text_base)
acf86d54 282 {
5db8bbe5 283 text_offset = gdbarch_tdep (gdbarch)->solib_get_text_base (objfile);
acf86d54 284 }
53a5351d 285
c906108c
SS
286 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
287
288 /* Now internalize the information being careful to handle host/target
c5aa993b 289 endian issues. */
c906108c
SS
290 for (i = 0; i < entries; i++)
291 {
292 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 293 (bfd_byte *) buf);
c906108c
SS
294 table[i].region_start += text_offset;
295 buf += 4;
c5aa993b 296 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
297 table[i].region_end += text_offset;
298 buf += 4;
c5aa993b 299 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
300 buf += 4;
301 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
302 table[i].Millicode = (tmp >> 30) & 0x1;
303 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
304 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 305 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
306 table[i].Entry_SR = (tmp >> 25) & 0x1;
307 table[i].Entry_FR = (tmp >> 21) & 0xf;
308 table[i].Entry_GR = (tmp >> 16) & 0x1f;
309 table[i].Args_stored = (tmp >> 15) & 0x1;
310 table[i].Variable_Frame = (tmp >> 14) & 0x1;
311 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
312 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
313 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
314 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 315 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
316 table[i].cxx_info = (tmp >> 8) & 0x1;
317 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
318 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 319 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
320 table[i].Save_SP = (tmp >> 4) & 0x1;
321 table[i].Save_RP = (tmp >> 3) & 0x1;
322 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 323 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 324 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 325 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
326 buf += 4;
327 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
328 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
329 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
330 table[i].alloca_frame = (tmp >> 28) & 0x1;
331 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
332 table[i].Total_frame_size = tmp & 0x7ffffff;
333
1777feb0 334 /* Stub unwinds are handled elsewhere. */
c906108c
SS
335 table[i].stub_unwind.stub_type = 0;
336 table[i].stub_unwind.padding = 0;
337 }
338 }
339}
340
341/* Read in the backtrace information stored in the `$UNWIND_START$' section of
342 the object file. This info is used mainly by find_unwind_entry() to find
343 out the stack frame size and frame pointer used by procedures. We put
344 everything on the psymbol obstack in the objfile so that it automatically
345 gets freed when the objfile is destroyed. */
346
347static void
fba45db2 348read_unwind_info (struct objfile *objfile)
c906108c 349{
d4f3574e 350 asection *unwind_sec, *stub_unwind_sec;
241fd515 351 size_t unwind_size, stub_unwind_size, total_size;
d4f3574e 352 unsigned index, unwind_entries;
c906108c
SS
353 unsigned stub_entries, total_entries;
354 CORE_ADDR text_offset;
7c46b9fb
RC
355 struct hppa_unwind_info *ui;
356 struct hppa_objfile_private *obj_private;
c906108c 357
a99dad3d 358 text_offset = ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT (objfile));
7c46b9fb
RC
359 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
360 sizeof (struct hppa_unwind_info));
c906108c
SS
361
362 ui->table = NULL;
363 ui->cache = NULL;
364 ui->last = -1;
365
d4f3574e
SS
366 /* For reasons unknown the HP PA64 tools generate multiple unwinder
367 sections in a single executable. So we just iterate over every
368 section in the BFD looking for unwinder sections intead of trying
1777feb0 369 to do a lookup with bfd_get_section_by_name.
c906108c 370
d4f3574e
SS
371 First determine the total size of the unwind tables so that we
372 can allocate memory in a nice big hunk. */
373 total_entries = 0;
374 for (unwind_sec = objfile->obfd->sections;
375 unwind_sec;
376 unwind_sec = unwind_sec->next)
c906108c 377 {
d4f3574e
SS
378 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
379 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
380 {
381 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
382 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 383
d4f3574e
SS
384 total_entries += unwind_entries;
385 }
c906108c
SS
386 }
387
d4f3574e 388 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 389 use stub unwinds at the current time. */
d4f3574e
SS
390 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
391
c906108c
SS
392 if (stub_unwind_sec)
393 {
394 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
395 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
396 }
397 else
398 {
399 stub_unwind_size = 0;
400 stub_entries = 0;
401 }
402
403 /* Compute total number of unwind entries and their total size. */
d4f3574e 404 total_entries += stub_entries;
c906108c
SS
405 total_size = total_entries * sizeof (struct unwind_table_entry);
406
407 /* Allocate memory for the unwind table. */
408 ui->table = (struct unwind_table_entry *)
8b92e4d5 409 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 410 ui->last = total_entries - 1;
c906108c 411
d4f3574e
SS
412 /* Now read in each unwind section and internalize the standard unwind
413 entries. */
c906108c 414 index = 0;
d4f3574e
SS
415 for (unwind_sec = objfile->obfd->sections;
416 unwind_sec;
417 unwind_sec = unwind_sec->next)
418 {
419 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
420 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
421 {
422 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
423 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
424
425 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
426 unwind_entries, unwind_size, text_offset);
427 index += unwind_entries;
428 }
429 }
430
431 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
432 if (stub_unwind_size > 0)
433 {
434 unsigned int i;
224c3ddb 435 char *buf = (char *) alloca (stub_unwind_size);
c906108c
SS
436
437 /* Read in the stub unwind entries. */
438 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
439 0, stub_unwind_size);
440
441 /* Now convert them into regular unwind entries. */
442 for (i = 0; i < stub_entries; i++, index++)
443 {
444 /* Clear out the next unwind entry. */
445 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
446
1777feb0 447 /* Convert offset & size into region_start and region_end.
c906108c
SS
448 Stuff away the stub type into "reserved" fields. */
449 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
450 (bfd_byte *) buf);
451 ui->table[index].region_start += text_offset;
452 buf += 4;
453 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 454 (bfd_byte *) buf);
c906108c
SS
455 buf += 2;
456 ui->table[index].region_end
c5aa993b
JM
457 = ui->table[index].region_start + 4 *
458 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
459 buf += 2;
460 }
461
462 }
463
464 /* Unwind table needs to be kept sorted. */
465 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
466 compare_unwind_entries);
467
468 /* Keep a pointer to the unwind information. */
7c46b9fb
RC
469 obj_private = (struct hppa_objfile_private *)
470 objfile_data (objfile, hppa_objfile_priv_data);
471 if (obj_private == NULL)
77d18ded
RC
472 obj_private = hppa_init_objfile_priv_data (objfile);
473
c906108c
SS
474 obj_private->unwind_info = ui;
475}
476
477/* Lookup the unwind (stack backtrace) info for the given PC. We search all
478 of the objfiles seeking the unwind table entry for this PC. Each objfile
479 contains a sorted list of struct unwind_table_entry. Since we do a binary
480 search of the unwind tables, we depend upon them to be sorted. */
481
482struct unwind_table_entry *
fba45db2 483find_unwind_entry (CORE_ADDR pc)
c906108c
SS
484{
485 int first, middle, last;
7c46b9fb 486 struct hppa_objfile_private *priv;
c906108c 487
369aa520 488 if (hppa_debug)
5af949e3
UW
489 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry %s -> ",
490 hex_string (pc));
369aa520 491
1777feb0 492 /* A function at address 0? Not in HP-UX! */
c906108c 493 if (pc == (CORE_ADDR) 0)
369aa520
RC
494 {
495 if (hppa_debug)
496 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
497 return NULL;
498 }
c906108c 499
2030c079 500 for (objfile *objfile : current_program_space->objfiles ())
aed57c53
TT
501 {
502 struct hppa_unwind_info *ui;
503 ui = NULL;
504 priv = ((struct hppa_objfile_private *)
505 objfile_data (objfile, hppa_objfile_priv_data));
506 if (priv)
507 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
508
509 if (!ui)
510 {
511 read_unwind_info (objfile);
512 priv = ((struct hppa_objfile_private *)
513 objfile_data (objfile, hppa_objfile_priv_data));
514 if (priv == NULL)
515 error (_("Internal error reading unwind information."));
516 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
517 }
518
519 /* First, check the cache. */
520
521 if (ui->cache
522 && pc >= ui->cache->region_start
523 && pc <= ui->cache->region_end)
524 {
525 if (hppa_debug)
526 fprintf_unfiltered (gdb_stdlog, "%s (cached) }\n",
527 hex_string ((uintptr_t) ui->cache));
528 return ui->cache;
529 }
530
531 /* Not in the cache, do a binary search. */
532
533 first = 0;
534 last = ui->last;
535
536 while (first <= last)
537 {
538 middle = (first + last) / 2;
539 if (pc >= ui->table[middle].region_start
540 && pc <= ui->table[middle].region_end)
541 {
542 ui->cache = &ui->table[middle];
543 if (hppa_debug)
544 fprintf_unfiltered (gdb_stdlog, "%s }\n",
545 hex_string ((uintptr_t) ui->cache));
546 return &ui->table[middle];
547 }
548
549 if (pc < ui->table[middle].region_start)
550 last = middle - 1;
551 else
552 first = middle + 1;
553 }
554 }
369aa520
RC
555
556 if (hppa_debug)
557 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
558
c906108c
SS
559 return NULL;
560}
561
c9cf6e20
MG
562/* Implement the stack_frame_destroyed_p gdbarch method.
563
564 The epilogue is defined here as the area either on the `bv' instruction
1777feb0 565 itself or an instruction which destroys the function's stack frame.
1fb24930
RC
566
567 We do not assume that the epilogue is at the end of a function as we can
568 also have return sequences in the middle of a function. */
c9cf6e20 569
1fb24930 570static int
c9cf6e20 571hppa_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1fb24930 572{
e17a4113 573 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1fb24930
RC
574 unsigned long status;
575 unsigned int inst;
e362b510 576 gdb_byte buf[4];
1fb24930 577
8defab1a 578 status = target_read_memory (pc, buf, 4);
1fb24930
RC
579 if (status != 0)
580 return 0;
581
e17a4113 582 inst = extract_unsigned_integer (buf, 4, byte_order);
1fb24930
RC
583
584 /* The most common way to perform a stack adjustment ldo X(sp),sp
585 We are destroying a stack frame if the offset is negative. */
586 if ((inst & 0xffffc000) == 0x37de0000
587 && hppa_extract_14 (inst) < 0)
588 return 1;
589
590 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
591 if (((inst & 0x0fc010e0) == 0x0fc010e0
592 || (inst & 0x0fc010e0) == 0x0fc010e0)
593 && hppa_extract_14 (inst) < 0)
594 return 1;
595
596 /* bv %r0(%rp) or bv,n %r0(%rp) */
597 if (inst == 0xe840c000 || inst == 0xe840c002)
598 return 1;
599
600 return 0;
601}
602
04180708 603constexpr gdb_byte hppa_break_insn[] = {0x00, 0x01, 0x00, 0x04};
598cc9dc 604
04180708 605typedef BP_MANIPULATION (hppa_break_insn) hppa_breakpoint;
aaab4dba 606
e23457df
AC
607/* Return the name of a register. */
608
4a302917 609static const char *
d93859e2 610hppa32_register_name (struct gdbarch *gdbarch, int i)
e23457df 611{
a121b7c1 612 static const char *names[] = {
e23457df
AC
613 "flags", "r1", "rp", "r3",
614 "r4", "r5", "r6", "r7",
615 "r8", "r9", "r10", "r11",
616 "r12", "r13", "r14", "r15",
617 "r16", "r17", "r18", "r19",
618 "r20", "r21", "r22", "r23",
619 "r24", "r25", "r26", "dp",
620 "ret0", "ret1", "sp", "r31",
621 "sar", "pcoqh", "pcsqh", "pcoqt",
622 "pcsqt", "eiem", "iir", "isr",
623 "ior", "ipsw", "goto", "sr4",
624 "sr0", "sr1", "sr2", "sr3",
625 "sr5", "sr6", "sr7", "cr0",
626 "cr8", "cr9", "ccr", "cr12",
627 "cr13", "cr24", "cr25", "cr26",
628 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
629 "fpsr", "fpe1", "fpe2", "fpe3",
630 "fpe4", "fpe5", "fpe6", "fpe7",
631 "fr4", "fr4R", "fr5", "fr5R",
632 "fr6", "fr6R", "fr7", "fr7R",
633 "fr8", "fr8R", "fr9", "fr9R",
634 "fr10", "fr10R", "fr11", "fr11R",
635 "fr12", "fr12R", "fr13", "fr13R",
636 "fr14", "fr14R", "fr15", "fr15R",
637 "fr16", "fr16R", "fr17", "fr17R",
638 "fr18", "fr18R", "fr19", "fr19R",
639 "fr20", "fr20R", "fr21", "fr21R",
640 "fr22", "fr22R", "fr23", "fr23R",
641 "fr24", "fr24R", "fr25", "fr25R",
642 "fr26", "fr26R", "fr27", "fr27R",
643 "fr28", "fr28R", "fr29", "fr29R",
644 "fr30", "fr30R", "fr31", "fr31R"
645 };
646 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
647 return NULL;
648 else
649 return names[i];
650}
651
4a302917 652static const char *
d93859e2 653hppa64_register_name (struct gdbarch *gdbarch, int i)
e23457df 654{
a121b7c1 655 static const char *names[] = {
e23457df
AC
656 "flags", "r1", "rp", "r3",
657 "r4", "r5", "r6", "r7",
658 "r8", "r9", "r10", "r11",
659 "r12", "r13", "r14", "r15",
660 "r16", "r17", "r18", "r19",
661 "r20", "r21", "r22", "r23",
662 "r24", "r25", "r26", "dp",
663 "ret0", "ret1", "sp", "r31",
664 "sar", "pcoqh", "pcsqh", "pcoqt",
665 "pcsqt", "eiem", "iir", "isr",
666 "ior", "ipsw", "goto", "sr4",
667 "sr0", "sr1", "sr2", "sr3",
668 "sr5", "sr6", "sr7", "cr0",
669 "cr8", "cr9", "ccr", "cr12",
670 "cr13", "cr24", "cr25", "cr26",
671 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
672 "fpsr", "fpe1", "fpe2", "fpe3",
673 "fr4", "fr5", "fr6", "fr7",
674 "fr8", "fr9", "fr10", "fr11",
675 "fr12", "fr13", "fr14", "fr15",
676 "fr16", "fr17", "fr18", "fr19",
677 "fr20", "fr21", "fr22", "fr23",
678 "fr24", "fr25", "fr26", "fr27",
679 "fr28", "fr29", "fr30", "fr31"
680 };
681 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
682 return NULL;
683 else
684 return names[i];
685}
686
85c83e99 687/* Map dwarf DBX register numbers to GDB register numbers. */
1ef7fcb5 688static int
d3f73121 689hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1ef7fcb5 690{
85c83e99 691 /* The general registers and the sar are the same in both sets. */
0fde2c53 692 if (reg >= 0 && reg <= 32)
1ef7fcb5
RC
693 return reg;
694
695 /* fr4-fr31 are mapped from 72 in steps of 2. */
85c83e99 696 if (reg >= 72 && reg < 72 + 28 * 2 && !(reg & 1))
1ef7fcb5
RC
697 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
698
1ef7fcb5
RC
699 return -1;
700}
701
79508e1e
AC
702/* This function pushes a stack frame with arguments as part of the
703 inferior function calling mechanism.
704
705 This is the version of the function for the 32-bit PA machines, in
706 which later arguments appear at lower addresses. (The stack always
707 grows towards higher addresses.)
708
709 We simply allocate the appropriate amount of stack space and put
710 arguments into their proper slots. */
711
4a302917 712static CORE_ADDR
7d9b040b 713hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
714 struct regcache *regcache, CORE_ADDR bp_addr,
715 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
716 function_call_return_method return_method,
717 CORE_ADDR struct_addr)
79508e1e 718{
e17a4113
UW
719 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
720
79508e1e
AC
721 /* Stack base address at which any pass-by-reference parameters are
722 stored. */
723 CORE_ADDR struct_end = 0;
724 /* Stack base address at which the first parameter is stored. */
725 CORE_ADDR param_end = 0;
726
79508e1e
AC
727 /* Two passes. First pass computes the location of everything,
728 second pass writes the bytes out. */
729 int write_pass;
d49771ef
RC
730
731 /* Global pointer (r19) of the function we are trying to call. */
732 CORE_ADDR gp;
733
734 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
735
79508e1e
AC
736 for (write_pass = 0; write_pass < 2; write_pass++)
737 {
1797a8f6 738 CORE_ADDR struct_ptr = 0;
1777feb0 739 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
2a6228ef
RC
740 struct_ptr is adjusted for each argument below, so the first
741 argument will end up at sp-36. */
742 CORE_ADDR param_ptr = 32;
79508e1e 743 int i;
2a6228ef
RC
744 int small_struct = 0;
745
79508e1e
AC
746 for (i = 0; i < nargs; i++)
747 {
748 struct value *arg = args[i];
4991999e 749 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
750 /* The corresponding parameter that is pushed onto the
751 stack, and [possibly] passed in a register. */
948f8e3d 752 gdb_byte param_val[8];
79508e1e
AC
753 int param_len;
754 memset (param_val, 0, sizeof param_val);
755 if (TYPE_LENGTH (type) > 8)
756 {
757 /* Large parameter, pass by reference. Store the value
758 in "struct" area and then pass its address. */
759 param_len = 4;
1797a8f6 760 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 761 if (write_pass)
0fd88904 762 write_memory (struct_end - struct_ptr, value_contents (arg),
79508e1e 763 TYPE_LENGTH (type));
e17a4113
UW
764 store_unsigned_integer (param_val, 4, byte_order,
765 struct_end - struct_ptr);
79508e1e
AC
766 }
767 else if (TYPE_CODE (type) == TYPE_CODE_INT
768 || TYPE_CODE (type) == TYPE_CODE_ENUM)
769 {
770 /* Integer value store, right aligned. "unpack_long"
771 takes care of any sign-extension problems. */
772 param_len = align_up (TYPE_LENGTH (type), 4);
e17a4113 773 store_unsigned_integer (param_val, param_len, byte_order,
79508e1e 774 unpack_long (type,
0fd88904 775 value_contents (arg)));
79508e1e 776 }
2a6228ef
RC
777 else if (TYPE_CODE (type) == TYPE_CODE_FLT)
778 {
779 /* Floating point value store, right aligned. */
780 param_len = align_up (TYPE_LENGTH (type), 4);
0fd88904 781 memcpy (param_val, value_contents (arg), param_len);
2a6228ef 782 }
79508e1e
AC
783 else
784 {
79508e1e 785 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
786
787 /* Small struct value are stored right-aligned. */
79508e1e 788 memcpy (param_val + param_len - TYPE_LENGTH (type),
0fd88904 789 value_contents (arg), TYPE_LENGTH (type));
2a6228ef
RC
790
791 /* Structures of size 5, 6 and 7 bytes are special in that
792 the higher-ordered word is stored in the lower-ordered
793 argument, and even though it is a 8-byte quantity the
794 registers need not be 8-byte aligned. */
1b07b470 795 if (param_len > 4 && param_len < 8)
2a6228ef 796 small_struct = 1;
79508e1e 797 }
2a6228ef 798
1797a8f6 799 param_ptr += param_len;
2a6228ef
RC
800 if (param_len == 8 && !small_struct)
801 param_ptr = align_up (param_ptr, 8);
802
803 /* First 4 non-FP arguments are passed in gr26-gr23.
804 First 4 32-bit FP arguments are passed in fr4L-fr7L.
805 First 2 64-bit FP arguments are passed in fr5 and fr7.
806
807 The rest go on the stack, starting at sp-36, towards lower
808 addresses. 8-byte arguments must be aligned to a 8-byte
809 stack boundary. */
79508e1e
AC
810 if (write_pass)
811 {
1797a8f6 812 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
813
814 /* There are some cases when we don't know the type
815 expected by the callee (e.g. for variadic functions), so
816 pass the parameters in both general and fp regs. */
817 if (param_ptr <= 48)
79508e1e 818 {
2a6228ef
RC
819 int grreg = 26 - (param_ptr - 36) / 4;
820 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
821 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
822
b66f5587
SM
823 regcache->cooked_write (grreg, param_val);
824 regcache->cooked_write (fpLreg, param_val);
2a6228ef 825
79508e1e 826 if (param_len > 4)
2a6228ef 827 {
b66f5587 828 regcache->cooked_write (grreg + 1, param_val + 4);
2a6228ef 829
b66f5587
SM
830 regcache->cooked_write (fpreg, param_val);
831 regcache->cooked_write (fpreg + 1, param_val + 4);
2a6228ef 832 }
79508e1e
AC
833 }
834 }
835 }
836
837 /* Update the various stack pointers. */
838 if (!write_pass)
839 {
2a6228ef 840 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
841 /* PARAM_PTR already accounts for all the arguments passed
842 by the user. However, the ABI mandates minimum stack
843 space allocations for outgoing arguments. The ABI also
844 mandates minimum stack alignments which we must
845 preserve. */
2a6228ef 846 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
847 }
848 }
849
850 /* If a structure has to be returned, set up register 28 to hold its
1777feb0 851 address. */
cf84fa6b 852 if (return_method == return_method_struct)
9c9acae0 853 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 854
e38c262f 855 gp = tdep->find_global_pointer (gdbarch, function);
d49771ef
RC
856
857 if (gp != 0)
9c9acae0 858 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 859
79508e1e 860 /* Set the return address. */
77d18ded
RC
861 if (!gdbarch_push_dummy_code_p (gdbarch))
862 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 863
c4557624 864 /* Update the Stack Pointer. */
34f75cc1 865 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 866
2a6228ef 867 return param_end;
79508e1e
AC
868}
869
38ca4e0c
MK
870/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
871 Runtime Architecture for PA-RISC 2.0", which is distributed as part
872 as of the HP-UX Software Transition Kit (STK). This implementation
873 is based on version 3.3, dated October 6, 1997. */
2f690297 874
38ca4e0c 875/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 876
38ca4e0c
MK
877static int
878hppa64_integral_or_pointer_p (const struct type *type)
879{
880 switch (TYPE_CODE (type))
881 {
882 case TYPE_CODE_INT:
883 case TYPE_CODE_BOOL:
884 case TYPE_CODE_CHAR:
885 case TYPE_CODE_ENUM:
886 case TYPE_CODE_RANGE:
887 {
888 int len = TYPE_LENGTH (type);
889 return (len == 1 || len == 2 || len == 4 || len == 8);
890 }
891 case TYPE_CODE_PTR:
892 case TYPE_CODE_REF:
aa006118 893 case TYPE_CODE_RVALUE_REF:
38ca4e0c
MK
894 return (TYPE_LENGTH (type) == 8);
895 default:
896 break;
897 }
898
899 return 0;
900}
901
902/* Check whether TYPE is a "Floating Scalar Type". */
903
904static int
905hppa64_floating_p (const struct type *type)
906{
907 switch (TYPE_CODE (type))
908 {
909 case TYPE_CODE_FLT:
910 {
911 int len = TYPE_LENGTH (type);
912 return (len == 4 || len == 8 || len == 16);
913 }
914 default:
915 break;
916 }
917
918 return 0;
919}
2f690297 920
1218e655
RC
921/* If CODE points to a function entry address, try to look up the corresponding
922 function descriptor and return its address instead. If CODE is not a
923 function entry address, then just return it unchanged. */
924static CORE_ADDR
e17a4113 925hppa64_convert_code_addr_to_fptr (struct gdbarch *gdbarch, CORE_ADDR code)
1218e655 926{
e17a4113 927 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1218e655
RC
928 struct obj_section *sec, *opd;
929
930 sec = find_pc_section (code);
931
932 if (!sec)
933 return code;
934
935 /* If CODE is in a data section, assume it's already a fptr. */
936 if (!(sec->the_bfd_section->flags & SEC_CODE))
937 return code;
938
939 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
940 {
941 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
aded6f54 942 break;
1218e655
RC
943 }
944
945 if (opd < sec->objfile->sections_end)
946 {
947 CORE_ADDR addr;
948
aded6f54
PA
949 for (addr = obj_section_addr (opd);
950 addr < obj_section_endaddr (opd);
951 addr += 2 * 8)
952 {
1218e655 953 ULONGEST opdaddr;
948f8e3d 954 gdb_byte tmp[8];
1218e655
RC
955
956 if (target_read_memory (addr, tmp, sizeof (tmp)))
957 break;
e17a4113 958 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp), byte_order);
1218e655 959
aded6f54 960 if (opdaddr == code)
1218e655
RC
961 return addr - 16;
962 }
963 }
964
965 return code;
966}
967
4a302917 968static CORE_ADDR
7d9b040b 969hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
970 struct regcache *regcache, CORE_ADDR bp_addr,
971 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
972 function_call_return_method return_method,
973 CORE_ADDR struct_addr)
2f690297 974{
38ca4e0c 975 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 976 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
38ca4e0c
MK
977 int i, offset = 0;
978 CORE_ADDR gp;
2f690297 979
38ca4e0c
MK
980 /* "The outgoing parameter area [...] must be aligned at a 16-byte
981 boundary." */
982 sp = align_up (sp, 16);
2f690297 983
38ca4e0c
MK
984 for (i = 0; i < nargs; i++)
985 {
986 struct value *arg = args[i];
987 struct type *type = value_type (arg);
988 int len = TYPE_LENGTH (type);
0fd88904 989 const bfd_byte *valbuf;
1218e655 990 bfd_byte fptrbuf[8];
38ca4e0c 991 int regnum;
2f690297 992
38ca4e0c
MK
993 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
994 offset = align_up (offset, 8);
77d18ded 995
38ca4e0c 996 if (hppa64_integral_or_pointer_p (type))
2f690297 997 {
38ca4e0c
MK
998 /* "Integral scalar parameters smaller than 64 bits are
999 padded on the left (i.e., the value is in the
1000 least-significant bits of the 64-bit storage unit, and
1001 the high-order bits are undefined)." Therefore we can
1002 safely sign-extend them. */
1003 if (len < 8)
449e1137 1004 {
df4df182 1005 arg = value_cast (builtin_type (gdbarch)->builtin_int64, arg);
38ca4e0c
MK
1006 len = 8;
1007 }
1008 }
1009 else if (hppa64_floating_p (type))
1010 {
1011 if (len > 8)
1012 {
1013 /* "Quad-precision (128-bit) floating-point scalar
1014 parameters are aligned on a 16-byte boundary." */
1015 offset = align_up (offset, 16);
1016
1017 /* "Double-extended- and quad-precision floating-point
1018 parameters within the first 64 bytes of the parameter
1019 list are always passed in general registers." */
449e1137
AC
1020 }
1021 else
1022 {
38ca4e0c 1023 if (len == 4)
449e1137 1024 {
38ca4e0c
MK
1025 /* "Single-precision (32-bit) floating-point scalar
1026 parameters are padded on the left with 32 bits of
1027 garbage (i.e., the floating-point value is in the
1028 least-significant 32 bits of a 64-bit storage
1029 unit)." */
1030 offset += 4;
449e1137 1031 }
38ca4e0c
MK
1032
1033 /* "Single- and double-precision floating-point
1034 parameters in this area are passed according to the
1035 available formal parameter information in a function
1036 prototype. [...] If no prototype is in scope,
1037 floating-point parameters must be passed both in the
1038 corresponding general registers and in the
1039 corresponding floating-point registers." */
1040 regnum = HPPA64_FP4_REGNUM + offset / 8;
1041
1042 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1043 {
38ca4e0c
MK
1044 /* "Single-precision floating-point parameters, when
1045 passed in floating-point registers, are passed in
1046 the right halves of the floating point registers;
1047 the left halves are unused." */
e4c4a59b
SM
1048 regcache->cooked_write_part (regnum, offset % 8, len,
1049 value_contents (arg));
449e1137
AC
1050 }
1051 }
2f690297 1052 }
38ca4e0c 1053 else
2f690297 1054 {
38ca4e0c
MK
1055 if (len > 8)
1056 {
1057 /* "Aggregates larger than 8 bytes are aligned on a
1058 16-byte boundary, possibly leaving an unused argument
1777feb0 1059 slot, which is filled with garbage. If necessary,
38ca4e0c
MK
1060 they are padded on the right (with garbage), to a
1061 multiple of 8 bytes." */
1062 offset = align_up (offset, 16);
1063 }
1064 }
1065
1218e655
RC
1066 /* If we are passing a function pointer, make sure we pass a function
1067 descriptor instead of the function entry address. */
1068 if (TYPE_CODE (type) == TYPE_CODE_PTR
1069 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1070 {
1071 ULONGEST codeptr, fptr;
1072
1073 codeptr = unpack_long (type, value_contents (arg));
e17a4113
UW
1074 fptr = hppa64_convert_code_addr_to_fptr (gdbarch, codeptr);
1075 store_unsigned_integer (fptrbuf, TYPE_LENGTH (type), byte_order,
1076 fptr);
1218e655
RC
1077 valbuf = fptrbuf;
1078 }
1079 else
1080 {
1081 valbuf = value_contents (arg);
1082 }
1083
38ca4e0c 1084 /* Always store the argument in memory. */
1218e655 1085 write_memory (sp + offset, valbuf, len);
38ca4e0c 1086
38ca4e0c
MK
1087 regnum = HPPA_ARG0_REGNUM - offset / 8;
1088 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1089 {
e4c4a59b
SM
1090 regcache->cooked_write_part (regnum, offset % 8, std::min (len, 8),
1091 valbuf);
325fac50
PA
1092 offset += std::min (len, 8);
1093 valbuf += std::min (len, 8);
1094 len -= std::min (len, 8);
38ca4e0c 1095 regnum--;
2f690297 1096 }
38ca4e0c
MK
1097
1098 offset += len;
2f690297
AC
1099 }
1100
38ca4e0c
MK
1101 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1102 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1103
1104 /* Allocate the outgoing parameter area. Make sure the outgoing
1105 parameter area is multiple of 16 bytes in length. */
325fac50 1106 sp += std::max (align_up (offset, 16), (ULONGEST) 64);
38ca4e0c
MK
1107
1108 /* Allocate 32-bytes of scratch space. The documentation doesn't
1109 mention this, but it seems to be needed. */
1110 sp += 32;
1111
1112 /* Allocate the frame marker area. */
1113 sp += 16;
1114
1115 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1116 its address. */
cf84fa6b 1117 if (return_method == return_method_struct)
38ca4e0c 1118 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1119
38ca4e0c 1120 /* Set up GR27 (%dp) to hold the global pointer (gp). */
e38c262f 1121 gp = tdep->find_global_pointer (gdbarch, function);
77d18ded 1122 if (gp != 0)
38ca4e0c 1123 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1124
38ca4e0c 1125 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1126 if (!gdbarch_push_dummy_code_p (gdbarch))
1127 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1128
38ca4e0c
MK
1129 /* Set up GR30 to hold the stack pointer (sp). */
1130 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1131
38ca4e0c 1132 return sp;
2f690297 1133}
38ca4e0c 1134\f
2f690297 1135
08a27113
MK
1136/* Handle 32/64-bit struct return conventions. */
1137
1138static enum return_value_convention
6a3a010b 1139hppa32_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1140 struct type *type, struct regcache *regcache,
e127f0db 1141 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1142{
1143 if (TYPE_LENGTH (type) <= 2 * 4)
1144 {
1145 /* The value always lives in the right hand end of the register
1146 (or register pair)? */
1147 int b;
1148 int reg = TYPE_CODE (type) == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
1149 int part = TYPE_LENGTH (type) % 4;
1150 /* The left hand register contains only part of the value,
1151 transfer that first so that the rest can be xfered as entire
1152 4-byte registers. */
1153 if (part > 0)
1154 {
1155 if (readbuf != NULL)
73bb0000 1156 regcache->cooked_read_part (reg, 4 - part, part, readbuf);
08a27113 1157 if (writebuf != NULL)
e4c4a59b 1158 regcache->cooked_write_part (reg, 4 - part, part, writebuf);
08a27113
MK
1159 reg++;
1160 }
1161 /* Now transfer the remaining register values. */
1162 for (b = part; b < TYPE_LENGTH (type); b += 4)
1163 {
1164 if (readbuf != NULL)
dca08e1f 1165 regcache->cooked_read (reg, readbuf + b);
08a27113 1166 if (writebuf != NULL)
b66f5587 1167 regcache->cooked_write (reg, writebuf + b);
08a27113
MK
1168 reg++;
1169 }
1170 return RETURN_VALUE_REGISTER_CONVENTION;
1171 }
1172 else
1173 return RETURN_VALUE_STRUCT_CONVENTION;
1174}
1175
1176static enum return_value_convention
6a3a010b 1177hppa64_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1178 struct type *type, struct regcache *regcache,
e127f0db 1179 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1180{
1181 int len = TYPE_LENGTH (type);
1182 int regnum, offset;
1183
bad43aa5 1184 if (len > 16)
08a27113
MK
1185 {
1186 /* All return values larget than 128 bits must be aggregate
1187 return values. */
9738b034
MK
1188 gdb_assert (!hppa64_integral_or_pointer_p (type));
1189 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1190
1191 /* "Aggregate return values larger than 128 bits are returned in
1192 a buffer allocated by the caller. The address of the buffer
1193 must be passed in GR 28." */
1194 return RETURN_VALUE_STRUCT_CONVENTION;
1195 }
1196
1197 if (hppa64_integral_or_pointer_p (type))
1198 {
1199 /* "Integral return values are returned in GR 28. Values
1200 smaller than 64 bits are padded on the left (with garbage)." */
1201 regnum = HPPA_RET0_REGNUM;
1202 offset = 8 - len;
1203 }
1204 else if (hppa64_floating_p (type))
1205 {
1206 if (len > 8)
1207 {
1208 /* "Double-extended- and quad-precision floating-point
1209 values are returned in GRs 28 and 29. The sign,
1210 exponent, and most-significant bits of the mantissa are
1211 returned in GR 28; the least-significant bits of the
1212 mantissa are passed in GR 29. For double-extended
1213 precision values, GR 29 is padded on the right with 48
1214 bits of garbage." */
1215 regnum = HPPA_RET0_REGNUM;
1216 offset = 0;
1217 }
1218 else
1219 {
1220 /* "Single-precision and double-precision floating-point
1221 return values are returned in FR 4R (single precision) or
1222 FR 4 (double-precision)." */
1223 regnum = HPPA64_FP4_REGNUM;
1224 offset = 8 - len;
1225 }
1226 }
1227 else
1228 {
1229 /* "Aggregate return values up to 64 bits in size are returned
1230 in GR 28. Aggregates smaller than 64 bits are left aligned
1231 in the register; the pad bits on the right are undefined."
1232
1233 "Aggregate return values between 65 and 128 bits are returned
1234 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1235 the remaining bits are placed, left aligned, in GR 29. The
1236 pad bits on the right of GR 29 (if any) are undefined." */
1237 regnum = HPPA_RET0_REGNUM;
1238 offset = 0;
1239 }
1240
1241 if (readbuf)
1242 {
08a27113
MK
1243 while (len > 0)
1244 {
73bb0000
SM
1245 regcache->cooked_read_part (regnum, offset, std::min (len, 8),
1246 readbuf);
325fac50
PA
1247 readbuf += std::min (len, 8);
1248 len -= std::min (len, 8);
08a27113
MK
1249 regnum++;
1250 }
1251 }
1252
1253 if (writebuf)
1254 {
08a27113
MK
1255 while (len > 0)
1256 {
e4c4a59b
SM
1257 regcache->cooked_write_part (regnum, offset, std::min (len, 8),
1258 writebuf);
325fac50
PA
1259 writebuf += std::min (len, 8);
1260 len -= std::min (len, 8);
08a27113
MK
1261 regnum++;
1262 }
1263 }
1264
1265 return RETURN_VALUE_REGISTER_CONVENTION;
1266}
1267\f
1268
d49771ef 1269static CORE_ADDR
a7aad9aa 1270hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1271 struct target_ops *targ)
1272{
1273 if (addr & 2)
1274 {
0dfff4cb 1275 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
a7aad9aa 1276 CORE_ADDR plabel = addr & ~3;
0dfff4cb 1277 return read_memory_typed_address (plabel, func_ptr_type);
d49771ef
RC
1278 }
1279
1280 return addr;
1281}
1282
1797a8f6
AC
1283static CORE_ADDR
1284hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1285{
1286 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1287 and not _bit_)! */
1288 return align_up (addr, 64);
1289}
1290
2f690297
AC
1291/* Force all frames to 16-byte alignment. Better safe than sorry. */
1292
1293static CORE_ADDR
1797a8f6 1294hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1295{
1296 /* Just always 16-byte align. */
1297 return align_up (addr, 16);
1298}
1299
cc72850f 1300CORE_ADDR
c113ed0c 1301hppa_read_pc (readable_regcache *regcache)
c906108c 1302{
cc72850f 1303 ULONGEST ipsw;
61a1198a 1304 ULONGEST pc;
c906108c 1305
c113ed0c
YQ
1306 regcache->cooked_read (HPPA_IPSW_REGNUM, &ipsw);
1307 regcache->cooked_read (HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1308
1309 /* If the current instruction is nullified, then we are effectively
1310 still executing the previous instruction. Pretend we are still
cc72850f
MK
1311 there. This is needed when single stepping; if the nullified
1312 instruction is on a different line, we don't want GDB to think
1313 we've stepped onto that line. */
fe46cd3a
RC
1314 if (ipsw & 0x00200000)
1315 pc -= 4;
1316
cc72850f 1317 return pc & ~0x3;
c906108c
SS
1318}
1319
cc72850f 1320void
61a1198a 1321hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1322{
61a1198a
UW
1323 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1324 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1325}
1326
c906108c 1327/* For the given instruction (INST), return any adjustment it makes
1777feb0 1328 to the stack pointer or zero for no adjustment.
c906108c
SS
1329
1330 This only handles instructions commonly found in prologues. */
1331
1332static int
fba45db2 1333prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1334{
1335 /* This must persist across calls. */
1336 static int save_high21;
1337
1338 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1339 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1340 return hppa_extract_14 (inst);
c906108c
SS
1341
1342 /* stwm X,D(sp) */
1343 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1344 return hppa_extract_14 (inst);
c906108c 1345
104c1213
JM
1346 /* std,ma X,D(sp) */
1347 if ((inst & 0xffe00008) == 0x73c00008)
66c6502d 1348 return (inst & 0x1 ? -(1 << 13) : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1349
e22b26cb 1350 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1351 save high bits in save_high21 for later use. */
e22b26cb 1352 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1353 {
abc485a1 1354 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1355 return 0;
1356 }
1357
1358 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1359 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1360
1361 /* fstws as used by the HP compilers. */
1362 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1363 return hppa_extract_5_load (inst);
c906108c
SS
1364
1365 /* No adjustment. */
1366 return 0;
1367}
1368
1369/* Return nonzero if INST is a branch of some kind, else return zero. */
1370
1371static int
fba45db2 1372is_branch (unsigned long inst)
c906108c
SS
1373{
1374 switch (inst >> 26)
1375 {
1376 case 0x20:
1377 case 0x21:
1378 case 0x22:
1379 case 0x23:
7be570e7 1380 case 0x27:
c906108c
SS
1381 case 0x28:
1382 case 0x29:
1383 case 0x2a:
1384 case 0x2b:
7be570e7 1385 case 0x2f:
c906108c
SS
1386 case 0x30:
1387 case 0x31:
1388 case 0x32:
1389 case 0x33:
1390 case 0x38:
1391 case 0x39:
1392 case 0x3a:
7be570e7 1393 case 0x3b:
c906108c
SS
1394 return 1;
1395
1396 default:
1397 return 0;
1398 }
1399}
1400
1401/* Return the register number for a GR which is saved by INST or
b35018fd 1402 zero if INST does not save a GR.
c906108c 1403
b35018fd 1404 Referenced from:
7be570e7 1405
b35018fd
CG
1406 parisc 1.1:
1407 https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf
c906108c 1408
b35018fd
CG
1409 parisc 2.0:
1410 https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf
c906108c 1411
b35018fd
CG
1412 According to Table 6-5 of Chapter 6 (Memory Reference Instructions)
1413 on page 106 in parisc 2.0, all instructions for storing values from
1414 the general registers are:
c5aa993b 1415
b35018fd
CG
1416 Store: stb, sth, stw, std (according to Chapter 7, they
1417 are only in both "inst >> 26" and "inst >> 6".
1418 Store Absolute: stwa, stda (according to Chapter 7, they are only
1419 in "inst >> 6".
1420 Store Bytes: stby, stdby (according to Chapter 7, they are
1421 only in "inst >> 6").
1422
1423 For (inst >> 26), according to Chapter 7:
1424
1425 The effective memory reference address is formed by the addition
1426 of an immediate displacement to a base value.
1427
1428 - stb: 0x18, store a byte from a general register.
1429
1430 - sth: 0x19, store a halfword from a general register.
1431
1432 - stw: 0x1a, store a word from a general register.
1433
1434 - stwm: 0x1b, store a word from a general register and perform base
1435 register modification (2.0 will still treate it as stw).
1436
1437 - std: 0x1c, store a doubleword from a general register (2.0 only).
1438
1439 - stw: 0x1f, store a word from a general register (2.0 only).
1440
1441 For (inst >> 6) when ((inst >> 26) == 0x03), according to Chapter 7:
1442
1443 The effective memory reference address is formed by the addition
1444 of an index value to a base value specified in the instruction.
1445
1446 - stb: 0x08, store a byte from a general register (1.1 calls stbs).
1447
1448 - sth: 0x09, store a halfword from a general register (1.1 calls
1449 sths).
1450
1451 - stw: 0x0a, store a word from a general register (1.1 calls stws).
1452
1453 - std: 0x0b: store a doubleword from a general register (2.0 only)
1454
1455 Implement fast byte moves (stores) to unaligned word or doubleword
1456 destination.
1457
1458 - stby: 0x0c, for unaligned word (1.1 calls stbys).
1459
1460 - stdby: 0x0d for unaligned doubleword (2.0 only).
1461
1462 Store a word or doubleword using an absolute memory address formed
1463 using short or long displacement or indexed
1464
1465 - stwa: 0x0e, store a word from a general register to an absolute
1466 address (1.0 calls stwas).
1467
1468 - stda: 0x0f, store a doubleword from a general register to an
1469 absolute address (2.0 only). */
1470
1471static int
1472inst_saves_gr (unsigned long inst)
1473{
1474 switch ((inst >> 26) & 0x0f)
1475 {
1476 case 0x03:
1477 switch ((inst >> 6) & 0x0f)
1478 {
1479 case 0x08:
1480 case 0x09:
1481 case 0x0a:
1482 case 0x0b:
1483 case 0x0c:
1484 case 0x0d:
1485 case 0x0e:
1486 case 0x0f:
1487 return hppa_extract_5R_store (inst);
1488 default:
1489 return 0;
1490 }
1491 case 0x18:
1492 case 0x19:
1493 case 0x1a:
1494 case 0x1b:
1495 case 0x1c:
1496 /* no 0x1d or 0x1e -- according to parisc 2.0 document */
1497 case 0x1f:
1498 return hppa_extract_5R_store (inst);
1499 default:
1500 return 0;
1501 }
c906108c
SS
1502}
1503
1504/* Return the register number for a FR which is saved by INST or
1505 zero it INST does not save a FR.
1506
1507 Note we only care about full 64bit register stores (that's the only
1508 kind of stores the prologue will use).
1509
1510 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1511
1512static int
fba45db2 1513inst_saves_fr (unsigned long inst)
c906108c 1514{
1777feb0 1515 /* Is this an FSTD? */
c906108c 1516 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1517 return hppa_extract_5r_store (inst);
7be570e7 1518 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1519 return hppa_extract_5R_store (inst);
1777feb0 1520 /* Is this an FSTW? */
c906108c 1521 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1522 return hppa_extract_5r_store (inst);
7be570e7 1523 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1524 return hppa_extract_5R_store (inst);
c906108c
SS
1525 return 0;
1526}
1527
1528/* Advance PC across any function entry prologue instructions
1777feb0 1529 to reach some "real" code.
c906108c
SS
1530
1531 Use information in the unwind table to determine what exactly should
1532 be in the prologue. */
1533
1534
a71f8c30 1535static CORE_ADDR
be8626e0
MD
1536skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc,
1537 int stop_before_branch)
c906108c 1538{
e17a4113 1539 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
e362b510 1540 gdb_byte buf[4];
c906108c
SS
1541 CORE_ADDR orig_pc = pc;
1542 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1543 unsigned long args_stored, status, i, restart_gr, restart_fr;
1544 struct unwind_table_entry *u;
a71f8c30 1545 int final_iteration;
c906108c
SS
1546
1547 restart_gr = 0;
1548 restart_fr = 0;
1549
1550restart:
1551 u = find_unwind_entry (pc);
1552 if (!u)
1553 return pc;
1554
1777feb0 1555 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1556 if ((pc & ~0x3) != u->region_start)
1557 return pc;
1558
1559 /* This is how much of a frame adjustment we need to account for. */
1560 stack_remaining = u->Total_frame_size << 3;
1561
1562 /* Magic register saves we want to know about. */
1563 save_rp = u->Save_RP;
1564 save_sp = u->Save_SP;
1565
1566 /* An indication that args may be stored into the stack. Unfortunately
1567 the HPUX compilers tend to set this in cases where no args were
1568 stored too!. */
1569 args_stored = 1;
1570
1571 /* Turn the Entry_GR field into a bitmask. */
1572 save_gr = 0;
1573 for (i = 3; i < u->Entry_GR + 3; i++)
1574 {
1575 /* Frame pointer gets saved into a special location. */
eded0a31 1576 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1577 continue;
1578
1579 save_gr |= (1 << i);
1580 }
1581 save_gr &= ~restart_gr;
1582
1583 /* Turn the Entry_FR field into a bitmask too. */
1584 save_fr = 0;
1585 for (i = 12; i < u->Entry_FR + 12; i++)
1586 save_fr |= (1 << i);
1587 save_fr &= ~restart_fr;
1588
a71f8c30
RC
1589 final_iteration = 0;
1590
c906108c
SS
1591 /* Loop until we find everything of interest or hit a branch.
1592
1593 For unoptimized GCC code and for any HP CC code this will never ever
1594 examine any user instructions.
1595
1596 For optimzied GCC code we're faced with problems. GCC will schedule
1597 its prologue and make prologue instructions available for delay slot
1598 filling. The end result is user code gets mixed in with the prologue
1599 and a prologue instruction may be in the delay slot of the first branch
1600 or call.
1601
1602 Some unexpected things are expected with debugging optimized code, so
1603 we allow this routine to walk past user instructions in optimized
1604 GCC code. */
1605 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1606 || args_stored)
1607 {
1608 unsigned int reg_num;
1609 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1610 unsigned long old_save_rp, old_save_sp, next_inst;
1611
1612 /* Save copies of all the triggers so we can compare them later
c5aa993b 1613 (only for HPC). */
c906108c
SS
1614 old_save_gr = save_gr;
1615 old_save_fr = save_fr;
1616 old_save_rp = save_rp;
1617 old_save_sp = save_sp;
1618 old_stack_remaining = stack_remaining;
1619
8defab1a 1620 status = target_read_memory (pc, buf, 4);
e17a4113 1621 inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1622
c906108c
SS
1623 /* Yow! */
1624 if (status != 0)
1625 return pc;
1626
1627 /* Note the interesting effects of this instruction. */
1628 stack_remaining -= prologue_inst_adjust_sp (inst);
1629
7be570e7
JM
1630 /* There are limited ways to store the return pointer into the
1631 stack. */
c4c79048 1632 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1633 save_rp = 0;
1634
104c1213 1635 /* These are the only ways we save SP into the stack. At this time
c5aa993b 1636 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1637 if ((inst & 0xffffc000) == 0x6fc10000
1638 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1639 save_sp = 0;
1640
6426a772
JM
1641 /* Are we loading some register with an offset from the argument
1642 pointer? */
1643 if ((inst & 0xffe00000) == 0x37a00000
1644 || (inst & 0xffffffe0) == 0x081d0240)
1645 {
1646 pc += 4;
1647 continue;
1648 }
1649
c906108c
SS
1650 /* Account for general and floating-point register saves. */
1651 reg_num = inst_saves_gr (inst);
1652 save_gr &= ~(1 << reg_num);
1653
1654 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1655 Unfortunately args_stored only tells us that some arguments
1656 where stored into the stack. Not how many or what kind!
c906108c 1657
c5aa993b
JM
1658 This is a kludge as on the HP compiler sets this bit and it
1659 never does prologue scheduling. So once we see one, skip past
1660 all of them. We have similar code for the fp arg stores below.
c906108c 1661
c5aa993b
JM
1662 FIXME. Can still die if we have a mix of GR and FR argument
1663 stores! */
be8626e0 1664 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1665 && reg_num <= 26)
c906108c 1666 {
be8626e0 1667 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1668 && reg_num <= 26)
c906108c
SS
1669 {
1670 pc += 4;
8defab1a 1671 status = target_read_memory (pc, buf, 4);
e17a4113 1672 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1673 if (status != 0)
1674 return pc;
1675 reg_num = inst_saves_gr (inst);
1676 }
1677 args_stored = 0;
1678 continue;
1679 }
1680
1681 reg_num = inst_saves_fr (inst);
1682 save_fr &= ~(1 << reg_num);
1683
8defab1a 1684 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1685 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1686
c906108c
SS
1687 /* Yow! */
1688 if (status != 0)
1689 return pc;
1690
1691 /* We've got to be read to handle the ldo before the fp register
c5aa993b 1692 save. */
c906108c
SS
1693 if ((inst & 0xfc000000) == 0x34000000
1694 && inst_saves_fr (next_inst) >= 4
819844ad 1695 && inst_saves_fr (next_inst)
be8626e0 1696 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1697 {
1698 /* So we drop into the code below in a reasonable state. */
1699 reg_num = inst_saves_fr (next_inst);
1700 pc -= 4;
1701 }
1702
1703 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1704 This is a kludge as on the HP compiler sets this bit and it
1705 never does prologue scheduling. So once we see one, skip past
1706 all of them. */
819844ad 1707 if (reg_num >= 4
be8626e0 1708 && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c 1709 {
819844ad
UW
1710 while (reg_num >= 4
1711 && reg_num
be8626e0 1712 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1713 {
1714 pc += 8;
8defab1a 1715 status = target_read_memory (pc, buf, 4);
e17a4113 1716 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1717 if (status != 0)
1718 return pc;
1719 if ((inst & 0xfc000000) != 0x34000000)
1720 break;
8defab1a 1721 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1722 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1723 if (status != 0)
1724 return pc;
1725 reg_num = inst_saves_fr (next_inst);
1726 }
1727 args_stored = 0;
1728 continue;
1729 }
1730
1731 /* Quit if we hit any kind of branch. This can happen if a prologue
c5aa993b 1732 instruction is in the delay slot of the first call/branch. */
a71f8c30 1733 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1734 break;
1735
1736 /* What a crock. The HP compilers set args_stored even if no
c5aa993b
JM
1737 arguments were stored into the stack (boo hiss). This could
1738 cause this code to then skip a bunch of user insns (up to the
1739 first branch).
1740
1741 To combat this we try to identify when args_stored was bogusly
1742 set and clear it. We only do this when args_stored is nonzero,
1743 all other resources are accounted for, and nothing changed on
1744 this pass. */
c906108c 1745 if (args_stored
c5aa993b 1746 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1747 && old_save_gr == save_gr && old_save_fr == save_fr
1748 && old_save_rp == save_rp && old_save_sp == save_sp
1749 && old_stack_remaining == stack_remaining)
1750 break;
c5aa993b 1751
c906108c
SS
1752 /* Bump the PC. */
1753 pc += 4;
a71f8c30
RC
1754
1755 /* !stop_before_branch, so also look at the insn in the delay slot
1756 of the branch. */
1757 if (final_iteration)
1758 break;
1759 if (is_branch (inst))
1760 final_iteration = 1;
c906108c
SS
1761 }
1762
1763 /* We've got a tenative location for the end of the prologue. However
1764 because of limitations in the unwind descriptor mechanism we may
1765 have went too far into user code looking for the save of a register
1766 that does not exist. So, if there registers we expected to be saved
1767 but never were, mask them out and restart.
1768
1769 This should only happen in optimized code, and should be very rare. */
c5aa993b 1770 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1771 {
1772 pc = orig_pc;
1773 restart_gr = save_gr;
1774 restart_fr = save_fr;
1775 goto restart;
1776 }
1777
1778 return pc;
1779}
1780
1781
7be570e7
JM
1782/* Return the address of the PC after the last prologue instruction if
1783 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1784
1785static CORE_ADDR
fba45db2 1786after_prologue (CORE_ADDR pc)
c906108c
SS
1787{
1788 struct symtab_and_line sal;
1789 CORE_ADDR func_addr, func_end;
c906108c 1790
7be570e7
JM
1791 /* If we can not find the symbol in the partial symbol table, then
1792 there is no hope we can determine the function's start address
1793 with this code. */
c906108c 1794 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1795 return 0;
c906108c 1796
7be570e7 1797 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1798 sal = find_pc_line (func_addr, 0);
1799
7be570e7
JM
1800 /* There are only two cases to consider. First, the end of the source line
1801 is within the function bounds. In that case we return the end of the
1802 source line. Second is the end of the source line extends beyond the
1803 bounds of the current function. We need to use the slow code to
1777feb0 1804 examine instructions in that case.
c906108c 1805
7be570e7
JM
1806 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1807 the wrong thing to do. In fact, it should be entirely possible for this
1808 function to always return zero since the slow instruction scanning code
1809 is supposed to *always* work. If it does not, then it is a bug. */
1810 if (sal.end < func_end)
1811 return sal.end;
c5aa993b 1812 else
7be570e7 1813 return 0;
c906108c
SS
1814}
1815
1816/* To skip prologues, I use this predicate. Returns either PC itself
1817 if the code at PC does not look like a function prologue; otherwise
1777feb0 1818 returns an address that (if we're lucky) follows the prologue.
a71f8c30
RC
1819
1820 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1777feb0 1821 It doesn't necessarily skips all the insns in the prologue. In fact
a71f8c30
RC
1822 we might not want to skip all the insns because a prologue insn may
1823 appear in the delay slot of the first branch, and we don't want to
1824 skip over the branch in that case. */
c906108c 1825
8d153463 1826static CORE_ADDR
6093d2eb 1827hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
c906108c 1828{
c5aa993b 1829 CORE_ADDR post_prologue_pc;
c906108c 1830
c5aa993b
JM
1831 /* See if we can determine the end of the prologue via the symbol table.
1832 If so, then return either PC, or the PC after the prologue, whichever
1833 is greater. */
c906108c 1834
c5aa993b 1835 post_prologue_pc = after_prologue (pc);
c906108c 1836
7be570e7
JM
1837 /* If after_prologue returned a useful address, then use it. Else
1838 fall back on the instruction skipping code.
1839
1840 Some folks have claimed this causes problems because the breakpoint
1841 may be the first instruction of the prologue. If that happens, then
1842 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b 1843 if (post_prologue_pc != 0)
325fac50 1844 return std::max (pc, post_prologue_pc);
c5aa993b 1845 else
be8626e0 1846 return (skip_prologue_hard_way (gdbarch, pc, 1));
c906108c
SS
1847}
1848
29d375ac 1849/* Return an unwind entry that falls within the frame's code block. */
227e86ad 1850
29d375ac 1851static struct unwind_table_entry *
227e86ad 1852hppa_find_unwind_entry_in_block (struct frame_info *this_frame)
29d375ac 1853{
227e86ad 1854 CORE_ADDR pc = get_frame_address_in_block (this_frame);
93d42b30
DJ
1855
1856 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
ad1193e7 1857 result of get_frame_address_in_block implies a problem.
93d42b30 1858 The bits should have been removed earlier, before the return
c7ce8faa 1859 value of gdbarch_unwind_pc. That might be happening already;
93d42b30
DJ
1860 if it isn't, it should be fixed. Then this call can be
1861 removed. */
227e86ad 1862 pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc);
29d375ac
RC
1863 return find_unwind_entry (pc);
1864}
1865
26d08f08
AC
1866struct hppa_frame_cache
1867{
1868 CORE_ADDR base;
1869 struct trad_frame_saved_reg *saved_regs;
1870};
1871
1872static struct hppa_frame_cache *
227e86ad 1873hppa_frame_cache (struct frame_info *this_frame, void **this_cache)
26d08f08 1874{
227e86ad 1875 struct gdbarch *gdbarch = get_frame_arch (this_frame);
e17a4113
UW
1876 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1877 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
26d08f08
AC
1878 struct hppa_frame_cache *cache;
1879 long saved_gr_mask;
1880 long saved_fr_mask;
26d08f08
AC
1881 long frame_size;
1882 struct unwind_table_entry *u;
9f7194c3 1883 CORE_ADDR prologue_end;
50b2f48a 1884 int fp_in_r1 = 0;
26d08f08
AC
1885 int i;
1886
369aa520
RC
1887 if (hppa_debug)
1888 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
227e86ad 1889 frame_relative_level(this_frame));
369aa520 1890
26d08f08 1891 if ((*this_cache) != NULL)
369aa520
RC
1892 {
1893 if (hppa_debug)
5af949e3
UW
1894 fprintf_unfiltered (gdb_stdlog, "base=%s (cached) }",
1895 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 1896 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1897 }
26d08f08
AC
1898 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1899 (*this_cache) = cache;
227e86ad 1900 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
26d08f08
AC
1901
1902 /* Yow! */
227e86ad 1903 u = hppa_find_unwind_entry_in_block (this_frame);
26d08f08 1904 if (!u)
369aa520
RC
1905 {
1906 if (hppa_debug)
1907 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
9a3c8263 1908 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1909 }
26d08f08
AC
1910
1911 /* Turn the Entry_GR field into a bitmask. */
1912 saved_gr_mask = 0;
1913 for (i = 3; i < u->Entry_GR + 3; i++)
1914 {
1915 /* Frame pointer gets saved into a special location. */
eded0a31 1916 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1917 continue;
1918
1919 saved_gr_mask |= (1 << i);
1920 }
1921
1922 /* Turn the Entry_FR field into a bitmask too. */
1923 saved_fr_mask = 0;
1924 for (i = 12; i < u->Entry_FR + 12; i++)
1925 saved_fr_mask |= (1 << i);
1926
1927 /* Loop until we find everything of interest or hit a branch.
1928
1929 For unoptimized GCC code and for any HP CC code this will never ever
1930 examine any user instructions.
1931
1932 For optimized GCC code we're faced with problems. GCC will schedule
1933 its prologue and make prologue instructions available for delay slot
1934 filling. The end result is user code gets mixed in with the prologue
1935 and a prologue instruction may be in the delay slot of the first branch
1936 or call.
1937
1938 Some unexpected things are expected with debugging optimized code, so
1939 we allow this routine to walk past user instructions in optimized
1940 GCC code. */
1941 {
1942 int final_iteration = 0;
46acf081 1943 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1944 int looking_for_sp = u->Save_SP;
1945 int looking_for_rp = u->Save_RP;
1946 int fp_loc = -1;
9f7194c3 1947
a71f8c30 1948 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1949 skip_prologue_using_sal, in case we stepped into a function without
1950 symbol information. hppa_skip_prologue also bounds the returned
1951 pc by the passed in pc, so it will not return a pc in the next
1777feb0 1952 function.
a71f8c30
RC
1953
1954 We used to call hppa_skip_prologue to find the end of the prologue,
1955 but if some non-prologue instructions get scheduled into the prologue,
1956 and the program is compiled with debug information, the "easy" way
1957 in hppa_skip_prologue will return a prologue end that is too early
1958 for us to notice any potential frame adjustments. */
d5c27f81 1959
ef02daa9
DJ
1960 /* We used to use get_frame_func to locate the beginning of the
1961 function to pass to skip_prologue. However, when objects are
1962 compiled without debug symbols, get_frame_func can return the wrong
1777feb0 1963 function (or 0). We can do better than that by using unwind records.
46acf081 1964 This only works if the Region_description of the unwind record
1777feb0 1965 indicates that it includes the entry point of the function.
46acf081
RC
1966 HP compilers sometimes generate unwind records for regions that
1967 do not include the entry or exit point of a function. GNU tools
1968 do not do this. */
1969
1970 if ((u->Region_description & 0x2) == 0)
1971 start_pc = u->region_start;
1972 else
227e86ad 1973 start_pc = get_frame_func (this_frame);
d5c27f81 1974
be8626e0 1975 prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0);
227e86ad 1976 end_pc = get_frame_pc (this_frame);
9f7194c3
RC
1977
1978 if (prologue_end != 0 && end_pc > prologue_end)
1979 end_pc = prologue_end;
1980
26d08f08 1981 frame_size = 0;
9f7194c3 1982
46acf081 1983 for (pc = start_pc;
26d08f08
AC
1984 ((saved_gr_mask || saved_fr_mask
1985 || looking_for_sp || looking_for_rp
1986 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1987 && pc < end_pc);
26d08f08
AC
1988 pc += 4)
1989 {
1990 int reg;
e362b510 1991 gdb_byte buf4[4];
4a302917
RC
1992 long inst;
1993
227e86ad 1994 if (!safe_frame_unwind_memory (this_frame, pc, buf4, sizeof buf4))
4a302917 1995 {
5af949e3
UW
1996 error (_("Cannot read instruction at %s."),
1997 paddress (gdbarch, pc));
9a3c8263 1998 return (struct hppa_frame_cache *) (*this_cache);
4a302917
RC
1999 }
2000
e17a4113 2001 inst = extract_unsigned_integer (buf4, sizeof buf4, byte_order);
9f7194c3 2002
26d08f08
AC
2003 /* Note the interesting effects of this instruction. */
2004 frame_size += prologue_inst_adjust_sp (inst);
2005
2006 /* There are limited ways to store the return pointer into the
2007 stack. */
2008 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2009 {
2010 looking_for_rp = 0;
34f75cc1 2011 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
26d08f08 2012 }
dfaf8edb
MK
2013 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
2014 {
2015 looking_for_rp = 0;
2016 cache->saved_regs[HPPA_RP_REGNUM].addr = -24;
2017 }
c4c79048
RC
2018 else if (inst == 0x0fc212c1
2019 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
2020 {
2021 looking_for_rp = 0;
34f75cc1 2022 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
26d08f08
AC
2023 }
2024
2025 /* Check to see if we saved SP into the stack. This also
2026 happens to indicate the location of the saved frame
2027 pointer. */
2028 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
2029 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
2030 {
2031 looking_for_sp = 0;
eded0a31 2032 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
26d08f08 2033 }
50b2f48a
RC
2034 else if (inst == 0x08030241) /* copy %r3, %r1 */
2035 {
2036 fp_in_r1 = 1;
2037 }
26d08f08
AC
2038
2039 /* Account for general and floating-point register saves. */
2040 reg = inst_saves_gr (inst);
2041 if (reg >= 3 && reg <= 18
eded0a31 2042 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
2043 {
2044 saved_gr_mask &= ~(1 << reg);
abc485a1 2045 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
2046 /* stwm with a positive displacement is a _post_
2047 _modify_. */
2048 cache->saved_regs[reg].addr = 0;
2049 else if ((inst & 0xfc00000c) == 0x70000008)
2050 /* A std has explicit post_modify forms. */
2051 cache->saved_regs[reg].addr = 0;
2052 else
2053 {
2054 CORE_ADDR offset;
2055
2056 if ((inst >> 26) == 0x1c)
66c6502d 2057 offset = (inst & 0x1 ? -(1 << 13) : 0)
1777feb0 2058 | (((inst >> 4) & 0x3ff) << 3);
26d08f08 2059 else if ((inst >> 26) == 0x03)
abc485a1 2060 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 2061 else
abc485a1 2062 offset = hppa_extract_14 (inst);
26d08f08
AC
2063
2064 /* Handle code with and without frame pointers. */
2065 if (u->Save_SP)
2066 cache->saved_regs[reg].addr = offset;
2067 else
1777feb0
MS
2068 cache->saved_regs[reg].addr
2069 = (u->Total_frame_size << 3) + offset;
26d08f08
AC
2070 }
2071 }
2072
2073 /* GCC handles callee saved FP regs a little differently.
2074
2075 It emits an instruction to put the value of the start of
2076 the FP store area into %r1. It then uses fstds,ma with a
2077 basereg of %r1 for the stores.
2078
2079 HP CC emits them at the current stack pointer modifying the
2080 stack pointer as it stores each register. */
2081
2082 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
2083 if ((inst & 0xffffc000) == 0x34610000
2084 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 2085 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
2086
2087 reg = inst_saves_fr (inst);
2088 if (reg >= 12 && reg <= 21)
2089 {
2090 /* Note +4 braindamage below is necessary because the FP
2091 status registers are internally 8 registers rather than
2092 the expected 4 registers. */
2093 saved_fr_mask &= ~(1 << reg);
2094 if (fp_loc == -1)
2095 {
2096 /* 1st HP CC FP register store. After this
2097 instruction we've set enough state that the GCC and
2098 HPCC code are both handled in the same manner. */
34f75cc1 2099 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].addr = 0;
26d08f08
AC
2100 fp_loc = 8;
2101 }
2102 else
2103 {
eded0a31 2104 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
26d08f08
AC
2105 fp_loc += 8;
2106 }
2107 }
2108
1777feb0 2109 /* Quit if we hit any kind of branch the previous iteration. */
26d08f08
AC
2110 if (final_iteration)
2111 break;
2112 /* We want to look precisely one instruction beyond the branch
2113 if we have not found everything yet. */
2114 if (is_branch (inst))
2115 final_iteration = 1;
2116 }
2117 }
2118
2119 {
2120 /* The frame base always represents the value of %sp at entry to
2121 the current function (and is thus equivalent to the "saved"
2122 stack pointer. */
227e86ad
JB
2123 CORE_ADDR this_sp = get_frame_register_unsigned (this_frame,
2124 HPPA_SP_REGNUM);
ed70ba00 2125 CORE_ADDR fp;
9f7194c3
RC
2126
2127 if (hppa_debug)
5af949e3
UW
2128 fprintf_unfiltered (gdb_stdlog, " (this_sp=%s, pc=%s, "
2129 "prologue_end=%s) ",
2130 paddress (gdbarch, this_sp),
2131 paddress (gdbarch, get_frame_pc (this_frame)),
2132 paddress (gdbarch, prologue_end));
9f7194c3 2133
ed70ba00
RC
2134 /* Check to see if a frame pointer is available, and use it for
2135 frame unwinding if it is.
2136
2137 There are some situations where we need to rely on the frame
2138 pointer to do stack unwinding. For example, if a function calls
2139 alloca (), the stack pointer can get adjusted inside the body of
2140 the function. In this case, the ABI requires that the compiler
2141 maintain a frame pointer for the function.
2142
2143 The unwind record has a flag (alloca_frame) that indicates that
2144 a function has a variable frame; unfortunately, gcc/binutils
2145 does not set this flag. Instead, whenever a frame pointer is used
2146 and saved on the stack, the Save_SP flag is set. We use this to
2147 decide whether to use the frame pointer for unwinding.
2148
ed70ba00
RC
2149 TODO: For the HP compiler, maybe we should use the alloca_frame flag
2150 instead of Save_SP. */
2151
227e86ad 2152 fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM);
46acf081 2153
6fcecea0 2154 if (u->alloca_frame)
46acf081 2155 fp -= u->Total_frame_size << 3;
ed70ba00 2156
227e86ad 2157 if (get_frame_pc (this_frame) >= prologue_end
6fcecea0 2158 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00
RC
2159 {
2160 cache->base = fp;
2161
2162 if (hppa_debug)
5af949e3
UW
2163 fprintf_unfiltered (gdb_stdlog, " (base=%s) [frame pointer]",
2164 paddress (gdbarch, cache->base));
ed70ba00 2165 }
1658da49
RC
2166 else if (u->Save_SP
2167 && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
9f7194c3 2168 {
9f7194c3
RC
2169 /* Both we're expecting the SP to be saved and the SP has been
2170 saved. The entry SP value is saved at this frame's SP
2171 address. */
e17a4113 2172 cache->base = read_memory_integer (this_sp, word_size, byte_order);
9f7194c3
RC
2173
2174 if (hppa_debug)
5af949e3
UW
2175 fprintf_unfiltered (gdb_stdlog, " (base=%s) [saved]",
2176 paddress (gdbarch, cache->base));
9f7194c3 2177 }
26d08f08 2178 else
9f7194c3 2179 {
1658da49
RC
2180 /* The prologue has been slowly allocating stack space. Adjust
2181 the SP back. */
2182 cache->base = this_sp - frame_size;
9f7194c3 2183 if (hppa_debug)
5af949e3
UW
2184 fprintf_unfiltered (gdb_stdlog, " (base=%s) [unwind adjust]",
2185 paddress (gdbarch, cache->base));
9f7194c3
RC
2186
2187 }
eded0a31 2188 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
26d08f08
AC
2189 }
2190
412275d5
AC
2191 /* The PC is found in the "return register", "Millicode" uses "r31"
2192 as the return register while normal code uses "rp". */
26d08f08 2193 if (u->Millicode)
9f7194c3 2194 {
5859efe5 2195 if (trad_frame_addr_p (cache->saved_regs, 31))
9ed5ba24
RC
2196 {
2197 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
2198 if (hppa_debug)
2199 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [stack] } ");
2200 }
9f7194c3
RC
2201 else
2202 {
227e86ad 2203 ULONGEST r31 = get_frame_register_unsigned (this_frame, 31);
34f75cc1 2204 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, r31);
9ed5ba24
RC
2205 if (hppa_debug)
2206 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [frame] } ");
9f7194c3
RC
2207 }
2208 }
26d08f08 2209 else
9f7194c3 2210 {
34f75cc1 2211 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
9ed5ba24
RC
2212 {
2213 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2214 cache->saved_regs[HPPA_RP_REGNUM];
2215 if (hppa_debug)
2216 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [stack] } ");
2217 }
9f7194c3
RC
2218 else
2219 {
227e86ad
JB
2220 ULONGEST rp = get_frame_register_unsigned (this_frame,
2221 HPPA_RP_REGNUM);
34f75cc1 2222 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
9ed5ba24
RC
2223 if (hppa_debug)
2224 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2225 }
2226 }
26d08f08 2227
50b2f48a
RC
2228 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2229 frame. However, there is a one-insn window where we haven't saved it
2230 yet, but we've already clobbered it. Detect this case and fix it up.
2231
2232 The prologue sequence for frame-pointer functions is:
2233 0: stw %rp, -20(%sp)
2234 4: copy %r3, %r1
2235 8: copy %sp, %r3
2236 c: stw,ma %r1, XX(%sp)
2237
2238 So if we are at offset c, the r3 value that we want is not yet saved
2239 on the stack, but it's been overwritten. The prologue analyzer will
2240 set fp_in_r1 when it sees the copy insn so we know to get the value
2241 from r1 instead. */
2242 if (u->Save_SP && !trad_frame_addr_p (cache->saved_regs, HPPA_FP_REGNUM)
2243 && fp_in_r1)
2244 {
227e86ad 2245 ULONGEST r1 = get_frame_register_unsigned (this_frame, 1);
50b2f48a
RC
2246 trad_frame_set_value (cache->saved_regs, HPPA_FP_REGNUM, r1);
2247 }
1658da49 2248
26d08f08
AC
2249 {
2250 /* Convert all the offsets into addresses. */
2251 int reg;
65c5db89 2252 for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
26d08f08
AC
2253 {
2254 if (trad_frame_addr_p (cache->saved_regs, reg))
2255 cache->saved_regs[reg].addr += cache->base;
2256 }
2257 }
2258
f77a2124 2259 {
f77a2124
RC
2260 struct gdbarch_tdep *tdep;
2261
f77a2124
RC
2262 tdep = gdbarch_tdep (gdbarch);
2263
2264 if (tdep->unwind_adjust_stub)
227e86ad 2265 tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs);
f77a2124
RC
2266 }
2267
369aa520 2268 if (hppa_debug)
5af949e3
UW
2269 fprintf_unfiltered (gdb_stdlog, "base=%s }",
2270 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 2271 return (struct hppa_frame_cache *) (*this_cache);
26d08f08
AC
2272}
2273
2274static void
227e86ad
JB
2275hppa_frame_this_id (struct frame_info *this_frame, void **this_cache,
2276 struct frame_id *this_id)
26d08f08 2277{
d5c27f81 2278 struct hppa_frame_cache *info;
d5c27f81
RC
2279 struct unwind_table_entry *u;
2280
227e86ad
JB
2281 info = hppa_frame_cache (this_frame, this_cache);
2282 u = hppa_find_unwind_entry_in_block (this_frame);
d5c27f81
RC
2283
2284 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2285}
2286
227e86ad
JB
2287static struct value *
2288hppa_frame_prev_register (struct frame_info *this_frame,
2289 void **this_cache, int regnum)
26d08f08 2290{
227e86ad
JB
2291 struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache);
2292
1777feb0
MS
2293 return hppa_frame_prev_register_helper (this_frame,
2294 info->saved_regs, regnum);
227e86ad
JB
2295}
2296
2297static int
2298hppa_frame_unwind_sniffer (const struct frame_unwind *self,
2299 struct frame_info *this_frame, void **this_cache)
2300{
2301 if (hppa_find_unwind_entry_in_block (this_frame))
2302 return 1;
2303
2304 return 0;
0da28f8a
RC
2305}
2306
2307static const struct frame_unwind hppa_frame_unwind =
2308{
2309 NORMAL_FRAME,
8fbca658 2310 default_frame_unwind_stop_reason,
0da28f8a 2311 hppa_frame_this_id,
227e86ad
JB
2312 hppa_frame_prev_register,
2313 NULL,
2314 hppa_frame_unwind_sniffer
0da28f8a
RC
2315};
2316
0da28f8a
RC
2317/* This is a generic fallback frame unwinder that kicks in if we fail all
2318 the other ones. Normally we would expect the stub and regular unwinder
2319 to work, but in some cases we might hit a function that just doesn't
2320 have any unwind information available. In this case we try to do
2321 unwinding solely based on code reading. This is obviously going to be
2322 slow, so only use this as a last resort. Currently this will only
2323 identify the stack and pc for the frame. */
2324
2325static struct hppa_frame_cache *
227e86ad 2326hppa_fallback_frame_cache (struct frame_info *this_frame, void **this_cache)
0da28f8a 2327{
e17a4113
UW
2328 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2329 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0da28f8a 2330 struct hppa_frame_cache *cache;
4ba6a975
MK
2331 unsigned int frame_size = 0;
2332 int found_rp = 0;
2333 CORE_ADDR start_pc;
0da28f8a 2334
d5c27f81 2335 if (hppa_debug)
4ba6a975
MK
2336 fprintf_unfiltered (gdb_stdlog,
2337 "{ hppa_fallback_frame_cache (frame=%d) -> ",
227e86ad 2338 frame_relative_level (this_frame));
d5c27f81 2339
0da28f8a
RC
2340 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2341 (*this_cache) = cache;
227e86ad 2342 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
0da28f8a 2343
227e86ad 2344 start_pc = get_frame_func (this_frame);
4ba6a975 2345 if (start_pc)
0da28f8a 2346 {
227e86ad 2347 CORE_ADDR cur_pc = get_frame_pc (this_frame);
4ba6a975 2348 CORE_ADDR pc;
0da28f8a 2349
4ba6a975
MK
2350 for (pc = start_pc; pc < cur_pc; pc += 4)
2351 {
2352 unsigned int insn;
0da28f8a 2353
e17a4113 2354 insn = read_memory_unsigned_integer (pc, 4, byte_order);
4ba6a975 2355 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2356
4ba6a975
MK
2357 /* There are limited ways to store the return pointer into the
2358 stack. */
2359 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2360 {
2361 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
2362 found_rp = 1;
2363 }
c4c79048
RC
2364 else if (insn == 0x0fc212c1
2365 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975
MK
2366 {
2367 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
2368 found_rp = 1;
2369 }
2370 }
412275d5 2371 }
0da28f8a 2372
d5c27f81 2373 if (hppa_debug)
4ba6a975
MK
2374 fprintf_unfiltered (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2375 frame_size, found_rp);
d5c27f81 2376
227e86ad 2377 cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
4ba6a975 2378 cache->base -= frame_size;
6d1be3f1 2379 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
0da28f8a
RC
2380
2381 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
2382 {
2383 cache->saved_regs[HPPA_RP_REGNUM].addr += cache->base;
4ba6a975
MK
2384 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2385 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2386 }
412275d5
AC
2387 else
2388 {
4ba6a975 2389 ULONGEST rp;
227e86ad 2390 rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM);
0da28f8a 2391 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
412275d5 2392 }
0da28f8a
RC
2393
2394 return cache;
26d08f08
AC
2395}
2396
0da28f8a 2397static void
227e86ad 2398hppa_fallback_frame_this_id (struct frame_info *this_frame, void **this_cache,
0da28f8a
RC
2399 struct frame_id *this_id)
2400{
2401 struct hppa_frame_cache *info =
227e86ad
JB
2402 hppa_fallback_frame_cache (this_frame, this_cache);
2403
2404 (*this_id) = frame_id_build (info->base, get_frame_func (this_frame));
0da28f8a
RC
2405}
2406
227e86ad
JB
2407static struct value *
2408hppa_fallback_frame_prev_register (struct frame_info *this_frame,
2409 void **this_cache, int regnum)
0da28f8a 2410{
1777feb0
MS
2411 struct hppa_frame_cache *info
2412 = hppa_fallback_frame_cache (this_frame, this_cache);
227e86ad 2413
1777feb0
MS
2414 return hppa_frame_prev_register_helper (this_frame,
2415 info->saved_regs, regnum);
0da28f8a
RC
2416}
2417
2418static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08
AC
2419{
2420 NORMAL_FRAME,
8fbca658 2421 default_frame_unwind_stop_reason,
0da28f8a 2422 hppa_fallback_frame_this_id,
227e86ad
JB
2423 hppa_fallback_frame_prev_register,
2424 NULL,
2425 default_frame_sniffer
26d08f08
AC
2426};
2427
7f07c5b6
RC
2428/* Stub frames, used for all kinds of call stubs. */
2429struct hppa_stub_unwind_cache
2430{
2431 CORE_ADDR base;
2432 struct trad_frame_saved_reg *saved_regs;
2433};
2434
2435static struct hppa_stub_unwind_cache *
227e86ad 2436hppa_stub_frame_unwind_cache (struct frame_info *this_frame,
7f07c5b6
RC
2437 void **this_cache)
2438{
7f07c5b6
RC
2439 struct hppa_stub_unwind_cache *info;
2440
2441 if (*this_cache)
9a3c8263 2442 return (struct hppa_stub_unwind_cache *) *this_cache;
7f07c5b6
RC
2443
2444 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2445 *this_cache = info;
227e86ad 2446 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
7f07c5b6 2447
227e86ad 2448 info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
7f07c5b6 2449
22b0923d
RC
2450 /* By default we assume that stubs do not change the rp. */
2451 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].realreg = HPPA_RP_REGNUM;
2452
7f07c5b6
RC
2453 return info;
2454}
2455
2456static void
227e86ad 2457hppa_stub_frame_this_id (struct frame_info *this_frame,
7f07c5b6
RC
2458 void **this_prologue_cache,
2459 struct frame_id *this_id)
2460{
2461 struct hppa_stub_unwind_cache *info
227e86ad 2462 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57
RC
2463
2464 if (info)
227e86ad 2465 *this_id = frame_id_build (info->base, get_frame_func (this_frame));
7f07c5b6
RC
2466}
2467
227e86ad
JB
2468static struct value *
2469hppa_stub_frame_prev_register (struct frame_info *this_frame,
2470 void **this_prologue_cache, int regnum)
7f07c5b6
RC
2471{
2472 struct hppa_stub_unwind_cache *info
227e86ad 2473 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57 2474
227e86ad 2475 if (info == NULL)
8a3fe4f8 2476 error (_("Requesting registers from null frame."));
7f07c5b6 2477
1777feb0
MS
2478 return hppa_frame_prev_register_helper (this_frame,
2479 info->saved_regs, regnum);
227e86ad 2480}
7f07c5b6 2481
227e86ad
JB
2482static int
2483hppa_stub_unwind_sniffer (const struct frame_unwind *self,
2484 struct frame_info *this_frame,
2485 void **this_cache)
7f07c5b6 2486{
227e86ad
JB
2487 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2488 struct gdbarch *gdbarch = get_frame_arch (this_frame);
84674fe1 2489 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7f07c5b6 2490
6d1be3f1 2491 if (pc == 0
84674fe1 2492 || (tdep->in_solib_call_trampoline != NULL
3e5d3a5a 2493 && tdep->in_solib_call_trampoline (gdbarch, pc))
464963c9 2494 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
227e86ad
JB
2495 return 1;
2496 return 0;
7f07c5b6
RC
2497}
2498
227e86ad
JB
2499static const struct frame_unwind hppa_stub_frame_unwind = {
2500 NORMAL_FRAME,
8fbca658 2501 default_frame_unwind_stop_reason,
227e86ad
JB
2502 hppa_stub_frame_this_id,
2503 hppa_stub_frame_prev_register,
2504 NULL,
2505 hppa_stub_unwind_sniffer
2506};
2507
cc72850f 2508CORE_ADDR
26d08f08
AC
2509hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2510{
fe46cd3a
RC
2511 ULONGEST ipsw;
2512 CORE_ADDR pc;
2513
cc72850f
MK
2514 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2515 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2516
2517 /* If the current instruction is nullified, then we are effectively
2518 still executing the previous instruction. Pretend we are still
cc72850f
MK
2519 there. This is needed when single stepping; if the nullified
2520 instruction is on a different line, we don't want GDB to think
2521 we've stepped onto that line. */
fe46cd3a
RC
2522 if (ipsw & 0x00200000)
2523 pc -= 4;
2524
cc72850f 2525 return pc & ~0x3;
26d08f08
AC
2526}
2527
ff644745
JB
2528/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2529 Return NULL if no such symbol was found. */
2530
3b7344d5 2531struct bound_minimal_symbol
ff644745
JB
2532hppa_lookup_stub_minimal_symbol (const char *name,
2533 enum unwind_stub_types stub_type)
2534{
3b7344d5 2535 struct bound_minimal_symbol result = { NULL, NULL };
ff644745 2536
2030c079 2537 for (objfile *objfile : current_program_space->objfiles ())
ff644745 2538 {
7932255d 2539 for (minimal_symbol *msym : objfile->msymbols ())
5325b9bf
TT
2540 {
2541 if (strcmp (MSYMBOL_LINKAGE_NAME (msym), name) == 0)
3b7344d5 2542 {
5325b9bf
TT
2543 struct unwind_table_entry *u;
2544
2545 u = find_unwind_entry (MSYMBOL_VALUE (msym));
2546 if (u != NULL && u->stub_unwind.stub_type == stub_type)
2547 {
2548 result.objfile = objfile;
2549 result.minsym = msym;
2550 return result;
2551 }
3b7344d5 2552 }
5325b9bf 2553 }
ff644745
JB
2554 }
2555
3b7344d5 2556 return result;
ff644745
JB
2557}
2558
c906108c 2559static void
c482f52c 2560unwind_command (const char *exp, int from_tty)
c906108c
SS
2561{
2562 CORE_ADDR address;
2563 struct unwind_table_entry *u;
2564
2565 /* If we have an expression, evaluate it and use it as the address. */
2566
2567 if (exp != 0 && *exp != 0)
2568 address = parse_and_eval_address (exp);
2569 else
2570 return;
2571
2572 u = find_unwind_entry (address);
2573
2574 if (!u)
2575 {
2576 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2577 return;
2578 }
2579
3329c4b5 2580 printf_unfiltered ("unwind_table_entry (%s):\n", host_address_to_string (u));
c906108c 2581
5af949e3 2582 printf_unfiltered ("\tregion_start = %s\n", hex_string (u->region_start));
c906108c 2583
5af949e3 2584 printf_unfiltered ("\tregion_end = %s\n", hex_string (u->region_end));
c906108c 2585
c906108c 2586#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2587
2588 printf_unfiltered ("\n\tflags =");
2589 pif (Cannot_unwind);
2590 pif (Millicode);
2591 pif (Millicode_save_sr0);
2592 pif (Entry_SR);
2593 pif (Args_stored);
2594 pif (Variable_Frame);
2595 pif (Separate_Package_Body);
2596 pif (Frame_Extension_Millicode);
2597 pif (Stack_Overflow_Check);
2598 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2599 pif (sr4export);
2600 pif (cxx_info);
2601 pif (cxx_try_catch);
2602 pif (sched_entry_seq);
c906108c
SS
2603 pif (Save_SP);
2604 pif (Save_RP);
2605 pif (Save_MRP_in_frame);
6fcecea0 2606 pif (save_r19);
c906108c
SS
2607 pif (Cleanup_defined);
2608 pif (MPE_XL_interrupt_marker);
2609 pif (HP_UX_interrupt_marker);
2610 pif (Large_frame);
6fcecea0 2611 pif (alloca_frame);
c906108c
SS
2612
2613 putchar_unfiltered ('\n');
2614
c906108c 2615#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2616
2617 pin (Region_description);
2618 pin (Entry_FR);
2619 pin (Entry_GR);
2620 pin (Total_frame_size);
57dac9e1
RC
2621
2622 if (u->stub_unwind.stub_type)
2623 {
2624 printf_unfiltered ("\tstub type = ");
2625 switch (u->stub_unwind.stub_type)
2626 {
2627 case LONG_BRANCH:
2628 printf_unfiltered ("long branch\n");
2629 break;
2630 case PARAMETER_RELOCATION:
2631 printf_unfiltered ("parameter relocation\n");
2632 break;
2633 case EXPORT:
2634 printf_unfiltered ("export\n");
2635 break;
2636 case IMPORT:
2637 printf_unfiltered ("import\n");
2638 break;
2639 case IMPORT_SHLIB:
2640 printf_unfiltered ("import shlib\n");
2641 break;
2642 default:
2643 printf_unfiltered ("unknown (%d)\n", u->stub_unwind.stub_type);
2644 }
2645 }
c906108c 2646}
c906108c 2647
38ca4e0c
MK
2648/* Return the GDB type object for the "standard" data type of data in
2649 register REGNUM. */
d709c020 2650
eded0a31 2651static struct type *
38ca4e0c 2652hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2653{
38ca4e0c 2654 if (regnum < HPPA_FP4_REGNUM)
df4df182 2655 return builtin_type (gdbarch)->builtin_uint32;
d709c020 2656 else
27067745 2657 return builtin_type (gdbarch)->builtin_float;
d709c020
JB
2658}
2659
eded0a31 2660static struct type *
38ca4e0c 2661hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2662{
38ca4e0c 2663 if (regnum < HPPA64_FP4_REGNUM)
df4df182 2664 return builtin_type (gdbarch)->builtin_uint64;
3ff7cf9e 2665 else
27067745 2666 return builtin_type (gdbarch)->builtin_double;
3ff7cf9e
JB
2667}
2668
38ca4e0c
MK
2669/* Return non-zero if REGNUM is not a register available to the user
2670 through ptrace/ttrace. */
d709c020 2671
8d153463 2672static int
64a3914f 2673hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum)
d709c020
JB
2674{
2675 return (regnum == 0
34f75cc1
RC
2676 || regnum == HPPA_PCSQ_HEAD_REGNUM
2677 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2678 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2679}
d709c020 2680
d037d088 2681static int
64a3914f 2682hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2683{
2684 /* cr26 and cr27 are readable (but not writable) from userspace. */
2685 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2686 return 0;
2687 else
64a3914f 2688 return hppa32_cannot_store_register (gdbarch, regnum);
d037d088
CD
2689}
2690
38ca4e0c 2691static int
64a3914f 2692hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
38ca4e0c
MK
2693{
2694 return (regnum == 0
2695 || regnum == HPPA_PCSQ_HEAD_REGNUM
2696 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2697 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2698}
2699
d037d088 2700static int
64a3914f 2701hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2702{
2703 /* cr26 and cr27 are readable (but not writable) from userspace. */
2704 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2705 return 0;
2706 else
64a3914f 2707 return hppa64_cannot_store_register (gdbarch, regnum);
d037d088
CD
2708}
2709
8d153463 2710static CORE_ADDR
85ddcc70 2711hppa_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
d709c020
JB
2712{
2713 /* The low two bits of the PC on the PA contain the privilege level.
2714 Some genius implementing a (non-GCC) compiler apparently decided
2715 this means that "addresses" in a text section therefore include a
2716 privilege level, and thus symbol tables should contain these bits.
2717 This seems like a bonehead thing to do--anyway, it seems to work
2718 for our purposes to just ignore those bits. */
2719
2720 return (addr &= ~0x3);
2721}
2722
e127f0db
MK
2723/* Get the ARGIth function argument for the current function. */
2724
4a302917 2725static CORE_ADDR
143985b7
AF
2726hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2727 struct type *type)
2728{
e127f0db 2729 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2730}
2731
05d1431c 2732static enum register_status
849d0ba8 2733hppa_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
e127f0db 2734 int regnum, gdb_byte *buf)
0f8d9d59 2735{
05d1431c
PA
2736 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2737 ULONGEST tmp;
2738 enum register_status status;
0f8d9d59 2739
03f50fc8 2740 status = regcache->raw_read (regnum, &tmp);
05d1431c
PA
2741 if (status == REG_VALID)
2742 {
2743 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
2744 tmp &= ~0x3;
2745 store_unsigned_integer (buf, sizeof tmp, byte_order, tmp);
2746 }
2747 return status;
0f8d9d59
RC
2748}
2749
d49771ef 2750static CORE_ADDR
e38c262f 2751hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function)
d49771ef
RC
2752{
2753 return 0;
2754}
2755
227e86ad
JB
2756struct value *
2757hppa_frame_prev_register_helper (struct frame_info *this_frame,
0da28f8a 2758 struct trad_frame_saved_reg saved_regs[],
227e86ad 2759 int regnum)
0da28f8a 2760{
227e86ad 2761 struct gdbarch *arch = get_frame_arch (this_frame);
e17a4113 2762 enum bfd_endian byte_order = gdbarch_byte_order (arch);
8f4e467c 2763
8693c419
MK
2764 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2765 {
227e86ad
JB
2766 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
2767 CORE_ADDR pc;
2768 struct value *pcoq_val =
2769 trad_frame_get_prev_register (this_frame, saved_regs,
2770 HPPA_PCOQ_HEAD_REGNUM);
8693c419 2771
e17a4113
UW
2772 pc = extract_unsigned_integer (value_contents_all (pcoq_val),
2773 size, byte_order);
227e86ad 2774 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
8693c419 2775 }
0da28f8a 2776
227e86ad 2777 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
0da28f8a 2778}
8693c419 2779\f
0da28f8a 2780
34f55018
MK
2781/* An instruction to match. */
2782struct insn_pattern
2783{
2784 unsigned int data; /* See if it matches this.... */
2785 unsigned int mask; /* ... with this mask. */
2786};
2787
2788/* See bfd/elf32-hppa.c */
2789static struct insn_pattern hppa_long_branch_stub[] = {
2790 /* ldil LR'xxx,%r1 */
2791 { 0x20200000, 0xffe00000 },
2792 /* be,n RR'xxx(%sr4,%r1) */
2793 { 0xe0202002, 0xffe02002 },
2794 { 0, 0 }
2795};
2796
2797static struct insn_pattern hppa_long_branch_pic_stub[] = {
2798 /* b,l .+8, %r1 */
2799 { 0xe8200000, 0xffe00000 },
2800 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2801 { 0x28200000, 0xffe00000 },
2802 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2803 { 0xe0202002, 0xffe02002 },
2804 { 0, 0 }
2805};
2806
2807static struct insn_pattern hppa_import_stub[] = {
2808 /* addil LR'xxx, %dp */
2809 { 0x2b600000, 0xffe00000 },
2810 /* ldw RR'xxx(%r1), %r21 */
2811 { 0x48350000, 0xffffb000 },
2812 /* bv %r0(%r21) */
2813 { 0xeaa0c000, 0xffffffff },
2814 /* ldw RR'xxx+4(%r1), %r19 */
2815 { 0x48330000, 0xffffb000 },
2816 { 0, 0 }
2817};
2818
2819static struct insn_pattern hppa_import_pic_stub[] = {
2820 /* addil LR'xxx,%r19 */
2821 { 0x2a600000, 0xffe00000 },
2822 /* ldw RR'xxx(%r1),%r21 */
2823 { 0x48350000, 0xffffb000 },
2824 /* bv %r0(%r21) */
2825 { 0xeaa0c000, 0xffffffff },
2826 /* ldw RR'xxx+4(%r1),%r19 */
2827 { 0x48330000, 0xffffb000 },
2828 { 0, 0 },
2829};
2830
2831static struct insn_pattern hppa_plt_stub[] = {
2832 /* b,l 1b, %r20 - 1b is 3 insns before here */
2833 { 0xea9f1fdd, 0xffffffff },
2834 /* depi 0,31,2,%r20 */
2835 { 0xd6801c1e, 0xffffffff },
2836 { 0, 0 }
34f55018
MK
2837};
2838
2839/* Maximum number of instructions on the patterns above. */
2840#define HPPA_MAX_INSN_PATTERN_LEN 4
2841
2842/* Return non-zero if the instructions at PC match the series
2843 described in PATTERN, or zero otherwise. PATTERN is an array of
2844 'struct insn_pattern' objects, terminated by an entry whose mask is
2845 zero.
2846
2847 When the match is successful, fill INSN[i] with what PATTERN[i]
2848 matched. */
2849
2850static int
e17a4113
UW
2851hppa_match_insns (struct gdbarch *gdbarch, CORE_ADDR pc,
2852 struct insn_pattern *pattern, unsigned int *insn)
34f55018 2853{
e17a4113 2854 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
34f55018
MK
2855 CORE_ADDR npc = pc;
2856 int i;
2857
2858 for (i = 0; pattern[i].mask; i++)
2859 {
2860 gdb_byte buf[HPPA_INSN_SIZE];
2861
8defab1a 2862 target_read_memory (npc, buf, HPPA_INSN_SIZE);
e17a4113 2863 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE, byte_order);
34f55018
MK
2864 if ((insn[i] & pattern[i].mask) == pattern[i].data)
2865 npc += 4;
2866 else
2867 return 0;
2868 }
2869
2870 return 1;
2871}
2872
2873/* This relaxed version of the insstruction matcher allows us to match
2874 from somewhere inside the pattern, by looking backwards in the
2875 instruction scheme. */
2876
2877static int
e17a4113
UW
2878hppa_match_insns_relaxed (struct gdbarch *gdbarch, CORE_ADDR pc,
2879 struct insn_pattern *pattern, unsigned int *insn)
34f55018
MK
2880{
2881 int offset, len = 0;
2882
2883 while (pattern[len].mask)
2884 len++;
2885
2886 for (offset = 0; offset < len; offset++)
e17a4113
UW
2887 if (hppa_match_insns (gdbarch, pc - offset * HPPA_INSN_SIZE,
2888 pattern, insn))
34f55018
MK
2889 return 1;
2890
2891 return 0;
2892}
2893
2894static int
2895hppa_in_dyncall (CORE_ADDR pc)
2896{
2897 struct unwind_table_entry *u;
2898
2899 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2900 if (!u)
2901 return 0;
2902
2903 return (pc >= u->region_start && pc <= u->region_end);
2904}
2905
2906int
3e5d3a5a 2907hppa_in_solib_call_trampoline (struct gdbarch *gdbarch, CORE_ADDR pc)
34f55018
MK
2908{
2909 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2910 struct unwind_table_entry *u;
2911
3e5d3a5a 2912 if (in_plt_section (pc) || hppa_in_dyncall (pc))
34f55018
MK
2913 return 1;
2914
2915 /* The GNU toolchain produces linker stubs without unwind
2916 information. Since the pattern matching for linker stubs can be
2917 quite slow, so bail out if we do have an unwind entry. */
2918
2919 u = find_unwind_entry (pc);
806e23c0 2920 if (u != NULL)
34f55018
MK
2921 return 0;
2922
e17a4113
UW
2923 return
2924 (hppa_match_insns_relaxed (gdbarch, pc, hppa_import_stub, insn)
2925 || hppa_match_insns_relaxed (gdbarch, pc, hppa_import_pic_stub, insn)
2926 || hppa_match_insns_relaxed (gdbarch, pc, hppa_long_branch_stub, insn)
2927 || hppa_match_insns_relaxed (gdbarch, pc,
2928 hppa_long_branch_pic_stub, insn));
34f55018
MK
2929}
2930
2931/* This code skips several kind of "trampolines" used on PA-RISC
2932 systems: $$dyncall, import stubs and PLT stubs. */
2933
2934CORE_ADDR
52f729a7 2935hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018 2936{
0dfff4cb
UW
2937 struct gdbarch *gdbarch = get_frame_arch (frame);
2938 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
2939
34f55018
MK
2940 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2941 int dp_rel;
2942
2943 /* $$dyncall handles both PLABELs and direct addresses. */
2944 if (hppa_in_dyncall (pc))
2945 {
52f729a7 2946 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2947
2948 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2949 if (pc & 0x2)
0dfff4cb 2950 pc = read_memory_typed_address (pc & ~0x3, func_ptr_type);
34f55018
MK
2951
2952 return pc;
2953 }
2954
e17a4113
UW
2955 dp_rel = hppa_match_insns (gdbarch, pc, hppa_import_stub, insn);
2956 if (dp_rel || hppa_match_insns (gdbarch, pc, hppa_import_pic_stub, insn))
34f55018
MK
2957 {
2958 /* Extract the target address from the addil/ldw sequence. */
2959 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
2960
2961 if (dp_rel)
52f729a7 2962 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 2963 else
52f729a7 2964 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
2965
2966 /* fallthrough */
2967 }
2968
3e5d3a5a 2969 if (in_plt_section (pc))
34f55018 2970 {
0dfff4cb 2971 pc = read_memory_typed_address (pc, func_ptr_type);
34f55018
MK
2972
2973 /* If the PLT slot has not yet been resolved, the target will be
2974 the PLT stub. */
3e5d3a5a 2975 if (in_plt_section (pc))
34f55018
MK
2976 {
2977 /* Sanity check: are we pointing to the PLT stub? */
e17a4113 2978 if (!hppa_match_insns (gdbarch, pc, hppa_plt_stub, insn))
34f55018 2979 {
5af949e3
UW
2980 warning (_("Cannot resolve PLT stub at %s."),
2981 paddress (gdbarch, pc));
34f55018
MK
2982 return 0;
2983 }
2984
2985 /* This should point to the fixup routine. */
0dfff4cb 2986 pc = read_memory_typed_address (pc + 8, func_ptr_type);
34f55018
MK
2987 }
2988 }
2989
2990 return pc;
2991}
2992\f
2993
8e8b2dba
MC
2994/* Here is a table of C type sizes on hppa with various compiles
2995 and options. I measured this on PA 9000/800 with HP-UX 11.11
2996 and these compilers:
2997
2998 /usr/ccs/bin/cc HP92453-01 A.11.01.21
2999 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
3000 /opt/aCC/bin/aCC B3910B A.03.45
3001 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
3002
3003 cc : 1 2 4 4 8 : 4 8 -- : 4 4
3004 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3005 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3006 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3007 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3008 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3009 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3010 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
3011
3012 Each line is:
3013
3014 compiler and options
3015 char, short, int, long, long long
3016 float, double, long double
3017 char *, void (*)()
3018
3019 So all these compilers use either ILP32 or LP64 model.
3020 TODO: gcc has more options so it needs more investigation.
3021
a2379359
MC
3022 For floating point types, see:
3023
3024 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
3025 HP-UX floating-point guide, hpux 11.00
3026
8e8b2dba
MC
3027 -- chastain 2003-12-18 */
3028
e6e68f1f
JB
3029static struct gdbarch *
3030hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3031{
3ff7cf9e 3032 struct gdbarch_tdep *tdep;
e6e68f1f
JB
3033 struct gdbarch *gdbarch;
3034
3035 /* find a candidate among the list of pre-declared architectures. */
3036 arches = gdbarch_list_lookup_by_info (arches, &info);
3037 if (arches != NULL)
3038 return (arches->gdbarch);
3039
3040 /* If none found, then allocate and initialize one. */
41bf6aca 3041 tdep = XCNEW (struct gdbarch_tdep);
3ff7cf9e
JB
3042 gdbarch = gdbarch_alloc (&info, tdep);
3043
3044 /* Determine from the bfd_arch_info structure if we are dealing with
3045 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3046 then default to a 32bit machine. */
3047 if (info.bfd_arch_info != NULL)
3048 tdep->bytes_per_address =
3049 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3050 else
3051 tdep->bytes_per_address = 4;
3052
d49771ef
RC
3053 tdep->find_global_pointer = hppa_find_global_pointer;
3054
3ff7cf9e
JB
3055 /* Some parts of the gdbarch vector depend on whether we are running
3056 on a 32 bits or 64 bits target. */
3057 switch (tdep->bytes_per_address)
3058 {
3059 case 4:
3060 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3061 set_gdbarch_register_name (gdbarch, hppa32_register_name);
eded0a31 3062 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3063 set_gdbarch_cannot_store_register (gdbarch,
3064 hppa32_cannot_store_register);
3065 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3066 hppa32_cannot_fetch_register);
3ff7cf9e
JB
3067 break;
3068 case 8:
3069 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3070 set_gdbarch_register_name (gdbarch, hppa64_register_name);
eded0a31 3071 set_gdbarch_register_type (gdbarch, hppa64_register_type);
1ef7fcb5 3072 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3073 set_gdbarch_cannot_store_register (gdbarch,
3074 hppa64_cannot_store_register);
3075 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3076 hppa64_cannot_fetch_register);
3ff7cf9e
JB
3077 break;
3078 default:
e2e0b3e5 3079 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3ff7cf9e
JB
3080 tdep->bytes_per_address);
3081 }
3082
3ff7cf9e 3083 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3084 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3085
8e8b2dba
MC
3086 /* The following gdbarch vector elements are the same in both ILP32
3087 and LP64, but might show differences some day. */
3088 set_gdbarch_long_long_bit (gdbarch, 64);
3089 set_gdbarch_long_double_bit (gdbarch, 128);
8da61cc4 3090 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
8e8b2dba 3091
3ff7cf9e
JB
3092 /* The following gdbarch vector elements do not depend on the address
3093 size, or in any other gdbarch element previously set. */
60383d10 3094 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
c9cf6e20
MG
3095 set_gdbarch_stack_frame_destroyed_p (gdbarch,
3096 hppa_stack_frame_destroyed_p);
a2a84a72 3097 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3098 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3099 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
85ddcc70 3100 set_gdbarch_addr_bits_remove (gdbarch, hppa_addr_bits_remove);
60383d10 3101 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3102 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3103 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3104
143985b7
AF
3105 /* Helper for function argument information. */
3106 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3107
3a3bc038
AC
3108 /* When a hardware watchpoint triggers, we'll move the inferior past
3109 it by removing all eventpoints; stepping past the instruction
3110 that caused the trigger; reinserting eventpoints; and checking
3111 whether any watched location changed. */
3112 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3113
5979bc46 3114 /* Inferior function call methods. */
fca7aa43 3115 switch (tdep->bytes_per_address)
5979bc46 3116 {
fca7aa43
AC
3117 case 4:
3118 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3119 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef
RC
3120 set_gdbarch_convert_from_func_ptr_addr
3121 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3122 break;
3123 case 8:
782eae8b
AC
3124 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3125 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3126 break;
782eae8b 3127 default:
e2e0b3e5 3128 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3129 }
3130
3131 /* Struct return methods. */
fca7aa43 3132 switch (tdep->bytes_per_address)
fad850b2 3133 {
fca7aa43
AC
3134 case 4:
3135 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3136 break;
3137 case 8:
782eae8b 3138 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3139 break;
fca7aa43 3140 default:
e2e0b3e5 3141 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3142 }
7f07c5b6 3143
04180708
YQ
3144 set_gdbarch_breakpoint_kind_from_pc (gdbarch, hppa_breakpoint::kind_from_pc);
3145 set_gdbarch_sw_breakpoint_from_kind (gdbarch, hppa_breakpoint::bp_from_kind);
7f07c5b6 3146 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3147
5979bc46 3148 /* Frame unwind methods. */
782eae8b 3149 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3150
50306a9d
RC
3151 /* Hook in ABI-specific overrides, if they have been registered. */
3152 gdbarch_init_osabi (info, gdbarch);
3153
7f07c5b6 3154 /* Hook in the default unwinders. */
227e86ad
JB
3155 frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind);
3156 frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind);
3157 frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind);
5979bc46 3158
e6e68f1f
JB
3159 return gdbarch;
3160}
3161
3162static void
464963c9 3163hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3164{
464963c9 3165 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
fdd72f95
RC
3166
3167 fprintf_unfiltered (file, "bytes_per_address = %d\n",
3168 tdep->bytes_per_address);
3169 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3170}
3171
4facf7e8
JB
3172void
3173_initialize_hppa_tdep (void)
3174{
e6e68f1f 3175 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8 3176
7c46b9fb
RC
3177 hppa_objfile_priv_data = register_objfile_data ();
3178
4facf7e8 3179 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3180 _("Print unwind table entry at given address."),
4facf7e8
JB
3181 &maintenanceprintlist);
3182
1777feb0 3183 /* Debug this files internals. */
7915a72c
AC
3184 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3185Set whether hppa target specific debugging information should be displayed."),
3186 _("\
3187Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3188This flag controls whether hppa target specific debugging information is\n\
3189displayed. This information is particularly useful for debugging frame\n\
7915a72c 3190unwinding problems."),
2c5b56ce 3191 NULL,
7915a72c 3192 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3193 &setdebuglist, &showdebuglist);
4facf7e8 3194}