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Remove some unused functions from guile code
[thirdparty/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
4a94e368 3 Copyright (C) 1986-2022 Free Software Foundation, Inc.
c906108c
SS
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
c5aa993b 8 This file is part of GDB.
c906108c 9
c5aa993b
JM
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
c5aa993b 13 (at your option) any later version.
c906108c 14
c5aa993b
JM
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
c906108c 19
c5aa993b 20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
22
23#include "defs.h"
c906108c
SS
24#include "bfd.h"
25#include "inferior.h"
4e052eda 26#include "regcache.h"
e5d66720 27#include "completer.h"
59623e27 28#include "osabi.h"
343af405 29#include "arch-utils.h"
1777feb0 30/* For argument passing to the inferior. */
c906108c 31#include "symtab.h"
fde2cceb 32#include "dis-asm.h"
26d08f08
AC
33#include "trad-frame.h"
34#include "frame-unwind.h"
35#include "frame-base.h"
c906108c 36
c906108c
SS
37#include "gdbcore.h"
38#include "gdbcmd.h"
e6bb342a 39#include "gdbtypes.h"
c906108c 40#include "objfiles.h"
3ff7cf9e 41#include "hppa-tdep.h"
325fac50 42#include <algorithm>
c906108c 43
491144b5 44static bool hppa_debug = false;
369aa520 45
60383d10 46/* Some local constants. */
3ff7cf9e
JB
47static const int hppa32_num_regs = 128;
48static const int hppa64_num_regs = 96;
49
61a12cfa
JK
50/* We use the objfile->obj_private pointer for two things:
51 * 1. An unwind table;
52 *
53 * 2. A pointer to any associated shared library object.
54 *
55 * #defines are used to help refer to these objects.
56 */
57
58/* Info about the unwind table associated with an object file.
59 * This is hung off of the "objfile->obj_private" pointer, and
60 * is allocated in the objfile's psymbol obstack. This allows
61 * us to have unique unwind info for each executable and shared
62 * library that we are debugging.
63 */
64struct hppa_unwind_info
65 {
66 struct unwind_table_entry *table; /* Pointer to unwind info */
67 struct unwind_table_entry *cache; /* Pointer to last entry we found */
68 int last; /* Index of last entry */
69 };
70
71struct hppa_objfile_private
72 {
abed5aa8
TT
73 struct hppa_unwind_info *unwind_info = nullptr; /* a pointer */
74 struct so_list *so_info = nullptr; /* a pointer */
75 CORE_ADDR dp = 0;
61a12cfa 76
abed5aa8
TT
77 int dummy_call_sequence_reg = 0;
78 CORE_ADDR dummy_call_sequence_addr = 0;
61a12cfa
JK
79 };
80
7c46b9fb
RC
81/* hppa-specific object data -- unwind and solib info.
82 TODO/maybe: think about splitting this into two parts; the unwind data is
83 common to all hppa targets, but is only used in this file; we can register
84 that separately and make this static. The solib data is probably hpux-
85 specific, so we can create a separate extern objfile_data that is registered
86 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
abed5aa8 87static const struct objfile_key<hppa_objfile_private> hppa_objfile_priv_data;
7c46b9fb 88
405feb71 89/* Get at various relevant fields of an instruction word. */
e2ac8128
JB
90#define MASK_5 0x1f
91#define MASK_11 0x7ff
92#define MASK_14 0x3fff
93#define MASK_21 0x1fffff
94
e2ac8128
JB
95/* Sizes (in bytes) of the native unwind entries. */
96#define UNWIND_ENTRY_SIZE 16
97#define STUB_UNWIND_ENTRY_SIZE 8
98
c906108c 99/* Routines to extract various sized constants out of hppa
1777feb0 100 instructions. */
c906108c
SS
101
102/* This assumes that no garbage lies outside of the lower bits of
1777feb0 103 value. */
c906108c 104
63807e1d 105static int
abc485a1 106hppa_sign_extend (unsigned val, unsigned bits)
c906108c 107{
66c6502d 108 return (int) (val >> (bits - 1) ? (-(1 << bits)) | val : val);
c906108c
SS
109}
110
1777feb0 111/* For many immediate values the sign bit is the low bit! */
c906108c 112
63807e1d 113static int
abc485a1 114hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 115{
66c6502d 116 return (int) ((val & 0x1 ? (-(1 << (bits - 1))) : 0) | val >> 1);
c906108c
SS
117}
118
e2ac8128 119/* Extract the bits at positions between FROM and TO, using HP's numbering
1777feb0 120 (MSB = 0). */
e2ac8128 121
abc485a1
RC
122int
123hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
124{
125 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
126}
127
1777feb0 128/* Extract the immediate field from a ld{bhw}s instruction. */
c906108c 129
abc485a1
RC
130int
131hppa_extract_5_load (unsigned word)
c906108c 132{
abc485a1 133 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
134}
135
1777feb0 136/* Extract the immediate field from a break instruction. */
c906108c 137
abc485a1
RC
138unsigned
139hppa_extract_5r_store (unsigned word)
c906108c
SS
140{
141 return (word & MASK_5);
142}
143
1777feb0 144/* Extract the immediate field from a {sr}sm instruction. */
c906108c 145
abc485a1
RC
146unsigned
147hppa_extract_5R_store (unsigned word)
c906108c
SS
148{
149 return (word >> 16 & MASK_5);
150}
151
1777feb0 152/* Extract a 14 bit immediate field. */
c906108c 153
abc485a1
RC
154int
155hppa_extract_14 (unsigned word)
c906108c 156{
abc485a1 157 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
158}
159
1777feb0 160/* Extract a 21 bit constant. */
c906108c 161
abc485a1
RC
162int
163hppa_extract_21 (unsigned word)
c906108c
SS
164{
165 int val;
166
167 word &= MASK_21;
168 word <<= 11;
abc485a1 169 val = hppa_get_field (word, 20, 20);
c906108c 170 val <<= 11;
abc485a1 171 val |= hppa_get_field (word, 9, 19);
c906108c 172 val <<= 2;
abc485a1 173 val |= hppa_get_field (word, 5, 6);
c906108c 174 val <<= 5;
abc485a1 175 val |= hppa_get_field (word, 0, 4);
c906108c 176 val <<= 2;
abc485a1
RC
177 val |= hppa_get_field (word, 7, 8);
178 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
179}
180
c906108c 181/* extract a 17 bit constant from branch instructions, returning the
1777feb0 182 19 bit signed value. */
c906108c 183
abc485a1
RC
184int
185hppa_extract_17 (unsigned word)
c906108c 186{
abc485a1
RC
187 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
188 hppa_get_field (word, 29, 29) << 10 |
189 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
190 (word & 0x1) << 16, 17) << 2;
191}
3388d7ff
RC
192
193CORE_ADDR
194hppa_symbol_address(const char *sym)
195{
3b7344d5 196 struct bound_minimal_symbol minsym;
3388d7ff
RC
197
198 minsym = lookup_minimal_symbol (sym, NULL, NULL);
3b7344d5 199 if (minsym.minsym)
4aeddc50 200 return minsym.value_address ();
3388d7ff
RC
201 else
202 return (CORE_ADDR)-1;
203}
77d18ded 204
c906108c
SS
205\f
206
207/* Compare the start address for two unwind entries returning 1 if
208 the first address is larger than the second, -1 if the second is
209 larger than the first, and zero if they are equal. */
210
211static int
fba45db2 212compare_unwind_entries (const void *arg1, const void *arg2)
c906108c 213{
9a3c8263
SM
214 const struct unwind_table_entry *a = (const struct unwind_table_entry *) arg1;
215 const struct unwind_table_entry *b = (const struct unwind_table_entry *) arg2;
c906108c
SS
216
217 if (a->region_start > b->region_start)
218 return 1;
219 else if (a->region_start < b->region_start)
220 return -1;
221 else
222 return 0;
223}
224
53a5351d 225static void
fdd72f95 226record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 227{
fdd72f95 228 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 229 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
230 {
231 bfd_vma value = section->vma - section->filepos;
232 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
233
234 if (value < *low_text_segment_address)
dda83cd7 235 *low_text_segment_address = value;
fdd72f95 236 }
53a5351d
JM
237}
238
c906108c 239static void
fba45db2 240internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
1777feb0 241 asection *section, unsigned int entries,
241fd515 242 size_t size, CORE_ADDR text_offset)
c906108c
SS
243{
244 /* We will read the unwind entries into temporary memory, then
245 fill in the actual unwind table. */
fdd72f95 246
c906108c
SS
247 if (size > 0)
248 {
08feed99 249 struct gdbarch *gdbarch = objfile->arch ();
08106042 250 hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch);
c906108c
SS
251 unsigned long tmp;
252 unsigned i;
224c3ddb 253 char *buf = (char *) alloca (size);
fdd72f95 254 CORE_ADDR low_text_segment_address;
c906108c 255
fdd72f95 256 /* For ELF targets, then unwinds are supposed to
1777feb0 257 be segment relative offsets instead of absolute addresses.
c2c6d25f
JM
258
259 Note that when loading a shared library (text_offset != 0) the
260 unwinds are already relative to the text_offset that will be
261 passed in. */
345bd07c 262 if (tdep->is_elf && text_offset == 0)
53a5351d 263 {
dda83cd7 264 low_text_segment_address = -1;
fdd72f95 265
53a5351d 266 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
267 record_text_segment_lowaddr,
268 &low_text_segment_address);
53a5351d 269
fdd72f95 270 text_offset = low_text_segment_address;
53a5351d 271 }
345bd07c 272 else if (tdep->solib_get_text_base)
dda83cd7 273 {
345bd07c 274 text_offset = tdep->solib_get_text_base (objfile);
acf86d54 275 }
53a5351d 276
c906108c
SS
277 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
278
279 /* Now internalize the information being careful to handle host/target
dda83cd7 280 endian issues. */
c906108c
SS
281 for (i = 0; i < entries; i++)
282 {
283 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 284 (bfd_byte *) buf);
c906108c
SS
285 table[i].region_start += text_offset;
286 buf += 4;
c5aa993b 287 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
288 table[i].region_end += text_offset;
289 buf += 4;
c5aa993b 290 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
291 buf += 4;
292 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
293 table[i].Millicode = (tmp >> 30) & 0x1;
294 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
295 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 296 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
297 table[i].Entry_SR = (tmp >> 25) & 0x1;
298 table[i].Entry_FR = (tmp >> 21) & 0xf;
299 table[i].Entry_GR = (tmp >> 16) & 0x1f;
300 table[i].Args_stored = (tmp >> 15) & 0x1;
301 table[i].Variable_Frame = (tmp >> 14) & 0x1;
302 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
303 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
304 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
305 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 306 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
307 table[i].cxx_info = (tmp >> 8) & 0x1;
308 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
309 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 310 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
311 table[i].Save_SP = (tmp >> 4) & 0x1;
312 table[i].Save_RP = (tmp >> 3) & 0x1;
313 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 314 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 315 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 316 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
317 buf += 4;
318 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
319 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
320 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
321 table[i].alloca_frame = (tmp >> 28) & 0x1;
322 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
323 table[i].Total_frame_size = tmp & 0x7ffffff;
324
1777feb0 325 /* Stub unwinds are handled elsewhere. */
c906108c
SS
326 table[i].stub_unwind.stub_type = 0;
327 table[i].stub_unwind.padding = 0;
328 }
329 }
330}
331
332/* Read in the backtrace information stored in the `$UNWIND_START$' section of
333 the object file. This info is used mainly by find_unwind_entry() to find
334 out the stack frame size and frame pointer used by procedures. We put
335 everything on the psymbol obstack in the objfile so that it automatically
336 gets freed when the objfile is destroyed. */
337
338static void
fba45db2 339read_unwind_info (struct objfile *objfile)
c906108c 340{
d4f3574e 341 asection *unwind_sec, *stub_unwind_sec;
241fd515 342 size_t unwind_size, stub_unwind_size, total_size;
d4f3574e 343 unsigned index, unwind_entries;
c906108c
SS
344 unsigned stub_entries, total_entries;
345 CORE_ADDR text_offset;
7c46b9fb
RC
346 struct hppa_unwind_info *ui;
347 struct hppa_objfile_private *obj_private;
c906108c 348
b3b3bada 349 text_offset = objfile->text_section_offset ();
7c46b9fb
RC
350 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
351 sizeof (struct hppa_unwind_info));
c906108c
SS
352
353 ui->table = NULL;
354 ui->cache = NULL;
355 ui->last = -1;
356
d4f3574e
SS
357 /* For reasons unknown the HP PA64 tools generate multiple unwinder
358 sections in a single executable. So we just iterate over every
85102364 359 section in the BFD looking for unwinder sections instead of trying
1777feb0 360 to do a lookup with bfd_get_section_by_name.
c906108c 361
d4f3574e
SS
362 First determine the total size of the unwind tables so that we
363 can allocate memory in a nice big hunk. */
364 total_entries = 0;
365 for (unwind_sec = objfile->obfd->sections;
366 unwind_sec;
367 unwind_sec = unwind_sec->next)
c906108c 368 {
d4f3574e
SS
369 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
370 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
371 {
fd361982 372 unwind_size = bfd_section_size (unwind_sec);
d4f3574e 373 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 374
d4f3574e
SS
375 total_entries += unwind_entries;
376 }
c906108c
SS
377 }
378
d4f3574e 379 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 380 use stub unwinds at the current time. */
d4f3574e
SS
381 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
382
c906108c
SS
383 if (stub_unwind_sec)
384 {
fd361982 385 stub_unwind_size = bfd_section_size (stub_unwind_sec);
c906108c
SS
386 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
387 }
388 else
389 {
390 stub_unwind_size = 0;
391 stub_entries = 0;
392 }
393
394 /* Compute total number of unwind entries and their total size. */
d4f3574e 395 total_entries += stub_entries;
c906108c
SS
396 total_size = total_entries * sizeof (struct unwind_table_entry);
397
398 /* Allocate memory for the unwind table. */
399 ui->table = (struct unwind_table_entry *)
8b92e4d5 400 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 401 ui->last = total_entries - 1;
c906108c 402
d4f3574e
SS
403 /* Now read in each unwind section and internalize the standard unwind
404 entries. */
c906108c 405 index = 0;
d4f3574e
SS
406 for (unwind_sec = objfile->obfd->sections;
407 unwind_sec;
408 unwind_sec = unwind_sec->next)
409 {
410 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
411 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
412 {
fd361982 413 unwind_size = bfd_section_size (unwind_sec);
d4f3574e
SS
414 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
415
416 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
417 unwind_entries, unwind_size, text_offset);
418 index += unwind_entries;
419 }
420 }
421
422 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
423 if (stub_unwind_size > 0)
424 {
425 unsigned int i;
224c3ddb 426 char *buf = (char *) alloca (stub_unwind_size);
c906108c
SS
427
428 /* Read in the stub unwind entries. */
429 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
430 0, stub_unwind_size);
431
432 /* Now convert them into regular unwind entries. */
433 for (i = 0; i < stub_entries; i++, index++)
434 {
435 /* Clear out the next unwind entry. */
436 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
437
1777feb0 438 /* Convert offset & size into region_start and region_end.
c906108c
SS
439 Stuff away the stub type into "reserved" fields. */
440 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
441 (bfd_byte *) buf);
442 ui->table[index].region_start += text_offset;
443 buf += 4;
444 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 445 (bfd_byte *) buf);
c906108c
SS
446 buf += 2;
447 ui->table[index].region_end
c5aa993b
JM
448 = ui->table[index].region_start + 4 *
449 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
450 buf += 2;
451 }
452
453 }
454
455 /* Unwind table needs to be kept sorted. */
456 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
457 compare_unwind_entries);
458
459 /* Keep a pointer to the unwind information. */
9a73f0ad 460 obj_private = hppa_objfile_priv_data.get (objfile);
7c46b9fb 461 if (obj_private == NULL)
abed5aa8 462 obj_private = hppa_objfile_priv_data.emplace (objfile);
77d18ded 463
c906108c
SS
464 obj_private->unwind_info = ui;
465}
466
467/* Lookup the unwind (stack backtrace) info for the given PC. We search all
468 of the objfiles seeking the unwind table entry for this PC. Each objfile
469 contains a sorted list of struct unwind_table_entry. Since we do a binary
470 search of the unwind tables, we depend upon them to be sorted. */
471
472struct unwind_table_entry *
fba45db2 473find_unwind_entry (CORE_ADDR pc)
c906108c
SS
474{
475 int first, middle, last;
c906108c 476
369aa520 477 if (hppa_debug)
6cb06a8c
TT
478 gdb_printf (gdb_stdlog, "{ find_unwind_entry %s -> ",
479 hex_string (pc));
369aa520 480
1777feb0 481 /* A function at address 0? Not in HP-UX! */
c906108c 482 if (pc == (CORE_ADDR) 0)
369aa520
RC
483 {
484 if (hppa_debug)
6cb06a8c 485 gdb_printf (gdb_stdlog, "NULL }\n");
369aa520
RC
486 return NULL;
487 }
c906108c 488
2030c079 489 for (objfile *objfile : current_program_space->objfiles ())
aed57c53
TT
490 {
491 struct hppa_unwind_info *ui;
492 ui = NULL;
abed5aa8 493 struct hppa_objfile_private *priv = hppa_objfile_priv_data.get (objfile);
aed57c53 494 if (priv)
abed5aa8 495 ui = priv->unwind_info;
aed57c53
TT
496
497 if (!ui)
498 {
499 read_unwind_info (objfile);
9a73f0ad 500 priv = hppa_objfile_priv_data.get (objfile);
aed57c53
TT
501 if (priv == NULL)
502 error (_("Internal error reading unwind information."));
abed5aa8 503 ui = priv->unwind_info;
aed57c53
TT
504 }
505
506 /* First, check the cache. */
507
508 if (ui->cache
509 && pc >= ui->cache->region_start
510 && pc <= ui->cache->region_end)
511 {
512 if (hppa_debug)
6cb06a8c
TT
513 gdb_printf (gdb_stdlog, "%s (cached) }\n",
514 hex_string ((uintptr_t) ui->cache));
aed57c53
TT
515 return ui->cache;
516 }
517
518 /* Not in the cache, do a binary search. */
519
520 first = 0;
521 last = ui->last;
522
523 while (first <= last)
524 {
525 middle = (first + last) / 2;
526 if (pc >= ui->table[middle].region_start
527 && pc <= ui->table[middle].region_end)
528 {
529 ui->cache = &ui->table[middle];
530 if (hppa_debug)
6cb06a8c
TT
531 gdb_printf (gdb_stdlog, "%s }\n",
532 hex_string ((uintptr_t) ui->cache));
aed57c53
TT
533 return &ui->table[middle];
534 }
535
536 if (pc < ui->table[middle].region_start)
537 last = middle - 1;
538 else
539 first = middle + 1;
540 }
541 }
369aa520
RC
542
543 if (hppa_debug)
6cb06a8c 544 gdb_printf (gdb_stdlog, "NULL (not found) }\n");
369aa520 545
c906108c
SS
546 return NULL;
547}
548
c9cf6e20
MG
549/* Implement the stack_frame_destroyed_p gdbarch method.
550
551 The epilogue is defined here as the area either on the `bv' instruction
1777feb0 552 itself or an instruction which destroys the function's stack frame.
1fb24930
RC
553
554 We do not assume that the epilogue is at the end of a function as we can
555 also have return sequences in the middle of a function. */
c9cf6e20 556
1fb24930 557static int
c9cf6e20 558hppa_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1fb24930 559{
e17a4113 560 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1fb24930
RC
561 unsigned long status;
562 unsigned int inst;
e362b510 563 gdb_byte buf[4];
1fb24930 564
8defab1a 565 status = target_read_memory (pc, buf, 4);
1fb24930
RC
566 if (status != 0)
567 return 0;
568
e17a4113 569 inst = extract_unsigned_integer (buf, 4, byte_order);
1fb24930
RC
570
571 /* The most common way to perform a stack adjustment ldo X(sp),sp
572 We are destroying a stack frame if the offset is negative. */
573 if ((inst & 0xffffc000) == 0x37de0000
574 && hppa_extract_14 (inst) < 0)
575 return 1;
576
577 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
578 if (((inst & 0x0fc010e0) == 0x0fc010e0
579 || (inst & 0x0fc010e0) == 0x0fc010e0)
580 && hppa_extract_14 (inst) < 0)
581 return 1;
582
583 /* bv %r0(%rp) or bv,n %r0(%rp) */
584 if (inst == 0xe840c000 || inst == 0xe840c002)
585 return 1;
586
587 return 0;
588}
589
04180708 590constexpr gdb_byte hppa_break_insn[] = {0x00, 0x01, 0x00, 0x04};
598cc9dc 591
04180708 592typedef BP_MANIPULATION (hppa_break_insn) hppa_breakpoint;
aaab4dba 593
e23457df
AC
594/* Return the name of a register. */
595
4a302917 596static const char *
d93859e2 597hppa32_register_name (struct gdbarch *gdbarch, int i)
e23457df 598{
a121b7c1 599 static const char *names[] = {
e23457df
AC
600 "flags", "r1", "rp", "r3",
601 "r4", "r5", "r6", "r7",
602 "r8", "r9", "r10", "r11",
603 "r12", "r13", "r14", "r15",
604 "r16", "r17", "r18", "r19",
605 "r20", "r21", "r22", "r23",
606 "r24", "r25", "r26", "dp",
607 "ret0", "ret1", "sp", "r31",
608 "sar", "pcoqh", "pcsqh", "pcoqt",
609 "pcsqt", "eiem", "iir", "isr",
610 "ior", "ipsw", "goto", "sr4",
611 "sr0", "sr1", "sr2", "sr3",
612 "sr5", "sr6", "sr7", "cr0",
613 "cr8", "cr9", "ccr", "cr12",
614 "cr13", "cr24", "cr25", "cr26",
615 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
616 "fpsr", "fpe1", "fpe2", "fpe3",
617 "fpe4", "fpe5", "fpe6", "fpe7",
618 "fr4", "fr4R", "fr5", "fr5R",
619 "fr6", "fr6R", "fr7", "fr7R",
620 "fr8", "fr8R", "fr9", "fr9R",
621 "fr10", "fr10R", "fr11", "fr11R",
622 "fr12", "fr12R", "fr13", "fr13R",
623 "fr14", "fr14R", "fr15", "fr15R",
624 "fr16", "fr16R", "fr17", "fr17R",
625 "fr18", "fr18R", "fr19", "fr19R",
626 "fr20", "fr20R", "fr21", "fr21R",
627 "fr22", "fr22R", "fr23", "fr23R",
628 "fr24", "fr24R", "fr25", "fr25R",
629 "fr26", "fr26R", "fr27", "fr27R",
630 "fr28", "fr28R", "fr29", "fr29R",
631 "fr30", "fr30R", "fr31", "fr31R"
632 };
633 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
634 return NULL;
635 else
636 return names[i];
637}
638
4a302917 639static const char *
d93859e2 640hppa64_register_name (struct gdbarch *gdbarch, int i)
e23457df 641{
a121b7c1 642 static const char *names[] = {
e23457df
AC
643 "flags", "r1", "rp", "r3",
644 "r4", "r5", "r6", "r7",
645 "r8", "r9", "r10", "r11",
646 "r12", "r13", "r14", "r15",
647 "r16", "r17", "r18", "r19",
648 "r20", "r21", "r22", "r23",
649 "r24", "r25", "r26", "dp",
650 "ret0", "ret1", "sp", "r31",
651 "sar", "pcoqh", "pcsqh", "pcoqt",
652 "pcsqt", "eiem", "iir", "isr",
653 "ior", "ipsw", "goto", "sr4",
654 "sr0", "sr1", "sr2", "sr3",
655 "sr5", "sr6", "sr7", "cr0",
656 "cr8", "cr9", "ccr", "cr12",
657 "cr13", "cr24", "cr25", "cr26",
658 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
659 "fpsr", "fpe1", "fpe2", "fpe3",
660 "fr4", "fr5", "fr6", "fr7",
661 "fr8", "fr9", "fr10", "fr11",
662 "fr12", "fr13", "fr14", "fr15",
663 "fr16", "fr17", "fr18", "fr19",
664 "fr20", "fr21", "fr22", "fr23",
665 "fr24", "fr25", "fr26", "fr27",
666 "fr28", "fr29", "fr30", "fr31"
667 };
668 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
669 return NULL;
670 else
671 return names[i];
672}
673
85c83e99 674/* Map dwarf DBX register numbers to GDB register numbers. */
1ef7fcb5 675static int
d3f73121 676hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1ef7fcb5 677{
85c83e99 678 /* The general registers and the sar are the same in both sets. */
0fde2c53 679 if (reg >= 0 && reg <= 32)
1ef7fcb5
RC
680 return reg;
681
682 /* fr4-fr31 are mapped from 72 in steps of 2. */
85c83e99 683 if (reg >= 72 && reg < 72 + 28 * 2 && !(reg & 1))
1ef7fcb5
RC
684 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
685
1ef7fcb5
RC
686 return -1;
687}
688
79508e1e
AC
689/* This function pushes a stack frame with arguments as part of the
690 inferior function calling mechanism.
691
692 This is the version of the function for the 32-bit PA machines, in
693 which later arguments appear at lower addresses. (The stack always
694 grows towards higher addresses.)
695
696 We simply allocate the appropriate amount of stack space and put
697 arguments into their proper slots. */
698
4a302917 699static CORE_ADDR
7d9b040b 700hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
701 struct regcache *regcache, CORE_ADDR bp_addr,
702 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
703 function_call_return_method return_method,
704 CORE_ADDR struct_addr)
79508e1e 705{
e17a4113
UW
706 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
707
79508e1e
AC
708 /* Stack base address at which any pass-by-reference parameters are
709 stored. */
710 CORE_ADDR struct_end = 0;
711 /* Stack base address at which the first parameter is stored. */
712 CORE_ADDR param_end = 0;
713
79508e1e
AC
714 /* Two passes. First pass computes the location of everything,
715 second pass writes the bytes out. */
716 int write_pass;
d49771ef
RC
717
718 /* Global pointer (r19) of the function we are trying to call. */
719 CORE_ADDR gp;
720
08106042 721 hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch);
d49771ef 722
79508e1e
AC
723 for (write_pass = 0; write_pass < 2; write_pass++)
724 {
1797a8f6 725 CORE_ADDR struct_ptr = 0;
1777feb0 726 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
dda83cd7 727 struct_ptr is adjusted for each argument below, so the first
2a6228ef
RC
728 argument will end up at sp-36. */
729 CORE_ADDR param_ptr = 32;
79508e1e 730 int i;
2a6228ef
RC
731 int small_struct = 0;
732
79508e1e
AC
733 for (i = 0; i < nargs; i++)
734 {
735 struct value *arg = args[i];
4991999e 736 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
737 /* The corresponding parameter that is pushed onto the
738 stack, and [possibly] passed in a register. */
948f8e3d 739 gdb_byte param_val[8];
79508e1e
AC
740 int param_len;
741 memset (param_val, 0, sizeof param_val);
742 if (TYPE_LENGTH (type) > 8)
743 {
744 /* Large parameter, pass by reference. Store the value
745 in "struct" area and then pass its address. */
746 param_len = 4;
1797a8f6 747 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 748 if (write_pass)
50888e42
SM
749 write_memory (struct_end - struct_ptr,
750 value_contents (arg).data (), TYPE_LENGTH (type));
e17a4113
UW
751 store_unsigned_integer (param_val, 4, byte_order,
752 struct_end - struct_ptr);
79508e1e 753 }
78134374
SM
754 else if (type->code () == TYPE_CODE_INT
755 || type->code () == TYPE_CODE_ENUM)
79508e1e
AC
756 {
757 /* Integer value store, right aligned. "unpack_long"
758 takes care of any sign-extension problems. */
759 param_len = align_up (TYPE_LENGTH (type), 4);
50888e42
SM
760 store_unsigned_integer
761 (param_val, param_len, byte_order,
762 unpack_long (type, value_contents (arg).data ()));
79508e1e 763 }
78134374 764 else if (type->code () == TYPE_CODE_FLT)
dda83cd7 765 {
2a6228ef
RC
766 /* Floating point value store, right aligned. */
767 param_len = align_up (TYPE_LENGTH (type), 4);
50888e42 768 memcpy (param_val, value_contents (arg).data (), param_len);
dda83cd7 769 }
79508e1e
AC
770 else
771 {
79508e1e 772 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
773
774 /* Small struct value are stored right-aligned. */
79508e1e 775 memcpy (param_val + param_len - TYPE_LENGTH (type),
50888e42 776 value_contents (arg).data (), TYPE_LENGTH (type));
2a6228ef
RC
777
778 /* Structures of size 5, 6 and 7 bytes are special in that
dda83cd7 779 the higher-ordered word is stored in the lower-ordered
2a6228ef
RC
780 argument, and even though it is a 8-byte quantity the
781 registers need not be 8-byte aligned. */
1b07b470 782 if (param_len > 4 && param_len < 8)
2a6228ef 783 small_struct = 1;
79508e1e 784 }
2a6228ef 785
1797a8f6 786 param_ptr += param_len;
2a6228ef 787 if (param_len == 8 && !small_struct)
dda83cd7 788 param_ptr = align_up (param_ptr, 8);
2a6228ef
RC
789
790 /* First 4 non-FP arguments are passed in gr26-gr23.
791 First 4 32-bit FP arguments are passed in fr4L-fr7L.
792 First 2 64-bit FP arguments are passed in fr5 and fr7.
793
794 The rest go on the stack, starting at sp-36, towards lower
795 addresses. 8-byte arguments must be aligned to a 8-byte
796 stack boundary. */
79508e1e
AC
797 if (write_pass)
798 {
1797a8f6 799 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
800
801 /* There are some cases when we don't know the type
802 expected by the callee (e.g. for variadic functions), so
803 pass the parameters in both general and fp regs. */
804 if (param_ptr <= 48)
79508e1e 805 {
2a6228ef
RC
806 int grreg = 26 - (param_ptr - 36) / 4;
807 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
808 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
809
b66f5587
SM
810 regcache->cooked_write (grreg, param_val);
811 regcache->cooked_write (fpLreg, param_val);
2a6228ef 812
79508e1e 813 if (param_len > 4)
2a6228ef 814 {
b66f5587 815 regcache->cooked_write (grreg + 1, param_val + 4);
2a6228ef 816
b66f5587
SM
817 regcache->cooked_write (fpreg, param_val);
818 regcache->cooked_write (fpreg + 1, param_val + 4);
2a6228ef 819 }
79508e1e
AC
820 }
821 }
822 }
823
824 /* Update the various stack pointers. */
825 if (!write_pass)
826 {
2a6228ef 827 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
828 /* PARAM_PTR already accounts for all the arguments passed
829 by the user. However, the ABI mandates minimum stack
830 space allocations for outgoing arguments. The ABI also
831 mandates minimum stack alignments which we must
832 preserve. */
2a6228ef 833 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
834 }
835 }
836
837 /* If a structure has to be returned, set up register 28 to hold its
1777feb0 838 address. */
cf84fa6b 839 if (return_method == return_method_struct)
9c9acae0 840 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 841
e38c262f 842 gp = tdep->find_global_pointer (gdbarch, function);
d49771ef
RC
843
844 if (gp != 0)
9c9acae0 845 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 846
79508e1e 847 /* Set the return address. */
77d18ded
RC
848 if (!gdbarch_push_dummy_code_p (gdbarch))
849 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 850
c4557624 851 /* Update the Stack Pointer. */
34f75cc1 852 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 853
2a6228ef 854 return param_end;
79508e1e
AC
855}
856
38ca4e0c
MK
857/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
858 Runtime Architecture for PA-RISC 2.0", which is distributed as part
859 as of the HP-UX Software Transition Kit (STK). This implementation
860 is based on version 3.3, dated October 6, 1997. */
2f690297 861
38ca4e0c 862/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 863
38ca4e0c
MK
864static int
865hppa64_integral_or_pointer_p (const struct type *type)
866{
78134374 867 switch (type->code ())
38ca4e0c
MK
868 {
869 case TYPE_CODE_INT:
870 case TYPE_CODE_BOOL:
871 case TYPE_CODE_CHAR:
872 case TYPE_CODE_ENUM:
873 case TYPE_CODE_RANGE:
874 {
875 int len = TYPE_LENGTH (type);
876 return (len == 1 || len == 2 || len == 4 || len == 8);
877 }
878 case TYPE_CODE_PTR:
879 case TYPE_CODE_REF:
aa006118 880 case TYPE_CODE_RVALUE_REF:
38ca4e0c
MK
881 return (TYPE_LENGTH (type) == 8);
882 default:
883 break;
884 }
885
886 return 0;
887}
888
889/* Check whether TYPE is a "Floating Scalar Type". */
890
891static int
892hppa64_floating_p (const struct type *type)
893{
78134374 894 switch (type->code ())
38ca4e0c
MK
895 {
896 case TYPE_CODE_FLT:
897 {
898 int len = TYPE_LENGTH (type);
899 return (len == 4 || len == 8 || len == 16);
900 }
901 default:
902 break;
903 }
904
905 return 0;
906}
2f690297 907
1218e655
RC
908/* If CODE points to a function entry address, try to look up the corresponding
909 function descriptor and return its address instead. If CODE is not a
910 function entry address, then just return it unchanged. */
911static CORE_ADDR
e17a4113 912hppa64_convert_code_addr_to_fptr (struct gdbarch *gdbarch, CORE_ADDR code)
1218e655 913{
e17a4113 914 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1218e655
RC
915 struct obj_section *sec, *opd;
916
917 sec = find_pc_section (code);
918
919 if (!sec)
920 return code;
921
922 /* If CODE is in a data section, assume it's already a fptr. */
923 if (!(sec->the_bfd_section->flags & SEC_CODE))
924 return code;
925
926 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
927 {
928 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
aded6f54 929 break;
1218e655
RC
930 }
931
932 if (opd < sec->objfile->sections_end)
933 {
0c1bcd23 934 for (CORE_ADDR addr = opd->addr (); addr < opd->endaddr (); addr += 2 * 8)
aded6f54 935 {
1218e655 936 ULONGEST opdaddr;
948f8e3d 937 gdb_byte tmp[8];
1218e655
RC
938
939 if (target_read_memory (addr, tmp, sizeof (tmp)))
940 break;
e17a4113 941 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp), byte_order);
1218e655 942
aded6f54 943 if (opdaddr == code)
1218e655
RC
944 return addr - 16;
945 }
946 }
947
948 return code;
949}
950
4a302917 951static CORE_ADDR
7d9b040b 952hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
953 struct regcache *regcache, CORE_ADDR bp_addr,
954 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
955 function_call_return_method return_method,
956 CORE_ADDR struct_addr)
2f690297 957{
08106042 958 hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch);
e17a4113 959 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
38ca4e0c
MK
960 int i, offset = 0;
961 CORE_ADDR gp;
2f690297 962
38ca4e0c
MK
963 /* "The outgoing parameter area [...] must be aligned at a 16-byte
964 boundary." */
965 sp = align_up (sp, 16);
2f690297 966
38ca4e0c
MK
967 for (i = 0; i < nargs; i++)
968 {
969 struct value *arg = args[i];
970 struct type *type = value_type (arg);
971 int len = TYPE_LENGTH (type);
0fd88904 972 const bfd_byte *valbuf;
1218e655 973 bfd_byte fptrbuf[8];
38ca4e0c 974 int regnum;
2f690297 975
38ca4e0c
MK
976 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
977 offset = align_up (offset, 8);
77d18ded 978
38ca4e0c 979 if (hppa64_integral_or_pointer_p (type))
2f690297 980 {
38ca4e0c 981 /* "Integral scalar parameters smaller than 64 bits are
dda83cd7
SM
982 padded on the left (i.e., the value is in the
983 least-significant bits of the 64-bit storage unit, and
984 the high-order bits are undefined)." Therefore we can
985 safely sign-extend them. */
38ca4e0c 986 if (len < 8)
449e1137 987 {
df4df182 988 arg = value_cast (builtin_type (gdbarch)->builtin_int64, arg);
38ca4e0c
MK
989 len = 8;
990 }
991 }
992 else if (hppa64_floating_p (type))
993 {
994 if (len > 8)
995 {
996 /* "Quad-precision (128-bit) floating-point scalar
997 parameters are aligned on a 16-byte boundary." */
998 offset = align_up (offset, 16);
999
1000 /* "Double-extended- and quad-precision floating-point
dda83cd7
SM
1001 parameters within the first 64 bytes of the parameter
1002 list are always passed in general registers." */
449e1137
AC
1003 }
1004 else
1005 {
38ca4e0c 1006 if (len == 4)
449e1137 1007 {
38ca4e0c
MK
1008 /* "Single-precision (32-bit) floating-point scalar
1009 parameters are padded on the left with 32 bits of
1010 garbage (i.e., the floating-point value is in the
1011 least-significant 32 bits of a 64-bit storage
1012 unit)." */
1013 offset += 4;
449e1137 1014 }
38ca4e0c
MK
1015
1016 /* "Single- and double-precision floating-point
dda83cd7
SM
1017 parameters in this area are passed according to the
1018 available formal parameter information in a function
1019 prototype. [...] If no prototype is in scope,
1020 floating-point parameters must be passed both in the
1021 corresponding general registers and in the
1022 corresponding floating-point registers." */
38ca4e0c
MK
1023 regnum = HPPA64_FP4_REGNUM + offset / 8;
1024
1025 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1026 {
38ca4e0c
MK
1027 /* "Single-precision floating-point parameters, when
1028 passed in floating-point registers, are passed in
1029 the right halves of the floating point registers;
1030 the left halves are unused." */
e4c4a59b 1031 regcache->cooked_write_part (regnum, offset % 8, len,
50888e42 1032 value_contents (arg).data ());
449e1137
AC
1033 }
1034 }
2f690297 1035 }
38ca4e0c 1036 else
2f690297 1037 {
38ca4e0c
MK
1038 if (len > 8)
1039 {
1040 /* "Aggregates larger than 8 bytes are aligned on a
1041 16-byte boundary, possibly leaving an unused argument
1777feb0 1042 slot, which is filled with garbage. If necessary,
38ca4e0c
MK
1043 they are padded on the right (with garbage), to a
1044 multiple of 8 bytes." */
1045 offset = align_up (offset, 16);
1046 }
1047 }
1048
1218e655 1049 /* If we are passing a function pointer, make sure we pass a function
dda83cd7 1050 descriptor instead of the function entry address. */
78134374 1051 if (type->code () == TYPE_CODE_PTR
dda83cd7
SM
1052 && TYPE_TARGET_TYPE (type)->code () == TYPE_CODE_FUNC)
1053 {
1218e655
RC
1054 ULONGEST codeptr, fptr;
1055
50888e42 1056 codeptr = unpack_long (type, value_contents (arg).data ());
e17a4113
UW
1057 fptr = hppa64_convert_code_addr_to_fptr (gdbarch, codeptr);
1058 store_unsigned_integer (fptrbuf, TYPE_LENGTH (type), byte_order,
1059 fptr);
1218e655
RC
1060 valbuf = fptrbuf;
1061 }
1062 else
dda83cd7 1063 {
50888e42 1064 valbuf = value_contents (arg).data ();
1218e655
RC
1065 }
1066
38ca4e0c 1067 /* Always store the argument in memory. */
1218e655 1068 write_memory (sp + offset, valbuf, len);
38ca4e0c 1069
38ca4e0c
MK
1070 regnum = HPPA_ARG0_REGNUM - offset / 8;
1071 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1072 {
e4c4a59b
SM
1073 regcache->cooked_write_part (regnum, offset % 8, std::min (len, 8),
1074 valbuf);
325fac50
PA
1075 offset += std::min (len, 8);
1076 valbuf += std::min (len, 8);
1077 len -= std::min (len, 8);
38ca4e0c 1078 regnum--;
2f690297 1079 }
38ca4e0c
MK
1080
1081 offset += len;
2f690297
AC
1082 }
1083
38ca4e0c
MK
1084 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1085 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1086
1087 /* Allocate the outgoing parameter area. Make sure the outgoing
1088 parameter area is multiple of 16 bytes in length. */
325fac50 1089 sp += std::max (align_up (offset, 16), (ULONGEST) 64);
38ca4e0c
MK
1090
1091 /* Allocate 32-bytes of scratch space. The documentation doesn't
1092 mention this, but it seems to be needed. */
1093 sp += 32;
1094
1095 /* Allocate the frame marker area. */
1096 sp += 16;
1097
1098 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1099 its address. */
cf84fa6b 1100 if (return_method == return_method_struct)
38ca4e0c 1101 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1102
38ca4e0c 1103 /* Set up GR27 (%dp) to hold the global pointer (gp). */
e38c262f 1104 gp = tdep->find_global_pointer (gdbarch, function);
77d18ded 1105 if (gp != 0)
38ca4e0c 1106 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1107
38ca4e0c 1108 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1109 if (!gdbarch_push_dummy_code_p (gdbarch))
1110 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1111
38ca4e0c
MK
1112 /* Set up GR30 to hold the stack pointer (sp). */
1113 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1114
38ca4e0c 1115 return sp;
2f690297 1116}
38ca4e0c 1117\f
2f690297 1118
08a27113
MK
1119/* Handle 32/64-bit struct return conventions. */
1120
1121static enum return_value_convention
6a3a010b 1122hppa32_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1123 struct type *type, struct regcache *regcache,
e127f0db 1124 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1125{
1126 if (TYPE_LENGTH (type) <= 2 * 4)
1127 {
1128 /* The value always lives in the right hand end of the register
1129 (or register pair)? */
1130 int b;
78134374 1131 int reg = type->code () == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
08a27113
MK
1132 int part = TYPE_LENGTH (type) % 4;
1133 /* The left hand register contains only part of the value,
1134 transfer that first so that the rest can be xfered as entire
1135 4-byte registers. */
1136 if (part > 0)
1137 {
1138 if (readbuf != NULL)
73bb0000 1139 regcache->cooked_read_part (reg, 4 - part, part, readbuf);
08a27113 1140 if (writebuf != NULL)
e4c4a59b 1141 regcache->cooked_write_part (reg, 4 - part, part, writebuf);
08a27113
MK
1142 reg++;
1143 }
1144 /* Now transfer the remaining register values. */
1145 for (b = part; b < TYPE_LENGTH (type); b += 4)
1146 {
1147 if (readbuf != NULL)
dca08e1f 1148 regcache->cooked_read (reg, readbuf + b);
08a27113 1149 if (writebuf != NULL)
b66f5587 1150 regcache->cooked_write (reg, writebuf + b);
08a27113
MK
1151 reg++;
1152 }
1153 return RETURN_VALUE_REGISTER_CONVENTION;
1154 }
1155 else
1156 return RETURN_VALUE_STRUCT_CONVENTION;
1157}
1158
1159static enum return_value_convention
6a3a010b 1160hppa64_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1161 struct type *type, struct regcache *regcache,
e127f0db 1162 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1163{
1164 int len = TYPE_LENGTH (type);
1165 int regnum, offset;
1166
bad43aa5 1167 if (len > 16)
08a27113 1168 {
85102364 1169 /* All return values larger than 128 bits must be aggregate
dda83cd7 1170 return values. */
9738b034
MK
1171 gdb_assert (!hppa64_integral_or_pointer_p (type));
1172 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1173
1174 /* "Aggregate return values larger than 128 bits are returned in
1175 a buffer allocated by the caller. The address of the buffer
1176 must be passed in GR 28." */
1177 return RETURN_VALUE_STRUCT_CONVENTION;
1178 }
1179
1180 if (hppa64_integral_or_pointer_p (type))
1181 {
1182 /* "Integral return values are returned in GR 28. Values
dda83cd7 1183 smaller than 64 bits are padded on the left (with garbage)." */
08a27113
MK
1184 regnum = HPPA_RET0_REGNUM;
1185 offset = 8 - len;
1186 }
1187 else if (hppa64_floating_p (type))
1188 {
1189 if (len > 8)
1190 {
1191 /* "Double-extended- and quad-precision floating-point
1192 values are returned in GRs 28 and 29. The sign,
1193 exponent, and most-significant bits of the mantissa are
1194 returned in GR 28; the least-significant bits of the
1195 mantissa are passed in GR 29. For double-extended
1196 precision values, GR 29 is padded on the right with 48
1197 bits of garbage." */
1198 regnum = HPPA_RET0_REGNUM;
1199 offset = 0;
1200 }
1201 else
1202 {
1203 /* "Single-precision and double-precision floating-point
1204 return values are returned in FR 4R (single precision) or
1205 FR 4 (double-precision)." */
1206 regnum = HPPA64_FP4_REGNUM;
1207 offset = 8 - len;
1208 }
1209 }
1210 else
1211 {
1212 /* "Aggregate return values up to 64 bits in size are returned
dda83cd7
SM
1213 in GR 28. Aggregates smaller than 64 bits are left aligned
1214 in the register; the pad bits on the right are undefined."
08a27113
MK
1215
1216 "Aggregate return values between 65 and 128 bits are returned
1217 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1218 the remaining bits are placed, left aligned, in GR 29. The
1219 pad bits on the right of GR 29 (if any) are undefined." */
1220 regnum = HPPA_RET0_REGNUM;
1221 offset = 0;
1222 }
1223
1224 if (readbuf)
1225 {
08a27113
MK
1226 while (len > 0)
1227 {
73bb0000
SM
1228 regcache->cooked_read_part (regnum, offset, std::min (len, 8),
1229 readbuf);
325fac50
PA
1230 readbuf += std::min (len, 8);
1231 len -= std::min (len, 8);
08a27113
MK
1232 regnum++;
1233 }
1234 }
1235
1236 if (writebuf)
1237 {
08a27113
MK
1238 while (len > 0)
1239 {
e4c4a59b
SM
1240 regcache->cooked_write_part (regnum, offset, std::min (len, 8),
1241 writebuf);
325fac50
PA
1242 writebuf += std::min (len, 8);
1243 len -= std::min (len, 8);
08a27113
MK
1244 regnum++;
1245 }
1246 }
1247
1248 return RETURN_VALUE_REGISTER_CONVENTION;
1249}
1250\f
1251
d49771ef 1252static CORE_ADDR
a7aad9aa 1253hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1254 struct target_ops *targ)
1255{
1256 if (addr & 2)
1257 {
0dfff4cb 1258 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
a7aad9aa 1259 CORE_ADDR plabel = addr & ~3;
0dfff4cb 1260 return read_memory_typed_address (plabel, func_ptr_type);
d49771ef
RC
1261 }
1262
1263 return addr;
1264}
1265
1797a8f6
AC
1266static CORE_ADDR
1267hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1268{
1269 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1270 and not _bit_)! */
1271 return align_up (addr, 64);
1272}
1273
2f690297
AC
1274/* Force all frames to 16-byte alignment. Better safe than sorry. */
1275
1276static CORE_ADDR
1797a8f6 1277hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1278{
1279 /* Just always 16-byte align. */
1280 return align_up (addr, 16);
1281}
1282
cb8c24b6 1283static CORE_ADDR
c113ed0c 1284hppa_read_pc (readable_regcache *regcache)
c906108c 1285{
cc72850f 1286 ULONGEST ipsw;
61a1198a 1287 ULONGEST pc;
c906108c 1288
c113ed0c
YQ
1289 regcache->cooked_read (HPPA_IPSW_REGNUM, &ipsw);
1290 regcache->cooked_read (HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1291
1292 /* If the current instruction is nullified, then we are effectively
1293 still executing the previous instruction. Pretend we are still
cc72850f
MK
1294 there. This is needed when single stepping; if the nullified
1295 instruction is on a different line, we don't want GDB to think
1296 we've stepped onto that line. */
fe46cd3a
RC
1297 if (ipsw & 0x00200000)
1298 pc -= 4;
1299
cc72850f 1300 return pc & ~0x3;
c906108c
SS
1301}
1302
cc72850f 1303void
61a1198a 1304hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1305{
61a1198a
UW
1306 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1307 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1308}
1309
c906108c 1310/* For the given instruction (INST), return any adjustment it makes
1777feb0 1311 to the stack pointer or zero for no adjustment.
c906108c
SS
1312
1313 This only handles instructions commonly found in prologues. */
1314
1315static int
fba45db2 1316prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1317{
1318 /* This must persist across calls. */
1319 static int save_high21;
1320
1321 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1322 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1323 return hppa_extract_14 (inst);
c906108c
SS
1324
1325 /* stwm X,D(sp) */
1326 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1327 return hppa_extract_14 (inst);
c906108c 1328
104c1213
JM
1329 /* std,ma X,D(sp) */
1330 if ((inst & 0xffe00008) == 0x73c00008)
66c6502d 1331 return (inst & 0x1 ? -(1 << 13) : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1332
e22b26cb 1333 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1334 save high bits in save_high21 for later use. */
e22b26cb 1335 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1336 {
abc485a1 1337 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1338 return 0;
1339 }
1340
1341 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1342 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1343
1344 /* fstws as used by the HP compilers. */
1345 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1346 return hppa_extract_5_load (inst);
c906108c
SS
1347
1348 /* No adjustment. */
1349 return 0;
1350}
1351
1352/* Return nonzero if INST is a branch of some kind, else return zero. */
1353
1354static int
fba45db2 1355is_branch (unsigned long inst)
c906108c
SS
1356{
1357 switch (inst >> 26)
1358 {
1359 case 0x20:
1360 case 0x21:
1361 case 0x22:
1362 case 0x23:
7be570e7 1363 case 0x27:
c906108c
SS
1364 case 0x28:
1365 case 0x29:
1366 case 0x2a:
1367 case 0x2b:
7be570e7 1368 case 0x2f:
c906108c
SS
1369 case 0x30:
1370 case 0x31:
1371 case 0x32:
1372 case 0x33:
1373 case 0x38:
1374 case 0x39:
1375 case 0x3a:
7be570e7 1376 case 0x3b:
c906108c
SS
1377 return 1;
1378
1379 default:
1380 return 0;
1381 }
1382}
1383
1384/* Return the register number for a GR which is saved by INST or
b35018fd 1385 zero if INST does not save a GR.
c906108c 1386
b35018fd 1387 Referenced from:
7be570e7 1388
b35018fd
CG
1389 parisc 1.1:
1390 https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf
c906108c 1391
b35018fd
CG
1392 parisc 2.0:
1393 https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf
c906108c 1394
b35018fd
CG
1395 According to Table 6-5 of Chapter 6 (Memory Reference Instructions)
1396 on page 106 in parisc 2.0, all instructions for storing values from
1397 the general registers are:
c5aa993b 1398
b35018fd 1399 Store: stb, sth, stw, std (according to Chapter 7, they
dda83cd7 1400 are only in both "inst >> 26" and "inst >> 6".
b35018fd 1401 Store Absolute: stwa, stda (according to Chapter 7, they are only
dda83cd7 1402 in "inst >> 6".
b35018fd 1403 Store Bytes: stby, stdby (according to Chapter 7, they are
dda83cd7 1404 only in "inst >> 6").
b35018fd
CG
1405
1406 For (inst >> 26), according to Chapter 7:
1407
1408 The effective memory reference address is formed by the addition
1409 of an immediate displacement to a base value.
1410
1411 - stb: 0x18, store a byte from a general register.
1412
1413 - sth: 0x19, store a halfword from a general register.
1414
1415 - stw: 0x1a, store a word from a general register.
1416
1417 - stwm: 0x1b, store a word from a general register and perform base
85102364 1418 register modification (2.0 will still treat it as stw).
b35018fd
CG
1419
1420 - std: 0x1c, store a doubleword from a general register (2.0 only).
1421
1422 - stw: 0x1f, store a word from a general register (2.0 only).
1423
1424 For (inst >> 6) when ((inst >> 26) == 0x03), according to Chapter 7:
1425
1426 The effective memory reference address is formed by the addition
1427 of an index value to a base value specified in the instruction.
1428
1429 - stb: 0x08, store a byte from a general register (1.1 calls stbs).
1430
1431 - sth: 0x09, store a halfword from a general register (1.1 calls
1432 sths).
1433
1434 - stw: 0x0a, store a word from a general register (1.1 calls stws).
1435
1436 - std: 0x0b: store a doubleword from a general register (2.0 only)
1437
1438 Implement fast byte moves (stores) to unaligned word or doubleword
1439 destination.
1440
1441 - stby: 0x0c, for unaligned word (1.1 calls stbys).
1442
1443 - stdby: 0x0d for unaligned doubleword (2.0 only).
1444
1445 Store a word or doubleword using an absolute memory address formed
1446 using short or long displacement or indexed
1447
1448 - stwa: 0x0e, store a word from a general register to an absolute
1449 address (1.0 calls stwas).
1450
1451 - stda: 0x0f, store a doubleword from a general register to an
1452 absolute address (2.0 only). */
1453
1454static int
1455inst_saves_gr (unsigned long inst)
1456{
1457 switch ((inst >> 26) & 0x0f)
1458 {
1459 case 0x03:
1460 switch ((inst >> 6) & 0x0f)
1461 {
1462 case 0x08:
1463 case 0x09:
1464 case 0x0a:
1465 case 0x0b:
1466 case 0x0c:
1467 case 0x0d:
1468 case 0x0e:
1469 case 0x0f:
1470 return hppa_extract_5R_store (inst);
1471 default:
1472 return 0;
1473 }
1474 case 0x18:
1475 case 0x19:
1476 case 0x1a:
1477 case 0x1b:
1478 case 0x1c:
1479 /* no 0x1d or 0x1e -- according to parisc 2.0 document */
1480 case 0x1f:
1481 return hppa_extract_5R_store (inst);
1482 default:
1483 return 0;
1484 }
c906108c
SS
1485}
1486
1487/* Return the register number for a FR which is saved by INST or
1488 zero it INST does not save a FR.
1489
1490 Note we only care about full 64bit register stores (that's the only
1491 kind of stores the prologue will use).
1492
1493 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1494
1495static int
fba45db2 1496inst_saves_fr (unsigned long inst)
c906108c 1497{
1777feb0 1498 /* Is this an FSTD? */
c906108c 1499 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1500 return hppa_extract_5r_store (inst);
7be570e7 1501 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1502 return hppa_extract_5R_store (inst);
1777feb0 1503 /* Is this an FSTW? */
c906108c 1504 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1505 return hppa_extract_5r_store (inst);
7be570e7 1506 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1507 return hppa_extract_5R_store (inst);
c906108c
SS
1508 return 0;
1509}
1510
1511/* Advance PC across any function entry prologue instructions
1777feb0 1512 to reach some "real" code.
c906108c
SS
1513
1514 Use information in the unwind table to determine what exactly should
1515 be in the prologue. */
1516
1517
a71f8c30 1518static CORE_ADDR
be8626e0
MD
1519skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc,
1520 int stop_before_branch)
c906108c 1521{
e17a4113 1522 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
e362b510 1523 gdb_byte buf[4];
c906108c
SS
1524 CORE_ADDR orig_pc = pc;
1525 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1526 unsigned long args_stored, status, i, restart_gr, restart_fr;
1527 struct unwind_table_entry *u;
a71f8c30 1528 int final_iteration;
c906108c
SS
1529
1530 restart_gr = 0;
1531 restart_fr = 0;
1532
1533restart:
1534 u = find_unwind_entry (pc);
1535 if (!u)
1536 return pc;
1537
1777feb0 1538 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1539 if ((pc & ~0x3) != u->region_start)
1540 return pc;
1541
1542 /* This is how much of a frame adjustment we need to account for. */
1543 stack_remaining = u->Total_frame_size << 3;
1544
1545 /* Magic register saves we want to know about. */
1546 save_rp = u->Save_RP;
1547 save_sp = u->Save_SP;
1548
1549 /* An indication that args may be stored into the stack. Unfortunately
1550 the HPUX compilers tend to set this in cases where no args were
1551 stored too!. */
1552 args_stored = 1;
1553
1554 /* Turn the Entry_GR field into a bitmask. */
1555 save_gr = 0;
1556 for (i = 3; i < u->Entry_GR + 3; i++)
1557 {
1558 /* Frame pointer gets saved into a special location. */
eded0a31 1559 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1560 continue;
1561
1562 save_gr |= (1 << i);
1563 }
1564 save_gr &= ~restart_gr;
1565
1566 /* Turn the Entry_FR field into a bitmask too. */
1567 save_fr = 0;
1568 for (i = 12; i < u->Entry_FR + 12; i++)
1569 save_fr |= (1 << i);
1570 save_fr &= ~restart_fr;
1571
a71f8c30
RC
1572 final_iteration = 0;
1573
c906108c
SS
1574 /* Loop until we find everything of interest or hit a branch.
1575
1576 For unoptimized GCC code and for any HP CC code this will never ever
1577 examine any user instructions.
1578
85102364 1579 For optimized GCC code we're faced with problems. GCC will schedule
c906108c
SS
1580 its prologue and make prologue instructions available for delay slot
1581 filling. The end result is user code gets mixed in with the prologue
1582 and a prologue instruction may be in the delay slot of the first branch
1583 or call.
1584
1585 Some unexpected things are expected with debugging optimized code, so
1586 we allow this routine to walk past user instructions in optimized
1587 GCC code. */
1588 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1589 || args_stored)
1590 {
1591 unsigned int reg_num;
1592 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1593 unsigned long old_save_rp, old_save_sp, next_inst;
1594
1595 /* Save copies of all the triggers so we can compare them later
dda83cd7 1596 (only for HPC). */
c906108c
SS
1597 old_save_gr = save_gr;
1598 old_save_fr = save_fr;
1599 old_save_rp = save_rp;
1600 old_save_sp = save_sp;
1601 old_stack_remaining = stack_remaining;
1602
8defab1a 1603 status = target_read_memory (pc, buf, 4);
e17a4113 1604 inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1605
c906108c
SS
1606 /* Yow! */
1607 if (status != 0)
1608 return pc;
1609
1610 /* Note the interesting effects of this instruction. */
1611 stack_remaining -= prologue_inst_adjust_sp (inst);
1612
7be570e7
JM
1613 /* There are limited ways to store the return pointer into the
1614 stack. */
c4c79048 1615 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1616 save_rp = 0;
1617
104c1213 1618 /* These are the only ways we save SP into the stack. At this time
dda83cd7 1619 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1620 if ((inst & 0xffffc000) == 0x6fc10000
1621 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1622 save_sp = 0;
1623
6426a772 1624 /* Are we loading some register with an offset from the argument
dda83cd7 1625 pointer? */
6426a772
JM
1626 if ((inst & 0xffe00000) == 0x37a00000
1627 || (inst & 0xffffffe0) == 0x081d0240)
1628 {
1629 pc += 4;
1630 continue;
1631 }
1632
c906108c
SS
1633 /* Account for general and floating-point register saves. */
1634 reg_num = inst_saves_gr (inst);
1635 save_gr &= ~(1 << reg_num);
1636
1637 /* Ugh. Also account for argument stores into the stack.
dda83cd7
SM
1638 Unfortunately args_stored only tells us that some arguments
1639 where stored into the stack. Not how many or what kind!
c906108c 1640
dda83cd7
SM
1641 This is a kludge as on the HP compiler sets this bit and it
1642 never does prologue scheduling. So once we see one, skip past
1643 all of them. We have similar code for the fp arg stores below.
c906108c 1644
dda83cd7
SM
1645 FIXME. Can still die if we have a mix of GR and FR argument
1646 stores! */
be8626e0 1647 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1648 && reg_num <= 26)
c906108c 1649 {
be8626e0 1650 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1651 && reg_num <= 26)
c906108c
SS
1652 {
1653 pc += 4;
8defab1a 1654 status = target_read_memory (pc, buf, 4);
e17a4113 1655 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1656 if (status != 0)
1657 return pc;
1658 reg_num = inst_saves_gr (inst);
1659 }
1660 args_stored = 0;
1661 continue;
1662 }
1663
1664 reg_num = inst_saves_fr (inst);
1665 save_fr &= ~(1 << reg_num);
1666
8defab1a 1667 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1668 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1669
c906108c
SS
1670 /* Yow! */
1671 if (status != 0)
1672 return pc;
1673
1674 /* We've got to be read to handle the ldo before the fp register
dda83cd7 1675 save. */
c906108c
SS
1676 if ((inst & 0xfc000000) == 0x34000000
1677 && inst_saves_fr (next_inst) >= 4
819844ad 1678 && inst_saves_fr (next_inst)
be8626e0 1679 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1680 {
1681 /* So we drop into the code below in a reasonable state. */
1682 reg_num = inst_saves_fr (next_inst);
1683 pc -= 4;
1684 }
1685
1686 /* Ugh. Also account for argument stores into the stack.
dda83cd7
SM
1687 This is a kludge as on the HP compiler sets this bit and it
1688 never does prologue scheduling. So once we see one, skip past
1689 all of them. */
819844ad 1690 if (reg_num >= 4
be8626e0 1691 && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c 1692 {
819844ad
UW
1693 while (reg_num >= 4
1694 && reg_num
be8626e0 1695 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1696 {
1697 pc += 8;
8defab1a 1698 status = target_read_memory (pc, buf, 4);
e17a4113 1699 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1700 if (status != 0)
1701 return pc;
1702 if ((inst & 0xfc000000) != 0x34000000)
1703 break;
8defab1a 1704 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1705 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1706 if (status != 0)
1707 return pc;
1708 reg_num = inst_saves_fr (next_inst);
1709 }
1710 args_stored = 0;
1711 continue;
1712 }
1713
1714 /* Quit if we hit any kind of branch. This can happen if a prologue
dda83cd7 1715 instruction is in the delay slot of the first call/branch. */
a71f8c30 1716 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1717 break;
1718
1719 /* What a crock. The HP compilers set args_stored even if no
dda83cd7
SM
1720 arguments were stored into the stack (boo hiss). This could
1721 cause this code to then skip a bunch of user insns (up to the
1722 first branch).
1723
1724 To combat this we try to identify when args_stored was bogusly
1725 set and clear it. We only do this when args_stored is nonzero,
1726 all other resources are accounted for, and nothing changed on
1727 this pass. */
c906108c 1728 if (args_stored
c5aa993b 1729 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1730 && old_save_gr == save_gr && old_save_fr == save_fr
1731 && old_save_rp == save_rp && old_save_sp == save_sp
1732 && old_stack_remaining == stack_remaining)
1733 break;
c5aa993b 1734
c906108c
SS
1735 /* Bump the PC. */
1736 pc += 4;
a71f8c30
RC
1737
1738 /* !stop_before_branch, so also look at the insn in the delay slot
dda83cd7 1739 of the branch. */
a71f8c30
RC
1740 if (final_iteration)
1741 break;
1742 if (is_branch (inst))
1743 final_iteration = 1;
c906108c
SS
1744 }
1745
85102364 1746 /* We've got a tentative location for the end of the prologue. However
c906108c
SS
1747 because of limitations in the unwind descriptor mechanism we may
1748 have went too far into user code looking for the save of a register
1749 that does not exist. So, if there registers we expected to be saved
1750 but never were, mask them out and restart.
1751
1752 This should only happen in optimized code, and should be very rare. */
c5aa993b 1753 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1754 {
1755 pc = orig_pc;
1756 restart_gr = save_gr;
1757 restart_fr = save_fr;
1758 goto restart;
1759 }
1760
1761 return pc;
1762}
1763
1764
7be570e7
JM
1765/* Return the address of the PC after the last prologue instruction if
1766 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1767
1768static CORE_ADDR
fba45db2 1769after_prologue (CORE_ADDR pc)
c906108c
SS
1770{
1771 struct symtab_and_line sal;
1772 CORE_ADDR func_addr, func_end;
c906108c 1773
7be570e7
JM
1774 /* If we can not find the symbol in the partial symbol table, then
1775 there is no hope we can determine the function's start address
1776 with this code. */
c906108c 1777 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1778 return 0;
c906108c 1779
7be570e7 1780 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1781 sal = find_pc_line (func_addr, 0);
1782
7be570e7
JM
1783 /* There are only two cases to consider. First, the end of the source line
1784 is within the function bounds. In that case we return the end of the
1785 source line. Second is the end of the source line extends beyond the
1786 bounds of the current function. We need to use the slow code to
1777feb0 1787 examine instructions in that case.
c906108c 1788
7be570e7
JM
1789 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1790 the wrong thing to do. In fact, it should be entirely possible for this
1791 function to always return zero since the slow instruction scanning code
1792 is supposed to *always* work. If it does not, then it is a bug. */
1793 if (sal.end < func_end)
1794 return sal.end;
c5aa993b 1795 else
7be570e7 1796 return 0;
c906108c
SS
1797}
1798
1799/* To skip prologues, I use this predicate. Returns either PC itself
1800 if the code at PC does not look like a function prologue; otherwise
1777feb0 1801 returns an address that (if we're lucky) follows the prologue.
a71f8c30
RC
1802
1803 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1777feb0 1804 It doesn't necessarily skips all the insns in the prologue. In fact
a71f8c30
RC
1805 we might not want to skip all the insns because a prologue insn may
1806 appear in the delay slot of the first branch, and we don't want to
1807 skip over the branch in that case. */
c906108c 1808
8d153463 1809static CORE_ADDR
6093d2eb 1810hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
c906108c 1811{
c5aa993b 1812 CORE_ADDR post_prologue_pc;
c906108c 1813
c5aa993b
JM
1814 /* See if we can determine the end of the prologue via the symbol table.
1815 If so, then return either PC, or the PC after the prologue, whichever
1816 is greater. */
c906108c 1817
c5aa993b 1818 post_prologue_pc = after_prologue (pc);
c906108c 1819
7be570e7
JM
1820 /* If after_prologue returned a useful address, then use it. Else
1821 fall back on the instruction skipping code.
1822
1823 Some folks have claimed this causes problems because the breakpoint
1824 may be the first instruction of the prologue. If that happens, then
1825 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b 1826 if (post_prologue_pc != 0)
325fac50 1827 return std::max (pc, post_prologue_pc);
c5aa993b 1828 else
be8626e0 1829 return (skip_prologue_hard_way (gdbarch, pc, 1));
c906108c
SS
1830}
1831
29d375ac 1832/* Return an unwind entry that falls within the frame's code block. */
227e86ad 1833
29d375ac 1834static struct unwind_table_entry *
227e86ad 1835hppa_find_unwind_entry_in_block (struct frame_info *this_frame)
29d375ac 1836{
227e86ad 1837 CORE_ADDR pc = get_frame_address_in_block (this_frame);
93d42b30
DJ
1838
1839 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
ad1193e7 1840 result of get_frame_address_in_block implies a problem.
93d42b30 1841 The bits should have been removed earlier, before the return
c7ce8faa 1842 value of gdbarch_unwind_pc. That might be happening already;
93d42b30
DJ
1843 if it isn't, it should be fixed. Then this call can be
1844 removed. */
227e86ad 1845 pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc);
29d375ac
RC
1846 return find_unwind_entry (pc);
1847}
1848
26d08f08
AC
1849struct hppa_frame_cache
1850{
1851 CORE_ADDR base;
098caef4 1852 trad_frame_saved_reg *saved_regs;
26d08f08
AC
1853};
1854
1855static struct hppa_frame_cache *
227e86ad 1856hppa_frame_cache (struct frame_info *this_frame, void **this_cache)
26d08f08 1857{
227e86ad 1858 struct gdbarch *gdbarch = get_frame_arch (this_frame);
e17a4113
UW
1859 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1860 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
26d08f08
AC
1861 struct hppa_frame_cache *cache;
1862 long saved_gr_mask;
1863 long saved_fr_mask;
26d08f08
AC
1864 long frame_size;
1865 struct unwind_table_entry *u;
9f7194c3 1866 CORE_ADDR prologue_end;
50b2f48a 1867 int fp_in_r1 = 0;
26d08f08
AC
1868 int i;
1869
369aa520 1870 if (hppa_debug)
6cb06a8c
TT
1871 gdb_printf (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
1872 frame_relative_level(this_frame));
369aa520 1873
26d08f08 1874 if ((*this_cache) != NULL)
369aa520
RC
1875 {
1876 if (hppa_debug)
6cb06a8c
TT
1877 gdb_printf (gdb_stdlog, "base=%s (cached) }",
1878 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 1879 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1880 }
26d08f08
AC
1881 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1882 (*this_cache) = cache;
227e86ad 1883 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
26d08f08
AC
1884
1885 /* Yow! */
227e86ad 1886 u = hppa_find_unwind_entry_in_block (this_frame);
26d08f08 1887 if (!u)
369aa520
RC
1888 {
1889 if (hppa_debug)
6cb06a8c 1890 gdb_printf (gdb_stdlog, "base=NULL (no unwind entry) }");
9a3c8263 1891 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1892 }
26d08f08
AC
1893
1894 /* Turn the Entry_GR field into a bitmask. */
1895 saved_gr_mask = 0;
1896 for (i = 3; i < u->Entry_GR + 3; i++)
1897 {
1898 /* Frame pointer gets saved into a special location. */
eded0a31 1899 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1900 continue;
1901
1902 saved_gr_mask |= (1 << i);
1903 }
1904
1905 /* Turn the Entry_FR field into a bitmask too. */
1906 saved_fr_mask = 0;
1907 for (i = 12; i < u->Entry_FR + 12; i++)
1908 saved_fr_mask |= (1 << i);
1909
1910 /* Loop until we find everything of interest or hit a branch.
1911
1912 For unoptimized GCC code and for any HP CC code this will never ever
1913 examine any user instructions.
1914
1915 For optimized GCC code we're faced with problems. GCC will schedule
1916 its prologue and make prologue instructions available for delay slot
1917 filling. The end result is user code gets mixed in with the prologue
1918 and a prologue instruction may be in the delay slot of the first branch
1919 or call.
1920
1921 Some unexpected things are expected with debugging optimized code, so
1922 we allow this routine to walk past user instructions in optimized
1923 GCC code. */
1924 {
1925 int final_iteration = 0;
46acf081 1926 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1927 int looking_for_sp = u->Save_SP;
1928 int looking_for_rp = u->Save_RP;
1929 int fp_loc = -1;
9f7194c3 1930
a71f8c30 1931 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1932 skip_prologue_using_sal, in case we stepped into a function without
1933 symbol information. hppa_skip_prologue also bounds the returned
1934 pc by the passed in pc, so it will not return a pc in the next
1777feb0 1935 function.
a71f8c30
RC
1936
1937 We used to call hppa_skip_prologue to find the end of the prologue,
1938 but if some non-prologue instructions get scheduled into the prologue,
1939 and the program is compiled with debug information, the "easy" way
1940 in hppa_skip_prologue will return a prologue end that is too early
1941 for us to notice any potential frame adjustments. */
d5c27f81 1942
ef02daa9
DJ
1943 /* We used to use get_frame_func to locate the beginning of the
1944 function to pass to skip_prologue. However, when objects are
1945 compiled without debug symbols, get_frame_func can return the wrong
1777feb0 1946 function (or 0). We can do better than that by using unwind records.
46acf081 1947 This only works if the Region_description of the unwind record
1777feb0 1948 indicates that it includes the entry point of the function.
46acf081
RC
1949 HP compilers sometimes generate unwind records for regions that
1950 do not include the entry or exit point of a function. GNU tools
1951 do not do this. */
1952
1953 if ((u->Region_description & 0x2) == 0)
1954 start_pc = u->region_start;
1955 else
227e86ad 1956 start_pc = get_frame_func (this_frame);
d5c27f81 1957
be8626e0 1958 prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0);
227e86ad 1959 end_pc = get_frame_pc (this_frame);
9f7194c3
RC
1960
1961 if (prologue_end != 0 && end_pc > prologue_end)
1962 end_pc = prologue_end;
1963
26d08f08 1964 frame_size = 0;
9f7194c3 1965
46acf081 1966 for (pc = start_pc;
26d08f08
AC
1967 ((saved_gr_mask || saved_fr_mask
1968 || looking_for_sp || looking_for_rp
1969 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1970 && pc < end_pc);
26d08f08
AC
1971 pc += 4)
1972 {
1973 int reg;
e362b510 1974 gdb_byte buf4[4];
4a302917
RC
1975 long inst;
1976
bdec2917 1977 if (!safe_frame_unwind_memory (this_frame, pc, buf4))
4a302917 1978 {
5af949e3
UW
1979 error (_("Cannot read instruction at %s."),
1980 paddress (gdbarch, pc));
9a3c8263 1981 return (struct hppa_frame_cache *) (*this_cache);
4a302917
RC
1982 }
1983
e17a4113 1984 inst = extract_unsigned_integer (buf4, sizeof buf4, byte_order);
9f7194c3 1985
26d08f08
AC
1986 /* Note the interesting effects of this instruction. */
1987 frame_size += prologue_inst_adjust_sp (inst);
1988
1989 /* There are limited ways to store the return pointer into the
1990 stack. */
1991 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
1992 {
1993 looking_for_rp = 0;
098caef4 1994 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-20);
26d08f08 1995 }
dfaf8edb
MK
1996 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
1997 {
1998 looking_for_rp = 0;
098caef4 1999 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-24);
dfaf8edb 2000 }
c4c79048 2001 else if (inst == 0x0fc212c1
dda83cd7 2002 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
2003 {
2004 looking_for_rp = 0;
098caef4 2005 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-16);
26d08f08
AC
2006 }
2007
2008 /* Check to see if we saved SP into the stack. This also
2009 happens to indicate the location of the saved frame
2010 pointer. */
2011 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
2012 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
2013 {
2014 looking_for_sp = 0;
098caef4 2015 cache->saved_regs[HPPA_FP_REGNUM].set_addr (0);
26d08f08 2016 }
50b2f48a
RC
2017 else if (inst == 0x08030241) /* copy %r3, %r1 */
2018 {
2019 fp_in_r1 = 1;
2020 }
26d08f08
AC
2021
2022 /* Account for general and floating-point register saves. */
2023 reg = inst_saves_gr (inst);
2024 if (reg >= 3 && reg <= 18
eded0a31 2025 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
2026 {
2027 saved_gr_mask &= ~(1 << reg);
abc485a1 2028 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
2029 /* stwm with a positive displacement is a _post_
2030 _modify_. */
098caef4 2031 cache->saved_regs[reg].set_addr (0);
26d08f08
AC
2032 else if ((inst & 0xfc00000c) == 0x70000008)
2033 /* A std has explicit post_modify forms. */
098caef4 2034 cache->saved_regs[reg].set_addr (0);
26d08f08
AC
2035 else
2036 {
2037 CORE_ADDR offset;
2038
2039 if ((inst >> 26) == 0x1c)
66c6502d 2040 offset = (inst & 0x1 ? -(1 << 13) : 0)
1777feb0 2041 | (((inst >> 4) & 0x3ff) << 3);
26d08f08 2042 else if ((inst >> 26) == 0x03)
abc485a1 2043 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 2044 else
abc485a1 2045 offset = hppa_extract_14 (inst);
26d08f08
AC
2046
2047 /* Handle code with and without frame pointers. */
2048 if (u->Save_SP)
098caef4 2049 cache->saved_regs[reg].set_addr (offset);
26d08f08 2050 else
098caef4
LM
2051 cache->saved_regs[reg].set_addr ((u->Total_frame_size << 3)
2052 + offset);
26d08f08
AC
2053 }
2054 }
2055
2056 /* GCC handles callee saved FP regs a little differently.
2057
2058 It emits an instruction to put the value of the start of
2059 the FP store area into %r1. It then uses fstds,ma with a
2060 basereg of %r1 for the stores.
2061
2062 HP CC emits them at the current stack pointer modifying the
2063 stack pointer as it stores each register. */
2064
2065 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
2066 if ((inst & 0xffffc000) == 0x34610000
2067 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 2068 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
2069
2070 reg = inst_saves_fr (inst);
2071 if (reg >= 12 && reg <= 21)
2072 {
2073 /* Note +4 braindamage below is necessary because the FP
2074 status registers are internally 8 registers rather than
2075 the expected 4 registers. */
2076 saved_fr_mask &= ~(1 << reg);
2077 if (fp_loc == -1)
2078 {
2079 /* 1st HP CC FP register store. After this
2080 instruction we've set enough state that the GCC and
2081 HPCC code are both handled in the same manner. */
098caef4 2082 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].set_addr (0);
26d08f08
AC
2083 fp_loc = 8;
2084 }
2085 else
2086 {
098caef4 2087 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].set_addr (fp_loc);
26d08f08
AC
2088 fp_loc += 8;
2089 }
2090 }
2091
1777feb0 2092 /* Quit if we hit any kind of branch the previous iteration. */
26d08f08
AC
2093 if (final_iteration)
2094 break;
2095 /* We want to look precisely one instruction beyond the branch
2096 if we have not found everything yet. */
2097 if (is_branch (inst))
2098 final_iteration = 1;
2099 }
2100 }
2101
2102 {
2103 /* The frame base always represents the value of %sp at entry to
2104 the current function (and is thus equivalent to the "saved"
2105 stack pointer. */
227e86ad 2106 CORE_ADDR this_sp = get_frame_register_unsigned (this_frame,
dda83cd7 2107 HPPA_SP_REGNUM);
ed70ba00 2108 CORE_ADDR fp;
9f7194c3
RC
2109
2110 if (hppa_debug)
6cb06a8c
TT
2111 gdb_printf (gdb_stdlog, " (this_sp=%s, pc=%s, "
2112 "prologue_end=%s) ",
2113 paddress (gdbarch, this_sp),
2114 paddress (gdbarch, get_frame_pc (this_frame)),
2115 paddress (gdbarch, prologue_end));
9f7194c3 2116
ed70ba00 2117 /* Check to see if a frame pointer is available, and use it for
dda83cd7 2118 frame unwinding if it is.
ed70ba00 2119
dda83cd7
SM
2120 There are some situations where we need to rely on the frame
2121 pointer to do stack unwinding. For example, if a function calls
2122 alloca (), the stack pointer can get adjusted inside the body of
2123 the function. In this case, the ABI requires that the compiler
2124 maintain a frame pointer for the function.
ed70ba00 2125
dda83cd7
SM
2126 The unwind record has a flag (alloca_frame) that indicates that
2127 a function has a variable frame; unfortunately, gcc/binutils
2128 does not set this flag. Instead, whenever a frame pointer is used
2129 and saved on the stack, the Save_SP flag is set. We use this to
2130 decide whether to use the frame pointer for unwinding.
ed70ba00 2131
dda83cd7 2132 TODO: For the HP compiler, maybe we should use the alloca_frame flag
ed70ba00
RC
2133 instead of Save_SP. */
2134
227e86ad 2135 fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM);
46acf081 2136
6fcecea0 2137 if (u->alloca_frame)
46acf081 2138 fp -= u->Total_frame_size << 3;
ed70ba00 2139
227e86ad 2140 if (get_frame_pc (this_frame) >= prologue_end
dda83cd7 2141 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00 2142 {
24b21115 2143 cache->base = fp;
ed70ba00 2144
24b21115 2145 if (hppa_debug)
6cb06a8c
TT
2146 gdb_printf (gdb_stdlog, " (base=%s) [frame pointer]",
2147 paddress (gdbarch, cache->base));
ed70ba00 2148 }
1658da49 2149 else if (u->Save_SP
a9a87d35 2150 && cache->saved_regs[HPPA_SP_REGNUM].is_addr ())
9f7194c3 2151 {
dda83cd7 2152 /* Both we're expecting the SP to be saved and the SP has been
9f7194c3
RC
2153 saved. The entry SP value is saved at this frame's SP
2154 address. */
dda83cd7 2155 cache->base = read_memory_integer (this_sp, word_size, byte_order);
9f7194c3
RC
2156
2157 if (hppa_debug)
6cb06a8c
TT
2158 gdb_printf (gdb_stdlog, " (base=%s) [saved]",
2159 paddress (gdbarch, cache->base));
9f7194c3 2160 }
492325c4 2161 else
9f7194c3 2162 {
dda83cd7 2163 /* The prologue has been slowly allocating stack space. Adjust
1658da49 2164 the SP back. */
dda83cd7 2165 cache->base = this_sp - frame_size;
9f7194c3 2166 if (hppa_debug)
6cb06a8c
TT
2167 gdb_printf (gdb_stdlog, " (base=%s) [unwind adjust]",
2168 paddress (gdbarch, cache->base));
9f7194c3
RC
2169
2170 }
a9a87d35 2171 cache->saved_regs[HPPA_SP_REGNUM].set_value (cache->base);
26d08f08
AC
2172 }
2173
412275d5
AC
2174 /* The PC is found in the "return register", "Millicode" uses "r31"
2175 as the return register while normal code uses "rp". */
26d08f08 2176 if (u->Millicode)
9f7194c3 2177 {
a9a87d35 2178 if (cache->saved_regs[31].is_addr ())
dda83cd7
SM
2179 {
2180 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
9ed5ba24 2181 if (hppa_debug)
6cb06a8c 2182 gdb_printf (gdb_stdlog, " (pc=r31) [stack] } ");
dda83cd7 2183 }
9f7194c3
RC
2184 else
2185 {
227e86ad 2186 ULONGEST r31 = get_frame_register_unsigned (this_frame, 31);
a9a87d35 2187 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (r31);
9ed5ba24 2188 if (hppa_debug)
6cb06a8c 2189 gdb_printf (gdb_stdlog, " (pc=r31) [frame] } ");
dda83cd7 2190 }
9f7194c3 2191 }
26d08f08 2192 else
9f7194c3 2193 {
a9a87d35 2194 if (cache->saved_regs[HPPA_RP_REGNUM].is_addr ())
dda83cd7
SM
2195 {
2196 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
9ed5ba24
RC
2197 cache->saved_regs[HPPA_RP_REGNUM];
2198 if (hppa_debug)
6cb06a8c 2199 gdb_printf (gdb_stdlog, " (pc=rp) [stack] } ");
dda83cd7 2200 }
9f7194c3
RC
2201 else
2202 {
227e86ad 2203 ULONGEST rp = get_frame_register_unsigned (this_frame,
dda83cd7 2204 HPPA_RP_REGNUM);
a9a87d35 2205 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (rp);
9ed5ba24 2206 if (hppa_debug)
6cb06a8c 2207 gdb_printf (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2208 }
2209 }
26d08f08 2210
50b2f48a
RC
2211 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2212 frame. However, there is a one-insn window where we haven't saved it
2213 yet, but we've already clobbered it. Detect this case and fix it up.
2214
2215 The prologue sequence for frame-pointer functions is:
2216 0: stw %rp, -20(%sp)
2217 4: copy %r3, %r1
2218 8: copy %sp, %r3
2219 c: stw,ma %r1, XX(%sp)
2220
2221 So if we are at offset c, the r3 value that we want is not yet saved
2222 on the stack, but it's been overwritten. The prologue analyzer will
2223 set fp_in_r1 when it sees the copy insn so we know to get the value
2224 from r1 instead. */
a9a87d35 2225 if (u->Save_SP && !cache->saved_regs[HPPA_FP_REGNUM].is_addr ()
50b2f48a
RC
2226 && fp_in_r1)
2227 {
227e86ad 2228 ULONGEST r1 = get_frame_register_unsigned (this_frame, 1);
a9a87d35 2229 cache->saved_regs[HPPA_FP_REGNUM].set_value (r1);
50b2f48a 2230 }
1658da49 2231
26d08f08
AC
2232 {
2233 /* Convert all the offsets into addresses. */
2234 int reg;
65c5db89 2235 for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
26d08f08 2236 {
a9a87d35 2237 if (cache->saved_regs[reg].is_addr ())
098caef4
LM
2238 cache->saved_regs[reg].set_addr (cache->saved_regs[reg].addr ()
2239 + cache->base);
26d08f08
AC
2240 }
2241 }
2242
f77a2124 2243 {
08106042 2244 hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch);
f77a2124
RC
2245
2246 if (tdep->unwind_adjust_stub)
227e86ad 2247 tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs);
f77a2124
RC
2248 }
2249
369aa520 2250 if (hppa_debug)
6cb06a8c
TT
2251 gdb_printf (gdb_stdlog, "base=%s }",
2252 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 2253 return (struct hppa_frame_cache *) (*this_cache);
26d08f08
AC
2254}
2255
2256static void
227e86ad
JB
2257hppa_frame_this_id (struct frame_info *this_frame, void **this_cache,
2258 struct frame_id *this_id)
26d08f08 2259{
d5c27f81 2260 struct hppa_frame_cache *info;
d5c27f81
RC
2261 struct unwind_table_entry *u;
2262
227e86ad
JB
2263 info = hppa_frame_cache (this_frame, this_cache);
2264 u = hppa_find_unwind_entry_in_block (this_frame);
d5c27f81
RC
2265
2266 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2267}
2268
227e86ad
JB
2269static struct value *
2270hppa_frame_prev_register (struct frame_info *this_frame,
2271 void **this_cache, int regnum)
26d08f08 2272{
227e86ad
JB
2273 struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache);
2274
1777feb0
MS
2275 return hppa_frame_prev_register_helper (this_frame,
2276 info->saved_regs, regnum);
227e86ad
JB
2277}
2278
2279static int
2280hppa_frame_unwind_sniffer (const struct frame_unwind *self,
dda83cd7 2281 struct frame_info *this_frame, void **this_cache)
227e86ad
JB
2282{
2283 if (hppa_find_unwind_entry_in_block (this_frame))
2284 return 1;
2285
2286 return 0;
0da28f8a
RC
2287}
2288
2289static const struct frame_unwind hppa_frame_unwind =
2290{
a154d838 2291 "hppa unwind table",
0da28f8a 2292 NORMAL_FRAME,
8fbca658 2293 default_frame_unwind_stop_reason,
0da28f8a 2294 hppa_frame_this_id,
227e86ad
JB
2295 hppa_frame_prev_register,
2296 NULL,
2297 hppa_frame_unwind_sniffer
0da28f8a
RC
2298};
2299
0da28f8a
RC
2300/* This is a generic fallback frame unwinder that kicks in if we fail all
2301 the other ones. Normally we would expect the stub and regular unwinder
2302 to work, but in some cases we might hit a function that just doesn't
2303 have any unwind information available. In this case we try to do
2304 unwinding solely based on code reading. This is obviously going to be
2305 slow, so only use this as a last resort. Currently this will only
2306 identify the stack and pc for the frame. */
2307
2308static struct hppa_frame_cache *
227e86ad 2309hppa_fallback_frame_cache (struct frame_info *this_frame, void **this_cache)
0da28f8a 2310{
e17a4113
UW
2311 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2312 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0da28f8a 2313 struct hppa_frame_cache *cache;
4ba6a975
MK
2314 unsigned int frame_size = 0;
2315 int found_rp = 0;
2316 CORE_ADDR start_pc;
0da28f8a 2317
d5c27f81 2318 if (hppa_debug)
6cb06a8c
TT
2319 gdb_printf (gdb_stdlog,
2320 "{ hppa_fallback_frame_cache (frame=%d) -> ",
2321 frame_relative_level (this_frame));
d5c27f81 2322
0da28f8a
RC
2323 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2324 (*this_cache) = cache;
227e86ad 2325 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
0da28f8a 2326
227e86ad 2327 start_pc = get_frame_func (this_frame);
4ba6a975 2328 if (start_pc)
0da28f8a 2329 {
227e86ad 2330 CORE_ADDR cur_pc = get_frame_pc (this_frame);
4ba6a975 2331 CORE_ADDR pc;
0da28f8a 2332
4ba6a975
MK
2333 for (pc = start_pc; pc < cur_pc; pc += 4)
2334 {
2335 unsigned int insn;
0da28f8a 2336
e17a4113 2337 insn = read_memory_unsigned_integer (pc, 4, byte_order);
4ba6a975 2338 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2339
4ba6a975
MK
2340 /* There are limited ways to store the return pointer into the
2341 stack. */
2342 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2343 {
098caef4 2344 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-20);
4ba6a975
MK
2345 found_rp = 1;
2346 }
c4c79048 2347 else if (insn == 0x0fc212c1
dda83cd7 2348 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975 2349 {
098caef4 2350 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-16);
4ba6a975
MK
2351 found_rp = 1;
2352 }
2353 }
412275d5 2354 }
0da28f8a 2355
d5c27f81 2356 if (hppa_debug)
6cb06a8c
TT
2357 gdb_printf (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2358 frame_size, found_rp);
d5c27f81 2359
227e86ad 2360 cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
4ba6a975 2361 cache->base -= frame_size;
a9a87d35 2362 cache->saved_regs[HPPA_SP_REGNUM].set_value (cache->base);
0da28f8a 2363
a9a87d35 2364 if (cache->saved_regs[HPPA_RP_REGNUM].is_addr ())
0da28f8a 2365 {
098caef4
LM
2366 cache->saved_regs[HPPA_RP_REGNUM].set_addr (cache->saved_regs[HPPA_RP_REGNUM].addr ()
2367 + cache->base);
4ba6a975
MK
2368 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2369 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2370 }
412275d5
AC
2371 else
2372 {
4ba6a975 2373 ULONGEST rp;
227e86ad 2374 rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM);
a9a87d35 2375 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (rp);
412275d5 2376 }
0da28f8a
RC
2377
2378 return cache;
26d08f08
AC
2379}
2380
0da28f8a 2381static void
227e86ad 2382hppa_fallback_frame_this_id (struct frame_info *this_frame, void **this_cache,
0da28f8a
RC
2383 struct frame_id *this_id)
2384{
2385 struct hppa_frame_cache *info =
227e86ad
JB
2386 hppa_fallback_frame_cache (this_frame, this_cache);
2387
2388 (*this_id) = frame_id_build (info->base, get_frame_func (this_frame));
0da28f8a
RC
2389}
2390
227e86ad
JB
2391static struct value *
2392hppa_fallback_frame_prev_register (struct frame_info *this_frame,
dda83cd7 2393 void **this_cache, int regnum)
0da28f8a 2394{
1777feb0
MS
2395 struct hppa_frame_cache *info
2396 = hppa_fallback_frame_cache (this_frame, this_cache);
227e86ad 2397
1777feb0
MS
2398 return hppa_frame_prev_register_helper (this_frame,
2399 info->saved_regs, regnum);
0da28f8a
RC
2400}
2401
2402static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08 2403{
a154d838 2404 "hppa prologue",
26d08f08 2405 NORMAL_FRAME,
8fbca658 2406 default_frame_unwind_stop_reason,
0da28f8a 2407 hppa_fallback_frame_this_id,
227e86ad
JB
2408 hppa_fallback_frame_prev_register,
2409 NULL,
2410 default_frame_sniffer
26d08f08
AC
2411};
2412
7f07c5b6
RC
2413/* Stub frames, used for all kinds of call stubs. */
2414struct hppa_stub_unwind_cache
2415{
2416 CORE_ADDR base;
098caef4 2417 trad_frame_saved_reg *saved_regs;
7f07c5b6
RC
2418};
2419
2420static struct hppa_stub_unwind_cache *
227e86ad 2421hppa_stub_frame_unwind_cache (struct frame_info *this_frame,
7f07c5b6
RC
2422 void **this_cache)
2423{
7f07c5b6
RC
2424 struct hppa_stub_unwind_cache *info;
2425
2426 if (*this_cache)
9a3c8263 2427 return (struct hppa_stub_unwind_cache *) *this_cache;
7f07c5b6
RC
2428
2429 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2430 *this_cache = info;
227e86ad 2431 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
7f07c5b6 2432
227e86ad 2433 info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
7f07c5b6 2434
22b0923d 2435 /* By default we assume that stubs do not change the rp. */
098caef4 2436 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_realreg (HPPA_RP_REGNUM);
22b0923d 2437
7f07c5b6
RC
2438 return info;
2439}
2440
2441static void
227e86ad 2442hppa_stub_frame_this_id (struct frame_info *this_frame,
7f07c5b6
RC
2443 void **this_prologue_cache,
2444 struct frame_id *this_id)
2445{
2446 struct hppa_stub_unwind_cache *info
227e86ad 2447 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57
RC
2448
2449 if (info)
227e86ad 2450 *this_id = frame_id_build (info->base, get_frame_func (this_frame));
7f07c5b6
RC
2451}
2452
227e86ad
JB
2453static struct value *
2454hppa_stub_frame_prev_register (struct frame_info *this_frame,
2455 void **this_prologue_cache, int regnum)
7f07c5b6
RC
2456{
2457 struct hppa_stub_unwind_cache *info
227e86ad 2458 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57 2459
227e86ad 2460 if (info == NULL)
8a3fe4f8 2461 error (_("Requesting registers from null frame."));
7f07c5b6 2462
1777feb0
MS
2463 return hppa_frame_prev_register_helper (this_frame,
2464 info->saved_regs, regnum);
227e86ad 2465}
7f07c5b6 2466
227e86ad
JB
2467static int
2468hppa_stub_unwind_sniffer (const struct frame_unwind *self,
dda83cd7
SM
2469 struct frame_info *this_frame,
2470 void **this_cache)
7f07c5b6 2471{
227e86ad
JB
2472 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2473 struct gdbarch *gdbarch = get_frame_arch (this_frame);
08106042 2474 hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch);
7f07c5b6 2475
6d1be3f1 2476 if (pc == 0
84674fe1 2477 || (tdep->in_solib_call_trampoline != NULL
3e5d3a5a 2478 && tdep->in_solib_call_trampoline (gdbarch, pc))
464963c9 2479 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
227e86ad
JB
2480 return 1;
2481 return 0;
7f07c5b6
RC
2482}
2483
227e86ad 2484static const struct frame_unwind hppa_stub_frame_unwind = {
a154d838 2485 "hppa stub",
227e86ad 2486 NORMAL_FRAME,
8fbca658 2487 default_frame_unwind_stop_reason,
227e86ad
JB
2488 hppa_stub_frame_this_id,
2489 hppa_stub_frame_prev_register,
2490 NULL,
2491 hppa_stub_unwind_sniffer
2492};
2493
cc72850f 2494CORE_ADDR
26d08f08
AC
2495hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2496{
fe46cd3a
RC
2497 ULONGEST ipsw;
2498 CORE_ADDR pc;
2499
cc72850f
MK
2500 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2501 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2502
2503 /* If the current instruction is nullified, then we are effectively
2504 still executing the previous instruction. Pretend we are still
cc72850f
MK
2505 there. This is needed when single stepping; if the nullified
2506 instruction is on a different line, we don't want GDB to think
2507 we've stepped onto that line. */
fe46cd3a
RC
2508 if (ipsw & 0x00200000)
2509 pc -= 4;
2510
cc72850f 2511 return pc & ~0x3;
26d08f08
AC
2512}
2513
ff644745
JB
2514/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2515 Return NULL if no such symbol was found. */
2516
3b7344d5 2517struct bound_minimal_symbol
ff644745 2518hppa_lookup_stub_minimal_symbol (const char *name,
dda83cd7 2519 enum unwind_stub_types stub_type)
ff644745 2520{
f6b3ad54 2521 struct bound_minimal_symbol result;
ff644745 2522
2030c079 2523 for (objfile *objfile : current_program_space->objfiles ())
ff644745 2524 {
7932255d 2525 for (minimal_symbol *msym : objfile->msymbols ())
5325b9bf 2526 {
c9d95fa3 2527 if (strcmp (msym->linkage_name (), name) == 0)
3b7344d5 2528 {
5325b9bf
TT
2529 struct unwind_table_entry *u;
2530
4aeddc50 2531 u = find_unwind_entry (msym->value_longest ());
5325b9bf
TT
2532 if (u != NULL && u->stub_unwind.stub_type == stub_type)
2533 {
2534 result.objfile = objfile;
2535 result.minsym = msym;
2536 return result;
2537 }
3b7344d5 2538 }
5325b9bf 2539 }
ff644745
JB
2540 }
2541
3b7344d5 2542 return result;
ff644745
JB
2543}
2544
c906108c 2545static void
c482f52c 2546unwind_command (const char *exp, int from_tty)
c906108c
SS
2547{
2548 CORE_ADDR address;
2549 struct unwind_table_entry *u;
2550
2551 /* If we have an expression, evaluate it and use it as the address. */
2552
2553 if (exp != 0 && *exp != 0)
2554 address = parse_and_eval_address (exp);
2555 else
2556 return;
2557
2558 u = find_unwind_entry (address);
2559
2560 if (!u)
2561 {
6cb06a8c 2562 gdb_printf ("Can't find unwind table entry for %s\n", exp);
c906108c
SS
2563 return;
2564 }
2565
6cb06a8c 2566 gdb_printf ("unwind_table_entry (%s):\n", host_address_to_string (u));
c906108c 2567
6cb06a8c 2568 gdb_printf ("\tregion_start = %s\n", hex_string (u->region_start));
c906108c 2569
6cb06a8c 2570 gdb_printf ("\tregion_end = %s\n", hex_string (u->region_end));
c906108c 2571
6cb06a8c 2572#define pif(FLD) if (u->FLD) gdb_printf (" "#FLD);
c906108c 2573
6cb06a8c 2574 gdb_printf ("\n\tflags =");
c906108c
SS
2575 pif (Cannot_unwind);
2576 pif (Millicode);
2577 pif (Millicode_save_sr0);
2578 pif (Entry_SR);
2579 pif (Args_stored);
2580 pif (Variable_Frame);
2581 pif (Separate_Package_Body);
2582 pif (Frame_Extension_Millicode);
2583 pif (Stack_Overflow_Check);
2584 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2585 pif (sr4export);
2586 pif (cxx_info);
2587 pif (cxx_try_catch);
2588 pif (sched_entry_seq);
c906108c
SS
2589 pif (Save_SP);
2590 pif (Save_RP);
2591 pif (Save_MRP_in_frame);
6fcecea0 2592 pif (save_r19);
c906108c
SS
2593 pif (Cleanup_defined);
2594 pif (MPE_XL_interrupt_marker);
2595 pif (HP_UX_interrupt_marker);
2596 pif (Large_frame);
6fcecea0 2597 pif (alloca_frame);
c906108c 2598
a11ac3b3 2599 gdb_putc ('\n');
c906108c 2600
6cb06a8c 2601#define pin(FLD) gdb_printf ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2602
2603 pin (Region_description);
2604 pin (Entry_FR);
2605 pin (Entry_GR);
2606 pin (Total_frame_size);
57dac9e1
RC
2607
2608 if (u->stub_unwind.stub_type)
2609 {
6cb06a8c 2610 gdb_printf ("\tstub type = ");
57dac9e1 2611 switch (u->stub_unwind.stub_type)
dda83cd7 2612 {
57dac9e1 2613 case LONG_BRANCH:
6cb06a8c 2614 gdb_printf ("long branch\n");
57dac9e1
RC
2615 break;
2616 case PARAMETER_RELOCATION:
6cb06a8c 2617 gdb_printf ("parameter relocation\n");
57dac9e1
RC
2618 break;
2619 case EXPORT:
6cb06a8c 2620 gdb_printf ("export\n");
57dac9e1
RC
2621 break;
2622 case IMPORT:
6cb06a8c 2623 gdb_printf ("import\n");
57dac9e1
RC
2624 break;
2625 case IMPORT_SHLIB:
6cb06a8c 2626 gdb_printf ("import shlib\n");
57dac9e1
RC
2627 break;
2628 default:
6cb06a8c 2629 gdb_printf ("unknown (%d)\n", u->stub_unwind.stub_type);
57dac9e1
RC
2630 }
2631 }
c906108c 2632}
c906108c 2633
38ca4e0c
MK
2634/* Return the GDB type object for the "standard" data type of data in
2635 register REGNUM. */
d709c020 2636
eded0a31 2637static struct type *
38ca4e0c 2638hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2639{
38ca4e0c 2640 if (regnum < HPPA_FP4_REGNUM)
df4df182 2641 return builtin_type (gdbarch)->builtin_uint32;
d709c020 2642 else
27067745 2643 return builtin_type (gdbarch)->builtin_float;
d709c020
JB
2644}
2645
eded0a31 2646static struct type *
38ca4e0c 2647hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2648{
38ca4e0c 2649 if (regnum < HPPA64_FP4_REGNUM)
df4df182 2650 return builtin_type (gdbarch)->builtin_uint64;
3ff7cf9e 2651 else
27067745 2652 return builtin_type (gdbarch)->builtin_double;
3ff7cf9e
JB
2653}
2654
38ca4e0c
MK
2655/* Return non-zero if REGNUM is not a register available to the user
2656 through ptrace/ttrace. */
d709c020 2657
8d153463 2658static int
64a3914f 2659hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum)
d709c020
JB
2660{
2661 return (regnum == 0
dda83cd7
SM
2662 || regnum == HPPA_PCSQ_HEAD_REGNUM
2663 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2664 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2665}
d709c020 2666
d037d088 2667static int
64a3914f 2668hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2669{
2670 /* cr26 and cr27 are readable (but not writable) from userspace. */
2671 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2672 return 0;
2673 else
64a3914f 2674 return hppa32_cannot_store_register (gdbarch, regnum);
d037d088
CD
2675}
2676
38ca4e0c 2677static int
64a3914f 2678hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
38ca4e0c
MK
2679{
2680 return (regnum == 0
dda83cd7
SM
2681 || regnum == HPPA_PCSQ_HEAD_REGNUM
2682 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2683 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2684}
2685
d037d088 2686static int
64a3914f 2687hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2688{
2689 /* cr26 and cr27 are readable (but not writable) from userspace. */
2690 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2691 return 0;
2692 else
64a3914f 2693 return hppa64_cannot_store_register (gdbarch, regnum);
d037d088
CD
2694}
2695
8d153463 2696static CORE_ADDR
85ddcc70 2697hppa_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
d709c020
JB
2698{
2699 /* The low two bits of the PC on the PA contain the privilege level.
2700 Some genius implementing a (non-GCC) compiler apparently decided
2701 this means that "addresses" in a text section therefore include a
2702 privilege level, and thus symbol tables should contain these bits.
2703 This seems like a bonehead thing to do--anyway, it seems to work
2704 for our purposes to just ignore those bits. */
2705
2706 return (addr &= ~0x3);
2707}
2708
e127f0db
MK
2709/* Get the ARGIth function argument for the current function. */
2710
4a302917 2711static CORE_ADDR
143985b7
AF
2712hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2713 struct type *type)
2714{
e127f0db 2715 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2716}
2717
05d1431c 2718static enum register_status
849d0ba8 2719hppa_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
e127f0db 2720 int regnum, gdb_byte *buf)
0f8d9d59 2721{
05d1431c
PA
2722 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2723 ULONGEST tmp;
2724 enum register_status status;
0f8d9d59 2725
03f50fc8 2726 status = regcache->raw_read (regnum, &tmp);
05d1431c
PA
2727 if (status == REG_VALID)
2728 {
2729 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
2730 tmp &= ~0x3;
2731 store_unsigned_integer (buf, sizeof tmp, byte_order, tmp);
2732 }
2733 return status;
0f8d9d59
RC
2734}
2735
d49771ef 2736static CORE_ADDR
e38c262f 2737hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function)
d49771ef
RC
2738{
2739 return 0;
2740}
2741
227e86ad
JB
2742struct value *
2743hppa_frame_prev_register_helper (struct frame_info *this_frame,
098caef4 2744 trad_frame_saved_reg saved_regs[],
227e86ad 2745 int regnum)
0da28f8a 2746{
227e86ad 2747 struct gdbarch *arch = get_frame_arch (this_frame);
e17a4113 2748 enum bfd_endian byte_order = gdbarch_byte_order (arch);
8f4e467c 2749
8693c419
MK
2750 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2751 {
227e86ad
JB
2752 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
2753 CORE_ADDR pc;
2754 struct value *pcoq_val =
dda83cd7
SM
2755 trad_frame_get_prev_register (this_frame, saved_regs,
2756 HPPA_PCOQ_HEAD_REGNUM);
8693c419 2757
50888e42 2758 pc = extract_unsigned_integer (value_contents_all (pcoq_val).data (),
e17a4113 2759 size, byte_order);
227e86ad 2760 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
8693c419 2761 }
0da28f8a 2762
227e86ad 2763 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
0da28f8a 2764}
8693c419 2765\f
0da28f8a 2766
34f55018
MK
2767/* An instruction to match. */
2768struct insn_pattern
2769{
2770 unsigned int data; /* See if it matches this.... */
2771 unsigned int mask; /* ... with this mask. */
2772};
2773
2774/* See bfd/elf32-hppa.c */
2775static struct insn_pattern hppa_long_branch_stub[] = {
2776 /* ldil LR'xxx,%r1 */
2777 { 0x20200000, 0xffe00000 },
2778 /* be,n RR'xxx(%sr4,%r1) */
2779 { 0xe0202002, 0xffe02002 },
2780 { 0, 0 }
2781};
2782
2783static struct insn_pattern hppa_long_branch_pic_stub[] = {
2784 /* b,l .+8, %r1 */
2785 { 0xe8200000, 0xffe00000 },
2786 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2787 { 0x28200000, 0xffe00000 },
2788 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2789 { 0xe0202002, 0xffe02002 },
2790 { 0, 0 }
2791};
2792
2793static struct insn_pattern hppa_import_stub[] = {
2794 /* addil LR'xxx, %dp */
2795 { 0x2b600000, 0xffe00000 },
2796 /* ldw RR'xxx(%r1), %r21 */
2797 { 0x48350000, 0xffffb000 },
2798 /* bv %r0(%r21) */
2799 { 0xeaa0c000, 0xffffffff },
2800 /* ldw RR'xxx+4(%r1), %r19 */
2801 { 0x48330000, 0xffffb000 },
2802 { 0, 0 }
2803};
2804
2805static struct insn_pattern hppa_import_pic_stub[] = {
2806 /* addil LR'xxx,%r19 */
2807 { 0x2a600000, 0xffe00000 },
2808 /* ldw RR'xxx(%r1),%r21 */
2809 { 0x48350000, 0xffffb000 },
2810 /* bv %r0(%r21) */
2811 { 0xeaa0c000, 0xffffffff },
2812 /* ldw RR'xxx+4(%r1),%r19 */
2813 { 0x48330000, 0xffffb000 },
2814 { 0, 0 },
2815};
2816
2817static struct insn_pattern hppa_plt_stub[] = {
2818 /* b,l 1b, %r20 - 1b is 3 insns before here */
2819 { 0xea9f1fdd, 0xffffffff },
2820 /* depi 0,31,2,%r20 */
2821 { 0xd6801c1e, 0xffffffff },
2822 { 0, 0 }
34f55018
MK
2823};
2824
2825/* Maximum number of instructions on the patterns above. */
2826#define HPPA_MAX_INSN_PATTERN_LEN 4
2827
2828/* Return non-zero if the instructions at PC match the series
2829 described in PATTERN, or zero otherwise. PATTERN is an array of
2830 'struct insn_pattern' objects, terminated by an entry whose mask is
2831 zero.
2832
2833 When the match is successful, fill INSN[i] with what PATTERN[i]
2834 matched. */
2835
2836static int
e17a4113
UW
2837hppa_match_insns (struct gdbarch *gdbarch, CORE_ADDR pc,
2838 struct insn_pattern *pattern, unsigned int *insn)
34f55018 2839{
e17a4113 2840 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
34f55018
MK
2841 CORE_ADDR npc = pc;
2842 int i;
2843
2844 for (i = 0; pattern[i].mask; i++)
2845 {
2846 gdb_byte buf[HPPA_INSN_SIZE];
2847
8defab1a 2848 target_read_memory (npc, buf, HPPA_INSN_SIZE);
e17a4113 2849 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE, byte_order);
34f55018 2850 if ((insn[i] & pattern[i].mask) == pattern[i].data)
dda83cd7 2851 npc += 4;
34f55018 2852 else
dda83cd7 2853 return 0;
34f55018
MK
2854 }
2855
2856 return 1;
2857}
2858
85102364 2859/* This relaxed version of the instruction matcher allows us to match
34f55018
MK
2860 from somewhere inside the pattern, by looking backwards in the
2861 instruction scheme. */
2862
2863static int
e17a4113
UW
2864hppa_match_insns_relaxed (struct gdbarch *gdbarch, CORE_ADDR pc,
2865 struct insn_pattern *pattern, unsigned int *insn)
34f55018
MK
2866{
2867 int offset, len = 0;
2868
2869 while (pattern[len].mask)
2870 len++;
2871
2872 for (offset = 0; offset < len; offset++)
e17a4113
UW
2873 if (hppa_match_insns (gdbarch, pc - offset * HPPA_INSN_SIZE,
2874 pattern, insn))
34f55018
MK
2875 return 1;
2876
2877 return 0;
2878}
2879
2880static int
2881hppa_in_dyncall (CORE_ADDR pc)
2882{
2883 struct unwind_table_entry *u;
2884
2885 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2886 if (!u)
2887 return 0;
2888
2889 return (pc >= u->region_start && pc <= u->region_end);
2890}
2891
2892int
3e5d3a5a 2893hppa_in_solib_call_trampoline (struct gdbarch *gdbarch, CORE_ADDR pc)
34f55018
MK
2894{
2895 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2896 struct unwind_table_entry *u;
2897
3e5d3a5a 2898 if (in_plt_section (pc) || hppa_in_dyncall (pc))
34f55018
MK
2899 return 1;
2900
2901 /* The GNU toolchain produces linker stubs without unwind
2902 information. Since the pattern matching for linker stubs can be
2903 quite slow, so bail out if we do have an unwind entry. */
2904
2905 u = find_unwind_entry (pc);
806e23c0 2906 if (u != NULL)
34f55018
MK
2907 return 0;
2908
e17a4113
UW
2909 return
2910 (hppa_match_insns_relaxed (gdbarch, pc, hppa_import_stub, insn)
2911 || hppa_match_insns_relaxed (gdbarch, pc, hppa_import_pic_stub, insn)
2912 || hppa_match_insns_relaxed (gdbarch, pc, hppa_long_branch_stub, insn)
2913 || hppa_match_insns_relaxed (gdbarch, pc,
2914 hppa_long_branch_pic_stub, insn));
34f55018
MK
2915}
2916
2917/* This code skips several kind of "trampolines" used on PA-RISC
2918 systems: $$dyncall, import stubs and PLT stubs. */
2919
2920CORE_ADDR
52f729a7 2921hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018 2922{
0dfff4cb
UW
2923 struct gdbarch *gdbarch = get_frame_arch (frame);
2924 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
2925
34f55018
MK
2926 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2927 int dp_rel;
2928
2929 /* $$dyncall handles both PLABELs and direct addresses. */
2930 if (hppa_in_dyncall (pc))
2931 {
52f729a7 2932 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2933
2934 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2935 if (pc & 0x2)
0dfff4cb 2936 pc = read_memory_typed_address (pc & ~0x3, func_ptr_type);
34f55018
MK
2937
2938 return pc;
2939 }
2940
e17a4113
UW
2941 dp_rel = hppa_match_insns (gdbarch, pc, hppa_import_stub, insn);
2942 if (dp_rel || hppa_match_insns (gdbarch, pc, hppa_import_pic_stub, insn))
34f55018
MK
2943 {
2944 /* Extract the target address from the addil/ldw sequence. */
2945 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
2946
2947 if (dp_rel)
dda83cd7 2948 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 2949 else
dda83cd7 2950 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
2951
2952 /* fallthrough */
2953 }
2954
3e5d3a5a 2955 if (in_plt_section (pc))
34f55018 2956 {
0dfff4cb 2957 pc = read_memory_typed_address (pc, func_ptr_type);
34f55018
MK
2958
2959 /* If the PLT slot has not yet been resolved, the target will be
dda83cd7 2960 the PLT stub. */
3e5d3a5a 2961 if (in_plt_section (pc))
34f55018
MK
2962 {
2963 /* Sanity check: are we pointing to the PLT stub? */
24b21115 2964 if (!hppa_match_insns (gdbarch, pc, hppa_plt_stub, insn))
34f55018 2965 {
5af949e3
UW
2966 warning (_("Cannot resolve PLT stub at %s."),
2967 paddress (gdbarch, pc));
34f55018
MK
2968 return 0;
2969 }
2970
2971 /* This should point to the fixup routine. */
0dfff4cb 2972 pc = read_memory_typed_address (pc + 8, func_ptr_type);
34f55018
MK
2973 }
2974 }
2975
2976 return pc;
2977}
2978\f
2979
8e8b2dba
MC
2980/* Here is a table of C type sizes on hppa with various compiles
2981 and options. I measured this on PA 9000/800 with HP-UX 11.11
2982 and these compilers:
2983
2984 /usr/ccs/bin/cc HP92453-01 A.11.01.21
2985 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
2986 /opt/aCC/bin/aCC B3910B A.03.45
2987 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
2988
2989 cc : 1 2 4 4 8 : 4 8 -- : 4 4
2990 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2991 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2992 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2993 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2994 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2995 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2996 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
2997
2998 Each line is:
2999
3000 compiler and options
3001 char, short, int, long, long long
3002 float, double, long double
3003 char *, void (*)()
3004
3005 So all these compilers use either ILP32 or LP64 model.
3006 TODO: gcc has more options so it needs more investigation.
3007
a2379359
MC
3008 For floating point types, see:
3009
3010 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
3011 HP-UX floating-point guide, hpux 11.00
3012
8e8b2dba
MC
3013 -- chastain 2003-12-18 */
3014
e6e68f1f
JB
3015static struct gdbarch *
3016hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3017{
3018 struct gdbarch *gdbarch;
3019
3020 /* find a candidate among the list of pre-declared architectures. */
3021 arches = gdbarch_list_lookup_by_info (arches, &info);
3022 if (arches != NULL)
3023 return (arches->gdbarch);
3024
3025 /* If none found, then allocate and initialize one. */
345bd07c 3026 hppa_gdbarch_tdep *tdep = new hppa_gdbarch_tdep;
3ff7cf9e
JB
3027 gdbarch = gdbarch_alloc (&info, tdep);
3028
3029 /* Determine from the bfd_arch_info structure if we are dealing with
3030 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3031 then default to a 32bit machine. */
3032 if (info.bfd_arch_info != NULL)
3033 tdep->bytes_per_address =
3034 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3035 else
3036 tdep->bytes_per_address = 4;
3037
d49771ef
RC
3038 tdep->find_global_pointer = hppa_find_global_pointer;
3039
3ff7cf9e
JB
3040 /* Some parts of the gdbarch vector depend on whether we are running
3041 on a 32 bits or 64 bits target. */
3042 switch (tdep->bytes_per_address)
3043 {
3044 case 4:
dda83cd7
SM
3045 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3046 set_gdbarch_register_name (gdbarch, hppa32_register_name);
3047 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3048 set_gdbarch_cannot_store_register (gdbarch,
3049 hppa32_cannot_store_register);
3050 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3051 hppa32_cannot_fetch_register);
dda83cd7 3052 break;
3ff7cf9e 3053 case 8:
dda83cd7
SM
3054 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3055 set_gdbarch_register_name (gdbarch, hppa64_register_name);
3056 set_gdbarch_register_type (gdbarch, hppa64_register_type);
3057 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3058 set_gdbarch_cannot_store_register (gdbarch,
3059 hppa64_cannot_store_register);
3060 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3061 hppa64_cannot_fetch_register);
dda83cd7 3062 break;
3ff7cf9e 3063 default:
dda83cd7
SM
3064 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3065 tdep->bytes_per_address);
3ff7cf9e
JB
3066 }
3067
3ff7cf9e 3068 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3069 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3070
8e8b2dba
MC
3071 /* The following gdbarch vector elements are the same in both ILP32
3072 and LP64, but might show differences some day. */
3073 set_gdbarch_long_long_bit (gdbarch, 64);
3074 set_gdbarch_long_double_bit (gdbarch, 128);
552f1157 3075 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_quad);
8e8b2dba 3076
3ff7cf9e
JB
3077 /* The following gdbarch vector elements do not depend on the address
3078 size, or in any other gdbarch element previously set. */
60383d10 3079 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
c9cf6e20
MG
3080 set_gdbarch_stack_frame_destroyed_p (gdbarch,
3081 hppa_stack_frame_destroyed_p);
a2a84a72 3082 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3083 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3084 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
85ddcc70 3085 set_gdbarch_addr_bits_remove (gdbarch, hppa_addr_bits_remove);
60383d10 3086 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3087 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3088 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3089
143985b7
AF
3090 /* Helper for function argument information. */
3091 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3092
3a3bc038
AC
3093 /* When a hardware watchpoint triggers, we'll move the inferior past
3094 it by removing all eventpoints; stepping past the instruction
3095 that caused the trigger; reinserting eventpoints; and checking
3096 whether any watched location changed. */
3097 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3098
5979bc46 3099 /* Inferior function call methods. */
fca7aa43 3100 switch (tdep->bytes_per_address)
5979bc46 3101 {
fca7aa43
AC
3102 case 4:
3103 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3104 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef 3105 set_gdbarch_convert_from_func_ptr_addr
dda83cd7 3106 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3107 break;
3108 case 8:
782eae8b
AC
3109 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3110 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3111 break;
782eae8b 3112 default:
e2e0b3e5 3113 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3114 }
3115
3116 /* Struct return methods. */
fca7aa43 3117 switch (tdep->bytes_per_address)
fad850b2 3118 {
fca7aa43
AC
3119 case 4:
3120 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3121 break;
3122 case 8:
782eae8b 3123 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3124 break;
fca7aa43 3125 default:
e2e0b3e5 3126 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3127 }
7f07c5b6 3128
04180708
YQ
3129 set_gdbarch_breakpoint_kind_from_pc (gdbarch, hppa_breakpoint::kind_from_pc);
3130 set_gdbarch_sw_breakpoint_from_kind (gdbarch, hppa_breakpoint::bp_from_kind);
7f07c5b6 3131 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3132
5979bc46 3133 /* Frame unwind methods. */
782eae8b 3134 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3135
50306a9d
RC
3136 /* Hook in ABI-specific overrides, if they have been registered. */
3137 gdbarch_init_osabi (info, gdbarch);
3138
7f07c5b6 3139 /* Hook in the default unwinders. */
227e86ad
JB
3140 frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind);
3141 frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind);
3142 frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind);
5979bc46 3143
e6e68f1f
JB
3144 return gdbarch;
3145}
3146
3147static void
464963c9 3148hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3149{
08106042 3150 hppa_gdbarch_tdep *tdep = gdbarch_tdep<hppa_gdbarch_tdep> (gdbarch);
fdd72f95 3151
6cb06a8c
TT
3152 gdb_printf (file, "bytes_per_address = %d\n",
3153 tdep->bytes_per_address);
3154 gdb_printf (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3155}
3156
6c265988 3157void _initialize_hppa_tdep ();
4facf7e8 3158void
6c265988 3159_initialize_hppa_tdep ()
4facf7e8 3160{
e6e68f1f 3161 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8
JB
3162
3163 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3164 _("Print unwind table entry at given address."),
4facf7e8
JB
3165 &maintenanceprintlist);
3166
1777feb0 3167 /* Debug this files internals. */
7915a72c
AC
3168 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3169Set whether hppa target specific debugging information should be displayed."),
3170 _("\
3171Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3172This flag controls whether hppa target specific debugging information is\n\
3173displayed. This information is particularly useful for debugging frame\n\
7915a72c 3174unwinding problems."),
2c5b56ce 3175 NULL,
7915a72c 3176 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3177 &setdebuglist, &showdebuglist);
4facf7e8 3178}