projects / thirdparty / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| e88d958a AM |
1 | 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com> |
| 2 | ||
| 3 | * crx-opc.c: Mark 'bcop' instruction as RELAXABLE. | |
| 4 | ||
| 5 | 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com> | |
| 6 | ||
| 7 | * avr-dis.c: Prettyprint. Added printing of symbol names in all | |
| 8 | memory references. Convert avr_operand() to C90 formatting. | |
| 9 | ||
| 10 | 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com> | |
| 11 | ||
| 12 | * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing. | |
| 13 | ||
| 14 | 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com> | |
| 15 | ||
| 16 | * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed. | |
| 17 | (no_op_insn): Initialize array with instructions that have no | |
| 18 | operands. | |
| 19 | * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping. | |
| 20 | ||
| 21 | 2004-11-29 Richard Earnshaw <rearnsha@arm.com> | |
| 22 | ||
| 23 | * arm-dis.c: Correct top-level comment. | |
| 24 | ||
| 25 | 2004-11-27 Richard Earnshaw <rearnsha@arm.com> | |
| 26 | ||
| 27 | * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the | |
| 28 | architecuture defining the insn. | |
| 29 | (arm_opcodes, thumb_opcodes): Delete. Move to ... | |
| 30 | * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre | |
| 31 | field. | |
| 32 | Also include opcode/arm.h. | |
| 33 | * Makefile.am (arm-dis.lo): Update dependency list. | |
| 34 | * Makefile.in: Regenerate. | |
| 35 | ||
| 36 | 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com> | |
| 37 | ||
| 38 | * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to | |
| 39 | reflect the change to the short immediate syntax. | |
| 40 | ||
| 41 | 2004-11-19 Alan Modra <amodra@bigpond.net.au> | |
| 42 | ||
| 43 | * or32-opc.c (debug): Warning fix. | |
| 44 | * po/POTFILES.in: Regenerate. | |
| 45 | ||
| 46 | * maxq-dis.c: Formatting. | |
| 47 | (print_insn): Warning fix. | |
| 48 | ||
| 49 | 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com> | |
| 50 | ||
| 51 | * arm-dis.c (WORD_ADDRESS): Define. | |
| 52 | (print_insn): Use it. Correct big-endian end-of-section handling. | |
| 53 | ||
| 54 | 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com> | |
| 55 | Vineet Sharma <vineets@noida.hcltech.com> | |
| 56 | ||
| 57 | * maxq-dis.c: New file. | |
| 58 | * disassemble.c (ARCH_maxq): Define. | |
| 59 | (disassembler): Add 'print_insn_maxq_little' for handling maxq | |
| 60 | instructions.. | |
| 61 | * configure.in: Add case for bfd_maxq_arch. | |
| 62 | * configure: Regenerate. | |
| 63 | * Makefile.am: Add support for maxq-dis.c | |
| 64 | * Makefile.in: Regenerate. | |
| 65 | * aclocal.m4: Regenerate. | |
| 66 | ||
| 67 | 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com> | |
| 68 | ||
| 69 | * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register | |
| 70 | mode. | |
| 71 | * crx-dis.c: Likewise. | |
| 72 | ||
| 73 | 2004-11-04 Hans-Peter Nilsson <hp@axis.com> | |
| 74 | ||
| 75 | Generally, handle CRISv32. | |
| 76 | * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case). | |
| 77 | (struct cris_disasm_data): New type. | |
| 78 | (format_reg, format_hex, cris_constraint, print_flags) | |
| 79 | (get_opcode_entry): Add struct cris_disasm_data * parameter. All | |
| 80 | callers changed. | |
| 81 | (format_sup_reg, print_insn_crisv32_with_register_prefix) | |
| 82 | (print_insn_crisv32_without_register_prefix) | |
| 83 | (print_insn_crisv10_v32_with_register_prefix) | |
| 84 | (print_insn_crisv10_v32_without_register_prefix) | |
| 85 | (cris_parse_disassembler_options): New functions. | |
| 86 | (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family | |
| 87 | parameter. All callers changed. | |
| 88 | (get_opcode_entry): Call malloc, not xmalloc. Return NULL on | |
| 89 | failure. | |
| 90 | (cris_constraint) <case 'Y', 'U'>: New cases. | |
| 91 | (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes | |
| 92 | for constraint 'n'. | |
| 93 | (print_with_operands) <case 'Y'>: New case. | |
| 94 | (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'> | |
| 95 | <case 'N', 'Y', 'Q'>: New cases. | |
| 96 | (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32. | |
| 97 | (print_insn_cris_with_register_prefix) | |
| 98 | (print_insn_cris_without_register_prefix): Call | |
| 99 | cris_parse_disassembler_options. | |
| 100 | * cris-opc.c (cris_spec_regs): Mention that this table isn't used | |
| 101 | for CRISv32 and the size of immediate operands. New v32-only | |
| 102 | entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and | |
| 103 | spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change | |
| 104 | ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10. | |
| 105 | Change brp to be v3..v10. | |
| 106 | (cris_support_regs): New vector. | |
| 107 | (cris_opcodes): Update head comment. New format characters '[', | |
| 108 | ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'. | |
| 109 | Add new opcodes for v32 and adjust existing opcodes to accommodate | |
| 110 | differences to earlier variants. | |
| 111 | (cris_cond15s): New vector. | |
| 112 | ||
| 113 | 2004-11-04 Jan Beulich <jbeulich@novell.com> | |
| 114 | ||
| 115 | * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define. | |
| 116 | (indirEb): Remove. | |
| 117 | (Mp): Use f_mode rather than none at all. | |
| 118 | (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode | |
| 119 | replaces what previously was x_mode; x_mode now means 128-bit SSE | |
| 120 | operands. | |
| 121 | (dis386): Make far jumps and calls have an 'l' prefix only in AT&T | |
| 122 | mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq. | |
| 123 | pinsrw's second operand is Edqw. | |
| 124 | (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's | |
| 125 | operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt, | |
| 126 | fldenv, frstor, fsave, fstenv all should also have suffixes in Intel | |
| 127 | mode when an operand size override is present or always suffixing. | |
| 128 | More instructions will need to be added to this group. | |
| 129 | (putop): Handle new macro chars 'C' (short/long suffix selector), | |
| 130 | 'I' (Intel mode override for following macro char), and 'J' (for | |
| 131 | adding the 'l' prefix to far branches in AT&T mode). When an | |
| 132 | alternative was specified in the template, honor macro character when | |
| 133 | specified for Intel mode. | |
| 134 | (OP_E): Handle new *_mode values. Correct pointer specifications for | |
| 135 | memory operands. Consolidate output of index register. | |
| 136 | (OP_G): Handle new *_mode values. | |
| 137 | (OP_I): Handle const_1_mode. | |
| 138 | (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate | |
| 139 | respective opcode prefix bits have been consumed. | |
| 140 | (OP_EM, OP_EX): Provide some default handling for generating pointer | |
| 141 | specifications. | |
| 142 | ||
| 143 | 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com> | |
| 144 | ||
| 145 | * crx-opc.c (REV_COP_INST): New macro, reverse operand order of | |
| 146 | COP_INST macro. | |
| 147 | ||
| 148 | 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com> | |
| 149 | ||
| 150 | * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE. | |
| 151 | (getregliststring): Support HI/LO and user registers. | |
| 152 | * crx-opc.c (crx_instruction): Update data structure according to the | |
| 153 | rearrangement done in CRX opcode header file. | |
| 154 | (crx_regtab): Likewise. | |
| 155 | (crx_optab): Likewise. | |
| 156 | (crx_instruction): Reorder load/stor instructions, remove unsupported | |
| 157 | formats. | |
| 158 | support new Co-Processor instruction 'cpi'. | |
| 159 | ||
| 160 | 2004-10-27 Nick Clifton <nickc@redhat.com> | |
| 161 | ||
| 162 | * opcodes/iq2000-asm.c: Regenerate. | |
| 163 | * opcodes/iq2000-desc.c: Regenerate. | |
| 164 | * opcodes/iq2000-desc.h: Regenerate. | |
| 165 | * opcodes/iq2000-dis.c: Regenerate. | |
| 166 | * opcodes/iq2000-ibld.c: Regenerate. | |
| 167 | * opcodes/iq2000-opc.c: Regenerate. | |
| 168 | * opcodes/iq2000-opc.h: Regenerate. | |
| 169 | ||
| 170 | 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com> | |
| 171 | ||
| 172 | * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3, | |
| 173 | us4, us5 (respectively). | |
| 174 | Remove unsupported 'popa' instruction. | |
| 175 | Reverse operands order in store co-processor instructions. | |
| 176 | ||
| 177 | 2004-10-15 Alan Modra <amodra@bigpond.net.au> | |
| 178 | ||
| 179 | * Makefile.am: Run "make dep-am" | |
| 180 | * Makefile.in: Regenerate. | |
| 181 | ||
| 182 | 2004-10-12 Bob Wilson <bob.wilson@acm.org> | |
| 183 | ||
| 184 | * xtensa-dis.c: Use ISO C90 formatting. | |
| 185 | ||
| 186 | 2004-10-09 Alan Modra <amodra@bigpond.net.au> | |
| 187 | ||
| 188 | * ppc-opc.c: Revert 2004-09-09 change. | |
| 189 | ||
| 190 | 2004-10-07 Bob Wilson <bob.wilson@acm.org> | |
| 191 | ||
| 192 | * xtensa-dis.c (state_names): Delete. | |
| 193 | (fetch_data): Use xtensa_isa_maxlength. | |
| 194 | (print_xtensa_operand): Replace operand parameter with opcode/operand | |
| 195 | pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions. | |
| 196 | (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot | |
| 197 | instruction bundles. Use xmalloc instead of malloc. | |
| 198 | ||
| 199 | 2004-10-07 David Gibson <david@gibson.dropbear.id.au> | |
| 200 | ||
| 201 | * ppc-opc.c: Replace literal "0"s with NULLs in pointer | |
| 202 | initializers. | |
| 203 | ||
| 204 | 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com> | |
| 205 | ||
| 206 | * crx-opc.c (crx_instruction): Support Co-processor insns. | |
| 207 | * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments. | |
| 208 | (getregliststring): Change function to use the above enum. | |
| 209 | (print_arg): Handle CO-Processor insns. | |
| 210 | (crx_cinvs): Add 'b' option to invalidate the branch-target | |
| 211 | cache. | |
| 212 | ||
| 213 | 2004-10-06 Aldy Hernandez <aldyh@redhat.com> | |
| 214 | ||
| 215 | * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs, | |
| 216 | efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt, | |
| 217 | efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid, | |
| 218 | efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz, | |
| 219 | efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs. | |
| 220 | ||
| 221 | 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk> | |
| 222 | ||
| 223 | * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement | |
| 224 | rather than add it. | |
| 225 | ||
| 226 | 2004-09-30 Paul Brook <paul@codesourcery.com> | |
| 227 | ||
| 228 | * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction. | |
| 229 | * arm-opc.h: Document %e. Add ARMv6ZK instructions. | |
| 230 | ||
| 231 | 2004-09-17 H.J. Lu <hongjiu.lu@intel.com> | |
| 232 | ||
| 233 | * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9. | |
| 234 | (CONFIG_STATUS_DEPENDENCIES): New. | |
| 235 | (Makefile): Removed. | |
| 236 | (config.status): Likewise. | |
| 237 | * Makefile.in: Regenerated. | |
| 238 | ||
| 239 | 2004-09-17 Alan Modra <amodra@bigpond.net.au> | |
| 240 | ||
| 241 | * Makefile.am: Run "make dep-am". | |
| 242 | * Makefile.in: Regenerate. | |
| 243 | * aclocal.m4: Regenerate. | |
| 244 | * configure: Regenerate. | |
| 245 | * po/POTFILES.in: Regenerate. | |
| 246 | * po/opcodes.pot: Regenerate. | |
| 247 | ||
| 248 | 2004-09-11 Andreas Schwab <schwab@suse.de> | |
| 249 | ||
| 250 | * configure: Rebuild. | |
| 251 | ||
| 252 | 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org> | |
| 253 | ||
| 254 | * ppc-opc.c (L): Make this field not optional. | |
| 255 | ||
| 256 | 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com> | |
| 257 | ||
| 258 | * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'. | |
| 259 | Fix parameter to 'm[t|f]csr' insns. | |
| 260 | ||
| 261 | 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org> | |
| 262 | ||
| 263 | * configure.in: Autoupdate to autoconf 2.59. | |
| 264 | * aclocal.m4: Rebuild with aclocal 1.4p6. | |
| 265 | * configure: Rebuild with autoconf 2.59. | |
| 266 | * Makefile.in: Rebuild with automake 1.4p6 (picking up | |
| 267 | bfd changes for autoconf 2.59 on the way). | |
| 268 | * config.in: Rebuild with autoheader 2.59. | |
| 269 | ||
| 270 | 2004-08-27 Richard Sandiford <rsandifo@redhat.com> | |
| 271 | ||
| 272 | * frv-desc.[ch], frv-opc.[ch]: Regenerated. | |
| 273 | ||
| 274 | 2004-07-30 Michal Ludvig <mludvig@suse.cz> | |
| 275 | ||
| 276 | * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1 | |
| 277 | (GRPPADLCK2): New define. | |
| 278 | (twobyte_has_modrm): True for 0xA6. | |
| 279 | (grps): GRPPADLCK2 for opcode 0xA6. | |
| 280 | ||
| 281 | 2004-07-29 Alexandre Oliva <aoliva@redhat.com> | |
| 282 | ||
| 283 | Introduce SH2a support. | |
| 284 | * sh-opc.h (arch_sh2a_base): Renumber. | |
| 285 | (arch_sh2a_nofpu_base): Remove. | |
| 286 | (arch_sh_base_mask): Adjust. | |
| 287 | (arch_opann_mask): New. | |
| 288 | (arch_sh2a, arch_sh2a_nofpu): Adjust. | |
| 289 | (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise. | |
| 290 | (sh_table): Adjust whitespace. | |
| 291 | 2004-02-24 Corinna Vinschen <vinschen@redhat.com> | |
| 292 | * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in | |
| 293 | instruction list throughout. | |
| 294 | (arch_sh2a_up): Redefine to include fpu instruction set. Use instead | |
| 295 | of arch_sh2a in instruction list throughout. | |
| 296 | (arch_sh2e_up): Accomodate above changes. | |
| 297 | (arch_sh2_up): Ditto. | |
| 298 | 2004-02-20 Corinna Vinschen <vinschen@redhat.com> | |
| 299 | * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up. | |
| 300 | 2004-02-18 Corinna Vinschen <vinschen@redhat.com> | |
| 301 | * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling. | |
| 302 | * sh-opc.h (arch_sh2a_nofpu): New. | |
| 303 | (arch_sh2a_up): New, defines sh2a and sh2a_nofpu. | |
| 304 | (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU | |
| 305 | instruction. | |
| 306 | 2004-01-20 DJ Delorie <dj@redhat.com> | |
| 307 | * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs. | |
| 308 | 2003-12-29 DJ Delorie <dj@redhat.com> | |
| 309 | * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up, | |
| 310 | sh_opcode_info, sh_table): Add sh2a support. | |
| 311 | (arch_op32): New, to tag 32-bit opcodes. | |
| 312 | * sh-dis.c (print_insn_sh): Support sh2a opcodes. | |
| 313 | 2003-12-02 Michael Snyder <msnyder@redhat.com> | |
| 314 | * sh-opc.h (arch_sh2a): Add. | |
| 315 | * sh-dis.c (arch_sh2a): Handle. | |
| 316 | * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a. | |
| 317 | ||
| 318 | 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com> | |
| 319 | ||
| 320 | * crx-opc.c: Add popx,pushx insns. Indent code, fix comments. | |
| 321 | ||
| 322 | 2004-07-22 Nick Clifton <nickc@redhat.com> | |
| 323 | ||
| 324 | PR/280 | |
| 325 | * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the | |
| 326 | insns - this is done by objdump itself. | |
| 327 | * h8500-dis.c (print_insn_h8500): Likewise. | |
| 328 | ||
| 329 | 2004-07-21 Jan Beulich <jbeulich@novell.com> | |
| 330 | ||
| 331 | * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode | |
| 332 | regardless of address size prefix in effect. | |
| 333 | (ptr_reg): Size or address registers does not depend on rex64, but | |
| 334 | on the presence of an address size override. | |
| 335 | (OP_MMX): Use rex.x only for xmm registers. | |
| 336 | (OP_EM): Use rex.z only for xmm registers. | |
| 337 | ||
| 338 | 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org> | |
| 339 | ||
| 340 | * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2 | |
| 341 | move/branch operations to the bottom so that VR5400 multimedia | |
| 342 | instructions take precedence in disassembly. | |
| 343 | ||
| 344 | 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org> | |
| 345 | ||
| 346 | * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32 | |
| 347 | ISA-specific "break" encoding. | |
| 348 | ||
| 349 | 2004-07-13 Elvis Chiang <elvisfb@gmail.com> | |
| 350 | ||
| 351 | * arm-opc.h: Fix typo in comment. | |
| 352 | ||
| 353 | 2004-07-11 Andreas Schwab <schwab@suse.de> | |
| 354 | ||
| 355 | * m68k-dis.c (m68k_valid_ea): Fix typos in last change. | |
| 356 | ||
| 357 | 2004-07-09 Andreas Schwab <schwab@suse.de> | |
| 358 | ||
| 359 | * m68k-dis.c (m68k_valid_ea): Check validity of all codes. | |
| 360 | ||
| 361 | 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com> | |
| 362 | ||
| 363 | * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c. | |
| 364 | (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo. | |
| 365 | (crx-dis.lo): New target. | |
| 366 | (crx-opc.lo): Likewise. | |
| 367 | * Makefile.in: Regenerate. | |
| 368 | * configure.in: Handle bfd_crx_arch. | |
| 369 | * configure: Regenerate. | |
| 370 | * crx-dis.c: New file. | |
| 371 | * crx-opc.c: New file. | |
| 372 | * disassemble.c (ARCH_crx): Define. | |
| 373 | (disassembler): Handle ARCH_crx. | |
| 374 | ||
| 375 | 2004-06-29 James E Wilson <wilson@specifixinc.com> | |
| 376 | ||
| 377 | * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds. | |
| 378 | * ia64-asmtab.c: Regnerate. | |
| 379 | ||
| 380 | 2004-06-28 Alan Modra <amodra@bigpond.net.au> | |
| 381 | ||
| 382 | * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf. | |
| 383 | (extract_fxm): Don't test dialect. | |
| 384 | (XFXFXM_MASK): Include the power4 bit. | |
| 385 | (XFXM): Add p4 param. | |
| 386 | (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr. | |
| 387 | ||
| 388 | 2004-06-27 Alexandre Oliva <aoliva@redhat.com> | |
| 389 | ||
| 390 | 2003-07-21 Richard Sandiford <rsandifo@redhat.com> | |
| 391 | * disassemble.c (disassembler): Handle bfd_mach_h8300sxn. | |
| 392 | ||
| 393 | 2004-06-26 Alan Modra <amodra@bigpond.net.au> | |
| 394 | ||
| 395 | * ppc-opc.c (BH, XLBH_MASK): Define. | |
| 396 | (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl. | |
| 397 | ||
| 398 | 2004-06-24 Alan Modra <amodra@bigpond.net.au> | |
| 399 | ||
| 400 | * i386-dis.c (x_mode): Comment. | |
| 401 | (two_source_ops): File scope. | |
| 402 | (float_mem): Correct fisttpll and fistpll. | |
| 403 | (float_mem_mode): New table. | |
| 404 | (dofloat): Use it. | |
| 405 | (OP_E): Correct intel mode PTR output. | |
| 406 | (ptr_reg): Use open_char and close_char. | |
| 407 | (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for | |
| 408 | operands. Set two_source_ops. | |
| 409 | ||
| 410 | 2004-06-15 Alan Modra <amodra@bigpond.net.au> | |
| 411 | ||
| 412 | * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size | |
| 413 | instead of _raw_size. | |
| 414 | ||
| 415 | 2004-06-08 Jakub Jelinek <jakub@redhat.com> | |
| 416 | ||
| 417 | * ia64-gen.c (in_iclass): Handle more postinc st | |
| 418 | and ld variants. | |
| 419 | * ia64-asmtab.c: Rebuilt. | |
| 420 | ||
| 421 | 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com> | |
| 422 | ||
| 423 | * s390-opc.txt: Correct architecture mask for some opcodes. | |
| 424 | lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available | |
| 425 | in the esa mode as well. | |
| 426 | ||
| 427 | 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com> | |
| 428 | ||
| 429 | * sh-dis.c (target_arch): Make unsigned. | |
| 430 | (print_insn_sh): Replace (most of) switch with a call to | |
| 431 | sh_get_arch_from_bfd_mach(). Also use new architecture flags system. | |
| 432 | * sh-opc.h: Redefine architecture flags values. | |
| 433 | Add sh3-nommu architecture. | |
| 434 | Reorganise <arch>_up macros so they make more visual sense. | |
| 435 | (SH_MERGE_ARCH_SET): Define new macro. | |
| 436 | (SH_VALID_BASE_ARCH_SET): Likewise. | |
| 437 | (SH_VALID_MMU_ARCH_SET): Likewise. | |
| 438 | (SH_VALID_CO_ARCH_SET): Likewise. | |
| 439 | (SH_VALID_ARCH_SET): Likewise. | |
| 440 | (SH_MERGE_ARCH_SET_VALID): Likewise. | |
| 441 | (SH_ARCH_SET_HAS_FPU): Likewise. | |
| 442 | (SH_ARCH_SET_HAS_DSP): Likewise. | |
| 443 | (SH_ARCH_UNKNOWN_ARCH): Likewise. | |
| 444 | (sh_get_arch_from_bfd_mach): Add prototype. | |
| 445 | (sh_get_arch_up_from_bfd_mach): Likewise. | |
| 446 | (sh_get_bfd_mach_from_arch_set): Likewise. | |
| 447 | (sh_merge_bfd_arc): Likewise. | |
| 448 | ||
| 449 | 2004-05-24 Peter Barada <peter@the-baradas.com> | |
| 450 | ||
| 451 | * m68k-dis.c(print_insn_m68k): Strip body of diassembly out | |
| 452 | into new match_insn_m68k function. Loop over canidate | |
| 453 | matches and select first that completely matches. | |
| 454 | * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit. | |
| 455 | * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea | |
| 456 | to verify addressing for MAC/EMAC. | |
| 457 | * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC | |
| 458 | reigster halves since 'fpu' and 'spl' look misleading. | |
| 459 | * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases. | |
| 460 | * m68k-opc.c: Rearragne mac/emac cases to use longest for | |
| 461 | first, tighten up match masks. | |
| 462 | * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce | |
| 463 | 'size' from special case code in print_insn_m68k to | |
| 464 | determine decode size of insns. | |
| 465 | ||
| 466 | 2004-05-19 Alan Modra <amodra@bigpond.net.au> | |
| 467 | ||
| 468 | * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as | |
| 469 | well as when -mpower4. | |
| 470 | ||
| 471 | 2004-05-13 Nick Clifton <nickc@redhat.com> | |
| 472 | ||
| 473 | * po/fr.po: Updated French translation. | |
| 474 | ||
| 475 | 2004-05-05 Peter Barada <peter@the-baradas.com> | |
| 476 | ||
| 477 | * m68k-dis.c(print_insn_m68k): Add new chips, use core | |
| 478 | variants in arch_mask. Only set m68881/68851 for 68k chips. | |
| 479 | * m68k-op.c: Switch from ColdFire chips to core variants. | |
| 480 | ||
| 481 | 2004-05-05 Alan Modra <amodra@bigpond.net.au> | |
| 482 | ||
| 483 | PR 147. | |
| 484 | * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC. | |
| 485 | ||
| 486 | 2004-04-29 Ben Elliston <bje@au.ibm.com> | |
| 487 | ||
| 488 | * ppc-opc.c (XCMPL): Renmame to XOPL. Update users. | |
| 489 | (powerpc_opcodes): Add "dbczl" instruction for PPC970. | |
| 490 | ||
| 491 | 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp> | |
| 492 | ||
| 493 | * sh-dis.c (print_insn_sh): Print the value in constant pool | |
| 494 | as a symbol if it looks like a symbol. | |
| 495 | ||
| 496 | 2004-04-22 Peter Barada <peter@the-baradas.com> | |
| 497 | ||
| 498 | * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on | |
| 499 | appropriate ColdFire architectures. | |
| 500 | (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC | |
| 501 | mask addressing. | |
| 502 | Add EMAC instructions, fix MAC instructions. Remove | |
| 503 | macmw/macml/msacmw/msacml instructions since mask addressing now | |
| 504 | supported. | |
| 505 | ||
| 506 | 2004-04-20 Jakub Jelinek <jakub@redhat.com> | |
| 507 | ||
| 508 | * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define. | |
| 509 | (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to | |
| 510 | suffix. Use fmov*x macros, create all 3 fpsize variants in one | |
| 511 | macro. Adjust all users. | |
| 512 | ||
| 513 | 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com> | |
| 514 | ||
| 515 | * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs" | |
| 516 | separately. | |
| 517 | ||
| 518 | 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> | |
| 519 | ||
| 520 | * m32r-asm.c: Regenerate. | |
| 521 | ||
| 522 | 2004-03-29 Stan Shebs <shebs@apple.com> | |
| 523 | ||
| 524 | * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer | |
| 525 | used. | |
| 526 | ||
| 527 | 2004-03-19 Alan Modra <amodra@bigpond.net.au> | |
| 528 | ||
| 529 | * aclocal.m4: Regenerate. | |
| 530 | * config.in: Regenerate. | |
| 531 | * configure: Regenerate. | |
| 532 | * po/POTFILES.in: Regenerate. | |
| 533 | * po/opcodes.pot: Regenerate. | |
| 534 | ||
| 535 | 2004-03-16 Alan Modra <amodra@bigpond.net.au> | |
| 536 | ||
| 537 | * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle | |
| 538 | PPC_OPERANDS_GPR_0. | |
| 539 | * ppc-opc.c (RA0): Define. | |
| 540 | (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0. | |
| 541 | (RAOPT): Rename from RAO. Update all uses. | |
| 542 | (powerpc_opcodes): Use RA0 as appropriate. | |
| 543 | ||
| 544 | 2004-03-15 Aldy Hernandez <aldyh@redhat.com> | |
| 545 | ||
| 546 | * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg. | |
| 547 | ||
| 548 | 2004-03-15 Alan Modra <amodra@bigpond.net.au> | |
| 549 | ||
| 550 | * sparc-dis.c (print_insn_sparc): Update getword prototype. | |
| 551 | ||
| 552 | 2004-03-12 Michal Ludvig <mludvig@suse.cz> | |
| 553 | ||
| 554 | * i386-dis.c (GRPPLOCK): Delete. | |
| 555 | (grps): Delete GRPPLOCK entry. | |
| 556 | ||
| 557 | 2004-03-12 Alan Modra <amodra@bigpond.net.au> | |
| 558 | ||
| 559 | * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions. | |
| 560 | (M, Mp): Use OP_M. | |
| 561 | (None, PADLOCK_SPECIAL, PADLOCK_0): Delete. | |
| 562 | (GRPPADLCK): Define. | |
| 563 | (dis386): Use NOP_Fixup on "nop". | |
| 564 | (dis386_twobyte): Use GRPPADLCK on opcode 0xa7. | |
| 565 | (twobyte_has_modrm): Set for 0xa7. | |
| 566 | (padlock_table): Delete. Move to.. | |
| 567 | (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence | |
| 568 | and clflush. | |
| 569 | (print_insn): Revert PADLOCK_SPECIAL code. | |
| 570 | (OP_E): Delete sfence, lfence, mfence checks. | |
| 571 | ||
| 572 | 2004-03-12 Jakub Jelinek <jakub@redhat.com> | |
| 573 | ||
| 574 | * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg. | |
| 575 | (INVLPG_Fixup): New function. | |
| 576 | (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag. | |
| 577 | ||
| 578 | 2004-03-12 Michal Ludvig <mludvig@suse.cz> | |
| 579 | ||
| 580 | * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines. | |
| 581 | (dis386_twobyte): Opcode 0xa7 is PADLOCK_0. | |
| 582 | (padlock_table): New struct with PadLock instructions. | |
| 583 | (print_insn): Handle PADLOCK_SPECIAL. | |
| 584 | ||
| 585 | 2004-03-12 Alan Modra <amodra@bigpond.net.au> | |
| 586 | ||
| 587 | * i386-dis.c (grps): Use clflush by default for 0x0fae/7. | |
| 588 | (OP_E): Twiddle clflush to sfence here. | |
| 589 | ||
| 590 | 2004-03-08 Nick Clifton <nickc@redhat.com> | |
| 591 | ||
| 592 | * po/de.po: Updated German translation. | |
| 593 | ||
| 594 | 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com> | |
| 595 | ||
| 596 | * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in | |
| 597 | nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu. | |
| 598 | * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions | |
| 599 | accordingly. | |
| 600 | ||
| 601 | 2004-03-01 Richard Sandiford <rsandifo@redhat.com> | |
| 602 | ||
| 603 | * frv-asm.c: Regenerate. | |
| 604 | * frv-desc.c: Regenerate. | |
| 605 | * frv-desc.h: Regenerate. | |
| 606 | * frv-dis.c: Regenerate. | |
| 607 | * frv-ibld.c: Regenerate. | |
| 608 | * frv-opc.c: Regenerate. | |
| 609 | * frv-opc.h: Regenerate. | |
| 610 | ||
| 611 | 2004-03-01 Richard Sandiford <rsandifo@redhat.com> | |
| 612 | ||
| 613 | * frv-desc.c, frv-opc.c: Regenerate. | |
| 614 | ||
| 615 | 2004-03-01 Richard Sandiford <rsandifo@redhat.com> | |
| 616 | ||
| 617 | * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate. | |
| 618 | ||
| 619 | 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com> | |
| 620 | ||
| 621 | * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4. | |
| 622 | Also correct mistake in the comment. | |
| 623 | ||
| 624 | 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com> | |
| 625 | ||
| 626 | * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to | |
| 627 | ensure that double registers have even numbers. | |
| 628 | Add REG_N_B01 for nn01 (binary 01) nibble to ensure | |
| 629 | that reserved instruction 0xfffd does not decode the same | |
| 630 | as 0xfdfd (ftrv). | |
| 631 | * sh-opc.h: Add REG_N_D nibble type and use it whereever | |
| 632 | REG_N refers to a double register. | |
| 633 | Add REG_N_B01 nibble type and use it instead of REG_NM | |
| 634 | in ftrv. | |
| 635 | Adjust the bit patterns in a few comments. | |
| 636 | ||
| 637 | 2004-02-25 Aldy Hernandez <aldyh@redhat.com> | |
| 638 | ||
| 639 | * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst. | |
| 640 | ||
| 641 | 2004-02-20 Aldy Hernandez <aldyh@redhat.com> | |
| 642 | ||
| 643 | * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat. | |
| 644 | ||
| 645 | 2004-02-20 Aldy Hernandez <aldyh@redhat.com> | |
| 646 | ||
| 647 | * ppc-opc.c (powerpc_opcodes): Add m*ivor35. | |
| 648 | ||
| 649 | 2004-02-20 Aldy Hernandez <aldyh@redhat.com> | |
| 650 | ||
| 651 | * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34, | |
| 652 | mtivor32, mtivor33, mtivor34. | |
| 653 | ||
| 654 | 2004-02-19 Aldy Hernandez <aldyh@redhat.com> | |
| 655 | ||
| 656 | * ppc-opc.c (powerpc_opcodes): Add mfmcar. | |
| 657 | ||
| 658 | 2004-02-10 Petko Manolov <petkan@nucleusys.com> | |
| 659 | ||
| 660 | * arm-opc.h Maverick accumulator register opcode fixes. | |
| 661 | ||
| 662 | 2004-02-13 Ben Elliston <bje@wasabisystems.com> | |
| 663 | ||
| 664 | * m32r-dis.c: Regenerate. | |
| 665 | ||
| 666 | 2004-01-27 Michael Snyder <msnyder@redhat.com> | |
| 667 | ||
| 668 | * sh-opc.h (sh_table): "fsrra", not "fssra". | |
| 669 | ||
| 670 | 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au> | |
| 671 | ||
| 672 | * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten | |
| 673 | contraints. | |
| 674 | ||
| 675 | 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au> | |
| 676 | ||
| 677 | * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args. | |
| 678 | ||
| 679 | 2004-01-19 Alan Modra <amodra@bigpond.net.au> | |
| 680 | ||
| 681 | * i386-dis.c (OP_E): Print scale factor on intel mode sib when not | |
| 682 | 1. Don't print scale factor on AT&T mode when index missing. | |
| 683 | ||
| 684 | 2004-01-16 Alexandre Oliva <aoliva@redhat.com> | |
| 685 | ||
| 686 | * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended | |
| 687 | when loaded into XR registers. | |
| 688 | ||
| 689 | 2004-01-14 Richard Sandiford <rsandifo@redhat.com> | |
| 690 | ||
| 691 | * frv-desc.h: Regenerate. | |
| 692 | * frv-desc.c: Regenerate. | |
| 693 | * frv-opc.c: Regenerate. | |
| 694 | ||
| 695 | 2004-01-13 Michael Snyder <msnyder@redhat.com> | |
| 696 | ||
| 697 | * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn. | |
| 698 | ||
| 699 | 2004-01-09 Paul Brook <paul@codesourcery.com> | |
| 700 | ||
| 701 | * arm-opc.h (arm_opcodes): Move generic mcrr after known | |
| 702 | specific opcodes. | |
| 703 | ||
| 704 | 2004-01-07 Daniel Jacobowitz <drow@mvista.com> | |
| 705 | ||
| 706 | * Makefile.am (libopcodes_la_DEPENDENCIES) | |
| 707 | (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory | |
| 708 | comment about the problem. | |
| 709 | * Makefile.in: Regenerate. | |
| 710 | ||
| 711 | 2004-01-06 Alexandre Oliva <aoliva@redhat.com> | |
| 712 | ||
| 713 | 2003-12-19 Alexandre Oliva <aoliva@redhat.com> | |
| 714 | * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some | |
| 715 | cut&paste errors in shifting/truncating numerical operands. | |
| 716 | 2003-08-04 Alexandre Oliva <aoliva@redhat.com> | |
| 717 | * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo. | |
| 718 | (parse_uslo16): Likewise. | |
| 719 | (parse_uhi16): Parse gotoffhi and gotofffuncdeschi. | |
| 720 | (parse_d12): Parse gotoff12 and gotofffuncdesc12. | |
| 721 | (parse_s12): Likewise. | |
| 722 | 2003-08-04 Alexandre Oliva <aoliva@redhat.com> | |
| 723 | * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo. | |
| 724 | (parse_uslo16): Likewise. | |
| 725 | (parse_uhi16): Parse gothi and gotfuncdeschi. | |
| 726 | (parse_d12): Parse got12 and gotfuncdesc12. | |
| 727 | (parse_s12): Likewise. | |
| 728 | ||
| 729 | 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl> | |
| 730 | ||
| 731 | * msp430-dis.c (msp430_doubleoperand): Check for an 'add' | |
| 732 | instruction which looks similar to an 'rla' instruction. | |
| 733 | ||
| 734 | For older changes see ChangeLog-0203 | |
| 735 | \f | |
| 752937aa NC |
736 | Copyright (C) 2004 Free Software Foundation, Inc. |
| 737 | ||
| 738 | Copying and distribution of this file, with or without modification, | |
| 739 | are permitted in any medium without royalty provided the copyright | |
| 740 | notice and this notice are preserved. | |
| 741 | ||
| e88d958a AM |
742 | Local Variables: |
| 743 | mode: change-log | |
| 744 | left-margin: 8 | |
| 745 | fill-column: 74 | |
| 746 | version-control: never | |
| 747 | End: |