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[thirdparty/binutils-gdb.git] / opcodes / rx-decode.opc
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c7927a3c
NC		 1/* -*- c -*- */
2#include <stdio.h>
3#include <stdlib.h>
4#include <string.h>
5
6#include "config.h"
7#include "ansidecl.h"
8#include "opcode/rx.h"
9
10#define RX_OPCODE_BIG_ENDIAN 0
11
12typedef struct
13{
14 RX_Opcode_Decoded * rx;
15 int (* getbyte)(void *);
16 void * ptr;
17 unsigned char * op;
18} LocalData;
19
20static int trace = 0;
21
22#define BSIZE 0
23#define WSIZE 1
24#define LSIZE 2
25
26/* These are for when the upper bits are "don't care" or "undefined". */
27static int bwl[] =
28{
29 RX_Byte,
30 RX_Word,
31 RX_Long
32};
33
34static int sbwl[] =
35{
36 RX_SByte,
37 RX_SWord,
38 RX_Long
39};
40
41static int ubwl[] =
42{
43 RX_UByte,
44 RX_UWord,
45 RX_Long
46};
47
48static int memex[] =
49{
50 RX_SByte,
51 RX_SWord,
52 RX_Long,
53 RX_UWord
54};
55
56#define ID(x) rx->id = RXO_##x
57#define OP(n,t,r,a) (rx->op[n].type = t, \
58 rx->op[n].reg = r, \
59 rx->op[n].addend = a )
60#define OPs(n,t,r,a,s) (OP (n,t,r,a), \
61 rx->op[n].size = s )
62
63/* This is for the BWL and BW bitfields. */
64static int SCALE[] = { 1, 2, 4 };
65/* This is for the prefix size enum. */
66static int PSCALE[] = { 4, 1, 1, 1, 2, 2, 2, 3, 4 };
67
68static int flagmap[] = {0, 1, 2, 3, 0, 0, 0, 0,
69 16, 17, 0, 0, 0, 0, 0, 0 };
70
71static int dsp3map[] = { 8, 9, 10, 3, 4, 5, 6, 7 };
72
73/*
74 *C a constant (immediate) c
75 *R A register
76 *I Register indirect, no offset
77 *Is Register indirect, with offset
78 *D standard displacement: type (r,[r],dsp8,dsp16 code), register, BWL code
79 *P standard displacement: type (r,[r]), reg, assumes UByte
80 *Pm memex displacement: type (r,[r]), reg, memex code
81 *cc condition code. */
82
83#define DC(c) OP (0, RX_Operand_Immediate, 0, c)
84#define DR(r) OP (0, RX_Operand_Register, r, 0)
85#define DI(r,a) OP (0, RX_Operand_Indirect, r, a)
86#define DIs(r,a,s) OP (0, RX_Operand_Indirect, r, (a) * SCALE[s])
87#define DD(t,r,s) rx_disp (0, t, r, bwl[s], ld);
88#define DF(r) OP (0, RX_Operand_Flag, flagmap[r], 0)
89
90#define SC(i) OP (1, RX_Operand_Immediate, 0, i)
91#define SR(r) OP (1, RX_Operand_Register, r, 0)
92#define SI(r,a) OP (1, RX_Operand_Indirect, r, a)
93#define SIs(r,a,s) OP (1, RX_Operand_Indirect, r, (a) * SCALE[s])
94#define SD(t,r,s) rx_disp (1, t, r, bwl[s], ld);
95#define SP(t,r) rx_disp (1, t, r, (t!=3) ? RX_UByte : RX_Long, ld); P(t, 1);
96#define SPm(t,r,m) rx_disp (1, t, r, memex[m], ld); rx->op[1].size = memex[m];
97#define Scc(cc) OP (1, RX_Operand_Condition, cc, 0)
98
99#define S2C(i) OP (2, RX_Operand_Immediate, 0, i)
100#define S2R(r) OP (2, RX_Operand_Register, r, 0)
101#define S2I(r,a) OP (2, RX_Operand_Indirect, r, a)
102#define S2Is(r,a,s) OP (2, RX_Operand_Indirect, r, (a) * SCALE[s])
103#define S2D(t,r,s) rx_disp (2, t, r, bwl[s], ld);
104#define S2P(t,r) rx_disp (2, t, r, (t!=3) ? RX_UByte : RX_Long, ld); P(t, 2);
105#define S2Pm(t,r,m) rx_disp (2, t, r, memex[m], ld); rx->op[2].size = memex[m];
106#define S2cc(cc) OP (2, RX_Operand_Condition, cc, 0)
107
108#define BWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = bwl[sz]
109#define sBWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = sbwl[sz]
110#define uBWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = ubwl[sz]
111#define P(t, n) rx->op[n].size = (t!=3) ? RX_UByte : RX_Long;
112
113#define F(f) store_flags(rx, f)
114
115#define AU ATTRIBUTE_UNUSED
116#define GETBYTE() (ld->op [ld->rx->n_bytes++] = ld->getbyte (ld->ptr))
117
118#define SYNTAX(x) rx->syntax = x
119
120#define UNSUPPORTED() \
121 rx->syntax = "*unknown*"
122
123#define IMM(sf) immediate (sf, 0, ld)
124#define IMMex(sf) immediate (sf, 1, ld)
125
126static int
127immediate (int sfield, int ex, LocalData * ld)
128{
129 unsigned long i = 0, j;
130
131 switch (sfield)
132 {
133#define B ((unsigned long) GETBYTE())
134 case 0:
135#if RX_OPCODE_BIG_ENDIAN
136 i = B;
137 if (ex && (i & 0x80))
138 i -= 0x100;
139 i <<= 24;
140 i |= B << 16;
141 i |= B << 8;
142 i |= B;
143#else
144 i = B;
145 i |= B << 8;
146 i |= B << 16;
147 j = B;
148 if (ex && (j & 0x80))
149 j -= 0x100;
150 i |= j << 24;
151#endif
152 break;
153 case 3:
154#if RX_OPCODE_BIG_ENDIAN
155 i = B << 16;
156 i |= B << 8;
157 i |= B;
158#else
159 i = B;
160 i |= B << 8;
161 i |= B << 16;
162#endif
163 if (ex && (i & 0x800000))
164 i -= 0x1000000;
165 break;
166 case 2:
167#if RX_OPCODE_BIG_ENDIAN
168 i |= B << 8;
169 i |= B;
170#else
171 i |= B;
172 i |= B << 8;
173#endif
174 if (ex && (i & 0x8000))
175 i -= 0x10000;
176 break;
177 case 1:
178 i |= B;
179 if (ex && (i & 0x80))
180 i -= 0x100;
181 break;
182 default:
183 abort();
184 }
185 return i;
186}
187
188static void
189rx_disp (int n, int type, int reg, int size, LocalData * ld)
190{
191 int disp;
192
193 ld->rx->op[n].reg = reg;
194 switch (type)
195 {
196 case 3:
197 ld->rx->op[n].type = RX_Operand_Register;
198 break;
199 case 0:
200 ld->rx->op[n].type = RX_Operand_Indirect;
201 ld->rx->op[n].addend = 0;
202 break;
203 case 1:
204 ld->rx->op[n].type = RX_Operand_Indirect;
205 disp = GETBYTE ();
206 ld->rx->op[n].addend = disp * PSCALE[size];
207 break;
208 case 2:
209 ld->rx->op[n].type = RX_Operand_Indirect;
210 disp = GETBYTE ();
211#if RX_OPCODE_BIG_ENDIAN
212 disp = disp * 256 + GETBYTE ();
213#else
214 disp = disp + GETBYTE () * 256;
215#endif
216 ld->rx->op[n].addend = disp * PSCALE[size];
217 break;
218 default:
219 abort ();
220 }
221}
222
223/* The syntax is "OSZC" where each character is one of the following:
224 - = flag unchanged
225 0 = flag cleared
226 1 = flag set
227 ? = flag undefined
228 x = flag set (any letter will do, use it for hints :). */
229
230static void
231store_flags (RX_Opcode_Decoded * rx, char * str)
232{
233 int i, mask;
234 rx->flags_0 = 0;
235 rx->flags_1 = 0;
236 rx->flags_s = 0;
237
238 for (i = 0; i < 4; i++)
239 {
240 mask = 8 >> i;
241 switch (str[i])
242 {
243 case 0:
244 abort ();
245 case '-':
246 break;
247 case '0':
248 rx->flags_0 |= mask;
249 break;
250 case '1':
251 rx->flags_1 |= mask;
252 break;
253 case '?':
254 break;
255 default:
256 rx->flags_0 |= mask;
257 rx->flags_s |= mask;
258 break;
259 }
260 }
261}
262
263int
264rx_decode_opcode (unsigned long pc AU,
265 RX_Opcode_Decoded * rx,
266 int (* getbyte)(void *),
267 void * ptr)
268{
269 LocalData lds, * ld = &lds;
270 unsigned char op[20] = {0};
271
272 lds.rx = rx;
273 lds.getbyte = getbyte;
274 lds.ptr = ptr;
275 lds.op = op;
276
277 memset (rx, 0, sizeof (*rx));
278 BWL(LSIZE);
279
280/** VARY sz 00 01 10 */
281
282/*----------------------------------------------------------------------*/
283/* MOV */
284
285/** 0111 0101 0100 rdst mov%s #%1, %0 */
286 ID(mov); DR(rdst); SC(IMM (1)); F("----");
287
288/** 1111 10sd rdst im sz mov%s #%1, %0 */
289 ID(mov); sBWL (sz); DD(sd, rdst, sz); SC(IMMex(im)); F("----");
290
291/** 0110 0110 immm rdst mov%s #%1, %0 */
292 ID(mov); DR(rdst); SC(immm); F("----");
293
294/** 0011 11sz d dst sppp mov%s #%1, %0 */
295 ID(mov); sBWL (sz); DIs(dst, d*16+sppp, sz); SC(IMM(1)); F("----");
296
297/** 11sz sd ss rsrc rdst mov%s %1, %0 */
298 ID(mov); sBWL(sz); F("----");
299 if ((ss == 3) && (sd != 3))
300 {
301 SD(ss, rdst, sz); DD(sd, rsrc, sz);
302 }
303 else
304 {
305 SD(ss, rsrc, sz); DD(sd, rdst, sz);
306 }
307
308/** 10sz 1dsp a src b dst mov%s %1, %0 */
309 ID(mov); sBWL(sz); DR(dst); SIs(src, dsp*4+a*2+b, sz); F("----");
310
311/** 10sz 0dsp a dst b src mov%s %1, %0 */
312 ID(mov); sBWL(sz); DIs(dst, dsp*4+a*2+b, sz); SR(src); F("----");
313
314/** 1111 1110 01sz isrc bsrc rdst mov%s [%1, %2], %0 */
315 ID(movbi); sBWL(sz); DR(rdst); SR(isrc); S2R(bsrc); F("----");
316
317/** 1111 1110 00sz isrc bsrc rdst mov%s %0, [%1, %2] */
318 ID(movbir); sBWL(sz); DR(rdst); SR(isrc); S2R(bsrc); F("----");
319
320/** 1111 1110 11sz isrc bsrc rdst movu%s [%1, %2], %0 */
321 ID(movbi); uBWL(sz); DR(rdst); SR(isrc); S2R(bsrc); F("----");
322
323/** 1111 1101 0010 0p sz rdst rsrc mov%s %1, %0 */
324 ID(mov); sBWL (sz); SR(rsrc); F("----");
325 OP(0, p ? RX_Operand_Predec : RX_Operand_Postinc, rdst, 0);
326
327/** 1111 1101 0010 1p sz rsrc rdst mov%s %1, %0 */
328 ID(mov); sBWL (sz); DR(rdst); F("----");
329 OP(1, p ? RX_Operand_Predec : RX_Operand_Postinc, rsrc, 0);
330
331/** 1011 w dsp a src b dst movu%s %1, %0 */
332 ID(mov); uBWL(w); DR(dst); SIs(src, dsp*4+a*2+b, w); F("----");
333
334/** 0101 1 s ss rsrc rdst movu%s %1, %0 */
335 ID(mov); uBWL(s); SD(ss, rsrc, s); DR(rdst); F("----");
336
337/** 1111 1101 0011 1p sz rsrc rdst movu%s %1, %0 */
338 ID(mov); uBWL (sz); DR(rdst); F("----");
339 OP(1, p ? RX_Operand_Predec : RX_Operand_Postinc, rsrc, 0);
340
341/*----------------------------------------------------------------------*/
342/* PUSH/POP */
343
344/** 0110 1111 dsta dstb popm %1-%2 */
345 ID(popm); SR(dsta); S2R(dstb); F("----");
346
347/** 0110 1110 dsta dstb pushm %1-%2 */
348 ID(pushm); SR(dsta); S2R(dstb); F("----");
349
350/** 0111 1110 1011 rdst pop %0 */
351 ID(mov); OP(1, RX_Operand_Postinc, 0, 0); DR(rdst); F("----");
352
353/** 0111 1110 10sz rsrc push%s %1 */
354 ID(mov); BWL(sz); OP(0, RX_Operand_Predec, 0, 0); SR(rsrc); F("----");
355
356/** 1111 01ss rsrc 10sz push%s %1 */
357 ID(mov); BWL(sz); OP(0, RX_Operand_Predec, 0, 0); SD(ss, rsrc, sz); F("----");
358
359/*----------------------------------------------------------------------*/
360/* XCHG */
361
362/** 1111 1100 0100 00ss rsrc rdst xchg %1%S1, %0 */
363 ID(xchg); DR(rdst); SP(ss, rsrc);
364
365/** 0000 0110 mx10 00ss 0001 0000 rsrc rdst xchg %1%S1, %0 */
366 ID(xchg); DR(rdst); SPm(ss, rsrc, mx);
367
368/*----------------------------------------------------------------------*/
369/* STZ/STNZ */
370
371/** 1111 1101 0111 im00 1110rdst stz #%1, %0 */
372 ID(stcc); SC(IMMex(im)); DR(rdst); S2cc(RXC_z);
373
374/** 1111 1101 0111 im00 1111rdst stnz #%1, %0 */
375 ID(stcc); SC(IMMex(im)); DR(rdst); S2cc(RXC_nz);
376
377/*----------------------------------------------------------------------*/
378/* RTSD */
379
380/** 0110 0111 rtsd #%1 */
381 ID(rtsd); SC(IMM(1) * 4);
382
383/** 0011 1111 rega regb rtsd #%1, %2-%0 */
384 ID(rtsd); SC(IMM(1) * 4); S2R(rega); DR(regb);
385
386/*----------------------------------------------------------------------*/
387/* AND */
388
389/** 0110 0100 immm rdst and #%1, %0 */
390 ID(and); SC(immm); DR(rdst); F("-SZ-");
391
392/** 0111 01im 0010 rdst and #%1, %0 */
393 ID(and); SC(IMMex(im)); DR(rdst); F("-SZ-");
394
395/** 0101 00ss rsrc rdst and %1%S1, %0 */
396 ID(and); SP(ss, rsrc); DR(rdst); F("-SZ-");
397
398/** 0000 0110 mx01 00ss rsrc rdst and %1%S1, %0 */
399 ID(and); SPm(ss, rsrc, mx); DR(rdst); F("-SZ-");
400
401/** 1111 1111 0100 rdst srca srcb and %2, %1, %0 */
402 ID(and); DR(rdst); SR(srcb); S2R(srca); F("-SZ-");
403
404/*----------------------------------------------------------------------*/
405/* OR */
406
407/** 0110 0101 immm rdst or #%1, %0 */
408 ID(or); SC(immm); DR(rdst); F("-SZ-");
409
410/** 0111 01im 0011 rdst or #%1, %0 */
411 ID(or); SC(IMMex(im)); DR(rdst); F("-SZ-");
412
413/** 0101 01ss rsrc rdst or %1%S1, %0 */
414 ID(or); SP(ss, rsrc); DR(rdst); F("-SZ-");
415
416/** 0000 0110 mx01 01ss rsrc rdst or %1%S1, %0 */
417 ID(or); SPm(ss, rsrc, mx); DR(rdst); F("-SZ-");
418
419/** 1111 1111 0101 rdst srca srcb or %2, %1, %0 */
420 ID(or); DR(rdst); SR(srcb); S2R(srca); F("-SZ-");
421
422/*----------------------------------------------------------------------*/
423/* XOR */
424
425/** 1111 1101 0111 im00 1101rdst xor #%1, %0 */
426 ID(xor); SC(IMMex(im)); DR(rdst); F("-SZ-");
427
428/** 1111 1100 0011 01ss rsrc rdst xor %1%S1, %0 */
429 ID(xor); SP(ss, rsrc); DR(rdst); F("-SZ-");
430
431/** 0000 0110 mx10 00ss 0000 1101 rsrc rdst xor %1%S1, %0 */
432 ID(xor); SPm(ss, rsrc, mx); DR(rdst); F("-SZ-");
433
434/*----------------------------------------------------------------------*/
435/* NOT */
436
437/** 0111 1110 0000 rdst not %0 */
438 ID(xor); DR(rdst); SR(rdst); S2C(~0); F("-SZ-");
439
440/** 1111 1100 0011 1011 rsrc rdst not %1, %0 */
441 ID(xor); DR(rdst); SR(rsrc); S2C(~0); F("-SZ-");
442
443/*----------------------------------------------------------------------*/
444/* TST */
445
446/** 1111 1101 0111 im00 1100rdst tst #%1, %2 */
447 ID(and); SC(IMMex(im)); S2R(rdst); F("-SZ-");
448
449/** 1111 1100 0011 00ss rsrc rdst tst %1%S1, %2 */
450 ID(and); SP(ss, rsrc); S2R(rdst); F("-SZ-");
451
452/** 0000 0110 mx10 00ss 0000 1100 rsrc rdst tst %1%S1, %2 */
453 ID(and); SPm(ss, rsrc, mx); S2R(rdst); F("-SZ-");
454
455/*----------------------------------------------------------------------*/
456/* NEG */
457
458/** 0111 1110 0001 rdst neg %0 */
459 ID(sub); DR(rdst); SC(0); S2R(rdst); F("OSZC");
460
461/** 1111 1100 0000 0111 rsrc rdst neg %2, %0 */
462 ID(sub); DR(rdst); SC(0); S2R(rsrc); F("OSZC");
463
464/*----------------------------------------------------------------------*/
465/* ADC */
466
467/** 1111 1101 0111 im00 0010rdst adc #%1, %0 */
468 ID(adc); SC(IMMex(im)); DR(rdst); F("OSZC");
469
470/** 1111 1100 0000 1011 rsrc rdst adc %1, %0 */
471 ID(adc); SR(rsrc); DR(rdst); F("OSZC");
472
473/** 0000 0110 1010 00ss 0000 0010 rsrc rdst adc %1%S1, %0 */
474 ID(adc); SPm(ss, rsrc, 2); DR(rdst); F("OSZC");
475
476/*----------------------------------------------------------------------*/
477/* ADD */
478
479/** 0110 0010 immm rdst add #%1, %0 */
480 ID(add); SC(immm); DR(rdst); F("OSZC");
481
482/** 0100 10ss rsrc rdst add %1%S1, %0 */
483 ID(add); SP(ss, rsrc); DR(rdst); F("OSZC");
484
485/** 0000 0110 mx00 10ss rsrc rdst add %1%S1, %0 */
486 ID(add); SPm(ss, rsrc, mx); DR(rdst); F("OSZC");
487
488/** 0111 00im rsrc rdst add #%1, %2, %0 */
489 ID(add); SC(IMMex(im)); S2R(rsrc); DR(rdst); F("OSZC");
490
491/** 1111 1111 0010 rdst srca srcb add %2, %1, %0 */
492 ID(add); DR(rdst); SR(srcb); S2R(srca); F("OSZC");
493
494/*----------------------------------------------------------------------*/
495/* CMP */
496
497/** 0110 0001 immm rdst cmp #%2, %1 */
498 ID(sub); S2C(immm); SR(rdst); F("OSZC");
499
500/** 0111 01im 0000 rsrc cmp #%2, %1%S1 */
501 ID(sub); SR(rsrc); S2C(IMMex(im)); F("OSZC");
502
503/** 0111 0101 0101 rsrc cmp #%2, %1 */
504 ID(sub); SR(rsrc); S2C(IMM(1)); F("OSZC");
505
506/** 0100 01ss rsrc rdst cmp %2%S2, %1 */
507 ID(sub); S2P(ss, rsrc); SR(rdst); F("OSZC");
508
509/** 0000 0110 mx00 01ss rsrc rdst cmp %2%S2, %1 */
510 ID(sub); S2Pm(ss, rsrc, mx); SR(rdst); F("OSZC");
511
512/*----------------------------------------------------------------------*/
513/* SUB */
514
515/** 0110 0000 immm rdst sub #%2, %0 */
516 ID(sub); S2C(immm); SR(rdst); DR(rdst); F("OSZC");
517
518/** 0100 00ss rsrc rdst sub %2%S2, %1 */
519 ID(sub); S2P(ss, rsrc); SR(rdst); DR(rdst); F("OSZC");
520
521/** 0000 0110 mx00 00ss rsrc rdst sub %2%S2, %1 */
522 ID(sub); S2Pm(ss, rsrc, mx); SR(rdst); DR(rdst); F("OSZC");
523
524/** 1111 1111 0000 rdst srca srcb sub %2, %1, %0 */
525 ID(sub); DR(rdst); SR(srcb); S2R(srca); F("OSZC");
526
527/*----------------------------------------------------------------------*/
528/* SBB */
529
530/** 1111 1100 0000 0011 rsrc rdst sbb %1, %0 */
531 ID(sbb); SR (rsrc); DR(rdst); F("OSZC");
532
533 /* FIXME: only supports .L */
534/** 0000 0110 mx10 00sp 0000 0000 rsrc rdst sbb %1%S1, %0 */
535 ID(sbb); SPm(sp, rsrc, mx); DR(rdst); F("OSZC");
536
537/*----------------------------------------------------------------------*/
538/* ABS */
539
540/** 0111 1110 0010 rdst abs %0 */
541 ID(abs); DR(rdst); SR(rdst); F("OSZ-");
542
543/** 1111 1100 0000 1111 rsrc rdst abs %1, %0 */
544 ID(abs); DR(rdst); SR(rsrc); F("OSZ-");
545
546/*----------------------------------------------------------------------*/
547/* MAX */
548
549/** 1111 1101 0111 im00 0100rdst max #%1, %0 */
550 ID(max); DR(rdst); SC(IMMex(im));
551
552/** 1111 1100 0001 00ss rsrc rdst max %1%S1, %0 */
553 ID(max); SP(ss, rsrc); DR(rdst);
554
555/** 0000 0110 mx10 00ss 0000 0100 rsrc rdst max %1%S1, %0 */
556 ID(max); SPm(ss, rsrc, mx); DR(rdst);
557
558/*----------------------------------------------------------------------*/
559/* MIN */
560
561/** 1111 1101 0111 im00 0101rdst min #%1, %0 */
562 ID(min); DR(rdst); SC(IMMex(im));
563
564/** 1111 1100 0001 01ss rsrc rdst min %1%S1, %0 */
565 ID(min); SP(ss, rsrc); DR(rdst);
566
567/** 0000 0110 mx10 00ss 0000 0101 rsrc rdst min %1%S1, %0 */
568 ID(min); SPm(ss, rsrc, mx); DR(rdst);
569
570/*----------------------------------------------------------------------*/
571/* MUL */
572
573/** 0110 0011 immm rdst mul #%1, %0 */
f282425e 574 ID(mul); DR(rdst); SC(immm); F("----");
c7927a3c
NC		 575
576/** 0111 01im 0001rdst mul #%1, %0 */
f282425e 577 ID(mul); DR(rdst); SC(IMMex(im)); F("----");
c7927a3c
NC		 578
579/** 0100 11ss rsrc rdst mul %1%S1, %0 */
f282425e 580 ID(mul); SP(ss, rsrc); DR(rdst); F("----");
c7927a3c
NC		 581
582/** 0000 0110 mx00 11ss rsrc rdst mul %1%S1, %0 */
f282425e 583 ID(mul); SPm(ss, rsrc, mx); DR(rdst); F("----");
c7927a3c
NC		 584
585/** 1111 1111 0011 rdst srca srcb mul %2, %1, %0 */
f282425e 586 ID(mul); DR(rdst); SR(srcb); S2R(srca); F("----");
c7927a3c
NC		 587
588/*----------------------------------------------------------------------*/
589/* EMUL */
590
591/** 1111 1101 0111 im00 0110rdst emul #%1, %0 */
592 ID(emul); DR(rdst); SC(IMMex(im));
593
594/** 1111 1100 0001 10ss rsrc rdst emul %1%S1, %0 */
595 ID(emul); SP(ss, rsrc); DR(rdst);
596
597/** 0000 0110 mx10 00ss 0000 0110 rsrc rdst emul %1%S1, %0 */
598 ID(emul); SPm(ss, rsrc, mx); DR(rdst);
599
600/*----------------------------------------------------------------------*/
601/* EMULU */
602
603/** 1111 1101 0111 im00 0111rdst emulu #%1, %0 */
604 ID(emulu); DR(rdst); SC(IMMex(im));
605
606/** 1111 1100 0001 11ss rsrc rdst emulu %1%S1, %0 */
607 ID(emulu); SP(ss, rsrc); DR(rdst);
608
609/** 0000 0110 mx10 00ss 0000 0111 rsrc rdst emulu %1%S1, %0 */
610 ID(emulu); SPm(ss, rsrc, mx); DR(rdst);
611
612/*----------------------------------------------------------------------*/
613/* DIV */
614
615/** 1111 1101 0111 im00 1000rdst div #%1, %0 */
616 ID(div); DR(rdst); SC(IMMex(im)); F("O---");
617
618/** 1111 1100 0010 00ss rsrc rdst div %1%S1, %0 */
619 ID(div); SP(ss, rsrc); DR(rdst); F("O---");
620
621/** 0000 0110 mx10 00ss 0000 1000 rsrc rdst div %1%S1, %0 */
622 ID(div); SPm(ss, rsrc, mx); DR(rdst); F("O---");
623
624/*----------------------------------------------------------------------*/
625/* DIVU */
626
627/** 1111 1101 0111 im00 1001rdst divu #%1, %0 */
628 ID(divu); DR(rdst); SC(IMMex(im)); F("O---");
629
630/** 1111 1100 0010 01ss rsrc rdst divu %1%S1, %0 */
631 ID(divu); SP(ss, rsrc); DR(rdst); F("O---");
632
633/** 0000 0110 mx10 00ss 0000 1001 rsrc rdst divu %1%S1, %0 */
634 ID(divu); SPm(ss, rsrc, mx); DR(rdst); F("O---");
635
636/*----------------------------------------------------------------------*/
637/* SHIFT */
638
639/** 0110 110i mmmm rdst shll #%2, %0 */
640 ID(shll); S2C(i*16+mmmm); SR(rdst); DR(rdst); F("OSZC");
641
642/** 1111 1101 0110 0010 rsrc rdst shll %2, %0 */
643 ID(shll); S2R(rsrc); SR(rdst); DR(rdst); F("OSZC");
644
645/** 1111 1101 110immmm rsrc rdst shll #%2, %1, %0 */
646 ID(shll); S2C(immmm); SR(rsrc); DR(rdst); F("OSZC");
647
648
649/** 0110 101i mmmm rdst shar #%2, %0 */
650 ID(shar); S2C(i*16+mmmm); SR(rdst); DR(rdst); F("0SZC");
651
652/** 1111 1101 0110 0001 rsrc rdst shar %2, %0 */
653 ID(shar); S2R(rsrc); SR(rdst); DR(rdst); F("0SZC");
654
655/** 1111 1101 101immmm rsrc rdst shar #%2, %1, %0 */
656 ID(shar); S2C(immmm); SR(rsrc); DR(rdst); F("0SZC");
657
658
659/** 0110 100i mmmm rdst shlr #%2, %0 */
660 ID(shlr); S2C(i*16+mmmm); SR(rdst); DR(rdst); F("-SZC");
661
662/** 1111 1101 0110 0000 rsrc rdst shlr %2, %0 */
663 ID(shlr); S2R(rsrc); SR(rdst); DR(rdst); F("-SZC");
664
665/** 1111 1101 100immmm rsrc rdst shlr #%2, %1, %0 */
666 ID(shlr); S2C(immmm); SR(rsrc); DR(rdst); F("-SZC");
667
668/*----------------------------------------------------------------------*/
669/* ROTATE */
670
671/** 0111 1110 0101 rdst rolc %0 */
672 ID(rolc); DR(rdst); F("-SZC");
673
674/** 0111 1110 0100 rdst rorc %0 */
675 ID(rorc); DR(rdst); F("-SZC");
676
677/** 1111 1101 0110 111i mmmm rdst rotl #%1, %0 */
678 ID(rotl); SC(i*16+mmmm); DR(rdst); F("-SZC");
679
680/** 1111 1101 0110 0110 rsrc rdst rotl %1, %0 */
681 ID(rotl); SR(rsrc); DR(rdst); F("-SZC");
682
683/** 1111 1101 0110 110i mmmm rdst rotr #%1, %0 */
684 ID(rotr); SC(i*16+mmmm); DR(rdst); F("-SZC");
685
686/** 1111 1101 0110 0100 rsrc rdst rotr %1, %0 */
687 ID(rotr); SR(rsrc); DR(rdst); F("-SZC");
688
689/** 1111 1101 0110 0101 rsrc rdst revw %1, %0 */
690 ID(revw); SR(rsrc); DR(rdst);
691
692/** 1111 1101 0110 0111 rsrc rdst revl %1, %0 */
693 ID(revl); SR(rsrc); DR(rdst);
694
695/*----------------------------------------------------------------------*/
696/* BRANCH */
697
698/** 0001 n dsp b%1.s %a0 */
699 ID(branch); Scc(n); DC(pc + dsp3map[dsp]);
700
701/** 0010 cond b%1.b %a0 */
702 ID(branch); Scc(cond); DC(pc + IMMex (1));
703
704/** 0011 101c b%1.w %a0 */
705 ID(branch); Scc(c); DC(pc + IMMex (2));
706
707
708/** 0000 1dsp bra.s %a0 */
709 ID(branch); Scc(RXC_always); DC(pc + dsp3map[dsp]);
710
711/** 0010 1110 bra.b %a0 */
712 ID(branch); Scc(RXC_always); DC(pc + IMMex(1));
713
714/** 0011 1000 bra.w %a0 */
715 ID(branch); Scc(RXC_always); DC(pc + IMMex(2));
716
717/** 0000 0100 bra.a %a0 */
718 ID(branch); Scc(RXC_always); DC(pc + IMMex(3));
719
720/** 0111 1111 0100 rsrc bra.l %0 */
721 ID(branchrel); Scc(RXC_always); DR(rsrc);
722
723
724/** 0111 1111 0000 rsrc jmp %0 */
725 ID(branch); Scc(RXC_always); DR(rsrc);
726
727/** 0111 1111 0001 rsrc jsr %0 */
728 ID(jsr); DR(rsrc);
729
730/** 0011 1001 bsr.w %a0 */
731 ID(jsr); DC(pc + IMMex(2));
732
733/** 0000 0101 bsr.a %a0 */
734 ID(jsr); DC(pc + IMMex(3));
735
736/** 0111 1111 0101 rsrc bsr.l %0 */
737 ID(jsrrel); DR(rsrc);
738
739/** 0000 0010 rts */
740 ID(rts);
741
742/*----------------------------------------------------------------------*/
743/* NOP */
744
745/** 0000 0011 nop */
746 ID(nop);
747
748/*----------------------------------------------------------------------*/
749/* STRING FUNCTIONS */
750
751/** 0111 1111 1000 0011 scmpu */
752 ID(scmpu); F("--ZC");
753
754/** 0111 1111 1000 0111 smovu */
755 ID(smovu);
756
757/** 0111 1111 1000 1011 smovb */
758 ID(smovb);
759
760/** 0111 1111 1000 00sz suntil%s */
f282425e 761 ID(suntil); BWL(sz); F("--ZC");
c7927a3c
NC		 762
763/** 0111 1111 1000 01sz swhile%s */
f282425e 764 ID(swhile); BWL(sz); F("--ZC");
c7927a3c
NC		 765
766/** 0111 1111 1000 1111 smovf */
767 ID(smovf);
768
769/** 0111 1111 1000 10sz sstr%s */
770 ID(sstr); BWL(sz);
771
772/*----------------------------------------------------------------------*/
773/* RMPA */
774
775/** 0111 1111 1000 11sz rmpa%s */
776 ID(rmpa); BWL(sz); F("OS--");
777
778/*----------------------------------------------------------------------*/
779/* HI/LO stuff */
780
781/** 1111 1101 0000 0000 srca srcb mulhi %1, %2 */
782 ID(mulhi); SR(srca); S2R(srcb); F("----");
783
784/** 1111 1101 0000 0001 srca srcb mullo %1, %2 */
785 ID(mullo); SR(srca); S2R(srcb); F("----");
786
787/** 1111 1101 0000 0100 srca srcb machi %1, %2 */
788 ID(machi); SR(srca); S2R(srcb); F("----");
789
790/** 1111 1101 0000 0101 srca srcb maclo %1, %2 */
791 ID(maclo); SR(srca); S2R(srcb); F("----");
792
793/** 1111 1101 0001 0111 0000 rsrc mvtachi %1 */
794 ID(mvtachi); SR(rsrc); F("----");
795
796/** 1111 1101 0001 0111 0001 rsrc mvtaclo %1 */
797 ID(mvtaclo); SR(rsrc); F("----");
798
799/** 1111 1101 0001 1111 0000 rdst mvfachi %0 */
800 ID(mvfachi); DR(rdst); F("----");
801
802/** 1111 1101 0001 1111 0010 rdst mvfacmi %0 */
803 ID(mvfacmi); DR(rdst); F("----");
804
805/** 1111 1101 0001 1111 0001 rdst mvfaclo %0 */
806 ID(mvfaclo); DR(rdst); F("----");
807
808/** 1111 1101 0001 1000 000i 0000 racw #%1 */
809 ID(racw); SC(i+1); F("----");
810
811/*----------------------------------------------------------------------*/
812/* SAT */
813
814/** 0111 1110 0011 rdst sat %0 */
815 ID(sat); DR (rdst);
816
817/** 0111 1111 1001 0011 satr */
818 ID(satr);
819
820/*----------------------------------------------------------------------*/
821/* FLOAT */
822
823/** 1111 1101 0111 0010 0010 rdst fadd #%1, %0 */
824 ID(fadd); DR(rdst); SC(IMM(0)); F("-SZ-");
825
826/** 1111 1100 1000 10sd rsrc rdst fadd %1%S1, %0 */
827 ID(fadd); DR(rdst); SD(sd, rsrc, LSIZE); F("-SZ-");
828
829/** 1111 1101 0111 0010 0001 rdst fcmp #%1, %0 */
830 ID(fcmp); DR(rdst); SC(IMM(0)); F("OSZ-");
831
832/** 1111 1100 1000 01sd rsrc rdst fcmp %1%S1, %0 */
833 ID(fcmp); DR(rdst); SD(sd, rsrc, LSIZE); F("OSZ-");
834
835/** 1111 1101 0111 0010 0000 rdst fsub #%1, %0 */
836 ID(fsub); DR(rdst); SC(IMM(0)); F("-SZ-");
837
838/** 1111 1100 1000 00sd rsrc rdst fsub %1%S1, %0 */
839 ID(fsub); DR(rdst); SD(sd, rsrc, LSIZE); F("-SZ-");
840
841/** 1111 1100 1001 01sd rsrc rdst ftoi %1%S1, %0 */
842 ID(ftoi); DR(rdst); SD(sd, rsrc, LSIZE); F("-SZ-");
843
844/** 1111 1101 0111 0010 0011 rdst fmul #%1, %0 */
845 ID(fmul); DR(rdst); SC(IMM(0)); F("-SZ-");
846
847/** 1111 1100 1000 11sd rsrc rdst fmul %1%S1, %0 */
848 ID(fmul); DR(rdst); SD(sd, rsrc, LSIZE); F("-SZ-");
849
850/** 1111 1101 0111 0010 0100 rdst fdiv #%1, %0 */
851 ID(fdiv); DR(rdst); SC(IMM(0)); F("-SZ-");
852
853/** 1111 1100 1001 00sd rsrc rdst fdiv %1%S1, %0 */
854 ID(fdiv); DR(rdst); SD(sd, rsrc, LSIZE); F("-SZ-");
855
856/** 1111 1100 1001 10sd rsrc rdst round %1%S1, %0 */
857 ID(round); DR(rdst); SD(sd, rsrc, LSIZE); F("-SZ-");
858
859/** 1111 1100 0100 01sd rsrc rdst itof %1%S1, %0 */
860 ID(itof); DR (rdst); SP(sd, rsrc); F("-SZ-");
861
862/** 0000 0110 mx10 00sd 0001 0001 rsrc rdst itof %1%S1, %0 */
863 ID(itof); DR (rdst); SPm(sd, rsrc, mx); F("-SZ-");
864
865/*----------------------------------------------------------------------*/
866/* BIT OPS */
867
868/** 1111 00sd rdst 0bit bset #%1, %0%S0 */
869 ID(bset); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE); F("----");
870
871/** 1111 1100 0110 00sd rdst rsrc bset %1, %0%S0 */
872 ID(bset); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE); F("----");
873
874/** 0111 100b ittt rdst bset #%1, %0 */
875 ID(bset); BWL(LSIZE); SC(b*16+ittt); DR(rdst); F("----");
876
877
878/** 1111 00sd rdst 1bit bclr #%1, %0%S0 */
879 ID(bclr); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE); F("----");
880
881/** 1111 1100 0110 01sd rdst rsrc bclr %1, %0%S0 */
882 ID(bclr); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE); F("----");
883
884/** 0111 101b ittt rdst bclr #%1, %0 */
885 ID(bclr); BWL(LSIZE); SC(b*16+ittt); DR(rdst); F("----");
886
887
888/** 1111 01sd rdst 0bit btst #%2, %1%S1 */
889 ID(btst); BWL(BSIZE); S2C(bit); SD(sd, rdst, BSIZE); F("--ZC");
890
891/** 1111 1100 0110 10sd rdst rsrc btst %2, %1%S1 */
892 ID(btst); BWL(BSIZE); S2R(rsrc); SD(sd, rdst, BSIZE); F("--ZC");
893
894/** 0111 110b ittt rdst btst #%2, %1 */
895 ID(btst); BWL(LSIZE); S2C(b*16+ittt); SR(rdst); F("--ZC");
896
897
898/** 1111 1100 111bit sd rdst 1111 bnot #%1, %0%S0 */
899 ID(bnot); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE);
900
901/** 1111 1100 0110 11sd rdst rsrc bnot %1, %0%S0 */
902 ID(bnot); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE);
903
904/** 1111 1101 111bittt 1111 rdst bnot #%1, %0 */
905 ID(bnot); BWL(LSIZE); SC(bittt); DR(rdst);
906
907
908/** 1111 1100 111bit sd rdst cond bm%2 #%1, %0%S0 */
909 ID(bmcc); BWL(BSIZE); S2cc(cond); SC(bit); DD(sd, rdst, BSIZE);
910
911/** 1111 1101 111 bittt cond rdst bm%2 #%1, %0%S0 */
912 ID(bmcc); BWL(LSIZE); S2cc(cond); SC(bittt); DR(rdst);
913
914/*----------------------------------------------------------------------*/
915/* CONTROL REGISTERS */
916
917/** 0111 1111 1011 rdst clrpsw %0 */
918 ID(clrpsw); DF(rdst);
919
920/** 0111 1111 1010 rdst setpsw %0 */
921 ID(setpsw); DF(rdst);
922
923/** 0111 1110 111 crdst popc %0 */
924 ID(mov); OP(1, RX_Operand_Postinc, 0, 0); DR(crdst + 16);
925
926/** 0111 1110 110 crsrc pushc %1 */
927 ID(mov); OP(0, RX_Operand_Predec, 0, 0); SR(crsrc + 16);
928
929/** 1111 1101 0111 im11 000crdst mvtc #%1, %0 */
930 ID(mov); SC(IMMex(im)); DR(crdst + 16);
931
932/** 1111 1101 0110 100c rsrc rdst mvtc %1, %0 */
933 ID(mov); SR(rsrc); DR(c*16+rdst + 16);
934
935/** 1111 1101 0110 101s rsrc rdst mvfc %1, %0 */
936 ID(mov); SR((s*16+rsrc) + 16); DR(rdst);
937
938/*?* 1111 1101 1111 1010 01cp rsrc mvtcp #%2, %1, #%0 */
939 ID(mvtcp); S2C(cp); SR(rsrc); DC (IMM (WSIZE));
940
941/*?* 1111 1101 1111 1011 01cp rdst mvfcp #%2, %0, #%1 */
942 ID(mvfcp); S2C(cp); DR(rdst); SC (IMM (WSIZE));
943
944/*?* 1111 1101 1111 1001 01cp 0000 opecp #%2, #%1 */
945 ID(opecp); S2C(cp); SC (IMM (WSIZE));
946
947/*----------------------------------------------------------------------*/
948/* INTERRUPTS */
949
950/** 0111 1111 1001 0100 rtfi */
951 ID(rtfi);
952
953/** 0111 1111 1001 0101 rte */
954 ID(rte);
955
956/** 0000 0000 brk */
957 ID(brk);
958
959/** 0000 0001 dbt */
960 ID(dbt);
961
962/** 0111 0101 0110 0000 int #%1 */
963 ID(int); SC(IMM(1));
964
965/** 0111 1111 1001 0110 wait */
966 ID(wait);
967
968/*----------------------------------------------------------------------*/
969/* SCcnd */
970
971/** 1111 1100 1101 sz sd rdst cond sc%1%s %0 */
972 ID(sccnd); BWL(sz); DD (sd, rdst, sz); Scc(cond);
973
974/** */
975
976 return rx->n_bytes;
977}
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