projects / thirdparty / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 4a306116 DB |
1 | # frv testcase for umulcc $GRi,$GRj,$GRk |
| 2 | # mach: all | |
| 3 | ||
| 4 | .include "testutils.inc" | |
| 5 | ||
| 6 | start | |
| 7 | ||
| 8 | .global umulcc | |
| 9 | umulcc: | |
| 10 | set_gr_immed 3,gr7 ; multiply small numbers | |
| 11 | set_gr_immed 2,gr8 | |
| 12 | set_icc 0x0f,0 ; Set mask opposite of expected | |
| 13 | umulcc gr7,gr8,gr8,icc0 | |
| 14 | test_icc 0 0 1 1 icc0 | |
| 15 | test_gr_immed 0,gr8 | |
| 16 | test_gr_immed 6,gr9 | |
| 17 | ||
| 18 | set_gr_immed 1,gr7 ; multiply by 1 | |
| 19 | set_gr_immed 2,gr8 | |
| 20 | set_icc 0x0e,0 ; Set mask opposite of expected | |
| 21 | umulcc gr7,gr8,gr8,icc0 | |
| 22 | test_icc 0 0 1 0 icc0 | |
| 23 | test_gr_immed 0,gr8 | |
| 24 | test_gr_immed 2,gr9 | |
| 25 | ||
| 26 | set_gr_immed 2,gr7 ; multiply by 1 | |
| 27 | set_gr_immed 1,gr8 | |
| 28 | set_icc 0x0f,0 ; Set mask opposite of expected | |
| 29 | umulcc gr7,gr8,gr8,icc0 | |
| 30 | test_icc 0 0 1 1 icc0 | |
| 31 | test_gr_immed 0,gr8 | |
| 32 | test_gr_immed 2,gr9 | |
| 33 | ||
| 34 | set_gr_immed 0,gr7 ; multiply by 0 | |
| 35 | set_gr_immed 2,gr8 | |
| 36 | set_icc 0x0b,0 ; Set mask opposite of expected | |
| 37 | umulcc gr7,gr8,gr8,icc0 | |
| 38 | test_icc 0 1 1 1 icc0 | |
| 39 | test_gr_immed 0,gr8 | |
| 40 | test_gr_immed 0,gr9 | |
| 41 | ||
| 42 | set_gr_immed 2,gr7 ; multiply by 0 | |
| 43 | set_gr_immed 0,gr8 | |
| 44 | set_icc 0x0a,0 ; Set mask opposite of expected | |
| 45 | umulcc gr7,gr8,gr8,icc0 | |
| 46 | test_icc 0 1 1 0 icc0 | |
| 47 | test_gr_immed 0,gr8 | |
| 48 | test_gr_immed 0,gr9 | |
| 49 | ||
| 50 | set_gr_limmed 0x3fff,0xffff,gr7 ; 31 bit result | |
| 51 | set_gr_immed 2,gr8 | |
| 52 | set_icc 0x0f,0 ; Set mask opposite of expected | |
| 53 | umulcc gr7,gr8,gr8,icc0 | |
| 54 | test_icc 0 0 1 1 icc0 | |
| 55 | test_gr_immed 0,gr8 | |
| 56 | test_gr_limmed 0x7fff,0xfffe,gr9 | |
| 57 | ||
| 58 | set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result | |
| 59 | set_gr_immed 2,gr8 | |
| 60 | set_icc 0x0e,0 ; Set mask opposite of expected | |
| 61 | umulcc gr7,gr8,gr8,icc0 | |
| 62 | test_icc 0 0 1 0 icc0 | |
| 63 | test_gr_immed 0,gr8 | |
| 64 | test_gr_limmed 0x8000,0x0000,gr9 | |
| 65 | ||
| 66 | set_gr_limmed 0x8000,0x0000,gr7 ; 33 bit result | |
| 67 | set_gr_immed 2,gr8 | |
| 68 | set_icc 0x0d,0 ; Set mask opposite of expected | |
| 69 | umulcc gr7,gr8,gr8,icc0 | |
| 70 | test_icc 0 0 0 1 icc0 | |
| 71 | test_gr_immed 1,gr8 | |
| 72 | test_gr_immed 0x00000000,gr9 | |
| 73 | ||
| 74 | set_gr_limmed 0x7fff,0xffff,gr7 ; max positive result | |
| 75 | set_gr_limmed 0x7fff,0xffff,gr8 | |
| 76 | set_icc 0x0d,0 ; Set mask opposite of expected | |
| 77 | umulcc gr7,gr8,gr8,icc0 | |
| 78 | test_icc 0 0 0 1 icc0 | |
| 79 | test_gr_limmed 0x3fff,0xffff,gr8 | |
| 80 | test_gr_immed 1,gr9 | |
| 81 | ||
| 82 | set_gr_limmed 0x8000,0x0000,gr7 ; max positive result | |
| 83 | set_gr_limmed 0x8000,0x0000,gr8 | |
| 84 | set_icc 0x0d,0 ; Set mask opposite of expected | |
| 85 | umulcc gr7,gr8,gr8,icc0 | |
| 86 | test_icc 0 0 0 1 icc0 | |
| 87 | test_gr_limmed 0x4000,0x0000,gr8 | |
| 88 | test_gr_immed 0,gr9 | |
| 89 | ||
| 90 | set_gr_limmed 0xffff,0xffff,gr7 ; max positive result | |
| 91 | set_gr_limmed 0xffff,0xffff,gr8 | |
| 92 | set_icc 0x05,0 ; Set mask opposite of expected | |
| 93 | umulcc gr7,gr8,gr8,icc0 | |
| 94 | test_icc 1 0 0 1 icc0 | |
| 95 | test_gr_limmed 0xffff,0xfffe,gr8 | |
| 96 | test_gr_immed 1,gr9 | |
| 97 | ||
| 98 | pass |